forked from MirrorRepos/RomWBW
Wayne Warthen
2 years ago
22 changed files with 249 additions and 6 deletions
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@ -0,0 +1,4 @@ |
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@echo off |
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setlocal |
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|
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pushd ZRC512 && call Build || exit /b & popd |
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@ -0,0 +1,68 @@ |
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; |
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;================================================================================================== |
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; RCBUS Z80 ZRC512 CONFIGURATION |
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;================================================================================================== |
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; |
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; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE |
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; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS |
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; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE |
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; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS. |
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; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY |
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; YOUR FILE IN THE BUILD PROCESS. |
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; |
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; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM. |
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; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO |
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; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON |
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; SETTINGS. |
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; |
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; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE, |
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; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING |
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; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS! |
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; |
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; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO |
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; DIRECTORIES ABOVE THIS ONE). |
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; |
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#DEFINE PLATFORM_NAME "ZRC512", " [", CONFIG, "]" |
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; |
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#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT |
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; |
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#include "cfg_rcz80.asm" |
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; |
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CPUOSC .SET 22000000 ; CPU OSC FREQ IN MHZ |
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CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP |
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; |
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FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS |
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FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES |
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; |
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RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) |
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ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) |
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MEMMGR .SET MM_ZRC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180] |
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; |
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MDROM .SET FALSE ; MD: ENABLE ROM DISK |
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; |
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UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) |
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ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) |
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SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) |
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DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) |
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; |
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TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) |
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TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) |
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TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO] |
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MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER) |
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VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM) |
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VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD |
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; |
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AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER |
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AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC] |
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SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER |
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; |
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FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) |
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FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC] |
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; |
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IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) |
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PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) |
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SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) |
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SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY |
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IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM) |
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; |
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PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) |
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@ -0,0 +1,41 @@ |
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ZRC has no real ROM. It has a single 2048K RAM chip. There |
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are two startup modes supported by RomWBW. |
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|
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The normal startup mode treats the first 512KB like ROM and the |
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remaining 1536KB as RAM. The first 512KB (pseudo-ROM) must be preloaded |
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by the ZRC CF Loader. This mode simulates a normal ROM-based RomWBW |
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startup. |
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Bank Contents Description |
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---- -------- ----------- |
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0x0 BOOT Boot Bank (HBIOS image) + |
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0x1 IMG0 ROM Loader, Monitor, ROM OSes | |
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0x2 IMG1 ROM Applications | Pseudo-ROM |
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0x3 IMG2 Reserved | |
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0x4-0xF ROMD ROM Disk Banks + |
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0x10 BIOS HBIOS Bank (operating) |
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0x11-0x3B RAMD RAM Disk Banks |
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0x3C BUF OS Buffers (CP/M3) |
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0x3D AUX Aux Bank (CP/M 3, BPBIOS, etc.) |
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0x3E USR User Bank (CP/M TPA, etc.) |
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0x3F COM Common Bank, Upper 32KB |
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|
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The ROMless startup mode treats the entire 2048KB as RAM. However, in |
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this mode, only the first 512KB of RAM is utilized. This is because |
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the RAM Disk is seeded by the CF Loader which is currently constrained |
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to loading 512KB. The entire 512KB of RAM (less the top 32KB) must be |
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preloaded by the ZRC CF Loader. There will be no ROM disk available |
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under RomWBW. There will be a RAM Disk and it's initial contents will |
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be seeded by the image loaded by the CF Loader. |
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|
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Bank Contents Description |
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-------- -------- ----------- |
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0x0 BIOS HBIOS Bank (operating) |
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0x1 IMG0 ROM Loader, Monitor, ROM OSes |
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0x2 IMG1 ROM Applications |
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0x3 IMG2 Reserved |
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0x4-0xB RAMD RAM Disk Banks |
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0xC BUF OS Buffers (CP/M3) |
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0xD AUX Aux Bank (CP/M 3, BPBIOS, etc.) |
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0xE USR User Bank (CP/M TPA, etc.) |
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0xF COM Common Bank, Upper 32KB |
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@ -0,0 +1,23 @@ |
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@echo off |
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setlocal |
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set TOOLS=../../Tools |
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set PATH=%TOOLS%\srecord;%PATH% |
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if exist ..\..\Binary\RCZ80_zrc512.rom call :build_zrc512 |
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goto :eof |
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:build_zrc512 |
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srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary |
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srec_cat temp.dat -binary -exclude 0x0 0x200 zrc512_cfldr.bin -binary -o temp.dat -binary |
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srec_cat temp.dat -binary -exclude 0x1B8 0x200 zrc512_ptbl.bin -binary -offset 0x1B8 -o temp.dat -binary |
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srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zrc512_mon.bin -binary -offset 0x1F000 -o temp.dat -binary |
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srec_cat temp.dat -binary -exclude 0x24000 0xA4000 ..\..\Binary\RCZ80_zrc512.rom -binary -offset 0x24000 -o temp.dat -binary |
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move temp.dat ..\..\Binary\hd1k_zrc512_prefix.dat |
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copy /b ..\..\Binary\hd1k_zrc512_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\hd1k_zrc512_combo.img || exit /b |
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goto :eof |
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@ -0,0 +1,3 @@ |
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@echo off |
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setlocal |
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@ -0,0 +1,30 @@ |
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HD1KZRC512PREFIX = hd1k_zrc512_prefix.dat |
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HD1KZRC512COMBOIMG = hd1k_zrc512_combo.img |
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ZRC512ROM = ../../Binary/RCZ80_zrc512.rom |
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HD1KIMGS = ../../Binary/hd1k_cpm22.img ../../Binary/hd1k_zsdos.img ../../Binary/hd1k_nzcom.img \
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../../Binary/hd1k_cpm3.img ../../Binary/hd1k_zpm3.img ../../Binary/hd1k_ws4.img |
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OBJECTS := |
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ifneq ($(wildcard $(ZRC512ROM)),) |
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OBJECTS += $(HD1KZRC512PREFIX) $(HD1KZRC512COMBOIMG) |
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endif |
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DEST=../../Binary |
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TOOLS = ../../Tools |
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include $(TOOLS)/Makefile.inc |
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DIFFPATH = $(DIFFTO)/Binary |
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$(HD1KZRC512PREFIX): |
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srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary |
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srec_cat temp.dat -binary -exclude 0x0 0x200 zrc512_cfldr.bin -binary -o temp.dat -binary |
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srec_cat temp.dat -binary -exclude 0x1B8 0x200 zrc512_ptbl.bin -binary -offset 0x1B8 -o temp.dat -binary |
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srec_cat temp.dat -binary -exclude 0x1F000 0x20000 zrc512_mon.bin -binary -offset 0x1F000 -o temp.dat -binary |
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srec_cat temp.dat -binary -exclude 0x24000 0xA4000 $(ZRC512ROM) -binary -offset 0x24000 -o temp.dat -binary |
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mv temp.dat $@ |
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$(HD1KZRC512COMBOIMG): $(HD1KZRC512PREFIX) $(HD1KIMGS) |
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cat $^ > $@ |
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@ -0,0 +1,24 @@ |
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ZRC512 Disk Prefix Layout |
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====================== |
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---- Bytes ---- --- Sectors --- |
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Start Length Start Length Description |
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------- ------- ------- ------- --------------------------- |
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0x00000 0x001BE 0 1 CF Boot Loader |
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0x001B8 0x00048 RomWBW Partition Table |
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0x00200 0x1EE00 1 247 Unused |
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0x1F000 0x01000 248 8 ZRC512 Monitor v0.3 |
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0x20000 0x04000 256 32 Unused |
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0x24000 0x80000 288 1024 RomWBW |
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0xA4000 0x5C000 1312 736 Unused |
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0x100000 2048 Start of slices (partition 0x1E) |
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Notes |
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----- |
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- At startup CPLD ROM is mapped to Z80 CPU address space 0x0000-0x003F, CPU begins execution at 0x0000 |
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- CPLD ROM (CF bootstrap mode) reads CF Boot Loader (512B) from start of CF (MBR) to 0xB000 and runs it |
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- CF Boot Loader reads ZRC512 Monitor (4KB) from sectors 0xF8-0xFF of CF to 0xB400 and runs it |
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- ZRC Monitor reads 480KB (RomWBW) from sectors 0x120-0x4DF of CF into 480KB of physical RAM |
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- ZRC Monitor maps first 32KB of physical RAM to first 32KB of CPU RAM and starts execution at 0x0000 |
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