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\define{doc_title}{Architecture} |
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\include{"Common.h"} |
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$define{doc_title}{Architecture}$ |
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$include{"Common.h"}$ |
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Overview |
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======== |
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@ -134,7 +134,7 @@ the same area that is bank switched. |
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Boot Phase 1 copies the phase 2 code to upper memory and jumps to it to |
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continue the boot process. This is required because the CPU starts at |
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address \$0000 in low memory. However, low memory is used as the area |
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address $0000 in low memory. However, low memory is used as the area |
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for switching ROM/RAM banks in and out. Therefore, it is necessary to |
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relocate execution to high memory in order to initialize the RAM memory |
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banks. |
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@ -184,7 +184,7 @@ ROM Boot |
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At power on (or hardware reset), ROM page 0 is automatically mapped to |
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lower memory by hardware level system initialization. Page Zero (first |
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256 bytes of the CPU address space) is reserved to contain dispatching |
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instructions for interrupt instructions. Address \$0000 performs a jump |
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instructions for interrupt instructions. Address $0000 performs a jump |
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to the start of the phase 1 code so that this first page can be |
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reserved. |
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@ -210,13 +210,13 @@ initiate an Application Boot using the system image contained in the |
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application file itself. |
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Upon execution, the Application Boot program is loaded into memory by |
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the previously running operating system starting at \$0100. Note that |
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the previously running operating system starting at $0100. Note that |
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program image contains a copy of the HBIOS to be installed and run. Once |
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the Application Boot program is loaded by the previous operating system, |
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control is passed to it and it performs a system initialization similar |
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to the ROM Boot, but using the image loaded in RAM. |
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Specifically, the code at \$0100 (in low memory) copies phase 2 boot |
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Specifically, the code at $0100 (in low memory) copies phase 2 boot |
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code to upper memory and transfers control to it. The phase 2 boot code |
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copies the HBIOS image from application RAM to RAM, then calls the HBIOS |
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initialization routine. At this point, the prior HBIOS code has been |
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@ -387,7 +387,7 @@ _Bits_ | _Function_ |
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2 | Stop Bits (???) |
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1-0 | Data Bits (???) |
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The 5-bit baud rate value (V) is encoded as V = 75 \* 2\^X \* 3\^Y. The |
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The 5-bit baud rate value (V) is encoded as V = 75 * 2^X * 3^Y. The |
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bits are defined as YXXXX. |
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### Function 0x00 -- Character Input (CIOIN) |
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@ -526,17 +526,17 @@ types. |
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**Media ID** | **Value** | **Format** |
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------------ | --------- | ---------- |
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MID\_NONE | 0 | No media installed |
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MID\_MDROM | 1 | ROM Drive |
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MID\_MDRAM | 2 | RAM Drive |
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MID\_RF | 3 | RAM Floppy (LBA) |
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MID\_HD | 4 | Hard Disk (LBA) |
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MID\_FD720 | 5 | 3.5" 720K Floppy |
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MID\_FD144 | 6 | 3.5" 1.44M Floppy |
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MID\_FD360 | 7 | 5.25" 360K Floppy |
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MID\_FD120 | 8 | 5.25" 1.2M Floppy |
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MID\_FD111 | 9 | 8" 1.11M Floppy |
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MID\_HDNEW | 10 | Hard Disk with 1024 Directory entries |
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MID_NONE | 0 | No media installed |
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MID_MDROM | 1 | ROM Drive |
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MID_MDRAM | 2 | RAM Drive |
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MID_RF | 3 | RAM Floppy (LBA) |
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MID_HD | 4 | Hard Disk (LBA) |
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MID_FD720 | 5 | 3.5" 720K Floppy |
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MID_FD144 | 6 | 3.5" 1.44M Floppy |
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MID_FD360 | 7 | 5.25" 360K Floppy |
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MID_FD120 | 8 | 5.25" 1.2M Floppy |
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MID_FD111 | 9 | 8" 1.11M Floppy |
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MID_HDNEW | 10 | Hard Disk with 1024 Directory entries |
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### Function 0x10 -- Disk Status (DIOSTATUS) |
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@ -950,22 +950,22 @@ possible 16 values for foreground or background: |
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**Foreground** | **Background** | **Color** |
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------------------ | ------------------ | ---------------- |
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\_0 \_\_\_\_0000 | 0\_ 0000\_\_\_\_ | Black |
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\_1 \_\_\_\_0001 | 1\_ 0001\_\_\_\_ | Red |
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\_2 \_\_\_\_0010 | 2\_ 0010\_\_\_\_ | Green |
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\_3 \_\_\_\_0011 | 3\_ 0011\_\_\_\_ | Brown |
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\_4 \_\_\_\_0100 | 4\_ 0100\_\_\_\_ | Blue |
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\_5 \_\_\_\_0101 | 5\_ 0101\_\_\_\_ | Magenta |
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\_6 \_\_\_\_0110 | 6\_ 0110\_\_\_\_ | Cyan |
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\_7 \_\_\_\_0111 | 7\_ 0111\_\_\_\_ | White |
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\_8 \_\_\_\_1000 | 8\_ 1000\_\_\_\_ | Gray |
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\_9 \_\_\_\_1001 | 9\_ 1001\_\_\_\_ | Light Red |
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\_A \_\_\_\_1010 | A\_ 1010\_\_\_\_ | Light Green |
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\_B \_\_\_\_1011 | B\_ 1011\_\_\_\_ | Yellow |
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\_C \_\_\_\_1100 | C\_ 1100\_\_\_\_ | Light Blue |
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\_D \_\_\_\_1101 | D\_ 1101\_\_\_\_ | Light Magenta |
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\_E \_\_\_\_1110 | E\_ 1110\_\_\_\_ | Light Cyan |
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\_F \_\_\_\_1111 | F\_ 1111\_\_\_\_ | Bright White |
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n0 nnnn0000 | 0n 0000nnnn | Black |
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n1 nnnn0001 | 1n 0001nnnn | Red |
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n2 nnnn0010 | 2n 0010nnnn | Green |
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n3 nnnn0011 | 3n 0011nnnn | Brown |
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n4 nnnn0100 | 4n 0100nnnn | Blue |
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n5 nnnn0101 | 5n 0101nnnn | Magenta |
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n6 nnnn0110 | 6n 0110nnnn | Cyan |
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n7 nnnn0111 | 7n 0111nnnn | White |
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n8 nnnn1000 | 8n 1000nnnn | Gray |
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n9 nnnn1001 | 9n 1001nnnn | Light Red |
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nA nnnn1010 | An 1010nnnn | Light Green |
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nB nnnn1011 | Bn 1011nnnn | Yellow |
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nC nnnn1100 | Cn 1100nnnn | Light Blue |
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nD nnnn1101 | Dn 1101nnnn | Light Magenta |
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nE nnnn1110 | En 1110nnnn | Light Cyan |
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nF nnnn1111 | Fn 1111nnnn | Bright White |
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Attribute byte values are constructed using the following bit encoding: |
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@ -1087,12 +1087,12 @@ The currently defined video device types are: |
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VDA ID | Value | Device |
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---------- | ----- | ------ |
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VDA\_NONE | 0x00 | No VDA |
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VDA\_VDU | 0x10 | ECB VDU board |
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VDA\_CVDU | 0x20 | ECB Color VDU board |
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VDA\_7220 | 0x30 | ECB uPD7220 video display board |
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VDA\_N8 | 0x40 | TMS9918 video display built-in to N8 |
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VDA\_VGA | 0x50 | ECB VGA board |
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VDA_NONE | 0x00 | No VDA |
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VDA_VDU | 0x10 | ECB VDU board |
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VDA_CVDU | 0x20 | ECB Color VDU board |
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VDA_7220 | 0x30 | ECB uPD7220 video display board |
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VDA_N8 | 0x40 | TMS9918 video display built-in to N8 |
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VDA_VGA | 0x50 | ECB VGA board |
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### Function 0x44 -- Video Set Cursor Style (VDASCS) |
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@ -1107,7 +1107,7 @@ VDA\_VGA | 0x50 | ECB VGA board |
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If supported by the video hardware, adjust the format of the cursor such |
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that the cursor starts at the pixel specified in the top nibble of D and |
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end at the pixel specified in the bottom nibble of D. So, if D=\$08, a |
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end at the pixel specified in the bottom nibble of D. So, if D=$08, a |
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block cursor would be used that starts at the top pixel of the character |
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cell and ends at the ninth pixel of the character cell. |
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@ -2150,23 +2150,24 @@ The following section outlines the read only data referenced by the |
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#### TMS9918 Driver: |
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| Name | Offset | Size (bytes)| Description | |
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|--------|--------|-------------|-------------| |
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| PPIA | 0 | 1 | PPI PORT A | |
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| PPIB | 1 | 1 | PPI PORT B | |
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| PPIC | 2 | 1 | PPI PORT C | |
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| PPIX | 3 | 1 | PPI CONTROL PORT | |
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| DATREG | 4 | 1 | IO PORT ADDRESS FOR MODE 0 | |
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| CMDREG | 5 | 1 | IO PORT ADDRESS FOR MODE 1 | |
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| The following are the register mirror values that HBIOS used for initialisation | |
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| REG. 0 | 6 | 1 | $00 - NO EXTERNAL VID |
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| REG. 1 | 7 | 1 | $50 or $70 - SET MODE 1 and interrupt if enabled | |
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| REG. 2 | 8 | 1 | $00 - PATTERN NAME TABLE := 0 |
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| REG. 3 | 9 | 1 | $00 - NO COLOR TABLE |
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| REG. 4 | 10 | 1 | $01 - SET PATTERN GENERATOR TABLE TO $800 |
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| REG. 5 | 11 | 1 | $00 - SPRITE ATTRIBUTE IRRELEVANT |
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| REG. 6 | 12 | 1 | $00 - NO SPRITE GENERATOR TABLE |
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| REG. 7 | 13 | 1 | $F0 - WHITE ON BLACK |
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| DCNTL* | 14 | 1 | Z180 DMA/WAIT CONTROL | |
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| **Name** | **Offset** | **Bytes** | **Description** | |
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|--------|----|----|-----------------------| |
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| PPIA | 0 | 1 | PPI PORT A | |
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| PPIB | 1 | 1 | PPI PORT B | |
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| PPIC | 2 | 1 | PPI PORT C | |
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| PPIX | 3 | 1 | PPI CONTROL PORT | |
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| DATREG | 4 | 1 | IO PORT ADDRESS FOR MODE 0 | |
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| CMDREG | 5 | 1 | IO PORT ADDRESS FOR MODE 1 | |
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| | | | _Below are the register mirror values_ | |
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| | | | _that HBIOS used for initialisation_ | |
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| REG. 0 | 6 | 1 | $00 - NO EXTERNAL VID |
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| REG. 1 | 7 | 1 | $50 or $70 - SET MODE 1 and interrupt if enabled | |
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| REG. 2 | 8 | 1 | $00 - PATTERN NAME TABLE := 0 | |
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| REG. 3 | 9 | 1 | $00 - NO COLOR TABLE | |
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| REG. 4 | 10 | 1 | $01 - SET PATTERN GENERATOR TABLE TO $800 | |
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| REG. 5 | 11 | 1 | $00 - SPRITE ATTRIBUTE IRRELEVANT | |
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| REG. 6 | 12 | 1 | $00 - NO SPRITE GENERATOR TABLE | |
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| REG. 7 | 13 | 1 | $F0 - WHITE ON BLACK | |
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| DCNTL* | 14 | 1 | Z180 DMA/WAIT CONTROL | |
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* ONLY PRESENT FOR Z180 BUILDS |
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Wayne Warthen
4 years ago