forked from MirrorRepos/RomWBW
b1ackmai1er
7 years ago
committed by
GitHub
GitHub
118 changed files with 6805 additions and 1251 deletions
@ -1,27 +1,48 @@ |
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; |
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;================================================================================================== |
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; RC2014 W/ Z180 CPU USING EXTERNAL MEMORY MANAGER -- 512K RAM/ROM MODULE |
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; RC2014 Z180 STANDARD CONFIGURATION (EXTERNAL 512K RAM/ROM BANKED MEMORY MODULE) |
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;================================================================================================== |
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; |
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; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE |
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; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS |
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; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE |
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; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS. |
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; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY |
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; YOUR FILE IN THE BUILD PROCESS. |
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; |
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; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM. |
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; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO |
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; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON |
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; SETTINGS. |
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; |
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; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE, |
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; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING |
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; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS! |
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; |
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; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO |
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; DIRECTORIES ABOVE THIS ONE). |
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; |
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#include "cfg_rcz180.asm" |
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; |
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MEMMGR .SET MM_Z2 ; 512K RAM/ROM MODULE MEM MGR |
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Z180_CLKDIV .SET 1 ; 0=OSC/2, 1=OSC, 2=OSC*2 |
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Z180_MEMWAIT .SET 0 ; MEMORY WAIT STATES (0-3) |
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Z180_IOWAIT .SET 1 ; ADD (0-3) I/O WAIT STATES ABOVE 1 W/S BUILT-IN |
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CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ |
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DEFSERCFG .SET SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) |
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; |
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MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180] |
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; |
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Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2 |
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Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3) |
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Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3) |
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; |
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CPUOSC .SET 18432000 ; CPU OSC FREQ |
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DEFSERCFG .SET SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG |
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DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) |
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; |
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ASCIENABLE .SET TRUE ; TRUE FOR Z180 ASCI SUPPORT |
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SIOENABLE .SET FALSE ; TRUE TO AUTO-DETECT ZILOG SIO/2 |
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ACIAENABLE .SET FALSE ; TRUE TO AUTO-DETECT MOTOROLA 6850 ACIA |
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ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) |
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ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) |
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SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) |
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; |
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FDENABLE .SET FALSE ; TRUE FOR FLOPPY SUPPORT |
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FDMODE .SET FDMODE_RCWDC ; FDMODE_RCSMC, FDMODE_RCWDC |
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FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) |
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FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] |
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; |
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IDEENABLE .SET TRUE ; TRUE FOR IDE DEVICE SUPPORT (CF MODULE) |
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IDEMODE .SET IDEMODE_RC ; TYPE OF CF MODULE: IDEMODE_RC, IDEMODE_SMB |
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PPIDEENABLE .SET FALSE ; TRUE FOR PPIDE DEVICE SUPPORT (PPIDE MODULE) |
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IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) |
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IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] |
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; |
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DSRTCENABLE .SET FALSE ; DS-1302 CLOCK DRIVER |
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PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) |
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|
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@ -1,26 +1,48 @@ |
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; |
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;================================================================================================== |
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; RC2014 W/ Z180 CPU USING NATIVE Z180 MEMORY MANAGER |
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; RC2014 Z180 STANDARD CONFIGURATION (NATIVE Z180 LINEAR MEMORY) |
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;================================================================================================== |
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; |
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; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE |
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; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS |
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; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE |
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; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS. |
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; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY |
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; YOUR FILE IN THE BUILD PROCESS. |
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; |
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; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM. |
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; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO |
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; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON |
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; SETTINGS. |
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; |
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; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE, |
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; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING |
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; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS! |
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; |
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; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO |
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; DIRECTORIES ABOVE THIS ONE). |
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; |
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#include "cfg_rcz180.asm" |
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; |
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Z180_CLKDIV .SET 1 ; 0=OSC/2, 1=OSC, 2=OSC*2 |
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Z180_MEMWAIT .SET 0 ; MEMORY WAIT STATES (0-3) |
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Z180_IOWAIT .SET 1 ; ADD (0-3) I/O WAIT STATES ABOVE 1 W/S BUILT-IN |
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CPUOSC .SET 18432000 ; CPU FAMILY: CPU_[Z80|Z180] |
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DEFSERCFG .SET SER_38400_8N1 ; HARDWARE BIOS: BIOS_[WBW|UNA] |
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; |
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MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180] |
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; |
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Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2 |
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Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3) |
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Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3) |
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; |
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CPUOSC .SET 18432000 ; CPU OSC FREQ |
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DEFSERCFG .SET SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG |
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DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) |
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; |
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ASCIENABLE .SET TRUE ; TRUE FOR Z180 ASCI SUPPORT |
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SIOENABLE .SET FALSE ; TRUE TO AUTO-DETECT ZILOG SIO/2 |
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ACIAENABLE .SET FALSE ; TRUE TO AUTO-DETECT MOTOROLA 6850 ACIA |
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ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) |
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ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) |
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SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) |
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; |
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FDENABLE .SET FALSE ; TRUE FOR FLOPPY SUPPORT |
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FDMODE .SET FDMODE_RCWDC ; FDMODE_RCSMC, FDMODE_RCWDC |
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FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) |
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FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] |
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; |
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IDEENABLE .SET TRUE ; TRUE FOR IDE DEVICE SUPPORT (CF MODULE) |
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IDEMODE .SET IDEMODE_RC ; TYPE OF CF MODULE: IDEMODE_RC, IDEMODE_SMB |
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PPIDEENABLE .SET FALSE ; TRUE FOR PPIDE DEVICE SUPPORT (PPIDE MODULE) |
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IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) |
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IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] |
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; |
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DSRTCENABLE .SET FALSE ; DS-1302 CLOCK DRIVER |
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PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) |
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|
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@ -1,21 +1,41 @@ |
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; |
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;================================================================================================== |
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; RC2014 STANDARD CONFIGURATION |
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; RC2014 Z80 STANDARD CONFIGURATION |
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;================================================================================================== |
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; |
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; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE |
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; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS |
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; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE |
|||
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS. |
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; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY |
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; YOUR FILE IN THE BUILD PROCESS. |
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; |
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; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM. |
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; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO |
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; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON |
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; SETTINGS. |
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; |
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; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE, |
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; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING |
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; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS! |
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; |
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; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO |
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; DIRECTORIES ABOVE THIS ONE). |
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; |
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#include "cfg_rcz80.asm" |
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; |
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CPUOSC .SET 7372800 ; CPU OSC FREQ |
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DEFSERCFG .SET SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE) |
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CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ |
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DEFSERCFG .SET SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) |
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; |
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DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) |
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; |
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SIOENABLE .SET TRUE ; TRUE TO AUTO-DETECT ZILOG SIO/2 |
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ACIAENABLE .SET TRUE ; TRUE TO AUTO-DETECT MOTOROLA 6850 ACIA |
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ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) |
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SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) |
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; |
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FDENABLE .SET FALSE ; TRUE FOR FLOPPY SUPPORT |
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FDMODE .SET FDMODE_RCWDC ; FDMODE_RCSMC, FDMODE_RCWDC |
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FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) |
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FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] |
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; |
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IDEENABLE .SET TRUE ; TRUE FOR IDE DEVICE SUPPORT (CF MODULE) |
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IDEMODE .SET IDEMODE_RC ; TYPE OF CF MODULE: IDEMODE_RC, IDEMODE_SMB |
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PPIDEENABLE .SET FALSE ; TRUE FOR PPIDE DEVICE SUPPORT (PPIDE MODULE) |
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IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) |
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IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] |
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; |
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DSRTCENABLE .SET FALSE ; DS-1302 CLOCK DRIVER |
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PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) |
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|
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@ -1,29 +1,46 @@ |
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; |
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;================================================================================================== |
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; SC126 |
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; SC126 STANDARD CONFIGURATION |
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;================================================================================================== |
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; |
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; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE |
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; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS |
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; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE |
|||
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS. |
|||
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY |
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; YOUR FILE IN THE BUILD PROCESS. |
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; |
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; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM. |
|||
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO |
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; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON |
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; SETTINGS. |
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; |
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; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE, |
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; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING |
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; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS! |
|||
; |
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; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO |
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; DIRECTORIES ABOVE THIS ONE). |
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; |
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#include "cfg_sc126.asm" |
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; |
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Z180_CLKDIV .SET 1 ; 0=OSC/2, 1=OSC, 2=OSC*2 |
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Z180_MEMWAIT .SET 0 ; MEMORY WAIT STATES (0-3) |
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Z180_IOWAIT .SET 1 ; ADD (0-3) I/O WAIT STATES ABOVE 1 W/S BUILT-IN |
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CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ |
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DEFSERCFG .SET SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) |
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; |
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Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2 |
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Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3) |
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Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3) |
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; |
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CPUOSC .SET 18432000 ; CPU OSC FREQ |
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DEFSERCFG .SET SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG |
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ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) |
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ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) |
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SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) |
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; |
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ASCIENABLE .SET TRUE ; TRUE FOR Z180 ASCI SUPPORT |
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SIOENABLE .SET FALSE ; TRUE TO AUTO-DETECT ZILOG SIO/2 |
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ACIAENABLE .SET FALSE ; TRUE TO AUTO-DETECT MOTOROLA 6850 ACIA |
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FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) |
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FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] |
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; |
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FDENABLE .SET FALSE ; TRUE FOR FLOPPY SUPPORT |
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FDMODE .SET FDMODE_RCWDC ; FDMODE_RCSMC, FDMODE_RCWDC |
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IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) |
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IDEMODE .SET IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] |
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; |
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IDEENABLE .SET TRUE ; TRUE FOR IDE DEVICE SUPPORT (CF MODULE) |
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IDEMODE .SET IDEMODE_RC ; TYPE OF CF MODULE: IDEMODE_RC, IDEMODE_SMB |
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PPIDEENABLE .SET FALSE ; TRUE FOR PPIDE DEVICE SUPPORT (PPIDE MODULE) |
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PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) |
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; |
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SDENABLE .SET TRUE ; TRUE FOR SD SUPPORT |
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SDMODE .SET SDMODE_SC126 ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD |
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SDTRACE .SET 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) |
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SDCSIOFAST .SET TRUE ; TABLE-DRIVEN BIT INVERTER |
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SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) |
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|
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@ -0,0 +1,182 @@ |
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; |
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;================================================================================================== |
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; ROMWBW 2.X CONFIGURATION MASTER |
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;================================================================================================== |
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; |
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; THIS FILE IS *NOT* A REAL CONFIGURATION FILE. IT IS A MASTER TEMPLATE FILE |
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; CONTAINING ALL POSSIBLE CONFIGURATION SETTINGS ACROSS ALL PLATFORMS. IT IS |
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; USED ONLY AS A REFERENCE TO HELP MANAGE THE FULL SET OF POSSIBLE SETTINGS AND |
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; KEEP THINGS CONSISTENT. |
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; |
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#DEFINE PLATFORM_NAME "ROMWBW" |
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; |
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PLATFORM .EQU PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SC126] |
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CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180] |
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BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] |
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; |
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BOOTTYPE .EQU BT_MENU ; BT_[MENU|AUTO], IF AUTO, BOOT DEFAULT AFTER TIMEOUT |
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BOOT_TIMEOUT .EQU 20 ; AUTO BOOT TIMEOUT IN SECONDS, 0 FOR IMMEDIATE BOOT |
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BOOT_DEFAULT .EQU 'Z' ; AUTO BOOT SELECTION TO INVOKE AT TIMEOUT |
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; |
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CPUOSC .EQU 8000000 ; CPU OSC FREQ IN MHZ |
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INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2 |
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DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) |
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; |
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RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) |
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MEMMGR .EQU MM_NONE ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180] |
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RAMBIAS .EQU 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE |
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MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY) |
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MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY) |
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MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) |
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MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) |
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MPGSEL_2 .EQU $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY) |
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MPGSEL_3 .EQU $7B ; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY) |
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MPGENA .EQU $7C ; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY) |
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; |
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Z180_BASE .EQU $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS |
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Z180_CLKDIV .EQU 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2 |
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Z180_MEMWAIT .EQU 0 ; Z180: MEMORY WAIT STATES (0-3) |
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Z180_IOWAIT .EQU 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3) |
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; |
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N8_PPI0 .EQU $80 ; N8: FIRST PARALLEL PORT REGISTERS BASE ADR |
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N8_PPI1 .EQU $84 ; N8: SECOND PARALLEL PORT REGISTERS BASE ADR |
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N8_RTC .EQU $88 ; N8: RTC LATCH REGISTER ADR |
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N8_ACR .EQU $94 ; N8: AUXILLARY CONTROL REGISTER (ACR) ADR |
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N8_RMAP .EQU $96 ; N8: ROM PAGE REGISTER ADR |
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N8_DEFACR .EQU $1B ; N8: AUX CTL REGISTER DEFAULT VALUE (QUIESCIENT STATE) |
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; |
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MK4_IDE .EQU $80 ; MK4: IDE REGISTERS BASE ADR |
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MK4_XAR .EQU $88 ; MK4: EXTERNAL ADDRESS REGISTER (XAR) ADR |
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MK4_SD .EQU $89 ; MK4: SD CARD CONTROL REGISTER ADR |
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MK4_RTC .EQU $8A ; MK4: RTC LATCH REGISTER ADR |
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; |
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RTC .EQU $70 ; RTC LATCH REGISTER ADR |
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WDOG .EQU $6F ; WATCHDOG REGISTER ADR |
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PPIBASE .EQU $60 ; PRIMARY PARALLEL PORT REGISTERS BASE ADR |
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; |
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CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT |
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CTCBASE .EQU $20 ; CTC BASE I/O ADDRESS |
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; |
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DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT |
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DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS |
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; |
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DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE) |
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; |
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CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP |
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VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI] |
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ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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PPKTRACE .EQU 1 ; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE] |
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KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] |
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; |
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HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT |
|||
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM) |
|||
; |
|||
DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) |
|||
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] |
|||
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) |
|||
; |
|||
UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) |
|||
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ |
|||
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART |
|||
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART |
|||
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART |
|||
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART |
|||
; |
|||
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) |
|||
; |
|||
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) |
|||
ACIADEBUG .EQU FALSE ; ACIA: ENABLE DEBUG OUTPUT |
|||
ACIACNT .EQU 1 ; ACIA: NUMBER OF CHIPS TO DETECT (1-2) |
|||
ACIA0BASE .EQU $80 ; ACIA 0: REGISTERS BASE ADR |
|||
ACIA0CLK .EQU CPUOSC ; ACIA 0: OSC FREQ IN HZ |
|||
ACIA0DIV .EQU 1 ; ACIA 0: SERIAL CLOCK DIVIDER |
|||
ACIA0CFG .EQU DEFSERCFG ; ACIA 0: SERIAL LINE CONFIG (SEE STD.ASM) |
|||
ACIA1BASE .EQU $40 ; ACIA 1: REGISTERS BASE ADR |
|||
ACIA1CLK .EQU CPUOSC ; ACIA 1: OSC FREQ IN HZ |
|||
ACIA1DIV .EQU 1 ; ACIA 1: SERIAL CLOCK DIVIDER |
|||
ACIA1CFG .EQU DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM) |
|||
; |
|||
SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) |
|||
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT |
|||
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP |
|||
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] |
|||
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR |
|||
SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
|||
SIO0ADIV .EQU 1 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) |
|||
SIO0ACFG .EQU DEFSERCFG ; AIO 0A: SERIAL LINE CONFIG |
|||
SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
|||
SIO0BDIV .EQU 1 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) |
|||
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG |
|||
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] |
|||
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR |
|||
SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
|||
SIO1ADIV .EQU 1 ; SIO 1A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) |
|||
SIO1ACFG .EQU DEFSERCFG ; AIO 1A: SERIAL LINE CONFIG |
|||
SIO1BCLK .EQU CPUOSC ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
|||
SIO1BDIV .EQU 1 ; SIO 1B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) |
|||
SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG |
|||
; |
|||
VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) |
|||
VDUSIZ .EQU V80X25 ; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30] |
|||
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) |
|||
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM) |
|||
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) |
|||
TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG/N8] |
|||
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) |
|||
; |
|||
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) |
|||
; |
|||
AYENABLE .EQU FALSE ; AY: ENABLE AY PSG SOUND DRIVER |
|||
AYMODE .EQU AYMODE_NONE ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180] |
|||
; |
|||
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) |
|||
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|||
; |
|||
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) |
|||
FDMODE .EQU FDMODE_NONE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] |
|||
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL) |
|||
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111] |
|||
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111] |
|||
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS |
|||
; |
|||
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER |
|||
RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-2) |
|||
; |
|||
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) |
|||
IDEMODE .EQU IDEMODE_NONE ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] |
|||
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|||
IDE8BIT .EQU FALSE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY) |
|||
; |
|||
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) |
|||
PPIDEMODE .EQU PPIDEMODE_NONE ; PPIDE: DRIVER MODE: PPIDEMODE_[SBC|DIO3|MFP|N8|RC] |
|||
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|||
PPIDE8BIT .EQU FALSE ; PPIDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY) |
|||
; |
|||
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) |
|||
SDMODE .EQU SDMODE_NONE ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC126] |
|||
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|||
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE |
|||
; |
|||
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) |
|||
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT |
|||
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|||
PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT |
|||
; |
|||
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM) |
|||
PPPSDENABLE .EQU TRUE ; PPP: ENABLE PPP DRIVER SD CARD SUPPORT |
|||
PPPSDTRACE .EQU 1 ; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|||
PPPCONENABLE .EQU TRUE ; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT |
|||
; |
|||
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM) |
|||
HDSKTRACE .EQU 1 ; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|||
; |
|||
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD |
|||
PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD |
|||
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) |
|||
PIOZBASE .EQU $88 ; PIO: PIO REGISTERS BASE ADR FOR ECB ZP BOARD |
|||
PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP |
|||
; |
|||
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) |
|||
UFBASE .EQU $0C ; UF: REGISTERS BASE ADR |
|||
@ -1,122 +1,140 @@ |
|||
; |
|||
;================================================================================================== |
|||
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RC2014 |
|||
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RC2014 Z80 |
|||
;================================================================================================== |
|||
; |
|||
; BUILD CONFIGURATION OPTIONS |
|||
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM |
|||
; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. INSTEAD, YOU SHOULD |
|||
; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY |
|||
; UNDER THIS DIRECTORY. |
|||
; |
|||
CPUOSC .EQU 7372800 ; CPU OSC FREQ |
|||
MEMMGR .EQU MM_Z2 ; MM_NONE, MM_SBC, MM_Z2, MM_N8, MM_Z180 |
|||
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! |
|||
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE) |
|||
INTMODE .EQU 1 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2 |
|||
DIAGENABLE .EQU TRUE ; TRUE FOR DIAGNOSTIC CODE PORT OUTPUT |
|||
; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS |
|||
; FOR THE PLATFORM. |
|||
; |
|||
#DEFINE PLATFORM_NAME "RC2014" |
|||
; |
|||
PLATFORM .EQU PLT_RCZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SC126] |
|||
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180] |
|||
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] |
|||
; |
|||
BOOTTYPE .EQU BT_MENU ; BT_[MENU|AUTO], IF AUTO, BOOT DEFAULT AFTER TIMEOUT |
|||
BOOT_TIMEOUT .EQU 20 ; AUTO BOOT TIMEOUT IN SECONDS, 0 FOR IMMEDIATE BOOT |
|||
BOOT_DEFAULT .EQU 'Z' ; AUTO BOOT SELECTION TO INVOKE AT TIMEOUT |
|||
; |
|||
CPUOSC .EQU 7372800 ; CPU OSC FREQ IN MHZ |
|||
INTMODE .EQU 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2 |
|||
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) |
|||
; |
|||
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) |
|||
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180] |
|||
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY) |
|||
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY) |
|||
MPGSEL_2 .EQU $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY) |
|||
MPGSEL_3 .EQU $7B ; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY) |
|||
MPGENA .EQU $7C ; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY) |
|||
; |
|||
RTC .EQU $C0 ; RTC LATCH REGISTER ADR |
|||
; |
|||
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT |
|||
; |
|||
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT |
|||
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS |
|||
; |
|||
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP |
|||
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) |
|||
; |
|||
DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) |
|||
; |
|||
HTIMENABLE .EQU FALSE ; TRUE FOR SIMH TIMER SUPPORT |
|||
SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER |
|||
DSRTCENABLE .EQU FALSE ; DS-1302 CLOCK DRIVER |
|||
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC |
|||
DSRTCCHG .EQU FALSE ; DS-1302 CONFIGURE CHARGE ON (TRUE) OR OFF (FALSE) |
|||
; |
|||
ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT |
|||
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) |
|||
UARTOSC .EQU 1843200 ; UART OSC FREQUENCY |
|||
; |
|||
ACIAENABLE .EQU TRUE ; TRUE FOR MOTOROLA 6850 ACIA SUPPORT |
|||
ACIADEBUG .EQU FALSE ; PS |
|||
ACIACNT .EQU 1 ; 1 OR 2 ACIA CHIPS |
|||
ACIA0MODE .EQU ACIAMODE_RC ; TYPE OF FIRST ACIA TO DETECT: SIOMODE_RC |
|||
ACIA0BASE .EQU $80 ; IO PORT ADDRESS BASE FOR FIRST ACIA CHIP |
|||
ACIA0CLK .EQU CPUOSC ; 7372800 - ACIA FIXED OSC FREQUENCY |
|||
ACIA0DIV .EQU 1 ; 1=RC2014 |
|||
ACIA0CFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG |
|||
ACIA1MODE .EQU ACIAMODE_RC ; TYPE OF SECOND ACIA TO DETECT: SIOMODE_RC |
|||
ACIA1BASE .EQU $40 ; IO PORT ADDRESS BASE FOR SECOND ACIA CHIP |
|||
ACIA1CLK .EQU CPUOSC ; 7372800 - ACIA FIXED OSC FREQUENCY |
|||
ACIA1DIV .EQU 1 ; 1=RC2014 |
|||
ACIA1CFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG |
|||
; |
|||
SIOENABLE .EQU TRUE ; TRUE FOR ZILOG SIO SUPPORT |
|||
SIODEBUG .EQU FALSE ; PS |
|||
SIOCNT .EQU 2 ; 1 OR 2 SIO CHIPS (EACH CHIP HAS 2 CHANNELS) |
|||
SIO0MODE .EQU SIOMODE_RC ; TYPE OF FIRST SIO TO DETECT: SIOMODE_RC/SMB/ZP/EZZ80 |
|||
SIO0BASE .EQU $80 ; IO PORT ADDRESS BASE FOR FIRST SIO CHIP |
|||
SIO0ACLK .EQU CPUOSC ; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY |
|||
SIO0ADIV .EQU 1 ; 1=RC2014/SMB, 2/4/8/16/32/64/128/256=ZP depending on jumper X5 |
|||
SIO0ACFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG |
|||
SIO0BCLK .EQU CPUOSC ; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY |
|||
SIO0BDIV .EQU 1 ; 1=RC2014/SMB, 2/4/8/16/32/64/128/256=ZP depending on jumper X5 |
|||
SIO0BCFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG |
|||
SIO1MODE .EQU SIOMODE_RC ; TYPE OF SECOND SIO TO DETECT: SIOMODE_RC, SIOMODE_SMB |
|||
SIO1BASE .EQU $84 ; IO PORT ADDRESS BASE FOR SECOND SIO CHIP |
|||
SIO1ACLK .EQU CPUOSC ; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY |
|||
SIO1ADIV .EQU 1 ; 1=RC2014/SMB, 2/4/8/16/32/64/128/256=ZP depending on jumper X5 |
|||
SIO1ACFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG |
|||
SIO1BCLK .EQU CPUOSC ; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY |
|||
SIO1BDIV .EQU 1 ; 1=RC2014/SMB, 2/4/8/16/32/64/128/256=ZP depending on jumper X5 |
|||
SIO1BCFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG |
|||
; |
|||
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT |
|||
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT |
|||
NECENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT |
|||
TMSENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT |
|||
VGAENABLE .EQU FALSE ; TRUE FOR VGA VIDEO/KBD SUPPORT |
|||
; |
|||
SPKENABLE .EQU FALSE ; TRUE FOR RTC LATCH IOBIT SOUND |
|||
AYENABLE .EQU FALSE ; TRUE FOR AY PSG SOUND |
|||
AYMODE .EQU AYMODE_RCZ80 ; AYMODE_[SCG/N8/RCZ80/RCZ180] |
|||
; |
|||
MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) |
|||
MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) |
|||
; |
|||
FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT |
|||
FDMODE .EQU FDMODE_RCWDC ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3 |
|||
FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE) |
|||
FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE) |
|||
FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE) |
|||
FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY |
|||
; |
|||
RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT |
|||
; |
|||
IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT |
|||
IDEMODE .EQU IDEMODE_RC ; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_RC |
|||
IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) |
|||
IDE8BIT .EQU TRUE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) |
|||
; |
|||
PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) |
|||
PPIDEMODE .EQU PPIDEMODE_RC ; PPIDEMODE_SBC, PPPIDEMODE_DIO3, PPIDEMODE_MFP, PPIDEMODE_N8, PPIDEMODE_RC |
|||
PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) |
|||
PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) |
|||
; |
|||
SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT |
|||
SDMODE .EQU SDMODE_PPI ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD |
|||
SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) |
|||
SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER |
|||
; |
|||
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SUPPORT |
|||
; |
|||
PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT |
|||
PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT |
|||
PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE) |
|||
PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO) |
|||
; |
|||
HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT |
|||
; |
|||
TERMENABLE .EQU FALSE ; TERM PSEUDO DEVICE, WILL BE ENABLED IF A VDA IS ENABLED |
|||
; |
|||
BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) |
|||
BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE |
|||
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT |
|||
; |
|||
PIO_4P .EQU FALSE ; TRUE FOR ECB-4PIO PIO SUPPORT |
|||
PIO_ZP .EQU FALSE ; TRUE FOR ECB-ZILOG PERIPHERALS BOARD |
|||
PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE) |
|||
; |
|||
UFENABLE .EQU FALSE ; TRUE FOR ECB USB-FIFO SUPPORT |
|||
|
|||
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE) |
|||
; |
|||
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP |
|||
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI] |
|||
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|||
; |
|||
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT |
|||
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM) |
|||
; |
|||
DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) |
|||
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] |
|||
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) |
|||
; |
|||
UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) |
|||
; |
|||
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) |
|||
; |
|||
ACIAENABLE .EQU TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) |
|||
ACIADEBUG .EQU FALSE ; ACIA: ENABLE DEBUG OUTPUT |
|||
ACIACNT .EQU 1 ; ACIA: NUMBER OF CHIPS TO DETECT (1-2) |
|||
ACIA0BASE .EQU $80 ; ACIA 0: REGISTERS BASE ADR |
|||
ACIA0CLK .EQU CPUOSC ; ACIA 0: OSC FREQ IN HZ |
|||
ACIA0DIV .EQU 1 ; ACIA 0: SERIAL CLOCK DIVIDER |
|||
ACIA0CFG .EQU DEFSERCFG ; ACIA 0: SERIAL LINE CONFIG (SEE STD.ASM) |
|||
ACIA1BASE .EQU $40 ; ACIA 1: REGISTERS BASE ADR |
|||
ACIA1CLK .EQU CPUOSC ; ACIA 1: OSC FREQ IN HZ |
|||
ACIA1DIV .EQU 1 ; ACIA 1: SERIAL CLOCK DIVIDER |
|||
ACIA1CFG .EQU DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM) |
|||
; |
|||
SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) |
|||
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT |
|||
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP |
|||
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] |
|||
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR |
|||
SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
|||
SIO0ADIV .EQU 1 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) |
|||
SIO0ACFG .EQU DEFSERCFG ; AIO 0A: SERIAL LINE CONFIG |
|||
SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
|||
SIO0BDIV .EQU 1 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) |
|||
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG |
|||
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80] |
|||
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR |
|||
SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
|||
SIO1ADIV .EQU 1 ; SIO 1A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) |
|||
SIO1ACFG .EQU DEFSERCFG ; AIO 1A: SERIAL LINE CONFIG |
|||
SIO1BCLK .EQU CPUOSC ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
|||
SIO1BDIV .EQU 1 ; SIO 1B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5) |
|||
SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG |
|||
; |
|||
VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) |
|||
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) |
|||
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM) |
|||
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) |
|||
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) |
|||
; |
|||
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) |
|||
; |
|||
AYENABLE .EQU FALSE ; AY: ENABLE AY PSG SOUND DRIVER |
|||
AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180] |
|||
; |
|||
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) |
|||
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|||
; |
|||
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) |
|||
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3] |
|||
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL) |
|||
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111] |
|||
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111] |
|||
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS |
|||
; |
|||
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER |
|||
; |
|||
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) |
|||
IDEMODE .EQU IDEMODE_RC ; IDE: DRIVER MODE: IDEMODE_[DIO|DIDE] |
|||
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|||
IDE8BIT .EQU TRUE ; IDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY) |
|||
; |
|||
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) |
|||
PPIDEMODE .EQU PPIDEMODE_RC ; PPIDE: DRIVER MODE: PPIDEMODE_[SBC|DIO3|MFP|N8|RC] |
|||
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|||
PPIDE8BIT .EQU FALSE ; PPIDE: USE 8-BIT TRANSFERS (CF CARDS MOSTLY) |
|||
; |
|||
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) |
|||
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC126] |
|||
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
|||
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE |
|||
; |
|||
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) |
|||
; |
|||
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM) |
|||
; |
|||
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM) |
|||
; |
|||
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD |
|||
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) |
|||
PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP |
|||
; |
|||
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) |
|||
|
|||
@ -1,20 +0,0 @@ |
|||
; |
|||
; EASY Z80 HARDWARE DEFINITIONS |
|||
; |
|||
#DEFINE PLATFORM_NAME "EASYZ80" |
|||
; |
|||
MPGSEL_0 .EQU $78 ; BANK_0 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_1 .EQU $79 ; BANK_1 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_2 .EQU $7A ; BANK_2 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_3 .EQU $7B ; BANK_3 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGENA .EQU $7C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY) |
|||
; |
|||
RTC .EQU $C0 ; RTC PORT address |
|||
; |
|||
WDOG .EQU $6F ; WATCHDOG |
|||
; |
|||
CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS |
|||
CTCA .EQU CTCBASE + 0 ; CTC CHANNEL A |
|||
CTCB .EQU CTCBASE + 1 ; CTC CHANNEL B |
|||
CTCC .EQU CTCBASE + 2 ; CTC CHANNEL C |
|||
CTCD .EQU CTCBASE + 3 ; CTC CHANNEL D |
|||
@ -1,22 +0,0 @@ |
|||
; |
|||
; MARK IV HARDWARE DEFINITIONS |
|||
; |
|||
#DEFINE PLATFORM_NAME "MARK IV" |
|||
; |
|||
RAMBIAS .EQU 512 ; RAM STARTS AT 512K |
|||
; |
|||
MK4_BASE .EQU $80 ; I/O BASE ADDRESS FOR ONBOARD PERIPHERALS |
|||
; |
|||
MK4_IDE .EQU MK4_BASE + $00 ; IDE REGISTERS ($00-$07, $0E-$0F) |
|||
MK4_XAR .EQU MK4_BASE + $08 ; EXTERNAL ADDRESS REGISTER (XAR) |
|||
MK4_SD .EQU MK4_BASE + $09 ; SD CARD CONTROL REGISTER |
|||
MK4_RTC .EQU MK4_BASE + $0A ; RTC INTERFACE REGISTER |
|||
; |
|||
RTC .EQU MK4_RTC ; GENERIC ALIAS FOR RTC PORT |
|||
; |
|||
Z180_BASE .EQU $40 ; I/O BASE ADDRESS FOR INTERNAL Z180 REGISTERS |
|||
; |
|||
; |
|||
FIFO_BASE .EQU $0C ; ECB USB-FIFO DEFAULT PORT |
|||
; |
|||
#INCLUDE "z180.inc" |
|||
@ -1,28 +0,0 @@ |
|||
; |
|||
; N8 HARDWARE DEFINITIONS |
|||
; |
|||
#DEFINE PLATFORM_NAME "N8" |
|||
; |
|||
RAMBIAS .EQU 0 ; RAM STARTS AT 0K |
|||
; |
|||
N8_BASE .EQU $80 ; I/O BASE ADDRESS FOR ONBOARD PERIPHERALS |
|||
; |
|||
N8_PPI0 .EQU N8_BASE + $00 ; FIRST PARALLEL PORT |
|||
N8_PPI1 .EQU N8_BASE + $04 ; SECOND PARALLEL PORT |
|||
N8_RTC .EQU N8_BASE + $08 ; RTC LATCH AND BUFFER |
|||
N8_FDC .EQU N8_BASE + $0C ; FLOPPY DISK CONTROLLER |
|||
N8_UTIL .EQU N8_BASE + $10 ; FLOPPY DISK UTILITY |
|||
N8_ACR .EQU N8_BASE + $14 ; AUXILLARY CONTROL REGISTER |
|||
N8_RMAP .EQU N8_BASE + $16 ; ROM PAGE REGISTER |
|||
N8_VDP .EQU N8_BASE + $18 ; VIDEO DISPLAY PROCESSOR (TMS9918A) |
|||
N8_PSG .EQU N8_BASE + $1C ; PROGRAMMABLE SOUND GENERATOR (AY-3-8910) |
|||
; |
|||
N8_DEFACR .EQU $1B ; DEFAULT VALUE FOR ACR REGISTER |
|||
; |
|||
RTC .EQU N8_RTC ; GENERIC ALIAS FOR RTC PORT |
|||
PPIBASE .EQU N8_PPI0 ; GENERIC ALIAS FOR PRIMARY PARALLEL PORT |
|||
; |
|||
FIFO_BASE .EQU $0C ; ECB USB-FIFO DEFAULT PORT |
|||
; |
|||
Z180_BASE .EQU $40 ; I/O BASE ADDRESS FOR INTERNAL Z180 REGISTERS |
|||
#INCLUDE "z180.inc" |
|||
@ -1,18 +0,0 @@ |
|||
; |
|||
; RC2014 Z180 HARDWARE DEFINITIONS |
|||
; |
|||
#DEFINE PLATFORM_NAME "RC2014" |
|||
; |
|||
RAMBIAS .EQU 512 ; RAM STARTS AT 512K |
|||
; |
|||
MPGSEL_0 .EQU $78 ; BANK_0 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_1 .EQU $79 ; BANK_1 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_2 .EQU $7A ; BANK_2 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_3 .EQU $7B ; BANK_3 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGENA .EQU $7C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY) |
|||
; |
|||
RTC .EQU $0C ; ADDRESS OF RTC LATCH AND INPUT PORT |
|||
; |
|||
Z180_BASE .EQU $C0 ; I/O BASE ADDRESS FOR INTERNAL Z180 REGISTERS |
|||
; |
|||
#INCLUDE "z180.inc" |
|||
@ -1,12 +0,0 @@ |
|||
; |
|||
; RC2014 HARDWARE DEFINITIONS |
|||
; |
|||
#DEFINE PLATFORM_NAME "RC2014" |
|||
; |
|||
MPGSEL_0 .EQU $78 ; BANK_0 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_1 .EQU $79 ; BANK_1 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_2 .EQU $7A ; BANK_2 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_3 .EQU $7B ; BANK_3 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGENA .EQU $7C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY) |
|||
; |
|||
RTC .EQU $C0 ; RTC PORT address |
|||
@ -1,28 +0,0 @@ |
|||
; |
|||
; SBC HARDWARE DEFINITIONS |
|||
; |
|||
#DEFINE PLATFORM_NAME "SBC" |
|||
; |
|||
SBC_BASE .EQU $60 ; I/O BASE ADDRESS FOR ONBOARD PERIPHERALS |
|||
; |
|||
#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_ZETA)) |
|||
; BIT 7 OF MPCL_ROM SELECTS ROM/RAM (0=ROM, 1=RAM) |
|||
MPCL_RAM .EQU SBC_BASE + $18 ; MEMORY PAGER CONFIG LATCH - RAM (WRITE ONLY) |
|||
MPCL_ROM .EQU SBC_BASE + $1C ; MEMORY PAGER CONFIG LATCH - ROM (WRITE ONLY) |
|||
#ENDIF |
|||
; |
|||
#IF (PLATFORM == PLT_ZETA2) |
|||
MPGSEL_0 .EQU SBC_BASE + $18 ; BANK_0 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_1 .EQU SBC_BASE + $19 ; BANK_1 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_2 .EQU SBC_BASE + $1A ; BANK_2 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_3 .EQU SBC_BASE + $1B ; BANK_3 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGENA .EQU SBC_BASE + $1C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY) |
|||
#ENDIF |
|||
; |
|||
RTC .EQU SBC_BASE + $10 ; ADDRESS OF RTC LATCH AND INPUT PORT |
|||
PPIBASE .EQU SBC_BASE + $00 ; PPI 82C55 I/O IS DECODED TO PORT 60-67 |
|||
PIOZBASE .EQU $88 ; ZILOG PERIPHERALS DEFAULT PIO DEFAULT |
|||
PIO4BASE .EQU $90 ; ECB-4PIO DEFAULT PIO DEFAULT |
|||
; |
|||
; |
|||
FIFO_BASE .EQU $0C ; ECB USB-FIFO DEFAULT PORT |
|||
@ -1,12 +0,0 @@ |
|||
; |
|||
; SC126 Z180 HARDWARE DEFINITIONS |
|||
; |
|||
#DEFINE PLATFORM_NAME "SC126" |
|||
; |
|||
RAMBIAS .EQU 512 ; RAM STARTS AT 512K |
|||
; |
|||
RTC .EQU $0C ; ADDRESS OF RTC LATCH AND INPUT PORT |
|||
; |
|||
Z180_BASE .EQU $C0 ; I/O BASE ADDRESS FOR INTERNAL Z180 REGISTERS |
|||
; |
|||
#INCLUDE "z180.inc" |
|||
@ -1,4 +0,0 @@ |
|||
; |
|||
; UNA HARDWARE DEFINITIONS |
|||
; |
|||
#DEFINE PLATFORM_NAME "UNA" |
|||
@ -1,14 +0,0 @@ |
|||
; |
|||
; ZETA HARDWARE DEFINITIONS |
|||
; |
|||
; |
|||
#DEFINE PLATFORM_NAME "ZETA" |
|||
; |
|||
SBC_BASE .EQU $60 ; I/O BASE ADDRESS FOR ONBOARD PERIPHERALS |
|||
; |
|||
; BIT 7 OF MPCL_ROM SELECTS ROM/RAM (0=ROM, 1=RAM) |
|||
MPCL_RAM .EQU SBC_BASE + $18 ; MEMORY PAGER CONFIG LATCH - RAM (WRITE ONLY) |
|||
MPCL_ROM .EQU SBC_BASE + $1C ; MEMORY PAGER CONFIG LATCH - ROM (WRITE ONLY) |
|||
; |
|||
RTC .EQU SBC_BASE + $10 ; ADDRESS OF RTC LATCH AND INPUT PORT |
|||
PPIBASE .EQU SBC_BASE + $00 ; PPI 82C55 I/O IS DECODED TO PORT 60-67 |
|||
@ -1,21 +0,0 @@ |
|||
; |
|||
; ZETA 2 HARDWARE DEFINITIONS |
|||
; |
|||
#DEFINE PLATFORM_NAME "ZETA V2" |
|||
; |
|||
SBC_BASE .EQU $60 ; I/O BASE ADDRESS FOR ONBOARD PERIPHERALS |
|||
; |
|||
MPGSEL_0 .EQU SBC_BASE + $18 ; BANK_0 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_1 .EQU SBC_BASE + $19 ; BANK_1 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_2 .EQU SBC_BASE + $1A ; BANK_2 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGSEL_3 .EQU SBC_BASE + $1B ; BANK_3 PAGE SELECT REGISTER (WRITE ONLY) |
|||
MPGENA .EQU SBC_BASE + $1C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY) |
|||
; |
|||
RTC .EQU SBC_BASE + $10 ; ADDRESS OF RTC LATCH AND INPUT PORT |
|||
PPIBASE .EQU SBC_BASE + $00 ; PPI 82C55 I/O IS DECODED TO PORT 60-67 |
|||
; |
|||
CTCBASE .EQU $20 ; CTC BASE I/O ADDRESS |
|||
CTCA .EQU CTCBASE + 0 ; CTC CHANNEL A |
|||
CTCB .EQU CTCBASE + 1 ; CTC CHANNEL B |
|||
CTCC .EQU CTCBASE + 2 ; CTC CHANNEL C |
|||
CTCD .EQU CTCBASE + 3 ; CTC CHANNEL D |
|||
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@ -0,0 +1,39 @@ |
|||
CP/M 3 |
|||
====== |
|||
|
|||
This archive contains an almost complete build of CP/M 3. |
|||
|
|||
If you have the source distribution, the file MAKING.DOC explains how to |
|||
set up the build environment on your computer. |
|||
|
|||
Differences from Digital Research CP/M 3 |
|||
======================================== |
|||
|
|||
All the CP/M 3 patches described in the document CPM3FIX.PAT have been |
|||
applied to the source code, except those to INITDIR. Patches 1-18 (except |
|||
nos. 5 and 9) were applied. |
|||
|
|||
CP/M 3 is now fully Year 2000 compliant. This affects the programs |
|||
DATE.COM, DIR.COM and SHOW.COM. |
|||
|
|||
Dates can be displayed in US, UK or Year-Month-Day format. This is set by |
|||
SETDEF: |
|||
|
|||
SETDEF [US] |
|||
SETDEF [UK] |
|||
SETDEF [YMD] respectively. |
|||
|
|||
The CCP has a further bug fix: A command sequence such as: |
|||
|
|||
C1 |
|||
:C2 |
|||
:C3 |
|||
|
|||
will now not execute the command C3 if the command C1 failed. |
|||
|
|||
What's missing? |
|||
=============== |
|||
INITDIR.COM - because it is written in PL/I and I can't make the |
|||
PL/I compiler at <http://cdl.uta.edu/cpm> compile it. |
|||
Apparently a more recent version of the compiler is |
|||
required. |
|||
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@ -0,0 +1,2 @@ |
|||
Thió ió chapteò 1. |
|||
|
|||
@ -0,0 +1,2 @@ |
|||
Thió ió chapteò 2. |
|||
|
|||
@ -0,0 +1,2 @@ |
|||
Thió ió chapteò 3. |
|||
|
|||
@ -0,0 +1,74 @@ |
|||
Trið Diary |
|||
|
|||
Septembeò 10 |
|||
|
|||
Whaô á wonderfuì citù Londoî is¡ We'vå beeî herå twï dayó anä � |
|||
havå beeî literallù runninç froí onå touò tï another® We'rå � |
|||
prettù exhausted¬ anä looë ferwarä tï explorinç á fe÷ sightó oî � |
|||
ouò own. |
|||
|
|||
Thió morninç wå tooë á touò thaô begaî aô Trafalgaò Square® Wå � |
|||
tooë thå undergrounä (theiò worä foò subway© froí ouò hotel® � |
|||
We'vå founä thå Londoî undergrounä tï bå á greaô waù tï geô � |
|||
arounä anä lesó costlù thaî taxis® Wå haä á whirlwinä touò � |
|||
seeinç Parliament¬ thå Toweò oæ London¬ Toweò Bridge¬ anä thå � |
|||
changinç oæ thå guarä aô thå palace® Mosô impressivå werå thå � |
|||
crowî jeweló iî thå Toweò oæ London. |
|||
|
|||
Wå havå beiî tourinç sï mucè thaô thió afternoon¬ wå decideä tï � |
|||
dï á littlå shopping® Wå wenô tï onå oæ thå worlä famouó � |
|||
departmenô stores® Thå enormitù oæ thå placå waó overwhelming® � |
|||
Wå founä wå werå morå comfortablå shoppinç inthå smalleò shops® É � |
|||
boughô á wooì scaræ anä á teá set. |
|||
|
|||
Hydå Parë ió walkinç distancå froí ouò hotel® Sï aô thå enä oæ á � |
|||
hectiã day¬ wå decideä á strolì througè thå parë waó jusô whaô wå � |
|||
needed® Wå endeä uð sittinç oî á parë bencè foò abouô aî hour® � |
|||
Thå peoplå-watchinç waó fun® Alì thå classiã Englisè characteró � |
|||
passeä beforå uó meî iî derbù ható anä piî stripes¬ nannieó � |
|||
pushinç babù carriages¬ anä bobbieó amonç them. |
|||
|
|||
Ouò morninç touò guidå saiä nï visiô tï Londoî ió completå � |
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withouô teá aô thå Ritú Hotel® Sï froí Hydå Park wå walkeä á � |
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shorô distancå uð Picadillù anä haä á mosô memorablå testime® Iô � |
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waó reallù á smalì meal¬ witè hoô disheó beinç offereä witè thå � |
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usuaì farå oæ scones¬ cookies¬ anä cakes. |
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Afteò sufficientlù stuffinç ourselveó aô teatime¬ wå walkeä á biô � |
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more® Buô thå Londoî rusè houò goô tï uó sï wå decideä tï taëe iî � |
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á moviå ratheò thaî trù tï geô bacë tï thå hotel® Somehow¬ I'vå � |
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gotteî enougè energù tï writå thió entrù iî mù trið diary® I'vå � |
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haä á trulù wonderfuì daù® É lovå thió city. |
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Septembeò 12 |
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I'vå goô tï catcè uð oî twï dayó oæ diarù entries® Wå wenô tï � |
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thå theateò lasô night¬ anä goô bacë tï thå hoteì toï latå tï dï � |
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anù writing. |
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Yesterday¬ wå tooë á breaë froí organizeä tours¬ anä decideä tï � |
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visiô severaì Londoî siteó oî ouò own® Iî thå morninç wå wenô tï � |
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Westminsteò Abbey® Wå boughô á guidebooë anä tooë á leisurelù � |
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touò oæ thå church® |
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Iî thå afternoon¬ wå visiteä thå Britisè Museum® Thå placå ió sï � |
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hugå thaô iô ió impossiblå tï eveî thinë oæ coverinç iô alì iî �Šonå afternoon® Buô wå tooë á quicë touò anä sa÷ thå Magná Carta¬ � |
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thå Rosettá Stone¬ anä á hugå collectioî oæ originaì manuscriptó � |
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anä musicaì scoreó Bach¬ Handel¬ Beethoven¬ Keats¬ Shelley¬ � |
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Dickenó, anä manù more. |
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Today¬ wå lefô Londoî anä tooë á daù touò tï Stratforä-oî-Avon¬ thå � |
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birthplacå oæ Williaí Shakespeare® Wå wenô bù buó witè á largå � |
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grouð buô thå touò guidå waó sï welì informeä thaô iô waó welì � |
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wortè it® Wå covereä á loô iî onå daù anä eveî tooë timå foò á � |
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leisurelù luncè aô á locaì hotel. |
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Stratforä-oî-Avoî ió á picturesquå littlå towî anä stilì � |
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maintainó itó Elizabethaî flavor® Mosô buildingó arå thå � |
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originaló anä havå beeî verù welì preserved® Wå enjoyeä seeinç � |
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alì thå siteó relateä tï Shakespeare'ó life. |
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Tomorro÷ ió ouò lasô daù iî London® We'lì havå tï makå thå mosô � |
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oæ it! |
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CON-TROL-LABLE |
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EQ-UABLE |
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IN-SA-TIABLE |
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NE-GO-TIABLE |
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SO-CIABLE |
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TURN-TABLE |
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UN-CON-TROLLABLE |
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UN-SO-CIABLE |
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DE-PEND-ENT |
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IN-DE-PEND-ENT |
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ANY-THING |
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BAL-DING |
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DAR-LING |
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DUMP-LING |
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ERR-ING |
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EVE-NING |
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EVERY-THING |
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FAR-THING |
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FOUND-LING |
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INK-LING |
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MAIN-SPRING |
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NEST-LING |
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OFF-SPRING |
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PLAY-THING |
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SAP-LING |
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SHOE-STRING |
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SIB-LING |
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SOME-THING |
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STAR-LING |
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STER-LING |
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UN-ERR-ING |
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UP-SWING |
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WEAK-LING |
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YEAR-LING |
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CIV-I-LIZE |
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CRYS-TAL-LIZE |
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IM-MO-BI-LIZE |
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ME-TA-BO-LIZE |
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MO-BI-LIZE |
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MO-NOP-O-LIZE |
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STA-BI-LI*ZE |
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TAN-TA-LIZE |
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UN-CIV-I-LIZED |
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PAL-ATE |
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IN-CLEM-ENT |
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BAR-ON-ESS |
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LI-ON-ESS |
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EU-LOGY |
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PED-A-GOGY |
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LUS-CIOUS |
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AT-MOS-PHERE |
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MET-AL |
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NON-METAL |
|||
PET-AL |
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POST-AL |
|||
RENT-AL |
|||
CAT-ION |
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COM-BAT-IVE |
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STAT-URE |
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BECK-ON |
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BES-TIAL |
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COM-A-TOSE |
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COME-BACK |
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CO-ME-DIAN |
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COMP-TROLLER |
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CONE-FLOWER |
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CO-NUN-DRUM |
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EQUIPPED |
|||
HANDLE-BAR |
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INCH-WORM |
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INK-BLOT |
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INN-KEEPER |
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IN-TE-RIOR |
|||
MIN-IS-TER |
|||
MIN-IS-TRY |
|||
NONE-THE-LESS |
|||
QUA-DRILLE |
|||
SOM-ER-SAULT |
|||
SU-PE-RIOR |
|||
U-NA-NIM-ITY |
|||
U-NAN-I-MOUS |
|||
UNC-TUOUS |
|||
DEBT-OR |
|||
AC-KNOW-LEDGE |
|||
DE-DUCT-I*BLE |
|||
EX-ACT-I-TUDE |
|||
IN-EX-ACT-I-TUDE |
|||
PRE-DICT-*ABLE |
|||
RE-SPECT-*ABLE |
|||
UN-PRE-DICT-ABLE |
|||
VICT-UAL |
|||
NEEDLE-WORK |
|||
IDLER |
|||
BUFF-ER |
|||
OFF-BEAT |
|||
OFF-HAND |
|||
OFF-PRINT |
|||
OFF-SHOOT |
|||
OFF-SHORE |
|||
STIFF-EN |
|||
LEFT-IST |
|||
LEFT-OVER |
|||
LIFT-OFF |
|||
SOFT-HEARTED |
|||
EGG-SHELL |
|||
EGG-PLANT |
|||
EGG-NOG |
|||
EGG-HEAD |
|||
COGNAC |
|||
FOR-EIGN-ER |
|||
VIGNETTE |
|||
HOGS-HEAD |
|||
CHILD-ISH |
|||
ELD-EST |
|||
GOLD-EN |
|||
HOLD-OUT |
|||
HOLD-OVER |
|||
HOLD-UP |
|||
SELF-ISH |
|||
BULL-ISH |
|||
CREST-FALLEN |
|||
DIS-TILL-*E*RY |
|||
FALL-OUT |
|||
LULL-ABY |
|||
ROLL-AWAY |
|||
SELL-OUT |
|||
WALL-EYE |
|||
PSALM-IST |
|||
ELSE-WHERE |
|||
FALSE-HOOD |
|||
CON-SULT-ANT |
|||
VOLT-AGE |
|||
RE-SOLV-ABLE |
|||
RE-VOLV-ER |
|||
SOLV-ABLE |
|||
UN-SOLV-ABLE |
|||
BEACH-COMBER |
|||
BOMB-ER |
|||
CLIMB-ER |
|||
PLUMB-ER |
|||
DAMP-EN |
|||
DAMP-EST |
|||
CLINCH-ER |
|||
LAUNCH-ER |
|||
LUNCH-EON |
|||
RANCH-ER |
|||
TRENCH-ANT |
|||
AN-NOUNCER |
|||
BOUNCER |
|||
FENCER |
|||
HENCE-FORTH |
|||
MINCE-MEAT |
|||
SI-LENCER |
|||
BIND-ERY |
|||
BOUND-ARY |
|||
COM-MEND-*A-*T*ORY |
|||
DE-PEND-ABLE |
|||
EX-PEND-ABLE |
|||
FIEND-ISH |
|||
LAND-OWNER |
|||
OUT-LAND-ISH |
|||
ROUND-ABOUT |
|||
SEND-OFF |
|||
STAND-OUT |
|||
UN-DER-STAND-ABLE |
|||
CHANGE-OVER |
|||
HANG-OUT |
|||
HANG-OVER |
|||
HA-RANGUE |
|||
ME-RINGUE |
|||
ORANGE-ADE |
|||
TONGUE |
|||
VENGE-ANCE |
|||
SENSE-LESS |
|||
AC-COUNT-ANT |
|||
ANT-ACID |
|||
ANT-EATER |
|||
COUNT-ESS |
|||
PER-CENT-*AGE |
|||
REP-RE-SENTATIVE |
|||
ANT-HILL |
|||
PENT-HOUSE |
|||
AC-CEPT-ABLE |
|||
AC-CEPTOR |
|||
ADAPT-ABLE |
|||
ADAPT-ER |
|||
CRYPT-ANALYSIS |
|||
IN-TER-RU*P*T-*I*BLE |
|||
AN-TIQ-UI*TY |
|||
INEQ-UITY |
|||
INIQ-UITY |
|||
LIQ-UEFY |
|||
LIQ-UID |
|||
LIQ-UI-D*A*T*E |
|||
LIQ-UI-D*A-*T*ION |
|||
LIQ-UOR |
|||
PRE-REQ-UI-SITE |
|||
REQ-UI-SI-TION |
|||
SUB-SEQUENCE |
|||
U-BIQ-UI-TOUS |
|||
AB-SORB-ENT |
|||
CARB-ON |
|||
HERBAL |
|||
IM-PERT-TURB-ABLE |
|||
ARCH-ERY |
|||
ARCH-AN-GEL |
|||
RE-SEARCH-ER |
|||
UN-SEARCH-ABLE |
|||
AC-CORD-ANCE |
|||
BOARD-ER |
|||
CHORDAL |
|||
HARD-EN |
|||
HARD-EST |
|||
HAZ-ARD-OUS |
|||
JEOP-ARD-IZE |
|||
RE-CORDER |
|||
STAND-ARD-IZE |
|||
STEW-ARD-ESS |
|||
YARD-AGE |
|||
SURF-ER |
|||
MORGUE |
|||
CURL-I-CUE |
|||
AF-FIRM-*A*T*IVE |
|||
CON-FORM-*ITY |
|||
DE-FORM-ITY |
|||
IN-FORM-A*NT |
|||
NON-CON-FORM-IST |
|||
CAV-ERN-OUS |
|||
DIS-CERN-IBLE |
|||
MOD-ERN-IZE |
|||
TURN-ABOUT |
|||
TURN-OVER |
|||
UN-GOV-ERN-ABLE |
|||
WEST-ERN-IZE |
|||
HARP-IST |
|||
SHARPEN |
|||
TORQUE |
|||
COARS-EN |
|||
IR-RE-VERS-IBLE |
|||
NURSE-MAID |
|||
NURS-ERY |
|||
RE-HEARS-AL |
|||
RE-VERS-IBLE |
|||
WORS-EN |
|||
ART-IST |
|||
CON-VERT-IBLE |
|||
COURT-YARD |
|||
FORE-SHORT-EN |
|||
HEART-ACHE |
|||
HEART-ILY |
|||
SHORT-EN |
|||
APART-HEID |
|||
COURT-HOUSE |
|||
EARTH-EN-WARE |
|||
NORTH-EAST |
|||
NORTH-ERN |
|||
PORT-HOLE |
|||
NERV-OUS |
|||
OB-SERV-A*BLE |
|||
OB-SERVER |
|||
PRE-SERV-*A*T*I*VE |
|||
SERV-ER |
|||
|
|||
SERV-ICE-ABLE |
|||
PRE-SCHOOL |
|||
CON-DE-SCEND |
|||
CRE-SCENDO |
|||
DE-CRE-SCENDO |
|||
DE-SCEND-ENT |
|||
DE-SCENT |
|||
PLEB-I-SCITE |
|||
RE-SCIND |
|||
SEA-SCAPE |
|||
ASKANCE |
|||
SNAKE-SKIN |
|||
WHISK-ER |
|||
COLE-SLAW |
|||
RATTLE-SNAKE |
|||
CLASS-IFY |
|||
CLASS-ROOM |
|||
CROSS-OVER |
|||
DIS-MISS-*AL |
|||
EX-PRESS-*I*BLE |
|||
IM-PASS-ABLE |
|||
LESS-EN |
|||
PASS-ABLE |
|||
TOSS-UP |
|||
UN-CLASS-I-FIED |
|||
AR-MI-STICE |
|||
ASTIG-MA-TISM |
|||
ASTIR |
|||
ASTONISH-MENT |
|||
BLAST-OFF |
|||
BY-STAND-ER |
|||
CANDLE-STICK |
|||
CAST-AWAY |
|||
CAST-OFF |
|||
CON-TEST-ANT |
|||
CO-STAR |
|||
DE-TEST-ABLE |
|||
DI-GEST-IBLE |
|||
EAST-ERN |
|||
EX-IST-ENCE |
|||
FORE-STALL |
|||
IN-CON-TEST-ABLE |
|||
IN-DI-GES*T-*I*BLE |
|||
IN-EX-HAUST-IBLE |
|||
LIFE-STYLE |
|||
LIME-STONE |
|||
LIVE-STOCK |
|||
MILE-STONE |
|||
NON-EX-IST-ENT |
|||
PER-SIST-ENT |
|||
PHO-TO-STAT |
|||
RE-START-ED |
|||
RE-STATE-MENT |
|||
RE-STORE |
|||
SHY-STER |
|||
SIDE-STEP |
|||
SMOKE-STACK |
|||
SUG-GEST-*I*BLE |
|||
THERMO-STAT |
|||
WASTE-BAS-KET |
|||
WASTE-LAND |
|||
MAST-HEAD |
|||
POST-HU-MOUS |
|||
PRIEST-HOOD |
|||
SIDE-SWIPE |
|||
WATT-METER |
|||
BE-TWEEN |
|||
KIB-ITZER |
|||
BUZZ-ER |
|||
AL-GO-RITHM |
|||
BIB-LI-OG-RAPHY |
|||
BI-NO-MIAL |
|||
CEN-TER |
|||
COM-PUT-A*BIL-ITY |
|||
DEC-LA-RA-TION |
|||
DE-GREE |
|||
ES-TAB-LISH |
|||
GEN-ER-ATOR |
|||
HAP-HAZARD |
|||
NEG-LI-GIBLE |
|||
PE-RI-ODIC |
|||
POLY-NO-MIAL |
|||
PRE-VIOUS |
|||
PROB-ABIL-ITY |
|||
PROB-ABLE |
|||
PRO-CE-DURE |
|||
PUB-LI-CA-TION |
|||
PUB-LISH |
|||
RE-PLACE-MENT |
|||
WHEN-EVER |
|||
|
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.hePRINT.TST Features of Your Printer |
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.f1 WordStar |
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.f2 Print test |
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.f3 Page # |
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.oj on |
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WordStaò anä Youò Printer |
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WordStar‚ workó witè á widå rangå oæ printeró anä offeró yoõ á � |
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varietù oæ prinô enhancements® Whetheò youò printeò caî producå � |
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thå prinô enhancementó outlineä iî thió documenô dependó oî itó � |
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capabilities® Pleaså notå thaô noô alì printeró arå capablå oæ � |
|||
showinç alì thå exampleó below. |
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|||
Speciaì Printinç Capabilities |
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WordStaò supportó thå followinç speciaì printinç capabilities: |
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|||
ª Boldface¬ Doublå strike |
|||
* Italics/Alternatå ribboî color |
|||
* Strikå out |
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* Overprinô (aó iî co^te) |
|||
* Noncontinuouó underline¬ anä |
|||
.ul on |
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* Continuouó underline |
|||
.ul off |
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* SuperScript¬ SubScript |
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* anä almosô anù combinatioî - WordStar |
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Characteò Width |
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Somå printeró wilì supporô WordStar‚ commandó foò variablå � |
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characteò widths®� |
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|||
.cw 24 |
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µ characteró peò inch® (.C× 24) |
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.cw 20 |
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¶ characteró peò inch® (.C× 20) |
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.cw 14 |
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8.¶ characteró peò inch® (.C× 14) |
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.cw 12 |
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1° characteró peò inch® (.C× 12) |
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.cw 10 |
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1² characteró peò inch® (.C× 10) |
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.cw 7 |
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17.± characteró peò inch® (.C× 7) |
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.cw 12 |
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Youò printeò caî alsï bå seô tï "toggle¢ betweeî normaì pitcè anä � |
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alternatå pitch: |
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Thió sentencå ió printeä witè thå normaì 1°-pitcè setting¬ � |
|||
theî toggleä tï 1² pitch¬ theî bacë tï normal. |
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.cw 7 |
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Yoõ caî alsï changå thå normaì anä alternatå characteò widths: |
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|||
.cw 14 |
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.rm 55 |
|||
Thå "normal¢ characteò widtè ió 1´ (8.¶ cpi© anä � |
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thå alternatå characteò widtè ió · (17.± cpi). |
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.pa
Š.rm 65 |
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.cw 10 |
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.cw 12 |
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Linå Height |
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Yoõ caî alsï uså differenô linå heights. |
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|||
.lh 16 |
|||
Thió ió aî examplå oæ variablå linå height® (.LÈ 1¶ ³ lpi) |
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.lh 12 |
|||
Thió ió aî examplå oæ variablå linå height® (.LÈ 1² ´ lpi) |
|||
.lh 8 |
|||
Thió ió aî examplå oæ variablå linå height® (.LÈ ¸ ¶ lpi) |
|||
.lh 6 |
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Thió ió aî examplå oæ variablå linå heighô® (.LÈ ¶ ¸ lpi) |
|||
.lh 8 |
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|
|||
Proportionaì Printing |
|||
|
|||
.ps on |
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.uj on |
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WordStar‚ alsï supportó proportionaì printinç foò mosô printeró � |
|||
thaô havå it® Yoõ selecô proportionaì fontó bù changinç � |
|||
characteò widthó aó iî thå followinç examples:� |
|||
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|||
.cw 22 |
|||
Thió ió characteò widtè 22. |
|||
.cw 11 |
|||
Thió ió characteò widtè 11. |
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.cw 9 |
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Thió ió characteò widtè 9. |
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.cw 7 |
|||
Thió ió characteò widtè 7. |
|||
.uj dis |
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.ps off |
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.cw 12 |
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Other |
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|||
Phantoí Spacå¬ Phantoí Rubout |
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|||
WordStaò maù allo÷ yoõ tï prinô speciaì characteró (foò example¬ � |
|||
á paragrapè sigî oò centó sign© bù usinç thå phantoí spacå � |
|||
commanä (^PF© oò thå phantoí rubouô commanä (^PG© iî á document® � |
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Foò youò printer¬ thå phantoí spacå characteò isº ¬ anä thå � |
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phantoí rubouô characteò isº . |
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|||
Switchinç tï Drafô Mode |
|||
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|||
.lq off |
|||
Doô matriø printeò driveró allo÷ switchinç froí NLÑ (neaò letteò � |
|||
quality© modå tï drafô modå foò fasteò printing. |
|||
.lq on |
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|||
Microspacå Justification |
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|||
.uj on |
|||
WordStar‚ allowó microspacå justification¬ iæ youò printeò � |
|||
supportó it¬ tï producå evenlù spaceä wordó iî justifieä text® � |
|||
Microspacinç spreadó thå whitå spacå betweeî wordó (anä sometimeó � |
|||
betweeî thå letteró oæ eacè word© aó evenlù aó possible® |
|||
.uj dis |
|||
.pa
ŠLookinç Aô Thió Filå Onscreen |
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|||
Iæ yoõ wanô tï seå thå embeddeä commandó thaô produceä thå texô � |
|||
yoõ arå no÷ reading¬ follo÷ theså steps: |
|||
|
|||
1 Aô thå Openinç Menu¬ presó D‚ tï ediô á document. |
|||
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|||
² Aô thå prompô foò filename¬ typå print.tsô anä presó Enter. |
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|||
Noticå thaô thå texô onscreeî includeó somå characteró thaô don'ô � |
|||
appeaò iî thå printeä copy® Foò example¬ á headinç linå ió � |
|||
identifieä bù thå doô commanä .he® Wordó iî boldfacå arå � |
|||
surroundeä bù ^Â anä appeaò eitheò highlighteä oò iî á differenô � |
|||
coloò oî youò screen. |
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|||
Tï continuå viewinç thå contentó oæ thió file¬ ¬ presó ^C® Presó � |
|||
^R‚ tï movå iî thå otheò direction. |
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This disk contains an updated printer driver file for your |
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WordStar, CP/M Edition, Release 4. This file corrects problems |
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you may have experienced with form feeds, page length, and right- |
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justified proportional spacing. |
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Follow the instructions on page xxii of the WordStar Reference |
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Guide for creating a new WSPRINT.OVR file. Substitute a copy of |
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this WSPRINT disk (make sure it is a boot disk) for the copy of |
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your original PRINT disk in step 2. |
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Thå Ruleò Line |
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Thió documenô ió seô uð tï teacè yoõ abouô ruleò lines® Thió � |
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texô waó writteî usinç thå defaulô lefô anä righô marginó oæ ± � |
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anä 65® Wå didn'ô changå anù tabó here® Next¬ wå wanteä tï � |
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changå botè marginó tï indenô thå texô® Wå useä doô � |
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commands® Witè doô commands¬ thå ne÷ marginó arå saveä wheî yoõ � |
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exiô anä savå thå document.� |
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.lm10 |
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.rm45 |
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Ne÷ marginó changå thå ruleò anä � |
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text® Watcè thå ruleò linå aó yoõ � |
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movå thå cursoò througè thió text® � |
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WordStaò wilì continuå tï holä theså � |
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marginó untiì yoõ enteò anotheò doô � |
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ãommand. |
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.lm1 |
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.rm65 |
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Margiî changeó brinç thå ruleò anä thå texô bacë tï thå defaulô � |
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settingó oncå again. |
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Itinerary |
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Depart Datå Time Arrive Date Time |
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Florence 10¯3± 08:30 a Rome 10¯31 05:3µ p |
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Romå 11¯05 08:00 a Naples 11/05 12:2· p |
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Noô includeä iî thå rateó are |
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.lm10 |
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.rm55 |
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Transfeò services¬ sightseeing¬ mealó excepô � |
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aó specified¬ tipó tï statioî porters¬ wines¬ � |
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spirits¬ mineraì waters¬ laundry¬ theateò � |
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tickets¬ anä otheò itemó oæ á similaò personaì � |
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nature® |
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Excursions |
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Daù ± |
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Florencå-Romeº Leavå aô 8:3° aí bù deluxå motorcoach® Arrivå aô � |
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Romå iî thå afternoon® |
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Daù ² |
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Romeº Morninç anä afternooî citù sightseeinç bù motorcoach® � |
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Englisè speakinç guidå optional. |
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Farå iî firsô clasó hotelsº $100.00® Batè optionaìº $25.00® |
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Daù 8 |
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Romå-Naplesº Deparô aô 8:0° aí bù CIAÔ deluxå motorcoacè viá � |
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Formia® Arrivå Napleó aô luncè time® Afternooî optionaì � |
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excursioî tï Phlegreaî Fieldó anä Sulphuò Mine® |
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