diff --git a/Doc/RomWBW Applications.pdf b/Doc/RomWBW Applications.pdf
index 00e11d31..b53183a3 100644
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diff --git a/Doc/RomWBW Disk Catalog.pdf b/Doc/RomWBW Disk Catalog.pdf
index 7f7c087b..43ee10a4 100644
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diff --git a/Doc/RomWBW Errata.pdf b/Doc/RomWBW Errata.pdf
index 302b1ee3..72e6eadb 100644
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diff --git a/Doc/RomWBW ROM Applications.pdf b/Doc/RomWBW ROM Applications.pdf
index 931ec24d..a1cc1e1a 100644
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diff --git a/Doc/RomWBW System Guide.pdf b/Doc/RomWBW System Guide.pdf
index 3e90c1f8..fa64a2d1 100644
Binary files a/Doc/RomWBW System Guide.pdf and b/Doc/RomWBW System Guide.pdf differ
diff --git a/Doc/RomWBW User Guide.pdf b/Doc/RomWBW User Guide.pdf
index 14ce05f5..c1dbc6b7 100644
Binary files a/Doc/RomWBW User Guide.pdf and b/Doc/RomWBW User Guide.pdf differ
diff --git a/ReadMe.md b/ReadMe.md
index 80790eee..f684ce91 100644
--- a/ReadMe.md
+++ b/ReadMe.md
@@ -3,7 +3,7 @@
 **RomWBW ReadMe** \
 Version 3.4 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-09 Oct 2023
+13 Oct 2023
 
 # Overview
 
diff --git a/ReadMe.txt b/ReadMe.txt
index f26e5bb8..828ff043 100644
--- a/ReadMe.txt
+++ b/ReadMe.txt
@@ -1,6 +1,6 @@
 RomWBW ReadMe
 Wayne Warthen (wwarthen@gmail.com)
-09 Oct 2023
+13 Oct 2023
 
 
 
diff --git a/Source/Doc/UserGuide.md b/Source/Doc/UserGuide.md
index 1f8ccedc..2afd9b66 100644
--- a/Source/Doc/UserGuide.md
+++ b/Source/Doc/UserGuide.md
@@ -1609,7 +1609,7 @@ filesystem partition and any CP/M filesystem slices that don't fit.  You
 will get "no disk" errors if you attempt to access a slice past the 
 end of the physical hard disk.
 
-**WARNING**:Your hard disk may be too small to contain the full 64
+**WARNING**: Your hard disk may be too small to contain the full 64
 CP/M filesystem slices.  The true number of CP/M filesystem slices that
 will fit on your specific physical hard disk can be calculated as
 described in [Hard Disk Capacity].
@@ -1625,12 +1625,20 @@ them using `CLRDIR` first.
 
 A great way to maintain your own data on a hard disk is to put this
 data in slices beyond the first 6.  By doing so, you can always
-"reimage" your drive with the combo image without overlaying the data
+"re-image" your drive with the combo image without overlaying the data
 stored in the slices beyond the first 6.  Just be very careful to use
 the same combo image layout (hd512 or hd1k) as you used originally.
 Also remember to calculate the maximum number of slices your hard disk
 will support and do not exceed this number.
 
+**WARNING**: The combo disk image includes a partition table at the 
+start of the image.  If you re-image drive with the combo image, you 
+will overwrite this partition table.  This is fine as long as you don't 
+make any changes to the partition table.  If you manually customize the 
+partition table (using `FDISK80` or other partition management 
+software), those changes will be lost if you re-image your disk with a 
+new combo disk image.
+
 #### Custom Hard Disk Image
 
 If you want to use specific slices in a specific order, you can easily
@@ -1640,8 +1648,9 @@ For hard disks, each .img file represents a single slice (CP/M
 filesystem).  Since a hard disk can contain many slices, you can just 
 concatenate the slices (.img files) together to create your desired hard
 disk image.  For example, if you want to create a hard disk image that 
-has slices for CP/M 2.2, CP/M 3, and WordStar in the hd512 format, you would use 
-the command line of your modern computer to create the final image:
+has slices for CP/M 2.2, CP/M 3, and WordStar in the hd512 format, you 
+would use the command line of your modern computer to create the final 
+image:
 
 Windows:
 
@@ -3348,8 +3357,10 @@ directed to complete a partial flash using the /P command line switch.
 # Related Projects
 
 Outside of the hardware platforms adapted to RomWBW, there are a variety 
-of software projects that either target RomWBW specifically or provide
-a RomWBW-specific variation.
+of projects that either target RomWBW specifically or provide
+a RomWBW-specific variation.  These efforts are greatly appreciated
+and are listed below.  Please contact the author if there are any other
+such projects that are not listed.
 
 ## Z88DK
 
@@ -3385,6 +3396,16 @@ the CP/M OS variants.  This tool (`WDATE`) is included on the RomWBW
 OS disk images.  The project is hosted at
 <https://github.com/kevinboone/wdate-cpm>.
 
+## Assembly Language Programming for the RC2014 Zed
+
+Bruce Hall has written a very nice document that describes how to
+develop assembly language applications on RomWBW.  It begins with the
+setup and configuration of a new RC2014 Zed system running RomWBW.
+It describes not only generic CP/M application development, but also
+RomWBW HBIOS programming and bare metal programming.  The latest copy
+of this document is hosted at
+[http://w8bh.net/Assembly for RC2014Z.pdf](http://w8bh.net/Assembly%20for%20RC2014Z.pdf).
+
 # Acknowledgments
 
 I want to acknowledge that a great deal of the code and inspiration
diff --git a/Source/HBIOS/cfg_duo.asm b/Source/HBIOS/cfg_duo.asm
index 3a552f66..cccb5c87 100644
--- a/Source/HBIOS/cfg_duo.asm
+++ b/Source/HBIOS/cfg_duo.asm
@@ -46,15 +46,15 @@ RTCIO		.EQU	$94		; RTC LATCH REGISTER ADR
 KIOENABLE	.EQU	FALSE		; ENABLE ZILOG KIO SUPPORT
 KIOBASE		.EQU	$80		; KIO BASE I/O ADDRESS
 ;
-CTCENABLE	.EQU	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCENABLE	.EQU	TRUE		; ENABLE ZILOG CTC SUPPORT
 CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
-CTCBASE		.EQU	$B0		; CTC BASE I/O ADDRESS
+CTCBASE		.EQU	$60		; CTC BASE I/O ADDRESS
 CTCTIMER	.EQU	TRUE		; ENABLE CTC PERIODIC TIMER
 CTCMODE		.EQU	CTCMODE_CTR	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
 CTCPRE		.EQU	256		; PRESCALE CONSTANT (1-256)
 CTCPRECH	.EQU	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.EQU	3		; TIMER CHANNEL (0-3)
-CTCOSC		.EQU	(4915200/8)	; CTC CLOCK FREQUENCY
+CTCOSC		.EQU	(7372800/8)	; CTC CLOCK FREQUENCY
 ;
 PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
 PCFBASE		.EQU	$56		; PCF8584 BASE I/O ADDRESS
@@ -132,7 +132,7 @@ UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
 UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
-UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUAL	.EQU	TRUE		; UART: AUTO-DETECT DUAL UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
@@ -140,18 +140,18 @@ Z2UENABLE	.EQU	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 ;
 ACIAENABLE	.EQU	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 ;
-SIOENABLE	.EQU	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIOENABLE	.EQU	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
 SIO0MODE	.EQU	SIOMODE_ZP	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
-SIO0BASE	.EQU	$B0		; SIO 0: REGISTERS BASE ADR
-SIO0ACLK	.EQU	(4915200/8)	; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BASE	.EQU	$60		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.EQU	(7372800/4)	; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0ACFG	.EQU	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
-SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
-SIO0BCLK	.EQU	(4915200/8)	; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACTCC	.EQU	0		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.EQU	(7372800/4)	; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
 SIO0BCFG	.EQU	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
-SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCTCC	.EQU	1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
 ;
 XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
 ;
diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index eec6160a..94b7c7a9 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -71,6 +71,8 @@
 ;
 #DEFINE	HBIOS
 ;
+SUPCTS	.EQU	FALSE		; SUPPRESS CTS DURING HBIOS BOOT
+;
 ; MAKE SURE EXACTLY ONE OF ROMBOOT, APPBOOT, IMGBOOT IS DEFINED.
 ;
 MODCNT	.EQU	0
@@ -2300,8 +2302,36 @@ HB_BOOTDLY:
 	JR	C,HB_CONRDY		; IF TOO HIGH, JUST USE FAILSAFE
 	LD	A,BOOTCON		; GET REQUESTED CONSOLE DEV
 	LD	(CB_CONDEV),A		; SAVE IT
+;
 HB_CONRDY:
 ;
+#IF (SUPCTS)
+;
+; MOST SERIAL PORTS ARE CONFIGURED WITH HARDWARE FLOW CONTROL ENABLED.
+; IF THERE IS A PROBLEM WITH THE CTS SIGNAL, THEN OUTPUT TO THE CONSOLE
+; WILL BE STALLED WHICH CAN LEAD A USER TO THINK THE SYSTEM IS TOTALLY
+; DEAD WHEN, IN FACT, IT IS JUST WAITING FOR CTS TO BE ASSERTED.  ALSO,
+; IF THE USER IS BOOTING TO A CRT DEVICE AND DISCONNECTS THE CONSOLE
+; SERIAL PORT, THE SYSTEM WILL WAIT FOR RTS AND NEVER BOOT.  SO, HERE
+; WE SAVE THE ACTIVE CONSOLE CONFIGURATION, THEN TURN OFF HARDWARE
+; FLOW CONTROL.  THE ORIGINAL CONFIGURATION WILL BE RESTORED BELOW
+; PRIOR TO LAUNCING THE ROM LOADER.
+;
+	; RETRIEVE THE CONFIG FROM THE CONSOLE PORT
+	LD	B,BF_CIOQUERY		; HBIOS QUERY CIO CONFIG
+	LD	A,(CB_CONDEV)		; GET CONSOLE DEVICE
+	LD	(HB_BOOTCONSAV),A	; SAVE IT FOR LATER
+	LD	C,A			; BOOT CONSOLE TO C
+	CALL	HB_DISPATCH		; INTERNAL HBIOS CALL
+	LD	(HB_CONCFGSAV),DE	; SAVE CONFIG
+	RES	5,D			; CLEAR RTS BIT
+	LD	B,BF_CIOINIT		; HBIOS CIO INIT
+	LD	A,(CB_CONDEV)		; GET CONSOLE DEVICE
+	LD	C,A			; BOOT CONSOLE TO C
+	CALL	HB_DISPATCH		; INTERNAL HBIOS CALL
+;
+#ENDIF
+;
 #IF (WBWDEBUG == USEMIO)		; OUTPUT ANY CACHED DEBUG TEXT
 	LD	HL,MIOOUTPTR
 	LD	E,(HL)
@@ -2848,6 +2878,19 @@ HB_FPZ:
 ;
 INITSYS3:
 ;
+#IF (SUPCTS)
+;
+; RESTORE BOOT CONSOLE CONFIGURATION
+;
+	CALL	LDELAY			; ALLOW SERIAL PORT TO FLUSH
+	LD	B,BF_CIOINIT		; HBIOS CIO INIT
+	LD	A,(HB_BOOTCONSAV)	; ORIGINAL BOOT CONSOLE DEVICE
+	LD	C,A			; BOOT CONSOLE TO C
+	LD	DE,(HB_CONCFGSAV)	; SAVED ORIGINAL CONSOLE CFG
+	CALL	HB_DISPATCH		; INTERNAL HBIOS CALL
+;
+#ENDIF
+;
 ; IF WE ARE GOING TO SWITCH CONSOLES, IT IS IMPLEMENTED HERE.  A
 ; MESSAGE IS PRINTED ON THE OLD CONSOLE INDICATING WHERE THE NEW
 ; CONSOLE IS AND THE NEW CONSOLE RECEIVES AN HBIOS BANNER.
@@ -7721,6 +7764,11 @@ HB_BOOTCON	.DB	0		; INITIAL BOOT CONSOLE SAVE AREA
 HB_BOOTCFG	.DW	0		; CONSOLE CONFIG SAVE AREA
 HB_NEWCON	.DB	0		; NEW CONSOLE TO SWITCH TO
 ;
+#IF (SUPCTS)
+HB_BOOTCONSAV	.DB	0		; INITIAL BOOT CONSOLE SAVE AREA
+HB_CONCFGSAV	.DW	0		; CONSOLE CONFIG SAVE AREA
+#ENDIF
+;
 HB_HASFP	.DB	0		; NON-ZERO MEANS FP EXISTS
 ;
 HB_WRKBUF	.FILL	512,0		; INTERNAL DISK BUFFER
diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm
index 19972696..98197e0e 100644
--- a/Source/HBIOS/std.asm
+++ b/Source/HBIOS/std.asm
@@ -837,7 +837,7 @@ INT_CTC0A	.EQU	0	; ZILOG CTC 0, CHANNEL A
 INT_CTC0B	.EQU	1	; ZILOG CTC 0, CHANNEL B
 INT_CTC0C	.EQU	2	; ZILOG CTC 0, CHANNEL C
 INT_CTC0D	.EQU	3	; ZILOG CTC 0, CHANNEL D
-;INT_SIO0	.EQU	7	; ZILOG SIO 0, CHANNEL A & B
+INT_SIO0	.EQU	6	; ZILOG SIO 0, CHANNEL A & B
 INT_SIO1	.EQU	8	; ZILOG SIO 1, CHANNEL A & B
 INT_PIO0A	.EQU	9	; ZILOG PIO 0, CHANNEL A
 INT_PIO0B	.EQU	10	; ZILOG PIO 0, CHANNEL B
diff --git a/Source/HBIOS/uart.asm b/Source/HBIOS/uart.asm
index c8eaf42a..2ed2eacd 100644
--- a/Source/HBIOS/uart.asm
+++ b/Source/HBIOS/uart.asm
@@ -63,7 +63,11 @@ UARTCBASE		.EQU	$80
 UARTMBASE		.EQU	$18
 UART4BASE		.EQU	$C0
 UARTRBASE		.EQU	$A0
+#IF (PLATFORM == PLT_DUO)
+UARTDBASE		.EQU	$70
+#ELSE
 UARTDBASE		.EQU	$80
+#ENDIF
 ;
 #IF (UARTINTS)
 ;
diff --git a/Source/ver.inc b/Source/ver.inc
index fac31893..96606ab6 100644
--- a/Source/ver.inc
+++ b/Source/ver.inc
@@ -2,7 +2,7 @@
 #DEFINE	RMN	4
 #DEFINE	RUP	0
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.4.0-dev.9"
+#DEFINE BIOSVER	"3.4.0-dev.10"
 #define rmj	RMJ
 #define rmn	RMN
 #define rup	RUP
diff --git a/Source/ver.lib b/Source/ver.lib
index 1c1e5de4..917fed6e 100644
--- a/Source/ver.lib
+++ b/Source/ver.lib
@@ -3,5 +3,5 @@ rmn	equ	4
 rup	equ	0
 rtp	equ	0
 biosver	macro
-	db	"3.4.0-dev.9"
+	db	"3.4.0-dev.10"
 	endm