From de52c4f5600ff7437faf380608c6c70ea8d04ec2 Mon Sep 17 00:00:00 2001 From: wwarthen Date: Wed, 19 Aug 2015 17:34:42 +0000 Subject: [PATCH] Reintegrate wbw -> trunk --- Doc/Flash4.txt | 351 +- Doc/Source/RomWBW Architecture.docx | Bin 258172 -> 257859 bytes Source/Apps/OSLdr.asm | 2 +- Source/BIOS/memmgr.asm | 89 - Source/BIOS/mk4.inc | 125 - Source/BIOS/n8.inc | 131 - Source/BIOS/n8vem.inc | 65 - Source/BIOS/std-n8vem.inc | 36 - Source/BIOS/std.asm | 422 -- Source/BIOS/ver.inc | 5 - Source/BPBIOS/@WBW Z3ENV.txt | 8 +- Source/BPBIOS/Build.cmd | 68 +- Source/BPBIOS/bpbio-dx.z80 | 50 +- Source/BPBIOS/bpbio-ww.z80 | 599 +++ Source/BPBIOS/byteio.z80 | 6 +- Source/BPBIOS/cboot-dx.z80 | 241 +- Source/BPBIOS/cboot-ww.z80 | 771 +++ Source/BPBIOS/deblock.z80 | 16 +- Source/BPBIOS/deblock.z80.sav | 317 ++ Source/BPBIOS/def-dx.lib | 100 +- Source/BPBIOS/{def-z33.lib => def-ww-z33.lib} | 16 +- .../{def-z34bnk.lib => def-ww-z33bnk.lib} | 16 +- Source/BPBIOS/{def-z34.lib => def-ww-z34.lib} | 16 +- .../{def-z33bnk.lib => def-ww-z34bnk.lib} | 16 +- Source/BPBIOS/{def-z41.lib => def-ww-z41.lib} | 16 +- Source/BPBIOS/def-ww.lib | 439 +- Source/BPBIOS/dpbhd-dx.lib | 8 +- Source/BPBIOS/dpbm-ww.lib | 40 + Source/BPBIOS/dpbram.lib | 2 +- Source/BPBIOS/dph.sav | 274 ++ Source/BPBIOS/dphhd.lib | 3 - Source/BPBIOS/dphhd.lib.sav | 193 + Source/BPBIOS/fdc-dx.z80 | 16 +- Source/BPBIOS/fdc-ww.z80 | 305 ++ Source/BPBIOS/forlib.lib | 0 Source/BPBIOS/hard-ww.z80 | 620 +++ Source/BPBIOS/hbios.z80 | 2 +- Source/BPBIOS/ibmv-dx.z80 | 235 +- Source/BPBIOS/ibmv-ww.z80 | 16 - Source/BPBIOS/icfg-dx.z80 | 2 +- Source/BPBIOS/{icfg-z33.z80 => icfg-ww.z80} | 4 +- Source/BPBIOS/icfg-z34.z80 | 187 - Source/BPBIOS/icfg-z41.z80 | 187 - Source/BPBIOS/iio-dx.z80 | 1138 ++++- Source/BPBIOS/iio-ww.z80 | 334 ++ Source/BPBIOS/ramd-ww.z80 | 89 + .../BPBIOS/{def-ww-mk4.lib => romwbw-mk4.lib} | 16 +- .../BPBIOS/{def-ww-sim.lib => romwbw-sim.lib} | 16 +- Source/BPBIOS/romwbw.lib | 72 + Source/BPBIOS/sectran.z80 | 12 - Source/BPBIOS/selrwd.z80 | 19 +- Source/BPBIOS/util.z80 | 2 +- Source/BPBIOS/wboot-dx.z80 | 60 +- Source/BPBIOS/wboot-ww.z80 | 191 + Source/BPBIOS/z33.zex | 3 +- Source/BPBIOS/z34.zex | 3 +- Source/BPBIOS/z3base.lib.sav | 125 + Source/BPBIOS/z41.zex | 4 +- Source/BPBIOS/zcpr33.bin | Bin 2048 -> 0 bytes Source/Build.cmd | 2 +- Source/BuildCommon.cmd | 1 + Source/CBIOS/Build.cmd | 16 +- Source/CBIOS/build.inc | 13 - Source/CBIOS/cbios.asm | 1044 ++-- Source/CBIOS/cbios.bin | Bin 6656 -> 0 bytes Source/CBIOS/cbios.lst | 4381 ----------------- Source/CBIOS/config.asm | 26 +- Source/CBIOS/n8vem.inc | 25 - Source/CBIOS/std-n8vem.inc | 36 - Source/CBIOS/std.asm | 308 -- Source/CBIOS/util.asm | 177 +- Source/CBIOS/ver.inc | 6 +- Source/Clean.cmd | 3 +- Source/{BIOS => HBIOS}/Build.cmd | 0 Source/{BIOS => HBIOS}/Build.ps1 | 17 +- Source/{BIOS => HBIOS}/Clean.cmd | 0 Source/HBIOS/Config/mk4_cvdu.asm | 113 + Source/{BIOS => HBIOS}/Config/mk4_diskio3.asm | 41 +- Source/{BIOS => HBIOS}/Config/mk4_propio.asm | 41 +- Source/{BIOS => HBIOS}/Config/mk4_std.asm | 61 +- Source/{BIOS => HBIOS}/Config/n8_2312.asm | 39 +- Source/{BIOS => HBIOS}/Config/n8_2511.asm | 39 +- .../n8vem_ci.asm => HBIOS/Config/sbc_ci.asm} | 33 +- .../Config/sbc_cvdu.asm} | 33 +- .../Config/sbc_dide.asm} | 31 +- .../Config/sbc_diskio.asm} | 31 +- .../Config/sbc_diskio3+cvdu.asm} | 31 +- .../Config/sbc_diskio3.asm} | 31 +- .../Config/sbc_dsd.asm} | 31 +- .../Config/sbc_mfp.asm} | 39 +- .../Config/sbc_ppide.asm} | 31 +- .../Config/sbc_ppisd.asm} | 31 +- .../Config/sbc_propio.asm} | 31 +- .../n8vem_rf.asm => HBIOS/Config/sbc_rf.asm} | 31 +- .../Config/sbc_simh.asm} | 32 +- .../Config/sbc_std.asm} | 31 +- .../Config/sbc_vdu.asm} | 31 +- Source/{BIOS => HBIOS}/Config/una_std.asm | 10 +- Source/{BIOS => HBIOS}/Config/zeta2_ppide.asm | 31 +- Source/{BIOS => HBIOS}/Config/zeta2_ppisd.asm | 31 +- Source/{BIOS => HBIOS}/Config/zeta2_ppp.asm | 31 +- Source/{BIOS => HBIOS}/Config/zeta2_std.asm | 31 +- Source/{BIOS => HBIOS}/Config/zeta_ppide.asm | 31 +- Source/{BIOS => HBIOS}/Config/zeta_ppisd.asm | 31 +- Source/{BIOS => HBIOS}/Config/zeta_ppp.asm | 31 +- Source/{BIOS => HBIOS}/Config/zeta_std.asm | 31 +- Source/{BIOS => HBIOS}/Make.cmd | 0 Source/{BIOS => HBIOS}/MakeBlankROM.ps1 | 0 Source/{BIOS => HBIOS}/Old/bioshdr.inc | 0 Source/{BIOS => HBIOS}/Old/bootapp.asm | 0 Source/{BIOS => HBIOS}/Old/bootgen.asm | 0 Source/{BIOS => HBIOS}/Old/bootrom.asm | 0 Source/{BIOS => HBIOS/Old}/cbios.asm | 132 +- Source/{BIOS => HBIOS}/Old/fill1k.asm | 0 Source/{BIOS => HBIOS}/Old/infolist.inc | 0 Source/{BIOS => HBIOS}/Old/loader.asm | 0 Source/{BIOS => HBIOS}/Old/osldr.asm | 0 Source/{BIOS => HBIOS}/Old/pgzero.asm | 0 Source/{BIOS => HBIOS}/Old/rom0.asm | 0 Source/{BIOS => HBIOS}/Old/romfill.asm | 0 Source/{BIOS => HBIOS}/Old/syscfg.asm | 0 Source/{BIOS => HBIOS/Old}/ubios.asm | 0 Source/{BIOS => HBIOS}/ansi.asm | 0 Source/{BIOS => HBIOS}/asci.asm | 52 +- Source/{BIOS => HBIOS}/bcd.asm | 0 Source/{BIOS => HBIOS}/blank1024KB.dat | 0 Source/{BIOS => HBIOS}/blank512KB.dat | 0 Source/{BIOS => HBIOS}/cvdu.asm | 2 +- Source/{BIOS => HBIOS}/cvdu_font.asm | 0 Source/{BIOS => HBIOS}/dbgmon.asm | 65 +- Source/{BIOS => HBIOS}/diskdefs | 0 Source/{BIOS => HBIOS}/dsrtc.asm | 2 +- Source/{BIOS => HBIOS}/fd.asm | 27 +- Source/{BIOS => HBIOS}/hbfill.asm | 0 Source/{BIOS => HBIOS}/hbios.asm | 597 +-- Source/HBIOS/hbios.inc | 159 + Source/{BIOS => HBIOS}/hdsk.asm | 33 +- Source/{BIOS => HBIOS}/ide.asm | 17 +- Source/{BIOS => HBIOS}/kbd.asm | 2 +- Source/{BIOS => HBIOS}/loader.asm | 219 +- Source/{BIOS => HBIOS}/makefile | 0 Source/{BIOS => HBIOS}/md.asm | 3 +- Source/HBIOS/memmgr.asm | 78 + Source/{BIOS => HBIOS}/n8v.asm | 2 +- Source/{BIOS => HBIOS}/n8v_font.inc | 0 Source/HBIOS/plt_mk4.inc | 16 + Source/HBIOS/plt_n8.inc | 24 + Source/HBIOS/plt_sbc.inc | 22 + Source/HBIOS/plt_una.inc | 3 + Source/{BIOS => HBIOS}/ppide.asm | 17 +- Source/{BIOS => HBIOS}/ppk.asm | 28 +- Source/{BIOS => HBIOS}/ppp.asm | 6 + Source/{BIOS => HBIOS}/prefix.asm | 0 Source/{BIOS => HBIOS}/prp.asm | 5 +- Source/{BIOS => HBIOS}/rf.asm | 17 +- Source/{BIOS => HBIOS}/romldr.asm | 37 +- Source/{BIOS => HBIOS}/sd.asm | 26 +- Source/{BIOS => HBIOS}/setup.asm | 0 Source/{BIOS => HBIOS}/simrtc.asm | 2 +- Source/HBIOS/std.asm | 237 + Source/{BIOS => HBIOS}/time.asm | 0 Source/{BIOS => HBIOS}/tty.asm | 0 Source/{BIOS => HBIOS}/uart.asm | 12 +- Source/{BIOS/una.inc => HBIOS/ubios.inc} | 29 +- Source/{BIOS => HBIOS}/util.asm | 207 +- Source/{BIOS => HBIOS}/vdu.asm | 2 +- Source/HBIOS/ver.inc | 5 + Source/{BIOS => HBIOS}/xio.asm | 34 +- Source/HBIOS/z180.inc | 67 + Source/RomDsk/ROM_1024KB/FLASH.COM | Bin 12727 -> 12321 bytes Source/RomDsk/ROM_512KB/FLASH.COM | Bin 12727 -> 12321 bytes Source/RomDsk/mk4_cvdu/RTC.COM | Bin 0 -> 2048 bytes Source/RomDsk/mk4_cvdu/XM-A0.COM | Bin 0 -> 5373 bytes Source/RomDsk/mk4_cvdu/XM-A1.COM | Bin 0 -> 5373 bytes Source/RomDsk/mk4_cvdu/XM5-A0.COM | Bin 0 -> 3072 bytes Source/RomDsk/mk4_cvdu/XM5-A1.COM | Bin 0 -> 3072 bytes Source/RomDsk/mk4_diskio3/FD.COM | Bin 0 -> 7974 bytes Source/RomDsk/mk4_diskio3/FDTST.COM | Bin 7974 -> 0 bytes Source/RomDsk/n8_2312/FD.COM | Bin 0 -> 7925 bytes Source/RomDsk/n8_2312/FDTST.COM | Bin 7928 -> 0 bytes Source/RomDsk/n8_2511/FD.COM | Bin 0 -> 7925 bytes Source/RomDsk/n8_2511/FDTST.COM | Bin 7928 -> 0 bytes Source/RomDsk/n8vem_dide/FDTST.COM | Bin 7988 -> 0 bytes Source/RomDsk/n8vem_diskio/FDCMON.COM | Bin 2371 -> 0 bytes Source/RomDsk/n8vem_diskio/FDTST.COM | Bin 7928 -> 0 bytes Source/RomDsk/n8vem_diskio3+cvdu/FDTST.COM | Bin 7974 -> 0 bytes Source/RomDsk/n8vem_diskio3/FDTST.COM | Bin 7974 -> 0 bytes Source/RomDsk/{n8vem_ci => sbc_ci}/1200.COM | Bin Source/RomDsk/{n8vem_ci => sbc_ci}/38400.COM | Bin Source/RomDsk/{n8vem_ci => sbc_ci}/9600.COM | Bin Source/RomDsk/{n8vem_ci => sbc_ci}/RTC.COM | Bin Source/RomDsk/{n8vem_ci => sbc_ci}/T5.COM | Bin Source/RomDsk/{n8vem_ci => sbc_ci}/VT3.COM | Bin Source/RomDsk/{n8vem_ci => sbc_ci}/XM.COM | Bin Source/RomDsk/{n8vem_ci => sbc_ci}/XM5.COM | Bin .../RomDsk/{n8vem_cvdu => sbc_cvdu}/1200.COM | Bin .../RomDsk/{n8vem_cvdu => sbc_cvdu}/38400.COM | Bin .../RomDsk/{n8vem_cvdu => sbc_cvdu}/9600.COM | Bin .../RomDsk/{n8vem_cvdu => sbc_cvdu}/RTC.COM | Bin Source/RomDsk/{n8vem_cvdu => sbc_cvdu}/T5.COM | Bin Source/RomDsk/{n8vem_cvdu => sbc_cvdu}/XM.COM | Bin .../RomDsk/{n8vem_cvdu => sbc_cvdu}/XM5.COM | Bin .../RomDsk/{n8vem_dide => sbc_dide}/1200.COM | Bin .../RomDsk/{n8vem_dide => sbc_dide}/38400.COM | Bin .../RomDsk/{n8vem_dide => sbc_dide}/9600.COM | Bin Source/RomDsk/sbc_dide/FD.COM | Bin 0 -> 7961 bytes .../RomDsk/{n8vem_dide => sbc_dide}/RTC.COM | Bin Source/RomDsk/{n8vem_dide => sbc_dide}/T5.COM | Bin Source/RomDsk/{n8vem_dide => sbc_dide}/XM.COM | Bin .../RomDsk/{n8vem_dide => sbc_dide}/XM5.COM | Bin .../{n8vem_diskio => sbc_diskio}/1200.COM | Bin .../{n8vem_diskio => sbc_diskio}/38400.COM | Bin .../{n8vem_diskio => sbc_diskio}/9600.COM | Bin .../{n8vem_diskio => sbc_diskio}/ECIDETST.COM | Bin Source/RomDsk/sbc_diskio/FD.COM | Bin 0 -> 7919 bytes .../{n8vem_diskio => sbc_diskio}/RTC.COM | Bin .../{n8vem_diskio => sbc_diskio}/T5.COM | Bin .../{n8vem_diskio => sbc_diskio}/TP-IDE.COM | Bin .../{n8vem_diskio => sbc_diskio}/XM.COM | Bin .../{n8vem_diskio => sbc_diskio}/XM5.COM | Bin .../1200.COM | Bin .../38400.COM | Bin .../9600.COM | Bin Source/RomDsk/sbc_diskio3+cvdu/FD.COM | Bin 0 -> 7974 bytes .../RTC.COM | Bin .../T5.COM | Bin .../XM.COM | Bin .../XM5.COM | Bin .../{n8vem_diskio3 => sbc_diskio3}/1200.COM | Bin .../{n8vem_diskio3 => sbc_diskio3}/38400.COM | Bin .../{n8vem_diskio3 => sbc_diskio3}/9600.COM | Bin Source/RomDsk/sbc_diskio3/FD.COM | Bin 0 -> 7974 bytes .../{n8vem_diskio3 => sbc_diskio3}/RTC.COM | Bin .../{n8vem_diskio3 => sbc_diskio3}/T5.COM | Bin .../{n8vem_diskio3 => sbc_diskio3}/XM.COM | Bin .../{n8vem_diskio3 => sbc_diskio3}/XM5.COM | Bin Source/RomDsk/{n8vem_dsd => sbc_dsd}/1200.COM | Bin .../RomDsk/{n8vem_dsd => sbc_dsd}/38400.COM | Bin Source/RomDsk/{n8vem_dsd => sbc_dsd}/9600.COM | Bin Source/RomDsk/{n8vem_dsd => sbc_dsd}/RTC.COM | Bin Source/RomDsk/{n8vem_dsd => sbc_dsd}/T5.COM | Bin Source/RomDsk/{n8vem_dsd => sbc_dsd}/VT3.COM | Bin Source/RomDsk/{n8vem_dsd => sbc_dsd}/XM.COM | Bin Source/RomDsk/{n8vem_dsd => sbc_dsd}/XM5.COM | Bin Source/RomDsk/{n8vem_mfp => sbc_mfp}/1200.COM | Bin .../RomDsk/{n8vem_mfp => sbc_mfp}/38400.COM | Bin Source/RomDsk/{n8vem_mfp => sbc_mfp}/9600.COM | Bin Source/RomDsk/{n8vem_mfp => sbc_mfp}/RTC.COM | Bin Source/RomDsk/{n8vem_mfp => sbc_mfp}/T5.COM | Bin Source/RomDsk/{n8vem_mfp => sbc_mfp}/VT3.COM | Bin Source/RomDsk/{n8vem_mfp => sbc_mfp}/XM.COM | Bin Source/RomDsk/{n8vem_mfp => sbc_mfp}/XM5.COM | Bin .../{n8vem_ppide => sbc_ppide}/1200.COM | Bin .../{n8vem_ppide => sbc_ppide}/38400.COM | Bin .../{n8vem_ppide => sbc_ppide}/9600.COM | Bin .../{n8vem_ppide => sbc_ppide}/PPIDETST.COM | Bin .../RomDsk/{n8vem_ppide => sbc_ppide}/RTC.COM | Bin .../RomDsk/{n8vem_ppide => sbc_ppide}/T5.COM | Bin .../RomDsk/{n8vem_ppide => sbc_ppide}/VT3.COM | Bin .../RomDsk/{n8vem_ppide => sbc_ppide}/XM.COM | Bin .../RomDsk/{n8vem_ppide => sbc_ppide}/XM5.COM | Bin .../{n8vem_ppisd => sbc_ppisd}/1200.COM | Bin .../{n8vem_ppisd => sbc_ppisd}/38400.COM | Bin .../{n8vem_ppisd => sbc_ppisd}/9600.COM | Bin .../RomDsk/{n8vem_ppisd => sbc_ppisd}/RTC.COM | Bin .../RomDsk/{n8vem_ppisd => sbc_ppisd}/T5.COM | Bin .../RomDsk/{n8vem_ppisd => sbc_ppisd}/VT3.COM | Bin .../RomDsk/{n8vem_ppisd => sbc_ppisd}/XM.COM | Bin .../RomDsk/{n8vem_ppisd => sbc_ppisd}/XM5.COM | Bin .../{n8vem_propio => sbc_propio}/1200.COM | Bin .../{n8vem_propio => sbc_propio}/38400.COM | Bin .../{n8vem_propio => sbc_propio}/9600.COM | Bin .../{n8vem_propio => sbc_propio}/RTC.COM | Bin .../{n8vem_propio => sbc_propio}/T5.COM | Bin .../{n8vem_propio => sbc_propio}/XM.COM | Bin .../{n8vem_propio => sbc_propio}/XM5.COM | Bin Source/RomDsk/{n8vem_rf => sbc_rf}/1200.COM | Bin Source/RomDsk/{n8vem_rf => sbc_rf}/38400.COM | Bin Source/RomDsk/{n8vem_rf => sbc_rf}/9600.COM | Bin Source/RomDsk/{n8vem_rf => sbc_rf}/RTC.COM | Bin Source/RomDsk/{n8vem_rf => sbc_rf}/T5.COM | Bin Source/RomDsk/{n8vem_rf => sbc_rf}/VT3.COM | Bin Source/RomDsk/{n8vem_rf => sbc_rf}/XM.COM | Bin Source/RomDsk/{n8vem_rf => sbc_rf}/XM5.COM | Bin .../RomDsk/{n8vem_simh => sbc_simh}/HDIR.COM | Bin Source/RomDsk/{n8vem_simh => sbc_simh}/R.COM | Bin .../{n8vem_simh => sbc_simh}/RSETSIMH.COM | Bin .../RomDsk/{n8vem_simh => sbc_simh}/TIMER.COM | Bin .../RomDsk/{n8vem_simh => sbc_simh}/URL.COM | Bin Source/RomDsk/{n8vem_simh => sbc_simh}/W.COM | Bin Source/RomDsk/{n8vem_std => sbc_std}/1200.COM | Bin .../RomDsk/{n8vem_std => sbc_std}/38400.COM | Bin Source/RomDsk/{n8vem_std => sbc_std}/9600.COM | Bin Source/RomDsk/{n8vem_std => sbc_std}/RTC.COM | Bin Source/RomDsk/{n8vem_std => sbc_std}/T5.COM | Bin Source/RomDsk/{n8vem_std => sbc_std}/VT3.COM | Bin Source/RomDsk/{n8vem_std => sbc_std}/XM.COM | Bin Source/RomDsk/{n8vem_std => sbc_std}/XM5.COM | Bin Source/RomDsk/{n8vem_vdu => sbc_vdu}/1200.COM | Bin .../RomDsk/{n8vem_vdu => sbc_vdu}/38400.COM | Bin Source/RomDsk/{n8vem_vdu => sbc_vdu}/9600.COM | Bin Source/RomDsk/{n8vem_vdu => sbc_vdu}/RTC.COM | Bin Source/RomDsk/{n8vem_vdu => sbc_vdu}/T5.COM | Bin Source/RomDsk/{n8vem_vdu => sbc_vdu}/XM.COM | Bin Source/RomDsk/{n8vem_vdu => sbc_vdu}/XM5.COM | Bin Source/RomDsk/zeta2_ppide/FD.COM | Bin 0 -> 7961 bytes Source/RomDsk/zeta2_ppide/FDTST.COM | Bin 7961 -> 0 bytes Source/RomDsk/zeta2_ppisd/FD.COM | Bin 0 -> 7961 bytes Source/RomDsk/zeta2_ppisd/FDTST.COM | Bin 7961 -> 0 bytes Source/RomDsk/zeta2_ppp/FD.COM | Bin 0 -> 7961 bytes Source/RomDsk/zeta2_ppp/FDTST.COM | Bin 7961 -> 0 bytes Source/RomDsk/zeta2_std/FD.COM | Bin 0 -> 7961 bytes Source/RomDsk/zeta2_std/FDTST.COM | Bin 7961 -> 0 bytes Source/RomDsk/zeta_ppide/FD.COM | Bin 0 -> 7974 bytes Source/RomDsk/zeta_ppide/FDTST.COM | Bin 7929 -> 0 bytes Source/RomDsk/zeta_ppisd/FD.COM | Bin 0 -> 7974 bytes Source/RomDsk/zeta_ppisd/FDTST.COM | Bin 7974 -> 0 bytes Source/RomDsk/zeta_ppp/FD.COM | Bin 0 -> 7974 bytes Source/RomDsk/zeta_ppp/FDTST.COM | Bin 7974 -> 0 bytes Source/RomDsk/zeta_std/FD.COM | Bin 0 -> 7974 bytes Source/RomDsk/zeta_std/FDTST.COM | Bin 7929 -> 0 bytes Source/{BIOS/UNA => UBIOS}/FSFAT.BIN | Bin 32768 -> 32768 bytes Source/{BIOS/UNA => UBIOS}/UNA-BIOS.BIN | Bin 65536 -> 65536 bytes .../UNA-BIOS.TXT} | 40 + 324 files changed, 8780 insertions(+), 8670 deletions(-) delete mode 100644 Source/BIOS/memmgr.asm delete mode 100644 Source/BIOS/mk4.inc delete mode 100644 Source/BIOS/n8.inc delete mode 100644 Source/BIOS/n8vem.inc delete mode 100644 Source/BIOS/std-n8vem.inc delete mode 100644 Source/BIOS/std.asm delete mode 100644 Source/BIOS/ver.inc create mode 100644 Source/BPBIOS/bpbio-ww.z80 create mode 100644 Source/BPBIOS/cboot-ww.z80 create mode 100644 Source/BPBIOS/deblock.z80.sav rename Source/BPBIOS/{def-z33.lib => def-ww-z33.lib} (94%) rename Source/BPBIOS/{def-z34bnk.lib => def-ww-z33bnk.lib} (94%) rename Source/BPBIOS/{def-z34.lib => def-ww-z34.lib} (94%) rename Source/BPBIOS/{def-z33bnk.lib => def-ww-z34bnk.lib} (94%) rename Source/BPBIOS/{def-z41.lib => def-ww-z41.lib} (94%) create mode 100644 Source/BPBIOS/dpbm-ww.lib create mode 100644 Source/BPBIOS/dph.sav create mode 100644 Source/BPBIOS/dphhd.lib.sav create mode 100644 Source/BPBIOS/fdc-ww.z80 delete mode 100644 Source/BPBIOS/forlib.lib create mode 100644 Source/BPBIOS/hard-ww.z80 rename Source/BPBIOS/{icfg-z33.z80 => icfg-ww.z80} (95%) delete mode 100644 Source/BPBIOS/icfg-z34.z80 delete mode 100644 Source/BPBIOS/icfg-z41.z80 create mode 100644 Source/BPBIOS/iio-ww.z80 create mode 100644 Source/BPBIOS/ramd-ww.z80 rename Source/BPBIOS/{def-ww-mk4.lib => romwbw-mk4.lib} (80%) rename Source/BPBIOS/{def-ww-sim.lib => romwbw-sim.lib} (80%) create mode 100644 Source/BPBIOS/romwbw.lib create mode 100644 Source/BPBIOS/wboot-ww.z80 create mode 100644 Source/BPBIOS/z3base.lib.sav delete mode 100644 Source/BPBIOS/zcpr33.bin delete mode 100644 Source/CBIOS/build.inc delete mode 100644 Source/CBIOS/cbios.bin delete mode 100644 Source/CBIOS/cbios.lst delete mode 100644 Source/CBIOS/n8vem.inc delete mode 100644 Source/CBIOS/std-n8vem.inc delete mode 100644 Source/CBIOS/std.asm rename Source/{BIOS => HBIOS}/Build.cmd (100%) rename Source/{BIOS => HBIOS}/Build.ps1 (81%) rename Source/{BIOS => HBIOS}/Clean.cmd (100%) create mode 100644 Source/HBIOS/Config/mk4_cvdu.asm rename Source/{BIOS => HBIOS}/Config/mk4_diskio3.asm (74%) rename Source/{BIOS => HBIOS}/Config/mk4_propio.asm (74%) rename Source/{BIOS => HBIOS}/Config/mk4_std.asm (67%) rename Source/{BIOS => HBIOS}/Config/n8_2312.asm (74%) rename Source/{BIOS => HBIOS}/Config/n8_2511.asm (74%) rename Source/{BIOS/Config/n8vem_ci.asm => HBIOS/Config/sbc_ci.asm} (79%) rename Source/{BIOS/Config/n8vem_cvdu.asm => HBIOS/Config/sbc_cvdu.asm} (78%) rename Source/{BIOS/Config/n8vem_dide.asm => HBIOS/Config/sbc_dide.asm} (79%) rename Source/{BIOS/Config/n8vem_diskio.asm => HBIOS/Config/sbc_diskio.asm} (79%) rename Source/{BIOS/Config/n8vem_diskio3+cvdu.asm => HBIOS/Config/sbc_diskio3+cvdu.asm} (79%) rename Source/{BIOS/Config/n8vem_diskio3.asm => HBIOS/Config/sbc_diskio3.asm} (79%) rename Source/{BIOS/Config/n8vem_dsd.asm => HBIOS/Config/sbc_dsd.asm} (79%) rename Source/{BIOS/Config/n8vem_mfp.asm => HBIOS/Config/sbc_mfp.asm} (76%) rename Source/{BIOS/Config/n8vem_ppide.asm => HBIOS/Config/sbc_ppide.asm} (79%) rename Source/{BIOS/Config/n8vem_ppisd.asm => HBIOS/Config/sbc_ppisd.asm} (79%) rename Source/{BIOS/Config/n8vem_propio.asm => HBIOS/Config/sbc_propio.asm} (79%) rename Source/{BIOS/Config/n8vem_rf.asm => HBIOS/Config/sbc_rf.asm} (79%) rename Source/{BIOS/Config/n8vem_simh.asm => HBIOS/Config/sbc_simh.asm} (79%) rename Source/{BIOS/Config/n8vem_std.asm => HBIOS/Config/sbc_std.asm} (79%) rename Source/{BIOS/Config/n8vem_vdu.asm => HBIOS/Config/sbc_vdu.asm} (79%) rename Source/{BIOS => HBIOS}/Config/una_std.asm (59%) rename Source/{BIOS => HBIOS}/Config/zeta2_ppide.asm (79%) rename Source/{BIOS => HBIOS}/Config/zeta2_ppisd.asm (79%) rename Source/{BIOS => HBIOS}/Config/zeta2_ppp.asm (79%) rename Source/{BIOS => HBIOS}/Config/zeta2_std.asm (79%) rename Source/{BIOS => HBIOS}/Config/zeta_ppide.asm (79%) rename Source/{BIOS => HBIOS}/Config/zeta_ppisd.asm (79%) rename Source/{BIOS => HBIOS}/Config/zeta_ppp.asm (79%) rename Source/{BIOS => HBIOS}/Config/zeta_std.asm (79%) rename Source/{BIOS => HBIOS}/Make.cmd (100%) rename Source/{BIOS => HBIOS}/MakeBlankROM.ps1 (100%) rename Source/{BIOS => HBIOS}/Old/bioshdr.inc (100%) rename Source/{BIOS => HBIOS}/Old/bootapp.asm (100%) rename Source/{BIOS => HBIOS}/Old/bootgen.asm (100%) rename Source/{BIOS => HBIOS}/Old/bootrom.asm (100%) rename Source/{BIOS => HBIOS/Old}/cbios.asm (93%) rename Source/{BIOS => HBIOS}/Old/fill1k.asm (100%) rename Source/{BIOS => HBIOS}/Old/infolist.inc (100%) rename Source/{BIOS => HBIOS}/Old/loader.asm (100%) rename Source/{BIOS => HBIOS}/Old/osldr.asm (100%) rename Source/{BIOS => HBIOS}/Old/pgzero.asm (100%) rename Source/{BIOS => HBIOS}/Old/rom0.asm (100%) rename Source/{BIOS => HBIOS}/Old/romfill.asm (100%) rename Source/{BIOS => HBIOS}/Old/syscfg.asm (100%) rename Source/{BIOS => HBIOS/Old}/ubios.asm (100%) rename Source/{BIOS => HBIOS}/ansi.asm (100%) rename Source/{BIOS => HBIOS}/asci.asm (84%) rename Source/{BIOS => HBIOS}/bcd.asm (100%) rename Source/{BIOS => HBIOS}/blank1024KB.dat (100%) rename Source/{BIOS => HBIOS}/blank512KB.dat (100%) rename Source/{BIOS => HBIOS}/cvdu.asm (96%) rename Source/{BIOS => HBIOS}/cvdu_font.asm (100%) rename Source/{BIOS => HBIOS}/dbgmon.asm (95%) rename Source/{BIOS => HBIOS}/diskdefs (100%) rename Source/{BIOS => HBIOS}/dsrtc.asm (96%) rename Source/{BIOS => HBIOS}/fd.asm (93%) rename Source/{BIOS => HBIOS}/hbfill.asm (100%) rename Source/{BIOS => HBIOS}/hbios.asm (76%) create mode 100644 Source/HBIOS/hbios.inc rename Source/{BIOS => HBIOS}/hdsk.asm (80%) rename Source/{BIOS => HBIOS}/ide.asm (92%) rename Source/{BIOS => HBIOS}/kbd.asm (96%) rename Source/{BIOS => HBIOS}/loader.asm (56%) rename Source/{BIOS => HBIOS}/makefile (100%) rename Source/{BIOS => HBIOS}/md.asm (94%) create mode 100644 Source/HBIOS/memmgr.asm rename Source/{BIOS => HBIOS}/n8v.asm (96%) rename Source/{BIOS => HBIOS}/n8v_font.inc (100%) create mode 100644 Source/HBIOS/plt_mk4.inc create mode 100644 Source/HBIOS/plt_n8.inc create mode 100644 Source/HBIOS/plt_sbc.inc create mode 100644 Source/HBIOS/plt_una.inc rename Source/{BIOS => HBIOS}/ppide.asm (94%) rename Source/{BIOS => HBIOS}/ppk.asm (94%) rename Source/{BIOS => HBIOS}/ppp.asm (94%) rename Source/{BIOS => HBIOS}/prefix.asm (100%) rename Source/{BIOS => HBIOS}/prp.asm (94%) rename Source/{BIOS => HBIOS}/rf.asm (79%) rename Source/{BIOS => HBIOS}/romldr.asm (93%) rename Source/{BIOS => HBIOS}/sd.asm (94%) rename Source/{BIOS => HBIOS}/setup.asm (100%) rename Source/{BIOS => HBIOS}/simrtc.asm (95%) create mode 100644 Source/HBIOS/std.asm rename Source/{BIOS => HBIOS}/time.asm (100%) rename Source/{BIOS => HBIOS}/tty.asm (100%) rename Source/{BIOS => HBIOS}/uart.asm (93%) rename Source/{BIOS/una.inc => HBIOS/ubios.inc} (58%) rename Source/{BIOS => HBIOS}/util.asm (76%) rename Source/{BIOS => HBIOS}/vdu.asm (96%) create mode 100644 Source/HBIOS/ver.inc rename Source/{BIOS => HBIOS}/xio.asm (65%) create mode 100644 Source/HBIOS/z180.inc create mode 100644 Source/RomDsk/mk4_cvdu/RTC.COM create mode 100644 Source/RomDsk/mk4_cvdu/XM-A0.COM create mode 100644 Source/RomDsk/mk4_cvdu/XM-A1.COM create mode 100644 Source/RomDsk/mk4_cvdu/XM5-A0.COM create mode 100644 Source/RomDsk/mk4_cvdu/XM5-A1.COM create mode 100644 Source/RomDsk/mk4_diskio3/FD.COM delete mode 100644 Source/RomDsk/mk4_diskio3/FDTST.COM create mode 100644 Source/RomDsk/n8_2312/FD.COM delete mode 100644 Source/RomDsk/n8_2312/FDTST.COM create mode 100644 Source/RomDsk/n8_2511/FD.COM delete mode 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sbc_diskio3}/1200.COM (100%) rename Source/RomDsk/{n8vem_diskio3 => sbc_diskio3}/38400.COM (100%) rename Source/RomDsk/{n8vem_diskio3 => sbc_diskio3}/9600.COM (100%) create mode 100644 Source/RomDsk/sbc_diskio3/FD.COM rename Source/RomDsk/{n8vem_diskio3 => sbc_diskio3}/RTC.COM (100%) rename Source/RomDsk/{n8vem_diskio3 => sbc_diskio3}/T5.COM (100%) rename Source/RomDsk/{n8vem_diskio3 => sbc_diskio3}/XM.COM (100%) rename Source/RomDsk/{n8vem_diskio3 => sbc_diskio3}/XM5.COM (100%) rename Source/RomDsk/{n8vem_dsd => sbc_dsd}/1200.COM (100%) rename Source/RomDsk/{n8vem_dsd => sbc_dsd}/38400.COM (100%) rename Source/RomDsk/{n8vem_dsd => sbc_dsd}/9600.COM (100%) rename Source/RomDsk/{n8vem_dsd => sbc_dsd}/RTC.COM (100%) rename Source/RomDsk/{n8vem_dsd => sbc_dsd}/T5.COM (100%) rename Source/RomDsk/{n8vem_dsd => sbc_dsd}/VT3.COM (100%) rename Source/RomDsk/{n8vem_dsd => sbc_dsd}/XM.COM (100%) rename Source/RomDsk/{n8vem_dsd => sbc_dsd}/XM5.COM (100%) rename Source/RomDsk/{n8vem_mfp => sbc_mfp}/1200.COM (100%) rename Source/RomDsk/{n8vem_mfp => sbc_mfp}/38400.COM (100%) rename Source/RomDsk/{n8vem_mfp => sbc_mfp}/9600.COM (100%) rename Source/RomDsk/{n8vem_mfp => sbc_mfp}/RTC.COM (100%) rename Source/RomDsk/{n8vem_mfp => sbc_mfp}/T5.COM (100%) rename Source/RomDsk/{n8vem_mfp => sbc_mfp}/VT3.COM (100%) rename Source/RomDsk/{n8vem_mfp => sbc_mfp}/XM.COM (100%) rename Source/RomDsk/{n8vem_mfp => sbc_mfp}/XM5.COM (100%) rename Source/RomDsk/{n8vem_ppide => sbc_ppide}/1200.COM (100%) rename Source/RomDsk/{n8vem_ppide => sbc_ppide}/38400.COM (100%) rename Source/RomDsk/{n8vem_ppide => sbc_ppide}/9600.COM (100%) rename Source/RomDsk/{n8vem_ppide => sbc_ppide}/PPIDETST.COM (100%) rename Source/RomDsk/{n8vem_ppide => sbc_ppide}/RTC.COM (100%) rename Source/RomDsk/{n8vem_ppide => sbc_ppide}/T5.COM (100%) rename Source/RomDsk/{n8vem_ppide => sbc_ppide}/VT3.COM (100%) rename Source/RomDsk/{n8vem_ppide => sbc_ppide}/XM.COM (100%) rename Source/RomDsk/{n8vem_ppide => sbc_ppide}/XM5.COM (100%) rename Source/RomDsk/{n8vem_ppisd => sbc_ppisd}/1200.COM (100%) rename Source/RomDsk/{n8vem_ppisd => sbc_ppisd}/38400.COM (100%) rename Source/RomDsk/{n8vem_ppisd => sbc_ppisd}/9600.COM (100%) rename Source/RomDsk/{n8vem_ppisd => sbc_ppisd}/RTC.COM (100%) rename Source/RomDsk/{n8vem_ppisd => sbc_ppisd}/T5.COM (100%) rename Source/RomDsk/{n8vem_ppisd => sbc_ppisd}/VT3.COM (100%) rename Source/RomDsk/{n8vem_ppisd => sbc_ppisd}/XM.COM (100%) rename Source/RomDsk/{n8vem_ppisd => sbc_ppisd}/XM5.COM (100%) rename Source/RomDsk/{n8vem_propio => sbc_propio}/1200.COM (100%) rename Source/RomDsk/{n8vem_propio => sbc_propio}/38400.COM (100%) rename Source/RomDsk/{n8vem_propio => sbc_propio}/9600.COM (100%) rename Source/RomDsk/{n8vem_propio => sbc_propio}/RTC.COM (100%) rename Source/RomDsk/{n8vem_propio => sbc_propio}/T5.COM (100%) rename Source/RomDsk/{n8vem_propio => sbc_propio}/XM.COM (100%) rename Source/RomDsk/{n8vem_propio => sbc_propio}/XM5.COM (100%) rename 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(100%) rename Source/RomDsk/{n8vem_std => sbc_std}/RTC.COM (100%) rename Source/RomDsk/{n8vem_std => sbc_std}/T5.COM (100%) rename Source/RomDsk/{n8vem_std => sbc_std}/VT3.COM (100%) rename Source/RomDsk/{n8vem_std => sbc_std}/XM.COM (100%) rename Source/RomDsk/{n8vem_std => sbc_std}/XM5.COM (100%) rename Source/RomDsk/{n8vem_vdu => sbc_vdu}/1200.COM (100%) rename Source/RomDsk/{n8vem_vdu => sbc_vdu}/38400.COM (100%) rename Source/RomDsk/{n8vem_vdu => sbc_vdu}/9600.COM (100%) rename Source/RomDsk/{n8vem_vdu => sbc_vdu}/RTC.COM (100%) rename Source/RomDsk/{n8vem_vdu => sbc_vdu}/T5.COM (100%) rename Source/RomDsk/{n8vem_vdu => sbc_vdu}/XM.COM (100%) rename Source/RomDsk/{n8vem_vdu => sbc_vdu}/XM5.COM (100%) create mode 100644 Source/RomDsk/zeta2_ppide/FD.COM delete mode 100644 Source/RomDsk/zeta2_ppide/FDTST.COM create mode 100644 Source/RomDsk/zeta2_ppisd/FD.COM delete mode 100644 Source/RomDsk/zeta2_ppisd/FDTST.COM create mode 100644 Source/RomDsk/zeta2_ppp/FD.COM delete mode 100644 Source/RomDsk/zeta2_ppp/FDTST.COM create mode 100644 Source/RomDsk/zeta2_std/FD.COM delete mode 100644 Source/RomDsk/zeta2_std/FDTST.COM create mode 100644 Source/RomDsk/zeta_ppide/FD.COM delete mode 100644 Source/RomDsk/zeta_ppide/FDTST.COM create mode 100644 Source/RomDsk/zeta_ppisd/FD.COM delete mode 100644 Source/RomDsk/zeta_ppisd/FDTST.COM create mode 100644 Source/RomDsk/zeta_ppp/FD.COM delete mode 100644 Source/RomDsk/zeta_ppp/FDTST.COM create mode 100644 Source/RomDsk/zeta_std/FD.COM delete mode 100644 Source/RomDsk/zeta_std/FDTST.COM rename Source/{BIOS/UNA => UBIOS}/FSFAT.BIN (60%) rename Source/{BIOS/UNA => UBIOS}/UNA-BIOS.BIN (56%) rename Source/{BIOS/UNA/UNA-BIOS user manual.TXT => UBIOS/UNA-BIOS.TXT} (91%) diff --git a/Doc/Flash4.txt b/Doc/Flash4.txt index 358151aa..c0308a34 100644 --- a/Doc/Flash4.txt +++ b/Doc/Flash4.txt @@ -1,169 +1,182 @@ - - FLASH4 (c) 2014 William R Sowerbutts - http://sowerbutts.com/8bit/ - -= Warning = - -FLASH4 has been tested and confirmed working on: - * SBCv2 - * N8-2312 - * Mark IV SBC - -However it remains somewhat experimental. If it works for you, please let me -know. If it breaks please also let me know so I can fix it! Until it is more -widely tested please ensure you have some other means to reprogram your flash -ROM before exclusively trusting FLASH4. - - -= Introduction = - -FLASH4 is a CP/M program which can read, write and verify Flash ROM contents to -or from an image file stored on a CP/M filesystem. It is intended for in-system -programming of Flash ROM chips on N8VEM Z80 and Z180 systems. - -FLASH4 aims to support a range of Flash ROM chips. Ideally I would like to -support all Flash ROM chips that are in use in Z80/Z180 N8VEM machines. If -FLASH4 does not support your chip please let me know and I will try to add -support. - -When writing to the Flash ROM chip, FLASH4 will only reprogram the sectors -whose contents have changed. This helps to reduce wear on the flash memory, -makes the reprogram operation faster, and reduces the risk of leaving the -system unbootable if power fails during a reprogramming operation. FLASH4 -always performs a full verify operation after writing to the chip to confirm -that the correct data has been loaded. - -FLASH4 is reasonably fast. Reprogramming and verifying every sector on a 512KB -SST 39F040 chip takes 21 seconds on my Mark IV SBC, versus 45 seconds to -perform the same task using a USB MiniPro TL866 EEPROM programmer under Linux -on my PC. If only a subset of sectors require reprogramming FLASH4 will be -even faster. - -FLASH4 works with binary ROM image files, it does not support Intel Hex format -files. Hex files can be easily converted to or from binaries using "hex2bin" or -the "srec_cat" program from SRecord: - - $ srec_cat image.hex -intel -fill 0xFF 0 0x80000 -output image.bin -binary - $ srec_cat image.bin -binary -output image.hex -intel - -FLASH4 can use three different methods to access the Flash ROM chip. The best -available method is determined automatically at run time. Alternatively you may -provide a command-line option to force the use of a specific method. - -The first two methods use bank switching to map sections of the ROM into the -CPU address space. FLASH4 will detect the presence of RomWBW or UNA BIOS and -use the bank switching methods they provide. - -If neither RomWBW nor UNA BIOS is detected and the system has a Z180 CPU, -FLASH4 will use the Z180 DMA engine to access the Flash ROM chip. This does not -require any bank switching but it is slower and will not work on all platforms. - -Z180 DMA access requires the flash ROM to be linearly mapped into the lower -region of physical memory, as it is on the Mark IV SBC. The N8-2312 has -additional memory mapping hardware, consequently Z180 DMA access on the N8-2312 -is NOT SUPPORTED and if forced will corrupt the contents of RAM; use bank -switched access instead. - -Z180 DMA access requires the Z180 CPU I/O base control register configured to -locate the internal I/O addresses at 0x40 (ie ICR bits IOA7, IOA6 = 0, 1). - - -= Usage = - -The three basic operations are: - - FLASH4 WRITE filename [options] - -This will rewrite the flash ROM contents from the named file. The file size -must exactly match the size of the ROM chip. After the write operation, a -verify operation will be performed automatically. - - FLASH4 VERIFY filename [options] - -This will read out the flash ROM contents and report if it matches the contents -of the named file. The file size must exactly match the size of the ROM chip. - - FLASH4 READ filename [options] - -This will read out the entire flash ROM contents and write it to the named -file. - -If your ROM chip is larger than the image you wish to write, use the "/PARTIAL" -(or "/P") command line option. To avoid accidentally flashing the wrong file, -the image file must be an exact multiple of 32KB in length. The portion of the -ROM not occupied by the image file is left either unmodified or erased. - -One of the following optional command line arguments may be specified at the -end of the command line to force FLASH4 to use a particular method to access -the flash ROM chip: - - /ROMWBW - /UNABIOS - /Z180DMA - -If no option is specified FLASH4 attempts to determine the best available -method automatically. - - -= Supported chips and features = - -FLASH4 will interrogate your flash ROM chip to identify it automatically. -FLASH4 assumes that you have a single flash ROM device and it is located at the -bottom of the physical memory map. - -FLASH4 does not support setting or resetting the protection bits on individual -sectors within Flash ROM devices. If your Flash ROM chip has protected sectors -you will need to unprotect them by other means before FLASH4 can erase and -reprogram them. - -AT29C series chips employ an optional "software data protection" feature. This -is supported by FLASH4 and is left activated after programming the chip to -prevent accidental reprogramming of sectors. - -The following chips are supported: - - AT29F010 - AT29F040 - M29F010 - M29F040 - MX29F040 - SST 39F010 - SST 39F020 - SST 39F040 - AT29C512 - AT29C040 - AT29C010 - AT29C020 - -The following chips are supported but have unequal sector sizes; FLASH4 will -only erase and reprogram the entire chip at once rather than its normal -sector-by-sector operation: - - AT49F001NT - AT49F001N - AT49F002N - AT49F002NT - AT49F040 - -If you use a flash ROM chip that is not listed above please email me -(will@sowerbutts.com) and I will try to add support for it. - - -= Compiling = - -The software is written in a mix of C and assembler. It builds using the SDCC -toolchain and the SRecord tools. A Makefile is provided to build the executable -in Linux and I imagine it can be easily modified to build in Windows. - -You may need to adjust the path to the SDCC libraries in the Makefile if your -sdcc installation is not in /usr/local - - -= License = - -FLASH4 is licensed under the The GNU General Public License version 3 (see -included "LICENSE.txt" file). - -FLASH4 is provided with NO WARRANTY. In no event will the author be liable for -any damages. Use of this program is at your own risk. May cause rifts in space -and time. + + FLASH4 (c) 2014 William R Sowerbutts + http://sowerbutts.com/8bit/ + += Warning = + +FLASH4 has been tested and confirmed working on: + * N8VEM SBCv2 + * N8VEM N8-2312 + * N8VEM Mark IV SBC + * DX-Designs P112 + * ZETA SBC v2 + +However it remains somewhat experimental. If it works for you, please let me +know. If it breaks please also let me know so I can fix it! + + += Introduction = + +FLASH4 is a CP/M program which can read, write and verify Flash ROM contents to +or from an image file stored on a CP/M filesystem. It is intended for in-system +programming of Flash ROM chips on Z80 and Z180 systems. + +FLASH4 aims to support a range of Flash ROM chips. Ideally I would like to +support all Flash ROM chips that are in use in Z80/Z180 N8VEM machines. If +FLASH4 does not support your chip please let me know and I will try to add +support. + +When writing to the Flash ROM chip, FLASH4 will only reprogram the sectors +whose contents have changed. This helps to reduce wear on the flash memory, +makes the reprogram operation faster, and reduces the risk of leaving the +system unbootable if power fails during a reprogramming operation. FLASH4 +always performs a full verify operation after writing to the chip to confirm +that the correct data has been loaded. + +FLASH4 is reasonably fast. Reprogramming and verifying every sector on a 512KB +SST 39F040 chip takes 21 seconds on my Mark IV SBC, versus 45 seconds to +perform the same task using a USB MiniPro TL866 EEPROM programmer under Linux +on my PC. If only a subset of sectors require reprogramming FLASH4 will be +even faster. + +FLASH4 works with binary ROM image files, it does not support Intel Hex format +files. Hex files can be easily converted to or from binaries using "hex2bin" or +the "srec_cat" program from SRecord: + + $ srec_cat image.hex -intel -fill 0xFF 0 0x80000 -output image.bin -binary + $ srec_cat image.bin -binary -output image.hex -intel + +FLASH4 can use several different methods to access the Flash ROM chip. The best +available method is determined automatically at run time. Alternatively you may +provide a command-line option to force the use of a specific method. + +The first two methods use bank switching to map sections of the ROM into the +CPU address space. FLASH4 will detect the presence of RomWBW or UNA BIOS and +use the bank switching methods they provide. + +On P112 systems the P112 B/P BIOS is detected and P112 bank switching is used. + +If no bank switching method can be auto-detected, and the system has a Z180 +CPU, FLASH4 will use the Z180 DMA engine to access the Flash ROM chip. This +does not require any bank switching but it is slower and will not work on all +platforms. + +Z180 DMA access requires the flash ROM to be linearly mapped into the lower +region of physical memory, as it is on the Mark IV SBC (for example). The +N8-2312 has additional memory mapping hardware, consequently Z180 DMA access on +the N8-2312 is NOT SUPPORTED and if forced will corrupt the contents of RAM; +use one of the supported bank switching methods instead. + +Z180 DMA access requires the Z180 CPU I/O base control register configured to +locate the internal I/O addresses at 0x40 (ie ICR bits IOA7, IOA6 = 0, 1). + + += Usage = + +The three basic operations are: + + FLASH4 WRITE filename [options] + +This will rewrite the flash ROM contents from the named file. The file size +must exactly match the size of the ROM chip. After the write operation, a +verify operation will be performed automatically. + + FLASH4 VERIFY filename [options] + +This will read out the flash ROM contents and report if it matches the contents +of the named file. The file size must exactly match the size of the ROM chip. + + FLASH4 READ filename [options] + +This will read out the entire flash ROM contents and write it to the named +file. + +If your ROM chip is larger than the image you wish to write, use the "/PARTIAL" +(or "/P") command line option. To avoid accidentally flashing the wrong file, +the image file must be an exact multiple of 32KB in length. The portion of the +ROM not occupied by the image file is left either unmodified or erased. + +If you are using an ROM/EPROM/EEPROM chip which cannot be programmed in-system, +FLASH4 will not be able to recognise it, however the software can still +usefully READ and VERIFY the chip. Use the "/ROM" command line option to enable +"READ" or "VERIFY" mode with unrecognised chips. This mode assumes a 512K ROM +is fitted; smaller ROMs will be treated as a 512K ROM with the data repated +multiple times -- with a 256K chip the data is repeated twice, four times for a +128K chip, etc. + +One of the following optional command line arguments may be specified at the +end of the command line to force FLASH4 to use a particular method to access +the flash ROM chip: + + /ROMWBW For ROMWBW BIOS version 2.6 and later + /ROMWBWOLD For ROMWBW BIOS version 2.5 and earlier + /UNABIOS For UNA BIOS + /Z180DMA For Z180 DMA + /P112 For DX-Designs P112 + +If no option is specified FLASH4 attempts to determine the best available +method automatically. + + += Supported chips and features = + +FLASH4 will interrogate your flash ROM chip to identify it automatically. +FLASH4 assumes that you have a single flash ROM device and it is located at the +bottom of the physical memory map. + +FLASH4 does not support setting or resetting the protection bits on individual +sectors within Flash ROM devices. If your Flash ROM chip has protected sectors +you will need to unprotect them by other means before FLASH4 can erase and +reprogram them. + +AT29C series chips employ an optional "software data protection" feature. This +is supported by FLASH4 and is left activated after programming the chip to +prevent accidental reprogramming of sectors. + +The following chips are supported: + + AT29F010 + AT29F040 + M29F010 + M29F040 + MX29F040 + SST 39F010 + SST 39F020 + SST 39F040 + AT29C512 + AT29C040 + AT29C010 + AT29C020 + +The following chips are supported but have unequal sector sizes; FLASH4 will +only erase and reprogram the entire chip at once rather than its normal +sector-by-sector operation: + + AT49F001NT + AT49F001N + AT49F002N + AT49F002NT + AT49F040 + +If you use a flash ROM chip that is not listed above please email me +(will@sowerbutts.com) and I will try to add support for it. + + += Compiling = + +The software is written in a mix of C and assembler. It builds using the SDCC +toolchain and the SRecord tools. A Makefile is provided to build the executable +in Linux and I imagine it can be easily modified to build in Windows. + +You may need to adjust the path to the SDCC libraries in the Makefile if your +sdcc installation is not in /usr/local + + += License = + +FLASH4 is licensed under the The GNU General Public License version 3 (see +included "LICENSE.txt" file). + +FLASH4 is provided with NO WARRANTY. In no event will the author be liable for +any damages. Use of this program is at your own risk. May cause rifts in space +and time. diff --git a/Doc/Source/RomWBW Architecture.docx b/Doc/Source/RomWBW Architecture.docx index e36a9b2e22c02da32ec8a4ca3dacdd30b8c94af8..026bf8c51f1257b884a80f3dc24cf2a3e82f03c3 100644 GIT binary patch delta 39433 zcmV(-K-|Cl;19#z53n5y3edN0NvM7R09E3XCkiNkNMccM=Z<|_FQ>iJNqlW5>7Jd% zfRbpN9f{N>DLd}P0`njC(*k?{-29R~kE&u7U!p8Ic6!t^h;2TKr%s*sId$q!|Mqo0 zvu@om@&f;8&wgFovs`}?Og;blXz%0Y$*b<36~&G}b!LI@9_`(`(cZru|JVQWr@J@P zV6vQlyMAoJ5PtOLZZSF9yNTn)n}dUBa^udO==I#2gh3Qs#jhv9{2;ix@+R)VT@X$W z>NUGYzb(RG;zkjCZ{Ya1PP8Y6n`cK07OoFBuYz#y#PDZ$eK2>zFU!R%7=7Wy-q@RY z@jZ-PYs+DRqrGM5zY#;cQUKvAZx|r)L%tDzR{1W!G87n~FCK*M3}6WS=*C+l(|G7; zaPvkEa$7cu+xbjBcek*co2|hxbnf6sGGG<(r~J}<#*mkfXxA#N2o9m%r~-odO$o`| z@%-e&4?>NGT)Va20QK|$i|fr6=WQ4)7s+VeW}}_@U({I0*=vj?7FnNKv>7lLH_ifo zIB-6Bb9(Iup);NVM6hHQVBJEp-a7_~GY+Qr_%oWu;>THtzl7q)N#Mtkb@#?~qPQ1% z&LuzswWp5uT>sU_3%qxr#`31{#H}*}nP@i~hmB6BeaLTv z*gJE=_`~>D?XS1aZ03gd@|{5dBGo#7bFM*J>Mwotz5iIc{2_gu18p+!%gCReh4dc$ zF@Q;dRKUOD@l5>SN8y*nSqLAUxmWQ?7|bu-uQ5Q}?d-wD(7V3LUcCvz-+KN8egI;e z@ESRUNBa3<;eybm*W|Td_*xt+cph-=Gu#56tlNziJ$1hT6fY*RdY}(03krpQ{t6Zn zCAi8n7vG3}JKAfs>9>V5ftPFe`y`klNQeD?zja6hUyqKLx=TiH2IUN26YOVHBT#2RI7;IdjBc$xWF0a*jrXye}`%BYyB>AIu2#*C+nV zPGC?p{WkQb`0F+NgfSTQX6>+*JS!iGk@~@SnV!SIwc)VU@1GFu!==j*uMK*2yWc1A z@eRa=GxHoAicojy#XvwzTZuSnv|0_jDTRp>JAKbba|<3=gzlC1^_{bSSis*PQCYb9 zQSIoDt5qP7<`)n+Li4$?gJT~|g3x^ha(3Z{vFApA6aw3iY&GU$8O~UbPY&FfizY~P zV86Bx{)m|T3Wn9q(cS?-@dgJwQ)B%P`+ve!`%R3~gg=NuVtC{v!sh_F=u*v;Vh{8z7??lNmvnw^U9v@jSUs&aZNv zauyM9j>I*RfB0bTo0Et*SX}OVQ?c&RZ*uKAb$Ml=7Fk})P{*&%tN(tcQwPsYO(`YX zC;YEqf{Bo_8bdqFIFJk=9z)4dK>X)J_sUt$;_RI>?Gg+g{_di>`aB}0t?j&A@E-f`b#ZwcDFG)#}5C6$`dAN1N z;$xEDNw)^#&LF+!u+i+**Co9Koy}SnoqR1z1qBj+oxxHv{bD&Ld6zHNTf&t1J&5&a zIsO&s@DT+&W8M&dgL!oO;Dw8i-*-Qa-dQj=oJpFU@;E33LG!THYi|I-nCGat`x6IR ztomyMnDkc@4te0bJEfxINn`~03pPl-92qgPJB{JckP+fx8ss4|qTbD7iLaGwigiW+ zt9LdX+&G9v@!KU~V(g+*C7#^u3*eH(A-ZqK-_rX4aT2+I;jO!OY+dv|jfTC;k!Ah$ z2W#&g{AW#HTKDkZ9$flw*1OU9+tJB~^LM>V3x`$XZ3DQ1=|}Fu37wcEWG;Eb(%Q9- zPTqb1EE-&iFRlYaeEeY&2V-!y>o2W(&2FaoYTL7O{b@3>JjTKw?53}0ooTfGlxEAA z{~bj1lYCr%iJ?Zjb#h3~UDnf0E??X@Qy3OzwDxkQcyf$i7U2cZfH`Q-m*A`1JOiDH zkC%f^2WgD@!2x;jt`j84_OCmc7_7GMH#oYqac9t`6aUI~o(23ghy_;78X%draU*C$#uj zPSB7ZOlBz%I?cL096S&N3U+!mX8m=oOwRRs2mZ> z{M%)JFlp9mpaBk>O=4FMP1bviFwr+k7V(U%ofcTwtsXxt&|<9LkMgTU_#|y~3kdMs zyR;h0`Fbu-fK}y=fApqP*EdIYP%v+8xXNq2>4#R)$yx91=zMfy8Ow(RQ$#A80rc1i zTxt6}Xzh>d+a{-q#*JdMwS}SZ`{|AEOc<_zk}ecNe;Vo1cP3x1!(i!8ck<=o@};$t zFFX12eB}!z8lOhKymfsybY|Ajjl65$x`>h1uJ3ok=HbGoy%RPmB5Uk~&GQj9ToUpm z!sdMG$KKqv-nn!5xb>5BA1uun{Wi$$pGeencA_RlVwq_0PSiY|sOdhPsJXb0Vs~zT z^@AYBWFXcY?gY)l1xGELd(yHyGONy%6 zJL&R#qze`BJdx3~Sj@Z$8%aAUvze5!cT(n`LCSomu33xff1gImyboe`7xmddwA6Q^ zWhYvmuV|r7Mo%MJhM|Ysz25~>ceax-50@~ForFnImbs7T@xb3nm_MzSFi%*2R*Wm< zOkxl+2i9o5{iJa#na-Oi}c<4o6QqpF)lQ!y!he(@UC2&UC{4RHGey7rg+dMx}DX{CztV`Ut zIhX~LFV_C~ME@)OSUD&q%~PVZpG`RLdGtKZ>2GdAO+Al?SIqP2;(yyel<{XNdW` zNX5yK2YLKd5wfyF2@DW_2X<$`)pltR#T|M>Fn>y9?GA&;I}9R)V0+L)8EOjFQKQkY zhq*ea2Wp6*#yfNZjTk{&2vaSI(*#I0C7_Oj;0qo}d=Wb#p1J5vkHmS04x(4@Hq> z&}(#Gzfv>&?87rI^8QC@y&z|s!v>haJo3VXb}dt;3`L! zW8rbjGdFgvD=(biIiYKbQ>v^hpb%#^6U~mSzjSM_#!lo;t%z*i2(CJ@g>N{wppxi- z3D2iz`K+cvFrP1dFTS_-BiFUWSyn}&h8I@Mf}kys>8Sw{%^ec%!qaJK(FlL1(QY5M zg#1{knRQtyX5n{#Z{7K;Xgqnn7~ciqmk3YBH6Sy^n_7VvuPtljOm31MQWBkNQ3&zY zmE(o8du!%|uol?0WzKfMK5&kQ9ir}ES}nW&=e`AxW2-70S*$PI4elZf3C=jZEDP4-^*lrOr1-N;oNyZ zi3q3zB<5Jr94QmALPRKTL}}VE^w{vwuC-Z@6?_^=H$6hhPqu{EeS`a=fscoIxqT)v0|5H$>AXLEc{J;(4sI>)#0tT%`L5Vx3h*wKkWrZZ10fQ)f>N_vKvHT#u z!8_w6qo5jH3Owe}rFo}ZN-Bv6D4Z<;5pTBqWo@~Ca~0E1Ai~bT;JXf;#f@+gmUChG z&TjEEU3yNOKm_+r)fqvglMd7iDHW^&7erjkg+;`+k7NZlv9mB^8Q=Fzd)Am(l-c88 z>W-J!K+B+*g79}VP2StJ|DzL5iD>c97lMaLIxH8900apNdE}&9FjOou5>Z2gHe%*G zJ@`O>JRbPf4pI7!$UvDo8Iif~f~)~8GdMeVXVqWVQKkOnVhH%OU)#SkUI6tUzXByn zbG`CruE2rNp@E{%Y^{|Y+nTJPmco9|WiOzA-!ZHj5EHydHWHXu@B~<6E-Zcp%&+NDn~!hV zqb3(2>ruCaN1Y2J6F}hsN?CVW!LbSzm1nIHA^63>UmrmROw?)LKn1waGj9%8rZ25_ z^Uszuoq|+~tkChLolNYBlt8pAA0Qb9k_iaVnIK06QzG+-cv^d*qK7ZWeZSeL#GSb#=RYskRq=7D zP}aYHoVZqtoBIg8+0^0^lf#me`XToVMTo zh#0}d@zmp?WrrHBmbjg$NyqQAipN)-{DjO zAom*&WGk`5%K|DuuoPCsbW!koi18_^X^^FXHMv>(Un1~m;4@KaW_H-C*^Qc5IbcPF z>IPui1(5RL0En#~D1AI#$w5&Jj8^uUzTL9>UGW)boz)S_2iD>rfB(OK)u}LlG+h!g zaph0XBkh9?%jv}_Qp7+0{{QCA;vawiPmnH3C#Khe5pPPF5>yn-Sv5>Y@BfQZ?<7_4 zK;;K_BJcx`0QEZ4Uzem00ZI(8N;R*{lMKc9w7g@id(Hw|3fU=h=>&9b;x#ED!G;}Z zZ{TSBLb7-%w8L!BDi+p%12&CchKnGoOhX0W?c>)NL#0%|no>x*pxq0)rGQAp1T&M{ z?8BuLz8VGIrYzz_$kWKt1=GIrzLt0AuP{eM9Y_oZ@u!HhY|O*1-EOn-5g#)ZZwLZ0 zknduseqlj69CxwB31u}boGoV0vXp#*ft4fNb z&PtnhRag+66oi~YU%~*Imk`C6hZOuFRwrxQk0JPo= z`3MM*;v>JwAPS~`H%SMnbv^IB<21{{op@K^nhUYd(Us^9=pSDesF?&|2p$EEW8I-X z_FZ?19t8*2^_V(;8IApM6gz(Gkr6{NdonFi^8+LR0I+%Aoj6N8zeM@13(gCW=i-BU zRUW@%-Qqd&oFuq)LeFJ~xU!^>Zpa$sMDs&P#x6KONH{Tn`1+Vd@aCx6VR|@a41Boc z?i)0LDav5BBtIXXDg$&>Yo2suEJgFS)**ew;XGr}6@KNbH($=#3q&+3CvECd<3FMU zG%GPIAaf(mtXfPZMcpfNZ8kV{B7*fwcj6#t%gsH5SI=E_mFh;1F_apTl-3Y3Nh1D9BK} zG$vSayhi7Q_?9!JWz?xHxkx%jH{RUZ&*cI1ZNHXU9>#DP8?=m(0E3J^oFWVTU}4o; zZEJiVvm8bBpk_$UFTsPa!Z-_1LWE0{u%!&Cky}20Fu;8tieB=40fA}-MV5uLE9fXj z7!y^38=dk+n#9%@AM6w0@Cnk`9h!u>L`ZQfFXk{=&X}0i z5!n-tX^{YDSW&=E@IW_m2&6hLvSfQEX5zwXb6AZHMG_fcVWoX|DoFc@?LpkN6Kl8p|S;_I%(n%)aGwGx!te=dJ92hiRMY81!pq!nhpY%Tw?wWeb_XZ zB1&@O0O_cr44J7bLvU@>95kg)ze?3Gtyt6)3+}tGuV24pKcgWOC5E*#pi-58FD9kg zRO5;W4uInln68M7UEwl_ia{6+RSfBRQfZiVhtWWG%UFi*qP}(DMHM~be7pBs>d@63 zOd>q&7J(1H#OQ#4io6B^&=TYAV63xFMexv?(8Lr+L;|eImEjp0qXGey)A}{Qy=g!`xQ|iH@AeG_xtB91qTem|Km4PAJ@3kzdA>Ugojc!J zcwgPwPw?kwZwhjj>I2o2(QlVj2+H8II^;c&;0nRVyjN?OtBV^fvOog>Bm zXiEv07QsD#MH8iim>7>^k=deML14^~9l_BM^yl$)GYeS?ey?^|FZKS&3qgx2cUs^a zilCq{f9`HP&RHTn5l{rj9%Mb3VMlM|whZigYiPPH6&I9ftqduv1JP%+ZZ_Lz*>a4M zH&?}g4d!6-sPi(SajRRYXn6j*oTGCYplORWVIXIJJb%f7HKM8ovy_SHatITeQ|727 zIZ0zgauk-6(W5`0=tJ`sh#|>eC*^yM2x6|3|r;10kIvRxy#-S?uLVzg7wGV z8<-+sZRhw@<$2Iy-|n8Ui4`A%CBs=PWkTcYH=seZ@+q*3uxJr*>wB1M#?&)Hthpyu zeWyl$x6$n67U2r8o|1~|A_gH?)+^(zBP zS55`Y-jK2yr-6r? z01#uL<45SLvG(UQBRPd?B+;+ z7Lik7KczRgCZyWVSCc)qBTJLu6s`wv=r!~wSyghMZ#En&GJPsGB-6u!mohK#o-qnJXfp}w z_#$%Vj4`D_xllACH3V`+FposW#gY<#V>uhg`2!OQ0b;(yzZV7ou>i;1a2Sjee~|e} z9krN$6CX{!DX50I7w$-$aJ&(BX-THcFk~+RcU+1AQI~H;Uc6+a-cfu#`4Vnf%bk{# z-)_!EJB9#dgV3t*X)3c1?);QmiNgt|Fcx7RM66Fl2a6pCN8@p5aIFExta&t4al^SvGZN*{X+`j%A=%&2EYWvdqEXd z5@wpjjPR_APr?0wcNgUCp^X@Sa>1sPSZN3_N95NiSS_X-^UgYSqqsLov&-cEeuhJs zb6(_?oQ5uG0c|9q1Le5Hml@pRrepDl=E930Duwfzlgp^0+p9MYr9}$VluM4sy(9}r z>$b*-nOZEqApxGdSTpZMbFo*m>c|BYjN7ZQvK6Ji+`Oxy6=@o?FhYudQK>LkmboaU z0tcYG8Muzqd$q7;F^A7yrr;IrQ*wTMS#9}ZxAba>!ugG5zpzSCX{a<8_c4MedMBy? z5WEesWsujHJYLl6*P$~feZlTNP6`tNU@g0_m=tHTk!dJ5@#kR$L z5XJm;&ID#{w>S~MVK9+@jt|ZT6Az92P>+*tQ)(6n3+;Yg%)pH`^QfpRbTiH+J|sL- z!OYkN$}X49qt;<(MXtZ}{Xw%?mxLm>e32lK3mBoBC4u&|4c@#7F*SHL7@FQloc`(q zYAUqXh52W6Q)`}dZSGYN=X6seXtdsGq8!@jokrL2(>(fvnkj03K(6YMNc|Dd-K$2+ zZo+@H$|vT0TSPqPwaE5mTvuWwJr;Mp0ypUuNaRqAU~#7)Y_x8tRgLIlWSf zODk$N&@t2bpswOVT79kzcq3MmT@o#)yfs8yn~UQb}jKU zzE6h1y<#(Ec^E$Cig3qpWcNf%(fAmL-~$vN z0H}BhgjKN}RKi(-$OT?FAymOZ)8fKr1wP|{B3OnK;j@D4j%x!1_1cN%nOIPj zd2-pr6X`h$sAu(@FfIjVSA-$5`i_eIa_3&0E6rhutcCNLLsICC8%&8FKh_|>1f7=z z=DC|G^@vOM10#9+BH$=?C~DK&$C~>jYW#YDa*ADZ8b}3?u{SN%J|}&RXfRZ`NyYFB z6~x7V=TR|m5afV@B-|53`#O=7;O3;Y9elDcW7#ZMN#D#|9+g7CEEI7sh;OBrOKc?~ z(#;QS3Bt~Rl2qiVds%$++yfd?q%iyUfJ!Qud1BFdX_tp!R(JYA^Wg>#4 z8z}1#gX*_yH9&BZBT}Eyam1ablem`JWi`fs!dLbDLWNnRAkRqvXd4a} zP9y?f9_|{M;t$Pm$u-KbnAw{-DkdR?BqvM~;@}x8+)^#`qc8o1s8naojbL!~xL6u% z->5oyAOsssYhZy-z(EjPpcw?ZVU{+> zP`~=OSU_xH10;(!k5MB?dTiV7VV3&j7VP!3JuIfs_NxKRZE0ZcsrY6s4XAuPtL#P9 zyP^;SM#dA0$JLdaG7ysI;IupWg?>4I6V^6;ZN0&)+(J;$U^btrF0eQZBtOz6l{HX3 zLr?rs%CJ0dMj|QdF-El~A-1}tDmiY5LP;a7St1TDiYD}GG!WMEWCQXF;1aw``;k^t zq9_KZ9?A5t4h%lP031@@FcnVzKCWma9nH2V*3B+C;dR zIoKmch}Hq=5w3&a?Cjj}y#<}L3pR;fhN%+ZTE-Q$iq;ny*@ZaF1=0}J1Y^~Ls8SfF z-L2bpdaF;d$6`J%wo$1sSTX8hgNh8PVI^3N(i({6P1jm932CG2pc*JE&LeNmD7rCeStiG*(|Jsd}{izy5 z$@I3^?=NGn#1+{VVwf*yu$8TkPl~1|ZqjH8+n#e)9TPfpH^%7;pTWb_e)Y?!5%CRse(or<-DT=E8R#Q_x{l8-HVY)kylIQQUw#jP=kbF*rX^ZLxWE3 z)6v@(pGrDDBs4|EUAjpitqN-4gKN)ynDQx!N_tBA*E}Ftfz1SeH|M za?CJJ1|Bw&^O@Q7_I+wY3=W_~foYL!UGcPPo%V^D4BVdLvGWfJYso{x ziZxHZ@r=ntXM$%S9atmWhDdVipuAqc)fo(um_m+{qm#1BhA2a63AEM){KP(XD>bLu z%(rz>b?U2@*hGDQ>KFtpze5Sk9y*cc4G2<<8H(!Ci9)tV2Rd;G^rdVWfZA3b24ptp zV;zdh6PaK2bHJw50cF=fu$Q4*+v8kVBgV&>7k3T1lxIazn+4=}PDaS{Z+Q0kQ%rQX z*eiGX;pZ}Vdx!OIPi`2>JXtc0pY<;>_mlm?yPQNbCIzB@=q&)cp3YIYq`IZV%-|EG zT%Q8Q*jt}g_L{r;@M}Co92`&>34rimnNiB%ct&Nr#1{2_FleCyt1%)Lk-MA*`CA;1 zxxu6Co}N>)SUBw9JkxEr1jCp_5vG)y0^4wCG9Ab~lSB!w_9H=}FC zlb|e`34(Qh;H^1XMlK0Gs;32Nc}bdzj4sjfl-7)ByKEYrVf|$A@S-mR3!jEPYo8>j zHDuPddd!?_^*c=Hc%M(*10!)6Mz{keh)8?^Ex)v)2^bqQ`qhmmuU|aAtw+8`fLw{p zH1*KGon!Ax4-bxG%bE31bmJ{lEoDsHshyq!(uM?oXDMO_%|^R4BrAldh%y31`RrBU zaJFK!)I0V`I*PWPt`pskO%{8uCSxOq3`Ig*DCDj$Bp=pyQROq#+LrB zzNKI0SgUO5x0|hY{`Pg_PCiu^?QP-|yzpysw}%MVQ8rkX>hb5F%R`s7TEEvXBkY9# z*N_^2=z+WF{9&%low(R}%+!}6JCoRrc%+*&%XmhpCtbQOTwt<=aAKnI5lCaT148I6 zWvSDCkt=$U>Pt}iDy^D`vX8y6E*g+6Pbhj;3+%g2hW>N@0)mr{f4fTA$Ln?AI|Y+yhv!n*>B!AJwGmvk&e z%nRXX`v8$D^OzL2RNdlI+YLqKLYlnyCBgWrM>A6GV<2ZA?1vWx+rGfQH zhjd#qhtueg)w+$wq3p!$YMnmS+*z}(a4c5q)yEOc`li!_aq_mdueTg%y{$lg@9b0$ zW?~#(ZiXch*pbnd);)(J3XX3}rrlt|TvM6G+w3Gb))RkpcGf!{`M`V-3h&P*yBN zqX7frs+^M>)8tBfNgLY36jLXy%b{M`Y&f9-3SX=9BB~q~vuaZMv$`i=(J?A{R!C9Q zoJ1Ueil4kM?wuD2=kJl$LPIe~S`?J3y2!vZhB`DmXCg$P)=5JseO^~Eb}(driaLEY z4;Cls%{#<{T4sCGfMfm{iY>YIsRU~kDqZUBe!V4@zAOTY&TCg5Vs@@Xmou$8wNEGUQUdu>Lw|0+FP_D!N z2otqhW+93_s+}2tg=h0=vj%_U^yh=qU#h}U@HOnI5b5KJEekkfioOE6MaUS-6cNE> ztKM@y-@)A%?7)d_yi}S&MP3hY(!UwiX`Zl=ZX@4_Octz!Pg9|0|8Q@A59-v-9Uz2u zF6g_T9gTBK=qc*oSM-GWMv&ErEiq7%yh51|xaR@6mPBe=VSv#Tu-Y}DkpwW;zxBev zCr^$VYTaW|O34%y8*rZX(HAG549yc{6U#v%6l?RaU_{m8^%cn?niEe;6AQ?>qO@x2 zUQuJl_RVDJbo!3eGsdKzPr8Vjv=TJi&+xh$)6Z zu`Ub%>2mB*=p9BJz2>3;TDZm_inX~VRUSc$20MR=K;SM zv%N(B^lj+TmQ%Wa{TXiE!RK*q99G87it6@H@Im=9fJcwfKD_hbP8`iWbHrcC%|S3* z&VB8^yugX?;Kx2tiu&sl|0V4~9e4y4f4zpEFb2cg>~zH*;oQqSgnTp3!?Cz@8K&_* z;eW;VCjvP%vck{wt0O-n9yEnPt=a14w|O@{PSknQt+iTz>}Ctf!-nVBpcyw-C-f*J zg%+@-#Ow!7%f)5aRiz|lAFGe-R;#o#CMFKbM$jQS z9t8fCcfCY^0}5oMnD5}^Z81sX4@TSXiM@wd>uz%P@EdTp3HT#S=^S({Ei26Ce7FIN z&}g4SFUF844fpwc)8RBOgYmY&WSv^0uXg^>C*HYJ4;z}%7v7B?hJo@=oMJWt-4^kc z(~Z&m){RA#q}s$U#x5JV*=%>Z(y)Fzy6k^E*?56}3IM4L2CQlp5QC5K2Y)h8%o*ZD z4?u2#_smZi^#;bBhwvV--ORegGe8D(oWTD1<>1kU$)ir_azJEBb3z(`3qWI+r|&kP zF&q?0Ods@O8-pUG??0h~)yG=11m6BHo0tg_-t5pwE6$H1A5P`>nugK zHn*aDLD~E3Bx{W@(i8d)<_3cYp}BmbCx@MXzC7fx0I7;INJo}pxL@mc%QHIZ*VhK} zcm+$2dYwa?4~Q#fNgYtCQ%RT+{z^0BR=#lVV(ql}!uhDQR=4mAm9QmL(K@SOysi~+ zAEU7`;96-8fj$QcxEOqY*gF%I=FbFyXWtP5RWPj=$DudIirQy^#9pZ_@}x*K0X2|+ zI0#BxZ5rqYx_utxS{f~RKIFbxz&i?G)j{_&1YF_h` zBk#}UF8eb?-pOnk-8>K6ojgnuJss|UWRmLXQI|@Q9XyYK%3~%zFSurI|KgX6M~_(4 zhV7G4(%ngPVk?dofqLqi6KkbW8Hco?MIj0foKam(t*~fL2KjV`A9zSmP3m$S%#tL!T_{%`*_jbG7Hdoz3uczV`ut0EL@Bg)S6YROoU1 zOQY{xcnV%a(i{>Y=a4DQy9|f8WN94!&XM&IxV;!v_=6vOEV@OWdgdsvg5CJI_5gw- z(ec39uRBpqcdUpHp<(s>xu@Oj^gAW{=vFOdLjKl~bp|SMZ7vWHtmc9fyWZ}LDDCE4 zP~o#W>dePEUYNjtvu!T0ADatOvtM_j)wuwBfIT)BJpEE`&IR9xF33UMrn-PpSAT4R z|7K$UEDRQ>AFNMrO(*LS$o}c|IM4X~LCI7L$o-_#I2q9idf!y&SNQBVkra)`Cim1t zwK4PaeR|uW`Qka{)U0nJ;?ps| zN1*fXNw(vUoYX|aZgqOOCZ>6ZgLL)g@MLwqKn3c}^(bmHVD0~*R?Ckf?>cJ8A@XBt z<{F7zczlf?<}YLKn2W{C6R}izxrhbUDok06emd>LI%np#;EQP?V=pew$SSEkWF`U4&Ys^aSv0mvI_aKu5u zgYt0KZvFGupOcc`oB(=9qWE&ZcJ$%Tn5Y|tVURtrU=2bT9i=jx#l%2Tf!=z2`EuCm zP{wbQ=>1w`cQUNi#YW0fvddLlpB;}+XLKxHN-h0=%Wb}r*2AJ5U6KYCSvhVcNX^zL zDX6WAHNx{_Wrr%tDc<21vCZ`r_D01H+5Gv!@4n7i*K&L@0|~sWg+#d~ie&J|GqEeo zRzn{?UZQ1T?<|X=%RI!+ve2aJ@6@ueAKS86Z=BIl(aQq=$?F<_r{AI51$7E|q+V8! zGxH07`L(0c@6Y}*77%~%%ip`r(uLt0B;&Viv*`6{@;FaCl~o;5lNc4$qSoijrjcS) zwT)iqEXXE2(W$lDVmpZz;*n9Ehf$bBNFKT1j~si&9<~Pgwvc&e`*Dy=7elmK>N~5Y z=rRwHZ?%|f#k?=BJ)HN~(g*9&(avhYn?+WCOZ_{Hhy4E5|B3B^H`c$H^|c(z5FM+F zmy`IKhI)Jnu?_2BEyCHvI>@(}&y(z~k|asI3yx^EIL#%9_O%Q=`OUQtuH1eM_5Yt>xTqz2-NyiMG3*i2)?` zqX`{Lsxi?i#fwKwNn<@edvC)6T8m7725oyV;;uE@w}4V8mZpxm4(?ZcR~*HotNTf? z^zmFhuuL4wZu4RH=DXtXPPgHlka3-!s+-bbHt#Us@TEe&sc3fbp%K#F8l1dEd#ky#w~8+F5c&3& zxk^uAZ>>c^--UwyM)p>-y1jL=a9y*PL9PJWDl=EB9vmH=gw7o99-KL$7vJXqDdfW zZrn!pS6FBB;Hh#vy30!jG#V%nmi^N&tZ|xK0yo6YUhJq=zuv6lHG@%@p@d+>~!U{vPVJ{m;Q zTJQ^+MX|}+qD#RE`Z(&@V9~kNdNx;VvYa#1Tp6Y;Wz!5GP%#c@C^h2sYmO&uPon@#HQ@Omf;;*y^raS6p!1gV^&B1>|i63l73UEZ4lV3-g6VBA7xAtE{vstZll<>rS2Bew4qzWuq z6o)5{tXw5kwn(>sna&mO2jyw7o3o?}h>nw({U>&rI#?=4zy4{Qno04oC`@Uu#0oX*u4Uausad!4(D{0c%xj$4jsBAl&YGQn_sY)A17qhwyo?0c=WHJ2YPm$wd#%Xh1^@B2nC z(Mj72=gLpExY)UB(3YD&+NI_XUZz>IiDr{zlwFpaO@#8!npZThB%|!A)Vy+k`{{%6 zp@09&vG`2Ip@R8LKeoYl0j!YOVroLt-ZNaujj5o2^yymmf*(aXb!6(vv*bSW zuGnr@x;=zdph$TcncU?sCNLqwmX--qj4KkB{5lfW4sI_KXjkzW(BLPe%-enrnFVWh zy^GS(x=;@xoOy6yk* z`O9bdn8A*iEBAaD=y@_nHz)lKf&T1pO>5bnZ%(Jmv$2{c|M=98W`Z6EQRYd2+&fWH zR2zNQ$`Qpc3oRz42Olgg=1JPyKP`6h(qgTD*Qj@v_io42;`+SJOth#RHy#V}>xc#3 zl!g{1tSph1=lZHFm$SitxhbdUo`*wpZ`ld_bw8D z*bQB;U)HAKmz$)kjXVNt-z1$U?PbR#&6~DO($$MbWBt*Ra?^CZb&O& zEgMnO1$sjgWf#1TQqEhJz!VN`xpq*SP2)m}8T~^cG__oPHgvU1O=N3X2N^OLSD7+oJS*@`f4?HA)!?Jw` zYcKMv52%;*VmS*Bssx6GCHXVcC8lxak;H0<^-jCVsV?sN0Tt~~roH`g-|f7+P^|IZ za5u!8y_flxtX$%`;n);EAG;lY!<+`WkcCn^_myloO=lDVTCex3-7hLGw=UAl24Yp7qq$)%FYo z;eJtm>eTQUa=B7o8d1!4xKLnOE9I<8nVp*CI{DK8H_G(I;IYlDi<3~w!WMDqm2z|h zi6Ny-CKW7k-r3PB`lGOa+jgVq*Pkv&UdGq8YFDauGdR*Zp~@XJxy!Cqn-Fj8S|ffR z8GGju&tZobIC6s^I1(#dR>rRC7A`O2kps_|(b-t@Y0x8}%3~LTvjz+VjEF)0f(sp~ zS>Zdh51+X3FVW%{%P=i#VuWXNFBDXvO_8jo$StFbx4;^?MPnp?=GN@32sJ)B+;A$? z171JgjuG=S@r^DE9ClcgEI`rEQL!gN*=V%dm;C(V&ETQ?O+Nh>j1i~2eyCn*J20-9 zb&;ly%RcPDNZMg?La4R_*$`j{UZ%C#K772EIa0wXxH@`C4p(O{6q;VsAK;1GA90@)cp;!VXHT zA#ktM?+Q?{w|JF*rB!}hGwVXDe1Wb`LFHeahRWA_GJK3wDqol|!)LSIWQA4oEH|<; zex+>&S!;p95>jFUTfuiA@Df@K-eTmDKNnzBsEr51=sDDXGq+iWhH1YUbJs+DV{l+i z({_@LZDZq&ZDV8G#>O^I>}+h?wry=}Yh!DpFZWY#)%U0CoHNxwPS?!zHQiVDY8tCZbT{^RPBzu>u_*9+vsTwckAA_q^wtTfA3?l< zKalU?x38t}J?i~P_Ac-p@58M!=AA}Q{>3Sg{m~{%i>#hEO9(_sns4uG+D3K~}qg8BnXE3S%}C!FXvE;_L6UAO=%#@KyC`$qMCv=67z zz`4!s)w>wQ<1AP?H`7^Xs%XJgz&AAs@LY!ezR>(boEPFc(jarQ>(|nEXYQ`}a=3CA zd{oU=w*st?KAOi&4H^NrKy+5wx5ALx{~(wx(F1|=LZJCV0(MLpJ@mQfm>b%tik9De zh6AlvUP-CZNJ7RZ!a7IMa9_V(9rc79q>xE2St8?e)6+$q#o9=4vOi;v{<&5M=W5u(;hR8o8Yb_qfx`Y`5w_P(P zOp(V#_(Q3dxVoMq8okf~j43=33R2Nv2g@s7T$`(iLL@`RHA9qWA!I5rk=^Kq)m&!g zMmMrk@KX9O4)#&lzkUVcAC4+Mns{LnpI(+8AHjxikZDx0d!iJ_jU$w6QaT0ZlbG2I zi=}mb7b#67hkD&Byn(`}#zoTzuYcdcY?}yq5*Dq|P%gkI-ZQ=iowK)BN3Bk98x3=P1IGI+TWQ-CpiNgQWsJ)IH|S86Pc|{z96fH^l3(@ z8|EV)H|n7uoB0x*XWml8MC=*DnYk1pNXlArkP7d21C&9@9}ge9^E|K*IdBuf)V7jy zHS?uN>Acb$j#!G!=#}3$f=G_|zy?^r+dzDrif#G)?**PX11C&7+%Cf1<}*&v9j4sD^Ljkv)23I0N`l z!TKrH;O&Z4EoYoJI)a~afJ{oeLK0C;BGighgL|+(jo#p%PrlBRjC#$#f_8ip3$>c- z$ks@WE`Byw`!>-Y3S zHSgeUf1Sa9n+bKs@^dvrZ>0em%)iPuEE*HwV)9F+aTN6NrEv|x0kC+eUU?#3-VNV) z#%o-J%qOTSJ=4+B>!b6~))bWGO{pf=A^oI9OUIUfzgt(#mVV;Sc&YxfN2=((n3Orl zn5aSjt3i=lPz}W9L~1ylV>p4Ho!cd0``ORHK&Njm*>dtZZkS$#yn}t4IS$zu zKzmxe4ZHcJH6Ki~4WtoQ5sagsm%E=dMo&!%mx@+7?V@tS@7$fr-X}o7oLPk^`pmfL zsJ%Jj3?99P_BBx;;)jm#{h8Hn-(Ry_FH^O6NHTBTKPJp&*0FeAjsJ-rx!lwYkKTrC zllJ>t}I`d|3ubt_EcXtN#m1_;K!~(kgX#T@)-w0{IRV+z~A3v&D z>us<=W40dT;s={R6GB0p@EBi9D*7I34A2JWG2Uw3BC(Rhv3+0|eh)bdnCS<5?9S3k z4VWBZOTPh_moYvpo}K07XMMMYw;qOI&pRY6C|O22W{cMWQmdf`?kCbqM*qQ@Yc1kj zB|JSB8+VHVX*@mH_5h+s+nfB`R`{Cj6%@?iLyYXA2^)_(k|TSGVM=#ag;G}=t5<1Q zZ^Ji*FmInX^6?91R98d4AsyNhgxXv<8^0=K1)vO}b{M7bUo9;WgtLT9I@rU}rlk2( zFGM+gpYdm(4V4rgWuxz&>jnHjC>jyJm>vJNPV->9mzQbY*3rVJhYb6(@U(InL63g< z{FiSxC0_;6>1%J{R%W`t?#zSzq-;J|n_dd0h-^OatrICD-_b5RY%D*?V3WS^rUhHI z4iKg_m$+Fhr6^?4pvZM|mM>KXWAS>1tE>WJ^`{C`b#ML{o;j7yFO7;a8-d?PT2Zcy zAgYsjMy_g2duyI{TG>im!vokj40O@Xq|JsbkF{Y;2f*Y zGH*1r{WqhVEvG*AG4qc=si1cMj$)N4udfS-gorynPW&cI*Bc}`>DC6NPJTFBKK3BR zRvXR ztE{u__t7wT#UV6K(0OTSE$6TwE`TL+GJT+qjeQ;_uJC5^Z#XZE;6u2sbL^L~HPgAe zrL1Y&in|V^G@26P+Yj$#9}S!+qHiqw6D^@Ku3|Fp_BQ5&Y+sN)ix^q8>>QqLz@&lY znJC~W0x!Fud9%G7ffFPzegX_SDQmiX%gj5vu@MVw;SrIDG^vZU3iGWt255pnGwvH) zA+MC5qGuYZ>&N$B6Te?gqM`gKMWed z&xfoB>GhBmI-|mOAowY80VvvKApF^2hI5u4W(sb_2gPoLDO+|WJkFDs#WRCZg?HuwGn*H%^=HFHqnOv`&bCW?mJvEYEt zMxjPY1M%jtZj;6^wJnpWHIj(`)&CDIon9b4V8taA?w zX%*{rjv}tGWC5OdMG^%a3No$}@qpnOGXhAf*JX0WWZy9QDf@lCw0Y%4>P6f48}WNH zdAd<;40sw7ZSOwHdZ@;4_vO8chSU%qgisA^XcglUcm4{c0sgnorNS1O_w$*j$SQ zJC=}DYv~%dcdH&_vhCu|nP4*o#A>1d)>$a2NLcJRYBqo>XXoa(Fxfi0^@?yQSsJI- z;#Tf(ah2Jt7c;qWPMYY#UrmJ&Mc8P(@dpP-$_tGMAE^h8N%}&_+RWyzljnunF72&H zghTP%00y4LjtNPxFsG=XkZbsU5ULqtq`?#ey8RLNjDMPk|8{rXR^+a{yL)^njYDom zT`g)@Lrwt!tU;gs#}k1o-x-q}y|QqL^%95wj(@fC5W;^RPt4#Oo?;7|j~pvIJs0QF z-0L3^$PT)F!V2!3h3PP7zF!aU)9S4dMvhHhkCJrixn~5LD(^cDM}avV(5}RRSdwTn z?8&u=Q+eVwpKQr0Km5SQo97^`AWx8mN{ZHdC6V268u;e^bD}-%}CZznnC;R zZU->WlcB>x4VUdQx@BRt%k{Bmuw)ok!L%#I)Jlt!|3byj97kR9`UzR*W<10f@71ta z-iUV6`+WXvzvDwnI~47)Ul(Ye%$H41G59RECHDJ7F3SAh2+a_#^>tr2kt&PvJgIdK zqqkMK!IkEQ0;`A>!tWl2PW1R_5tpFG!}u@zD_{-*?1s{{rJ!kGa;IHOH48jKSEXeQ z_egydOjSgf?dISdgx71GkuRC2M(enJm!~+d>I2xC-Cwbw#J!&|E9T0_Y;Uv|@J79f z;zCXb@RlsJRY+l;R8Qpjou!2X|8m!=sG5@Af-dIjDb7vG3w{cZt!Oc+7wjME9BU&W{zgHS5 zK5Ls!(d{y{v3j5D#IZ-FTX$_nB8GHbZ@ol%V>&s^{ZDQVlS8OmD)B61de{Z z!&~qBcPTT0KG$+!dJ%gBZP;Vg&t^|(suQC#nj7KJ5Ej+z%wPSZs5GZ~9($64cn(S5 zN+z;60`-=2CoFSE%2z8T*w2zeeGXU(D5v=~sFhh}ZBt8iD-P>2f5(L%YyzKX=J`X* z{IoX6SG#q_Qwl>JI*yiiC-uq&wCDHNCm*Nfo;apO!E6se&}fq}SrykY)wANcn%Ge) zFF`lbjc-wkP|>WZH^#+J->*JWttZCBhTJ~i9Jz?Ct*58r*qXedz3)ix`!EsK6Exky zXZ8cjAFsg^PF}0ov;-e^(}0)cL53>Jrdgv3RIHnVe>tvTs<8zGKM-Sd-=!qX+>4Ep7cRKXzC)&>o zg3HZo-E{M_lT~+TOnP=mlaK;zwElR~m7gG_PH*pHE|`hqu{*I_JD`b&dXL|Mdx<() zUoui&=4GiWJt8u@Smo3knQZZ85IAoY?OLMyW3WGCv+MnenGMg5Wx+ysT430Mf}kk7Gglv?xCLIy*orQ z5x)5uJyQd`ms<1~kZC|a2mqI#H17@6HT`$UElO;d46j`30_-_J2%JwnoR1xo)|G$= ziaoxGZj>Nns0@mTEn#x0L%L2$!8DB4D}55u_^U7^2_hu=iVP(NMsXZH$+V9B96G7} zvjvAlG=44ucVWvkDrDdHJHDu17qo*Ai+@1f1}?zK+bGtcSBPGz*o zIc71~z=J{Lp>7@+%gfR*s+%V5T|VyL=J|ALl6WuTsB}F`0&SXe9SRH z5UIkI0kCa%Kv^>kFof|5^H>m-Uf91j)Tf%IGic_iT=uLd++;Jmnp))@$->R5Sjugd zAvPi_lscaw@7`xD!)N2K(e@>n^;)cSd4+*UnLBj(j2mIzJmK}2FTN}MRJ6L7KQYELfXw_{N=+>!~~dnl~V(h{XdC+ z&6tRVto&7G4We*6T?|u~S=WkQ7Mx|oqQ8z@K}TQ=BME|X# ztRn5iyI)V14yM*9(QSK>lw%sJ^!NE%ws)hz;)lv$!y>+(l=*eWk3n#L3=) z^yM|2vM>6Aw^RJ$HPvO|{XbPJ7TPaW)fajd_H{mj1Pi-E zlO(XWAGX31&Y?JV!eNDaoK;^G@SH(Lu{qga1lw*^v;CCAf1`nqn|^v`7G0w#g7v%2 zp%qFrV^G&`Tb|9GY&Iq@kaZ)|K_3N!DH(k>q0l)C5z8PUe5EztBP*#3To+{%`Xh$z z&5~)bl;Jbd`s*22CHfR=U^q~y`9(C%UbsXxiqCN5!Ic9?#F^y;F;ffu8;KaXDXoE4q(;I$B7qsp{mXuU8fg4yGa=^%1pAh!#-i{SRw z;Jts6OPIU#&h~ZAc%K&W13BuLXL)Xgbr@cgD#%M>c>T8v3S;aZgIbj*meAu-96Xxy zV&a9{6S+~VSq~RL1tP+J5hjHS#p(VOB`W-Jypne9UMdZ|1zRPAGkLPe?DKfwaTW9A zO&twh6AUzDTc6!b)e^jl!*J9{+aUD9S5z(SM9hB39(TKW;rZYZ;Q&*`eM{#X{yI#M=Df{keE5#o_diB^ME$J@fr)=_Vl znUsYA_ml`{IK+FCQ(!X0JJH~#cAh{bIj%WZSqhj8^#`U0*BWKlzADxmWgo8c(D>S$ zrK2=38}0H)1~VFEcTE?V4F0DjhQ9)HNXAA){Zf0q`6~R(C_gu*cx(8d4v{Zg&S*=U z*-%uahC79-Nih%c4)2S<_*j{TnjM&GFa+zZ9T0 z-QXEIJ-&TJuq<0HQ_7_|HWo}|zXC;h-1htA2N&1ODFHWSpzu;>W@yS??0esxW45&2 z@A#Cv%B{S+Tk+e!R(jI|6CR@Vrr#?kNims{Ggt+bjmRHt_b*=J>^?fBQ*#6JN2EvNRa zk{#oG%@Ii%uHd;zOuYYHkaKNhP0GEt}eDkxL>j+>dEl5(PMC5&HS=W$o|V&+V7v=IZ|sdv~8 z-T%vB2+7uFqGht|frIJeH3#^VJ+0ibe)2?ETAix#;Sx<{yq>x^*50SBJGL#-g4_BK znpThQT+9Dlw0u+bpd^C}ST z6GG_;Z3IxE!qJ_`NpsqtO#6nBIv+IWp`}zxK9mxy-&*=tXZy9d=h~N< zdig2xCe?kbZTER*(5H#lh&O%7dDkq488e@=I^Cvml+4jUE4n(KV2^|-X#p?EjGQQ` zv{i@>s|WRI*1`NM-4PRcvJggJJ=s@PA(gUwb~H)O4E0m5ngh^QZvq8YVP&|{+~t1? zIvA~c48B6QW)h?ALj)tE31EeQns)NS%i$)Q?@XcJlUv5@m>a%S&+gsCjf4Cf-*?{S zOBnlkE2{XNyw7w)3{+Z7%u|GIXlKia-%V$m#Vk>!l1ulq5Yg&gs%rpB-EGu99kVn8 z2VI(HLF;Rgf8~g$7v?8T{ zjZPwiO_u^L$}vVa26Lrg!6fk|Y6ERQ+P)`3G-JD;w5$cvxT>RFyk9;w#tyzXgxeq9 zlO58wlimNVmHjW58fpW6%C%K1OIw1DHm12NV7(SfLjt#6*+xgt@tBzY_HOm2jN{W9jJXs|?z3h31=ACu&_*;pMm?35 z#{eB?wk;bE`C$#8xAuY~=y$+lwvg#c^^e&y9;mg9NCkyYHU6^!zsvI(i85z)#I&&i6eh)<=aAYE^_zeX=f>KNd^sKjP zxG~2xEb4AX3gnmYPXf~-Z6eay>O*Z~r}2OJ1~rgzKhD2SrK`}_GrCZI`yd(gOb8P|~60LYD?V*vOkS zE_1SmocrfMQmul@K#zwTSd5R5nzndH_(CteM~aS+4*^S@wC*dd0tgqf)+RYwdLnD8 z%pCEK4{{0e>lJJRoN^@?b}T~8KaUaPnW!{AoFwRm;E4ullLcN<7<@V^fq=^pZPDu% zp9Y)aB^Ggw>ROj;Z8&*K2;#_snBsr49PcNXVpf1+Bk_Q>;lvRLLe;y-3KY-4!!}Z> zYq~ZNcOoRr)jAx5UQ3*_C!OBbRMu|IkFLx{m-J)oUSwxx!N8kM*U>gL z0T9VVC9FgCH5g|OOmt-gLas?5>r$e7?-sz!qDP+`ZB1iG%(O`@9RyQ+SPfv_fm?Ob zk*BP*XX4ZuWW^$&>m$!mQixql+5C+U*Y7ECZQm^-!;9ujr*5j>U@^{B^Vw!Y6Sofiy1NdxLYoAm>HwK zWv9UB{YbZC$Op~<_eZ=Yw^HtP_+34;qVvl#+f}=kdGUWk>S(OiE7$KO?yhnsx&~sxBgR`xe}amz+^fMa+pU)D>G3Z_p1WBF+O#KL zaXiL}_m~9GIBU}bA+Z>Hf}<_P9r?aXCN=$g{DgD}|Zskec|F8q@ zO*+_L%3T3Q&r@ZBQNHIaGcKDVhKwg=IdTE%!j^9CY;!)Q1|N%31~;~33o+v#>U|M3 zJHD{PVetvrP{`r(Kp z_pk^qPQs1Hh0x^3)j{Myy@*=a-S=&c9FRm;!vEzdJ&;Sqd63Fd5i+EAd7W{q47rC|-Muo?s~;0&)iaib3Y3+p!Ru8(#Hl6it=sGl0^7 zQWh7NSWm&SErQiJ*!eA5P#VV&v*>TMQxOdVS85;kR}{G-eM=gS|B_A3j)#XvBxSwJ8WNSW0c`fQLs%15U_h;@y+xDkiiJoHgFKkcD)!Qcg`D483O2nIsb^P<3xi$4fyH9G)-%tO_97p&rs@==k^hT*U7cBpBPFf^5pwtek1$?e(fej`mB?8Y) zKG?;7=E#BsMNAOvFH(b9nVSM}rEfu_D)b%EW=Znow);kAAEpcGQ~fp6vme9lgiSpt z`*wp9E%@xpuD~~03f5lb2?Q5$bE0k2v3;VhzP7LK_-RaNTp53ro~ZE6r$NRvfonu* z)-qk9OA%2561_MJrW`?702K(2z_V&jb?}~3FFgm{j@-k>$Jq9WL37m$<6%2?a@Nxk z-b|W0nljW}!un<>8}5(i>|ZmC0M$Ae64hgQdz0(zO9nvCFPvT`scYMks7-a%(? zh~*;A+h}jtdbo%IIJtH}rjdn9jjgr*(D{2J0+S|taIJ(oToSxG-m@W4NS-)lb6ChR zzig2db!uzLye#JOKexCD_K-MMDmRlvV+64-KVK^5xB-XY_FARYupw3+#sf-_zxfYo zpT{5jImlq;(kqwYtJAix&~E5do;#O%<>5F=LMU4zeji|$&+hS^SHc$QLKSBF`bU71 zS%=nc7u2pSsQV^vldoCq(Lg~1oD;4y!G^Yf*3M8*Y^kVEJQq)aw1D~YJg(|BXIJ6T!}qFWNfwhSt;CdV(x(>8CTSQ5=3^@|c|_p7YW zO7m@17Y7*K9YG*ouZhe0cTmS(|3CibC}ycR-YRvq&dsknUA$FpR2^uPGYNY^@^`(e zCBlPzRPq~T6gYoE-F@4PD2G53@m^I7IyBdRN6=0hgoS2q%2$(;3WHWGq zPoWhZa`?T(Z^ivkatM*nG+FqkyE4;(tv>F5IAB=)!S4JiE=U>woF6dfD_R#qFhGKA z1dM_?SguTlHR{aUwYE6ecBU^(nW)O0fbSB-n0M}v7wRE*Zx?8xLAcf1(W6gx!NJs^ z%i0h3?dNai)-YUS^T8Hr|H_#CSvfpmqzvUxU@9*0+D8D>QuK0_47eJ0|>=Jgf z>Uj}skzqn?xBctoV>dQ=VR4cR2MvcpJQt{&WE+gR3#$uDWAO)X8tgB95UNrmB6Ea_ ziYh$j(~fZ;@Se0Gwt7MS@32SHEnqvFCalOf?7t2!6 z4?z*yzYR@m<};aI!{X*|1YRakCQFa=Iv2+*5X4p-(Tle3*(OWbrxkqfVxLEyo?)zi zPts&4A#LiGUDdQNDp?+!oKbyUiho!}qeHlII;J<8kY}E{*0m|jOYIE!LRP{0Y)UBdfAeQ(ZI?wI(o@+5G7V<8 zCHgBJL4!eqeo=u7iq4U#9~E(SQO@au-KP&g5zmtJD)6+z&qE(7VSV)g7rZ9WkdS+S zg?`(DoXOe!d6;56gO%Q~G-!0|H285|=gwL&Jbk=|t*6$J+8CYlxU>53DL5T=VQeq! zXslf^&1@BD3LyOWg#CE=QQOs5LjraOu`2D`~F>BwxiVG<-^T#Gp z%C-U9`*61(Mp*M`a#$>H7;~)dERl+zjB0q@zB>FhT|W<6PPIi&%EXypCnk`RC&5eP4YoYwI%64&utithk1Gs`h+MMaZHWz@W;ZDc@j{+l} zaQI-Z$5GT$;hACB`TWa~7h+rXLxI+f8P{VfUae?Rd@7!>rB5k15nKRP`f>C;Fo*Q9Zzj)2VewJuYp>oT zI}db0*PwXKP4C>DSk-5k<7X3~rm4E*P?suAS8utJ?nO3aT7U^H)O0qhpJ( zB@(m0L%1^Fb$Lc~B`}w6XlbQ%3bbCL&9qo|63#PHqOG7yeO>r9lAHf4y~XZxNXiuu zHps+y3QYG*6vv<)`?*N?OMC?685@H942wjn*^p>qZE?3YFCX<~?C246%K-0^*$_ok zPZFYe3~T;sIEsqV05Mrdm~Ev;FxXH^;O<5|$QP7SIe1#b!+Y1N%&k)?0wWb&4^J_W zObHh<8lMvyWsIt6EXjPRR};P9^uviBfIWxYpRiLs7#_eFK&Unj8ALvyJ$dp2{37&4c!h+ zRPsGuuVmAT_F~UPl%(gkXn#gMs^rol>?qX)2~J%JHhQFSn+d$!$Yf*Hi;<;KbM)Y~ zN-yr<-&vK6f?b+6!htpHq-izu=SFt6j42vXK&cuk9Ry$hZC-nNz_uR6v#)OOZse@M!*e-+mN_ zDMum90>>gz5oRUxn(q(XHM4(Onu>PUJT~j2VRxU^%-ZeH$k@fx7#pK*f-Uj+j@;3B zG}9z^ba^h`K%sC!+z;3acVo__qWrGV)_4n};smD2?a&>IY(ej5L>iA9i$)9DxlF^$ zqWl;_AKn+gPyoBxQpnMNXlQlrFNu#N+aeX=Fp>t_kD$&Kn^c@3T@?0WIC z+oIGY6?hPJmO@kbx=TzGIqy+9+5jv;R~O^h=-Dw9tncsWt|&A^vqc3ZXbLu4IM}U2 z|3+p3zXi6cgn1NtPw^b=91ARJ@Bn9lW{Dz(v$=DK1)1Z!b8(Xen%zZzD%`!oapq>c z`t7u>fA!8~?2`Tz-hjbd|Me}z?1*?7mQjj<$Q`+Q$_{G`+dy+-UkQp&wm%=II)moL{I z`9_9cE#t1dg3$62h=j&la%wyF_|Os0n)Izc)=b7wtIb&iT zy@6}PC^T%Hl)k@FE|7<`miyrR&1f2uqV#6g6U5O4tV$^R@9ePgmEVV7vxW}Kiq9MD zhG%U?zqhXXW|)T z&TqU;Ox7G`RarO`Q8xRt42Qt0CJipH3<0ov)e=@v@+pMu1$njrDjSBz@d&4zmNNqH zrOCh0DI6LWe3CbiRwWb`UU^AskOi0D;opgqXI;C8R?CdEL0#!nE>&Bto5*1 zU$s?qiaM_58LMzp)lzF+e}>qYLwky>qbsc$?u8IVo!jf_<_>3f73%{M$KtuXr=7Vu zKe{dcWdOyK&1i&YF8gd<+{qE$1wT^Y3$SIU`uvm4E;TYCiH2KC`dn}(cQpW&>7|+d z>|(QQe>2W$-n&_XX)J;3d4SNHqaAeJcWDB~bSl1u1Mf=Y-=o?7A9h$H{I!DJ^YyA5 z6Eg*jEWR``A!yDh$^;i&)x0!HWuu@^0$d^wE|n@@^&AA%?W%PZ+>YkVie_ympGv ze;E>T=32vkBJ;e@e7Q7xB&Iu*%)<)QsaE1N3zGWr~F|06rH_<+{Tb-#|!j0iKpo69Un*nmq;#1c-N$hQ{q9zaXBysMu~k95b1Ab7G6|kf1NIbqMiA24f@Ao;wvZ)G}MeMFK;+Z z(DYFAt{)_Pl6gG(ku~s>wQuTf^Ta^uL|31PHqL`Uh%|ce;I5z#iLjO<)2*ZrllD-H zPH+K#GRbBs#L$Y-E;cO*G8jYI&ITKdUoS08b=&bq-0tS-iq*WOz&GRR3a#)Ib)4O- zB1^Q(4vGFJYaRyYs}?}sZvOV@(>4Q@Z%_F!2@xV)TNg-LNgl%VRqf{(+8^K-c zZP_mDxKmqNpHXJZc696dozkN;roR#asRHj!2?E^1M136GENon#9%nc1*}p5R@3qy< z>>90Wm9(AdF6{XFo8UU0-;hFNxSY%8XES6dGjCI*ilYsE=17E5VvfPS2gM{tH{tz) ztssleXZ!w(jB3XyrR}Hxk%T>BIkbT4tPz5S^CR>@8e#)?M=kjBG+ z15TfNmwbkX8D?ShyD*-KZgGYdSy}0sOh!AO3FD-Le%a&G-mUgN1t9=UZ>Ql>7m4yu zs>fvwR`dOi-}Ef1)L@|$CP)tVOo%Lw;tO;BHl)0$>pLHB03k=26JL`obAs|y z($Urk*_ZoR4L^th?vRiiTHkF6gD9w`@NK--7Dni~zV^RyNa>cf@7~6LsfF9f2lr{H zdZ-iE>4;@iEI}^W1yG;H_CP@}mcq3{@1~F{e!CsW_`W=vVWl=Mt&SqbrWmC@KQe4S9oGIU+)3e?Bs27mL_j0{U~7?=Wnt*b+C-zpD2O0{NQ;>%>FL zzZIhH+6=_;)BfT$w|c1K{(CoeF{=pvtwY3Jm#12DlB)O7Y-T5Hz?@=2Yxwd?gaDQRKIbT_ZQ&NAP1>kZMCol3>#|wqM*Sq z5(|R4^=!HWVag*#+1J!PMgAk1K{zjnwtOQR)!$XN4$fjF>Z<0{AP z<{4a*<8zP6;zFv`T?aHG6K8|%c(q(DN?zAj)jip3NCST+8Lro&5?j5uBv?JF&#u{E zjmbvdsTiOm4(^B`os!gQ45!+dr(26qZk-4)szbj_pSRI>YX5I|0}*@+{jwapnY`FO zC7AJNq5X1}*ieamO2+?559QVh(E{=!`;_5J^yGeBCuV{$`Ca;^H}XPz2KrBjhO>Bj z5aDNuRgI1^stw7ArQxdB%znNLNksx+(aa?ULNara4`%$AtLxeFznd9d1^w^4OCpNt zcJvWPK_j>^@_Do0*We;zAWh(~ZC&L|>N$ftmMz@Yn)2ONyj+ z>Dl}WuZjK053FXG@<->Gh6rvS1rIw zQ1T@*K92P^Wd}DF7sMCvznmoA($6h?3*kan^xK1Zb1{z%IfC#1TC4E=ls(+=!V_7h zS#R@_?;T%v#YVMLv-D5JpWMzr3(7znm0%q9FNlXPr?A==hRZRs?bRFI@d|9cJ|v zS}k=LhkeinXWh5X2J3j(a#~(0c*V!Aw))k2{5bs^TM3;vQuc1N(tIS7_+x0lvV0urzYSat1MT}Wupqn%3yT7` zu<>wN+)z#D=fMJ`dQ=_*vi1a-1TpIa#Ql3)E*tW)2&h+g7 z-ql_GmT0uKI!DheUL^={}L?%SX2PqT@=!w`Jf;XWMPL=2Kwp zDXs#E{h8PF&js!;0Lpv#dV4Ve=@TL2^GnN4jq&t|o@eDqIGCFtO8-MI2xSQj4c?nDb=Txr2gHu3np=U(pUf6|tDpRshZX5f)=)3mu zxs>^{BV#cF-kgJY1-#cs-29`oLcvVTk3Lx#g@gZq`oc6+E$c~B3MqYSc2?34q0)_* z07iS7GEuR{5CxXWCyfH!>Nk$`*q}g1Qk8H7>%}F8I?t6c#9V3XzkH?(yr8a(zYIhJ zTq8!jcuqSHr0;b$);nogL~rMWjXRRn`Mm@kMqiIJq0$z|iPNplx{eoCxlJg2xsb;~i}` z|9@S52Q(bcw?9@VdMBdy-bI%XC2EK+N)UAy(aS~<(Gq>tC0Z7-x+PlFjTS^%Wmj1u zdM`on{J+2Rf8Y1soHOUlIrnqt&N*}LojZ4C?kunvILzwoQ}w0{0cq**OEkdaak}P- z&xc4pgL_{?n|l=JmhVeHZ(t+1jzqk*5aJ8;9WYM`X(4Ob)|-KKhp z9=MpC_p+zKDmVsJu9HIfy-wD$>GDPIk_JoP0Q-G8xFUJBEvu>h80`tlVWuFtyurkc zIr(dWy_(%??Ov1lobpLW849F{_`O?rx;DE(CZ^fG*76{{ET3IY8pg^tJAE*(?VWMTq>p zY5NRJ6xAHG;37Rd5KH(M0gcNSD#dCj!$ZL#v-f2Iwd8y{> z?rBn&Q$u24+eTK^?$!3(*#1^op50EIYn#^$rnv*E(sVT!1iZO~pgtZ)D3PDc-@MiF zIzI-FVnYMf$lETarz3rrd~&a=d{90l?c0|I(&MO`>*?}MHRT;KMvNOTx;0|afIHjP&*g0C7> zrCa7zfnPegPTcn`8qYW16PY&VH}rlUQ$*de;vT;J7I`houc)a8_qi%pn;+a{%Ip7o zb-n-x`k-EBzRoAZzB+q1a)g2}*ed@B^6uimq!>ucwXsCGgrStb#08D+j*jncWP(55 zJ9OwLu}8~CG%(HIxS~XKyebwbA`q%wh@G3cd+{U9{1xmLXz{DOD_7Jy_sVr13KOoT zs<7MG^+y2+=46=v<-s98U!9e=4oT(y^hXCvIuV?|6o9GSeRuZa`uEcN)aj$pz!1xe z>D69NxINq(F?|JdmMF6JwqfP^*FgTYd|UKm5)NXtEDpQn*QUs z_b3Iy4&-|&S~e;g32d1zKX*tJe!o}G`}l|IJQXkN7}5eco%&#JDqP^s-R~<1xV1>5 zjI7N}nK^A!_VBecl2YWsVo7J?mBf-P&(dw(Uv=0rTNQn2%|dHjgL+@Tm0H%u$E{9a zwIk1<2ojPcp&pCqvkl83EoaDPwDgJEjxl0+JUtE%k%)C<<|(Uf4*5yGAYfE(?M0OH z+aDeozfmfQik-gu3#Sorp#1jlkmfb96g61|Nq1$;4R?$$?mR95xO0R9rK$gsJ56H5 z4dyMiE$ETOzr!12#f zI|b6OfTp0>UwpB8VESXeOgG~NQx>`IsK$(+oW$`2Zx%OacXXt)l`ePXF`ybT)yVVEd zGy%qCPF7F273|Yvk}L_W^mo+WJ?o}$u2~812_%PbJt|<~OhZn^P+QK#DC~UJCSjI9 z={+Ia9TiZT;H0IwmqhpOhFHLJRcC6PHMwCzlTr?f1ji^6(=8r^yd_rP$|=h1^-Hui z%#SJ{ZtE$l$8>CGM6hkI^>6$D9FGE34H)XnlARq7V@erdtjtIeZd~F3<{=} z{l!uB%^Bl$r>2-?vLw100oqR;)KU|-md@e*?Qo=NTkdRf#Eu%MJjeX1*LHNDW z^^Aa)E0DD=g=lI@>9Q`y(tcG|n-%RzgFTQLGlBJ7zipr!{M4anL?F3{T);XigEVw@ zti%#tIxGg7xZ4W1y?Qh-mG-_x>9y9u+w)H!z%)kL?L{mE)-|8g*er1EO#)-;&vJvK z>rkG9b@z=2-9WBKxh$f=>_BqlX%xb&!pS3W#F~mT9T~FlEC%_^cwdp1BS}CnpH`<@ z;wWS*hjgmKXsWcAN%MoZulHtRN^qK%j>-69kHSinC!PgGm@ZX5u^|V^Ig^HQdQ^oV z*b21!AcH{xK?d+Nb?p0?(INhu0?K`fuyZ1U35-lH6=#%#$+rG~6AdyFj#M6Jm@7cWHSV1i!obN$Ul|s7t)Z?0!TH8S1&<`qev4d|v0|^^ zm;YUzVKnh{Knp5qg5gW7&gDvQ;fP+h)OWugte_w1ghBWf|tQPzB0^%hifu(6;}M5^yjX0Y2cE+ z_lSq;1?As_;G(ny7bKhbq(s^BTXVHzW$FPkjnQ;v{r;U9BFL_Y(jF1$6fO4Pi?sPq zw)Hn2F18pNQ;>N2len0lgGtBair+PPlqm<(j84d`OuNVea?4H?5?sodZccfHt9=Pa zhF+5G<_=L=9O%kQD|otkjDo_4wZTu6PrtvDqMZtC?pa-9_BuEB+~zU@W$C(OmF3dvcF`OGlhWoiu+@@?P^Ytqv>io zLwRxZnYK>9szu9B!lUOcnSUU39)5JtW(GmN@+&R9co*YRm)X!nDcY_vdLgj!L3?G2 z-D}ohn{TNs7NjE=?lz-WihjqSFha1n_{VRNlV4Cx zKnAyEj{MQ^*7<$Eu%JKfkqamLg`3dDjg?84u=8Gi>(%Oo=G(9(m7Nb8&PzKVAdF)* zpr1%;8}GOW7J0|V*S))=A=Ay9g{sl)&BKMNXGDrBiNAeS(TKcW-th-{y`zJ@ZM$bj zzw=6J8Mkj-+d1Ysy#v8*cP|eX&i{rs+jn$5_!BJaR|Fg`zXkpAyRy%h@cq_DtrYIg zusXQ0I~n)e4f}Ve;e72PCp@zJ$Jo@dbVOu%VPVd(w6tm)c)sa6wCNh8a&_Vx9*L?( zVVv9kBBgJpOG>CHg3@jecz;c9Z?9K`F?9xq^bH__UZh#dJ@U8e^uFxJMkjYUxVC3? zSf;8hDtr4B0&Th;`gPjx#^nW~PDaO1-FARPN!u6oHsM`t`wSyMvttsHZ z>fG8(DTV=6)9)V)Ge#@7v;7G8J63vo^ou((3sVocQM4P+dtS_=Y74s1@L78q|JK82 zt>;ApSotB7kteM!)*}O379Nh(M4EvQEU%ncZ;!jvDCG2v?ZTw7UPJ$uxX|IH8h4qW$z2}Eq<)AXMp=o-FKFaR% zz3G(}7^VDer#b~OAN)FBv8G}hh<`lj5~G9)4|&+yBBf}7$(#Z!nEUe9c^3(fCc#Vh zG(f9*(kQqL6lyDC))(=}LTCW0)*^iGbz19$?$j=yPyWljd0nwFvwM4s{{>~`_^{#}H0l`9<^IoGe_4xAYd zU|lqtu7xiaZA!w0NO`!IVe`xvO&G~FJ%z0wDywGs7P$Ae7!aux(=u{nhjNrgXp|D~ zR%WkHg}MJgGzMBB#-LpDW1p$Ce+XStU_rY@_pdyH1ZmA>PlCj#YKJel)9@r3IE$fwwD_zF$zFU!%m%on}1BE|QY|Lh%;KBH^b;f84L5ApC- zAA)PIA8U46l583~yOFw&)9Y}i`;O^Nz;J_oHN@s`h$hvW-axJC$KyOIZFMT)dA(4+ z>+JMQ#Rs1fjpi~aiC^MdU@klk~R3J#nPQ^bY3nk z;_PT^zyr4(%@X90)u4wd$d&rDnSHw?&d+T`JVaJ!5dT&QGcrM<5wP3xn?&QefF9?{NWNV1C7H|M6(fu7DTu+4^7T;jAe)_Jc3zVFOg_N|)wW>q0L>WT9eW z!f|sU-j?f5pLJQP$c}SbO$F_*+3XC|%B&>$>l0X~ET;Nr-v70B=+z#QBWJ%I_pws@Oj zGbX&ow`YqiP`)&eyoeSAS)KP);|jj68e-E^Iv-3UDWyN<9cd^Hb1uDnlaUFZ3|v0A zIeV+G&PlouKWNq8{ZK*fBV_<1MZtTn$G@i)g`!O#eGc_e3^%8*ZZ_}iy@2jXhAlGu ziJ!nLOlTIdv@#u-2dbOsdQawjb4>D8rJ`AbB@wgA3+KJ-IM(iqiR6IqHB?>}*moUj81-s+{oaXLeX#p}T}MCf>gtVkxM` zbN>GMG}SR)5GTBJx?B=v%#%*0c`n?TT*nxL-$78-BSI|}dk!u@2$h#CrPyz(c>rRb zg=&gCo`%767_gC2#U=F<>Gew&fmAZN>SPSI~I3UMpL9ju?=%AI}tcVh0cSnNl~VlMH+J>`s-deV%6 zL0!){y2Qbec3?*L;tLrG=QP1xjs73Q*7w=ynvQ(Qe2NBm_Djt<;ggqp_hcC3PzN>~ zsNi6UkXyeWv)`UFmK+YTGJZ+?bJdFu0Q{g-P zdkop4ae06|p*z;nGQwB8w4YWZ+pXKbWmR+h`faBX`}AJzFa1@4lt+`|w>5wNvp_?d z_W@Lho>f3OfB;QtLwbhr{{8=E3b-Ia-a$DFmUsJUBxS_n1^{nuox1ncyb5-05eX>O2VP0?{ zH^+hC8xwzauMIeQGG1R0sf>c4-j{qf58 z7dK%J^A~|2AOgfB*XJsP^u~$W{xiK&kf{uH)oPo-83t*3p(m=n?*3etu zLNt*bOQ|RF;Q3D3&Wl(%_}P#tD&!+G`=9d=NZ~es9&i0Uq~OkUdRIE+a5rI?H^lwM>faB!D0Fr zcGm)9Amsai$9SEK5Yv4CFWW!n><&c^_`l;TS%ReR15^NBSOBDZ6+jDF-vVHY#T8Ee&0JsPZH}6O|{{>ir`4<2H delta 39687 zcmV(@K-Ry*-VglX53n5y3Vd5V=J* z^Q{{#Cw?{aCQ%rNm&vP1INJ>`FTIJodmBd6 z-DbmX&~Ni7oVale-y1r?jT3K);b!^K!nqs3&C4*FISKq3UG2`C=<{O!5=Ngpi8uCq zFS&!U8(ld}c(ApIg4be*mkJjMm75MO)qbQ<>^ z4Q^h`L2jxhaWnJfbGLK5y&esYBIg!Hzg!9 z#|zRA-wQPwa_!D)12nS(%&*oX&YLJ)%+t}l^+r1hKC7`%vR4>O5LusEydE&;*UlV& zBycu)eR36qku&xIA|ROsShtX^w+=z$jKk?2{*0%I_;DKHFOm3h90o~j-M)66IO)fp za{-XRI5Q81{IMUz-qtQY=R3ib_SC_a8@&8*j`w!eSl$$#xN&^YiFUiS-|F?c`}{Vj zy;CPj-j9FN{(9s1z8l@icZMOTRO{4#xdLsezw{yS{$t_thxBoFwaLIQqhNX((R=X6 z5GDm$0sl(IzWBk9!Y}jF2tMk&m&tJy&Mw?92|&Ep+k%UccXge=dL2f;_k#)i0K_=a z6-o$?^vn6&1*J=`$!ovzwIrPLJmA_VxCJuVv|Al|>TV7wo=+0>zyK%<28I5A3g;3f zNM+x}H{#z9wpv~KZSG9qg2yea;A1wUa7hP~a`@1)PlM-t?Ia9*ZoFmU7Os52NG6Ys;NiwLg``%QZ=AocMT z)Q01G4h}`AyYLcVAm*)9owPcgmfe=h#7Ufi7ofWZ56mO?();q(na|;WZ_uc$T!XlA z@aN?w5LojwC>&w=+{D4LcPC-wz63oxcca8}<39_99mKX8bH0dtw&Rms*LTqciFfT+ z_U@k%lV8BGx<1(21t?zQV5e%V|6%`6xN5&naGLN32}lBuoFwk-A^(wH$Z+=Dhsxr#g4=+|-mZs(r%$ z3L%&XEvpH%vq(ZI0OB#!93{+ucH~|<3qQ%PM4nFL5WyB65k;{1i`35MQ#AVjupK@A7b~sKv)* zz5cM%=o}fW*FI{s`^{BZFGXj&kw+(A%X2}A#$RQyj7~paj7i@WtM!g>CB6r>9xukf z0Uti1VrR@7YOsiZZ|_aGUNHQ_bIr`N4n|d^J`}c!@`VKCTB(_$M|KDUH}VNfc9byzAVf$(3!?~1?V(x z8n`s>q`1V(8ZPBDh0Y$Q6Bkzu{7MaKAg#c6l-E{EW4&y(J9}+=Pf(#w7V84ja8`I} z2_)Y?m!***m358m<#CZAM59KlV~+}L2;b3!$TS##7w?BZx(@nd0zW#VC5Li?hW21K z%Ye{pH|?Y0Jwc#k2YkU9b0Wx59HNqLK0xV$SWQFva~^`fxZmnX3ol>I@^lgBDn&pa zEyTNyg_W$?GQ$Luwf+`bTlUM=mi4!5>ummV?{hEO zA2uJFooYHaO3+qThMJG}ttrE0+J#c+PorIb2F~R3RTM6Q=|;cYU%zxV`embEp09qP zg~q4RFK^tyjU3-Pa%1l*u+9_YwX3_0vbn#q>28!whRIqRW%GQL4VQ#GiLyCc1c^6u zt+(zBK5qT&+=UA>NB>#fdw!24R@sVj$Lk z9BvfN{T0pLM$v2(&GS_>RE+sFil%RYFXLKMH*q}Qom%dfx$gwDD*)F~l53DFE4dA= zF{+|Dt0FhHyx1a{3lex~?E2yDE6e&dTv!t)up;-;jjSZZ*R9x{q@%%WY7@o;*KRg> zp*7Un{zk23*tzpPsx`5C`mL$84%OO!JW;6j{w+CA8|`v$?b2y%v`dDox*P5Ce6$M{ z@H~;zG@tw4gq@^~mRV2B*c&bLN6<3gXlT}<`roI~GVj8~-DG{%P%X`kYT2lk=c`&; zPp4XrA`iEFzYV9ZztJ%F*D$S(hRJZ2xsT`Zz~5+?zbw}l|y2CmZi(9o@4jI^O7>XRLdku;}>5!O8n`>kJp6++bpEN`DAO`vWPN zP33V`$?SiRO6FV50Y72o@kwwKate5(U+%A8HpRvp{ql_U%M%tGA1?x~o7rs8Twl#> z3XQXB#%^r%%=6JRPgrT3CTdQ9g83rZeZNTHhqXOCdH-Uga_+BkHYLY7m1A#I&ht?@ zPgrw&w>uzeMSE;y%aHif~@NY^}JVQ{+Ay*+ySVWVZ%&@!94;GCA(+i018=c8qwurQcw zXdsH3`_7%!pE`3)-)w(8>Tfj88X9L)E}YXio5iSSq;a0GURboF*gpUDe4}F4P%)c& z;jD^jZi@Dvk&1c3f?=bnmUTq^C^o9*{;FnE9-LJ*t>?PrU8_kvL(JbrE>4d;D3Yg| zkX0Q@V1PKZdqb|a%YrC>?$8@T_%kYNa~MR?VGtPv+h|n!8O1tkwOaO35!R3UjpIFn z8t>2vG-3pe5T;oYrwNd0N5eK&Ef zOD~$;I+1IMQ>v^>;1I|6MYAL8uX~M`V<&c}R!lx`3|F1R!Z(~7FiCX4gcs1Wd{)yi zoXr-2m)u#~vFlpmEUPkA!-N&HAZSZ;dS-ysaz})_=ww=1G{WC$b-Vi=p+A;dW?ff` zSp<7G?(Ahep1hiWk8i{1bBrhB8jzXlO;O;*E6W-=lk2pHltiZ@3L)OQbiByFvwSB4 zT42|f8T$d-AUPg(h`QUcI(GA?fd!9at128>&=>B8x3L8d1NNGlgu$hEwLn4vhm9AW zKee1Wd~P0jU`+5nsyO~|ya3o7{NStXbRL=;i|KojPLH{NbAdUWTMsx90d;`I94nq7 zXChXJ3B`>#%NvFrJKDD!UAAK-pGMZrj!^M9ZKl{BII%Y|7wtJHd|_RRN=1+}(2OoX z>{Nr;88%x3cA%5PNjP>3{W)n;?KYl z=Uy;zHK9Cz{wocz0iQMyvPMc20uRbP)ER&q6HH1asgCUNWvK~h$5!G^^$8V2$O5PGhQ$X>hYz( zV*y{9cdE6d(ujaUe*uVi{lH(=$X#fdeg+kG3J%|YRpiXCMToGN3D4KR!P9iruu5DIb1mi;G21q>75K!?+{|Ts+cWK3V-isokKL&|UR(h$gJBAz z?`WF5w`==HCz=w|;-4>s43l)aiNjKoASmY$4g$8TH!gsR!o@6`>>K&r= z4Y7fLa&>YlbK3=716F2uy8G5@zG|XL{pG`g}fv};7 z6=V;V87J-M6qEO`NIc)eqeT@T<&cSwT}v(;yLe|2XWCglC>D8c#WwncjF9f_fcXKV zf+i6h2eNCz!6g-lz^Cjl9&$dr7U)RLS(X-mQn<=EQ}Fn~B2L--0st@FFF;5-H5U9s zFpO_Q5IFcWILhGL;1|8w*oDw}n#ZAmtXtDbXf^G2t3@+U4qJsUQdsx8SLOX1MYKbj47OOcxVuXbR(!sDL**cB5F1!pdWR zB0c^ZHd;)hfZFDrVrm~k@M}fx3^*1LpKqZ`{^BM41rTyf!ukV2a+M4ryM7xC{XB}`%Z#~|HkMOQG;0NOwp0R{tnpQXhDZVPr<_g zCl}l%!Ir{*FBC7}-!V`Pm9ROirTZ*m=NM(kgpG*119RUZ{PwXwC~N}%5=x-wtupm=@hh5Y(-8W z{bUkPr^<9k7 zY=*cb&M2coD@-2zOz08%j=0I}5v zqmQR6IjD+3(5gN&usil(PkhE%g*w9c04@IckN;br3yVk7H4!sc@$@`@vOd_boL-zF zNBr|2|8M5Z|M`#q1nr`1VwM(+cvH(%prT~Xs$n`t|DTn4C#`x5CO^Cti63|bxYwEf zwjg^5P-22rntA1(u)TERIJ9c2bL89>sDe*FBhuNT4 zEW8J78o!9!h~CI}=zfs5_#CfDecpr=|j zrlBb>*8934BtnW=zkpwjDrNFNLyQ}%O=AB~SwqzXute%f@1Pn;|k>6z!1(!F; z1}VCp_22R`%iNuRc$W~G3$@SLmG~C;A72)znS@aU5e1E7-J(4XTz85Q1t-__oH~CQ zo&9l~I6>l(6GJ(BaxKyF10(?lPB7VoZ!E@w!k>JLO zJeLFF+L}U!AuF&G%?}|NyAS{&<0KI4<0^tTL(>k^!zp8b;=`qI-{1*cq73~7#rg15 z6`-R=`?x1_DO$9(3hN^dXE~3q^ebPy*Qj1 z?q0f9o@aRx;nB$JMfOw%o{#Li%Om@GN0;Wqd@5i4YEqBR5xf7^RS3|c+6zIMO(<9w zv0XODHg)HJSQ~(6{7|-06Jadwg2w|&4xzLTIBl2Fh5;pu!W_p-XMzpKD-2FZZh57& ziaRxui$%xy+M8M1g))G#?Uzc=!x%2-gH{O=V35&=Q)Hzd&aGyrYmM&`)}v@1)C?*3 zC3x^v7-tSfh;WG-wo)K9b}I%3q|ZauOR+B?P*G5Stg`Ux3I>WX=0ug^MyP9RMsRqh z+;14s4qnfCFf&JFtqpODX=i1U+jnVxcr$V#vX7Gj4{(VH1UI5R>uTtgG(nuJ6QN>Vi`aMs)!xE7%erZss0oWBRI)3=St-8 zl!r(*CB~#IjDR6kkYbQ+r-?<0D8u^JkQAXt?kg!D0^j?LWi_)(CexDv_ei3QTFv8s zK~ri{n5tO^A)zT58584X_ST9gSRu;EFRYhAIR%6Q3Fjo!TyvIrNg1X**^}7yFQtXY z|5Je)r?}&g*d?^wAjYK@jtMbr&kloW1=oo^-~-AL;%-1*GDBYrEuI%GGYiWx?FArZ zxcXKs%@9vuoVT`#44C#x8L%}UBte)6c*9V`)hUbgUol%HL9&ce^O;fqjI zLP5=(0773r6jQSux6U1}vzIC?y>MYI17`~KiU9(aT;lp0#;{p1MV92+0oGAP8FHnr z3c-z0d)SsX{W4R-w1lV`5!`lPUA@}jIHM&DC8o7=pi-4DE=sej#uX8q07nvkn4yTw zT_G7n#UPA^CWdT1nKWE=htWWH%Unj_qP=zCMU_3`^>**~%%Q6Vm_&FuEP@z*f!P58 z6-5mKpatgJ!C7aUir}F)p{Xg(h=f>^E7LPHMhyn4STpUl_m0#ah7!GxCmIP&Ms=>D z5@qTn4&hLXi_oVR6Phkae+h4YQe@Y_DqGg4YY(fj^GTxEs3jJqnD{*+!)>?#J)uii5CIHOJj@{h@p7(f`G(YYf=A6A7!^HqFK-o;$`;|u61LLRYSWZ22U0ZJ6GA~wtFN3%C+Q$t} zsjitfp~9DZ-lV7PF-Q*2fX6W*YU~ZmD1v-~q*ayIAff!A@+i2|2zgt!ax)s31 zN5a>0I@MWL;T&uwTNWt1>w~S?5A7d1KKx_bKkV~AoiFYdR^9n7eCcuvYkh2lp|G`Q5z6B=^F1V*1^3|06iq@-8jk3*4i~xecs;x%b8Oe}+Flc~j7{ zR3E6Gj2AQOhlXVrTyDVsejv_NmofWm{m_KRiKLn9EsM~=AEb{hd+0}(c6Sy41Rxc> z+%5TXulmb0=AL-QoM^%OWkA^teS}>T@km*qIcB6G!VH7(Gtu!X0{O<0L1ZPomLO+9 z@B(Hn;k{0nPQn3y!`IYp>juX-*m9>HJnB&Ri&ibfSNXGwEftUI{OQ?^Ca@om{VzJx z3eLGj^t^6&_vXpJUei=xx9#?v01NQ};y4e2C6`pV+CH<7Pb6MK&uE|^=uWC2DoqgT|384^t%zL?lyE?zdA`5f?P*2h#0BtD&*CM>5Y@!Sh zQ|ECkR<>w=R}eTexIeeo9o1!hRsFH``OUR7m5A|poJL5{78*?`%0(cR_f26w~3Ou_r(=nY&E@U{zLs_J#n zqk+A5%q~`P2%ZeDVks9IU%v(mqLoj9UxY=AfZM>swPsv;Mu@fWq;Blg+H19Yg+;gm ztf%CE;-<(!2$6L$CXvPCFjZQaXHpbv03;pm6`uMPxx04Mb5e zvczgq7gQokhw6~ILLh|1$Pck&M{T*S!4k*)b{qZd`>_O5pXgTwly00#guNwoHBJ$w zPmn%#eX%&0U#h^6Sl?sz0&@<_6q}f^0DnDysF$(6@vWche(R8koKux$1D9)0m))74 zX}qG9ThPk0xmuY7bx3-KQI5HLtVAhT^P$yuXNu~SX@xovb3!1etnb!5exF`$=Av+~=E5$BLCcl^c@F!$OvFFYul*QYz@<)x}u(8nsSU zW-bPBv02L3xCh!?1a$(DIdjIiq(N(; z=tgP?m|XRZ~#aIIOm4LV4nEBT%XiYi|cRVqv;Z?8gv}OEnu^eI&RFV;K@)P%KmYNcl}4q8 zm1dWmvT!tU*&TrxkEhPnJlJkPE*lv;-^JcPq2u&U z5!Ni`2sp|VvZ8%T&W|svEngg#UM^5MzqafbRwXJ8ljh<+Mu_8L>f zi+24ga%N;NINZlcfx!MNiemGHtOO8c<6}3u#ZnP{D797i(yvo&Tiypz%wLyG5Y}#o z7vk4UCerc2`DEh0u|Cv)=S8U zBAzoX@_iXs)fj1y#Z9lkb$SI7JCq|>+$l*Lt=ef-Ej z?&{&lO6ltwR!W%D0+g6{2ql{Bt+G;TqeZ!uBEK|erMQW&!nbs%muhh-g{w?Y*rt-{ zF$5(`T8VJu@wAeE5aU|ifd@|*;iklIg93p?63)Q1a>Xg{VC0}(Tlg8@rNiJ}F<*He zMvS>6-ElOs`=X_2a){j}t-rcaXl+w8XYQ0hKFJlZz7Xj)F5VGKBG^%H>cM?gm&uJu zC~<|^5o%5nE#{a`OK)L7WGru}w6sGDFUo=wR|trB$p%+{hH#q+K0x^afQqL;SQXnr zC7d;wT;QdE3(PykTtGP@1F|5zm5Wy?)MBBDLL7s(OO~EQ#BB_MA4nHY_$$0hFy;V2 zhOfwKfC!KF4Dl0c$&rv{%kn4wi<4|=8I+IBAgHumeIb+8h(cTp#mcQ?ZuUcwo>;@e zxAYVbuV0pb=Fn8aOORWnN)3M5=pJxec-YFrh3Usw)3YBk4H=+nm zEr8Z2Iv2~DJK~onr%!bB$ig&d40l4>LoQS{i60_X6!B9YgwsfvGre)6+sI22h)Bd@ zK{gIwOV!twf)b5vD4`kwnwA$fEASZ?;Ub!dm=!{Qcccw4)GH^R<#IuF=E-FfPh{sP zp`N#M!nqWfU6O{#+dC@uE1Y}zT4{kmM0J*X&{w6#@@74`<(VQqQTJMrWM04R1z1TN5jBL zkX=fDl5kHD?d!x+LYmXocJRr8%w@A)C41w$JSwGtSt;UPkig24OKc?~)-6tK3C7NW zQdBO#zMjjI^#i6J)oMLwymPaVWbjm$o>s?F2Zdcr_r?nsv7cs+av4Fg4YcZzfa$jz z4M1?ZMx;KY4%W8~^*DxS;6hdWx318LM7i!ER19`y$fVSaq?!+ST<>9W8 zDgMwLmqMoui-AA zH$sN7w1B42ROUPyHAa=yXtcWfd)3j7=5Yy6g%HX)WsMKe+cBITvAWBSPNo0c>h?u{ z7OtWIi9cRKu#1K=UJCQdtAlGxWtDl>*E2 zW+alK9%EK}5@D-Ls*>Y|D70v#HA}?7MbU&_jRwkEo@_u-0bGK2X+P3(P87wU1vDtw z;`4+w5X-_8Ul?7V(>R{WN&>NYR%{@K=c&<!hhFsr{K6R4i8=&ytF?eK0}Br%i-&-@zU+LbVRb zj&L0Wug=b#z?;)ayWo@PWteIKTw8GktD^NqMsXntbAdHPHNjZ5AgYyy>FzacJG<4V zJYq2)7u%>*q2ZdknlgWRT}@bj*I3Aakr98yTgu;pdCq2k^D3K`-RdBtdfwuaNq+Er z0DkNqEiz9a!h`Jr5-?5xdmG6t*3!=8*YJ77!$nv6Cofq zE80z`y_Zs#NjvXCV=Sp{X@ga$bv)uSC821j)QiGXd{*Dqf8{31|5S~Cq2%(m*zYfM zt|S%t7Gk(w&R{EFAD#F@AKM&`vtegq`}RyJ_IsC*vc1ta%+RXRhs_Ge_c)FG{|fnu*hx37f&&@-D0oY$@^cb z;O*}>_xf_fQ0~c!Y5bypiKUmJZ!UfeWrEUhFAms*>Fvi~c zMA<9u>cg+`5J|X8X(Rx`12UtQ!SRgBc8M+O{b2Ay4N+r6%wu;k4U4xp9&&?6**(3W zX0deG;aRTRZUu&M5kXMlLCTJ*uY#ZrLGAMNXIKcuF)Q-maQP@2Gh^ynoS`frXDpeQTREsCC4mZS`3= zSL%0|^6@sGx(80;B8qVbOc;~;0$$#+;t4n#KK<$@lUFYu-`AtqBSfi0VVZgv-_Edi zrH2Q{vFFToD8BaQs+KY#>C{fo0c}Hyvl6kxcB@-|nUWPsRAd6pM@ul>@oB_;tsB>c2ZbVI6I`@dSmNi*P2?Ss!UqFw%M~ zWEA?WfF9nd#~~jZvbuCA9xr1CR{=#~f;W9=huOe@ScG>89D|t#qL&OTMa~Q1Xa4|^ zD%UY7ZK=A&WwslN%7rX@Z%c*=RF7ul+Q&f7Huw)OO16tDY^a5Em893#I%L?AJDf&; zhpe&JYVFHT%&ykyQ_Y<%>yp4?xm|r6#jI~SO$DcDYx`>CK<{k{^82SJdNLF9@Oqn6 z-N- z2E4O|R+y#@|=%2P9x>L<{JDv7qWLvAnYg7BQ(pz0YeEtLfhEAu7sM#2;azR?DnJ zu}8Jz16X)ApEhfVM^1j(J^8gR93@}Fo(i!(uGq4GGp6h-pj)Jju}l#WOup(Jujf0s z`+@^Fv5l8XGpNYx{!RMV<2o%8HkR8cHX@e=E8(+TsQEwK+k-lFa|Z~2VVz6*?&nA2 zwIz%c_3tZw!u3Yb)rc)IP`Y@9Iv;S)19B~iw6wwjqbXpuYsw=jU~X{ZMPWdZ95vLs z!=jXmDJU`Eb=pTKPB9yrC&;FrgF-0Q=3&8zs>K^9mPItDk(QSnP9 ztxTpIAI3P7(%;t#h3Nf%1lt2(o;C#s0EamPEVu&C%hmwJK|{U@p%;=JzOg$W?N z4tGw+Pf)e=41ULsM52zu!8&cstKbSR3J4x)6E3)63|8}sphnJZIl3Fo-k?*sh10x4 z=oXhA!aXQ%yWBC_E*Fd8aUGuQv>WZdEM$CtgU+gZyWGbxIyNU`U;N;Cz%RyZFEBoR z6M3}dlx}~5Tet9kd7K-km2tD8y8SbJP`(V{(POj^?<~9(M|1m*_$$3R4E@C{(C*6% zyzm|VH~>yje|_Y?q(7(wkD%hOSMU?YU|8F|J+Vi)@G=h}-%N^dEG}I{S-em9U-A8k zKn{(p@H745$j^ueO=Zw%clL_gyc-`U?(8+X-6IZX1m|IY!}E9UmxShre_*#}+-03I zr%)SO_Lf#@-}5T%HpJkjhrrB1@IKTe&8d97NrLkDKbT}VdAD3mJOPY?1kW2tMkHvq zWDzS+&&_^tOlgFrYdf?yS+Vs84$i1T?{@PKRebfnON;<0l$|` z46l@%2w|rT6QL*KA3%kgpD^lfj5}P3n|^y`RD$;OtqVLDXGmvkY@b~WAKgHFz1dw1 zNdRbq$Q^J2xcTDb?Q(AZsz4$$>p-4AM<5ZC?>=IRWPsJ8DLx0k)-W7j9iMqnQQn^& zs2Wy(Ndh&r{`}MPMXL@g;qugxxi|Fs0{qUuN&&~D`YClJ$g|or=z9awf8#q z{m@dlHNe2gZTadz*^+bB`>WLZ7%LHvuG)|HdxLf%&doh)gmdxm{cv7AYi;N<3@d>n z533U0gT`R5xHZpgA zofLxiT$oc+!S~slq;G9HM5lJhyNGyk@Hz1E`EWyxQ?aM(nGodk4@?lXe$!8q$Q$Ec zm}fzhehp9bJ0XfWaf2wsu(Ij4K~9jX=OIpJ{`n6hPP`zL((XAB*k8og&x01nH8f{=9;<*B>!kOdf)=s>=IKdMSbl?7 zzV&jeQhJ~B?uPC2U(X*sF$n(+u@gjo9_AgIhq$!jJgBAudyQdE2DhaS^`AS~_rqLI%t4Ig#ms-%3D@(iE>^C#YawT~wRy_jbDm}A2 z-H-f{F9OYuDRA^_WrH0f-w%9NTt@m`V2$z!kASuFnpiW7k7Xb5RZuA|JvJ%@pi3C= zqYE#rgGBu^$a)_~MQ%S{Nlhw${@{Hsrjlv)_WOlhGQ}MYWzY2JyoWyzQD=tL4$3>~ zb_T8D1G9`f#FXNahT(hfvLbHJ@3Im*egs$5-uqIxWs3T27EXH9wA;tUt5KcyfH#P% zNsEUI!76T?Xo+2QV#{i-`Q7d!@MueF+G9!f@wT*Wnb?ZS!AkYwRWQ zi%hQw?p>qzT;krVxH}M!C=+AIPl_|U5D?iFR}9fO5GSyOQL^eNV3h>0rTAEw2WW8HWWwH1<09;p)%@`2WG zOY6qy1;{?|mP16CETTw%G}8iJx_P`V8H!=t>TejaSwY#!lFvw)sMD*^l)WWVIUF_i zdTdeh(QHN|avwv1+N#M8x;EHoFFGm&r;0GUzZ&9Y6Im+u`H#uzFgW*VZ+;jG;PPBd|6dkMQFFoD8-k?{}4q+K7 zQ}(wGtWz+7D@%cYfMB^49NW$AK%{Wjmx3Cf)lp|Y&Px_4JP$1e_G3#yX7;O2w7wKz zE7!-Cf~P0t`cm+1*n$Got!oPybt^4|LR#tgC^f$g8(j`NJ)?N&^+ zgx!yOt>Y0Lg#1;NevQw56;084YO`o2?~v=i2G6fZz*>|2T0H-4 zsQ3buJ&c;D*k=APJYPPif*OZ)RD3q)_XvFcE$MdrQLy~dvOB$gp^ItW;UrzNeRRBh zy+9@EO?s5|gtE5()MylEkvEOewW> z@lUV2-yGe4pW97A(^AG_Lg^}-EikIDvdL=;c>#}{@zsKwz``MMr@@Wdmou}-eV5aq zOTICV#GjgU3=aN;XS%EWdQAX|h8iAlQgF9A-L;{AG5vW_@~bmI|3FlZZZ{6z|AY&5 zqbLgV=T5D_2&03{%4Rt;kXE3#9$&xgcY3tqw@&tdekHa$K58`0ZQI3cS7^3AIUXOf z?O04oZTXkGwWcRXh_1rvGO$>cpsgK4BsLh z|G++rUY{mUWp}1`bTSd0HJCaTbkab;mrW)@GErS)d_NA82q|J0{88Yq z*higVu`guadH6g?uB9`2EzOPBQg)e#DE3-^Oj@z*i);6n{gv#&YJ9ZuTJUC>*V6n3 z^C90K{h!z$cy0ZQSzpVk3~}&CIXOwLX{g875D(!Uti(9$cn8HE^I4jn2o|$3AJ3|v zGOr(#iB5zpao4F)S$S+!lXH!F_VEh%3|B^ZBzQWNQSE+>hpC1JQ1X09+>bF&(kak? ze8maS4Lm>0wr;Q8$b~;Wc|>4#$IiZ^r)zSryeeSZb=cvV_)sgA z`HM@XEWBFICwJ5YI#I2S6IFJZhbVTUOk(8=JRaYPdQe7szE0GAMYG&vYE^hl>OB&m zujv!5M9zn;*ZitJ(ZkX+b%4ZvG+|?Z$uy=mrJQ&qlr+}ki}yo#Kr6Ayuxk%T&E;%z zFApe#V(IFbba21myW&Je-P}*YMS#a6gJ0_vtXE3a z#BPvaRtCHYbvoiLou??A7rVj7L#7VfT(lz8{k0J(65rJ*^Qu5r9#&O7iQ5G_uGd#}Q##D%9hMuuR4O+$ z-7emYFa53I@f-BF+8ckX>@p8g>~EP=dJ2DQB@X%~4D?s>x7zjnt@F9-PM0g72NmXe z)q|sh-*C z9>N=Z6fP;`|94?x-MI-Kf$Y=C$!?tl&DVqP+)dcUiBW}+<8#RZD_cEiYjp|uKQsOO z?&1Gu@7b0cw~_r7*4aFGsvM8*vQuSO>6&q6Zfkpz%~Oh!V4FJJ@kJsX5mlMBil(a@WL3J@m|kiK<73ES1z9c~kQxrp(BiIy_Q0o7Caq^-vVVB|kyp z5{jn?QaMFMmgGV!x}-|9q)M%!EUD7GT3b?OIBZ<5Wc4b~XR;T6u?MxuR=-qO@EJ|E z6yS(7C%=v~C!DEEZ|%Q^X0ux9DB+3u3`jG7NflVKC=O2?S-DE8Y>{p=oh#lC%F|#s zXGs+h9VapSPh{q}Z*a5P_ak6D>JU_lDJg=*DJsUbarZ^OR#*5e0z!<@cfKaPzdCFc zhV7_s^VQs(bsckmm4-PPZXQmZ`CN1JlAFJ}7WDw-$m)(b`X0-DMh8#B*Y$eis* z!ey)3YVzyqH|OgV!%8XT((AaQ0zBJZ(Oea9vhel(XU`@ImuE9JE}DZkpD}MLV7=9h z7_xPg9}~VAVh!Fd+=P*Zj}rg@=2il5!&sgTmYM61Lz^pqs9;ll#&DOb=FiC}?%V!A zYweJ|KPf|h;yemd+AFa_&AMw@w^3@=?L2h8-XilFXSO5lX6Cx`N3*kL=e@FX^T617 zP;XZT^2O%cndsNANi>-RCHr10ZO!FJ%jK;DsxD+up{QmJs$>o zp3KpI%}IYlpg%iY(^|IYo71WCY^$_fC`))kfd7azydVLW@c1 z!3Rr=d6M?_Pm7(rv{>sk>Ye4i+wruxK5sJGVy^92PL)Yt*)d7;rfrjS^`g;Of3&3BG+l2UqnOTa=c9Scl(9ykvyC?dDH)e<5L385GmC~CZK3+e#=2*@Qi@wyq2L4QZWpI5@#=etqL(v{+Cszu> zu4!kN)pR$$ZL$#Iv5oqSeuuSkA(O zDuH2PN&d`qiD{g9B(WM|z0+=Ts*AgRKt(&0X>Y&WcRTMc6l=UU+zs(&?`6IvE0=g~ zI5x%4$8N_kClk13g5nk~Hwf!0!UYacjFYyFO^<%?;Ul{|oZl>g7=N~&p78<-D80xl zU_zgxsWbi_+!_I8e*1&fkEhOm>$-1?$K+n>0Pon2`^~i|w{S!5w>vQ8^qu9g&8!P; z$O%I66b!kf3(CXqpjjJo+K>~8M;mh6Ge(#uinZh(U1z2(Ic>>lOKx@b(UKD`Aq5JB zJ4mbgBKO#4)`d3Z1gUrmrd-mk?csOOywf{KwRM$eJ+*bUJp)0wUzDGJIyF3oT&|Rt zMijFhE)-bSN;#`iW~U~(PX08&jWT^Pcx*H4;v|%^uti*Yr5qhWVn`{INd-%scXsrO z{wVCW-6;C?r^}I-@pY}*m8#tgj! z#0r;{v8%d;%gcD=z%yolbT-y}8uSRL^4NvotN{Z7BVv%h;6g`gR`?F>!zV8MOSCw~ zGEB>w7~$F63k6kZQzWY?a?9xAEwDyz(HM!jHG3;UjgJmDoC@`T*N?Yj#QaQrqssz^ z9Tp`EQ1o+D?1@k|8m;yvKfic0c<6qUPyYpD#3`>Is+ZahjB93pU8JewvJX2jl6IJ! z5UTA!HU!v#muYRb49u$9F% z(!!%A6g839_Kr)H+WS}BFdI`7Db1bO8_wjwEF`XcMVPm+gA!{9+$;6F0#xiRUgckD zl^@s4y3i_LpsQ1VQ2AGf3?Czv$`>Zg@Y!rPSz(nt%Z;pzUul~`)>@#jgp`=T zR`4ANyo45mw-|Zk&jlD2YU9B$dJgr>ZI+>7+Hc0(wdjYu+o>})fqx;b#(>LxTmso0 zm^=biOl|TiCEi#bzGc~#Z<$l;?`Qxgo;u<*XApym%yYSaWkrWvrkl_=>a|~BDtDbv zY`s%(V9ysV9Ajd0Vsm11VmlMt$;8HqZQHgr(ZsfGTNCHz_y4|^TXkRh;q>XMQ+;-K zuf5mmy^n$qLh7jI?l4&}!^1acnDTKQP20Dqo&Vei+k&*DaUZ!MwvG?D zu_}bwcs-?t_prc>d$cH4JT9WODxo#(DB6X1K>DC}iM#&71DaQf72d4N)~N((1cW5q z6F|xokho73K{fpjO6`bM%+VBP%*``m5;ZMcWx6=w0IBZhC$L49$(Bh-B(wcIaKlWW z!zlU)DYIA|mb5OJaL3ccG)n@7;H;1wu^4wcVFI=&UcC2ud&G1g~e!*yPtm{6} zvggx&K(Mmj=Wq8EU1(gx3=J%%q3K0Dn^zdt^ZDd)eV!!h>FEg%vZz&JwA&Pa1p6d5 zi$bC(v{1=H-rP_y@b2XV-qq1EPMlTa`ZcnbTy|@M!bX&c64jsF$TvC>9fFtA$2i!B zp)b7(aa0bhJ{l3BpPrWPA3+9hP-)b$N}?1;oQ*@2t5VtpX5*OIj0^pBz85J?)Cam< z%e(=?r$$B9h_A=*V83SwcoG(@(NHeHDBd%O5EC9#1rktXzXOZ}u?-;7i;6+Sh(qDy zrW{fv2}kW=v*}Hcs4Tsaq+i(zqS~I(M;AGr*iWl;mBZvtV5MD+WYaKjRI|=QcH=2u z`8fB)ij>OOt2MO+ew2YNn3fC%u#t)(!TrkG;JeSC)rtGQj5xTpYR$!)2$GBb2SS-> zi`VFqn=#gz${6tKO=oc29ee^c4rwzEm$b|I{yL=h{lztc>9;`kTFfIyS$I z1s9Is!xT~uvgXUuYl!?6)jYsJhgCjEF4-+tz;AwAxjnogKB7PDA<(6FcFy05pqF4iTP?6U zbyG3xUk%4vCxL)x0lQB97wR=!W@BaONzmO0Y6tCiiX>9)05yI%xS1hslhQJ7v)+5U zMm264GJ^719y_C!cYYs7q+}C95FnoBKU;aB#K|9uyVtVtf8}m=-!0R@h zb|{~!PbKwPd!p&Xt@da;@YiAmE~oavDp~6W!{^8W<;+!nFq%)Y+vmFAo8d@qkweLh z90PB7K0}tEw>@26APS5G0f>P2^|jrrWN(iZs~xaO*yxc&T+o}*K)98njnaIh+c$-M7z`)s)K?)Z8@g2uL3+Q! z7UnKmw7d7i_9;yyKFl;r|KQ+xbMT@+W!BZlNCyinWU;Ef#6ucgsFZ6fc8liN**W0y z0Mw?*AnB_gzEc&VGxC^Zl}9*Y4}4qp8g&yU$Qf6JP)ntpcK8JU1jTJnqOB@yO4N!L z)U$V@b3A=V?TU8Hq%jrgbeC3{6;ysUnp`6FC(kU^53n~d$n_;_#D_GS+&Z9GMRzVl z)gfZ>z5X(?A*y9+^ixRmLskivsznl`0QUL0crzq2ps6RoVVu1_9;)v~j(hn(nYU-& zy=DLU>tMsa^w#``LlE66krm3K0+(NVXNQ}0Ab35NcqCDmpkxTZ#%+4ebE=`1y8UI5 z<<+nIHtBU$2n_DYJ4!L<-c!9X4uixSs1Op;jOcE(T5BFBj&EqvE1|~{MvsC3*zJIb zaS^9*`!v-)I2uPn|D7U6=ZG&bY2IfQu`PEn^bPL7^->Rv8R3YUg*=rOcvjO`3zUetPOCi=5~mfcj%S|Dx1vdm$0=amSe(7cu;&Uq6#7+^F_&vWyK zG3-F&vtzAdHr=Cq>s52vdjgdT_XS1CLaPI@rKGY;28}3W(S+DRe@z5HQ$$gCQDY^e zNIoxIA)54b&lLb~3a4*68fF$CzonF@{B68_!QI7jVe?kk+&=p@;h2|;3>i^ZxS^5{ zA_bxgm*B>m+t!Hb2y&j6CW`_}!~Y7+)pX@>-Z#kIEY*p+tS~?i{YUYuNN4EtU4~iI ziL?+KmlU%Bp^D1J%U=v2-EruS&N4TkBRvh1_CsvzzUnzKsPQQ9LkMye6)MJ(eD|iJ zR|vOvZ#ec`_w0a!3g_mKe`i*%5@mph{U&-!f|9y_DObbdF%jDGfU*_0!{Ylw8DHZ; ze%?daT|uMM>k8+q5dY{Wjr4<9%gl*G83A=Ns!O#_MeCPMtu_JiDQ<+-suZ_qFnQMCAlB}~lp9gpTu*upofXY&JA&`X_WUuY$^(6maSq_KH;<4N_#!4Qu?o>--D zUbj0fIR=+!eU%_Y!sK=K5bl9eC=cRwMfzaEnU#a$7rpo}k+C>m-~bcUd@Ht;D@Av2 zkG?ps|1RYm2O=PPevK7=AS;Gv6k*VTYRVCyl+(h4LcP_uZz#P zp2hGq#EOUXzh8X;?^h~iVpfVnk&*TH6PZCX#>dh&Q_xg=v7S7K{CV-oylqh$@Yh*u)QR%le0)tqcBZf#h#+ zjLidfFkA7FdOZ8O=Td9v^~r|+pbNpxAQzwT+L`&;9s4=}pjhP#$i0QN94z9LhYzjEQZoIgVMor!?IEedaA zi5KB@4YfO%w3c9LVod{+>Z4n?crYg|^fTxI-ekj(2A~8n%l!Qg{eLj^vIbb!)5_I; z%#)@%I}SCtmCKS`!?$y`kzBAb85Z&x$I;ubS*{}{>aX-87oxe`?9KFgMreBN^!-p8 z1cop$&xHT-Q|jN^SLOO@_{2*s6i55rWKurLTizKQPG4{*)VMEH>!@;N>ClwPWO)7O z(lw1x*03eq2aK6^j-0=KPxVSWRsfOB@XBBsH`Vg!JkxvqPWsG#;LX4q;9&QTTo}f$ zpsCUms!}HT3=!jsPO{Q$(1$5ZKGHt}ls`hTvD>h%Z6#3SypEIQi%t16M=F`GD^$lM z@K_8fohz3Q8M+X&`5rW0$PSeRUu@hq+foUDVR)^SZR*Ia{>(HYV+}MzhLUh6@FePj zu)+}-T$`VwSwceU?sM@tx_iIi!C{FMZKPk;4hV&mtxz2nVdM|IJE8w5SY(Cs?DR8n5gnJ@^Ulz%fd;MyoW=B9 z+6S0FPAdKsfB%-z8FZ=}BYSeFt&_HKXjMt^#34pbMI%9Pa`Y;#r*aVRxS6i(ofry7 zUhUiLr(X8E6$2egm4BfK&tDbUSlIb`A7T4il3^aR2M|PA8W*>pUVEj9S2$I~CA1ix z9YIYL-^|dOAtG>NskaL^0jqbZPPF^zbZ+TSWNXy97lS-cF}pp`nu$NDQ)LXzRVe4x z*>wP0WZZ%06^RhFZlbR@yR&ZJ)a)b?l#Dw%tN3Itd*AGfZ)u8y9?58g6n7<3`9`{u z)`OB0@|DXG38>>&iAyOK(Pj6<(5a^iuH5|~CffUVGEKY~#)@3o>J z7QF5MTx;ZPOjVyg&itp4z~>JND>G8@Y8gU?c1MK{dLX^XL3*uVxIOu-p@R@vmFAz- zGZ&HB(Y>20MMz0~3Z@+!J)wfo2ndK?8qA<>)x~wxk9g_6p-BvjhSHJ6wTs^<2_`!c zPbXN2z;E-!tLUNj1*ipL=wYMt4FP`OnRglbifp@xYBMe(?mXPqML@AB z@-1^9D^wx&u$|sfXEq~#;mzt(OR`m&zZYmyLL*mD?o*hYKhka8|- zs>@Rp)ii%8e~O1{^N7u+J7)V64*WJTjvkrYc}2cb_rOuX)frTu(cPy!-H6QK$3!ij z;~+{w>m58?$JbCE3+dqy5GJ&qspU%x62IoprC9)}LYSRqEBQ8Cu7*e7 zOkK+2A@VZB3o{MXO|n>z*-a3ZIfedrw>B6P+UPcQ~T~t2(>-pO^~lb z00YQ(5cDA=vfvne!eUG?kZT6Yzek_Pf*STB1U%QASqxNabv_)-#CiqS$z#Z8$wnz| zOT~a%S(%H?D*ZyW>_vGqdrpcKtj1Jh@PwubHY@X;m;xo!3xWZhA`V4zr&Dp_1-M8r z0!Y8?tQR#A>VV%HH`=ZGgBqjN?3Goj$cTP~{NFH9kV;{vk0DlRAqI)-elIBAWz}N6 z>YwPSrXxRsG${%GgQwb4*je#loe(!IJLZZCJ#x`+|Ci+X2i9aIfXdkZX zP$eFeVCMx-I86Cs>B2gu2AtM%AcF} z1fA^?5M^WdXJ=#h4+nPGyvKJvmWy&Ya9VzF-DN7N+`4SEGrWs*+BzTBV_7j{u*t=J zpg$iDLNT;<8svURXDADKsV@(I%heQgJ2sw^{5t9%M^exeR`PU6s<>>U2*8I(_?U#c z0cQHA&!dX+Y(~fEaWiwmalLG&%@VVN`MNuKi#MrBi)Evn5Bt zj#@|eAE7(lT-Ia)hYh#<3t`hEqEGXh#zMH)+oRKw z>i7Evvr?-;^ryts-}h+Xyg(2&C&m+@|D%klacC63=udNp65S}bfySx@Hw1J9#~rZl zP+6h8iozm4!e)x=A~imVNnk&WnxN*C>uKe;nQFy>BHzMoX?8!1?zsq(>Wy}|5)Z;A zoJd`uW(fNrX4PSh*sy#GGvV8Ua)(+ob}D!HXBQ_)B2v~oMZuQ z7Q=ni3%{zGYD`SD0$^>=m%+p6GA5J2l*R-dKPHs=LdZ36- z?m*+?+5D#bO~CnDpo%(LM0vkWVn>2aw25_yg+V%>T3>W5@fE%8mUu%3NmY^crh7be z$_bSeE3NbLj%?7vGOgn0(R7t%TKp5K`oRn{`K>s=ru|OtMMqoU8KlnvPx=Des~}4i0hi+%x*iIeNj)Tu#@mqN#(WKi{0oPf%>peYzX9diUwaUtW zPOIEod=r0Gne5)TWXSP(|V5P1!hc`2Ab6^^%O{1oRONc_pe@M4O%iCp1G)d0+ z8EDd;eIxRN&CQE!55m|UR_*t#On}}e#T3f5tOUb@2&rI;*2G_vAaI**j;MxF9$64A zBEXk-z>pO*6B%^BjIIQBI}nCQ9zjzUWJnAI-o~9~?yQM_vT4#$Z-U7UjTWtwl(GMz zUaw8l;bj=@iBIa~$y7d+r^#BD7zZWA4DW@Cx=^}|bVo{A?)!B?Xy~D$J2v`?s>r=i zxI=UnY)nXdzg{bQ8g>CkA8S`aOPoI5A0V2Yc0Oivbmz~tUKh zX^4AfIGz8FLb6$^nLG212g;bEm2v~^>!8MpMxC8}8?xFs+9#Kk+IR!6r`Z61T6|$9 z`9!#s8Xa$`1`O>X>>omM+CzCdiIxDFdNlXJd;{z1SyCp+>IcUEe@JNNjIaU6AUOPV&BJUXNjs`j7_dabc>A%}`G{3ZRNw69n|eGC(7oZ-q~4<~RJiqtem14Yi( z?j*5uWizDL^~7M$$K7dZGz^zBSOr~PlycCC>1XQi7slnYx%v{?vp%fPBGd@inUeii zz>C#%o-KnXIVwUQSJ^Dm8YY5;lx4`9MVI~)XUP%2d<;c7v z@R;3y<9Gc&4KW#Rn+9A{ry%Y)33&ejd`G4&`tZHXe$QKVL!cJ_d(iSlI1lqdDAjV~ zS7I&L{-XS_7Yht{DpK?7O(g%Bi3gCkKdPKFdcl4F&7wb*^eoD$B6*6Z$*WL(Q(%II z)MQSOK%x%|^}Xj0`)>W#FUkDeviWLFzj0ak@#l4 z6|{`qD-1DCdzY^WGW8e#+khN}ym^b6EWc63(bw?tm1r*F1OilFtUls7^CLhUAi6b@ z`{KNj{{ne#hW+TZi0hUzuNuL_oS&5tz7#6+ifZi-OsE%{U2N^78gXG`oB!o^{1498JjJ=VsQ==}-1WqBAPurmDH9%d@l_%> zaZxh&)V^x7!%%qnp0d>Z%47y5=B9$x5oC5ZMI*=i^%&pcXx6UXn#heY`@gUmD;a10#wlsd{AyRi#7l&=!{3E-p8&% ziL4v-Ee*8oWoEEIFuQEEnm;q|2L`eOGacfth7%4zjlp5A92SDr!D7Czxqc75R|3Fa z6H*?nA+V@(l;f}IFunLVLIHs;H`m_^F{Ghp-HJSm=@TW!V%ET`+<=(l710ftes*m{ zKNb3mFA+6m$)JyJRy*uNGF5VBp$Ox{Ahr$156CAVD ziCbXSIlS(n{(u&zZUuDVK3mBQ2Ofw;Wd`vv=|lwLXbDwgj#1w9NEg<`id*soO#QR& z`h{p+Yd2?fQ&{y2{f{?;7S1Kmfuz7_ zFmR;q2=XY=JgJBwmXL3@N~p1fE-2w&@LLbqvPhm&d#QI901i}c8$>+LD)!tL(OA|} zf?piejnYh6gB>s`Tfr_%^fSG<**XS>1JZGo{GThV6s2GJjPrle%z~4dF#gH^)YoE0 zJS@j!cV{csf54RwOy8i`O1d4a{+T1}z(qjhmwgGdpZYq|B+&18e5x^~#UVYcuY^BFVrs zomIDKw~s6m>Kp2aWemUU)mU&W#_rtk(hvnmk$3uk9Oa`0#OVybERAWO>BSuS;hcVN z%cEf=y1FWFM5pnYu7nB9<=h1i< z8@^K8hCcbTWCnLJLkgyda=<#2YWt_lUo5s5i!Fnd4y-K$Z~}#RewMKP?QZQC9!XP4 z%TJOBV7%9mV~n_r5i~kjKFWqS*8f?4hYMG&BBY2u$U;@f+ieqZb9jHCamX0V#5Oey z$;`a92}usNL&UlgPE?!O;9%=0> zv%`N96iZrlT?Pt=pokS0{R2~yB3Z^>I5Dmuql1(*_=&9iG|;q}>2>hHk>JCRoq*FE zrXtC<)J0x52Q@ol5_dc`yFjVsmxZ;e)!J^8Sw*IRRZJ~gM(AK8eZ2gQultrWmJOzW zNQZHt&&>`g*#UHCo$=cRPTyaHM{*eA?YxPs8GXzy=mwZcIju*MWu;JXzQ(M))XIs- z1=8kx4s?T}#(d97{2KB+HK(hyD}7Nt3tH~~*tx1>bsN#Ed8l!7Q4WtNF?Ed%A)k6t znAfF$lfB>3NEh;!HVPD~04UITMO;8xKcPlsePrbwEo@XiROX<5&0OtSWtW}7^iWT% zYK88t9QDGs@=Wm+kLg3K!)wfd#pEByw6QQaZ_~PhtJC9+PBQPu3|=Ojk5d*7OI$-3 zgL6)={ULm8<^%Lqtw_S^!w$d5Jn=3@8s;5rA<<1rX=|Nn1kMnpchD%obtga-{a5iO z>mR4VQBbS0Bft330QtPmiuERbvWYj-^ZvHgi10!GGZH4>|Szi2_SQ86l5rS@-*q?c+fjJ3dt?ggI1(ou7?<$UWnE3qgT*^bZKU+Fn8MLUW$1s$BE5oqTIA`yb{mOW?K^9fCD~Btv|YF=8;+ zn&PTR{{|t~MMFTV%w8>6UI;PJD546m1y7Vl!57n$;kZE{=nz}~vCDB|2BXC?dUc~- z>c1Vlzf0ijb$41c>z*l9p^XepSv>mwo$G{l27kTj#(hcN%e7+A%p-%DO<}b-^1nkO zLn)WQM!DP?7{!1_Tx*govl;EHrzTytWlP_1Q4jKd9#Jbh%MKTTp(qBe*(fKWukxql zUmKLTM*<0|#N0q?7#nhE3-P6->BjbK_xy7cI(L zM>E|SW|W7yrteoj*I0H#7&xKYOC-moPvf;cUmMyD%#P#{Oz!iBu7yB*CkUcZ{U9`- zaDExQ*PwchS41^gzFT*Or%L`acU0_%fS0czGD$TKP&JaSPSC5rL-GZzo2P!=x*6AjyYbrk(`n)m`~tOTluD1h?qW%D zdfZUhme0!Ofz1KiWPwXiNS&Au{6xwa$Edu54k$*Ug?sB;AMfFF}dNo zRJ1>)xJKuPvG7}$o6DxyTLtp0LU|~nKC*2obYC>762HU(nm_(|ll%I&p0li6U5F-) zFe|SYmrsz4+vIoQ@8htJ-P3<^xbrju&2!i|{y+N4=x^T=lEl9+Ha34ryLC#NiaG>er;|~_r6{s5O$yZI>sAz?Y&4|L zVE#cbdG9_aNBxt;Jv0XULlu_e^@N?cEpzvH(fun*I+U!z(oG>S`nJ@cye)AB{K9-H zBSuld#gjPS7_Yo@u^KT10V8P`kY`uFa67PSr4LXAcRxW{R@as3#$ze&@#Xr(4z-~F z35F5Obv@odfbs%~e}K+y^spaPQ?z-5NTC*|=w>5g6DC2A;f5QD?IgSNgi6=NDq}Z= z_8pNQOFZ=lzOYyXEuvZGOi(?M;k7BR*G0!41qDUi2*c%?`Sekxe7qmcfWwH-*}8Yv z`&&Z?ZCCFFKEWGVwSHl^1+}F0s=e__)dFe;EFt3wDIYdR>!|V(h6z{bt=ZWL&Zqrv zH#hsg%T6PEhT$W~%!<42hLO)d9(K|n(O^ddnKN8Tj!C>S{UtoITx#lAEtXKi-nda= zZAYcZG}LK{O6Vet`-|Uc0n8zX5$w01Gz+b}f%*P>^st>WU$)Q_4dq{GOFHA;M(3LR zcH}iPxbp}D-nFwvdYG#!`Ap26?@kxFx!LZ+?}rFSl4=~Gkj(mcct#0?oD%hgcPGblGZ!Gd$42`?`UXE-D<=vMl+4Gh$|gLA$eTK&|!-e0R4ne8%?BFXt(?;X(t^ z(=pf2>N*DA4t5W|0bA4ZG2ZPQ-LXi5T`$ScZr*BTPL>l=Rj$o2r+sz&EjJ$H;0Wa^ zG7#psc3OQ7lD9;un&2f2#&Dy32v9P1XhtTFf5j#yKp)Tk5i{1 zTqA-ugG>FGbcUJI=DU2VS+wmbkdd04Zt&{J`5q)D%ZG1gBb4Kj#$VILe} z9>l7}3q!UH9sF}g*z^V6B=;R|ZL`Pq#ztdzH>4!Cswe7NSX-NhMd?DOsV1SR4P+Kf2(`D2mZ^YZU?vr+%wdZ`?L?g@6h zbTa4dH$XyjM8mL7QaaF|rcoq1tdM*Z^ir~(AAVmSX@#Fjis;&XhzK0)2Y8mF2zR*r zMIs7>V-9>&0Y`FXWT=y%_WlEkZ^=KIV`<;S{hx-QGiuP_$xPn%Y>r$yp9T3ENKi{0 zfy8Bv(W)e92@}m>X=1e9kb>LeW~9f@f`rNu(ZF($i22VJ8*?9`t19fEhPD{$bzV?A zJ~;PA$Zb~%Yt*slX!vY4T*lM>(_=yN`eKJX4vJ*5vTu^I-;7mL?GpxxC?*iGubgXD zP?O7tWutewiMEVWc|xPn#1AcE9P3qYU38jFH6>)6sf@r?}Ly>WRhT5?L?Tco_> zO##HyiQgd&BeFk5hOjJ{pxlH_Fd5W55yqG#dBsrHZUblmS`p2fC2{Z*0- z!{$T;vj<-7+wv||Rc3E)3+AGN{u{YC`uM9@Ep3{aI4&;W?7`DB%lrT>j6-w>z z&AdtMvl*j$D5H|6sTn?rLN7IbmRm)u>30>eO5$>`)ItZ2SPOQ>X{H>e(XSsjeo ziQ?DnNPA&(E!YKAk2ji;LUBzlUzdmQO2;M!LskCe4T~9vDukZ~MMlH@VWBgck-O5^ z!!yViL)Fh<`|}5Xei0+0KqIX!F7&hWcF6RwctdEuJ&!en)O>H&Av!;%F6x|h*n?5b z1^qk1aoNyQUB93X_gs`ih?N@5jyHG^EOr~U@lxoAs|+Uv8=EMt zk}Aqmg3yqc<9(WFN~uM}DMK+rKKPf!0&SKXwRuJ{iIq+1NbCN9d|^7o@Y2C^t@V7f z{5ILhZId^YEiF^J33EMs*+mx+lACNe6w1p)@fQBMREt%i^O`p5h0FWS?zYaJ1e@8> z!$I#XS5hYPHH*T0NpTCoG0~u%BlbG!d0zf-Js1pT8F0-(*GY_wf8 z!#A7Jy(RA57e?q5*pQM`BI4krv-xE&`a;#CXLklg!K{;FM?)C;%Rm7alEhX0oHU&W z9r)$9T;JN(eZjA~Pu*BQY6O(WR_erzeGApJb13rLChtE{NPih$gDxM7rj0uIm!;x- zWLwut9G)(xhHHB1L*wtiCBuq4j_=d#I)l9^q^2xr7HpoC zizFDOnv2w{HDEHN*Mb6A#laFRBw~{?|FU5h+)~M!LfMpzn&Ilk!+Jiw1NS@{R*8V5 z$=!ux41{?p{i6*M?g)>zS?|93(EQoi)L!pP?k>?g|9+3tmt=xS{Lmk`0!6S%wz&L= z5dY}rb|+YNb8vGwaE8SaJ+XNo)b5)5Ak1nkS);K716{tq5%2<;rxYX2l;cmnU{r&s z1kI}-`QkC=BbhPU-u3f|KggG8_J2ZN=jz!$a9dai)91p<51UUXC`8Fc$dV<`lTC5~ z3nS|ud+n+vE9Om*F(KIG-k~F{&G94omf*s;(ijJ_Z3GQO_5=3{R;oN##uGRlOV-V+ zGUKYo2m4;{wOT;i_xl!-KipGF$-{M?9o^tah3`V5BThxBU+G{fC)9rO(5sqjv3-`Y zTSjK8`DZjqCqvhW3?s%!QSYzta0sWTBne4ZT9sG9(+r_L*o-Z%MQr3pOlWFZiEW%| z%rcq?L$Xkxq21!DF4YVx99Lnl_xhbyY8gR7pKfOKgO&r|4M+>I1re$U@zg$k#u>sZ zu$L}dI>XmuGbY2+$yTm~^obJk-UNe^G}LX^E7~@`T9Dv>E2c`{6GQ4AGN>*@2hMLP zO)l4m^`giD2Yy88FD?8(p4)v6Y7lKTbyQa0v1X~;B}#$Z5VeMFMM7r)6MSG_B&!V9 zUSq}SFa}ViBJ(>5DB)MM*{xQ?FOQ=B46}@hu@sNb1=V&b&~Dzcu~qu+vd*4!?DL@(MYPw>|B!4}&trev(zWUiF3-yydA z!7R_k;;rZRfAx6le&;T+jZU6qdl`N%foeuq?Hi-`~j+x2)e(G(4_6(dEvEByEql-r10m|`<0Y6=xF zQb54(1Jq`#j6~jx%SD---;VTvfOq>u(_7Nm{R#UL$eZzA4np6%g+Cyd@gs>-rQ$-a zB@P8q+ZbWO^nP$SAmo^hYTwUM*7FJEW14_K03aCenag(m| zbZj-rr7f%=Du1j?k@f(>J3?EsUv67rVua!`3gm*Ye^a)$u__6FHzAnI)vI;^lJL$w zN>)dV!8`lF z)Y$ycf(Ieq@pnjj%|3=0iNM1fE+w1aEp^thfo{PRRAhSK_p-4)ZO+g74qwJKJN)3H z^%A(JkZxbX*1fc3Nz@Zft6cs+t|KX^x;;~n3PX0F0$76Ihalg)1f9vSt{p+u&f%VV zv*KW+jOb#ekx_LXEibgldmV0{V1N*R>hQx>6FboE*jsV^ORuq=jnR{Mju39UfUgca#PyB4>$u6R#0GKOWmdG3 zcg+@3%^dy@I@c1Ob8+xRe3VbR6c@$J`(!DEDLp;oLrR5B9-04h-CiUK>mI)kds(WM zGjnp`E$9O8y~ATwI>~ryI22Fx1bL!}rx!GubF|xSeO-WD4)WAhkU8w_+;>`| z=Grjb?&aG8;9%@^TCoOdC#Ju8VOS8bE=@{i?sZy^GQ{Rwcd~79qt1FeC0Ntr;Qp;I zXO*?tF>aH=ixjB z7vEd)N|74DQ4mlzY-Ub2c+A43%#TD>c zzhKQqE4g!dFk11tqqsu!p04gnkV%Vm*#@P6=>w||^|4ACN#%Z$s?3dVTvwcl<@awp zUMEs8Tyu=+@6M?qJ(jyUns1=qvr1$jQ;ipm^!_$)`5!q~$ECP>0y9%d7RAMiLP0G3Hr4(eyV?bqA53(94$9e_Sq>s8{EI@b8#Es!n) zpU+swAvwLe>|+)dM9;InN=T~G;0r#=R+b%U2}lt<=zm1trR!N0kaK7CaH(JvH0Th} zAmX~T`?%Jo5~nXu3mt@kcFkc;3i&>7 z8B_=CC737MSR)Qsv3YF5RwrkTT7ASgqOCtA^vVgEkxX1m93? z*E985738zYy^NF8lfx?w0X=Q>YbRAGL730V3kRCh^|CO8ET%KG{bNh>RbgXk0uT17 zvBUGtqqU&25x-_V(I^2rB`0EaSYIyotl7r{hRw%fHP;^31z4COVm0D&G;E3HV+CjT zAPzo@#HpUa;+2-;v(Jje4Dw*Mt53IjHmaUM507Dpe@39^3g~~x&_IV8>9IAhK8QKt zVC4$1z6MK7en<}P9O&F&sAD2%y(6G_e#*?p0u`xa)rP08H$_WFQE zJ!Sa6B?Ek|8A_$%;#uT`>))yK0y|8#3gMcqhhdB=a4noi($zsL%vzE^=)Y-=_S*J3 zMIiO_)|%)BZ~Nv5+I_6FlLl`fPl?}jf=wq$9$e<&_Z{pCVXHru`ny>Fc3XF;2Zc7qCFp$eui~po=5HPG{TbGChC%Dp0 zY7F012Mp8R;W%ASd_pE{g?q1xB6sN`A;c#~-ZigOLyoF+iyF10bMT^_vR=5I% z1Bz>bkLUUEz3-cuOm-%l$tIcI+3aqzDifKigiOq<+z;F0zol#|;))D$=Mx~gqr!9! z(X#hXF)=9t;>Cg_64E;XVG;uZUv>MGXaCm7J48vi^3A+`HP!z4>Ud@K?-X+T2y#tB z+cF&u%3`kMQyA%MXpTrT1Q$RAb!8G-MQ7v=6RxxEhqkfOAGPsO-I&vV#xCJI$KT_+ z=nba7$P=Y_Xw`q>XbP`eyJH64nye!F#NqUoBxWmq$3?|SRGI~zcSQebiKI#7)VTfNFa?&)~=Ga(u&o49){aW(@@0Q6nT3 z6&PqR*JSo5lA|i>4av07j%tBuo2_)L$MM1~(z98|a2~hO@Ix@@g)2x7bmHnH3g;GP z>+eDm?0B#JEf?iO0|i4Uv(}MRJHqWqEnGXa?!F+tVaq}@y8UQU@)n!w@Wh5(=UzP` z!cy=L-UDBi^PG<84%jwxdLAh9#-+z@#ChK7{ht|*%rdV6lgppznWucJvoh$i#20z? zDdJdfKFU?RL)oi|u)l3*wm&9RrILL~FRVNO5;}YrX@RTpA=;v9Lle4ymh=p^#>$=< zKS+{{-%?AUjqVI6+~5`I4{LKH3sWXyEU_#SH`MAzsQfdk3;=U`OSeYW2oYs3P|hM6 z{le5bD1U|`ZV66HjU-wpz*5?ZqrY;Lp}JE#F&73j?xP6AWm@U-W1fvR^Gsvv&aniLRX|C?rL;6d zma0QDQH(T>dSK1$f2fw4;cMc&ZP7BF{iVB_#R7(|N}M>2Hz9NDV#jn4uq@{vEGtxJTn}kgG$#6rK~Vtp)+3g!h&2iSlR2 z>x`th8*zXQz$8M6(^&Nrmj#8+cg`q~UHIsA#^K(^Wshcm;PPe8#Qko24%}yta5nJS zg0Lu#X9zQ=pC5w%X#+Nrizlq(pm1uYF8QgDNy}>&cU(fsh z!@Q9Ti7^X_h_4l?eIXG*%Zu3_E*36~g@9no2YKuUP=MFnsKy9F@RGs!chp7;w{8O$ z#SL*}@Q?Tb?=9uNl!hzgzNI!=;<@-+wKLpxH#x8>|IaejyS%0bZa#doPS;m!;82hg zy6l%TK@p@oHJv?GY|@sqKC#M6H_@4wcM=`gTx+md-kB@;u6q^l@ACts9q-ai0Q+j~ zG*RiJ-zE5Z*UL{Bd;NZR*v)gf7QUI|w*C>l=kUQ-a(4Oo#@g(*;I#c9!L7G0=BCT6 zbr6Qqz#%D~a>(Ow`(z)=F#tQn>sI8h<^^ck>pa|+zs9Q82$8x zETox{wrlFNe)CiVx&%(64EJYcECBz-FIcWw2m<5PK74^m`8-{~LP=GING;y0T>}SBcRp;RpBW(g)%+D5Lwu;}J%vA8vX0u+ zl3m`m=hQbe7}%!!8N=Od@K00*k+!*V%<*h;N~0XzWUTm#hB%)sUun2VRB>Of8C~xHqh?PVf8TWMnh4GxP|FFwy0cWcJ;b1#9$uB@u z+##mdLUOBMXZL!|zWLw&1g98pLH^GkLlF3Eu|m@Tt-pdfCs2I=yfZ=9#Voo%_^;2s ze_Lte<2~W`d^_Nv8zNLL)6}gi{&7SJG zoUtvZqia`pI@-yv-FazQ-TF0Ny&3BG*azQs&#;{a`!y#V9F-RKZAi#QM4jcOx`MaNZzHgj0T1(skh`4tYuEk|(} za<$WoMiM9^+c9NO1&~f(Gd9O%YuZkuEcq>QSqDv&BlqCR%jHtpftkIdSkr6g4ZTyS zC@PX28J44L<8BFh4B523=2dLuR1%&PRb08QEUP&4EEOPncs1-pHdD$j{L^YFwU8el zS@Kdkr09oWl**`wfEM#=F1zp4a#Pd_gftl5$x%ad7Nk6w(A?sGiOXz+zCukSe~-ylV;78igOgxiZd8o9+6#w<0@xDdqw7J?eJYr$RUe)T4kmHHAgB zIAyLMd-Z5Ku)Q1SbkH2#qtveW6;PsFkozp7fd7*Vk`u12XaFA^>9!de5!46n2~{BPXs? zrrMMUX;mgB6_AcN=^W@Ykn;9(l%WK;nYh}+z!FE^%h7#Fdo|(KlZ6iTVw*l6>)7bs zS*4X<+iPw|f_2N_0VpG0$3k;fbK-5$DZXX`b%hEt*tnr&KwPH4JLTJ(v{v0As>EIm zjOddvO!3bGsk%^&AD1F^6!mzyMS;Y+0yaw#=vfle>t7fp@=e4>*$`jPZ8!IWO8D0q zZHKfX4KrIkZ)qlNZ}gKjJDxMW_++l4-g{4Dz%q!1`-X6af*|(;<0+Fw1rSL$l@W%y ztvc)pM!nJ@Lu~yeB(wy=AyGEOGOyt(f`D8rb)sT-FlK7d*+EN(IOzB6c8Y;H&Z=31^HMzcPlqDYwJo=DwJ@A{v^Eo98fP|n zs07t;4@HWIF+;5ItHCp=s&R@5`Z$b)iqh|%4HVyEQM}b#JeIKKwPfU#Y)yAIl&l1I z{|PW+>cXI6GM(}~x<6bhU59kpWti&yi|q+U=PFSKFXtS~S+b*uH*&Obrl1YOlof6z zaAc92f#R0m$w!GTPw#C8JzCsl>;Z#vV_YZ$#*u%KMk*h!ViS|yC$O@z4tp+QDs=2a zcRBx%eXx$cQ?3wEtG!4ca~)ECAd`9)7{ghdqTbUzgE}WOg2f`F7k-I}F-c19uk(xA zUpI=0+KezDH}W}^@c^|!nb@zXH!7Pt&Y{}qERG_SRK}9R){5g}uhCK5_8LD48^}BzJXY`7 zGo7s}u{xcxfw<<_7HmD9QAddB{cC8*=Y3H6S#Q{J>-W?JwH=gOBR!MC(;Qgbr5;mfSDDFSkFF}r+BWr{8b2Zx znG-n|CA+w=xj4f`pIeI^^>@1B!T2#jK3?4#NqZ9A>j#eu%?^L#76i_( z)LsLpDjbfk)FdSrDjWiX{cby4AN0HLeMBE0JcC0Q>VTWF&HqM;o~KG8@o$zxU;aq` zg00s)GMc9MM;rdJ?GdlQvg>wNyPG1O)ff@l?y7YN8?nmx5i(nB~Pxl z0b5UGslQ^0F>XQl@{xE52%_yiqks}junBPlje5F=Z>vuILMaSyf-{a37^*OkWJ*r_SCe+%-%_gs9`QG? zaSaCB6@82UZB@kIcVBE;`H}ghH%*b)qk=O~RNS1)0z;9Ycz|I>q0eJ<&^|N?dC;7T zS<~cB?UTFRjzE*TN&nFDqY?Yrr+C0Do?4}nI1 z&_On@CM%f%%RzN_3gu^xdZsoUuuoamTskxl)y>pte=U7vAvNJse24oVm0|QtH2<=2 z4Sr#BBQM@G{GM?8d{I>ypBPr+?C^Wp z@BP<_?aKA*#7lRnYj>^o4u7A@@+POG_5jdi-xj-eDYc(!T{aQ@@r|0Dy7z8ZzB+_# zF;0i+U!)0So8Khs{Vn#KCAi@2L;^=u{j~}8(cm6Zz*YI@MjbNiW@xRrIqrF)@n#4PKTT7vUY`J6SZ<$i@6qDLLY}L(5 z04zuNgu~1P@6?2YK};uBb~F=-gVS$57UMmv#Y(`-=PHw6OV<>yDzHnHhdd9ODCepd zLQ4uyv?AwDY^SBt7Bth(ZZuvzv9?#ev*6vm;K$(?05tjNigXf)IKBVr>fK}_$=J#M1L#yXUin| zckI(gU31@f;R5QDZvjwmhnQQ%M=XE*{cvEGHB>4@+g70T6Kuf7K;wL@#(>j>#BR%f zYQ#<{gwP=LGkxvFlCqL?R=4KW2dti6qqykny|PeB=lzZU;7uB#9-ChLYkqF`&fibV z2@v(xlE>X;XB|;`XQ*|c?^LDGVE0D3xkgIM%%AnD(ghgou+$jZXsnvS@LYZOny9I? z%3l!Hj*!c-4W0{qgBf=pmy#dd0oRemybHy#(- zg~t?Ud>I9$GCl37v$@Zw0foaigrGTTA$dW%-n&a%hMR`mVZz2R+(|EBRkyA#>U)~Y zm&ZNZ-x$&XW^L@+9u+yFVhoi$%(oH@l@@DH&1N2UU?Lune7 z2{g)uXB!Zf8`E~j+mEzJJ`k+f@4RjLiK}5`Vc2euPn?%z!t_{B*~ZsOO2B|)xTc__ z=CDG~1rnWcxp0}W&RZDKH$}o3F!ABZBjKNre_B8Ex-0))wIBZL<=Q-KSNG-#jQF4E zG5|vAek^V~-7>%p6{VYv7JnC#vI)=!_sPy~`exU<8Skc*n-wlM{iv@mVTxYCZ4-Dm zvK4|W?mL<{#L5uzo+F7aP;F~2zz!#7O6(Kz=axEt$(UtGG;#7By&9*2OLAnBM=cP~ z4vtrcK7a;4qts$;Dzff17YVi#T6et=d$ZoMk~*rJpUMcXR&KU?T=*h1mDS{~qg1>$ zB#=LdKj2dcoj`0oa}h6!8=My7mXTZ5UH4Vl9UeC-!4Oo{RoJ7xeo#-+;tmLHFKD{F z?U2jKduZ4zcPshUOSEu?(ZX>^w>aS6P#O9kGYe#L3$Tac8lP~I+}^egU_k_HyD#wJ zk8Xdx!~ME#CayuDpJs3UJ)bR`J~>XGIAdTa3WU$iqvdfU0* zGF8z+s|>izHqs~G#~Wj#5_ZhMf9r-oS0?Y2u1(y+F{XJlQPPZyZIzW`R+ThV>g@L# zZ#UUy5mWK~&~kc<}EG9yNWoh$AW%qEwFjWOUD>^S8l<{wwy_O zJaTAjxlTgtr}3dDnpKpYustU+qg_^j7KB$62Se2D!+bbTf_6Obb9Y%IfTkBJZ zq8xM0ntcTAF$_<&ZY4uE9^XXkTYV6q5oWx0Zwkf`p;s1<50mO zcx*cVuJmW&O}b37MNZBlo4+B}R*?L@mVQ>1w8s2>8e=ba+Yy4c25W@B(y`gklH3`H z>JM?QcV(C=Z(6lA$PRabXW@z)K^7Es$;Mp$RtFfk)^zqvRZwKUQHk6Zpv4j^nXNCGGOV;9SWT2(oEL_7H1W=^LOwd;qT8muFCChvkvur_tu`Re8=ad587hMyyDE5(BJ_&x zeAVH!XfwzRp0h4_Q40uu%V(U0z2# XzK;06TV#9yq52D8M2$Im?Lzo}BuEj) diff --git a/Source/Apps/OSLdr.asm b/Source/Apps/OSLdr.asm index af094cc0..bb2cf5d1 100644 --- a/Source/Apps/OSLdr.asm +++ b/Source/Apps/OSLdr.asm @@ -227,7 +227,7 @@ init: jr nz,init1 ; if not, not UNA ld hl,unamod ; point to UNA mode flag ld (hl),$ff ; set UNA mode - ld a,7 ; UNA platform ID + ld a,6 ; UNA platform ID ld (bioplt),a ; save it ld de,msgub ; point to UBIOS string diff --git a/Source/BIOS/memmgr.asm b/Source/BIOS/memmgr.asm deleted file mode 100644 index b50a16ba..00000000 --- a/Source/BIOS/memmgr.asm +++ /dev/null @@ -1,89 +0,0 @@ -;================================================================================================== -; MEMORY BANK MANAGEMENT -;================================================================================================== -; -; SELECT THE REQUESTED 32K BANK OF RAM/ROM INTO THE LOWER 32K OF CPU ADDRESS SPACE. -; LOAD DESIRED BANK INDEX INTO A AND CALL BNKSEL. -;______________________________________________________________________________________________________________________ -; - -#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA)) -BNKSEL: - OUT (MPCL_ROM),A - OUT (MPCL_RAM),A - RET - -#ENDIF - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; ZETA SBC V2 USES 16K PAGES. ANY PAGE CAN BE MAPPED TO ONE OF FOUR BANKS: -; BANK_0: 0K - 16K; BANK_1: 16K - 32K; BANK_2: 32K - 48K; BANK_3: 48K - 64K -; THIS BNKSEL EMULATES N8VEM / ZETA BEHAVIOR BY SETTING BANK_0 and BANK_1 TO -; TWO CONSECUTIVE PAGES - -#IF (PLATFORM == PLT_ZETA2) -BNKSEL: - BIT 7,A - JR Z,BNKSEL_ROM ; JUMP IF IT IS A ROM PAGE - RES 7,A ; RAM PAGE REQUESTED: CLEAR ROM BIT - ADD A,16 ; ADD 16 x 32K - RAM STARTS FROM 512K -; -BNKSEL_ROM: - RLCA ; TIMES 2 - GET 16K PAGE INSTEAD OF 32K - OUT (MPGSEL_0),A ; BANK_0: 0K - 16K - INC A - OUT (MPGSEL_1),A ; BANK_1: 16K - 32K - RET -#ENDIF - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; - -#IF (PLATFORM == PLT_N8) -BNKSEL: - BIT 7,A - JR Z,BNKSEL_ROM -; -BNKSEL_RAM: - RES 7,A - RLCA - RLCA - RLCA - OUT0 (CPU_BBR),A - LD A,DEFACR | 80H - OUT0 (ACR),A - RET -; -BNKSEL_ROM: - OUT0 (RMAP),A - XOR A - OUT0 (CPU_BBR),A - LD A,DEFACR - OUT0 (ACR),A - RET -; -#ENDIF - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; - -#IF (PLATFORM == PLT_MK4) -BNKSEL: - RLCA - RLCA - RLCA - OUT0 (CPU_BBR),A - RET -#ENDIF - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; -; NOTE: S2I HAS NO BANKED MEMORY! -; ALL FUNCTIONALITY IS NULLED OUT HERE. -; -#IF (PLATFORM == PLT_S2I) -BNKSEL: - RET -#ENDIF - -;;;;;;;;;;;;;;;;;;;; -; EOF - MEMMGR.ASM ; -;;;;;;;;;;;;;;;;;;;; diff --git a/Source/BIOS/mk4.inc b/Source/BIOS/mk4.inc deleted file mode 100644 index aa5521bb..00000000 --- a/Source/BIOS/mk4.inc +++ /dev/null @@ -1,125 +0,0 @@ -; -; MARK IV HARDWARE DEFINITIONS -; -#IF (Z180_CLKDIV == 0) -CPUKHZ .EQU CPUOSC / 2 ; OSCILLATOR FREQ / 2 -#ENDIF -#IF (Z180_CLKDIV == 1) -CPUKHZ .EQU CPUOSC ; OSCILLATOR FREQ -#ENDIF -#IF (Z180_CLKDIV == 2) -CPUKHZ .EQU CPUOSC * 2 ; OSCILLATOR FREQ * 2 -#ENDIF -; -CPUMHZ .EQU CPUKHZ / 1000 ; CPU FREQ IN KHZ -; -CPU_BASE .EQU $40 ; ONLY RELEVANT FOR Z180 -; -RAMBIAS .EQU 512 ; RAM STARTS AT 512K -; -MK4_BASE .EQU $80 -; -MK4_IDE .EQU MK4_BASE + $00 ; IDE REGISTERS ($00-$07, $0E-$0F) -MK4_XAR .EQU MK4_BASE + $08 ; EXTERNAL ADDRESS REGISTER (XAR) -MK4_SD .EQU MK4_BASE + $09 ; SD CARD CONTROL REGISTER -MK4_RTC .EQU MK4_BASE + $0A ; RTC INTERFACE REGISTER -; -RTC .EQU MK4_RTC ; GENERIC ALIAS FOR RTC PORT -; -; DUMMY VALUES BELOW TO ALLOW DBGMON TO BUILD... -; NEED TO REMOVE AND CLEAN THIS UP LATER. -; -PPIBASE .EQU $00 -PPIA .EQU PPIBASE + 0 ; PORT A -PPIB .EQU PPIBASE + 1 ; PORT B -PPIC .EQU PPIBASE + 2 ; PORT C -PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT -; -; MEMORY BANK CONFIGURATION -; -BID_ROM0 .EQU $00 -BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1)) -BID_RAM0 .EQU $10 -BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1)) - -BID_BOOT .EQU BID_ROM0 ; BOOT BANK -BID_BIOSIMG .EQU BID_ROM0 + 1 ; BIOS IMAGE BANK -BID_OSIMG .EQU BID_ROM0 + 2 ; ROM LOADER AND IMAGES BANK -BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK -BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK -BID_ROMDN .EQU BID_ROMN ; LAST ROM DRIVE BANK - -BID_RAMD0 .EQU BID_RAM0 ; FIRST RAM DRIVE BANK -BID_RAMDN .EQU BID_RAMN - 4 ; LAST RAM DRIVE BANK -BID_AUX .EQU BID_RAMN - 3 ; AUX BANK (BPBIOS, ETC.) -BID_BIOS .EQU BID_RAMN - 2 ; BIOS BANK -BID_USR .EQU BID_RAMN - 1 ; USER BANK (CP/M TPA, ETC.) -BID_COM .EQU BID_RAMN ; COMMON BANK, UPPER 32K - -; -; Z180 REGISTERS -; -CPU_CNTLA0 .EQU CPU_BASE + $00 ; ASCI0 CONTROL A -CPU_CNTLA1 .EQU CPU_BASE + $01 ; ASCI1 CONTROL A -CPU_CNTLB0 .EQU CPU_BASE + $02 ; ASCI0 CONTROL B -CPU_CNTLB1 .EQU CPU_BASE + $03 ; ASCI1 CONTROL B -CPU_STAT0 .EQU CPU_BASE + $04 ; ASCI0 STATUS -CPU_STAT1 .EQU CPU_BASE + $05 ; ASCI1 STATUS -CPU_TDR0 .EQU CPU_BASE + $06 ; ASCI0 TRANSMIT -CPU_TDR1 .EQU CPU_BASE + $07 ; ASCI1 TRANSMIT -CPU_RDR0 .EQU CPU_BASE + $08 ; ASCI0 RECEIVE -CPU_RDR1 .EQU CPU_BASE + $09 ; ASCI1 RECEIVE -CPU_CNTR .EQU CPU_BASE + $0A ; CSI/O CONTROL -CPU_TRDR .EQU CPU_BASE + $0B ; CSI/O TRANSMIT/RECEIVE -CPU_TMDR0L .EQU CPU_BASE + $0C ; TIMER 0 DATA LO -CPU_TMDR0H .EQU CPU_BASE + $0D ; TIMER 0 DATA HI -CPU_RLDR0L .EQU CPU_BASE + $0E ; TIMER 0 RELOAD LO -CPU_RLDR0H .EQU CPU_BASE + $0F ; TIMER 0 RELOAD HI -CPU_TCR .EQU CPU_BASE + $10 ; TIMER CONTROL -; -CPU_ASEXT0 .EQU CPU_BASE + $12 ; ASCI0 EXTENSION CONTROL (Z8S180) -CPU_ASEXT1 .EQU CPU_BASE + $13 ; ASCI1 EXTENSION CONTROL (Z8S180) -; -CPU_TMDR1L .EQU CPU_BASE + $14 ; TIMER 1 DATA LO -CPU_TMDR1H .EQU CPU_BASE + $15 ; TIMER 1 DATA HI -CPU_RLDR1L .EQU CPU_BASE + $16 ; TIMER 1 RELOAD LO -CPU_RLDR1H .EQU CPU_BASE + $17 ; TIMER 1 RELOAD HI -CPU_FRC .EQU CPU_BASE + $18 ; FREE RUNNING COUNTER - -CPU_ASTC0L .EQU CPU_BASE + $1A ; ASCI0 TIME CONSTANT LO (Z8S180) -CPU_ASTC0H .EQU CPU_BASE + $1B ; ASCI0 TIME CONSTANT HI (Z8S180) -CPU_ASTC1L .EQU CPU_BASE + $1C ; ASCI1 TIME CONSTANT LO (Z8S180) -CPU_ASTC1H .EQU CPU_BASE + $1D ; ASCI1 TIME CONSTANT HI (Z8S180) -CPU_CMR .EQU CPU_BASE + $1E ; CLOCK MULTIPLIER (LATEST Z8S180) -CPU_CCR .EQU CPU_BASE + $1F ; CPU CONTROL (Z8S180) -; -CPU_SAR0L .EQU CPU_BASE + $20 ; DMA0 SOURCE ADDR LO -CPU_SAR0H .EQU CPU_BASE + $21 ; DMA0 SOURCE ADDR HI -CPU_SAR0B .EQU CPU_BASE + $22 ; DMA0 SOURCE ADDR BANK -CPU_DAR0L .EQU CPU_BASE + $23 ; DMA0 DEST ADDR LO -CPU_DAR0H .EQU CPU_BASE + $24 ; DMA0 DEST ADDR HI -CPU_DAR0B .EQU CPU_BASE + $25 ; DMA0 DEST ADDR BANK -CPU_BCR0L .EQU CPU_BASE + $26 ; DMA0 BYTE COUNT LO -CPU_BCR0H .EQU CPU_BASE + $27 ; DMA0 BYTE COUNT HI -CPU_MAR1L .EQU CPU_BASE + $28 ; DMA1 MEMORY ADDR LO -CPU_MAR1H .EQU CPU_BASE + $29 ; DMA1 MEMORY ADDR HI -CPU_MAR1B .EQU CPU_BASE + $2A ; DMA1 MEMORY ADDR BANK -CPU_IAR1L .EQU CPU_BASE + $2B ; DMA1 I/O ADDR LO -CPU_IAR1H .EQU CPU_BASE + $2C ; DMA1 I/O ADDR HI -CPU_IAR1B .EQU CPU_BASE + $2D ; DMA1 I/O ADDR BANK (Z8S180) -CPU_BCR1L .EQU CPU_BASE + $2E ; DMA1 BYTE COUNT LO -CPU_BCR1H .EQU CPU_BASE + $2F ; DMA1 BYTE COUNT HI -CPU_DSTAT .EQU CPU_BASE + $30 ; DMA STATUS -CPU_DMODE .EQU CPU_BASE + $31 ; DMA MODE -CPU_DCNTL .EQU CPU_BASE + $32 ; DMA/WAIT CONTROL -CPU_IL .EQU CPU_BASE + $33 ; INTERRUPT VECTOR LOAD -CPU_ITC .EQU CPU_BASE + $34 ; INT/TRAP CONTROL -; -CPU_RCR .EQU CPU_BASE + $36 ; REFRESH CONTROL -; -CPU_CBR .EQU CPU_BASE + $38 ; MMU COMMON BASE REGISTER -CPU_BBR .EQU CPU_BASE + $39 ; MMU BANK BASE REGISTER -CPU_CBAR .EQU CPU_BASE + $3A ; MMU COMMON/BANK AREA REGISTER -; -CPU_OMCR .EQU CPU_BASE + $3E ; OPERATION MODE CONTROL -CPU_ICR .EQU $3F ; I/O CONTROL REGISTER (NOT RELOCATED!!!) diff --git a/Source/BIOS/n8.inc b/Source/BIOS/n8.inc deleted file mode 100644 index 8477fcb1..00000000 --- a/Source/BIOS/n8.inc +++ /dev/null @@ -1,131 +0,0 @@ -; -; N8 HARDWARE DEFINITIONS -; -#IF (Z180_CLKDIV == 0) -CPUKHZ .EQU CPUOSC / 2 ; OSCILLATOR FREQ / 2 -#ENDIF -#IF (Z180_CLKDIV == 1) -CPUKHZ .EQU CPUOSC ; OSCILLATOR FREQ -#ENDIF -#IF (Z180_CLKDIV == 2) -CPUKHZ .EQU CPUOSC * 2 ; OSCILLATOR FREQ * 2 -#ENDIF -; -CPUMHZ .EQU CPUKHZ / 1000 ; CPU FREQ IN KHZ -; -CPU_BASE .EQU $40 ; ONLY RELEVANT FOR Z180 -; -RAMBIAS .EQU 0 ; RAM STARTS AT 0K -; -N8_BASE .EQU $80 ; CPU INTERNAL I/O REGISTER BASE (AFTER RELOCATION) -; -PPIBASE .EQU N8_BASE + $00 -PPIA .EQU PPIBASE + 0 ; PORT A -PPIB .EQU PPIBASE + 1 ; PORT B -PPIC .EQU PPIBASE + 2 ; PORT C -PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT -; -PPI2BASE .EQU N8_BASE + $04 -PPI2A .EQU PPI2BASE + 0 ; PORT A -PPI2B .EQU PPI2BASE + 1 ; PORT B -PPI2C .EQU PPI2BASE + 2 ; PORT C -PPI2X .EQU PPI2BASE + 3 ; PPI CONTROL PORT -; -RTC: .EQU N8_BASE + $08 ; RTC LATCH AND BUFFER -;FDC: .EQU N8_BASE + $0C ; FLOPPY DISK CONTROLLER -;UTIL: .EQU N8_BASE + $10 ; FLOPPY DISK UTILITY -ACR: .EQU N8_BASE + $14 ; AUXILLARY CONTROL REGISTER -RMAP: .EQU N8_BASE + $16 ; ROM PAGE REGISTER -VDP: .EQU N8_BASE + $18 ; VIDEO DISPLAY PROCESSOR (TMS9918A) -PSG: .EQU N8_BASE + $1C ; PROGRAMMABLE SOUND GENERATOR (AY-3-8910) -; -DEFACR .EQU $1B -; -; MEMORY BANK CONFIGURATION -; -BID_ROM0 .EQU $00 -BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1)) -BID_RAM0 .EQU $80 -BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1)) - -BID_BOOT .EQU BID_ROM0 ; BOOT BANK -BID_BIOSIMG .EQU BID_ROM0 + 1 ; BIOS IMAGE BANK -BID_OSIMG .EQU BID_ROM0 + 2 ; ROM LOADER AND IMAGES BANK -BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK -BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK -BID_ROMDN .EQU BID_ROMN ; LAST ROM DRIVE BANK - -BID_RAMD0 .EQU BID_RAM0 ; FIRST RAM DRIVE BANK -BID_RAMDN .EQU BID_RAMN - 4 ; LAST RAM DRIVE BANK -BID_AUX .EQU BID_RAMN - 3 ; AUX BANK (BPBIOS, ETC.) -BID_BIOS .EQU BID_RAMN - 2 ; BIOS BANK -BID_USR .EQU BID_RAMN - 1 ; USER BANK (CP/M TPA, ETC.) -BID_COM .EQU BID_RAMN ; COMMON BANK, UPPER 32K - -; -; Z180 REGISTERS -; -CPU_CNTLA0 .EQU CPU_BASE + $00 ; ASCI0 CONTROL A -CPU_CNTLA1 .EQU CPU_BASE + $01 ; ASCI1 CONTROL A -CPU_CNTLB0 .EQU CPU_BASE + $02 ; ASCI0 CONTROL B -CPU_CNTLB1 .EQU CPU_BASE + $03 ; ASCI1 CONTROL B -CPU_STAT0 .EQU CPU_BASE + $04 ; ASCI0 STATUS -CPU_STAT1 .EQU CPU_BASE + $05 ; ASCI1 STATUS -CPU_TDR0 .EQU CPU_BASE + $06 ; ASCI0 TRANSMIT -CPU_TDR1 .EQU CPU_BASE + $07 ; ASCI1 TRANSMIT -CPU_RDR0 .EQU CPU_BASE + $08 ; ASCI0 RECEIVE -CPU_RDR1 .EQU CPU_BASE + $09 ; ASCI1 RECEIVE -CPU_CNTR .EQU CPU_BASE + $0A ; CSI/O CONTROL -CPU_TRDR .EQU CPU_BASE + $0B ; CSI/O TRANSMIT/RECEIVE -CPU_TMDR0L .EQU CPU_BASE + $0C ; TIMER 0 DATA LO -CPU_TMDR0H .EQU CPU_BASE + $0D ; TIMER 0 DATA HI -CPU_RLDR0L .EQU CPU_BASE + $0E ; TIMER 0 RELOAD LO -CPU_RLDR0H .EQU CPU_BASE + $0F ; TIMER 0 RELOAD HI -CPU_TCR .EQU CPU_BASE + $10 ; TIMER CONTROL -; -CPU_ASEXT0 .EQU CPU_BASE + $12 ; ASCI0 EXTENSION CONTROL (Z8S180) -CPU_ASEXT1 .EQU CPU_BASE + $13 ; ASCI1 EXTENSION CONTROL (Z8S180) -; -CPU_TMDR1L .EQU CPU_BASE + $14 ; TIMER 1 DATA LO -CPU_TMDR1H .EQU CPU_BASE + $15 ; TIMER 1 DATA HI -CPU_RLDR1L .EQU CPU_BASE + $16 ; TIMER 1 RELOAD LO -CPU_RLDR1H .EQU CPU_BASE + $17 ; TIMER 1 RELOAD HI -CPU_FRC .EQU CPU_BASE + $18 ; FREE RUNNING COUNTER - -CPU_ASTC0L .EQU CPU_BASE + $1A ; ASCI0 TIME CONSTANT LO (Z8S180) -CPU_ASTC0H .EQU CPU_BASE + $1B ; ASCI0 TIME CONSTANT HI (Z8S180) -CPU_ASTC1L .EQU CPU_BASE + $1C ; ASCI1 TIME CONSTANT LO (Z8S180) -CPU_ASTC1H .EQU CPU_BASE + $1D ; ASCI1 TIME CONSTANT HI (Z8S180) -CPU_CMR .EQU CPU_BASE + $1E ; CLOCK MULTIPLIER (LATEST Z8S180) -CPU_CCR .EQU CPU_BASE + $1F ; CPU CONTROL (Z8S180) -; -CPU_SAR0L .EQU CPU_BASE + $20 ; DMA0 SOURCE ADDR LO -CPU_SAR0H .EQU CPU_BASE + $21 ; DMA0 SOURCE ADDR HI -CPU_SAR0B .EQU CPU_BASE + $22 ; DMA0 SOURCE ADDR BANK -CPU_DAR0L .EQU CPU_BASE + $23 ; DMA0 DEST ADDR LO -CPU_DAR0H .EQU CPU_BASE + $24 ; DMA0 DEST ADDR HI -CPU_DAR0B .EQU CPU_BASE + $25 ; DMA0 DEST ADDR BANK -CPU_BCR0L .EQU CPU_BASE + $26 ; DMA0 BYTE COUNT LO -CPU_BCR0H .EQU CPU_BASE + $27 ; DMA0 BYTE COUNT HI -CPU_MAR1L .EQU CPU_BASE + $28 ; DMA1 MEMORY ADDR LO -CPU_MAR1H .EQU CPU_BASE + $29 ; DMA1 MEMORY ADDR HI -CPU_MAR1B .EQU CPU_BASE + $2A ; DMA1 MEMORY ADDR BANK -CPU_IAR1L .EQU CPU_BASE + $2B ; DMA1 I/O ADDR LO -CPU_IAR1H .EQU CPU_BASE + $2C ; DMA1 I/O ADDR HI -CPU_IAR1B .EQU CPU_BASE + $2D ; DMA1 I/O ADDR BANK (Z8S180) -CPU_BCR1L .EQU CPU_BASE + $2E ; DMA1 BYTE COUNT LO -CPU_BCR1H .EQU CPU_BASE + $2F ; DMA1 BYTE COUNT HI -CPU_DSTAT .EQU CPU_BASE + $30 ; DMA STATUS -CPU_DMODE .EQU CPU_BASE + $31 ; DMA MODE -CPU_DCNTL .EQU CPU_BASE + $32 ; DMA/WAIT CONTROL -CPU_IL .EQU CPU_BASE + $33 ; INTERRUPT VECTOR LOAD -CPU_ITC .EQU CPU_BASE + $34 ; INT/TRAP CONTROL -; -CPU_RCR .EQU CPU_BASE + $36 ; REFRESH CONTROL -; -CPU_CBR .EQU CPU_BASE + $38 ; MMU COMMON BASE REGISTER -CPU_BBR .EQU CPU_BASE + $39 ; MMU BANK BASE REGISTER -CPU_CBAR .EQU CPU_BASE + $3A ; MMU COMMON/BANK AREA REGISTER -; -CPU_OMCR .EQU CPU_BASE + $3E ; OPERATION MODE CONTROL -CPU_ICR .EQU $3F ; I/O CONTROL REGISTER (NOT RELOCATED!!!) diff --git a/Source/BIOS/n8vem.inc b/Source/BIOS/n8vem.inc deleted file mode 100644 index 025c63ee..00000000 --- a/Source/BIOS/n8vem.inc +++ /dev/null @@ -1,65 +0,0 @@ -; -; N8VEM HARDWARE IO PORT ADDRESSES AND MEMORY LOCATIONS -; -CPUKHZ .EQU CPUOSC ; FOR SBC 1/2, CPUFREQ == OSCILLATOR FREQ -CPUMHZ .EQU CPUKHZ / 1000 ; CPU FREQ IN KHZ -; -#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA)) -MPCL_RAM .EQU $78 ; BASE IO ADDRESS OF RAM MEMORY PAGER CONFIGURATION LATCH (WRITE ONLY) -MPCL_ROM .EQU $7C ; BASE IO ADDRESS OF ROM MEMORY PAGER CONFIGURATION LATCH (WRITE ONLY) -#ENDIF -; -#IF (PLATFORM == PLT_ZETA2) -MPGSEL_0 .EQU $78 ; BANK_0 PAGE SELECT REGISTER (WRITE ONLY) -MPGSEL_1 .EQU $79 ; BANK_1 PAGE SELECT REGISTER (WRITE ONLY) -MPGSEL_2 .EQU $7A ; BANK_2 PAGE SELECT REGISTER (WRITE ONLY) -MPGSEL_3 .EQU $7B ; BANK_3 PAGE SELECT REGISTER (WRITE ONLY) -MPGENA .EQU $7C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY) -#ENDIF -; -RTC .EQU $70 ; ADDRESS OF RTC LATCH AND INPUT PORT -; -; PPI 82C55 I/O IS DECODED TO PORT 60-67 -; -PPIBASE .EQU $60 -PPIA .EQU PPIBASE + 0 ; PORT A -PPIB .EQU PPIBASE + 1 ; PORT B -PPIC .EQU PPIBASE + 2 ; PORT C -PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT -; -; 16C550 SERIAL LINE UART -; -SIO_BASE .EQU $68 -SIO_RBR .EQU SIO_BASE + 0 ; DLAB=0: RCVR BUFFER REG (READ ONLY) -SIO_THR .EQU SIO_BASE + 0 ; DLAB=0: XMIT HOLDING REG (WRITE ONLY) -SIO_IER .EQU SIO_BASE + 1 ; DLAB=0: INT ENABLE REG -SIO_IIR .EQU SIO_BASE + 2 ; INT IDENT REGISTER (READ ONLY) -SIO_FCR .EQU SIO_BASE + 2 ; FIFO CONTROL REG (WRITE ONLY) -SIO_LCR .EQU SIO_BASE + 3 ; LINE CONTROL REG -SIO_MCR .EQU SIO_BASE + 4 ; MODEM CONTROL REG -SIO_LSR .EQU SIO_BASE + 5 ; LINE STATUS REG -SIO_MSR .EQU SIO_BASE + 6 ; MODEM STATUS REG -SIO_SCR .EQU SIO_BASE + 7 ; SCRATCH REGISTER -SIO_DLL .EQU SIO_BASE + 0 ; DLAB=1: DIVISOR LATCH (LS) -SIO_DLM .EQU SIO_BASE + 1 ; DLAB=1: DIVISOR LATCH (MS) -; -; MEMORY BANK CONFIGURATION -; -BID_ROM0 .EQU $00 -BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1)) -BID_RAM0 .EQU $80 -BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1)) - -BID_BOOT .EQU BID_ROM0 ; BOOT BANK -BID_BIOSIMG .EQU BID_ROM0 + 1 ; BIOS IMAGE BANK -BID_OSIMG .EQU BID_ROM0 + 2 ; ROM LOADER AND IMAGES BANK -BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK -BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK -BID_ROMDN .EQU BID_ROMN ; LAST ROM DRIVE BANK - -BID_RAMD0 .EQU BID_RAM0 ; FIRST RAM DRIVE BANK -BID_RAMDN .EQU BID_RAMN - 4 ; LAST RAM DRIVE BANK -BID_AUX .EQU BID_RAMN - 3 ; AUX BANK (BPBIOS, ETC.) -BID_BIOS .EQU BID_RAMN - 2 ; BIOS BANK -BID_USR .EQU BID_RAMN - 1 ; USER BANK (CP/M TPA, ETC.) -BID_COM .EQU BID_RAMN ; COMMON BANK, UPPER 32K diff --git a/Source/BIOS/std-n8vem.inc b/Source/BIOS/std-n8vem.inc deleted file mode 100644 index 3c3aad30..00000000 --- a/Source/BIOS/std-n8vem.inc +++ /dev/null @@ -1,36 +0,0 @@ -; -; CHARACTER DEVICES -; -CIODEV_UART .EQU $00 -CIODEV_ASCI .EQU $10 -CIODEV_VDU .EQU $20 -CIODEV_CVDU .EQU $30 -CIODEV_UPD7220 .EQU $40 -CIODEV_N8V .EQU $50 -CIODEV_PRPCON .EQU $60 -CIODEV_PPPCON .EQU $70 -CIODEV_CONSOLE .EQU $C0 -CIODEV_CRT .EQU $D0 -CIODEV_BAT .EQU $E0 -CIODEV_NUL .EQU $F0 -; -; DISK DEVICES (ONLY FIRST NIBBLE RELEVANT, SECOND NIBBLE RESERVED FOR UNIT) -; -DIODEV_MD .EQU $00 -DIODEV_FD .EQU $10 -DIODEV_RF .EQU $20 -DIODEV_IDE .EQU $30 -DIODEV_ATAPI .EQU $40 -DIODEV_PPIDE .EQU $50 -DIODEV_SD .EQU $60 -DIODEV_PRPSD .EQU $70 -DIODEV_PPPSD .EQU $80 -DIODEV_HDSK .EQU $90 -; -; VDA DEVICES (VIDEO DISPLAY ADAPTER) -; -VDADEV_NONE .EQU $00 ; NO VDA DEVICE -VDADEV_VDU .EQU $10 ; ECB VDU - 6545 CHIP -VDADEV_CVDU .EQU $20 ; ECB COLOR VDU - 8563 CHIP (NOT IMP) -VDADEV_UPD7220 .EQU $30 ; ECB uP7220 (NOT IMPLEMENTED) -VDADEV_N8V .EQU $40 ; N8 ONBOARD VDA SUBSYSTEM diff --git a/Source/BIOS/std.asm b/Source/BIOS/std.asm deleted file mode 100644 index 3b90d20f..00000000 --- a/Source/BIOS/std.asm +++ /dev/null @@ -1,422 +0,0 @@ -; ~/RomWBW/branches/s100/Source/std.asm 1/19/2013 dwg - -; - -; The purpose of this file is to define generic symbols and to include -; the appropriate std-*.inc file to bring in platform specifics. - -; There are four classes of systems supported by N8VEM. -; 1. N8VEM Platforms that include ECB interface -; 2. ZETA Genrally N8VEM-like, but no ECB -; 3. N8 Generally N8VEM-like bt 180 and extra embedded devices -; 4. S100 Assumes Z80 Master CPU Card - -; All the classes require certain generic definitions, and these are -; defined here prior to the inclusion of platform specific .inc files. - -; It is unfortunate, but all the possible config items must be defined -; here because the config gets read before the specific std-*.inc's - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; -TRUE .EQU 1 -FALSE .EQU 0 -; -; PRIMARY HARDWARE PLATFORMS -; -PLT_N8VEM .EQU 1 ; N8VEM ECB Z80 SBC -PLT_ZETA .EQU 2 ; ZETA Z80 SBC -PLT_ZETA2 .EQU 3 ; ZETA Z80 V2 SBC -PLT_N8 .EQU 4 ; N8 (HOME COMPUTER) Z180 SBC -PLT_MK4 .EQU 5 -PLT_S2I .EQU 6 ; SCSI2IDE -PLT_S100 .EQU 7 ; S100COMPUTERS Z80 based system -PLT_UNA .EQU 8 ; UNA BIOS -; -; BOOT STYLE -; -BT_MENU .EQU 1 ; WAIT FOR MENU SELECTION AT LOADER PROMPT -BT_AUTO .EQU 2 ; AUTO SELECT BOOT_DEFAULT AFTER BOOT_TIMEOUT -; -; RAM DISK INITIALIZATION OPTIONS -; -CLR_NEVER .EQU 0 ; NEVER CLEAR RAM DISK -CLR_AUTO .EQU 1 ; CLEAR RAM DISK IF INVALID DIR ENTRIES -CLR_ALWAYS .EQU 2 ; ALWAYS CLEAR RAM DISK -; -; FLOPPY DISK MEDIA SELECTIONS (ID'S MUST BE INDEX OF ENTRY IN FCD_TBL) -; -FDM720 .EQU 0 ; 3.5" FLOPPY, 720KB, 2 SIDES, 80 TRKS, 9 SECTORS -FDM144 .EQU 1 ; 3.5" FLOPPY, 1.44MB, 2 SIDES, 80 TRKS, 18 SECTORS -FDM360 .EQU 2 ; 5.25" FLOPPY, 360KB, 2 SIDES, 40 TRKS, 9 SECTORS -FDM120 .EQU 3 ; 5.25" FLOPPY, 1.2MB, 2 SIDES, 80 TRKS, 15 SECTORS -FDM111 .EQU 4 ; 8" FLOPPY, 1.11MB, 2 SIDES, 74 TRKS, 15 SECTORS -; -; MEDIA ID VALUES -; -MID_NONE .EQU 0 -MID_MDROM .EQU 1 -MID_MDRAM .EQU 2 -MID_RF .EQU 3 -MID_HD .EQU 4 -MID_FD720 .EQU 5 -MID_FD144 .EQU 6 -MID_FD360 .EQU 7 -MID_FD120 .EQU 8 -MID_FD111 .EQU 9 -; -; FD MODE SELECTIONS -; -FDMODE_NONE .EQU 0 ; FD modes defined in std-*.inc -FDMODE_DIO .EQU 1 ; DISKIO V1 -FDMODE_ZETA .EQU 2 ; ZETA -FDMODE_ZETA2 .EQU 3 ; ZETA V2 -FDMODE_DIDE .EQU 4 ; DUAL IDE -FDMODE_N8 .EQU 5 ; N8 -FDMODE_DIO3 .EQU 6 ; DISKIO V3 -; -; IDE MODE SELECTIONS -; -IDEMODE_NONE .EQU 0 -IDEMODE_DIO .EQU 1 ; DISKIO V1 -IDEMODE_DIDE .EQU 2 ; DUAL IDE -IDEMODE_MK4 .EQU 3 ; MARK IV ONBOARD IDE (8 BIT) -; -; PPIDE MODE SELECTIONS -; -PPIDEMODE_NONE .EQU 0 -PPIDEMODE_STD .EQU 1 ; STANDARD N8VEM PARALLEL PORT -PPIDEMODE_DIO3 .EQU 2 ; DISKIO V3 PARALLEL PORT -PPIDEMODE_MFP .EQU 3 ; MULTIFUNCTION / PIC -; -; SD MODE SELECTIONS -; -SDMODE_NONE .EQU 0 -SDMODE_JUHA .EQU 1 ; JUHA MINI BOARD -SDMODE_N8 .EQU 2 ; N8-2511, UNMODIFIED -SDMODE_CSIO .EQU 3 ; N8-2312 OR N8-2511 MODIFIED -SDMODE_PPI .EQU 4 ; PPISD MINI BOARD -SDMODE_UART .EQU 5 ; S2ISD -SDMODE_DSD .EQU 6 ; DUAL SD -SDMODE_MK4 .EQU 7 ; MARK IV -; -; CONSOLE TERMINAL TYPE CHOICES -; -TERM_TTY .EQU 0 -TERM_ANSI .EQU 1 -TERM_WYSE .EQU 2 -TERM_VT52 .EQU 3 -; -; EMULATION TYPES -; -EMUTYP_NONE .EQU 0 -EMUTYP_TTY .EQU 1 -EMUTYP_ANSI .EQU 2 -; -; SCSI DEVICE PERSONALITY CHOICES -; -S2I_PER_N8VEM .EQU 1 -S2I_PER_ST125N .EQU 2 -; -; SYSTEM GENERATION SETTINGS -; -SYS_CPM .EQU 1 ; CPM (IMPLIES BDOS + CCP) -SYS_ZSYS .EQU 2 ; ZSYSTEM OS (IMPLIES ZSDOS + ZCPR) -; -DOS_BDOS .EQU 1 ; BDOS -DOS_ZDDOS .EQU 2 ; ZDDOS VARIANT OF ZSDOS -DOS_ZSDOS .EQU 3 ; ZSDOS -; -CP_CCP .EQU 1 ; CCP COMMAND PROCESSOR -CP_ZCPR .EQU 2 ; ZCPR COMMAND PROCESSOR -; -; CONFIGURE DOS (DOS) AND COMMAND PROCESSOR (CP) BASED ON SYSTEM SETTING (SYS) -; -#IFNDEF BLD_SYS -SYS .EQU SYS_CPM -#ELSE -SYS .EQU BLD_SYS -#ENDIF -; -#IF (SYS == SYS_CPM) -DOS .EQU DOS_BDOS -CP .EQU CP_CCP -#DEFINE OSLBL "CP/M-80 2.2" -#ENDIF -; -#IF (SYS == SYS_ZSYS) -DOS .EQU DOS_ZSDOS -CP .EQU CP_ZCPR -#DEFINE OSLBL "ZSDOS 1.1" -#ENDIF -; -; INCLUDE VERSION AND BUILD SETTINGS -; -#INCLUDE "ver.inc" ; ADD BIOSVER -; -#INCLUDE "build.inc" ; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE -; -; INCLUDE PLATFORM SPECIFIC HARDWARE DEFINITIONS -; -#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA) | (PLATFORM == PLT_ZETA2)) -#INCLUDE "n8vem.inc" -#ENDIF -; -#IF (PLATFORM == PLT_S2I) -#INCLUDE "s2i.inc" -#ENDIF -; -#IF (PLATFORM == PLT_N8) -#INCLUDE "n8.inc" -#ENDIF -; -#IF (PLATFORM == PLT_MK4) -#INCLUDE "mk4.inc" -#ENDIF -; -#IF (PLATFORM == PLT_UNA) -#INCLUDE "una.inc" -#ENDIF -; -#IF (PLATFORM == PLT_S100) -; -#DEFINE S100_IOB ; WBW: FORCED ON TO MAKE BUILD WORK! -; -#IFDEF S100_CPU -#INCLUDE "S100CPU.INC" -#ENDIF -; -#IFDEF S100_IOB -#INCLUDE "S100IOB.INC" -#ENDIF -; -#IFDEF S100_RRF -#INCLUDE "S100RRF.INC" -#ENDIF -; -#IFDEF S100_DIDE -#INCLUDE "S100DIDE.INC" -#ENDIF -; -#ENDIF -; -; CHARACTER DEVICE FUNCTIONS -; -CF_INIT .EQU 0 -CF_IN .EQU 1 -CF_IST .EQU 2 -CF_OUT .EQU 3 -CF_OST .EQU 4 -; -; DISK OPERATIONS -; -DOP_READ .EQU 0 ; READ OPERATION -DOP_WRITE .EQU 1 ; WRITE OPERATION -DOP_FORMAT .EQU 2 ; FORMAT OPERATION -DOP_READID .EQU 3 ; READ ID OPERATION -; -; DISK DRIVER FUNCTIONS -; -DF_READY .EQU 1 -DF_SELECT .EQU 2 -DF_READ .EQU 3 -DF_WRITE .EQU 4 -DF_FORMAT .EQU 5 -; -; BIOS FUNCTIONS -; -#IF (PLATFORM == PLT_UNA) -BF_CIO .EQU $10 -BF_CIOIN .EQU BF_CIO + 1 ; CHARACTER INPUT -BF_CIOOUT .EQU BF_CIO + 2 ; CHARACTER OUTPUT -BF_CIOIST .EQU BF_CIO + 3 ; CHARACTER INPUT STATUS -BF_CIOOST .EQU BF_CIO + 4 ; CHARACTER OUTPUT STATUS -; -BF_DIO .EQU $40 -BF_DIORD .EQU BF_DIO + 2 ; DISK READ -BF_DIOWR .EQU BF_DIO + 3 ; DISK WRITE -#ELSE -BF_CIO .EQU $00 -BF_CIOIN .EQU BF_CIO + 0 ; CHARACTER INPUT -BF_CIOOUT .EQU BF_CIO + 1 ; CHARACTER OUTPUT -BF_CIOIST .EQU BF_CIO + 2 ; CHARACTER INPUT STATUS -BF_CIOOST .EQU BF_CIO + 3 ; CHARACTER OUTPUT STATUS -BF_CIOCFG .EQU BF_CIO + 4 ; CHARACTER I/O CONFIG -BF_CIOGETCNT .EQU BF_CIO + 8 ; CHARACTER DEVICE COUNT -BF_CIOGETINF .EQU BF_CIO + 9 ; CHARACTER DEVICE INFO -; -BF_DIO .EQU $10 -BF_DIORD .EQU BF_DIO + 0 ; DISK READ -BF_DIOWR .EQU BF_DIO + 1 ; DISK WRITE -BF_DIOST .EQU BF_DIO + 2 ; DISK STATUS -BF_DIOMED .EQU BF_DIO + 3 ; DISK MEDIA -BF_DIOID .EQU BF_DIO + 4 ; DISK IDENTIFY -BF_DIOGETBUF .EQU BF_DIO + 8 ; DISK GET BUFFER ADR -BF_DIOSETBUF .EQU BF_DIO + 9 ; DISK SET BUFFER ADR -BF_DIODEVCNT .EQU BF_DIO + 10 ; DISK DEVICE COUNT -BF_DIODEVINF .EQU BF_DIO + 11 ; DISK DEVICE INFO -; -BF_RTC .EQU $20 -BF_RTCGETTIM .EQU BF_RTC + 0 ; GET TIME -BF_RTCSETTIM .EQU BF_RTC + 1 ; SET TIME -BF_RTCGETBYT .EQU BF_RTC + 2 ; GET NVRAM BYTE BY INDEX -BF_RTCSETBYT .EQU BF_RTC + 3 ; SET NVRAM BYTE BY INDEX -BF_RTCGETBLK .EQU BF_RTC + 4 ; GET NVRAM DATA BLOCK -BF_RTCSETBLK .EQU BF_RTC + 5 ; SET NVRAM DATA BLOCK -; -BF_EMU .EQU $30 -BF_EMUIN .EQU BF_EMU + 0 ; EMULATOR CHARACTER INPUT -BF_EMUOUT .EQU BF_EMU + 1 ; EMULATOR CHARACTER OUTPUT -BF_EMUIST .EQU BF_EMU + 2 ; EMULATOR CHARACTER INPUT STATUS -BF_EMUOST .EQU BF_EMU + 3 ; EMULATOR CHARACTER OUTPUT STATUS -BF_EMUCFG .EQU BF_EMU + 4 ; EMULATOR CHARACTER I/O CONFIG -BF_EMUINI .EQU BF_EMU + 8 ; INITIALIZE EMULATION -BF_EMUQRY .EQU BF_EMU + 9 ; QUERY EMULATION STATUS -; -BF_VDA .EQU $40 -BF_VDAINI .EQU BF_VDA + 0 ; INITIALIZE VDU -BF_VDAQRY .EQU BF_VDA + 1 ; QUERY VDU STATUS -BF_VDARES .EQU BF_VDA + 2 ; SOFT RESET VDU -BF_VDASCS .EQU BF_VDA + 3 ; SET CURSOR STYLE -BF_VDASCP .EQU BF_VDA + 4 ; SET CURSOR POSITION -BF_VDASAT .EQU BF_VDA + 5 ; SET CHARACTER ATTRIBUTE -BF_VDASCO .EQU BF_VDA + 6 ; SET CHARACTER COLOR -BF_VDAWRC .EQU BF_VDA + 7 ; WRITE CHARACTER -BF_VDAFIL .EQU BF_VDA + 8 ; FILL -BF_VDACPY .EQU BF_VDA + 9 ; COPY -BF_VDASCR .EQU BF_VDA + 10 ; SCROLL -BF_VDAKST .EQU BF_VDA + 11 ; GET KEYBOARD STATUS -BF_VDAKFL .EQU BF_VDA + 12 ; FLUSH KEYBOARD BUFFER -BF_VDAKRD .EQU BF_VDA + 13 ; READ KEYBOARD -; -BF_SYS .EQU $F0 -BF_SYSSETBNK .EQU BF_SYS + 0 ; SET CURRENT BANK -BF_SYSGETBNK .EQU BF_SYS + 1 ; GET CURRENT BANK -BF_SYSCPY .EQU BF_SYS + 2 ; COPY TO/FROM RAM/ROM MEMORY BANK -BF_SYSXCPY .EQU BF_SYS + 3 ; EXTENDED COPY SETUP -BF_SYSATTR .EQU BF_SYS + 4 ; GET/SET SYSTEM ATTRIBUTE VALUE -;BF_SYSXXXX .EQU BF_SYS + 5 ; -BF_SYSGETVER .EQU BF_SYS + 6 ; GET VERSION OF HBIOS -#ENDIF -; -; SYSTEM ATTRIBUTE IDS -; -AID_BOOTVOL .EQU 0 ; BOOT VOLUME, MSB=DEV/UNIT, LSB=LU -AID_BOOTROM .EQU 0 ; BANK ID OF ROM PAGE BOOTED -; -; MEMORY LAYOUT -; -SYS_SIZ .EQU $3000 ; COMBINED SIZE OF SYSTEM AREA (OS + HBIOS PROXY) -HBBUF_SIZ .EQU 1024 ; INVARIANT HBIOS PHYSICAL DISK BUFFER, 1K -HBX_SIZ .EQU $200 ; HBIOS PROXY SIZE (SUBJECT TO CHANGE) -CPM_SIZ .EQU SYS_SIZ - HBX_SIZ ; NET SIZE OF ALL OS COMPONENTS (EXCLUDING HBIOS PROXY) -CCP_SIZ .EQU $800 ; INVARIANT SIZE OF CCP -BDOS_SIZ .EQU $E00 ; INVARIANT SIZE OF BDOS -CBIOS_SIZ .EQU CPM_SIZ - CCP_SIZ - BDOS_SIZ ; CBIOS IS THE REMAINDER - -MEMTOP .EQU $10000 ; INVARIANT TOP OF Z80 ADDRESSABLE MEMORY -BNKTOP .EQU $8000 ; BANK MEMORY BARRIER - -HBX_IMG .EQU $200 ; LOC OF HBX IMAGE IN HBIOS IMAGE BANK - -HBBUF_END .EQU BNKTOP ; END OF PHYSICAL DISK BUFFER IN HBIOS -HBBUF_LOC .EQU HBBUF_END - HBBUF_SIZ ; START OF PHYSICAL DISK BUFFER -HBX_END .EQU MEMTOP ; END OF HBIOS PROXY -HBX_LOC .EQU HBX_END - HBX_SIZ ; START OF HBIOS PROXY -CPM_END .EQU HBX_LOC ; END OF CPM COMPONENTS (INCLUDING CBIOS) -CPM_LOC .EQU CPM_END - CPM_SIZ ; START OF CPM COMPONENTS -CBIOS_END .EQU HBX_LOC ; END OF CBIOS -CBIOS_LOC .EQU CBIOS_END - CBIOS_SIZ ; START OF CBIOS -BDOS_END .EQU CBIOS_LOC ; END OF BDOS -BDOS_LOC .EQU BDOS_END - BDOS_SIZ ; START OF BDOS -CCP_END .EQU BDOS_LOC ; END OF CCP -CCP_LOC .EQU CCP_END - CCP_SIZ ; START OF CCP - -CPM_ENT .EQU CBIOS_LOC ; CPM ENTRY POINT (IN CBIOS) -CCP_ENT .EQU CPM_LOC ; COMMAND PROCESSOR ENTRY POINT (IN CCP) - -MON_LOC .EQU $C000 ; LOCATION OF MONITOR FOR RUNNING SYSTEM -MON_SIZ .EQU $1000 ; SIZE OF MONITOR BINARY IMAGE -MON_END .EQU MON_LOC + MON_SIZ ; END OF MONITOR - -MON_DSKY .EQU MON_LOC + (0 * 3) ; MONITOR ENTRY (DSKY) -MON_SERIAL .EQU MON_LOC + (1 * 3) ; MONITOR ENTRY (SERIAL PORT) - -CBIOS_BOOT .EQU CBIOS_LOC + (0 * 3) -CBIOS_WBOOT .EQU CBIOS_LOC + (1 * 3) -CBIOS_CONST .EQU CBIOS_LOC + (2 * 3) -CBIOS_CONIN .EQU CBIOS_LOC + (3 * 3) -CBIOS_CONOUT .EQU CBIOS_LOC + (4 * 3) -CBIOS_LIST .EQU CBIOS_LOC + (5 * 3) -CBIOS_PUNCH .EQU CBIOS_LOC + (6 * 3) -CBIOS_READER .EQU CBIOS_LOC + (7 * 3) -CBIOS_HOME .EQU CBIOS_LOC + (8 * 3) -CBIOS_SELDSK .EQU CBIOS_LOC + (9 * 3) -CBIOS_SETTRK .EQU CBIOS_LOC + (10 * 3) -CBIOS_SETSEC .EQU CBIOS_LOC + (11 * 3) -CBIOS_SETDMA .EQU CBIOS_LOC + (12 * 3) -CBIOS_READ .EQU CBIOS_LOC + (13 * 3) -CBIOS_WRITE .EQU CBIOS_LOC + (14 * 3) -CBIOS_LISTST .EQU CBIOS_LOC + (15 * 3) -CBIOS_SECTRN .EQU CBIOS_LOC + (16 * 3) -; -CDISK: .EQU 4 ; LOC IN PAGE 0 OF CURRENT DISK NUMBER 0=A,...,15=P -IOBYTE: .EQU 3 ; LOC IN PAGE 0 OF I/O DEFINITION BYTE -; -; HBIOS PROXY COMMON DATA BLOCK -; EXACTLY 32 BYTES AT $FFE0-$FFFF -; -HBX_XFC .EQU $10000 - $20 ; HBIOS PROXY INTERFACE AREA, 32 BYTES FIXED -; -HBX_XFCDAT .EQU HBX_XFC ; DATA PORTION OF HBIOX PROXY INTERFACE AREA -HB_CURBNK .EQU HBX_XFCDAT + 0 ; CURRENTLY ACTIVE LOW MEMORY BANK ID -;HB_PRVBNK .EQU HBX_XFCDAT + 1 ; PREVIOUS BANK (DEPRECATED) -HB_SRCADR .EQU HBX_XFCDAT + 2 ; BNKCPY: DESTINATION BANK ID -HB_SRCBNK .EQU HBX_XFCDAT + 4 ; BNKCPY: SOURCE BANK ID -HB_DSTADR .EQU HBX_XFCDAT + 5 ; BNKCPY: DESTINATION ADDRESS -HB_DSTBNK .EQU HBX_XFCDAT + 7 ; BNKCPY: SOURCE ADDRESS -HB_CNT .EQU HBX_XFCDAT + 8 ; BNKCPY: COUNT -; -HBX_XFCFNS .EQU HBX_XFC + $10 ; JUMP TABLE PORTION OF HBIOS PROXY INTERFACE AREA -HB_INVOKE .EQU HBX_XFCFNS + (0 * 3) ; INVOKE HBIOS FUNCTION -HB_BNKSEL .EQU HBX_XFCFNS + (1 * 3) ; SELECT LOW MEMORY BANK ID -HB_BNKCPY .EQU HBX_XFCFNS + (2 * 3) ; INTERBANK MEMORY COPY -HB_BNKCALL .EQU HBX_XFCFNS + (3 * 3) ; INTERBANK FUNCTION CALL -;HB_LOC .EQU HBX_XFCFNS + 12 ; ADDRESS OF HBIOS PROXY START (DEPRECATED) -HB_IDENT .EQU HBX_XFCFNS + 14 ; POINTER TO HBIOS IDENT DATA BLOCK -; -; -; -#IF (PLATFORM == PLT_N8VEM) - #DEFINE PLATFORM_NAME "N8VEM Z80" -#ENDIF -#IF (PLATFORM == PLT_ZETA) - #DEFINE PLATFORM_NAME "ZETA Z80" -#ENDIF -#IF (PLATFORM == PLT_ZETA2) - #DEFINE PLATFORM_NAME "ZETA Z80 V2" -#ENDIF -#IF (PLATFORM == PLT_N8) - #DEFINE PLATFORM_NAME "N8 Z180" -#ENDIF -#IF (PLATFORM == PLT_MK4) - #DEFINE PLATFORM_NAME "MARK IV Z180" -#ENDIF -#IF (PLATFORM == PLT_S2I) - #DEFINE PLATFORM_NAME "SCSI2IDE Z80" -#ENDIF -#IF (PLATFORM == PLT_S100) - #DEFINE PLATFORM_NAME "S100" -#ENDIF -#IF (PLATFORM == PLT_UNA) - #DEFINE PLATFORM_NAME "UNA" -#ENDIF -; -; HELPER MACROS -; -#DEFINE PRTC(C) CALL PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X') -#DEFINE PRTS(S) CALL PRTSTRD \ .DB S ; PRINT STRING S TO CONSOLE - PRTD("HELLO") -#DEFINE PRTX(X) CALL PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO) -; -#DEFINE XIO_PRTC(C) CALL XIO_PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X') -#DEFINE XIO_PRTS(S) CALL XIO_PRTSTRD \ .DB S ; PRINT STRING S TO CONSOLE - PRTD("HELLO") -#DEFINE XIO_PRTX(X) CALL XIO_PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO) diff --git a/Source/BIOS/ver.inc b/Source/BIOS/ver.inc deleted file mode 100644 index 2e9018a2..00000000 --- a/Source/BIOS/ver.inc +++ /dev/null @@ -1,5 +0,0 @@ -#DEFINE RMJ 2 -#DEFINE RMN 7 -#DEFINE RUP 1 -#DEFINE RTP 0 -#DEFINE BIOSVER "2.7.1" diff --git a/Source/BPBIOS/@WBW Z3ENV.txt b/Source/BPBIOS/@WBW Z3ENV.txt index 01b074e4..ede61d20 100644 --- a/Source/BPBIOS/@WBW Z3ENV.txt +++ b/Source/BPBIOS/@WBW Z3ENV.txt @@ -109,9 +109,15 @@ Ext FCB FDD0 FDD0 F9D0 E9D0 FDD0 Ext Stack FFD0 FFD0 FBB0 EBB0 FFB0 -Type X: All segments shifted down by size of HBIOS Proxy (1K) +Type X: All segments shifted down by size of HBIOS Proxy (1024 bytes) Type T: Segments rearranged to allow space for HBIOS Proxy FC00-FFFF --> EA00-EBFF Environment, Cmd Line, Named Dirs, Ext Path, Shell Stack, Msg Buffer, Ext FCB, Ext Stack Type N: Frees up HBIOS interface area at FFE0-FFFF by shrinking Cmd Line and shifting Ext Stack down by 32 bytes + + +If built with INTPXY=NO, then LDSYS BP34T, BP34TBNK, or BP41T +If built with INTPXY=YES, then LDSYS BP33N, BP33NBNK, BP34N, BP34NBNK, or BP41N + + diff --git a/Source/BPBIOS/Build.cmd b/Source/BPBIOS/Build.cmd index 1984974f..746c33e9 100644 --- a/Source/BPBIOS/Build.cmd +++ b/Source/BPBIOS/Build.cmd @@ -12,15 +12,15 @@ rem rem Z33 + ZSDOS11 w/ Non-banked BPBIOS rem -copy def-z33.lib def-dx.lib -copy icfg-z33.z80 icfg-dx.z80 -zx ZMAC -BPBIO-DX -/P -echo ErrorLevel: %ERRORLEVEL% +copy def-ww-z33.lib def-ww.lib +zx ZMAC -BPBIO-WW -/P +if exist bp33.prn del bp33.prn +ren bpbio-ww.prn bp33.prn pause if exist bp33.rel del bp33.rel -ren bpbio-dx.rel bp33.rel +ren bpbio-ww.rel bp33.rel if exist bpsys.img del bpsys.img zx bpbuild -bp33.dat > INCLUDE DEF-DX.LIB ; << file for your configuration. >> - ; << ****** SYSTEM SPECIFIC ****** >> - ; << Insert DEF-xxxx.LIB definition >> - INCLUDE DEF-WW.LIB ; << file for your configuration. >> - CSEG ;..... ; Ascii Character Equates @@ -98,7 +94,7 @@ WRUAL EQU 2 ; DOS code for unallocated write LOCKF EQU LOW [NOT AUTOSL] ;Lock flag for format default ALONE EQU FALSE ; Boot code equate IF Z3 - MACLIB Z3BASE.LIB ; Include ENV definitions + MACLIB Z3BASE ; Include ENV definitions ENDIF PAGE ;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * @@ -240,7 +236,7 @@ MXFALC EQU 880 ; If High Density or 8" drives can be handled, COMMON /BANK2/ ENDIF DPB: ; Marker for DPB start - ;.XLIST ; Don't print these due to size + .XLIST ; Don't print these due to size IF AUTOSL INCLUDE DPB.LIB ; Default selection of common DD formats IF FLOPYH @@ -260,13 +256,13 @@ DPB: ; Marker for DPB start NRDPB EQU [$-DPB]/DPBSIZ ; Calc number of DPB's CSEG ; Hard & Ramdisk DPBs and DPHs go in Code Seg - ;.xlist + .xlist IF HARDDSK ; << ****** Hardware Specific ****** >> ; << Insert DPB Info for Hard Disk >> - INCLUDE DPBHD-WW.LIB ; << Drives as DPBHD-xx.LIB >> + INCLUDE DPBHD-DX.LIB ; << Drives as DPBHD-xx.LIB >> ENDIF - ;.list + .list IF RAMDSK ; << ****** Hardware Specific ****** >> ; << Insert DPB Info for RAM Disk >> @@ -274,11 +270,11 @@ NRDPB EQU [$-DPB]/DPBSIZ ; Calc number of DPB's ENDIF PAGE INCLUDE DPH.LIB ; Disk parameter headers - ;.xlist + .xlist IF HARDDSK INCLUDE DPHHD.LIB ; Insert DPH Info for Hard Disk Partitions ENDIF - ;.list + .list IF RAMDSK INCLUDE DPHM.LIB ; Insert DPH Info for RAM Disk ENDIF @@ -294,9 +290,6 @@ NRDPB EQU [$-DPB]/DPBSIZ ; Calc number of DPB's ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: CSEG DIRDIO: -; CALL PRINT -; DEFB '[DIRDIO',']'+80H - IF BANKED CALL BIOSTK CALL GOSYSB ; Bank in the system bank @@ -401,11 +394,7 @@ MAXHFN EQU [$-HDFUNC]/2 IF BANKED ; << ****** HARDWARE SPECIFIC ****** >> ; << Enter the Inter-Bank Movement >> - IF HBIOS - INCLUDE IBMV-WW.Z80 ; << routines in IBMV-xxx.Z80 >> - ELSE INCLUDE IBMV-DX.Z80 ; << routines in IBMV-xxx.Z80 >> - ENDIF ELSE ; If Not Banked, Use these hooks @@ -461,8 +450,6 @@ RETBIO: LD BC,BIOSJT ; Get address of bios base ; Return DPH Table Address ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: - INCLUDE UTIL.Z80 - DRVTBL: LD HL,DPHTBL ; Point to DPH table RET @@ -489,22 +476,14 @@ DRVTBL: LD HL,DPHTBL ; Point to DPH table PAGE ; << ****** Hardware Specific ****** >> ; << Enter routines for your timer >> - INCLUDE TIM-WW.Z80 ; << and clock in TIM-xxxx.Z80 >> + INCLUDE TIM-DX.Z80 ; << and clock in TIM-xxxx.Z80 >> PAGE IF HARDDSK ; << ****** Hardware Specific ****** >> - IF SCSI ; << Enter driver routines for your >> - INCLUDE HARD-DX.Z80 ; << Hard Disk in HARD-xxx.Z80 >> - ENDIF - IF IDE - INCLUDE HARDIDE.Z80 - ENDIF - IF HDSK - IF HBIOS - INCLUDE HARDHB.Z80 - ELSE - INCLUDE HARDSIM.Z80 - ENDIF + IF IDE ; << Enter driver routines for your >> + INCLUDE HARDIDE.Z80 ; << Hard Disk in HARD-xxx.Z80 >> + ELSE + INCLUDE HARD-DX.Z80 ENDIF PAGE ENDIF @@ -513,14 +492,9 @@ DRVTBL: LD HL,DPHTBL ; Point to DPH table INCLUDE RAMD-DX.Z80 ; << Enter driver routines for RAM >> PAGE ; << Disk in RAMD-xxx.Z80 >> ENDIF - ; << ****** Hardware Specific ****** >> ; << Enter Warm Boot routines in >> INCLUDE WBOOT-DX.Z80 ; << WBOOT-xx.Z80 >> - - ; << ****** Hardware Specific ****** >> - ; << HBIOS interface routines in >> - INCLUDE HBIOS.Z80 ; << HBIOS.Z80 >> ;..... ; Status bytes of general use placed at end of Data area diff --git a/Source/BPBIOS/bpbio-ww.z80 b/Source/BPBIOS/bpbio-ww.z80 new file mode 100644 index 00000000..92487418 --- /dev/null +++ b/Source/BPBIOS/bpbio-ww.z80 @@ -0,0 +1,599 @@ +;***************************************************************************** +; BP-BIOS. Banked, Portable BIOS. +; Copyright (c) 1989-93 by Cameron W. Cotrill and Harold F. Bower +; +; This program is free software; you can redistribute it and/or modify +; it under the terms of the GNU General Public License as published by +; the Free Software Foundation; either version 2 of the License, or (at +; your option) any later version. +; +; This program is distributed in the hope that it will be useful, but +; WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with this program; if not, write to the Free Software +; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +; +;---------------------------------------------------------------------------- +; This BIOS is broken into modules that allow it to be ported across a +; wide variety of Z80 compatible systems. All hardware specific drivers +; are isolated to separate modules. All hardware independent modules (such +; as deblocking and IO redirection) are similarly broken out. +; +; The BP BIOS supports IOBYTE, but in a unique manner. Four physical devices +; are defined - COM1, COM2, PIO, and NULL. These are assigned to the CON, +; AUXIN, AUXOUT, and LST logical devices by the I/O byte. The NULL device is +; a bit bucket for output, and returns nulls for input. +; +; IOBYTE DESCRIPTION: LIST AUXOUT AUXIN CON +; D7->D0 XX XX XX XX +; +; XX: 00=COM1 01=COM2 10=PIO 11=NULL +; +;+++++++++++++++++ D-X Designs Pty Ltd P112 Version ++++++++++++++++++ +; +; This configuration of the B/P Bios is for Dave Brooks' Project 112 Single +; board computer. Multifunction chips on the board provide the services +; needed by a CP/M BIOS. The primary chips and the functions provided are: +; +; Zilog Z80182 Z180 Core CPU, MMU, DMA +; ESCC #1 COM1 Serial Port w/handshake signals, RS-232 +; ESCC #2 (available on header, coded as expansion) +; ASCI0, ASCI1 (Serial async, available on header, expansion) +; CTC1 Optional 'heartbeat' clock, GP timer +; +; SMC FDC37C665 Enhanced 765-derivative Floppy Disk Controller +; COM2 - 16550-compatible Serial, RS-232 +; PAR1 - Centronics Parallel port (Printer) +; +; Dallas DS-1202 Primary Realtime clock +; Non-volatile battery-backed RAM (config data) +; +; 28F256 Flash ROM Boot code, device initialization +; (onboard programmable) +; 32/128/512 KB Static RAM +; +; Ver Date Revision Description +; --- --------- ------------------------ +; 1.3 28 Aug 01 - Scrubbed for GPL Release. HFB +; 1.2 - 30 Aug 97 - Expanded SCSI CDB length to 12 bytes for CDROM. HFB +; 1.1 - 11 May 97 - Added IDE Hard Drive instead of Normal SCSI, updated +; files to latest version. HFB +; 1.0 - 13 Aug 96 - Initial Release for P112 from YASBEC release. HFB +;***************************************************************************** + + NAME BPBIO + +FALSE EQU 0 +TRUE EQU NOT FALSE +NO EQU FALSE +YES EQU TRUE + ; << ****** SYSTEM SPECIFIC ****** >> + ; << Insert DEF-xxxx.LIB definition >> + INCLUDE DEF-WW.LIB ; << file for your configuration. >> + + ; << ****** SYSTEM SPECIFIC ****** >> + ; << Insert DEF-xxxx.LIB definition >> + INCLUDE ROMWBW.LIB ; << file for your configuration. >> + + CSEG +;..... +; Ascii Character Equates + +ETX EQU 03H ; End-of-Text +ACK EQU 06H ; Acknowledge +BELL EQU 07H ; Bell Character +CR EQU 0DH +LF EQU 0AH +XON EQU 11H ; X-On (Control-Q) +XOFF EQU 13H ; X-Off (Control-S) +ESC EQU 1BH + +; Miscellaneous Equates + +WRUAL EQU 2 ; DOS code for unallocated write + +LOCKF EQU LOW [NOT AUTOSL] ;Lock flag for format default +ALONE EQU FALSE ; Boot code equate + IF Z3 + MACLIB Z3BASE.LIB ; Include ENV definitions + ENDIF + PAGE +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * +; BIOS Entry Jump Table - This MUST be in Common Memory +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * + + CSEG + +BIOSJT: JP CBOOT ; 00 Cold Boot + JP WBOOT ; 01 Warm Boot + JP CONST ; 02 console input status * (IOP+12) + JP CONIN ; 03 console input * (IOP+15) + JP CONOUT ; 04 console output * (IOP+18) + JP LIST ; 05 list output * (IOP+21) + JP AUXOUT ; 06 aux out (punch) * (IOP+24) + JP AUXIN ; 07 aux in (reader) * (IOP+27) + JP HOME ; 08 seek track 0 + JP SELDSK ; 09 select logical drive + JP SETTRK ; 10 select track + JP SETSEC ; 11 select sector + JP SETDMA ; 12 set dma address for disk xfer + JP READ ; 13 disk read + JP WRITE ; 14 disk write + JP LISTST ; 15 list output status * (IOP+30) + JP SECTRN ; 16 logical -> physical sector xlate + +; --- <<< End of CP/M 2.2 Vectors >>> + + JP CONOST ; 17 Console Output Status + JP AUXIST ; 18 Aux Input Status + JP AUXOST ; 19 Aux Output Status + JP DEVTBL ; 20 CP/M 3 Device Table + JP DEVINI ; 21 Character Device Init (Near CP/M 3) + JP DRVTBL ; 22 DPH Pointer Table for A-P + JP 0 ; 23 RESERVED FOR MULTIO + JP FLUSH ; 24 Flush Deblocker + JP MOVE ; 25 Perform possible Inter-Bank Move + IF CLOCK + JP TIME ; 26 Get/Set RTC (Zsdos params) + ELSE + JP ISTRUE ; 26..return 0FFH (No Clock) if No code + ENDIF ;clock + JP SELMEM ; 27 Select Alternate Memory Bank + JP SETBNK ; 28 Select DMA Memory bank + JP XMOVE ; 29 Set Source/Destination Banks for Move + +; --- <<< End of CP/M 3 Vectors >>> + + JP RETBIO ; 30 Return BIOS Addresses + JP DIRDIO ; 31 Direct Disk I/O + JP STFARC ; 32 Set Bank for FRJP and FRCALL + JP FRJP ; 33 Jump to (HL) in Alternate Bank + JP FRCLR ; 34 Clear Stack switcher from Alt Bank Jumps + ; (used for error exits) + JP FRGETB ; 35 Load A,(HL) from Alternate Bank + JP FRGETW ; 36 Load DE,(HL) from Alternate Bank + JP FRPUTB ; 37 Load (HL),A to Alternate Bank + JP FRPUTW ; 38 Load (HL),DE to Alternate Bank + JP RETMEM ; 39 Return Current Active Memory Bank + +CPR EQU BIOSJT-800H-0E00H +DOS EQU BIOSJT-0E00H + +; End of BIOS Jump Table + PAGE +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * +; Boot / Banked Routine Linkage +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * + + IF BANKED + COMMON /BANK2/ +ROMJT: + IF INROM + JP INSYNC +INSYNC: JP BOOTER ; Cold start loader + ELSE + JP 0 ; Reserved + JP 0 + ENDIF ; Inrom +JDIRIO: JP DIRIO ; Low Level HDC/FDC Functions +JHDCIO: JP DIRIO ; Low Level HDC Functions (combined w/FDCIO) +JBREAD: JP BREAD ; BIOS Read +JBWRT: JP BWRT ; BIOS Write +JBSTRN: JP BSTRN ; BIOS Sectran + IF INROM + INCLUDE BOOTROM.Z80 ; Boot Routines + ENDIF ; Inrom + ENDIF ; Banked + PAGE +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * +; C o n f i g u r a t i o n A r e a +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * + ; << ****** HARDWARE SPECIFIC ****** >> + ; << Insert ICFG-xxx to initialize >> + INCLUDE ICFG-WW.Z80 ; << your computer's IO system >> + PAGE + ; << ****** Hardware Specific ****** >> + ; << Enter Low level Byte I/O driver >> + INCLUDE IIO-WW.Z80 ; << routines in file IIO-xxxx.Z80 >> + PAGE +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * +; Cold Start Code +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * + + DSEG + ; << ***** Hardware Specific ***** >> + ; << Insert the Cold boot routines >> + INCLUDE CBOOT-WW.Z80 ; << in file CBOOT-xx.Z80 >> + +; Deblocking Buffer Allocation + + IF [BANKED OR INROM] + COMMON /B2RAM/ + IF INROM +HSTBUF: DEFS INITCS ; Use a 1k buffer w/below + ELSE +HSTBUF EQU CBOOT0 ; Use CBOOT0 code for part of buffer w/below + ENDIF ;inrom + ELSE + DSEG +HSTBUF EQU CBOOT + ENDIF ;not banked + DEFS 1024-(INITCS) ; Use a 1 k buffer + +HSTSIZ EQU HSTBUF+1024 ; Added label for Hard Drive ext. interface + PAGE +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * +; Disk Data Structures +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * + +MXFDIR EQU 255 ; Max number of dir entries-1 for floppy + +MXFALC EQU 880 ; If High Density or 8" drives can be handled, + ; set this for 880 (1.76 MB), otherwise the + ; value can be reduced to 400 (800 KB), the + ; maximum for 80 track, Double-Sided formats. + CSEG + IF BANKED + COMMON /BANK2/ + ENDIF +DPB: ; Marker for DPB start + ;.XLIST ; Don't print these due to size + IF AUTOSL + INCLUDE DPB.LIB ; Default selection of common DD formats + IF FLOPYH + INCLUDE DPB-H.LIB ; If "High-Density" Disk formats desired, + ENDIF + IF FLOPY8 + INCLUDE DPB-8.LIB ; If 8" or HD Floppy Disks can be handled, + ENDIF ; add default Autoselect DPB's + IF MORDPB + INCLUDE DPB2.LIB ; Additional assignable DPB's (4+4 unused) + ENDIF ;mordpb + + ELSE ;Not autosl + INCLUDE DPBRAM.LIB ; RAM-based DPB's, 1 per physical Format + ENDIF + +NRDPB EQU [$-DPB]/DPBSIZ ; Calc number of DPB's + + CSEG ; Hard & Ramdisk DPBs and DPHs go in Code Seg + ;.xlist + IF HARDDSK + ; << ****** Hardware Specific ****** >> + ; << Insert DPB Info for Hard Disk >> + INCLUDE DPBHD-WW.LIB ; << Drives as DPBHD-xx.LIB >> + ENDIF + ;.list + IF RAMDSK + ; << ****** Hardware Specific ****** >> + ; << Insert DPB Info for RAM Disk >> + INCLUDE DPBM-WW.LIB ; << in file DPBM-xxx.LIB >> + ENDIF + PAGE + INCLUDE DPH.LIB ; Disk parameter headers + ;.xlist + IF HARDDSK + INCLUDE DPHHD.LIB ; Insert DPH Info for Hard Disk Partitions + ENDIF + ;.list + IF RAMDSK + INCLUDE DPHM.LIB ; Insert DPH Info for RAM Disk + ENDIF + .LIST + PAGE +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * +; Disk Driver Low - Level Function Links +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Direct Disk I / O +; Call with: Function Number in C, Driver number in B, +; Args in A, DE, HL +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + CSEG +DIRDIO: +; CALL PRTSTRD +; DEFB '[DIRDIO',']$' + + IF BANKED + CALL BIOSTK + CALL GOSYSB ; Bank in the system bank + JP JDIRIO ; And jump to Banked-BIOS function + + COMMON /BANK2/ + ENDIF + +DIRIO: PUSH HL ; Save user's HL + PUSH AF ; ..and A reg for range checks + LD A,B + CP MAXDDA ; Legal Driver #? + JR NC,DIRIOX ; ..jump Error Exit if Not + PUSH BC + LD HL,DDIOTB + LD C,B ; Driver number + LD B,0 + ADD HL,BC + ADD HL,BC ; Index into table + ADD HL,BC + LD A,(HL) ; Max call number + INC HL + LD C,(HL) + INC HL + LD H,(HL) + LD L,C ; Service vector table address in HL + POP BC ; Requested call + DEC A ; Correct Max Call # for Testing + JP M,DIRIOX ; ..jump Error exit if 0 --> FF (No Calls) + CP C ; Greater than Maximum Function? + JR C,DIRIOX ; ..jump Error exit if so + PUSH BC ; Else Save BC + LD B,0 + ADD HL,BC + ADD HL,BC ; Add twice for Word index + LD B,(HL) + INC HL + LD H,(HL) + LD L,B ; Put vector in HL + POP BC ; Restore User's BC register + POP AF ; .Restore A and Flags + EX (SP),HL ; ..restore HL, Vector to TOS + RET ; Jump to Routine + +DIRIOX: POP AF ; Clear stack + POP HL + OR 0FFH ; Set Error return + RET ; ..and quit + +; Direct Disk Access Table Pointer Table + +DDIOTB: DEFB 0 + DEFW 00 ; No Driver 0 + DEFB MAXFFN + DEFW FDFUNC ; 1 is Primary Floppy Driver + IF HARDDSK + DEFB MAXHFN + DEFW HDFUNC ; 2 is Primary Hard Disk Driver + ENDIF ;harddsk + IF [RAMDSK AND NOT HARDDSK] + DEFB 0 + DEFW 00 ; (Dummy 2 if not installed) + ENDIF ;ramdsk and not harddsk + IF RAMDSK + DEFB 0 + DEFW 00 ; 3 is Primary RAM Disk Driver (No Functions) + ENDIF ;ramdsk + +MAXDDA EQU ($-DDIOTB)/3 ; Number of entries in pointer table + +; Floppy Drive Function Table and Numbers + +FDFUNC: DEFW STMODE ; 00 set mode + DEFW STSIZE ; 01 set drive size + DEFW STHDRV ; 02 set head and drive + DEFW STSECT ; 03 set sector #, size and eot + DEFW SPEC ; 04 specify srt, hlt, hut + DEFW RECAL ; 05 home the floppy + DEFW SEEK ; 06 seek track + DEFW SREAD ; 07 read + DEFW SWRITE ; 08 write + DEFW READID ; 09 read id + DEFW RETDST ; 10 return drive status & result ptr + DEFW FMTTRK ; 11 format a track +MAXFFN EQU [$-FDFUNC]/2 + +; Hard Disk Function Table and Numbers + + IF HARDDSK +HDFUNC: DEFW HDVALS ; 00 Set Xfer Address, Return Interface Parms + DEFW HDSLCT ; 01 Select Device (& Logical Unit w/SCSI) + DEFW HD_RW ; 02 Direct Hard Disk Driver +MAXHFN EQU [$-HDFUNC]/2 + ENDIF ;harddsk + PAGE +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * +; Banked Memory Support Routines +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Bank Control Routines. Used only in Banked Systems +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + + IF BANKED ; << ****** HARDWARE SPECIFIC ****** >> + ; << Enter the Inter-Bank Movement >> + INCLUDE IBMV-WW.Z80 ; << routines in IBMV-xxx.Z80 >> + + ELSE ; If Not Banked, Use these hooks + +MOVE: LDIR + RET + +SETBNK: +SELMEM: +RETMEM: +XMOVE: +GOSYSB: +FRCLR: +STFARC: RET + +FRJP: JP (HL) + +FRGETB: LD A,(HL) + RET + +FRGETW: LD E,(HL) + INC HL + LD D,(HL) + DEC HL + RET + +FRPUTB: LD (HL),A + RET + +FRPUTW: LD (HL),E + INC HL + LD (HL),D + DEC HL + RET + + ENDIF ;(not) banked + PAGE +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * +; Core BIOS Code +;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Return BIOS Addresses +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + + CSEG + +RETBIO: LD BC,BIOSJT ; Get address of bios base + LD DE,CONFIG ; Point to configuration area + LD HL,DEVCFG ; Point to Char IO Device Table + LD A,VERS ; Return BIOS Version + RET + +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Return DPH Table Address +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + + INCLUDE UTIL.Z80 + +DRVTBL: LD HL,DPHTBL ; Point to DPH table + RET + + PAGE + INCLUDE BYTEIO.Z80 ; Con:, aux:, lst: redirection + PAGE + INCLUDE SELRWD.Z80 ; Physical driver link for disks + PAGE + INCLUDE DEBLOCK.Z80 ; Hstbuf deblocker + PAGE + INCLUDE SECTRAN.Z80 ; Sector translation + PAGE + IF AUTOSL + INCLUDE SELFLP2.Z80 ; Floppy disk select + ELSE + INCLUDE SELFLP1.Z80 + ENDIF + PAGE + INCLUDE FLOPPY.Z80 ; Hardware independent floppy routines + PAGE + ; << ****** Hardware Specific ****** >> + ; << This Driver is for the Standard >> + INCLUDE FDC-WW.Z80 ; << MicroSystems (SMC) FDC37C665 >> + PAGE + ; << ****** Hardware Specific ****** >> + ; << Enter routines for your timer >> + INCLUDE TIM-WW.Z80 ; << and clock in TIM-xxxx.Z80 >> + PAGE + + IF HARDDSK ; << ****** Hardware Specific ****** >> + IF SCSI ; << Enter driver routines for your >> + INCLUDE HARD-WW.Z80 ; << Hard Disk in HARD-xxx.Z80 >> + ENDIF + IF IDE + INCLUDE HARDIDE.Z80 + ENDIF + IF HDSK + IF HBIOS + INCLUDE HARDHB.Z80 + ELSE + INCLUDE HARDSIM.Z80 + ENDIF + ENDIF + PAGE + ENDIF + + IF RAMDSK ; << ****** Hardware Specific ****** >> + INCLUDE RAMD-WW.Z80 ; << Enter driver routines for RAM >> + PAGE ; << Disk in RAMD-xxx.Z80 >> + ENDIF + + ; << ****** Hardware Specific ****** >> + ; << Enter Warm Boot routines in >> + INCLUDE WBOOT-WW.Z80 ; << WBOOT-xx.Z80 >> + + ; << ****** Hardware Specific ****** >> + ; << HBIOS interface routines in >> + INCLUDE HBIOS.Z80 ; << HBIOS.Z80 >> +;..... +; Status bytes of general use placed at end of Data area + + DSEG + +HDONE: DEFS 1 ; HDC Flag 0=Ready, 1=Busy, 0FFH=Done +ERFLAG: DEFS 1 ; Disk Operation Error Code + DEFS 3 ; Reserved + +; Add Character IO buffers here to insure they are at end of DSEG + + IF BUFFA0 AND MORDEV AND NOT MOVCPM +COM4Q: DEFS 1 ; Char count in Queue + DEFS QSIZE ; 1 to 255 character type-ahead buffer + ENDIF + + IF BUFFA1 AND MORDEV AND NOT MOVCPM +COM5Q: DEFS 1 ; Char count in Queue + DEFS QSIZE ; 1 to 255 character type-ahead buffer + ENDIF + + IF (BUFFA0 OR BUFFA1) AND MORDEV AND NOT MOVCPM + DEFS 12 ; Stack for Buffered char IO routines +INTSP: DEFS 2 ; Storage for entry Stack Ptr + ENDIF + +; Flags Bytes for Com1/Com2 Flow Control + IF XONOFF +COM1WT: DEFS 1 ; B7=0 - Output Ok, B7=1 - Output Stopped +COM2WT: DEFS 1 ; B0=0 - Input Ok, B0=1 - Input Halted + IF ESCC_B AND MORDEV AND NOT MOVCPM +COM3WT: DEFS 1 ; Flags for Expansion devices + ENDIF + IF ASCI_0 AND MORDEV AND NOT MOVCPM +COM4WT: DEFS 1 + ENDIF + IF ASCI_1 AND MORDEV AND NOT MOVCPM +COM5WT: DEFS 1 + ENDIF + ENDIF ;XonOff + +PAOR: DEFS 1 ; Parallel Output Ready Flag + + IF [BANKED AND ZSDOS2] + COMMON /B2RAM/ ; Put this label in Banked Memory + ENDIF ; ..else in Dseg +BRAME: DEFS 2 ; Use as dynamic sizing label for Hard Drive + ; ALV buffers, and storage area for sizing. + ; ALV Buffers build up from here in memory + CSEG + +; Display warning if we are assembling for MOVCPM integration and the +; combined CSEG/Initialized DSEG size exceeds 1 or 2 Boot Records + +PRINTX MACRO %NN + .printx %NN + ENDM + +LIMIT EQU $-BIOSJT+INITCS + + IF MOVCPM AND LIMIT > 4480 + .printx + .printx **** BIOS too big (>4480) for Boot Tracks! **** + PRINTX %LIMIT + .printx + ELSE + IF MOVCPM AND LIMIT > 4352 + .printx + .printx ++++ BIOS exceeds (>4352) 2-Sector Boot Record ++++ + PRINTX %LIMIT + .printx + ENDIF + ENDIF + +NSECTS EQU ($+INITCS-BIOSJT)/128+1 + IF INROM + INCLUDE BOOTRAM.Z80 + ENDIF + END + \ No newline at end of file diff --git a/Source/BPBIOS/byteio.z80 b/Source/BPBIOS/byteio.z80 index 95e9488d..35c5ac46 100644 --- a/Source/BPBIOS/byteio.z80 +++ b/Source/BPBIOS/byteio.z80 @@ -124,17 +124,13 @@ ISFALSE: XOR A ;..... ; Print routine prints to console the Null or Zero-terminated string at (SP) -PRINT: - EX (SP),HL ; Print inline 0 or Hi-bit terminated +PRINT: EX (SP),HL ; Print inline 0 or Hi-bit terminated PSTR: LD A,(HL) ; General purpose print 0 or Hi-bit INC HL ; Terminated string pointed to by HL OR A JR Z,PSTRX ; Exit if null found in string LD C,A - PUSH BC ; WW - RES 7,C ; WW CALL CONOUT ; Send to console device - POP BC ; WW BIT 7,C ; Test for Hi-bit terminator JR Z,PSTR ; ..loop if Not finished PSTRX: EX (SP),HL ; Else swap Ptr to next instr for entry HL val diff --git a/Source/BPBIOS/cboot-dx.z80 b/Source/BPBIOS/cboot-dx.z80 index 3e825fca..eac62ca0 100644 --- a/Source/BPBIOS/cboot-dx.z80 +++ b/Source/BPBIOS/cboot-dx.z80 @@ -24,19 +24,20 @@ ; beginning of B2RAM and DSEG. CBOOT: DI ; Disable interrupt system -; IN0 A,(DDRA) ; Get Data Definition of Port A -; SET 4,A ; Bit 4 is Input for SCSI "Int" input -; OUT0 (DDRA),A ; and reset bits -; LD A,(HICOMM) ; Set Common Bank start to Header locn -; OUT0 (CBAR),A + IN0 A,(DDRA) ; Get Data Definition of Port A + SET 4,A ; Bit 4 is Input for SCSI "Int" input + OUT0 (DDRA),A ; and reset bits -; CALL FDRst ; Reset FDC Controller, Re-Initialize + LD A,(HICOMM) ; Set Common Bank start to Header locn + OUT0 (CBAR),A + + CALL FDRst ; Reset FDC Controller, Re-Initialize ; (Needed in case ROM Timed out for HD Boot) -; CALL MOTOFF ; Turn Floppy motors Off, clear timer + CALL MOTOFF ; Turn Floppy motors Off, clear timer -; XOR A ; Get a Byte of Zeros -; OUT0 (SCR),A ; and activate ASCI0/ASCI1 vs MIMIC + XOR A ; Get a Byte of Zeros + OUT0 (SCR),A ; and activate ASCI0/ASCI1 vs MIMIC LD HL,(IOBYT) ; Get IOBYTE, Default Drive & User LD (3),HL ; Set values in TPA bank @@ -47,69 +48,58 @@ CBOOT: DI ; Disable interrupt system ; Since the bootable systems (MOVCPM set to YES) are not banked, the Fast Boot ; option should be OFF, and only the TPABNK will necessarily be Accurate. -; IN0 C,(CBR) ; Read Current 4k base of RAM -; RR C ; divide -; RR C ; by -; RR C ; 8 for 32k Bank base -; LD HL,TPABNK -; LD B,(HL) ; Get configured TPA Bank # -; LD (HL),C ; (Store actual) -; IF NOT MOVCPM -; DEC HL -; LD A,(HL) ; Get Any User Bank -; SUB B ; (compute difference from TPA) -; JR C,NoUsrB ; ..jump if None -; ADD A,C ; Else Compute new User Bank # -; LD (HL),A ; (save) -;NoUsrB: INC HL ; advance to System Bank # -; INC HL -; LD A,(HL) ; fetch -; SUB B ; Compute diff from System Bnk to TPA Bnk -; ADD A,C ; add new base -; LD (HL),A ; (save) -; INC HL ; Advance to RAM Drive Start Bank # -; LD A,(HL) -; SUB B ; compute difference -; ADD A,C ; Add true base -; LD (HL),A ; (save) -; ENDIF ;~Movcpm. Max Bank # Stays as configured -; + IN0 C,(CBR) ; Read Current 4k base of RAM + RR C ; divide + RR C ; by + RR C ; 8 for 32k Bank base + LD HL,TPABNK + LD B,(HL) ; Get configured TPA Bank # + LD (HL),C ; (Store actual) + IF NOT MOVCPM + DEC HL + LD A,(HL) ; Get Any User Bank + SUB B ; (compute difference from TPA) + JR C,NoUsrB ; ..jump if None + ADD A,C ; Else Compute new User Bank # + LD (HL),A ; (save) +NoUsrB: INC HL ; advance to System Bank # + INC HL + LD A,(HL) ; fetch + SUB B ; Compute diff from System Bnk to TPA Bnk + ADD A,C ; add new base + LD (HL),A ; (save) + INC HL ; Advance to RAM Drive Start Bank # + LD A,(HL) + SUB B ; compute difference + ADD A,C ; Add true base + LD (HL),A ; (save) + ENDIF ;~Movcpm. Max Bank # Stays as configured IF BANKED LD SP,USP ; Set to User Stack in High memory - CALL HBX_INIT ; WW + CALL GOSYSB ; Turn on the System bank XOR A LD (BIOSTK),A ; Init bank switcher LD (3),HL ; Set IOBYTE and Default DU in System bank + CALL CBOOT0 ; Execute main part of Cold Setup + LD A,(TPABNK) CALL SELBNK ; Insure TPA is in context ELSE LD SP,80H ; Set stack in Low memory - CALL HBX_INIT ; WW + CALL CBOOT0 ; Execute main part of Cold Setup ENDIF - + IF NOT MOVCPM LD HL,003CH ; Point to ZMP Flag LD (HL),0E5H ; say this is first time run ENDIF - + IF FASTWB - ; Grab a copy of command processor from TPA and - ; cache it in (SYSBNK):100H. We assume that the - ; original copy of command processor is in high memory. - LD A,(TPABNK) ; Source bank is TPABNK - LD C,A ; Put it in C - LD A,(SYSBNK) ; Destination bank is SYSBNK - LD B,A ; Put it in B - CALL HBX_XCOPY ; Set banks for extended copy - LD HL,(CPADR) ; Copy from start of command processor - LD DE,100H ; .. to $100 in system bank - LD BC,(CPLEN) ; Length of command processor - CALL HBX_COPY ; Do it - + LD HL,BTTBL ; Point to DMA block moving to Alt Bank JP WBOOTV ; move it and commence execution ELSE JP GOZSYS ; Otherwise just go to Command Processor @@ -182,9 +172,7 @@ DVRAME: SRL D ; Divide by 2 POP HL ; Restore DPH ptr POP BC ; and loop ctr DYNCHK: DJNZ DYNLP ; Loop til all 16 tested - ENDIF ;harddsk - IF BANKED LD DE,USP ; Point above critical Bios Ram storage ELSE @@ -203,7 +191,7 @@ Clr0: LD (HL),0 LD A,D OR E JR NZ,Clr0 ; ..loop til all cleared - + ; In systems where we have enough space, we clear unused High Memory too IF NOT MOVCPM @@ -212,7 +200,7 @@ Clr0: LD (HL),0 ADD HL,DE ; Are we already at the top of memory? JR C,ATTOP ; ..bypass clearing if so EX DE,HL ; Else we must calculate how much to clear - LD HL,MEMTOP ; From the TOP + LD HL,0FFFFH ; From the TOP SBC HL,DE ; subtract the start LD C,L LD B,H ; and use for count @@ -285,71 +273,47 @@ BMOVE: SRL H ; Compute Blks * 128 RR L ; to give HL = CPR length in bytes ENDIF ;~Movcpm - -; ; -; ; SETUP FOR FASTWB -; ; -; ; BTTBL IS USED TO SAVE ORIGINAL CPR -; ; SARL IS USED TO RESTORE CPR -; ; -; ; 0-2: SRC ADDRESS (LLHHB) -; ; 3-5: DEST ADDRESS (LLHHB) -; ; 6-7: LEN (LLHH) -; ; -; ; SET TRANSFER LENGTH IN BTTBL AND SARL -; LD (BTTBL+6),HL ; Save length in boot block -; LD (SARL+6),HL ; and DMA WB block -; ; -; ; L=TPA BANK, H=SYS BANK -; LD HL,(TPABNK) ; Get TPA (L) and System (H) Banks -; ; -; ; CONVERT BANK:DE -> BHHLL, SAVE AS SRC IN BTTBL AND DEST IN SARL -; LD A,L ; Load TPA Bank # -; RL D ; Move MSB of Address to Carry -; ADC A,0 ; Add Carry to Bank # (in case cross banks) -; RRA ; shift for DMA Bank # -; LD (SARL+5),A ; save in Warm Boot DMA Block -; LD (BTTBL+2),A ; and initial move to bank -; RR D ; Move Bank # LSB (Carry) to MSB of Address -; LD (SARL+3),DE ; Save CPR logical address in WB DMA block -; LD (BTTBL),DE ; and initial move to bank -; ; -; ; CONVERT BANK:$0100 -> BHHLL, SAVE AS DEST IN BTTBL AND SRC IN SARL -; LD A,H ; Load System Bank # -; LD HL,100H ; Load Bank Address of CPR Image Start -; RL H ; get rid of MSB -; ; Since we know the MSB=0, bypass adc 0 -; RRA ; Shift for DMA Bank # -; LD (BTTBL+5),A ; save as initial dest bank byte -; LD (SARL+2),A ; and DMA Source Bank byte -; RR H ; Rotate Carry (Bank LSB) to MSB of Address -; LD (SARL),HL ; Save Source Addr in WB DMA block -; LD (BTTBL+3),HL ; and initial move block - - LD (CPLEN),HL ; Save command processor length - LD (CPADR),DE ; Save command processor address (in TPA) - + LD (BTTBL+6),HL ; Save length in boot block + LD (SARL+6),HL ; and DMA WB block + LD HL,(TPABNK) ; Get TPA (L) and System (H) Banks + LD A,L ; Load TPA Bank # + RL D ; Move MSB of Address to Carry + ADC A,0 ; Add Carry to Bank # (in case cross banks) + RRA ; shift for DMA Bank # + LD (SARL+5),A ; save in Warm Boot DMA Block + LD (BTTBL+2),A ; and initial move to bank + RR D ; Move Bank # LSB (Carry) to MSB of Address + LD (SARL+3),DE ; Save CPR logical address in WB DMA block + LD (BTTBL),DE ; and initial move to bank + LD A,H ; Load System Bank # + LD HL,100H ; Load Bank Address of CPR Image Start + RL H ; get rid of MSB + ; Since we know the MSB=0, bypass adc 0 + RRA ; Shift for DMA Bank # + LD (BTTBL+5),A ; save as initial dest bank byte + LD (SARL+2),A ; and DMA Source Bank byte + RR H ; Rotate Carry (Bank LSB) to MSB of Address + LD (SARL),HL ; Save Source Addr in WB DMA block + LD (BTTBL+3),HL ; and initial move block ENDIF ;fastwb -; IF BANKED -; ; -; ; SETUP CPYVEC TO COPY IMAGE OF TPA BANK PAGE ZERO TO SYS BANK PAGE ZERO -; LD HL,0000 ; If we are banked, set to copy Page 0 -; LD A,(TPABNK) ; of TPA to System Bank -; OR A -; RRA ; Shift TPA Bank # -; LD (CPYVEC+2),A ; store in DMA Block -; RR H ; adjust Address by Bank LSB (Carry) -; LD (CPYVEC),HL ; and store -; LD H,0 -; LD A,(SYSBNK) -; RRA ; Shift System Bank # -; LD (CPYVEC+5),A ; store in DMA Block -; RR H ; adjust Address by Bank LSB (Carry) -; LD (CPYVEC+3),HL ; and store -; LD HL,40H ; Set length of move -; LD (CPYVEC+6),HL ; and store in DMA Block -; ENDIF ;banked + IF BANKED + LD HL,0000 ; If we are banked, set to copy Page 0 + LD A,(TPABNK) ; of TPA to System Bank + OR A + RRA ; Shift TPA Bank # + LD (CPYVEC+2),A ; store in DMA Block + RR H ; adjust Address by Bank LSB (Carry) + LD (CPYVEC),HL ; and store + LD H,0 + LD A,(SYSBNK) + RRA ; Shift System Bank # + LD (CPYVEC+5),A ; store in DMA Block + RR H ; adjust Address by Bank LSB (Carry) + LD (CPYVEC+3),HL ; and store + LD HL,40H ; Set length of move + LD (CPYVEC+6),HL ; and store in DMA Block + ENDIF ;banked LD (STKSAV),SP ; Save entry stack since we alter it here LD A,(BLOCKE-BLOCK)/6 @@ -360,7 +324,7 @@ BLKMV: POP BC ; And number of bytes to move LDIR DEC A ; Another block moved JR NZ,BLKMV ; Do more as required - + LD SP,(STKSAV) ; Get entry Stack Pointer back so we can return ; All Buffers above BIOS have been cleared already at this point @@ -368,23 +332,15 @@ BLKMV: POP BC ; And number of bytes to move DEC A ; 0 --> FF LD (Z3WHL),A ; Set the Wheel Byte - ; Get and save the internal HBIOS physical disk - ; buffer address which is assumed to be in the - ; HBIOS bank. - LD B,19H ; Set buffer function call - LD HL,0 ; ... with address 0 to get HBIOS buf adr - CALL HBX_INVOKE ; ... to return internal HBIOS buffer adr - LD (HB_DSKBUF),HL ; Record the buffer address - IF HAVIOP LD HL,IOPRET LD (BIOSJT+1),HL ENDIF ;haviop -; LD HL,INTTBL ; Set the Interrupt Vector -; LD A,H ; first the page -; LD I,A ; to CPU Register -; OUT0 (IL),L ; then the segment addr + LD HL,INTTBL ; Set the Interrupt Vector + LD A,H ; first the page + LD I,A ; to CPU Register + OUT0 (IL),L ; then the segment addr IF BANKED CALL JDVINI ; Call directly because we are in High Stack @@ -407,8 +363,7 @@ BLKMV: POP BC ; And number of bytes to move ; Sign on the system -MEMOK: - CALL PRINT +MEMOK: CALL PRINT IF MOVCPM ; Space is critical for boot tracks DEFB CR,LF,'P112 - ' ; Save all bytes possible ELSE ; Otherwise sign on with complete name @@ -448,24 +403,16 @@ MEMOK: DEFB ' (Polled IO)' ENDIF IF HARDDSK - IF SCSI - DEFB CR,LF,' SCSI Hard Disk Driver' - ENDIF IF IDE DEFB CR,LF,' GIDE Hard Disk Driver' - ENDIF - IF HDSK - IF HBIOS - DEFB CR,LF,' HBIOS Hard Disk Driver' - ELSE - DEFB CR,LF,' SIMH Hard Disk Driver' - ENDIF - ENDIF + ELSE + DEFB CR,LF,' SCSI Hard Disk Driver' IF HDDMA DEFB ' (DMA-driven IO)' ELSE DEFB ' (Polled IO)' ENDIF + ENDIF ENDIF IF FASTWB DEFB CR,LF,' Warm Boot from RAM' @@ -479,7 +426,7 @@ MEMOK: ENDIF ;Banked DEFB CR,LF+80H -;WW EI ; Turn Interrupts back on + EI ; Turn Interrupts back on RET ; ..and return ;..... diff --git a/Source/BPBIOS/cboot-ww.z80 b/Source/BPBIOS/cboot-ww.z80 new file mode 100644 index 00000000..91eb5171 --- /dev/null +++ b/Source/BPBIOS/cboot-ww.z80 @@ -0,0 +1,771 @@ +;:::::::::::::::::::::::::::::::::::::::::::::::::::*********************** +; CBOOT. B/P BIOS Cold Boot Module. ** Hardware Specific ** +; This MUST be the Last Module in the BIOS because ** for prompts, Env ** +; it is overwritten by RAM Data. No Dflt Termcap. ** and Termcap Dflts ** +; - D-X Designs Pty Ltd P112 - *********************** +; +; 1.2 - 30 Aug 01 - Cleaned up for GPL release, Set Bank Numbers on boot +; (TPABNK only if MOVCPM) by reading Regs set by ROM. HFB +; 1.1 - 8 May 97 - Added code to activate ASCI channels. HFB +; 1.0 - 13 Aug 96 - Initial Release for P112. HFB +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + + DSEG +;..... +; Cold boot entry. This code is executed only once and so may be +; overwritten subsequently by the BIOS. In Non-banked systems, this code +; is placed in the Host Buffer, HSTBUF, allowing up to 1024 bytes in the +; section, although much less will fit on the boot tracks. In Banked +; systems, a small resident part (up to 128 bytes) occupies the Directory +; Sector Buffer, DIRBUF, while the remainder is placed in the banked +; HSTBUF, allowing both sectors to be overwritten without penalty. +; To insure minimum disruption in assembling and linking the BIOS, this +; module must be one of the first linked to place HSTBUF/DIRBUF at the +; beginning of B2RAM and DSEG. + +CBOOT: DI ; Disable interrupt system +; IN0 A,(DDRA) ; Get Data Definition of Port A +; SET 4,A ; Bit 4 is Input for SCSI "Int" input +; OUT0 (DDRA),A ; and reset bits + +; LD A,(HICOMM) ; Set Common Bank start to Header locn +; OUT0 (CBAR),A + +; CALL FDRst ; Reset FDC Controller, Re-Initialize + ; (Needed in case ROM Timed out for HD Boot) +; CALL MOTOFF ; Turn Floppy motors Off, clear timer + +; XOR A ; Get a Byte of Zeros +; OUT0 (SCR),A ; and activate ASCI0/ASCI1 vs MIMIC + + LD HL,(IOBYT) ; Get IOBYTE, Default Drive & User + LD (3),HL ; Set values in TPA bank + +; Set BIOS Bank Numbers to the RAM base Number as set by Boot ROM. In-context +; RAM will be reflected in CBR which is base. We adjust other bank numbers +; based on configured differences, except for MaxBnk which remains as config'd. +; Since the bootable systems (MOVCPM set to YES) are not banked, the Fast Boot +; option should be OFF, and only the TPABNK will necessarily be Accurate. + +; IN0 C,(CBR) ; Read Current 4k base of RAM +; RR C ; divide +; RR C ; by +; RR C ; 8 for 32k Bank base +; LD HL,TPABNK +; LD B,(HL) ; Get configured TPA Bank # +; LD (HL),C ; (Store actual) +; IF NOT MOVCPM +; DEC HL +; LD A,(HL) ; Get Any User Bank +; SUB B ; (compute difference from TPA) +; JR C,NoUsrB ; ..jump if None +; ADD A,C ; Else Compute new User Bank # +; LD (HL),A ; (save) +;NoUsrB: INC HL ; advance to System Bank # +; INC HL +; LD A,(HL) ; fetch +; SUB B ; Compute diff from System Bnk to TPA Bnk +; ADD A,C ; add new base +; LD (HL),A ; (save) +; INC HL ; Advance to RAM Drive Start Bank # +; LD A,(HL) +; SUB B ; compute difference +; ADD A,C ; Add true base +; LD (HL),A ; (save) +; ENDIF ;~Movcpm. Max Bank # Stays as configured +; + + IF BANKED + LD SP,USP ; Set to User Stack in High memory + CALL HBX_INIT ; WW + CALL GOSYSB ; Turn on the System bank + XOR A + LD (BIOSTK),A ; Init bank switcher + LD (3),HL ; Set IOBYTE and Default DU in System bank + CALL CBOOT0 ; Execute main part of Cold Setup + LD A,(TPABNK) + CALL SELBNK ; Insure TPA is in context + ELSE + LD SP,80H ; Set stack in Low memory + CALL HBX_INIT ; WW + CALL CBOOT0 ; Execute main part of Cold Setup + ENDIF + + IF NOT MOVCPM + LD HL,003CH ; Point to ZMP Flag + LD (HL),0E5H ; say this is first time run + ENDIF + + IF FASTWB + ; Grab a copy of command processor from TPA and + ; cache it in (SYSBNK):100H. We assume that the + ; original copy of command processor is in high memory. + LD A,(TPABNK) ; Source bank is TPABNK + LD C,A ; Put it in C + LD A,(SYSBNK) ; Destination bank is SYSBNK + LD B,A ; Put it in B + CALL HBX_XCOPY ; Set banks for extended copy + LD HL,(CPADR) ; Copy from start of command processor + LD DE,100H ; .. to $100 in system bank + LD BC,(CPLEN) ; Length of command processor + CALL HBX_COPY ; Do it + + JP WBOOTV ; move it and commence execution + ELSE + JP GOZSYS ; Otherwise just go to Command Processor + ENDIF + + IF BANKED + COMMON /B2RAM/ + ENDIF + +;..... +; If this system is Banked and set for Zsdos2, then ALV Buffers are in the +; system bank and will be dynamically sized during Cold Boot. This permits +; BPCNFG to configure a generic IMG file for specific Hard Drive Partitions. + +CBOOT0: LD HL,BRAME ; Get end of banked RAM + LD (HISAV),HL ; and save for later use + IF HARDDSK + LD HL,DPHTBL ; Point to start of DPH Table + LD B,16 ; do all DPHs +DYNLP: LD E,(HL) + INC HL + LD D,(HL) ; Get the pointer for this one + INC HL ; advance to next + LD A,D ; Anything there? + OR E + JR Z,DYNCHK ; jump to end if Nothing + DEC DE ; Else back up Ptr to Driver + DEC DE + LD A,(DE) ; Get driver # + IF RAMDSK + DEC A + DEC A ; Hard Disk (Driver 2)? + JR Z,ADDSIZ ; ..jump if so + DEC A ; RAM Disk (Driver 3)? + ELSE + CP 2 ; Hard Disk (Driver 2)? + ENDIF ; Ramdsk + JR NZ,DYNCHK ; ..jump to end if Not +ADDSIZ: PUSH BC ; Save loop counter + PUSH HL ; and ptr to DPH + EX DE,HL + LD DE,12 ; Offset to DPB Ptr (+2 for Decs) + ADD HL,DE + LD E,(HL) + INC HL + LD D,(HL) ; Get Addr of this DPB + INC HL + INC HL + INC HL ; Advance to ALV Addr location + LD BC,(HISAV) ; get end of used RAM + LD (HL),C ; and save + INC HL + LD (HL),B ; in DPH + LD HL,5 + ADD HL,DE ; Advance to Size in DPB + LD E,(HL) + INC HL + LD D,(HL) ; and fetch Size-1 + INC DE ; Make = Size in Block + PUSH BC ; (save End Addr in BC) + LD B,3 +DVRAME: SRL D ; Divide by 2 + RR E + DJNZ DVRAME ; *3 = Div 8 + INC DE ; +1 + EX DE,HL + POP BC ; Restore Ram End + ADD HL,BC ; Add size to Starting Location + LD (HISAV),HL ; save for next drive/overflow check + POP HL ; Restore DPH ptr + POP BC ; and loop ctr +DYNCHK: DJNZ DYNLP ; Loop til all 16 tested + + ENDIF ;harddsk + + IF BANKED + LD DE,USP ; Point above critical Bios Ram storage + ELSE + LD DE,DIRBUF + ENDIF + IF Z3 + LD HL,(ENVADR) ; And top of memory + ELSE + LD HL,0FFFFH + ENDIF + SBC HL,DE ; Calculate # bytes to clear (CF already clr) + EX DE,HL ; Ptr to HL, Cnt to DE +Clr0: LD (HL),0 + INC HL + DEC DE + LD A,D + OR E + JR NZ,Clr0 ; ..loop til all cleared + +; In systems where we have enough space, we clear unused High Memory too + + IF NOT MOVCPM + LD HL,(ENVADR) ; Clear above the ENV as well + LD DE,100H ; Assuming a 2-record ENV + ADD HL,DE ; Are we already at the top of memory? + JR C,ATTOP ; ..bypass clearing if so + EX DE,HL ; Else we must calculate how much to clear + LD HL,MEMTOP ; From the TOP + SBC HL,DE ; subtract the start + LD C,L + LD B,H ; and use for count + LD L,E ; Copy Start to Source + LD H,D + INC DE ; dest is same + 1 + LD (HL),0 ; we fill with Zeros + LDIR ; Do it! +ATTOP: + ENDIF ; ~Movcpm + +; Initialize the ZCPR3 buffers + + IF NOT MOVCPM + LD HL,(ENVADR) ; Should we move our local ENV block? + LD A,H + OR L + JR NZ,BMOVE ; ..jump if we already have one + ENDIF ; (Always move Env if using MOVCPM type load) + LD HL,Z3ENV ; Else set up pointers + LD (ENVADR),HL + LD DE,ENV + EX DE,HL + LD BC,ENVEND-ENV ; count + LDIR ; and move + IF MOVCPM ; Instead of storing Termcap bytes, Zeroize + LD H,D + LD L,E ; Dupe dest addr + LD (HL),0 ; Clear current byte + LD BC,37-1 ; Set count to remaining Termcap area + INC DE ; Dest is next byte + LDIR ; move Zero along + ENDIF ;Movcpm +BMOVE: + IF NOT MOVCPM ; No need to set values on Boot Track System + LD DE,(ENVADR) ; Get pointer to ENV + IF HAVIOP + LD HL,0FH ; Set offset to IOP Addr in ENV + CALL CALCOF ; get the addr and size + LD (IOPPTR),HL ; and set addr + ENDIF ;haviop + LD HL,18H ; Set offset to Mult Comnd Line in ENV + CALL CALCOF ; get addr and size + LD (CLPTR),HL ; set addr + INC HL + INC HL + INC HL ; Advance to CL+3 + LD (CL3PTR),HL ; and set + INC HL ; Advance to CL+4 + LD (CMDSET),HL ; set addr in Command Line ptr + LD (CMDSET+2),A ; and CL Size byte + LD HL,09H ; Set offset to Path addr in ENV + CALL CALCOF ; get addr + LD (PTHPTR),HL ; and set + ENDIF ;Movcpm + IF FASTWB ; Do we restore CPR from Bank? + IF MOVCPM + LD DE,BIOSJT-1600H ; Get CPR Starting Addr + LD HL,0800H ; and Default Length + ELSE + LD HL,(ENVADR) ; Get pointer to ENV start + LD DE,3FH ; offset to CPR start + ADD HL,DE + LD E,(HL) ; and get CPR starting address + INC HL + LD D,(HL) + INC HL ; (advance to length) + LD H,(HL) ; Get length in blocks (*2 at this point) + LD L,0 ; convert to Word + SRL H ; Compute Blks * 128 + RR L ; to give HL = CPR length in bytes + ENDIF ;~Movcpm + +; ; +; ; SETUP FOR FASTWB +; ; +; ; BTTBL IS USED TO SAVE ORIGINAL CPR +; ; SARL IS USED TO RESTORE CPR +; ; +; ; 0-2: SRC ADDRESS (LLHHB) +; ; 3-5: DEST ADDRESS (LLHHB) +; ; 6-7: LEN (LLHH) +; ; +; ; SET TRANSFER LENGTH IN BTTBL AND SARL +; LD (BTTBL+6),HL ; Save length in boot block +; LD (SARL+6),HL ; and DMA WB block +; ; +; ; L=TPA BANK, H=SYS BANK +; LD HL,(TPABNK) ; Get TPA (L) and System (H) Banks +; ; +; ; CONVERT BANK:DE -> BHHLL, SAVE AS SRC IN BTTBL AND DEST IN SARL +; LD A,L ; Load TPA Bank # +; RL D ; Move MSB of Address to Carry +; ADC A,0 ; Add Carry to Bank # (in case cross banks) +; RRA ; shift for DMA Bank # +; LD (SARL+5),A ; save in Warm Boot DMA Block +; LD (BTTBL+2),A ; and initial move to bank +; RR D ; Move Bank # LSB (Carry) to MSB of Address +; LD (SARL+3),DE ; Save CPR logical address in WB DMA block +; LD (BTTBL),DE ; and initial move to bank +; ; +; ; CONVERT BANK:$0100 -> BHHLL, SAVE AS DEST IN BTTBL AND SRC IN SARL +; LD A,H ; Load System Bank # +; LD HL,100H ; Load Bank Address of CPR Image Start +; RL H ; get rid of MSB +; ; Since we know the MSB=0, bypass adc 0 +; RRA ; Shift for DMA Bank # +; LD (BTTBL+5),A ; save as initial dest bank byte +; LD (SARL+2),A ; and DMA Source Bank byte +; RR H ; Rotate Carry (Bank LSB) to MSB of Address +; LD (SARL),HL ; Save Source Addr in WB DMA block +; LD (BTTBL+3),HL ; and initial move block + + LD (CPLEN),HL ; Save command processor length + LD (CPADR),DE ; Save command processor address (in TPA) + + ENDIF ;fastwb + +; IF BANKED +; ; +; ; SETUP CPYVEC TO COPY IMAGE OF TPA BANK PAGE ZERO TO SYS BANK PAGE ZERO +; LD HL,0000 ; If we are banked, set to copy Page 0 +; LD A,(TPABNK) ; of TPA to System Bank +; OR A +; RRA ; Shift TPA Bank # +; LD (CPYVEC+2),A ; store in DMA Block +; RR H ; adjust Address by Bank LSB (Carry) +; LD (CPYVEC),HL ; and store +; LD H,0 +; LD A,(SYSBNK) +; RRA ; Shift System Bank # +; LD (CPYVEC+5),A ; store in DMA Block +; RR H ; adjust Address by Bank LSB (Carry) +; LD (CPYVEC+3),HL ; and store +; LD HL,40H ; Set length of move +; LD (CPYVEC+6),HL ; and store in DMA Block +; ENDIF ;banked + + LD (STKSAV),SP ; Save entry stack since we alter it here + LD A,(BLOCKE-BLOCK)/6 + LD SP,BLOCK +BLKMV: POP BC ; And number of bytes to move + POP HL ; Source + POP DE ; Get destination + LDIR + DEC A ; Another block moved + JR NZ,BLKMV ; Do more as required + + LD SP,(STKSAV) ; Get entry Stack Pointer back so we can return + +; All Buffers above BIOS have been cleared already at this point + + DEC A ; 0 --> FF + LD (Z3WHL),A ; Set the Wheel Byte + + ; Get and save the internal HBIOS physical disk + ; buffer address which is assumed to be in the + ; HBIOS bank. + LD B,19H ; Set buffer function call + LD HL,0 ; ... with address 0 to get HBIOS buf adr + CALL HBX_INVOKE ; ... to return internal HBIOS buffer adr + LD (HB_DSKBUF),HL ; Record the buffer address + + IF HAVIOP + LD HL,IOPRET + LD (BIOSJT+1),HL + ENDIF ;haviop + +; LD HL,INTTBL ; Set the Interrupt Vector +; LD A,H ; first the page +; LD I,A ; to CPU Register +; OUT0 (IL),L ; then the segment addr + + IF BANKED + CALL JDVINI ; Call directly because we are in High Stack + ELSE + CALL DEVINI ; Initialize the I/O system + ENDIF ; And any device specific ram + + IF [BANKED AND ZSDOS2] + LD DE,8000H ; If ALVs in Bank, size against Bank2 Top + ELSE + LD DE,(USRSP) ; else against base of User Space + ENDIF + LD HL,(HISAV) ; Load Highest RAM Address used + OR A + SBC HL,DE ; Is Needed Space > Limit? + JR C,MEMOK ; ..jump if So + + CALL PRINT ; Else Warn user + DEFB CR,LF,7,'++ Mem Ovfl +','+'+80H + +; Sign on the system + +MEMOK: + CALL PRINT + IF MOVCPM ; Space is critical for boot tracks + DEFB CR,LF,'P112 - ' ; Save all bytes possible + ELSE ; Otherwise sign on with complete name + DEFB CR,LF,'D-X Designs P112 - ' + ENDIF + DEFB 'B/P 50.00k Bios' ;**** Do NOT alter this string **** + + DEFB ' V',VERS/16+'0','.',VERS MOD 16+'0',' ' ; Vers in BCD + DATE + IF BANKED + DEFB ' (Banked) ' + ELSE + IF NOT MOVCPM + DEFB ' (Non-Banked) ' ; Nothing for boot track system + ENDIF + ENDIF + IF BANKED + DEFB ' with:',CR,LF,LF + DEFB ' ZCPR3+ Env' + IF CLOCK + IF DS1202 + DEFB CR,LF,' Dallas DS-1202 Clock, ' + IF CLKSET + DEFB 'with ' + ELSE + DEFB 'NO ' + ENDIF + DEFB 'Set' + ELSE + DEFB CR,LF,' ZSDOS Interrupt Clock' + ENDIF + ENDIF + DEFB CR,LF,' High-Density Floppy' + IF FDDMA + DEFB ' (DMA-driven IO)' + ELSE + DEFB ' (Polled IO)' + ENDIF + IF HARDDSK + IF SCSI + DEFB CR,LF,' SCSI Hard Disk Driver' + ENDIF + IF IDE + DEFB CR,LF,' GIDE Hard Disk Driver' + ENDIF + IF HDSK + IF HBIOS + DEFB CR,LF,' HBIOS Hard Disk Driver' + ELSE + DEFB CR,LF,' SIMH Hard Disk Driver' + ENDIF + ENDIF + IF HDDMA + DEFB ' (DMA-driven IO)' + ELSE + DEFB ' (Polled IO)' + ENDIF + ENDIF + IF FASTWB + DEFB CR,LF,' Warm Boot from RAM' + ENDIF + IF RAMDSK + DEFB CR,LF,' RAM Disk (M:)' + ENDIF + IF BIOERM + DEFB CR,LF,' Full Error Messages' + ENDIF + ENDIF ;Banked + DEFB CR,LF+80H + +;WW EI ; Turn Interrupts back on + RET ; ..and return + +;..... +; Offset to and get ENV Address and respective element size + +CALCOF: ADD HL,DE ; Add offset to Base ENV Addr + LD C,(HL) ; get low byte + INC HL + INC HL ; advance to size byte + LD A,(HL) ; get size + DEC HL ; Back down to Addr hi byte + LD H,(HL) ; and grab + LD L,C ; Ptr to Segment now in HL + RET ; return to caller + +; Block Move Parameters + +BLOCK: DEFW PATH-CMDSET ; # to move + DEFW CMDSET ; Source +CLPTR: DEFW Z3CL ; Destination + + DEFW 10 + DEFW AUTOCMD +CL3PTR: DEFW Z3CL+3 + + DEFW PATHE-PATH + DEFW PATH +PTHPTR: DEFW EXPATH + + IF HAVIOP + DEFW IOPLEN+2 + DEFW IOPENT +IOPPTR: DEFW IOP + ENDIF + + IF HARDDSK AND HDDMA AND (NOT IDE) + DEFW DMALEN + DEFW DMADAT + DEFW DMATBL + ENDIF + +BLOCKE EQU $ + +;..... +; Initial HD DMA Control Block data + + IF HARDDSK AND HDDMA +DMADAT: DEFW HSTBUF ; Physical sector address + DEFB 00 ; BNK2 SHR 1 if banked, BNK0 SHR 1 If not + DEFW DMAACK ; Dack port address + DEFB 0 + DEFW 400H ; Number of bytes to transfer (1Sct+slop=2Scts) +DMALEN EQU $-DMADAT + ENDIF + +CMDSET: DEFW Z3CL+4 ; Point to first character in command buffer + DEFB Z3CLS ; Command buffer size + DEFW 0 ; Clear the command line + +PATH: DEFB '$','$',1,15 ; Current, A15: + DEFB 0 ; End of initial path +PATHE EQU $ + +; Environment Descriptor for ZCPR34 + +ENV: JP 0 ; Leading jump (address is CBIOS when NZCOM) +ENV1: ; ZCPR3 enviornment descriptor ... + DEFB 'Z3ENV' ; Environment id + DEFB 90H ; Env type (=>80H means extended ENV). YASBEC + ; uses 90H to show User Area instead of Prt2 + DEFW EXPATH ; External path (path) + DEFB EXPATHS ; + DEFW RCP ; Resident command package (rcp) + DEFB RCPS ; + DEFW IOP ; Input/output package (iop) + DEFB IOPS ; + DEFW FCP ; Flow command package (fcp) + DEFB FCPS ; + DEFW Z3NDIR ; Named directories (ndr) + DEFB Z3NDIRS ; + DEFW Z3CL ; Command line (cl) + DEFB Z3CLS ; + DEFW Z3ENV ; Environment (env) + DEFB Z3ENVS ; + DEFW SHSTK ; Shell stack (sh) + DEFB SHSTKS ; + DEFB SHSIZE ; + DEFW Z3MSG ; Message buffer (msg) + DEFW EXTFCB ; External fcb (fcb) + DEFW EXTSTK ; External stack (stk) + DEFB 0 ; Quiet flag (1=quiet, 0=not quiet) + DEFW Z3WHL ; Wheel byte (whl) + DEFB 16 ; Processor speed (mhz) + DEFB 'P'-'@' ; Max disk letter + DEFB 31 ; Max user number + DEFB 1 ; 1 = Ok to accept DU:, 0 = Not Ok + DEFB 0 ; Crt selection () + DEFB 0 ; Printer selection () + DEFB 80 ; Crt 0: width + DEFB 24 ; # of lines + DEFB 22 ; # of text lines + +; In Extended ENV, CRT 1 is replaced by System Info + +;; DEFB 132 ; . CRT 1: Width +;; DEFB 24 ; # of lines +;; DEFB 22 ; # of text lines + +; The Drive Vector is a 16-bit word in which a "1" bit indicates that a drive +; is active in the system. The bits are arranged as: PONMLKJIHGFEDCBA. When +; stored in memory, it is in normal form with the Low byte stored first. + +E_DRVL DEFL [DRV_A & 1] + [DRV_B & 2] + [DRV_C & 4] + [DRV_D & 8] +E_DRVL DEFL E_DRVL + [DRV_E & 16] + [DRV_F & 32] + [DRV_G & 64] +E_DRVL DEFL E_DRVL + [DRV_H & 128] ; Low Byte Formed +E_DRVH DEFL [DRV_I & 1] + [DRV_J & 2] + [DRV_K & 4] + [DRV_L & 8] +E_DRVH DEFL E_DRVH + [DRV_M & 16] + [DRV_N & 32] + [DRV_O & 64] +E_DRVH DEFL E_DRVH + [DRV_P & 128] ; High Byte Formed + + DEFW E_DRVH * 256 + E_DRVL + DEFB 0 ; (Reserved) + + DEFB 80 ; Prt 0: width + DEFB 66 ; # of lines + DEFB 58 ; # of text lines + DEFB 1 ; Ff flag (1=can form feed) + +;========= Usurped Prt1 storage for Resident User Space Vectors ========= +;; DEFB 96 ; Prt 1: width +;; DEFB 66 ; # of lines +;; DEFB 58 ; # of text lines +;; DEFB 1 ; Ff flag (1=can form feed) + + DEFB USPCS ; Remaining Free User Space (recs) +USRSP: DEFW USPC ; Res. User Space base Address (xx00h/xx80h) + DEFB USPCS ; Size of Res. User Space in 128-byte recs + +;======================================================================== +; In Extended ENV, Printers 2 and 3 are gone, replaced by System Info + +;; DEFB 132 ; . PRT 2: Width +;; DEFB 66 ; # of lines +;; DEFB 58 ; # of text lines +;; DEFB 1 ; FF flag (1=can form feed) +;; DEFB 132 ; . PRT 3: Width +;; DEFB 88 ; # of lines +;; DEFB 82 ; # of text lines +;; DEFB 1 ; FF flag (1=can form feed) + DEFW CPR ; Ccp base address + DEFB [DOS-CPR]/128 ; Size of ccp in 128 byte records + DEFW DOS ; Bdos base address (xx00h or xx80h) + DEFB [BIOSJT-DOS]/128 ; Bdos buffer size in 128 byte records + DEFW BIOSJT ; Bios base address (nzbio if nzcom running) + DEFB 'SH ' ; Shell variable filename + DEFB 'VAR' ; Shell variable filetype + DEFB ' ' ; File 1 + DEFB ' ' ; + DEFB ' ' ; File 2 + DEFB ' ' ; + DEFB ' ' ; File 3 + DEFB ' ' ; + DEFB ' ' ; File 4 + DEFB ' ' ; + DEFB 0 ; Public drive area (zrdos +) + DEFB 0 ; Public user area (zrdos +) + ; Env 128 bytes long +;*************************************************************************** +; This TermCap Data for the New Z-System complies with VLIB4D specs and more +; fully describes the terminal and its capabilities. Edit the fields with +; values for your terminal characteristics, or use it as a template for an +; outboard definition loaded from the Startup file. + +ENV2: DEFB ' ' ; Terminal Name (13 bytes, space terminated) + + IF MOVCPM ; Dummies for boot track systems +B13: DEFB 0 +B14: DEFB 0 ; Bit 7 = Normal TCAP + ELSE +B13: DEFB GOELD-ENV2 ; Offset to GOELD in graphics section +B14: DEFB 10000000B ; Bit 7 = Extended TCAP, remainder undefined + ENDIF ;~Movcpm + +; B15 b0 Standout 0 = Half-Intensity, 1 = Reverse Video +; B15 b1 Power Up Delay 0 = None, 1 = 10-second delay +; B15 b2 No Wrap 0 = Line Wrap, 1 = No Wrap if char written +; to last character in line +; B15 b3 No Scroll 0 = Scroll, 1 = No Scroll if char written +; to last char in last line of diplay +; B15 b4 ANSI 0 = ASCII, 1 = ANSI + +B15: DEFB 00000000B ; Reverse Vid, Wrap, Scroll, ASCII + ; Additional single character cursor motion bytes + DEFB 'E'-'@' ; Cursor Up + DEFB 'X'-'@' ; Cursor Down + DEFB 'D'-'@' ; Cursor Right + DEFB 'S'-'@' ; Cursor Left + + IF NOT MOVCPM ; Omit in boot systems to save space + ; Instead, we simply zero remainder. + DEFB 0 ; CL Delay for Screen Clear + DEFB 0 ; CM Delay for Cursor Motion + DEFB 0 ; CE Delay for Clear to End-of-Line + ; Strings start here + DEFB 0 ; (CL) Home Cursor and Clear Screen + DEFB 0 ; (CM) Cursor Motion + DEFB 0 ; (CE) Clear to End-of-Line + DEFB 0 ; (SO) Reverse On + DEFB 0 ; (SE) Reverse Off + DEFB 0 ; (TO) Terminal Init + DEFB 0 ; (TE) Terminal De-init + ; Extensions to Standard Z3TCAP + DEFB 0 ; (LD) Delete Line + DEFB 0 ; (LI) Insert Line + DEFB 0 ; (CD) Clear from Cursor to End-of-Scr + ; Attributes setting parameters + DEFB 0 ; Set Attributes + DEFB 0 ; Attributes String + ; Read items from screen + DEFB 0 ; Report Cursor Pos'n (ESC Y Pn Pn) + DEFB 0 ; Read Line Under Cursor + +GOELD: DEFB 0 ; On/Off Delay + ; Graphics strings offset from Delay value. + DEFB 0 ; Graphics On + DEFB 0 ; Graphics Off + DEFB 0 ; Cursor Off + DEFB 0 ; Cursor On + ; Graphics Characters + DEFB '*' ; Upper-Left corner [*] + DEFB '*' ; Upper-right corner [*] + DEFB '*' ; Lower-Left corner [*] + DEFB '*' ; Lower-right corner [*] + DEFB '-' ; Horizontal Line [-] + DEFB '|' ; Vertical Line [|] + DEFB '#' ; Full Block (hashed block) [*] + DEFB 'X' ; Hashed Block (big X) [#] + DEFB '+' ; Upper Intersect (Upside down "T") [+] + DEFB '+' ; Lower Intersect ("T") [+] + DEFB '+' ; Mid Intersect (Crossing Lines) [+] + DEFB '+' ; Right Intersect ("T" rotated left) [+] + DEFB '+' ; Left Intersect ("T" rotated right) [+] + DEFB 0 + DEFB 0 + ENDIF ;~Movcpm +ENVEND: + +; IOP initial data + + IF HAVIOP +IOPENT: JP IOPEND + JP IOPEND + JP IOPEND + JP IOPEND + JP CONST + JP CONIN + JP CONOUT + JP LIST + JP AUXOUT + JP AUXIN + JP LISTST + JP IOPEND + JP IOPEND + JP IOPEND + JP IOPEND + JP IOPEND + DEFB 'Z3IOP' + DEFB 'DUMMY ' +IOPLEN EQU $-IOPENT +IOPEND EQU IOP+IOPLEN + XOR A + RET + ENDIF ;haviop + +BCODEE EQU $ + IF BANKED +INITCS EQU BCODEE-CBOOT0 ; Size of Banked (B2RAM) part of Init Code + ELSE +INITCS EQU BCODEE-CBOOT ; Size of Complete Init Code in DSEG + ENDIF + +STKSAV: DEFS 2 ; Storage for Pointer while moving +HISAV: DEFS 2 ; Storage for Hi-ALV address + + IF FASTWB + DSEG +BTTBL: DEFS 8 ; Initial WB DMA Block + ENDIF +;======================== End of CBOOT ============================= + \ No newline at end of file diff --git a/Source/BPBIOS/deblock.z80 b/Source/BPBIOS/deblock.z80 index 8e5fb245..a252c18e 100644 --- a/Source/BPBIOS/deblock.z80 +++ b/Source/BPBIOS/deblock.z80 @@ -11,8 +11,8 @@ SETDMA: LD (DMAADR),BC ; Save the address -; CALL PRINT -; DEFB '[SETDMA',']'+80H +; CALL PRTSTRD +; DEFB '[SETDMA',']$' RET ;..... @@ -92,8 +92,14 @@ BREAD: LD A,1 ; Non-zero CSEG WRITE: +; PUSH AF +; LD A,C +; CALL PRTSTRD +; DEFB '[WRITE($' +; CALL PRTHEXBYTE ; CALL PRTSTRD -; DEFB '[WRITE]$' +; DEFB ')]$' +; POP AF IF BANKED CALL BIOSTK @@ -238,10 +244,6 @@ FILHST: CALL FLUSH ; Empty hstbuf if write pending INC HL ; Skip over logical sector LD C,4 ; B=0 from above LDIR ; Set Host DPH and DPB, physical sector - -; LD A,(SEKPDN) ; WW -; LD (HSTPDN),A ; WW - LD A,(RSFLAG) ; Pre-read necessary? OR A CALL NZ,READHST ; Read a sector if so. diff --git a/Source/BPBIOS/deblock.z80.sav b/Source/BPBIOS/deblock.z80.sav new file mode 100644 index 00000000..a32d5c4b --- /dev/null +++ b/Source/BPBIOS/deblock.z80.sav @@ -0,0 +1,317 @@ +;************************************************************************** +; DEBLOCK - Disk Deblocking Buffer Routines. (Based on CP/M Example code) +; +; 1.0 - 3 Jul 92 - First General Release. HFB +; 0.0 - 8 Jul 91 - Initial Test Release. HFB +;************************************************************************** + + CSEG +;..... +; Set DMA address given by registers B and C + +SETDMA: LD (DMAADR),BC ; Save the address + RET + +;..... +; Set track given by BC. While the entire word is saved here, only the +; lower byte is used in Floppy, SCSI and RAM Drivers. + +SETTRK: LD (SEKTRK),BC + RET + +;..... +; Set sector given by register C. This Sector number is the physical number +; of the desired sector and assumes that SECTRAN has been called. This value +; should reflect the Sector Number returned from SECTRAN. While the entire +; word is saved here, only the lower byte is used in Floppy, SCSI and RAM. + +SETSEC: LD (SEKSEC),BC + ;..fall thru to Return.. +;..... +; Home the selected drive + +HOME: RET ; Done by SELDSK + +;..... +; Flush the host buffer to disk if any writes pending + +FLUSH: LD A,(HSTWRT) ; Write pending? + OR A + RET Z ; ..quit if nothing pending + IF BANKED + CALL BIOSTK + CALL GOSYSB + ENDIF + JP WRITEHST ; Write host buffer to disk if so + +;..... +; Sector blocking and de-blocking routines. Drive numbers used in these +; routines are logical drives. + +READ: + IF BANKED + CALL BIOSTK + CALL GOSYSB + JP JBREAD + + COMMON /BANK2/ + ENDIF + +BREAD: LD A,1 ; Non-zero + LD (READOP),A ; Read operation + INC A ; Treat as un-allocated (=wrual) + LD (WRTYPE),A ; Save it + JR ALLOC ; Go to common code + + + CSEG +WRITE: + IF BANKED + CALL BIOSTK + CALL GOSYSB + JP JBWRT + + COMMON /BANK2/ + ENDIF + +BWRT: XOR A + LD (READOP),A ; Write operation + LD A,C ; Get write type from dos + LD (WRTYPE),A ; Save it + CP WRUAL ; Unallocated write? + JR NZ,CHKUNA ; ..jump if Not. check for unallocated sector + +; Write to un-allocated sector, set parameters + + LD A,(UCOUNT) ; Records/allocation group + LD (UNACNT),A ; Unallocated count + LD HL,SEKDSK ; Selcted disk, track & sector for us + LD DE,UNADSK ; (unadsk=sekdsk) + LD BC,4 ; (unatrk=sektrk) + LDIR ; (unasec=cpmsec) + +CHKUNA: LD A,(UNACNT) ; Any unallocated records remaining? + OR A + JR Z,ALLOC ; ..jump if none remain + +; More unallocated records remain. Check for any change. + + DEC A ; Decrement unallocated count + LD (UNACNT),A ; And save it + LD B,4 ; Compare four bytes + LD HL,UNADSK ; Compare Old Disk, Track & Sector + LD DE,SEKDSK ; .to New Disk, Track & Sector +SLP0: LD A,(DE) + CP (HL) ; Same? + JR NZ,ALLOC ; ..jump if not + INC HL ; Else advance to next + INC DE + DJNZ SLP0 ; ..and loop til done + +; Everything matches, anticipate the next sector + + INC (HL) ; Unasec+1 + LD A,(CPMSPT) ; Max sectors per track + CP (HL) ; Compare them + JR NZ,NOOVF ; ..jump if not ready for new track yet + +; Overflow to next track + + LD (HL),0 ; Unasec = 0 + LD HL,(UNATRK) + INC HL + LD (UNATRK),HL ; Unatrk+1 + +; Match found. Pre-read not necessary. + +NOOVF: XOR A ; Indicate no pre-read required + JR ALLOC1 ; ..and jump to common code + +; Not an unallocated record. Requires pre-read + +ALLOC: XOR A ; Clear acc + LD (UNACNT),A ; Start over + INC A +ALLOC1: LD (RSFLAG),A ; Force pre-read if a=1 + +; Read/Write common code + + XOR A ; Clear acc + LD (ERFLAG),A ; Start with no errors + LD A,(SEKSEC) ; Get logical sector number + CALL PHYSEC ; Get physical sector + LD (SEKHST),A ; Physical sector (rel 0) + +; Check host active + + LD HL,HSTACT ; Host active flag + LD A,(HL) ; Get it + LD (HL),1 ; Set it in any case + OR A ; Set flags + JR Z,FILHST ; Flush Host Buffer if needed, then Read + +; Host buffer is active. Same as seek buffer? + + LD B,3 ; Loop compare of Disk and Track + LD HL,HSTDSK ; Compare Old Logical Disk & Trk + LD DE,SEKDSK ; .to New Logical Disk & Trk +SLP1: LD A,(DE) + CP (HL) ; Same? + JR NZ,FILHST ; ..jump if not same + INC HL ; Else advance to next + INC DE + DJNZ SLP1 ; ..loop til done + +; Same track. Same host sector? + + LD A,(SEKHST) ; New physical sector + CP (HL) + JR Z,MATCH ; The same + +; Not a match. + +FILHST: CALL FLUSH ; Empty hstbuf if write pending + +; Fill the host buffer if necessary. + + LD HL,SEKDSK ; Hstdsk=sekdsk + LD DE,HSTDSK ; Hsttrk=sektrk + LD BC,3 + LDIR ; Move it + LD A,(SEKHST) ; Move the Sector too + LD (DE),A + INC DE + INC HL + INC HL ; Skip over logical sector + LD C,4 ; B=0 from above + LDIR ; Set Host DPH and DPB, physical sector + + LD A,(RSFLAG) ; Pre-read necessary? + OR A + CALL NZ,READHST ; Read a sector if so. + XOR A ; Clear acc + LD (HSTWRT),A ; Clear write pending flag + +; We have a match. + +MATCH: LD A,(SECMSK) ; Get the sector mask + LD B,A ; Save it + LD A,(SEKSEC) ; Get new sector + AND B ; Mask off the high bits + RRA + LD H,A ; *128 MSB + LD L,0 + RR L ; And LSB + +; HL now has relative host buffer address of seksec + + IF BANKED + IF INROM + LD A,(TPABNK) ; If bank in ROM, HSTBUF is in TPA + LD C,A + ELSE + LD A,(SYSBNK) ; If bank in RAM, HSTBUF is in System Bank + LD C,A + ENDIF + LD A,(DMABNK) ; Set Read Destination Bank + LD B,A + LD A,(READOP) ; Direction? + OR A + JR NZ,OKBNKS ; ..jump if read + LD A,B ; Else reverse banks + LD B,C + LD C,A +OKBNKS: CALL XMOVE ; Set source & destination banks + ENDIF + LD DE,HSTBUF ; Host buffer address + ADD HL,DE ; Point to the sector + LD DE,(DMAADR) ; User's buffer + LD BC,128 ; Number of bytes to transfer + LD A,(READOP) ; Direction? + OR A ; Set flags + JR NZ,RWMOVE ; ..jump if Read + +; Must be Write. Mark and change direction. + + INC A ; A = 1 + LD (HSTWRT),A ; Set write pending flag + EX DE,HL ; Swap source and destination + +; Move the data + +RWMOVE: CALL MOVE ; Handle possible inter-bank move + +; Data has been moved + + LD A,(WRTYPE) + DEC A ; Directory write? set zero flag + LD A,(ERFLAG) ; In case of error + RET NZ ; ..go home if not a directory write + +; This was a Directory Write. Write it now! + + OR A ; Check error flag + RET NZ ; ..exit here if any error + LD (HSTWRT),A ; Clear write pending flag + CALL WRITEHST ; Write to disk + LD A,(ERFLAG) ; .Load resulting status + RET ; ..return it to caller + +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Blocking/De-blocking variables +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + + DSEG ; These variables must ALWAYS be visable, so put here +;..... +; Parameters relating to what we need in the Buffer Next + +SEKSEC: DEFS 2 ; New skewed logical sector to seek + +; --- The Following Variables MUST be kept in this order --- +SEKDSK: DEFS 1 ; New disk +SEKTRK: DEFS 2 ; New track +CPMSEC: DEFS 2 ; New logical sector +SEKDPB: DEFS 2 ; DPB for host +SEKDPH: DEFS 2 ; DPH for host +SEKHST: DEFS 1 ; New host physical sector to seek +;----------------------------------------------------------- +; Parameters relating to what's in the Buffer Now + +; --- The Following Variables MUST be kept in this order --- +HSTDSK: DEFS 1 ; Current disk +HSTTRK: DEFS 2 ; Current track +HSTSEC: DEFS 1 ; Current physical sector +HSTDPB: DEFS 2 ; DPB for host +HSTDPH: DEFS 2 ; DPH for host + +HSTACT: DEFS 1 ; Host buffer active flag +HSTWRT: DEFS 1 ; Host buffer write pending flag +;----------------------------------------------------------- + +UCOUNT: DEFS 1 ; Number of logical records per alloc block +CPMSPT: DEFS 2 ; Logical sectors per track (byte) +SECSHF: DEFS 1 ; Sector shift factor +SECMSK: DEFS 1 ; Sector mask +DMAADR: DEFS 2 ; User's DMA buffer + + IF BANKED AND NOT INROM + COMMON /B2RAM/ ; These values only used internally, bank them! + ENDIF + +RSFLAG: DEFS 1 ; Read sector flag 0=skip, 1=read +READOP: DEFS 1 ; Read operation flag 1=read, 0=write +WRTYPE: DEFS 1 ; Write type 0=allocated, 1=dir, 2=unallocated + +;..... +; Parameters to track Pre-Read Requirements + +; --- The Following Variables MUST be kept in this order --- +UNADSK: DEFS 1 ; Current disk +UNATRK: DEFS 2 ; Current track +UNASEC: DEFS 1 ; Current record +;----------------------------------------------------------- + +UNACNT: DEFS 1 ; Unallocated record count + +;========================= End of DEBLOCK ================================= + \ No newline at end of file diff --git a/Source/BPBIOS/def-dx.lib b/Source/BPBIOS/def-dx.lib index cac7c336..480af62b 100644 --- a/Source/BPBIOS/def-dx.lib +++ b/Source/BPBIOS/def-dx.lib @@ -11,7 +11,7 @@ ; BIOS Configuration Equates and Macros DATE MACRO - DEFB '17 Jan 14' ; Date of this version + DEFB '30 Aug 01' ; Date of this version ENDM ;--- Basic System and Z-System Section --- @@ -22,24 +22,25 @@ VERS EQU 13H ; Version number in BCD (Hex) (Major/Minor) ELSE VERS EQU 21H ; Version number w/Device Swapping permitted ENDIF -BANKED EQU YES ; Is this a banked BIOS? -ZSDOS2 EQU YES ; Yes = Banked Dos, No = CP/M 2.2 Compatible +BANKED EQU NO ; Is this a banked BIOS? +ZSDOS2 EQU yes ; Yes = Banked Dos, No = CP/M 2.2 Compatible INROM EQU NO ; Alternate bank in ROM? MHZ EQU 18 ; Set to Speed in MHZ (6/9/12/16/18/24) -FASTWB EQU YES ; Yes if restoring CPR from banked RAM +FASTWB EQU yes ; Yes if restoring CPR from banked RAM ; ..No if restoring from Drive A Z3 EQU YES ; Include ZCPR init code? -HAVIOP EQU no ; Include IOP code into Jump table? +HAVIOP EQU yes ; Include IOP code into Jump table? ;--- Memory configuration Section --- (Expansion Memory configured here) -IBMOVS EQU NO ; Yes = Inter-bank Moves allowed (Z180/64180) +IBMOVS EQU YES ; Yes = Inter-bank Moves allowed (Z180/64180) ; No = Include Common RAM transfer buffer + ;--- Character Device Section --- -MORDEV EQU NO ; YES = Include any extra Char Device Drivers +MORDEV EQU yes ; YES = Include any extra Char Device Drivers ; NO = Only use the 4 defined Char Devices -ESCC_B EQU no ; Include ESCC Channel B Driver? +ESCC_B EQU true ; Include ESCC Channel B Driver? ; The following two devices result in non-standard data rates ; with the standard 16.00 MHz crystal in the P112. If a more ; "standard" crystal is used (12.288, 18.432, 24.576 MHz etc) @@ -48,65 +49,62 @@ ESCC_B EQU no ; Include ESCC Channel B Driver? ; assembling Polled or Interrupt-driven buffered input. ; Select the desired option for ASCI0 with the BUFFA0 flag, ; and BUFFA1 for ASCI1. -ASCI_0 EQU false ; Include ASCI0 Driver? +ASCI_0 EQU true ; Include ASCI0 Driver? BUFFA0 EQU false ; Use buffered ASCI0 Input Driver? -ASCI_1 EQU false ; Include ASCI1 Driver? -BUFFA1 EQU false ; Use buffered ASCI1 Input Driver? +ASCI_1 EQU true ; Include ASCI1 Driver? +BUFFA1 EQU true ; Use buffered ASCI1 Input Driver? QSIZE EQU 32 ; size of interrupt typeahead buffers (if used) ; ..must be 2^n with n<8 -RTSCTS EQU no ; Include RTS/CTS code on Serial Outputs? +RTSCTS EQU yes ; Include RTS/CTS code on Serial Outputs? XONOFF EQU no ; Include Xon/Xoff handshaking in Serial lines? ;--- Clock and Time Section --- CLOCK EQU YES ; Include ZSDOS Clock Driver Code? -DS1202 EQU YES ; Use Dallas DS-1202 instead of Interrupt RTC? -CLKSET EQU YES ; Allow DS-1202 Clock Sets? (Error if No) +DS1202 EQU yes ; Use Dallas DS-1202 instead of Interrupt RTC? +CLKSET EQU no ; Allow DS-1202 Clock Sets? (Error if No) TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count) ;--- Floppy Diskette Section --- BIOERM EQU yes ; Print BIOS error messages? CALCSK EQU YES ; Calculate skew table? -AUTOSL EQU NO ; Auto select floppy formats? +AUTOSL EQU YES ; Auto select floppy formats? ; If AUTOSL=True, the next two are active... FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers? -FLOPYH EQU no ; Include "Hi-Density" Floppy Formats? +FLOPYH EQU yes ; Include "Hi-Density" Floppy Formats? FLOPY8 EQU no ; Include 8" Floppy Formats? MORDPB EQU NO ; Include additional Floppy DPB Formats? ;--- RAM Disk Section --- -RAMDSK EQU NO ; YES = Make RAM-Disk Code, NO = No code made +RAMDSK EQU yes ; YES = Make RAM-Disk Code, NO = No code made ;--- Hard Disk Section --- HARDDSK EQU YES ; YES = Add Hard-disk Code, NO = Floppy Only - ; (Pick 1 of 3 options below) -SCSI EQU NO ; YES = Use SCSI Driver -IDE EQU NO ; YES = Use IDE Driver -HDSK EQU YES ; YES = Use SIMH HDSK Driver -HDDMA EQU NO ; Use DMA-Controlled Hard Disk Data Transfers? +IDE EQU no ; YES = Use IDE Driver, NO = Use SCSI +HDDMA EQU yes ; Use DMA-Controlled Hard Disk Data Transfers? ; (DMA not implemented for GIDE) UNIT_0 EQU YES ; Hard Disk Physical Unit 1 -UNIT_1 EQU YES ; Hard Disk Physical Unit 2 -UNIT_2 EQU YES ; Hard Disk Physical Unit 3 +UNIT_1 EQU yes ; Hard Disk Physical Unit 2 +UNIT_2 EQU NO ; Hard Disk Physical Unit 3 ;--- Logical Drive Section --- -DRV_A EQU no ; Set each of these equates for the drive and -DRV_B EQU no ; partition complement of your system. Assume +DRV_A EQU yes ; Set each of these equates for the drive and +DRV_B EQU yes ; partition complement of your system. Assume DRV_C EQU no ; that A-D are Floppies. -DRV_D EQU no +DRV_D EQU yes DRV_E EQU yes ; Assume that E-L and N-P are Hard Disk DRV_F EQU yes ; Partitions DRV_G EQU yes DRV_H EQU yes -DRV_I EQU yes -DRV_J EQU yes -DRV_K EQU yes -DRV_L EQU yes +DRV_I EQU no +DRV_J EQU no +DRV_K EQU no +DRV_L EQU no IF RAMDSK DRV_M EQU yes ; This is Yes for RAM drive ELSE @@ -114,7 +112,7 @@ DRV_M EQU no ; This is for drive if No RAM Drive present ENDIF DRV_N EQU yes DRV_O EQU yes -DRV_P EQU no +DRV_P EQU yes ;========== Configuration Unique Equates (P112) =========== ;>>>>>>>>>>>>>>>>>>>>>>>>>>> W A R N I N G <<<<<<<<<<<<<<<<<<<<<<<<<<<<< @@ -123,7 +121,7 @@ DRV_P EQU no REFRSH EQU NO ; Set to NO for only Static RAM, needed for ; systems with dynamic RAMs. -NOWAIT EQU NO ; Set to NO to use configured Wait States in +NOWAIT EQU no ; Set to NO to use configured Wait States in ; Hard Disk Driver. Yes to eliminate Waits. ;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ @@ -132,13 +130,13 @@ NOWAIT EQU NO ; Set to NO to use configured Wait States in ; increment and is ambiguously addressed occupying 0-1FFFFH. The upper ; memory bounds (BNKU, BNK3 and BNKM) should be set for your configuration. -BNK0 EQU BID_USR ; First TPA Bank (switched in/out) 40000H -BNK1 EQU BID_HB ; Second TPA Bank (Common Bank) 48000H -BNK2 EQU BID_SYS ; System Bank (BIOS, DOS, CPR) 50000H -BNKU EQU 00H ; User Area Bank 58000H +BNK0 EQU 08H ; First TPA Bank (switched in/out) 40000H +BNK1 EQU 09H ; Second TPA Bank (Common Bank) 48000H +BNK2 EQU 0AH ; System Bank (BIOS, DOS, CPR) 50000H +BNKU EQU 0BH ; User Area Bank 58000H ; (set to 0 to disable) -BNK3 EQU BID_RAMD ; First Bank for RAM disk 60000H -BNKM EQU BID_RAMM ; Maximum Bank # F8000H +BNK3 EQU 0CH ; First Bank for RAM disk 60000H +BNKM EQU 1FH ; Maximum Bank # F8000H ; With both on-board RAMs only (MEM1 or MEM2), ; the maximum Bank number is 11 (0BH). @@ -282,18 +280,18 @@ _DMA EQU 0A0H ; Diskette DMA Address ; FDC37C665/6 Serial Port (National 16550 compatible) -_RBR EQU 68H ;R Receiver Buffer -_THR EQU 68H ;W Transmit Holding Reg -_IER EQU 69H ;RW Interrupt-Enable Reg -_IIR EQU 6AH ;R Interrupt Ident. Reg -_FCR EQU 6AH ;W FIFO Control Reg -_LCR EQU 6BH ;RW Line Control Reg -_MCR EQU 6CH ;RW Modem Control Reg -_LSR EQU 6DH ;RW Line Status Reg -_MMSR EQU 6EH ;RW Modem Status Reg -_SCR EQU 6FH ;N/A Scratch Reg. (not avail in XT) -_DDL EQU 68H ;RW Divisor LSB | wih DLAB -_DLM EQU 69H ;RW Divisor MSB | set High +_RBR EQU 98H ;R Receiver Buffer +_THR EQU 98H ;W Transmit Holding Reg +_IER EQU 99H ;RW Interrupt-Enable Reg +_IIR EQU 9AH ;R Interrupt Ident. Reg +_FCR EQU 9AH ;W FIFO Control Reg +_LCR EQU 9BH ;RW Line Control Reg +_MCR EQU 9CH ;RW Modem Control Reg +_LSR EQU 9DH ;RW Line Status Reg +_MMSR EQU 9EH ;RW Modem Status Reg +_SCR EQU 9FH ;N/A Scratch Reg. (not avail in XT) +_DDL EQU 98H ;RW Divisor LSB | wih DLAB +_DLM EQU 99H ;RW Divisor MSB | set High ;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ; Equates for the National DP8490/NCR 5380 Prototype SCSI controller diff --git a/Source/BPBIOS/def-z33.lib b/Source/BPBIOS/def-ww-z33.lib similarity index 94% rename from Source/BPBIOS/def-z33.lib rename to Source/BPBIOS/def-ww-z33.lib index 49a3ba56..307c7ccc 100644 --- a/Source/BPBIOS/def-z33.lib +++ b/Source/BPBIOS/def-ww-z33.lib @@ -14,6 +14,10 @@ DATE MACRO DEFB '17 Jan 14' ; Date of this version ENDM +AUTOCL MACRO + DEFB 8,'ZEX Z33 ',0 ; Autostart command line + ENDM + ;--- Basic System and Z-System Section --- MOVCPM EQU no ; Integrate into MOVCPM "type" loader? @@ -70,7 +74,7 @@ TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count) BIOERM EQU yes ; Print BIOS error messages? CALCSK EQU YES ; Calculate skew table? -AUTOSL EQU NO ; Auto select floppy formats? +AUTOSL EQU YES ; Auto select floppy formats? ; If AUTOSL=True, the next two are active... FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers? FLOPYH EQU no ; Include "Hi-Density" Floppy Formats? @@ -79,7 +83,7 @@ MORDPB EQU NO ; Include additional Floppy DPB Formats? ;--- RAM Disk Section --- -RAMDSK EQU NO ; YES = Make RAM-Disk Code, NO = No code made +RAMDSK EQU YES ; YES = Make RAM-Disk Code, NO = No code made ;--- Hard Disk Section --- @@ -108,13 +112,9 @@ DRV_I EQU yes DRV_J EQU yes DRV_K EQU yes DRV_L EQU yes - IF RAMDSK -DRV_M EQU yes ; This is Yes for RAM drive - ELSE -DRV_M EQU no ; This is for drive if No RAM Drive present - ENDIF +DRV_M EQU RAMDSK ; This is Yes for RAM drive DRV_N EQU yes -DRV_O EQU yes +DRV_O EQU ~RAMDSK ; Use HBIOS RAM disk if BPBIOS RAM disk is not enabled DRV_P EQU no ;========== Configuration Unique Equates (P112) =========== diff --git a/Source/BPBIOS/def-z34bnk.lib b/Source/BPBIOS/def-ww-z33bnk.lib similarity index 94% rename from Source/BPBIOS/def-z34bnk.lib rename to Source/BPBIOS/def-ww-z33bnk.lib index 6ff37488..dc03758b 100644 --- a/Source/BPBIOS/def-z34bnk.lib +++ b/Source/BPBIOS/def-ww-z33bnk.lib @@ -14,6 +14,10 @@ DATE MACRO DEFB '17 Jan 14' ; Date of this version ENDM +AUTOCL MACRO + DEFB 8,'ZEX Z33 ',0 ; Autostart command line + ENDM + ;--- Basic System and Z-System Section --- MOVCPM EQU no ; Integrate into MOVCPM "type" loader? @@ -70,7 +74,7 @@ TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count) BIOERM EQU yes ; Print BIOS error messages? CALCSK EQU YES ; Calculate skew table? -AUTOSL EQU NO ; Auto select floppy formats? +AUTOSL EQU YES ; Auto select floppy formats? ; If AUTOSL=True, the next two are active... FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers? FLOPYH EQU no ; Include "Hi-Density" Floppy Formats? @@ -79,7 +83,7 @@ MORDPB EQU NO ; Include additional Floppy DPB Formats? ;--- RAM Disk Section --- -RAMDSK EQU NO ; YES = Make RAM-Disk Code, NO = No code made +RAMDSK EQU YES ; YES = Make RAM-Disk Code, NO = No code made ;--- Hard Disk Section --- @@ -108,13 +112,9 @@ DRV_I EQU yes DRV_J EQU yes DRV_K EQU yes DRV_L EQU yes - IF RAMDSK -DRV_M EQU yes ; This is Yes for RAM drive - ELSE -DRV_M EQU no ; This is for drive if No RAM Drive present - ENDIF +DRV_M EQU RAMDSK ; This is Yes for RAM drive DRV_N EQU yes -DRV_O EQU yes +DRV_O EQU ~RAMDSK ; Use HBIOS RAM disk if BPBIOS RAM disk is not enabled DRV_P EQU no ;========== Configuration Unique Equates (P112) =========== diff --git a/Source/BPBIOS/def-z34.lib b/Source/BPBIOS/def-ww-z34.lib similarity index 94% rename from Source/BPBIOS/def-z34.lib rename to Source/BPBIOS/def-ww-z34.lib index 4c690f65..df947672 100644 --- a/Source/BPBIOS/def-z34.lib +++ b/Source/BPBIOS/def-ww-z34.lib @@ -14,6 +14,10 @@ DATE MACRO DEFB '17 Jan 14' ; Date of this version ENDM +AUTOCL MACRO + DEFB 8,'ZEX Z34 ',0 ; Autostart command line + ENDM + ;--- Basic System and Z-System Section --- MOVCPM EQU no ; Integrate into MOVCPM "type" loader? @@ -70,7 +74,7 @@ TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count) BIOERM EQU yes ; Print BIOS error messages? CALCSK EQU YES ; Calculate skew table? -AUTOSL EQU NO ; Auto select floppy formats? +AUTOSL EQU YES ; Auto select floppy formats? ; If AUTOSL=True, the next two are active... FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers? FLOPYH EQU no ; Include "Hi-Density" Floppy Formats? @@ -79,7 +83,7 @@ MORDPB EQU NO ; Include additional Floppy DPB Formats? ;--- RAM Disk Section --- -RAMDSK EQU NO ; YES = Make RAM-Disk Code, NO = No code made +RAMDSK EQU YES ; YES = Make RAM-Disk Code, NO = No code made ;--- Hard Disk Section --- @@ -108,13 +112,9 @@ DRV_I EQU yes DRV_J EQU yes DRV_K EQU yes DRV_L EQU yes - IF RAMDSK -DRV_M EQU yes ; This is Yes for RAM drive - ELSE -DRV_M EQU no ; This is for drive if No RAM Drive present - ENDIF +DRV_M EQU RAMDSK ; This is Yes for RAM drive DRV_N EQU yes -DRV_O EQU yes +DRV_O EQU ~RAMDSK ; Use HBIOS RAM disk if BPBIOS RAM disk is not enabled DRV_P EQU no ;========== Configuration Unique Equates (P112) =========== diff --git a/Source/BPBIOS/def-z33bnk.lib b/Source/BPBIOS/def-ww-z34bnk.lib similarity index 94% rename from Source/BPBIOS/def-z33bnk.lib rename to Source/BPBIOS/def-ww-z34bnk.lib index 6ff37488..e80eb05a 100644 --- a/Source/BPBIOS/def-z33bnk.lib +++ b/Source/BPBIOS/def-ww-z34bnk.lib @@ -14,6 +14,10 @@ DATE MACRO DEFB '17 Jan 14' ; Date of this version ENDM +AUTOCL MACRO + DEFB 8,'ZEX Z34 ',0 ; Autostart command line + ENDM + ;--- Basic System and Z-System Section --- MOVCPM EQU no ; Integrate into MOVCPM "type" loader? @@ -70,7 +74,7 @@ TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count) BIOERM EQU yes ; Print BIOS error messages? CALCSK EQU YES ; Calculate skew table? -AUTOSL EQU NO ; Auto select floppy formats? +AUTOSL EQU YES ; Auto select floppy formats? ; If AUTOSL=True, the next two are active... FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers? FLOPYH EQU no ; Include "Hi-Density" Floppy Formats? @@ -79,7 +83,7 @@ MORDPB EQU NO ; Include additional Floppy DPB Formats? ;--- RAM Disk Section --- -RAMDSK EQU NO ; YES = Make RAM-Disk Code, NO = No code made +RAMDSK EQU YES ; YES = Make RAM-Disk Code, NO = No code made ;--- Hard Disk Section --- @@ -108,13 +112,9 @@ DRV_I EQU yes DRV_J EQU yes DRV_K EQU yes DRV_L EQU yes - IF RAMDSK -DRV_M EQU yes ; This is Yes for RAM drive - ELSE -DRV_M EQU no ; This is for drive if No RAM Drive present - ENDIF +DRV_M EQU RAMDSK ; This is Yes for RAM drive DRV_N EQU yes -DRV_O EQU yes +DRV_O EQU ~RAMDSK ; Use HBIOS RAM disk if BPBIOS RAM disk is not enabled DRV_P EQU no ;========== Configuration Unique Equates (P112) =========== diff --git a/Source/BPBIOS/def-z41.lib b/Source/BPBIOS/def-ww-z41.lib similarity index 94% rename from Source/BPBIOS/def-z41.lib rename to Source/BPBIOS/def-ww-z41.lib index cac7c336..f95a8ded 100644 --- a/Source/BPBIOS/def-z41.lib +++ b/Source/BPBIOS/def-ww-z41.lib @@ -14,6 +14,10 @@ DATE MACRO DEFB '17 Jan 14' ; Date of this version ENDM +AUTOCL MACRO + DEFB 8,'ZEX Z41 ',0 ; Autostart command line + ENDM + ;--- Basic System and Z-System Section --- MOVCPM EQU no ; Integrate into MOVCPM "type" loader? @@ -69,7 +73,7 @@ TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count) BIOERM EQU yes ; Print BIOS error messages? CALCSK EQU YES ; Calculate skew table? -AUTOSL EQU NO ; Auto select floppy formats? +AUTOSL EQU YES ; Auto select floppy formats? ; If AUTOSL=True, the next two are active... FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers? FLOPYH EQU no ; Include "Hi-Density" Floppy Formats? @@ -78,7 +82,7 @@ MORDPB EQU NO ; Include additional Floppy DPB Formats? ;--- RAM Disk Section --- -RAMDSK EQU NO ; YES = Make RAM-Disk Code, NO = No code made +RAMDSK EQU YES ; YES = Make RAM-Disk Code, NO = No code made ;--- Hard Disk Section --- @@ -107,13 +111,9 @@ DRV_I EQU yes DRV_J EQU yes DRV_K EQU yes DRV_L EQU yes - IF RAMDSK -DRV_M EQU yes ; This is Yes for RAM drive - ELSE -DRV_M EQU no ; This is for drive if No RAM Drive present - ENDIF +DRV_M EQU RAMDSK ; This is Yes for RAM drive DRV_N EQU yes -DRV_O EQU yes +DRV_O EQU ~RAMDSK ; Use HBIOS RAM disk if BPBIOS RAM disk is not enabled DRV_P EQU no ;========== Configuration Unique Equates (P112) =========== diff --git a/Source/BPBIOS/def-ww.lib b/Source/BPBIOS/def-ww.lib index 3d5a7fc8..f95a8ded 100644 --- a/Source/BPBIOS/def-ww.lib +++ b/Source/BPBIOS/def-ww.lib @@ -1,80 +1,369 @@ ;:::::::::::::::::::::::::::::::::::::::::::::::********************** ; B/P BIOS Configuration and Equate File. ** System Dependant ** ; - D-X Designs Pty Ltd P112 CPU Board - ********************** -; HBIOS specific customizations +; Tailor your system here. +; +; 30 Aug 01 - Cleaned up for GPL release. HFB +; 11 May 97 - Added GIDE and adjusted HD equates. HFB +; 5 Jan 97 - Reformatted to Standard. HFB +; 10 Jun 96 - Initial Test Release. HFB ;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: ; BIOS Configuration Equates and Macros -; -; NOTE: Must make sure settings below match hardware and -; HBIOS configuration. -; -HBIOS EQU YES ; Use HBIOS functions -INTPXY EQU YES ; Internal HBIOS Proxy -HBLOC EQU 0FE00H ; Location of HBIOS proxy (if used) -; -; Set exactly one of the following to YES to specify platform -; -N8VEM EQU YES -ZETA EQU NO -N8 EQU NO -MK4 EQU NO -; -; Set either the following to YES (or both to NO for no clock code) -; -SIMHCLK EQU NO ; Direct SIMH clock access -HBCLK EQU YES ; HBIOS clock driver -; -; Set HB_HDDEV to appropriate hard disk driver -; -HB_HDDEV EQU HBDEV_HDSK ; SIMH HDSK Driver -;HB_HDDEV EQU HBDEV_IDE ; IDE Driver -;HB_HDDEV EQU HBDEV_SD ; SD Card Driver -; -; Set HB_MDDEV to appropriate memory disk driver -; -HB_MDDEV EQU HBDEV_MD ; Memory Disk Driver -; -; RAM/ROM disk sizes expressed as count of 2K blocks -; -HB_RAMBLKS EQU 192 ; 512K - 128K reserved / 2K per block -HB_ROMBLKS EQU 192 ; 512K - 128K reserved / 2K per block -;HB_ROMBLKS EQU 448 ; 1024K - 128K reserved / 2K per block -; -; Layout of RAM banks -; - IF N8VEM OR ZETA -BID_RAMD EQU 80H -BID_RAMM EQU 8BH -BID_SYS EQU 8CH -BID_HB EQU 8DH -BID_USR EQU 8EH -BID_COM EQU 8FH - ENDIF - IF N8 -BID_RAMD EQU 80H -BID_RAMM EQU 9BH -BID_SYS EQU 9CH -BID_HB EQU 9DH -BID_USR EQU 9EH -BID_COM EQU 9FH - ENDIF - IF MK4 -BID_RAMD EQU 10H -BID_RAMM EQU 1BH -BID_SYS EQU 1CH -BID_HB EQU 1DH -BID_USR EQU 1EH -BID_COM EQU 1FH - ENDIF -; - IF N8 OR MK4 -HB_IODEV EQU HBCIO_ASCI - ELSE -HB_IODEV EQU HBCIO_UART - ENDIF -; - IF INTPXY -MEMTOP EQU 0FFDFH ; Reserve memory above this for HBIOS - ELSE -MEMTOP EQU HBLOC - 1 ; Reserve memory above this for HBIOS - ENDIF + +DATE MACRO + DEFB '17 Jan 14' ; Date of this version + ENDM + +AUTOCL MACRO + DEFB 8,'ZEX Z41 ',0 ; Autostart command line + ENDM + +;--- Basic System and Z-System Section --- + +MOVCPM EQU no ; Integrate into MOVCPM "type" loader? + IF MOVCPM +VERS EQU 13H ; Version number in BCD (Hex) (Major/Minor) + ELSE +VERS EQU 21H ; Version number w/Device Swapping permitted + ENDIF +BANKED EQU YES ; Is this a banked BIOS? +ZSDOS2 EQU YES ; Yes = Banked Dos, No = CP/M 2.2 Compatible +INROM EQU NO ; Alternate bank in ROM? +MHZ EQU 18 ; Set to Speed in MHZ (6/9/12/16/18/24) +FASTWB EQU YES ; Yes if restoring CPR from banked RAM + ; ..No if restoring from Drive A +Z3 EQU YES ; Include ZCPR init code? +HAVIOP EQU no ; Include IOP code into Jump table? + +;--- Memory configuration Section --- (Expansion Memory configured here) + +IBMOVS EQU NO ; Yes = Inter-bank Moves allowed (Z180/64180) + ; No = Include Common RAM transfer buffer +;--- Character Device Section --- + +MORDEV EQU NO ; YES = Include any extra Char Device Drivers + ; NO = Only use the 4 defined Char Devices +ESCC_B EQU no ; Include ESCC Channel B Driver? + ; The following two devices result in non-standard data rates + ; with the standard 16.00 MHz crystal in the P112. If a more + ; "standard" crystal is used (12.288, 18.432, 24.576 MHz etc) + ; is used, the ports become usable. + ; Driver code for ASCI0 and ASCI1 includes an option for + ; assembling Polled or Interrupt-driven buffered input. + ; Select the desired option for ASCI0 with the BUFFA0 flag, + ; and BUFFA1 for ASCI1. +ASCI_0 EQU false ; Include ASCI0 Driver? +BUFFA0 EQU false ; Use buffered ASCI0 Input Driver? +ASCI_1 EQU false ; Include ASCI1 Driver? +BUFFA1 EQU false ; Use buffered ASCI1 Input Driver? + +QSIZE EQU 32 ; size of interrupt typeahead buffers (if used) + ; ..must be 2^n with n<8 +RTSCTS EQU no ; Include RTS/CTS code on Serial Outputs? +XONOFF EQU no ; Include Xon/Xoff handshaking in Serial lines? + +;--- Clock and Time Section --- + +CLOCK EQU YES ; Include ZSDOS Clock Driver Code? +DS1202 EQU YES ; Use Dallas DS-1202 instead of Interrupt RTC? +CLKSET EQU YES ; Allow DS-1202 Clock Sets? (Error if No) +TICTOC EQU NO ;== NOT USED IN P112 ("heartbeat" count) + +;--- Floppy Diskette Section --- + +BIOERM EQU yes ; Print BIOS error messages? +CALCSK EQU YES ; Calculate skew table? +AUTOSL EQU YES ; Auto select floppy formats? + ; If AUTOSL=True, the next two are active... +FDDMA EQU no ; Use DMA Control for Floppy Drive Transfers? +FLOPYH EQU no ; Include "Hi-Density" Floppy Formats? +FLOPY8 EQU no ; Include 8" Floppy Formats? +MORDPB EQU NO ; Include additional Floppy DPB Formats? + +;--- RAM Disk Section --- + +RAMDSK EQU YES ; YES = Make RAM-Disk Code, NO = No code made + +;--- Hard Disk Section --- + +HARDDSK EQU YES ; YES = Add Hard-disk Code, NO = Floppy Only + ; (Pick 1 of 3 options below) +SCSI EQU NO ; YES = Use SCSI Driver +IDE EQU NO ; YES = Use IDE Driver +HDSK EQU YES ; YES = Use SIMH HDSK Driver +HDDMA EQU NO ; Use DMA-Controlled Hard Disk Data Transfers? + ; (DMA not implemented for GIDE) +UNIT_0 EQU YES ; Hard Disk Physical Unit 1 +UNIT_1 EQU YES ; Hard Disk Physical Unit 2 +UNIT_2 EQU YES ; Hard Disk Physical Unit 3 + +;--- Logical Drive Section --- + +DRV_A EQU no ; Set each of these equates for the drive and +DRV_B EQU no ; partition complement of your system. Assume +DRV_C EQU no ; that A-D are Floppies. +DRV_D EQU no +DRV_E EQU yes ; Assume that E-L and N-P are Hard Disk +DRV_F EQU yes ; Partitions +DRV_G EQU yes +DRV_H EQU yes +DRV_I EQU yes +DRV_J EQU yes +DRV_K EQU yes +DRV_L EQU yes +DRV_M EQU RAMDSK ; This is Yes for RAM drive +DRV_N EQU yes +DRV_O EQU ~RAMDSK ; Use HBIOS RAM disk if BPBIOS RAM disk is not enabled +DRV_P EQU no + +;========== Configuration Unique Equates (P112) =========== +;>>>>>>>>>>>>>>>>>>>>>>>>>>> W A R N I N G <<<<<<<<<<<<<<<<<<<<<<<<<<<<< +;>>> Do NOT Alter these unless you KNOW what you're doing <<< +;>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>><<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< + +REFRSH EQU NO ; Set to NO for only Static RAM, needed for + ; systems with dynamic RAMs. +NOWAIT EQU NO ; Set to NO to use configured Wait States in + ; Hard Disk Driver. Yes to eliminate Waits. + +;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +; For Z-180/HD64180 systems, The Bank numbers should reflect Physical +; memory in 32k increments. In P112, the ROM occupies the first 32k +; increment and is ambiguously addressed occupying 0-1FFFFH. The upper +; memory bounds (BNKU, BNK3 and BNKM) should be set for your configuration. + +BNK0 EQU BID_USR ; First TPA Bank (switched in/out) 40000H +BNK1 EQU BID_HB ; Second TPA Bank (Common Bank) 48000H +BNK2 EQU BID_SYS ; System Bank (BIOS, DOS, CPR) 50000H +BNKU EQU 00H ; User Area Bank 58000H + ; (set to 0 to disable) +BNK3 EQU BID_RAMD ; First Bank for RAM disk 60000H +BNKM EQU BID_RAMM ; Maximum Bank # F8000H + ; With both on-board RAMs only (MEM1 or MEM2), + ; the maximum Bank number is 11 (0BH). + +;=========== CPU-dependent Equates, Zilog Z-180/Hitachi HD64180 ========== + +CNTLA0 EQU 00H ; Control Port ASCI 0 +CNTLA1 EQU 01H ; Control Port ASCI 1 +STAT0 EQU 04H ; Serial port 0 Status +STAT1 EQU 05H ; Serial port 1 Status +TDR0 EQU 06H ; Serial port 0 Output Data +TDR1 EQU 07H ; Serial port 1 Output Data +RDR0 EQU 08H ; Serial port 0 Input Data +RDR1 EQU 09H ; Serial Port 1 Input Data +CNTR EQU 0AH ; HD64180 Counter port +TMDR0L EQU 0CH ; HD64180 DMA channel reg (low) +TMDR0H EQU 0DH ; HD64180 DMA channel reg (hi) +RLDR0L EQU 0EH ; CTC0 Reload Count, Low +RLDR0H EQU 0FH ; CTC0 Reload Count, High +TCR EQU 10H ; Interrupt Control Register +TMDR1L EQU 14H ; Timer Data Reg Ch1 (Low) +TMDR1H EQU 15H ; Timer Data Reg Ch1 (High) +RLDR1L EQU 16H ; Timer Reload Reg Ch1 (Low) +RLDR1H EQU 17H ; Timer Reload Reg Ch1 (High) +FRC EQU 18H ; Free-Running Counter +CCR EQU 1FH ; CPU Control Register (ZS8180/Z80182) +SAR0L EQU 20H ; DMA Channel 0 Register start (8 ports) +MAR1L EQU 28H ; DMA Channel 1 Register start (8 ports) +DSTAT EQU 30H ; DMA Status/Control port +DMODE EQU 31H ; DMA Mode Control port +DCNTL EQU 32H ; DMA/WAIT Control Register +IL EQU 33H ; Interrupt Segment Register +ITC EQU 34H ; Interrupt/Trap Control Register +RCR EQU 36H ; HD64180 Refresh Control register +CBR EQU 38H ; MMU Common Base Register +BBR EQU 39H ; MMU Bank Base Register +CBAR EQU 3AH ; MMU Common/Bank Area Register +OMCR EQU 3EH ; Operation Mode Control Reg +ICR EQU 3FH ; I/O Control Register + +; Some bit definitions used with the Z-180 on-chip peripherals: + +TDRE EQU 02H ; ACSI Transmitter Buffer Empty +RDRF EQU 80H ; ACSI Received Character available + +;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +; Extended Features of Z80182 for P112 + +WSGCS EQU 0D8H ; Wait-State Generator CS +ENH182 EQU 0D9H ; Z80182 Enhancements Register +PINMUX EQU 0DFH ; Interrupt Edge/Pin Mux Register +RAMUBR EQU 0E6H ; RAM End Boundary +RAMLBR EQU 0E7H ; RAM Start Boundary +ROMBR EQU 0E8H ; ROM Boundary +FIFOCTL EQU 0E9H ; FIFO Control Register +RTOTC EQU 0EAH ; RX Time-Out Time Constant +TTOTC EQU 0EBH ; TX Time-Out Time Constant +FCR EQU 0ECH ; FIFO Register +SCR EQU 0EFH ; System Pin Control +RBR EQU 0F0H ; MIMIC RX Buffer Register (R) +THR EQU 0F0H ; MIMIN TX Holding Register (W) +IER EQU 0F1H ; Interrupt Enable Register +LCR EQU 0F3H ; Line Control Register +MCR EQU 0F4H ; Modem Control Register +LSR EQU 0F5H ; Line Status Register +MDMSR EQU 0F6H ; Modem Status Register +MSCR EQU 0F7H ; MIMIC Scratch Register +DLATL EQU 0F8H ; Divisor Latch (Low) +DLATM EQU 0F9H ; Divisor Latch (High) +TTCR EQU 0FAH ; TX Time Constant +RTCR EQU 0FBH ; RX Time Constant +IVEC EQU 0FCH ; MIMIC Interrupt Vector +MIMIE EQU 0FDH ; MIMIC Interrupt Enable Register +IUSIP EQU 0FEH ; MIMIC Interrupt Under-Service Register +MMCR EQU 0FFH ; MIMIC Master Control Register + +; Z80182 PIO Registers + +DDRA EQU 0EDH ; Data Direction Register A +DRA EQU 0EEH ; Port A Data +DDRB EQU 0E4H ; Data Direction Register B +DRB EQU 0E5H ; Data B Data +DDRC EQU 0DDH ; Data Direction Register C +DRC EQU 0DEH ; Data C Data + +;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +; ESCC Registers on Z80182 + +SCCACNT EQU 0E0H ; ESCC Control Channel A +SCCAD EQU 0E1H ; ESCC Data Channel A +SCCBCNT EQU 0E2H ; ESCC Control Channel B +SCCBD EQU 0E3H ; ESCC Data Channel B + +; [E]SCC Internal Register Definitions + +RR0 EQU 00H +RR1 EQU 01H +RR2 EQU 02H +RR3 EQU 03H +RR6 EQU 06H +RR7 EQU 07H +RR10 EQU 0AH +RR12 EQU 0CH +RR13 EQU 0DH +RR15 EQU 0FH + +WR0 EQU 00H +WR1 EQU 01H +WR2 EQU 02H +WR3 EQU 03H +WR4 EQU 04H +WR5 EQU 05H +WR6 EQU 06H +WR7 EQU 07H +WR9 EQU 09H +WR10 EQU 0AH +WR11 EQU 0BH +WR12 EQU 0CH +WR13 EQU 0DH +WR14 EQU 0EH +WR15 EQU 0FH + +; FDC37C665/6 Parallel Port in Standard AT Mode + +DPORT EQU 8CH ; Data Port +SPORT EQU 8DH ; Status Port +CPORT EQU 8EH ; Control Port + +; FDC37C665/6 Configuration Control (access internal registers) + +CFCNTL EQU 90H ; Configuration control port +CFDATA EQU 91H ; Configuration data port + +; FDC37C665/6 Floppy Controller on P112 (Intel 80277 compatible) + +DCR EQU 92H ; Drive Control Register (Digital Output) +MSR EQU 94H ; Main Status Register +DR EQU 95H ; Data/Command Register +DRR EQU 97H ; Data Rate Register/Disk Changed Bit in B7 + +_DMA EQU 0A0H ; Diskette DMA Address + +; FDC37C665/6 Serial Port (National 16550 compatible) + +_RBR EQU 68H ;R Receiver Buffer +_THR EQU 68H ;W Transmit Holding Reg +_IER EQU 69H ;RW Interrupt-Enable Reg +_IIR EQU 6AH ;R Interrupt Ident. Reg +_FCR EQU 6AH ;W FIFO Control Reg +_LCR EQU 6BH ;RW Line Control Reg +_MCR EQU 6CH ;RW Modem Control Reg +_LSR EQU 6DH ;RW Line Status Reg +_MMSR EQU 6EH ;RW Modem Status Reg +_SCR EQU 6FH ;N/A Scratch Reg. (not avail in XT) +_DDL EQU 68H ;RW Divisor LSB | wih DLAB +_DLM EQU 69H ;RW Divisor MSB | set High + +;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +; Equates for the National DP8490/NCR 5380 Prototype SCSI controller + + IF HARDDSK +NCR EQU 40H ; Base of NCR 5380 + +; 5380 Chip Registers + +NCRDAT EQU NCR ; Current SCSI Data (Read) + ; Output Data Register (Write) +NCRCMD EQU NCR+1 ; Initiator Command Register (Read/Write) +NCRMOD EQU NCR+2 ; Mode Register (Read/Write) +NCRTGT EQU NCR+3 ; Target Command Register (Read/Write) +NCRBUS EQU NCR+4 ; Current SCSI Bus Status (Read) +NCRST EQU NCR+5 ; Bus & Status Register (Read) + ; Start DMA Send (Write) +NCRINT EQU NCR+7 ; Reset Parity/Interrupt (Read) + ; Start DMA Initiator Receive (Write) +DMAACK EQU NCR+8 ; SCSI Dack IO Port (Read/Write) + +; Bit Assignments for NCR 5380 Ports as indicated + +B_ARST EQU 10000000B ; Assert *RST (NCRCMD) +B_AACK EQU 00010000B ; Assert *ACK (NCRCMD) +B_ASEL EQU 00000100B ; Assert *SEL (NCRCMD) +B_ABUS EQU 00000001B ; Assert *Data Bus (NCRCMD) + +B_BSY EQU 01000000B ; *Busy (NCRBUS) +B_REQ EQU 00100000B ; *Request (NCRBUS) +B_MSG EQU 00010000B ; *Message (NCRBUS) +B_CD EQU 00001000B ; *Command/Data (NCRBUS) +B_IO EQU 00000100B ; *I/O (NCRBUS) +B_SEL EQU 00000010B ; *Select (NCRBUS) + +B_PHAS EQU 00001000B ; Phase Match (NCRST) +B_BBSY EQU 00000100B ; Bus Busy (NCRST) + +B_MBSY EQU 00000100B ; Monitor Busy Flag (NCRMOD) +B_DMA EQU 00000010B ; DMA Mode of transfer (NCRMOD) + ENDIF ;harddsk + +;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +; Equates reflecting GIDE Base address from Address Jumpers (if GIDE added) +; Set the base GIDE equate to the jumper setting on the GIDE board. + + IF IDE +GIDE EQU 50H ; Set base of 16 byte address range + +IDEDOR EQU GIDE+6 ; Digital Output Register +IDEDat EQU GIDE+8 ; IDE Data Register (16-bit wide) +IDEErr EQU GIDE+9 ; IDE Error Register +IDESCnt EQU GIDE+0AH ; IDE Sector Count Register +IDESNum EQU GIDE+0BH ; IDE Sector Number Register +IDECLo EQU GIDE+0CH ; IDE Cylinder Number (Low) +IDECHi EQU GIDE+0DH ; IDE Cylinter Number (High) +IDESDH EQU GIDE+0EH ; IDE S-Drive-Head Register +IDECmd EQU GIDE+0FH ; IDE Command/Status Register + +CMDHOM EQU 10H ; Home Drive Heads +CMDRD EQU 20H ; Read Sector Command (w/retry) +CMDWR EQU 30H ; Write Sector Command (w/retry) +CMDVER EQU 40H ; Verify Sector(s) Command (w/retry) +CMDFMT EQU 50H ; Format Track Command +CMDDIAG EQU 90H ; Execute Diagnostics Command +CMDINIT EQU 91H ; Initialize Drive Params Command +CMDPW0 EQU 0E0H ; Low Range of Power Control Commands +CMDPW3 EQU 0E3H ; High Range of Power Control Commands +CMDPWQ EQU 0E5H ; Power Status Query Command +CMDID EQU 0ECH ; Read Drive Ident Data Command + ENDIF ;ide +;=================== End Unique Equates ======================= + \ No newline at end of file diff --git a/Source/BPBIOS/dpbhd-dx.lib b/Source/BPBIOS/dpbhd-dx.lib index 51d25901..cf3a28dd 100644 --- a/Source/BPBIOS/dpbhd-dx.lib +++ b/Source/BPBIOS/dpbhd-dx.lib @@ -59,7 +59,7 @@ ; sectors per track DEFB 0 ; Physical tracks/side (No Meaning in HD) -HSIZ0 EQU 2048 ; # of blocks in first Partition (498 trks) +HSIZ0 EQU 996 ; # of blocks in first Partition (498 trks) ; SQ-312 SQ312A SQ-306 ST-225 ST125N ; ------ ------ ------ ------ ------ @@ -68,10 +68,10 @@ DPB50: DEFW 64 ; Sctrs/Trk 64 64 64 64 64 DEFB 31 ; Block Mask 31 31 31 31 31 DEFB 1 ; Extent Mask 1 1 1 1 1 DEFW HSIZ0-1 ; Disk Size-1 683 995 495 995 995 - DEFW 511 ; Dir Max 767 767 767 767 767 - DEFB 0F0H,0 ; Alloc 0,1 0FC 0FC 0FC 0FC 0FC + DEFW 1023 ; Dir Max 767 767 767 767 767 + DEFB 0FFH,0 ; Alloc 0,1 0FC 0FC 0FC 0FC 0FC DEFW 0 ; Check Size 0 0 0 0 0 - DEFW 2096 ; Trk Offset 2 2 2 2 2 + DEFW 2 ; Trk Offset 2 2 2 2 2 ENDIF ;..... diff --git a/Source/BPBIOS/dpbm-ww.lib b/Source/BPBIOS/dpbm-ww.lib new file mode 100644 index 00000000..1da3be8d --- /dev/null +++ b/Source/BPBIOS/dpbm-ww.lib @@ -0,0 +1,40 @@ +;=========== RAM Disk Parameter Block =============************************ +; - D-X Designs Pty Ltd P112 - ** Hardware Dependent ** +; ************************ +; 1.1 - 28 Aug 01 - Cleaned up for GPL release. HFB +; 1.0 - 10 Jun 96 - Initial Release for P112 derived from YASBEC. HFB +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; The B/P BIOS DPB's contain prefix information that provide data on the +; logical format. This table contains only DPB Data on a RAM Disk. + +; Format Type Bytes 0 and 1 are configured in the same way as Hard Disks. +; See DPBHD-xx.LIB and DPB.LIB files for descriptions of these two bytes. + +; NOTE: No Skew Table needed since RAM Disk Format is locked and not needed + +;..... +; P112 RAM Disk Format assuming 32k for a single System bank + + DEFB 'D-X Desig','n'+80H ; Id - 10 bytes + DEFB FIXDSK ; Format type byte 0 + DEFB SPEED8+SEC128+ALC2K ; Format type byte 1 + DEFB -1 ; Skew factor (== Only the +/- sign used) + DEFB 0 ; Starting sector number + DEFB 32 ; Physical # sectors/trk (32=4k per 'track') + DEFB 0 ; Physical tracks/side (No Meaning in HD) + +MSIZ EQU HB_RAMBLKS ; # of blocks in Drive (by Memory/Block size) + ; 2x128k = 80 (160k) - 64 (128k) w/User Bank + ; 1x512k = 192 (384k) - 176 (352k) w/User Bank + ; 2x512k = 448 (896k) - 432 (864k) w/User Bank +DPBRAM: DEFW 32 ; Sectors/Track + DEFB 4 ; Block Shift Factor (2k per block) + DEFB 0FH ; Block Mask + DEFB 1 ; Extent Mask + DEFW MSIZ-1 ; Disk Size-1 256 kB 512 kB 1024 kB + DEFW 128 - 1 ; Dir Max -or- 64 128 256 + DEFB 0C0H, 00 ; Alloc 0, 1 80H,0 0C0H,0 0F0H,0 + DEFW 0000 ; Check Size + DEFW 0000 ; Trk Offset from beginning of Ram Bank base + +;==================== End of RAM Disk DPB ==================== diff --git a/Source/BPBIOS/dpbram.lib b/Source/BPBIOS/dpbram.lib index 762b32a4..8ccac9d9 100644 --- a/Source/BPBIOS/dpbram.lib +++ b/Source/BPBIOS/dpbram.lib @@ -68,7 +68,7 @@ SPEED8 EQU 10000000B ; When calculating Skew for Read/Write, a Negative Number indicates the ; Sectors are to be Read without Skew Translation. -;WW CSEG + CSEG ;..... ; DS/QD AMPRO/SB180/ON diff --git a/Source/BPBIOS/dph.sav b/Source/BPBIOS/dph.sav new file mode 100644 index 00000000..58b0af34 --- /dev/null +++ b/Source/BPBIOS/dph.sav @@ -0,0 +1,274 @@ +;:::::::::::::::::::::::::::::::::::::::::::::::***************************** +; DPH Pointer Table ** Configuration Dependant ** +; (This table may be in Banked Memory) ***************************** +; +; All access to DPH's are done through this table. A Zero in this table +; indicates the logical drive does Not exist. The table is indexed by logical +; drive (e.g. A-P). To swap logical drives, exchange entries in this table. +; +; 1.0 - 31 Aug 92 - General Release. HFB +; 0.1 - 3 Jan 92 - Initial Release. HFB +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + + CSEG + +DPHTBL: + IF DRV_A + DEFW DPH$00 ; Dph for drive A (Floppy) + ELSE + DEFW 00 + ENDIF + IF DRV_B + DEFW DPH$01 ; Dph for drive B (Floppy) + ELSE + DEFW 00 + ENDIF + IF DRV_C + DEFW DPH$02 ; Dph for drive C (Floppy) + ELSE + DEFW 00 + ENDIF + IF DRV_D + DEFW DPH$03 ; Dph for drive D (Floppy) + ELSE + DEFW 0 ; Dph for drive D + ENDIF + IF DRV_E AND HARDDSK + DEFW DPH$50 ; Dph for Hard drive Partition E + ELSE + DEFW 00 + ENDIF + IF DRV_F AND HARDDSK + DEFW DPH$51 ; Dph for Hard drive Partition F + ELSE + DEFW 00 + ENDIF + IF DRV_G AND HARDDSK + DEFW DPH$52 ; Dph for Hard drive Partition G + ELSE + DEFW 00 + ENDIF + IF DRV_H AND HARDDSK + DEFW DPH$53 ; Dph for Hard drive Partition H + ELSE + DEFW 00 + ENDIF + IF DRV_I AND HARDDSK + DEFW DPH$54 ; Dph for Hard drive Partition I + ELSE + DEFW 00 + ENDIF + IF DRV_J AND HARDDSK + DEFW DPH$55 ; Dph for Hard drive Partition J + ELSE + DEFW 00 + ENDIF + IF DRV_K AND HARDDSK + DEFW DPH$56 ; Dph for Hard drive Partition K + ELSE + DEFW 00 + ENDIF + IF DRV_L AND HARDDSK + DEFW DPH$57 ; Dph for Hard drive Partition L + ELSE + DEFW 00 + ENDIF + IF DRV_M AND RAMDSK + DEFW DPH$90 ; Dph for RAM Drive M in DPHM-xx.Z80 + ELSE + DEFW 00 ; Dph for drive M + ENDIF ;ramdsk + IF DRV_N AND HARDDSK + DEFW DPH$58 ; Dph for Hard drive Partition N + ELSE + DEFW 00 + ENDIF + IF DRV_O AND HARDDSK + DEFW DPH$59 ; Dph for Hard drive Partition O + ELSE + DEFW 00 + ENDIF + IF DRV_P AND HARDDSK + DEFW DPH$60 ; Dph for Hard drive Partition P + ELSE + DEFW 00 + ENDIF + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Disk Parameter Headers (DPH) for Drives MUST be in Common Memory +; +; The DPH's used have a two byte prefix which indicates the Physical +; Unit # and the Driver Number for the Drive. The Physical Unit Number +; is Controller specific, while the driver number is used to select +; which service routines are to be called to satisfy service requests. +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +; Drive Type Byte +; --------------- +; D D D D D D D D +; 7 6 5 4 3 2 1 0 +; | | | | | +-+-+--- Disk Size: 000=Fixed Disk, 001=8", 010=5.25", 011=3.5" +; | | | | +--------- 0 = Single Sided, 1 = Double Sided +; | | | +----------- 0 = Normal Step, 1 = Double-Step Drive +; | | +------------- 0 = Motor Always On, 1 = Drive Motor Control needed +; | +--------------- 0 = Max Speed is Normal 5.25" (300rpm) +; | 1 = 8" and Hi-Density 5.25" Max Speed (360rpm) +; +----------------- 0 = Double-Density, 1 = Single-Density + +FIXDSK EQU 00000000B +DSK8 EQU 00000001B +DSK5 EQU 00000010B +DSK3 EQU 00000011B +SS EQU 00000000B +DS EQU 00001000B +DD EQU 00000000B +SD EQU 10000000B +DVSPDH EQU 01000000B +DVSPDL EQU 00000000B +MTR EQU 00100000B +NOMTR EQU 00000000B +DBLSTP EQU 00010000B +NODBLS EQU 00000000B + + CSEG + + IF DRV_A +XDPH00: DB LOCKF ; Format lock flag + DB DSK5+DS+DD+DVSPDL+MTR ; Disk drive type + DB 1 ; Driver id + DB 0 ; Physical drive number +DPH$00: DW 0 ; Skew table pointer + DW 0,0,0 ; Scratch area + DW DIRBUF ; Directory buffer pointer + IF AUTOSL ; For autoselection, we need RAM Space + DEFW DPB$00+DPHDSZ ; Ram area for DPB #0 + ELSE + DW DPBRA ; Pointer to current DPB for Drive 0 + ENDIF + DW CHK$00 ; Wacd for drive 00 + DW ALV$00 ; Alloc vector for 00 + +XDPHSZ EQU $-XDPH00 ; Calc for xdph size +XDPHOF EQU DPH$00-XDPH00 ; Offset from xdph to dph + ENDIF ;Drv_a + IF DRV_B +XDPH01: DB LOCKF ; Format lock flag + DB DSK5+DS+DD+DVSPDL+MTR ; Disk drive type + DB 1 ; Driver id + DB 1 ; Physical drive number +DPH$01: DW 0 ; Skew table pointer + DW 0,0,0 ; Scratch area + DW DIRBUF ; Directory buffer pointer + IF AUTOSL + DEFW DPB$01+DPHDSZ ; Ram space for DPB #1 + ELSE + DW DPBRB ; Pointer to current DPB for Drive 1 + ENDIF + DW CHK$01 ; Wacd for drive 01 + DW ALV$01 ; Alloc vector for 01 + ENDIF ;Drv_b + IF DRV_C +XDPH02: DB LOCKF ; Format lock flag + DB DSK5+DS+DD+DVSPDL+MTR ; Disk drive type + DB 1 ; Driver id + DB 2 ; Physical drive number +DPH$02: DW 0 ; Skew table pointer + DW 0,0,0 ; Scratch area + DW DIRBUF ; Directory buffer pointer + IF AUTOSL + DEFW DPB$02+DPHDSZ ; Ram space for DPB #2 + ELSE + DW DPBRA ; Pointer to current DPB for Drive #2 + ENDIF + DW CHK$02 ; Wacd for drive 02 + DW ALV$02 ; Alloc vector for 02 + ENDIF + IF DRV_D +XDPH03: DB LOCKF ; Format lock flag + DB DSK3+sS+DD+DVSPDl+MTR ; Disk drive type + DB 1 ; Driver id + DB 3 ; Physical drive number +DPH$03: DW 0 ; Skew table pointer + DW 0,0,0 ; Scratch area + DW DIRBUF ; Directory buffer pointer + IF AUTOSL + DEFW DPB$03+DPHDSZ ; Ram space for DPB #3 + ELSE + DW DPBRA ; Pointer to current DPB for Drive #3 + ENDIF + DW CHK$03 ; Wacd for drive 03 + DW ALV$03 ; Alloc vector for 03 + ENDIF ;Drv_d + +; Directory Buffer Allocation. Only One Directory Buffer is required. Since +; we want it to be the first item in DSEG, it must be placed here. + + DSEG + + IF BANKED +DIRBUF EQU CBOOT ; Resident Init code in here + ELSE +DIRBUF EQU $ + ENDIF + ORG DIRBUF+128 ; Directory buffer + +; If we are using autoselection of drives, we copy the XDPB/DPB structure +; for the identified format to RAM thereby allowing emulation of formats by +; installing data for the desired format and locking the DPH. For Non-auto- +; select, we simply point to the read-only structure defined in DPB.LIB. + + IF AUTOSL + IF DRV_A +DPB$00: DEFS DPBSIZ ; Size of XDPB+DPB + ENDIF + IF DRV_B +DPB$01: DEFS DPBSIZ + ENDIF + IF DRV_C +DPB$02: DEFS DPBSIZ + ENDIF + IF DRV_D +DPB$03: DEFS DPBSIZ + ENDIF + ENDIF ;autosel + + IF [BANKED AND ZSDOS2] + COMMON /B2RAM/ + ELSE + DSEG + ENDIF + +; Directory Check Buffers. Each Buffer MUST be NDE/4 Bytes long at minimum. +; Each Logical Drive with removable media MUST have its own check buffer. + + IF DRV_A +CHK$00: DEFS [MXFDIR/4]+1 ; Enough for 256 dir entries + ENDIF + IF DRV_B +CHK$01: DEFS [MXFDIR/4]+1 ; Enough for 256 dir entries + ENDIF + IF DRV_C +CHK$02: DEFS [MXFDIR/4]+1 ; Enough for 256 dir entries + ENDIF + IF DRV_D +CHK$03: DEFS [MXFDIR/4]+1 ; Enough for 256 dir entries + ENDIF + +; Allocation BitMap Buffers. Each MUST be NAB/8 Bytes at Minimum. +; Each Logical Floppy Drive MUST have an Allocation BitMap Buffer. + + IF DRV_A +ALV$00: DEFS [MXFALC/8]+1 ; Enough for 800 KB or 1.44 MB drives + ENDIF + IF DRV_B +ALV$01: DEFS [MXFALC/8]+1 ; Enough for 800 KB or 1.44 MB drives + ENDIF + IF DRV_C +ALV$02: DEFS [MXFALC/8]+1 ; Enough for 800 KB or 1.44 MB drives + ENDIF + IF DRV_D +ALV$03: DEFS [MXFALC/8]+1 ; Enough for 800 KB or 1.44 MB drives + ENDIF + +;======================= End of DPH.LIB ======================= + \ No newline at end of file diff --git a/Source/BPBIOS/dphhd.lib b/Source/BPBIOS/dphhd.lib index 7a666196..beb73b05 100644 --- a/Source/BPBIOS/dphhd.lib +++ b/Source/BPBIOS/dphhd.lib @@ -188,8 +188,5 @@ ALV$59: DEFS HSIZ9/8+1 IF DRV_P ALV$60: DEFS HSIZ10/8+1 ENDIF - - DEFS 1024 ; WW ;======================= End of DPHHD.LIB ========================= - \ No newline at end of file diff --git a/Source/BPBIOS/dphhd.lib.sav b/Source/BPBIOS/dphhd.lib.sav new file mode 100644 index 00000000..ec72cd8c --- /dev/null +++ b/Source/BPBIOS/dphhd.lib.sav @@ -0,0 +1,193 @@ +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Additional Disk Parameter Headers (DPH) for Hard Drives Generic File +; (MUST be in Common Memory) +; This data must match information contained in the DPB table for Hard Drives. +; +; 1.1 - 28 Aug 01 - Made generic module for GPL release. HFB +; 1.0 - 31 Aug 92 - General Release. HFB +; 0.1 - 3 Jan 92 - Initial release. HFB +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; The Physical Drive Number byte (XDPH+3) is simply an index to the Physical +; Drive as specified in the ICFG-xx.Z80 file. Up to three physical drives +; may be defined in that section, the first byte of which defines the +; Physical/Logical Unit Address (Device & LUN for SCSI, Master/Slave for IDE), +; and a flag bit to specify whether or not the drive is physically present. +; See ICFG-xx.Z80 for a definition of the data. + + CSEG + IF DRV_E +XDPH50: DEFB TRUE ; Format lock flag (Lock First Hard Drive) + DEFB FIXDSK ; Disk drive type + DEFB 2 ; Driver ID + DEFB 0 ; Physical drive [0..2] for this Partition +DPH$50: DEFW 0 ; Skew table pointer + DEFW 0,0,0 ; Scratch area + DEFW DIRBUF ; Directory buffer pointer + DEFW DPB50 ; Pointer to DPB for first partition/drive + DEFW 0 ; No Wacd for hard drive + DEFW ALV$50 ; Alloc vector for first Partition + ENDIF + IF DRV_F +XDPH51: DEFB TRUE ; --- Second Hard Drive/Partition + DEFB FIXDSK + DEFB 2 + DEFB 0 +DPH$51: DEFW 0 + DEFW 0,0,0 + DEFW DIRBUF + DEFW DPB51 ; Pointer to DPB for second Partition/Drive + DEFW 0 + DEFW ALV$51 ; Alloc vector for second Partition/Drive + ENDIF + IF DRV_G +XDPH52: DEFB TRUE ; --- Third Hard Drive/Partition + DEFB FIXDSK + DEFB 2 + DEFB 0 +DPH$52: DEFW 0 + DEFW 0,0,0 + DEFW DIRBUF + DEFW DPB52 ; Pointer to DPB for third Partition/Drive + DEFW 0 + DEFW ALV$52 ; Alloc vector for third Partition/Drive + ENDIF + IF DRV_H +XDPH53: DEFB TRUE ; --- Fourth Hard Drive/Partition + DEFB FIXDSK + DEFB 2 + DEFB 0 +DPH$53: DEFW 0 + DEFW 0,0,0 + DEFW DIRBUF + DEFW DPB53 ; Pointer to DPB for fourth Partition/Drive + DEFW 0 + DEFW ALV$53 ; Alloc vector for fourth Partition/Drive + ENDIF + IF DRV_I +XDPH54: DEFB TRUE ; --- Fifth Hard Drive/Partition + DEFB FIXDSK + DEFB 2 + DEFB 1 +DPH$54: DEFW 0 + DEFW 0,0,0 + DEFW DIRBUF + DEFW DPB54 ; Pointer to DPB for fifth Partition/Drive + DEFW 0 + DEFW ALV$54 ; Alloc vector for fifth Partition/Drive + ENDIF + IF DRV_J +XDPH55: DEFB TRUE ; --- Sixth Hard Drive/Partition + DEFB FIXDSK + DEFB 2 + DEFB 1 +DPH$55: DEFW 0 + DEFW 0,0,0 + DEFW DIRBUF + DEFW DPB55 ; Pointer to DPB for sixth Partition/Drive + DEFW 0 + DEFW ALV$55 ; Alloc vector for sixth Partition/Drive + ENDIF + IF DRV_K +XDPH56: DEFB TRUE ; --- Seventh Hard Drive/Partition + DEFB FIXDSK + DEFB 2 + DEFB 1 +DPH$56: DEFW 0 + DEFW 0,0,0 + DEFW DIRBUF + DEFW DPB56 ; Pointer to DPB for seventh Partition/Drive + DEFW 0 + DEFW ALV$56 ; Alloc vector for seventh Partition/Drive + ENDIF + IF DRV_L +XDPH57: DEFB TRUE ; --- Eighth Hard Drive/Partition + DEFB FIXDSK + DEFB 2 + DEFB 1 +DPH$57: DEFW 0 + DEFW 0,0,0 + DEFW DIRBUF + DEFW DPB57 ; Pointer to DPB for eighth Partition/Drive + DEFW 0 + DEFW ALV$57 ; Alloc vector for eighth Partition/Drive + ENDIF +;<<< --- Drive M is for RAM Drive --- >>> + IF DRV_N +XDPH58: DEFB TRUE ; --- Ninth Hard Drive/Partition + DEFB FIXDSK + DEFB 2 + DEFB 1 +DPH$58: DEFW 0 + DEFW 0,0,0 + DEFW DIRBUF + DEFW DPB58 ; Pointer to DPB for ninth Partition/Drive + DEFW 0 + DEFW ALV$58 ; Alloc vector for ninth Partition/Drive + ENDIF + IF DRV_O +XDPH59: DEFB TRUE ; --- Tenth Hard Drive/Partition + DEFB FIXDSK + DEFB 2 + DEFB 1 +DPH$59: DEFW 0 + DEFW 0,0,0 + DEFW DIRBUF + DEFW DPB59 ; Pointer to DPB for tenth Partition/Drive + DEFW 0 + DEFW ALV$59 ; Alloc vector for tenth Partition/Drive + ENDIF + IF DRV_P +XDPH60: DEFB TRUE ; --- Eleventh Hard Drive/Partition + DEFB FIXDSK + DEFB 2 + DEFB 1 +DPH$60: DEFW 0 + DEFW 0,0,0 + DEFW DIRBUF + DEFW DPB60 ; Pointer to DPB for eleventh Partition/Drive + DEFW 0 + DEFW ALV$60 ; Alloc vector for eleventh Partition/Drive + ENDIF + +; Allocation BitMap Buffers. Each MUST be # Alloc Blks/8 Bytes at Minimum. +; Each Logical Drive MUST have an Allocation BitMap Buffer. + + COMMON /RESVD/ ; Reserve space for BPBUILD + + IF DRV_E +ALV$50: DEFS HSIZ0/8+1 ; Space for First Logical Drive Alloc Blocks + ENDIF + IF DRV_F +ALV$51: DEFS HSIZ1/8+1 ; Space for Second Logical Drive Alloc Blocks + ENDIF + IF DRV_G +ALV$52: DEFS HSIZ2/8+1 ; Space for Third Logical Drive Alloc Blocks + ENDIF + IF DRV_H +ALV$53: DEFS HSIZ3/8+1 ; Space for Fourth Logical Drive Alloc Blocks + ENDIF + IF DRV_I +ALV$54: DEFS HSIZ4/8+1 + ENDIF + IF DRV_J +ALV$55: DEFS HSIZ5/8+1 + ENDIF + IF DRV_K +ALV$56: DEFS HSIZ6/8+1 + ENDIF + IF DRV_L +ALV$57: DEFS HSIZ7/8+1 + ENDIF +;<<< --- Drive M is RAM --- >>> + IF DRV_N +ALV$58: DEFS HSIZ8/8+1 + ENDIF + IF DRV_O +ALV$59: DEFS HSIZ9/8+1 + ENDIF + IF DRV_P +ALV$60: DEFS HSIZ10/8+1 + ENDIF + +;======================= End of DPHHD.LIB ========================= + \ No newline at end of file diff --git a/Source/BPBIOS/fdc-dx.z80 b/Source/BPBIOS/fdc-dx.z80 index bff1f617..c42724c6 100644 --- a/Source/BPBIOS/fdc-dx.z80 +++ b/Source/BPBIOS/fdc-dx.z80 @@ -299,12 +299,7 @@ SPEC3: OR B ; Add in Step Rate ; Assumes STHDRV, SPEC, STSIZE and STMODE called first. ;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: -RECAL: - CALL PRINT - DEFB '[RECAL',']'+80H - - - LD A,3 ; Give this 3 chances to Home +RECAL: LD A,3 ; Give this 3 chances to Home RECAL1: LD (RETRYS),A PUSH BC ; Save needed regs LD BC,2*256+7 ; Two bytes, Recalibrate = 7 @@ -651,8 +646,7 @@ FDCI2: INI ; Read a byte from (C) to (HL) ; Enter the Result Phase of the Command. Gather returned bytes -FDCRES: -;WW EI ; Interrupts Ok now if in Result Phase +FDCRES: EI ; Interrupts Ok now if in Result Phase LD HL,ST0 ; Point to Status Result area ISGO: CALL WRDY BIT 4,A ; End of Status/Result? @@ -667,7 +661,7 @@ ISGO: CALL WRDY ; executing a Check Interrupt Command returning ST0 in A. FDCDN: PUSH HL ; Don't alter regs -;WW EI ; (Ints Ok Now) + EI ; (Ints Ok Now) FDCDN0: CALL WRDY ; Ready? (leave Ints alone) LD A,08H ; Else Issue Sense Interrupt Status Comnd OUT0 (DR),A @@ -704,7 +698,7 @@ MOTOR: PUSH AF ; Save Reg OR A ; Already On? LD A,(MONTIM) ; (get Default On Time) LD (MOTIM),A ; always reset -;WW EI ; Insure Ints are Active + EI ; Insure Ints are Active JR NZ,MOTORX ; ..exit if Motors On..they will stay On LD A,(HDR) ; Get current Drive @@ -1138,7 +1132,7 @@ Int0X: POP HL ; Restore Regs POP DE POP BC ; Restore Stack if Needed -;WW EI ; Insure Interrupts are Enabled + EI ; Insure Interrupts are Enabled RET ;..... diff --git a/Source/BPBIOS/fdc-ww.z80 b/Source/BPBIOS/fdc-ww.z80 new file mode 100644 index 00000000..5bc26624 --- /dev/null +++ b/Source/BPBIOS/fdc-ww.z80 @@ -0,0 +1,305 @@ +;::::::::::::::::::::::::::::::::::::::::::::****************************** +; Floppy Disk Routines ***** Hardware Dependent ***** +; - D-X Designs Pty Ltd P112 - ****************************** +; +; 1.3 - 26 Aug 01 - Cleaned up for GPL Release. HFB +; 1.2c- 12 May 97 - Cleaned up source, modified STSIZE Code (again). HFB +; 1.2b- 22 Apr 97 - Changed 5.25" Hi/Lo Speed controls. HFB +; 1.0a- 23 Mar 97 - (test) fixes. HFB +; 1.0 - 13 Aug 96 - Initial Release for P112 from YASMIO. HFB +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; + IF BANKED + COMMON /BANK2/ + ELSE + CSEG + ENDIF + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; STMODE (Function 0) - Set the FDC mode for Read/Write operations. +; +; Enter : A = Single-Density Flag (0 = Double Dens, 0FFH = Single Dens) +; Return: Nothing +; Uses : AF All other Registers Preserved/Not Affected +; +; Assumes STSIZE and STSECT called first +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +STMODE: CALL PANIC + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; STSIZE (Function 1) - Set Drive Size (3.5", 5.25", 8"), Drive Speed +; (High/Low) Capability, and a Boolean flag for whether Motor Control is +; needed by the Drive. +; +; Enter : A = Hi Speed Flag ( 0 = Normal, 0FFH = High Speed Capable) +; D = Motor Flag (0 = No Motor Control, 0FFH = Motor needed) +; E = Drive Size (0 = Hard, 001 = 8", 010 = 5.25", 011 = 3.5") +; Return: Nothing +; Uses : AF All other Registers Preserved/Not Affected +; +; Assumes STHDRV Called Previously. Call before calling STMODE. +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +STSIZE: CALL PANIC + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; STHDRV (Function 2) - Set Head and Drive for Disk Operations. +; +; Enter : A = Unit # in D0-D1, Head in D2 +; Return: Nothing +; Uses : AF All other Registers Preserved/Not Affected +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +STHDRV: CALL PANIC + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; STSECT (Function 3) - Set Sector Number, Sector Size and Last Sector # +; +; Enter : A = Physical Sector Number +; D = Sector Size (0=128, 1=256, 2=512, 3=1024) +; E = Last Physical Sector # on Side +; Return: Nothing +; Uses : AF All other Registers Preserved/Not Affected +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +STSECT: CALL PANIC + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; SPEC (Function 4) - Do a Specify Command, setting Step Rate and Head +; Load/Unload Time. Values are rounded up if not even increments. +; +; Enter : A = Step Rate (in mS; Bit 7 = 1 for 8" drive +; D = Head Unload Time (in mS) +; E = Head Load Time (in mS) +; Return: Nothing +; Uses : AF All other Registers Preserved/Not Affected +; +; Assumes STSIZE called previously to set DRVSPD variable. +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +SPEC: CALL PANIC + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; RECAL (Function 5) - Recalibrate Drive (moves heads to track 0). +; +; Enter : Nothing +; Return: A = 0 if Ok, NZ if Error. Flags reflect A +; Uses : AF All other Registers Preserved/Not Affected +; +; NOTE: BC Must be preserved by this routine. +; Assumes STHDRV, SPEC, STSIZE and STMODE called first. +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +RECAL: CALL PANIC + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; SEEK (Function 6) - Set the Track for disk operations and seek to it. +; +; Enter : A = Desired Track Number +; D = Verify flag (0=No, FF=Yes) +; E = Double-step Flag (E <> 0 for Double-step) +; Return: A = 0, Zero Flag Set (Z) if Ok, A <> 0 Zero Clear (NZ) if Error +; Uses : AF All other Registers Preserved/Not Affected +; +; Assumes STHDRV, SPEC, STSIZE and STMODE are called first. +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +SEEK: CALL PANIC + XOR A + RET + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; SREAD (Function 7) - Read a Sector from the Floppy Disk. The Mode, +; Head/Drive, Track, and Sector must have already been set. +; +; Enter : HL --> Read Buffer +; Return: A = 0, Zero Set (Z) if Ok, A <> 0, Zero Clear (NZ) if Error. +; Uses : AF,HL. All other Registers Preserved/Not Affected +; +; Assumes STMODE, STHDRV, STSECT, SPEC and SEEK Called First. +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +SREAD: CALL PANIC + XOR A + RET + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; SWRITE (Function 8) - Write a Sector to the Floppy Disk. The Mode, +; Head/Drive, Track, and Sector must have already been set. +; +; Enter : HL --> Write Buffer +; Return: A = 0, Zero Flag Set (Z) if Ok, A <> 0 Zero Clear (NZ) if Errors +; Uses : AF,HL. All other registers Preserved/Not Affected. +; Assumes STMODE, STHDRV, STSECT, SPEC and SEEK Called First. +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +SWRITE: CALL PANIC + XOR A + RET + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; READID (Function 9) - Read the first Valid Address Mark on a track. +; +; Enter : Nothing +; Return: A = 0 if Ok, NZ if Error. Flags reflect A +; Uses : AF All other Registers Preserved/Not Affected +; +; Assumes STHDRV, SPEC, STSIZE and STMODE called first. +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +READID: CALL PANIC + XOR A + RET + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; RETDST (Function 10) - Return the status of a drive. +; This routine reports a "765" Controller type instead of actual number. +; +; Enter : Nothing +; Return: A = Status byte +; BC = 765 (FDC Controller Type) +; HL = Address of Status Byte +; Uses : AF,BC,HL All other Registers Preserved/Not Affected +; +; Assumes STHDRV called first +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +RETDST: CALL PANIC + LD HL,ST0 ; Point to Status Byte (Reg 3 contents) + LD A,(HL) ; fetch it + LD BC,765 ; load Controller ID + RET + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; FMTTRK (Function 11) - Format a complete track on one side of a Floppy +; Disk. The Mode, Head/Drive, Track, and Sector must have been set. +; +; NOTE: The contents of the Format Data Block varies between controllers, +; so RETDST should be called to determine the controller type before +; setting up data structures. +; +; Enter : D = Formatting Sctrs/Track value +; E = Formatting Gap 3 Byte Count +; HL = Pointer to Controller-dependent Format Data block +; Return: A = 0, Zero Flag Set (Z) if Ok, A <> 0 Zero Clear (NZ) if Errors +; Uses : All Primary Registers +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +FMTTRK: CALL PANIC + XOR A + RET + +;============================================================================= +; FDCMD - Send Command to FDC +; Enter: B = # of Bytes in Command, C = Command Byte +; HL -> Buffer for Read/Write Data (If Needed) +; Exit : AF = Status byte +; Uses : AF,BC + +FDCMD: CALL PANIC + LD A,(ST0) ; Else get first byte of Status + AND 0C0H ; check for Normal termination + RET ; ..return w/Error Flags set + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; MOTOR CONTROL. This routine performs final selection of the drive control +; latch and determines if the Motors are already spinning. If they are off +; and Motor control is needed, then the Motors are activated and the spinup +; delay time in tenths-of-seconds is performed before returning. +; +; Enter : Command byte in A +; Return: Head Delay bit set in Command in A if needed +; Uses : None. All Registers Preserved/Not Affected + +;MOTOR: CALL PANIC + XOR A + RET + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Hardware-Dependent Host Read/Write Routine linked to from FLOPPY module. +; This routine Reads/Writes data from HSTBUF trying up to MXRTRY times +; before giving up. If an error occurs after the next-to-last try, the +; heads are homed to force a re-seek. +; +; Enter: (RDOP Set for desired operation) +; Exit : A = 0, Zero Set if Ok, A <> 0, Zero Reset if Errors +; Uses : AF,HL +; +; RDOP is set to 1 for Read, 0 for Write, TTRK set with desired Track +; number, STHDRV, STSECT, STMODE, SPEC all called previously. +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +FHDRW: CALL PANIC + XOR A + RET + + +;- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + CSEG ;*** Remainder of Code MUST be in Main Memory *** + +;======================================================================== +; Reset the Floppy Disk Controller. Called from CBOOT in case of Hard +; Disk Boot which leaves the controller in a "hung" state, and locally +; if the Controller times out (often due to changing diskettes). + +FDRst: CALL PANIC + RET + +;======================================================================== +; Motor Off routine. Called from TIM-DX and SELFLP2 which forces +; Motors/Timer to be Off state so spinup delay is forced on next selection. + +MOTOFF: CALL PANIC +ChgSpd: RET + +;======================== RAM Storage Area ============================== + + IF BANKED + COMMON /B2RAM/ ; If banked, Local stack in Bank + ELSE + DSEG ; ..otherwise in Data Segment + ENDIF ; + + DSEG ; Place in Common memory + +; NOTE: Variables listed as (** Global **) are accessed by other modules and +; MUST exist as defined. + +HDR: DEFS 1 ; Head (B2), Drive (B0,1) (** Global **) + +; FDC Operation Result Storage Area + +ST0: DEFS 1 ; Status Byte 0 +ST1: DEFS 1 ; Status Byte 1 (can also be PCN) +ST2: DEFS 1 ; Status Byte 2 +RC: DEFS 1 ; Track # (** Global **) +RH: DEFS 1 ; Head # (0/1) +RR: DEFS 1 ; Sector # (** Global **) +RN: DEFS 1 ; Sector Size (** Global **) + +;-->>> Do NOT re-order the following two bytes !! <<<-- + +MTM: DEFS 1 ; Floppy Time down-counter +MOTIM: DEFS 1 ; Motor On Time Counter + +; DISK Subsystem Variable Storage + +FDMOT: DEFS 1 ; Motor on required flag +RDOP: DEFS 1 ; Read/write flag +RETRYS: DEFS 1 ; Number of times to try Opns +RWRTRY: DEFS 1 ; Number of read/write tries +DRVSPD: DEFS 1 ; Drive Speed +DRVSIZ: DEFS 1 ; Drive Size +STEP2: DEFS 1 ; <> 0 for Double Step (** Global **) +MODE: DEFS 1 ; Bit 6 = 1 if MFM, 0 = FM +ACTIVE: DEFS 1 ; Current bits written to Dev Contr Reg (DCR) +DLYCNT: DEFS 1 ; Delay value reading Main Status Reg +FSPT: DEFS 1 ; Format Sectors/Track value +TSBSCF: DEFS 1 ; 0=Hd always 0 (TSBSC) (** Global **) + +TTRK: DEFS 1 ; Storage for Track (** Global **) +TRKARY: DEFS 4 ; Track storage locations for four drives + +;=========================== End of FDC-DX ============================== diff --git a/Source/BPBIOS/forlib.lib b/Source/BPBIOS/forlib.lib deleted file mode 100644 index e69de29b..00000000 diff --git a/Source/BPBIOS/hard-ww.z80 b/Source/BPBIOS/hard-ww.z80 new file mode 100644 index 00000000..1b52f009 --- /dev/null +++ b/Source/BPBIOS/hard-ww.z80 @@ -0,0 +1,620 @@ +;::::::::::::::::::::::::::::::::::::::::::::::::************************** +; Hard disk routines as implemented for the ** Hardware Dependent ** +; D-X Designs Pty Ltd P112 via an external ** for exact interface ** +; NCR/National 5380 Controller. These routines ************************** +; may be assembled to use Polled or DMA (no Interrupt) transfers without +; Arbitration depending on an equate in the DEF-DX.LIB assembly definition +; file. Direct driver IO routines to Select (SELHD), Read (HDREAD) and +; Write (HDWRIT) are all included here. Thanks to Terry Hazen for +; debugging the polled code while working on the YASBEC and Ampro versions. +;-------------------------------------------------------------------------- +; 1.3 - 22 Aug 01 - Cleaned source for GPL Release. HFB +; 1.2a- 15 Sep 97 - Corrected Data saves for Direct Device IO when +; flushing to/from other SCSI units, added Busy tests. HFB +; 1.2 - 17 Jul 96 - Initial P112 integration, deleted Xebec 1410/Shugart +; 1610-3 driver, selectable Polled/DMA modes. HFB +; 1.1 - 28 May 93 - Fixed Access to fast drives. JTH +; 0.0 - 9 Jul 91 - Initial Test Release HFB +;*************************************************************************** + + IF BANKED + COMMON /BANK2/ + ELSE + CSEG + ENDIF + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Function 0 - Set User Data Area Adress for Direct SCSI IO, Return +; Number of Bytes in the SCSI driver Command Block +; Enter: DE = Address of User Data Area +; Exit : A = Number of bytes available in the SCSI Command Block +; Uses : A,HL +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +HDVALS: LD (DATADR),DE ; Save the Users Data Area + LD A,CMDSIZ + RET + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Function 1 - Set Physical Device bit and Logical Unit Number in SCSI +; Command Block (Byte 1, bits 7-5) from byte in A +; Enter: A = Device Byte (See ICFG-xx.Z80) +; Exit : A = Physical Device Bit of selected drive +; Uses : AF +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +HDSlct: LD (xUnit),A ; Save Dev/LUN byte for later + RET + +HDSlc0: PUSH BC ; Save regs + LD C,A ; and entry byte + AND 0E0H ; Mask off all but Logical Unit Number + LD (LUNSAV),A ; and save for execution + LD A,C ; Get byte back + AND 07H ; keeping only Physical Device bits + LD B,A ; Prepare for bit rotation + INC B ; by bumping count for initial value + XOR A ; Start with 0 byte + SCF ; and 1 bit in Carry +HDSLCZ: RLA ; Rotate bit around thru Carry + DJNZ HDSLCZ ; ..until properly positioned + LD (HDEVIC),A ; Save for future operations + POP BC ; Restore regs + RET + +;========================================================================= +; Select Hard Disk (SCSI Device and Unit) < Internal Bios routine > + +SELHD: LD A,(SEKPDN) ; Load Device and Unit # to select +SELHDA: LD C,A ; position for calculations + LD B,HDRV1-HDRV0 ; with size + MLT BC ; Calculate offset into table + LD HL,HDRV0 ; from first Physical drive + ADD HL,BC + LD A,(HL) ; Fetch Device/LUN byte + ld (iUnit),a ; save as internal unit # + CALL HDSlc0 ; setting variables for Device and LUN + CALL HDINIT ; Do the actual initialization + JP NZ,SELERR ; ..return Error if Bad + JP SETPARMS ; Else set parameters for DPH/DPB + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Initialize Xebec 1410/Shugart 1610-3 Controller for appropriate +; Drive Specs. Does Nothing if Owl, Adaptec or SCSI. +; <<-- Returns Error for Xebec/Shugart...deleted in 1.2. -->> +; Enter: HL -> Configuration block for desired drive (see ICFG-xx) +; Exit : A = 0, Zero Set (Z) if Ok, A <> 0, Zero Clear (NZ) if Error +; Uses : AF,BC,DE,HL +; NOTE : This routine uses the Physical drive parameters contained +; in ICFG-xx to determine some of the parameters. +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +HDINIT: LD A,(CNTRLR) ; Set Controller type + CP 2 ; Is it Xebec 1410/Shugart 1610-3? + JR NZ,HDINIS ; ..jump if Not to return Ok + DEFB 0F6H ; Fall thru w/"OR 0AFH" and return Error +HDINIS: XOR A ; Else signify this was done Ok + RET ; ..and quit + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Write to SCSI Hard Disk Drive < Internal BIOS Routine > +; Writes from HSTBUF using HSTTRK and HSTSEC to build Block Number. +; NOTE: This routine uses physical drive characteristics from ICFG-xx. + +HDWRIT: XOR A + LD (HSTWRT),A ; Show No pending Write + + LD A,0AH ; Set the SCSI Write Command + DEFB 11H ; ..trash DE, fall thru to save + +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Read from SCSI Hard Disk Drive < Internal BIOS Routine > +; Reads to HSTBUF using HSTTRK and HSTSEC to build Block Number. +; NOTE: This routine uses physical drive characteristics from ICFG-xx. + +HDREAD: LD A,08H ; Set the SCSI Read Command + LD (HDCOMD),A ; save command in CDB + LD HL,(HSTDPH) ; Get pointer to desired DPH + DEC HL ; back up to Device # + LD A,(HL) ; and fetch + CALL SELHDA ; Select this device from A-Reg + + LD DE,HDCOMD+1 ; Point to second byte of Command Block + LD BC,4*256+0 ; Count = 4, MSB of Block # = 0 + LD HL,(HSTTRK) ; Get requested track +MUL16: ADD HL,HL ; Multiply C,H,L by 16 for 21-bit block # + RL C ; shifting overflow bit to C + DJNZ MUL16 ; ..and looping til * 16 + LD A,(DE) ; Get LUN/High Address + AND 11100000B ; keep only LUN + OR C ; and add in High 5 bits of Block # + LD (DE),A ; Store back in LUN/High Address + INC DE ; Pt to next + LD A,H ; Get middle Block # + LD (DE),A ; and save + INC DE ; Pt to next + LD A,(HSTSEC) ; Get Logical Host Sector # (4-bits) + ADD A,L ; add in Hi 4-bits of low Block # + LD (DE),A ; save lowest 8 bits of Block # + INC DE ; Pt to next + LD A,1 + LD (DE),A ; Set HDSIZ for 1 block + INC DE ; Pt to next + +; NOTE: Support for Xebec 1410/Shugart 1610-3 removed. They required a +; step rate byte to be stored at this point. + + XOR A ; Get a Zero + LD (DE),A ; Set in Command Block + +; Set Physical/Logical Unit numbers just prior to accessing the Drive + + LD A,(iUnit) ; Get internal unit data + CALL HDSlc0 ; set variables for Device and LUN + +; Try the Command specified. If errors returned (e.g. Attn assertion), +; read the SCSI Sense status and try the command again. + +RWSCSI: CALL HDRW0 ; Try a Normal Data Access + RET Z ; ..exitting if Ok + LD HL,sense ; Set Ptr to Sense Command Block + LD DE,snsDat ; and Sense Data Poiner + CALL HDRW1 ; Try a Sense Read, following thru to Dat Rd +HDRW0: LD DE,HSTBUF ; and Data Pointer for Normal Accesses +STSCSI: LD HL,HDCOMD ; Set Command Block Address +HDRW1: LD (HDCMDV),HL ; Save Command Block Address + LD (HDDATV),DE ; and Data Area Pointer + IF NOWAIT ; If Wait States not desired.. + IN0 A,(DCNTL) ; Get current settings + LD (WTSAVE),A ; save for exit + AND 11001111B ; Keep everything but IO Waits + OUT0 (DCNTL),A ; and set to No IO Wait States + ENDIF ;nowait + ;..fall thru to change phases on the SCSI bus + + CALL SCSI ; Do the Work + AND 00000010B ; Any errors? + LD (ERFLAG),A ; save resulting status here + RET + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Function 2 - Direct SCSI driver. This routine performs the function +; described by the command in the HD Command Block with Data area +; addressed by DE. At the end of the function, 512 bytes of data are +; transferred from the Bios IO Buffer to the Users Space set by Fcn 0. +; +; Enter: DE = Pointer to User Command Descriptor Block +; HDCOMD contains pre-filled SCSI Command Block +; A = 0 if No Data to be Written, FF if User-supplied data to write +; Exit : H = Message Byte value +; L = Status Byte value +; A = Status byte, Flags set accordingly. +; Uses : AF,BC,DE,HL +; NOTE : Routine assumes the Command Block is properly configured for the +; desired function and device. Errors in phasing result in program +; exit and Warm Boot function, while Timeout returns 0FFH. +; For external access, It assumes the user has used Functions 0 and 1 to +; set the data transfer source/dest address and logical & physical drive. +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +HD_RW: PUSH AF ; Save User Data Flag + PUSH DE ; and ptr to User's CDB + CALL FLUSH ; Insure Host Buffer is Free + POP HL ; restore User CDB ptr to HL for move + IF BANKED + CALL SHDBNK ; Load Banks for transfer to System fm User + CALL XMOVE ; and Set + ENDIF ;Banked + LD DE,HDCOMD + LD BC,CMDSIZ ; Move Command Descriptor Block + CALL MOVE ; into SCSI Command area (6-12 bytes) + POP AF ; Restore Flag + OR A ; Any User data to write? + JR Z,DOSCS0 ; ..bypass move if not + IF BANKED + CALL SHDBNK ; Load for move from User's to System Banks + CALL XMOVE ; and Set + ENDIF ;Banked + CALL HDDMOV ; Set to move 512 bytes from User to Hstbuf + CALL MOVE ; Do It! +DOSCS0: LD A,(xUnit) ; Get External Device data + CALL HDSlc0 ; set variables for Device & LUN + + CALL RWSCSI ; Set Data Addr and do the operation + IF BANKED + CALL SHDBNK ; Load Bank Numbers + LD A,B ; Swap + LD B,C ; Source + LD C,A ; and Destination Banks + CALL XMOVE ; Set Source/Dest + ENDIF ;Banked + PUSH HL ; Save Status and Message bytes + CALL HDDMOV ; set Addresses and Length + EX DE,HL ; write back to User's area + CALL MOVE ; move without affecting status in A + POP HL ; Restore Status and Message bytes + LD A,L ; Load Status byte for checks + AND 1010B ; keeping only Check (3) and Busy (1) Bits + RET ; ..and quit + +;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +; Raw SCSI Driver + +SCSI: + IF HDDMA + LD (DATPTR),DE ; Save Pointer to Data Area + ENDIF + LD HL,LUNSAV ; Address LUN storage location + LD A,(HDUNIT) ; Get LUN/HiBlock byte from Command Blk + AND 1FH ; Strip off old LUN + OR (HL) ; add in New LUN + LD (HDUNIT),A ; save new byte + XOR A + OUT0 (NCRCMD),A ;1.1 Clear any previous Controller status + OUT0 (NCRMOD),A ;1.1 no Mode settings + OUT0 (NCRTGT),A ;1.1 nothing asserted + + IF HDDMA + DEC A ; 0 --> FF + LD (STATUS),A ; Set Initial timeout status + IN0 A,(NCRINT) ; Clear interrupts & Error Bits + ENDIF + + LD A,(HDEVIC) ; Get the Target Device address bit + OR 10000000B ; add Host initiator address bit + OUT0 (NCRDAT),A + IN0 A,(NCRCMD) ; Get Initiator Comnd Reg + OR B_ABUS ; Assert the Data Bus + OUT0 (NCRCMD),A + LD A,B_ASEL+B_ABUS ; Now Assert both Select and Data Bus bits + OUT0 (NCRCMD),A + +; Wait for 200-300 mS for Target to become Busy. The SCSI spec says 250 mS, +; but we don't know when the triggering will occur with our 100ms counter. +; We therefore set it for 300 mS which results in 200-300 mS w/250 on average. + + LD L,0FFH ; Preset Timeout Error Status + LD A,3 ; 3-100mS ticks + LD (MTM),A ; from Now! +BSYWT: LD A,(MTM) ; Get Current Count + OR A ; Have we timed out? + JR Z,TIMOUT ; ..exit to Error if So + IN0 A,(NCRBUS) ; Get the Current Bus Status + AND B_BSY ; Is it BSY? + JR Z,BSYWT ; ..loop if Not + ;..else fall thru.. + LD A,B_ABUS + OUT0 (NCRCMD),A ; Assert Bus w/o Select Command (or free) + XOR A ; get a Zero + OUT0 (NCRCMD),A ; then free the Data Bus + IF HDDMA + LD (HDONE),A ; Start by showing Not Done + ;..fall thru to wait for a Request on the SCSI bus + +RQWAIT: IN0 A,(NCRBUS) ; Get Bus status + AND B_REQ ; Bus Request yet? + JR Z,RQWAIT ; ..jump if Not and wait + +WtCall: CALL NZ,SCSINT ; Call the Interrupt to start transfer + LD A,(HDONE) ; Get Hard Drive Done flag + OR A ; Finished? + JR NZ,WtDonX ; ..exit if So + + IN0 A,(DRA) ; Else fetch Status (from Z182 Port A) + BIT 4,A ; Interrupt? + JR WtCall ; ..check & Read/Write SCSI if So + +WtDonX: LD HL,(STATUS) ; Else get Status and Message bytes +TIMOUT: + IF NOWAIT + LD A,(WTSAVE) ; Get entry Wait state settings + OUT0 (DCNTL),A ; and restore + ENDIF + LD A,L ; get Status Byte + OR A ; set flags + RET ; and return + ELSE ;Not hddma + LD (STATUS),A ; Assume Status is Ok + ;..fall thru to check SCSI Bus phase changes.. + ENDIF ;Not hddma + +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; SCSINT - Interrupt routine for the NCR 5380/DP 8490 chip. +; +; This routine handles Interrupts generated by the SCSI controller on phase +; changes or loss of BSY signal meaning that the operation is complete. +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + + IF HDDMA +; CSEG ;<-- NOTE: If "True" Interrupts are used,this Vector + ; MUST be in Common Memory (CSEG) in case an + ; interrupt hits unexpectedly. Also, insert + ; code to save registers and set Local Stack. + +SCSINT: DI ; ..disable interrupts here for local calls + XOR A + OUT0 (NCRCMD),A ; Release the SCSI Bus + IN0 A,(NCRST) ; Get status + AND B_BBSY+B_PHAS ; Phase Match or Bus Busy? + JR Z,SCSIN0 ; ..jump if Not to continue + ;..else fall thru to Exit.. +; Exit here when we are done to set the Completed flag + +DISCSI: XOR A ; Turn off any SCSI operations + OUT0 (NCRMOD),A + OUT0 (NCRTGT),A + DEC A ; 0 --> FF + LD (HDONE),A ; Indicate Hard Disk Operation Complete + IN0 A,(NCRINT) ; Discard any pending 5380 Interrupts + IN0 A,(DSTAT) + AND 5FH ; Disable DMA1 Interrupts + OUT0 (DSTAT),A + EI + RET + +; Continue with Transaction + +SCSIN0: XOR A + OUT0 (NCRMOD),A ; Clear DMA mode + IN0 A,(NCRINT) ; Clear SCSI Interrupts + IN0 A,(DSTAT) + AND 5FH ; and Stop Z-180 DMA Ch #1 + OUT0 (DSTAT),A + LD A,B_MBSY+B_DMA ; Monitor Busy and Set DMA Mode + OUT0 (NCRMOD),A + ENDIF ;hddma +;..... +; Come here when phases change (Main Handler for Polled IO Mode) + +PHASE: IN0 A,(NCRBUS) ; Read the Bus Status + AND B_MSG+B_CD+B_IO ; keep the three phases we are interested in + RRCA ; Rotate Phase status bits + RRCA ; into B0-2 position for testing + OUT0 (NCRTGT),A ; Check for phase match + IF NOT HDDMA ; (only need this with Polled IO) + LD BC,NCRDAT ; with data going to/from this port (B=0) + ENDIF + LD HL,MESSAGE ; (Ph 7 input goes here) + CP 7 ; Are we in Phase 7 ? + JR Z,HDIN ; ..jump if so to Message In Phase + LD HL,(HDDATV) ; (Ph 0/1 IO From/To here) + OR A ; Are we in Phase 0 ? + JR Z,HDOUT ; ..jump to if so to Data Out Phase + DEC A ; Are we in Phase 1 ? + JR Z,HDIN ; ..jump to if so to Data In Phase + LD HL,(HDCMDV) ; (Ph 2 output from here) + DEC A ; Are we in Phase 2 ? + JR Z,HDOUT ; ..jump to if so to Command Out Phase + LD HL,STATUS ; (Ph 3 Input to here) + DEC A ; Are we in Phase 3 ? + JR Z,HDIN ; ..jump to if so to Status In Phase + ;..else fall thru +; Phases 4, 5 and 6 wind up here in an Error + + IF NOWAIT + LD A,(WTSAVE) ; Get entry Wait state settings + OUT0 (DCNTL),A ; and restore + ENDIF + CALL PRINT + DEFB CR,LF,' Phase Err',CR,LF+80H + IF HDDMA + CALL DISCSI ; Disable any ongoing DMA/SCSI operation + ENDIF ;..else fall thru to abort. Stack is reset so don't + ; worry about popping and restoring anything + IF BANKED + JP ABORT ; Use this error exit if banked + ELSE + RST 0 ; ..this exit if Non-banked + ENDIF ;banked + +;..... +; SCSI Input Routine (Polled IO) +; Enter with HL pointing to buffer, C addressing 5380 Data Port + + IF NOT HDDMA +HDIN: IN0 A,(NCRBUS) ; Check the Bus + BIT 5,A ; Do we have a REQuest? + JR NZ,HDIN1 ; ..jump if so to read it + AND B_BSY ; Is the Bus Busy? + JR NZ,HDIN ; ..loop if so + +HDEXIT: XOR A ; Else we are finished. Clean up & Quit + OUT0 (NCRCMD),A ; Clear Initiator Command Register + OUT0 (NCRTGT),A ; and Target Command Register + LD HL,(STATUS) ; Get Message (H) and Status (L) bytes +TIMOUT: + IF NOWAIT + LD A,(WTSAVE) ; Get entry Wait state settings + OUT0 (DCNTL),A ; and restore + ENDIF + LD A,L ; Get Status byte + OR A ; Set Return Status Ok if Status Byte = 0 + RET + +HDIN1: IN0 A,(NCRST) ; Get SCSI Status + AND B_PHAS ; Do the Phases Match? + JR Z,PHASE ; ..quit here if Not and clear + INI ; Get a byte from Port (C) to Memory at (HL) + INC B ; (correct B for decrement in INI) + LD A,B_AACK + OUT0 (NCRCMD),A ; ACKnowledge the byte + XOR A + OUT0 (NCRCMD),A ; clear *ACK bit + JR HDIN ; and back for more + +;..... +; SCSI Output Routine (Polled IO) +; Enter with HL pointing to buffer, C addressing 5380 Data Port + +HDOUT: LD A,B_ABUS ; Assert Data Bus + OUT0 (NCRCMD),A + IN0 A,(NCRBUS) ; Check the SCSI Bus + BIT 5,A ; Do we have a REQuest? + JR NZ,HDOUT1 ; ..jump if So to Send a byte + AND B_BSY ; Else is the Bus Busy? + JR NZ,HDOUT ; ..loop if so because we have more to go + JR HDEXIT ; Quit + +HDOUT1: IN0 A,(NCRST) ; Get current Status + AND B_PHAS ; Do we have a Phase Match? + JP Z,PHASE ; ..quit here if Not and clear + + OUTI ; Send a byte from (HL) to Port (C) + INC B ; (Correct B for decrement in OUTI) + LD A,B_AACK+B_ABUS + OUT0 (NCRCMD),A ; Set ACKnowledge and BUS bits + XOR A + OUT0 (NCRCMD),A ; clear *ACK and *BUS + JR HDOUT ; and back for more + ENDIF ;Not hddma + +;..... +; SCSI Input routine (DMA Controlled) +; Enter: HL = Address of Receive Buffer start + + IF HDDMA +HDIN: LD C,1010B ; Set for Edge Triggering and Read mode + CALL STDMA ; Set up Transfer and DMA Data + OUT0 (NCRINT),A ; Start DMA Initiator Rcv (bits don't care) + ;<-- NOTE: If using true Interrupts, restore local Stack Ptr + ; and preserved registers here + EI ; Interrupts Ok Now + RET + +;..... +; SCSI Output Routine (DMA Controlled) +; Enter: HL = Address of Send Buffer start + +HDOUT: LD C,1000B ; Set for Edge Triggering bit and Write mode + CALL STDMA ; Set up Transfer and DMA Data + LD A,B_ABUS ; Assert the Data Bus + OUT0 (NCRCMD),A + OUT0 (NCRST),A ; Start DMA Send (bits irrelevant) + ;<-- NOTE: If using true Interrupts, restore local Stack Ptr + ; and preserved registers here + EI ; Interrupts Ok Now + RET + +;..... +; STDMA - Set up DMA Channel 1 for a SCSI Read or Write operation. +; Enter: HL = Start Address of Buffer to Read/Write from/to +; C = Write (1x00B) or Read (1x10B) DMA1 Control bits +; ||++- Mem->IO ||++- IO->Mem +; |+--- DMA0-Sns |+--- DMA0-Sns +; +---- DMA1-Edge +---- DMA1-Edge + +STDMA: IN0 A,(DCNTL) ; Get DMA1 Control bits + AND 0F4H ; mask pertinent bits assuming a Write + OR C ; Add Edge Triggering bit and R/W mode + OUT0 (DCNTL),A ; and Command DMA Chan 1 + + IF BANKED + LD A,(SYSBNK) ; Get system Bank # + ELSE + LD A,(TPABNK) ; If Not Banked, load TPA Bank # + ENDIF ;banked + RL H ; Place Address MSB in Carry + ADC A,0 ; offset Bank # by 32k banks + RRA ; shift Bank LSB to Carry + RR H ; Move Bank # LSB (Carry) to Address MSB + LD (DMATBL+2),A ; Store Bank byte in DMA Block + LD (DMATBL),HL ; save Actual DMA Addr in Ctl Block + LD HL,DMATBL ; Point to DMA Control Block + LD BC,8*256+MAR1L ; Set for 8 bytes to DMA Channel 1 + OTIMR ; and output 8 bytes to 8 ports + IN0 A,(DSTAT) ; Get DMA Chan 1 Status + AND 57H ; set for No Terminating Interrupt + OR 81H ; enable DMA operation + OUT0 (DSTAT),A ; and Start the action! + RET + ENDIF ;hddma + +;..... +; Set registers for Whole Block Move + +HDDMOV: LD HL,(DATADR) ; Get ptr to User's Area + LD DE,HSTBUF ; Pt to local Host Buffer + LD BC,512 ; set length + RET ; ..and return + +;..... +; Set banks for Interbank move + + IF BANKED +SHDBNK: LD A,(USP-1) ; Get Source Bank Byte + RRA ; shift to + RRA ; + RRA ; Bank # + AND 1FH ; Mask off any Junk + LD C,A ; position + LD A,(SYSBNK) ; Get System Bank + LD B,A ; position it too + RET ; and return + ENDIF ;banked + +;..... +; SCSI Read Sense Command Data Block + +sense: DEFB 03H ; SCSI Sense Command + DEFB 0,0,0,SNSLEN,0 ; remainder of Sense Command Block + ; (data length set to available space) + IF BANKED + COMMON /B2RAM/ + ELSE + DSEG + ENDIF + +HDCMDV: DEFS 2 ; Storage for Current Command Data Block +HDDATV: DEFS 2 ; Storage for current Data Transfer Area +snsDat: DEFS 18 ; Storage for extended Sense Data Received +SNSLEN EQU $-snsDat +; SCSI Controller Command Block + +HDCOMD: DEFS 1 ; Command Byte +HDUNIT: DEFS 1 ; B7-5 = Unit #, remainder is Hi-Addr +HIBLK: DEFS 1 ; Mid-Addr Byte +LOBLK: DEFS 1 ; Lo-Addr Byte +HDSIZ: DEFS 1 ; Block Size to Read/Write (1=512 byte blk) +HDCTL DEFS 1 ; Control/Step Byte + DEFS 6 ; (pad for 12-byte Command Block) +CMDSIZ EQU $-HDCOMD ; Size of Command Block + + IF HDDMA +DATPTR: DEFS 2 ; Pointer to Data Area + ENDIF +DATADR: DEFS 2 ; Pointer to User Buffer Space (user bank) +HDEVIC: DEFS 1 ; Target Device address bit +LUNSAV: DEFS 1 ; Storage for LUN + +HDSTEP: DEFS 1 ; Step Rate Byte for Xebec/Shugart +INIBUF: DEFS 9 ; Buffer for Xebec/Shugart 1610-3 Init. + +; Z-180 DMA Control Block for SCSI Data Transfers + + IF HDDMA +DMATBL: DEFS 2 ; MAR1L, MAR1H + DEFS 1 ; MAR1B (Bank) + DEFS 2 ; DMAACK Output Port + DEFS 1 ; (unused) +NBYTES: DEFS 2 ; BCR1L, BCR1H + ENDIF ;hddma + +;<<--- WARNING! --- Do not re-order the following Two Bytes --->> + +STATUS: DEFS 1 ; Ending Status Byte +MESSAGE: DEFS 1 ; Ending Message Byte + +; IF HDDMA ;<-- If using True Interrupts, uncomment this + ; Section and add code to Interrupt Handler + ; to save registers here. +; DEFS 12 ; ..fill bytes and stack space +;INTSTK: DEFS 2 ; Storage for Stack Pointer +; ENDIF ;hddma + IF NOWAIT +WTSAVE: DEFS 1 ; Entry Wait State Setting + ENDIF +iUnit: DEFS 1 ; Bios Select Unit/LUN byte +xUnit: DEFS 1 ; Direct Access Unit/LUN byte + +;======================= End of HARD-DX =========================== + \ No newline at end of file diff --git a/Source/BPBIOS/hbios.z80 b/Source/BPBIOS/hbios.z80 index db1bc875..08ffe243 100644 --- a/Source/BPBIOS/hbios.z80 +++ b/Source/BPBIOS/hbios.z80 @@ -35,7 +35,7 @@ HB_DEFBNK EQU BID_USR ; Default bank number ; ; LOCATION OF DISPATCH ENTRY IN HBIOS BANK ; -HB_DISPATCH EQU 0203H +HB_DISPATCH EQU 0403H ; ; PLATFORM SPECIFIC CONSTANTS ; diff --git a/Source/BPBIOS/ibmv-dx.z80 b/Source/BPBIOS/ibmv-dx.z80 index baf06489..f5b302bb 100644 --- a/Source/BPBIOS/ibmv-dx.z80 +++ b/Source/BPBIOS/ibmv-dx.z80 @@ -18,81 +18,34 @@ ; Uses : AF,BC,DE,HL ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: -MOVE: -BNKCPY: - ; Save current stack & bank - LD (BCSSAV),SP ; Save current stack - LD SP,BCSTK ; Activate our private stack - IF BANKED - LD A,(CURBNK) ; Get the current bank - ELSE - LD A,(TPABNK) ; If not banked, assume TPA bank is active - ENDIF - PUSH AF ; Put on stack - - ; Setup for copy loop - LD (XBCSRC),HL ; Init working soruce adr - LD (XBCDST),DE ; Init working dest adr - LD H,B ; Move bytes to copy from BC... - LD L,C ; to HL to use as byte counter - - ; Copy loop -BNKCPY1: - INC L ; Set ZF to indicate... - DEC L ; if a partial page copy is needed - LD BC,100H ; Assume a full page copy, 100H bytes - JR Z,BNKCPY2 ; If full page copy, go do it - DEC B ; Otherwise, setup for partial page copy - LD C,L ; by making BC := 0L -BNKCPY2: - PUSH HL ; Save bytes left to copy - CALL BNKCPY3 ; Do it - POP HL ; Recover bytes left to copy - XOR A ; Clear CF - SBC HL,BC ; Reflect bytes copied in HL - JR NZ,BNKCPY1 ; If any left, then loop - - ; Restore entry bank & stack - POP AF ; Recover original bank - OUT (MPCL_RAM),A ; Set it - LD SP,(BCSSAV) ; Back to original stack - - ; Put source and dest bank back to default +MOVE: LD (ICNT),BC ; Save length of move + LD BC,(SRCBNK) ; Get Source (C) and Dest (B) Banks + RL H ; Move MSB of Source Addr to Carry + LD A,C ; .get Source Bank + JR NC,MOVB0 ; ..jump if Source < 8000H (Not Common Bank) + LD A,(TPABNK) ; Else Set to TPA Bank for Common Access +MOVB0: ADC A,0 ; ..add Carry to Bank # + RRA ; ...shift Bank # in position for Z-180 DMA + RR H ; .move Carry to Address Bit 7 + LD (ISRC+2),A ; Save Source Bank physical byte + LD (ISRC),HL ; ..and Save Source Address + RL D ; Move MSB of Dest Addr to Carry + LD A,B ; .Get Destination Bank + JR NC,MOVB1 ; ..jump if Source < 8000H (Not Common Bank) + LD A,(TPABNK) ; Else Set to TPA Bank for Common Access +MOVB1: ADC A,0 ; ..add Carry to Bank # + RRA ; ...shift into position for Z-180 DMA + RR D ; .move Carry to Address Bit 7 + LD (IDST+2),A ; Save Destination Bank byte + LD (IDST),DE ; ..and Save Destination Address + + LD HL,ISRC ; Point to DMA Initialization block + CALL DMAMOV ; ..and use the Z-180 DMA + LD HL,(TPABNK) ; Get TPA Bank # LD H,L ; .to both H and L LD (SRCBNK),HL ; ..set Source & Destination Bank # to TPA - - - RET ; Done - -BNKCPY3: - ; Switch to source bank - LD A,(SRCBNK) ; Get source bank - OUT (MPCL_RAM),A ; Set it - - ; Copy BC bytes from HL -> BUF - ; Allow HL to increment - PUSH BC ; Save copy length - LD HL,(XBCSRC) ; Point to source adr - LD DE,IBMVBF ; Setup buffer as interim destination - LDIR ; Copy BC bytes: src -> buffer - LD (XBCSRC),HL ; Update source adr - POP BC ; Recover copy length - - ; Switch to dest bank - LD A,(DSTBNK) ; Get destination bank - OUT (MPCL_RAM),A ; Set it - - ; Copy BC bytes from BUF -> HL - ; Allow DE to increment - PUSH BC ; Save copy length - LD HL,IBMVBF ; Use the buffer as source now - LD DE,(XBCDST) ; Setup final destination for copy - LDIR ; Copy BC bytes: buffer -> dest - LD (XBCDST),DE ; Update dest adr - POP BC ; Recover copy length - - RET ; Done + RET ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: ; Routine to Switch to Local Stack for Banked Operations @@ -109,7 +62,7 @@ BIOSTK: DEFB 0 ; NOP if not currently in bank, LD (USP),SP ; Save User's Stack Pointer LD SP,USP-1 ; ..and point locally, saving 1 byte for Bank PUSH AF ; Save entry A and Flags - LD A,(CURBNK) ; Get current bank + IN0 A,(BBR) ; Get current bank address LD (USP-1),A ; ..and save for exitting LD A,0C9H ; Disable other calls here LD (BIOSTK),A ; ..by poking a RETurn at entry @@ -125,8 +78,7 @@ BIOSTK: DEFB 0 ; NOP if not currently in bank, USRSTK: PUSH AF LD A,(USP-1) ; Get bank control byte from entry - LD (CURBNK),A ; WW: I ADDED THIS, IS IT RIGHT??? - OUT (MPCL_RAM),A ; ..and make it current + OUT0 (BBR),A ; ..and make it current XOR A LD (BIOSTK),A ; Patch NOP back in at start of code POP AF @@ -139,7 +91,7 @@ USRSTK: PUSH AF FRCLR: PUSH AF ; Save any entry in AF LD A,(USP-1) ; Get bank control byte - OUT (MPCL_RAM),A ; .and make current + OUT0 (BBR),A ; ..and make current XOR A LD (BIOSTK),A ; Patch NOP to enable stack switcher POP AF @@ -164,8 +116,12 @@ ABORT: LD SP,USP ; Insure stack is in Common Memory ; Uses : AF ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: -RETMEM: LD A,(CURBNK) - RET +RETMEM: IN0 A,(BBR) ; Read Bank Base Register + RRA ; Shift + RRA ; .to right + RRA ; ..to give Bank # + AND 1FH ; Mask off junk + RET ; ..and return it to caller ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: ; Set Bank into context. Save all Registers. @@ -182,7 +138,10 @@ SELMEM: LD (USRBNK),A ; Update user bank SELBNK: PUSH AF ; Save regs SELBN0: LD (CURBNK),A ; Save as current bank # - OUT (MPCL_RAM),A + ADD A,A ; Shift into position for Z-180 DMA regs + ADD A,A + ADD A,A + OUT0 (BBR),A ; ..and Set the bank offset POP AF ; restore regs RET @@ -232,78 +191,84 @@ FRJP: CALL BIOSTK ; Insure we are in a common stack ; Load A,(HL) from Alternate Bank (in Reg C) ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: -FRGETB: - PUSH BC - LD A,C - DI - OUT (MPCL_RAM),A - LD C,(HL) - LD A,(CURBNK) - OUT (MPCL_RAM),A +FRGETB: IN0 A,(BBR) ; Get current bank control byte + PUSH BC ; Save regs + LD B,A ; ..and entry bank + LD A,C ; Get source bank + ADD A,A ; Shift into position for Z-180 DMA regs + ADD A,A + ADD A,A + DI ; .no Ints here + OUT0 (BBR),A ; ..and Set the bank offset + LD C,(HL) ; Get the byte + LD A,B ; .entry bank + OUT0 (BBR),A ; ..and restore entry bank EI - LD A,C - POP BC + LD A,C ; Get the byte + POP BC ; ..and restore regs RET ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: ; Load DE,(HL) from Alternate Bank ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: -FRGETW: - LD A,C - DI - OUT (MPCL_RAM),A - LD E,(HL) +FRGETW: PUSH BC ; Save regs + LD B,A ; ..and entry bank + IN0 A,(BBR) ; Get current Bank Byte + LD (ASAVE),A ; ..saving locally + LD A,C ; Get source bank + ADD A,A ; Shift into position for Z-180 DMA regs + ADD A,A + ADD A,A + DI ; .no ints allowed here + OUT0 (BBR),A ; ..and Set the bank offset + LD E,(HL) ; Get Low byte INC HL - LD D,(HL) - DEC HL - LD A,(CURBNK) - OUT (MPCL_RAM),A - EI - RET + LD D,(HL) ; ..and High byte + DEC HL ; Retain addr pointer + JR GPEX ; ..and exit ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: ; Load (HL),A to Alternate Bank (in Reg C) ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: -FRPUTB: - PUSH BC - LD B,A - LD A,C - DI - OUT (MPCL_RAM),A - LD (HL),B - LD A,(CURBNK) - OUT (MPCL_RAM),A - EI - POP BC +FRPUTB: PUSH BC ; Save all regs + LD B,A ; Store byte temporarily + IN0 A,(BBR) ; Get current bank byte + LD (ASAVE),A ; ..saving in Common Memory + LD A,C ; Get destination bank + ADD A,A ; Shift into position for Z-180 DMA regs + ADD A,A + ADD A,A + DI ; .allowing no interrupts + OUT0 (BBR),A ; ..and Set the bank offset + LD (HL),B ; ..and stuff the byte +GPEX: LD A,(ASAVE) ; Retrieve Entry Bank byte + OUT0 (BBR),A ; ..and restore to active + EI ; Interrupts Ok now + LD A,B ; Restore byte + POP BC ; ..and rest of regs RET ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: ; Load (HL),DE to Alternate Bank ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: -FRPUTW: - LD A,C - DI - OUT (MPCL_RAM),A - LD (HL),E +FRPUTW: PUSH BC ; Save regs + LD B,A ; ..and entry bank + IN0 A,(BBR) ; Get current Bank Byte + LD (ASAVE),A ; ..saving locally + LD A,C ; Get source bank + ADD A,A ; Shift into position for Z-180 DMA regs + ADD A,A + ADD A,A + DI ; .no Ints allowed + OUT0 (BBR),A ; ..and Set the bank offset + LD (HL),E ; Save Low byte INC HL - LD (HL),D - DEC HL - LD A,(CURBNK) - OUT (MPCL_RAM),A - EI - RET - -;;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: -;; Copy BC bytes from (SRCBNK):HL -> (DSTBNK):DE -;; through buffer to allow for inter-bank copies -;;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: -; -;XBNKCPY: -; LD (SRCBNK),BC -; RET + LD (HL),D ; ..and High byte + DEC HL ; Retain addr pointer + JR GPEX ; ..and exit ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: DSEG @@ -326,14 +291,6 @@ IDST: DEFS 2 ; Destination Segment address DEFS 1 ; ..Destination Bank in physical RAM ICNT: DEFS 2 ; Number of bytes to move -; Working storage for BNKCPY - -XBCSRC: DEFS 2 -XBCDST: DEFS 2 - DEFS 32 -BCSTK: ; Temp stack for BNKCPY -BCSSAV: DEFW 2 ; To save original stack - ; The P112 does not need this buffer, but other versions might IF INROM OR [NOT IBMOVS] diff --git a/Source/BPBIOS/ibmv-ww.z80 b/Source/BPBIOS/ibmv-ww.z80 index ff73b0d9..908f2c1c 100644 --- a/Source/BPBIOS/ibmv-ww.z80 +++ b/Source/BPBIOS/ibmv-ww.z80 @@ -191,21 +191,5 @@ CURBNK: DEFS 1 ; Current bank # DMABNK: DEFS 1 ; Target bank # for disk xfers DEFS 64 ; 32 level stack USP: DEFS 2 ; User stack pointer -ASAVE: DEFS 1 ; Temp storage for User's A-Register - -;; Z-180 DMA transfer block for inter-bank moves -; -;ISRC: DEFS 2 ; Source Segment address -; DEFS 1 ; ..Source Bank in physical RAM -;IDST: DEFS 2 ; Destination Segment address -; DEFS 1 ; ..Destination Bank in physical RAM -;ICNT: DEFS 2 ; Number of bytes to move - -; The P112 does not need this buffer, but other versions might - - IF INROM OR [NOT IBMOVS] - DSEG -IBMVBF: DEFS 256 ; Inter-bank move buffer - ENDIF ;======================= End of IBMV-DX =========================== diff --git a/Source/BPBIOS/icfg-dx.z80 b/Source/BPBIOS/icfg-dx.z80 index e08421ca..fcef45eb 100644 --- a/Source/BPBIOS/icfg-dx.z80 +++ b/Source/BPBIOS/icfg-dx.z80 @@ -56,7 +56,7 @@ DPBADR: DEFW 0 ; Pointer to first XDPB in Alternate Bank ENDIF -AUTOCMD: DEFB 8,'ZEX Z41 ',0 ; Startup command for Z3 +AUTOCMD: DEFB 8,'STARTUP ',0 ; Startup command for Z3 ENVADR: DEFW Z3ENV ; Pointer to the Environment Descriptor diff --git a/Source/BPBIOS/icfg-z33.z80 b/Source/BPBIOS/icfg-ww.z80 similarity index 95% rename from Source/BPBIOS/icfg-z33.z80 rename to Source/BPBIOS/icfg-ww.z80 index ee827f3f..619fb8c8 100644 --- a/Source/BPBIOS/icfg-z33.z80 +++ b/Source/BPBIOS/icfg-ww.z80 @@ -23,7 +23,7 @@ OPT1 DEFL OPT1+[BANKED AND ZSDOS2 AND 8] ; Bit 3 = ALV/CSV in Banked RAM ; If set to 1, LDSYS will not load a ; new system over the running one. - DEFB 'B/P-DX' ; Six-char string for Text ID Matching + DEFB 'B/P-WW' ; Six-char string for Text ID Matching CONFIG: IOBYT: DEFB 10010100B ; LST:=PIO, AUX:=COM2, CON:=COM1 @@ -56,7 +56,7 @@ DPBADR: DEFW 0 ; Pointer to first XDPB in Alternate Bank ENDIF -AUTOCMD: DEFB 8,'ZEX Z33 ',0 ; Startup command for Z3 +AUTOCMD: AUTOCL ; Startup command for Z3 ENVADR: DEFW Z3ENV ; Pointer to the Environment Descriptor diff --git a/Source/BPBIOS/icfg-z34.z80 b/Source/BPBIOS/icfg-z34.z80 deleted file mode 100644 index c5193f64..00000000 --- a/Source/BPBIOS/icfg-z34.z80 +++ /dev/null @@ -1,187 +0,0 @@ -;::::::::::::::::::::::::::::::::::::::::::******************************** -; I/O Configuration Area ****** Hardware Specific ****** -; - D-X Designs Pty Ltd P112 - ******************************** -; -; 1.2 - 22 Aug 01 - Cleaned up for GPL release. HFB -; 1.1 - 18 Apr 97 - Modified to Add GIDE Definitions. HFB -; 1.0 - 27 Jan 97 - Initial Release for P112. HFB -;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: - -;*** * * * * * * * * * * W A R N I N G ! ! ! * * * * * * * * * * * * *** -;*** Do NOT alter any of the ordering or sizing of the following data *** -;*** locations or utilities will probably NOT function correctly! *** -;*** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *** - - CSEG -; Form Option Byte 1 - -OPT1 DEFL [BANKED AND 1] ; Bit 0 = unbanked/banked -OPT1 DEFL OPT1+[INROM AND 2] ; Bit 1 = Bank in RAM/Bank in ROM -OPT1 DEFL OPT1+[AUTOSL AND 4] ; Bit 2 = DPB Fixed/DPB Assignable -OPT1 DEFL OPT1+[BANKED AND ZSDOS2 AND 8] ; Bit 3 = ALV/CSV in Banked RAM -; Bit 7 is "Lock" flag for system loads -; If set to 1, LDSYS will not load a -; new system over the running one. - - DEFB 'B/P-DX' ; Six-char string for Text ID Matching - -CONFIG: -IOBYT: DEFB 10010100B ; LST:=PIO, AUX:=COM2, CON:=COM1 -SYSDRV: DEFB 0 ; System drive (a=0, b=1...) -OPTF1: DEFB OPT1 ; Option flags - -UABNK: DEFB BNKU ; Beginning of User Bank(s) if Banked System - ; (Ending Bank denoted by SYSBNK-1) -TPABNK: DEFB BNK0 ; TPA Bank Number if Banked System -SYSBNK: DEFB BNK2 ; Beginning of System Bank(s) if Banked System - ; (Ending Bank denoted by RAMBNK-1) -RAMBNK: DEFB BNK3 ; Base Bank Number for Ram Disk -MAXBNK: DEFB BNKM ; Highest permissible Bank Number -HICOMM: DEFB 80H ; Page address of start of high Common Memory -DPBSZ: DEFB DPBSIZ ; Size of DPB -NUMDPB: - IF BANKED - DEFB 0 ; Number of DPBs in Common RAM - DEFB NRDPB ; Number of Banked DPBs - ELSE - DEFB NRDPB ; Number of DPBs in Common RAM - DEFB 0 ; Number of Banked DPBs - ENDIF -DPBADR: - IF BANKED - DEFW 0 ; Pointer to dirst Common RAM XDPB - DEFW DPB ; Pointer to first XDPB in Alternate Bank - ELSE - DEFW DPB ; Pointer to first Common RAM XDPB - DEFW 0 ; Pointer to first XDPB in Alternate Bank - ENDIF - -AUTOCMD: DEFB 8,'ZEX Z34 ',0 ; Startup command for Z3 - -ENVADR: DEFW Z3ENV ; Pointer to the Environment Descriptor - -;------------ Banked User Area Control Information --------------- -; An existing User Area cannot exist in Bank 0 by decree. The User Area -; can therefore be used as a flag to determine whether such an area exists. -; The Bank Number is set in DEF-xx.LIB. To keep Page 0 equivalent free in -; the user bank, we offset values to 80H (it's just a good number). The -; top of each User Bank is 7FFFH as with all of the switched banks in -; a B/P Bios System. Banked applications should chain themselves together -; sequentially so that the end can be determined and space managed. - -UADAT: DEFB BNKU ; Flag for Banked User Area (0 if None) - DEFW 0080H ; Pointer to Start of User area in Bank - -;---------------- CPU Configuration Information ------------------ - -SPEED: DEFB MHZ ; Set to processor speed value in Configuration -WAITS: DEFB 00010010B ; Number of additional Memory & IO Wait states -; ||||++++--- # of IO Wait States (bits 3-0, only 1 & 0 used) -; ++++------- # of Memory Wait States (bits 7-4, only 5 & 4 used) - -RELOD0: DEFW 2560*MHZ ; 16-bit constant for counter/timer refresh - ; based on 50 mS Interrupts to Down Timer. - ; Use 2560 for 12.288/18.432MHz etc. Crystals, - ; 2500 for 16.000MHz Crystals. - -;-------- Physical Floppy Disk Configuration Information --------- -; The Physical Drive table consists of 5 bytes for each of 4 Floppy Drives -; thereby providing all necessary data to all types of controllers. -; -; 1 - Drive Characteristics Bits. The Bits have the following meanings: -; D D D D D D D D -; 7 6 5 4 3 2 1 0 -; | | | | | +-+-+---- Disk Size 000=Fixed; 001=8"; 010=5.25"; 011=3.5" (*) -; | | | | +---------- Single-Sided (0); Double-Sided (1) -; | | | +------------ (Reserved for Double-Step(1) in XDPH) -; | | +-------------- Drive Motor Control (1); Motor Always On (0) -; | +---------------- Max Speed is 5.25" (0); 8" & Hard Disk & Hi-Dens (1) -; +------------------ (Reserved for Single(1)/Double(0) Density in XDPH) -; (*) - 3.5" and 5.25" drives are treated the same for many formats with -; the drive bits being reduced to 010B in the BIOS code. -; 2 - Drive Step Rate (1 to 16 in increments of 1) in milliseconds -; 3 - Head Load Time (2 to 254 in increments of 2) in milliseconds -; 4 - Head Unload Time (16 to 240 in increments of 16) in milliseconds -; 5 - Number of Physical Tracks on Drive - -FDCSPEC: DEFB 6BH,3, 4,240,80 ; #1 (3"DSHD,3 mS Step,4mS HLT,255 mS HUT,80t) - DEFB 2AH,6,24,240,40 ; #2 (5"DS,6 mS Step,24mS HLT,255 mS HUT,40t) - DEFB 2AH,4,24,240,80 ; #3 (5"DS,4 mS Step,24mS HLT,255 mS HUT,80t) - DEFB 6AH,3, 4,240,80 ; #4 (5"DS,3 mS Step, 4mS HLT,255 mS HUT,80t) - -MONTIM: DEFB 100 ; Motor On Time (1 to 255) in tenths-of-seconds -SPINUP: DEFB 8 ; Spinup delay (1 to 255) in tenths-of-seconds -MXRTRY: DEFB 4 ; Maximum Number of retries on Floppy Opns - -IVCT: DEFW INTTBL ; Pointer to interrupt vectors - -;-------- Physical Hard Drive Configuration Information ---------- -; Hard Disk data begins w/Controller Type, followed by data for 3 drives. -; The first byte for each drive consists of a byte containing bit codes -; for SCSI Device, Logical Unit, and a bit indicating whether or not the -; drive is physically connected to the system. The configuration should -; match that contained in DPHHD-xx.LIB for Hard Drive partitions. -; Bit 7 6 5 4 3 2 1 0 -; | | | | | | | | -; | | | | | +-+-+-- Physical Device Number (0..6, 7 = Host) -; | | | | +-------- (reserved) -; | | | +---------- 1 = Drive Active, 0 = No Drive -; +-+-+------------ Logical Unit Number (usually 0 or 1) - -;..... -; The Controller Type Byte contains information needed to dictate the specific -; bytes to be used to communicate to a SASI/SCSI-connected Hard Drive. -; Additional bytes will be defined as needed, so please coordinate any -; extensions with the Authors to insure the generality of tools. - -CNTRLR: DEFB 80H ; Controller Types recognized are: - ; 0- Owl 5- Conner SCSI - ; 1- Adaptec ACB-4000A 6- Quantum SCSI - ; 2- Xebec 1410A/Shugart 1610-3 7- Maxtor SCSI - ; 3- Seagate SCSI 8- Syquest SCSI - ; 4- Shugart 1610-4 Minimal SCSI 80H- GIDE (IDE/ATA) - -; First drive (Parameters for Toshiba MK-1544 IDE) - -BITS DEFL 00000000B ; SCSI - Physical Device 0, Logical Unit 0 - ; IDE - Drive 0 = Master -BITS DEFL BITS+[UNIT_0 AND 10H] ; If active, set Bit 4 - -HDRV0: DEFB BITS ; Set Device, Unit, and Active bits - DEFW 581 ; Number of Cylinders - DEFB 2 ; Number of Heads - DEFW 36 ; SCSI - Cylinder # to start reduced write - ; IDE - Number of Sectors Per Track - DEFW 0000 ; Cylinder # to start precompensation - DEFB 0 ; Step Rate (0=3ms, 1=28us, 2=12us) - -; Second drive (Parameters for Seagate ST-125N SCSI) - -BITS DEFL 00000001B ; SCSI - Physical Device 1, Logical Unit 0 - ; IDE - Drive 1 = Slave -BITS DEFL BITS+[UNIT_1 AND 10H] ; If active, set Bit 4 - -HDRV1: DEFB BITS ; Set Device, Unit, and Active bits - DEFW 615 ; Syquest ST-125N - DEFB 4 - DEFW 0000 - DEFW 0000 - DEFB 0 - -; Third drive (Parameters for Miniscribe 8425 SCSI) - -BITS DEFL 00000010B ; Physical Device 2, Logical Unit 0 - ; IDE - (undefined) -BITS DEFL BITS+[UNIT_2 AND 10H] ; If active, set Bit 4 - - DEFB BITS ; Set Device, Unit, and Active bits - DEFW 615 - DEFB 4 - DEFW 615 - DEFW 300 - DEFB 2 - - DEFB 0,0,0,0,0 ; (Reserved) - -;======= End of Fixed Config ======== Device Config follows ======== - \ No newline at end of file diff --git a/Source/BPBIOS/icfg-z41.z80 b/Source/BPBIOS/icfg-z41.z80 deleted file mode 100644 index e08421ca..00000000 --- a/Source/BPBIOS/icfg-z41.z80 +++ /dev/null @@ -1,187 +0,0 @@ -;::::::::::::::::::::::::::::::::::::::::::******************************** -; I/O Configuration Area ****** Hardware Specific ****** -; - D-X Designs Pty Ltd P112 - ******************************** -; -; 1.2 - 22 Aug 01 - Cleaned up for GPL release. HFB -; 1.1 - 18 Apr 97 - Modified to Add GIDE Definitions. HFB -; 1.0 - 27 Jan 97 - Initial Release for P112. HFB -;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: - -;*** * * * * * * * * * * W A R N I N G ! ! ! * * * * * * * * * * * * *** -;*** Do NOT alter any of the ordering or sizing of the following data *** -;*** locations or utilities will probably NOT function correctly! *** -;*** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *** - - CSEG -; Form Option Byte 1 - -OPT1 DEFL [BANKED AND 1] ; Bit 0 = unbanked/banked -OPT1 DEFL OPT1+[INROM AND 2] ; Bit 1 = Bank in RAM/Bank in ROM -OPT1 DEFL OPT1+[AUTOSL AND 4] ; Bit 2 = DPB Fixed/DPB Assignable -OPT1 DEFL OPT1+[BANKED AND ZSDOS2 AND 8] ; Bit 3 = ALV/CSV in Banked RAM -; Bit 7 is "Lock" flag for system loads -; If set to 1, LDSYS will not load a -; new system over the running one. - - DEFB 'B/P-DX' ; Six-char string for Text ID Matching - -CONFIG: -IOBYT: DEFB 10010100B ; LST:=PIO, AUX:=COM2, CON:=COM1 -SYSDRV: DEFB 0 ; System drive (a=0, b=1...) -OPTF1: DEFB OPT1 ; Option flags - -UABNK: DEFB BNKU ; Beginning of User Bank(s) if Banked System - ; (Ending Bank denoted by SYSBNK-1) -TPABNK: DEFB BNK0 ; TPA Bank Number if Banked System -SYSBNK: DEFB BNK2 ; Beginning of System Bank(s) if Banked System - ; (Ending Bank denoted by RAMBNK-1) -RAMBNK: DEFB BNK3 ; Base Bank Number for Ram Disk -MAXBNK: DEFB BNKM ; Highest permissible Bank Number -HICOMM: DEFB 80H ; Page address of start of high Common Memory -DPBSZ: DEFB DPBSIZ ; Size of DPB -NUMDPB: - IF BANKED - DEFB 0 ; Number of DPBs in Common RAM - DEFB NRDPB ; Number of Banked DPBs - ELSE - DEFB NRDPB ; Number of DPBs in Common RAM - DEFB 0 ; Number of Banked DPBs - ENDIF -DPBADR: - IF BANKED - DEFW 0 ; Pointer to dirst Common RAM XDPB - DEFW DPB ; Pointer to first XDPB in Alternate Bank - ELSE - DEFW DPB ; Pointer to first Common RAM XDPB - DEFW 0 ; Pointer to first XDPB in Alternate Bank - ENDIF - -AUTOCMD: DEFB 8,'ZEX Z41 ',0 ; Startup command for Z3 - -ENVADR: DEFW Z3ENV ; Pointer to the Environment Descriptor - -;------------ Banked User Area Control Information --------------- -; An existing User Area cannot exist in Bank 0 by decree. The User Area -; can therefore be used as a flag to determine whether such an area exists. -; The Bank Number is set in DEF-xx.LIB. To keep Page 0 equivalent free in -; the user bank, we offset values to 80H (it's just a good number). The -; top of each User Bank is 7FFFH as with all of the switched banks in -; a B/P Bios System. Banked applications should chain themselves together -; sequentially so that the end can be determined and space managed. - -UADAT: DEFB BNKU ; Flag for Banked User Area (0 if None) - DEFW 0080H ; Pointer to Start of User area in Bank - -;---------------- CPU Configuration Information ------------------ - -SPEED: DEFB MHZ ; Set to processor speed value in Configuration -WAITS: DEFB 00010010B ; Number of additional Memory & IO Wait states -; ||||++++--- # of IO Wait States (bits 3-0, only 1 & 0 used) -; ++++------- # of Memory Wait States (bits 7-4, only 5 & 4 used) - -RELOD0: DEFW 2560*MHZ ; 16-bit constant for counter/timer refresh - ; based on 50 mS Interrupts to Down Timer. - ; Use 2560 for 12.288/18.432MHz etc. Crystals, - ; 2500 for 16.000MHz Crystals. - -;-------- Physical Floppy Disk Configuration Information --------- -; The Physical Drive table consists of 5 bytes for each of 4 Floppy Drives -; thereby providing all necessary data to all types of controllers. -; -; 1 - Drive Characteristics Bits. The Bits have the following meanings: -; D D D D D D D D -; 7 6 5 4 3 2 1 0 -; | | | | | +-+-+---- Disk Size 000=Fixed; 001=8"; 010=5.25"; 011=3.5" (*) -; | | | | +---------- Single-Sided (0); Double-Sided (1) -; | | | +------------ (Reserved for Double-Step(1) in XDPH) -; | | +-------------- Drive Motor Control (1); Motor Always On (0) -; | +---------------- Max Speed is 5.25" (0); 8" & Hard Disk & Hi-Dens (1) -; +------------------ (Reserved for Single(1)/Double(0) Density in XDPH) -; (*) - 3.5" and 5.25" drives are treated the same for many formats with -; the drive bits being reduced to 010B in the BIOS code. -; 2 - Drive Step Rate (1 to 16 in increments of 1) in milliseconds -; 3 - Head Load Time (2 to 254 in increments of 2) in milliseconds -; 4 - Head Unload Time (16 to 240 in increments of 16) in milliseconds -; 5 - Number of Physical Tracks on Drive - -FDCSPEC: DEFB 6BH,3, 4,240,80 ; #1 (3"DSHD,3 mS Step,4mS HLT,255 mS HUT,80t) - DEFB 2AH,6,24,240,40 ; #2 (5"DS,6 mS Step,24mS HLT,255 mS HUT,40t) - DEFB 2AH,4,24,240,80 ; #3 (5"DS,4 mS Step,24mS HLT,255 mS HUT,80t) - DEFB 6AH,3, 4,240,80 ; #4 (5"DS,3 mS Step, 4mS HLT,255 mS HUT,80t) - -MONTIM: DEFB 100 ; Motor On Time (1 to 255) in tenths-of-seconds -SPINUP: DEFB 8 ; Spinup delay (1 to 255) in tenths-of-seconds -MXRTRY: DEFB 4 ; Maximum Number of retries on Floppy Opns - -IVCT: DEFW INTTBL ; Pointer to interrupt vectors - -;-------- Physical Hard Drive Configuration Information ---------- -; Hard Disk data begins w/Controller Type, followed by data for 3 drives. -; The first byte for each drive consists of a byte containing bit codes -; for SCSI Device, Logical Unit, and a bit indicating whether or not the -; drive is physically connected to the system. The configuration should -; match that contained in DPHHD-xx.LIB for Hard Drive partitions. -; Bit 7 6 5 4 3 2 1 0 -; | | | | | | | | -; | | | | | +-+-+-- Physical Device Number (0..6, 7 = Host) -; | | | | +-------- (reserved) -; | | | +---------- 1 = Drive Active, 0 = No Drive -; +-+-+------------ Logical Unit Number (usually 0 or 1) - -;..... -; The Controller Type Byte contains information needed to dictate the specific -; bytes to be used to communicate to a SASI/SCSI-connected Hard Drive. -; Additional bytes will be defined as needed, so please coordinate any -; extensions with the Authors to insure the generality of tools. - -CNTRLR: DEFB 80H ; Controller Types recognized are: - ; 0- Owl 5- Conner SCSI - ; 1- Adaptec ACB-4000A 6- Quantum SCSI - ; 2- Xebec 1410A/Shugart 1610-3 7- Maxtor SCSI - ; 3- Seagate SCSI 8- Syquest SCSI - ; 4- Shugart 1610-4 Minimal SCSI 80H- GIDE (IDE/ATA) - -; First drive (Parameters for Toshiba MK-1544 IDE) - -BITS DEFL 00000000B ; SCSI - Physical Device 0, Logical Unit 0 - ; IDE - Drive 0 = Master -BITS DEFL BITS+[UNIT_0 AND 10H] ; If active, set Bit 4 - -HDRV0: DEFB BITS ; Set Device, Unit, and Active bits - DEFW 581 ; Number of Cylinders - DEFB 2 ; Number of Heads - DEFW 36 ; SCSI - Cylinder # to start reduced write - ; IDE - Number of Sectors Per Track - DEFW 0000 ; Cylinder # to start precompensation - DEFB 0 ; Step Rate (0=3ms, 1=28us, 2=12us) - -; Second drive (Parameters for Seagate ST-125N SCSI) - -BITS DEFL 00000001B ; SCSI - Physical Device 1, Logical Unit 0 - ; IDE - Drive 1 = Slave -BITS DEFL BITS+[UNIT_1 AND 10H] ; If active, set Bit 4 - -HDRV1: DEFB BITS ; Set Device, Unit, and Active bits - DEFW 615 ; Syquest ST-125N - DEFB 4 - DEFW 0000 - DEFW 0000 - DEFB 0 - -; Third drive (Parameters for Miniscribe 8425 SCSI) - -BITS DEFL 00000010B ; Physical Device 2, Logical Unit 0 - ; IDE - (undefined) -BITS DEFL BITS+[UNIT_2 AND 10H] ; If active, set Bit 4 - - DEFB BITS ; Set Device, Unit, and Active bits - DEFW 615 - DEFB 4 - DEFW 615 - DEFW 300 - DEFB 2 - - DEFB 0,0,0,0,0 ; (Reserved) - -;======= End of Fixed Config ======== Device Config follows ======== - \ No newline at end of file diff --git a/Source/BPBIOS/iio-dx.z80 b/Source/BPBIOS/iio-dx.z80 index 00587930..b8d0f4dc 100644 --- a/Source/BPBIOS/iio-dx.z80 +++ b/Source/BPBIOS/iio-dx.z80 @@ -111,6 +111,47 @@ PIO1: DEFB 'PIO1' ; 4-Char ID DEFW ISTRUE ; Null Input Status ENDIF + IF MORDEV AND NOT MOVCPM ; Include additional devices +; Add Expansion Char IO here with Device format as above + + IF ESCC_B +COM3: DEFB 'COM3' ; 4-Char ID + DEFB 11101010B ; Baud Rate (115.2k Max, 9600 Set) + DEFB 11100001B ; Config Byte (In,Out,CTS/RTS control,1 Stop) + DEFB 0FFH ; Input Data Mask + DEFB 0FFH ; Output Data Mask + + DEFW COM3OT ; COM 3 Byte Output + DEFW COM3OS ; COM 3 Output Status + DEFW COM3IN ; COM 3 Byte Input + DEFW COM3IS ; COM 3 Input Status + ENDIF + IF ASCI_0 +COM4: DEFB 'COM4' ; 4-Char ID + DEFB 11001010B ; Baud Rate (38.4k Max, 9600 Set) + DEFB 11100001B ; Config Byte (In,Out,CTR/RTS control, 1 Stop) + DEFB 0FFH ; Input Data Mask + DEFB 0FFH ; Output Data Mask + + DEFW COM4OT ; COM 4 Byte Output + DEFW COM4OS ; COM 4 Output Status + DEFW COM4IN ; COM 4 Byte Input + DEFW COM4IS ; COM 4 Input Status + ENDIF + IF ASCI_1 +COM5: DEFB 'COM5' ; 4-Char ID + DEFB 11001010B ; Baud Rate (38.4k Max, 9600 Set) + DEFB 11100001B ; Config Byte (In,Out,CTR/RTS control, 1 Stop) + DEFB 0FFH ; Input Data Mask + DEFB 0FFH ; Output Data Mask + + DEFW COM5OT ; COM 5 Byte Output + DEFW COM5OS ; COM 5 Output Status + DEFW COM5IN ; COM 5 Byte Input + DEFW COM5IS ; COM 5 Input Status + ENDIF + ENDIF ;Mordev & Not Movcpm + DEFB 0 ; - End-of-Table marker MAXBDV EQU [$-DEVCFG-1]/[COM2-COM1] ; Number of Character Devices Defined @@ -120,117 +161,77 @@ DEVTBL: LD HL,DEVCFG ; BYTE device table ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: ; COM1 Drivers ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: - - IF HBIOS -; Uses HBIOS +; Uses Z80182 SCC Channel A (Default to Console) ;..... ; COM1 Input Status Test +; Bit 0 of SCC Ch.A Control Port signifies Char Ready -COM1IS: - PUSH BC - PUSH DE - PUSH HL - LD BC,0200H + HB_IODEV ; Func=$02 (IS), Device/Unit=HB_IODEV - CALL HBX_INVOKE - POP HL - POP DE - POP BC +COM1IS: IN0 A,(SCCACNT) ; Console Input Status + RRA ; Input Ready = Bit0 -> Carry + SBC A,A ; A=00 if Not Ready, FF if Char Ready RET ;..... ; COM1 Input Routine ; Remain in Loop until Char ready, then Return Char in A -COM1IN: - PUSH DE - PUSH HL - LD BC,0000H + HB_IODEV ; Func=$00 (IN), Device/Unit=HB_IODEV - CALL HBX_INVOKE - LD C,E - POP HL - POP DE - RET - -;..... -; COM1 Output Status Test - -COM1OS: - PUSH BC - PUSH DE - PUSH HL - LD BC,0300H + HB_IODEV ; Func=$03 (OS), Device/Unit=HB_IODEV - CALL HBX_INVOKE - POP HL - POP DE - POP BC - RET - -;..... -; COM1 Output Routine (Byte to Send in C) - -COM1OT: - PUSH BC - PUSH DE - PUSH HL - LD E,C ; Character to E - LD BC,0100H + HB_IODEV ; Func=$01 (OT), Device/Unit=HB_IODEV - CALL HBX_INVOKE - POP HL - POP DE - POP BC - RET - - ELSE -;..... -; COM1 Input Status Test - -COM1IS: IN A,(_LSR) ; Input Status Reg Byte - RRA ; Rcv Rdy Bit[0] -> Carry - SBC A,A ; A=00 if Not Ready, FF if Char received - RET - -;..... -; COM1 Input Routine - -COM1IN: CALL COM1IS ; Char Ready? +COM1IN: CALL COM1IS ; Console input from SCC Ch.A Ready? JR Z,COM1IN ; ..loop if Not - IN A,(_RBR) ; Else Read Receive Buffer - LD C,A ; Save byte - LD A,(COM1+6) ; .get mask - AND C ; ..apply it + IN0 A,(SCCAD) ; Else Read SCC Ch.A Data + IF MOVCPM ; (No Swap allowed) + LD C,A ; Store byte temporarily + LD A,(COM1+6) ; .get Input mask + AND C ; ..and apply to byte + ELSE ; (Swapping permitted) +IPAT1: AND $-$ ; Char Mask patched in Config + ENDIF ;Movcpm RET ;..... ; COM1 Output Status Test COM1OS: - IN A,(_LSR) ; Read Status Reg - AND 20H ; Mask Bit of interest - RET Z ; ..return if nothing valid - OR 0FFH ; Else set flags for Ready + IF XONOFF + LD A,(COM1+5) ; Get this Chan's Config settings + AND 00010000B ; Xon/Xoff in use? + JR Z,COM1O0 ; ..jump if Not + LD A,(COM1WT) ; Else get Current flow status + RLA + LD A,00 ; (prepare for stopped) + JR C,SOSTV ; ..jump to return Not Ready if Stopped +COM1O0: + ENDIF ;Xonoff + IN0 A,(SCCACNT) ; Read SCC Ch.A Control Reg + RRA ; Output Ready = Bit 2 + RRA + RRA ; -> Carry + SBC A,A ; A=00 if Not Ready, FF if Xmt Buffer Empty RET ;..... -; COM1 Output Routine +; COM1 Output Routine (Byte to Send in C) -COM1OT: CALL COM1OS ; Test if ready - JR Z,COM1OT ; ..loop if not +COM1OT: CALL COM1OS ; Output to SCC Ch.A Ready? + JR Z,COM1OT ; ..loop if Not + IF MOVCPM ; (No Swap allowed) LD A,(COM1+7) ; Get output mask - AND C ; apply - OUT (_THR),A ; and send char to Xmt Holding Reg + AND C ; .apply to byte + ELSE ; (Swapping permitted) + LD A,C ; Get Char +OPAT1: AND $-$ ; mask as set in Config + ENDIF ; Movcpm + OUT0 (SCCAD),A ; and send RET - ENDIF - PAGE ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: ; COM2 Drivers ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: -; Uses generic 16550 UART +; Uses 16550-compatible SMC FDC37C665 Serial Port (defaults to Aux) ;..... ; COM2 Input Status Test -COM2IS: IN A,(_LSR) ; Input Status Reg Byte +COM2IS: IN0 A,(_LSR) ; Input Status Reg Byte RRA ; Rcv Rdy Bit[0] -> Carry SBC A,A ; A=00 if Not Ready, FF if Char received RET @@ -240,17 +241,41 @@ COM2IS: IN A,(_LSR) ; Input Status Reg Byte COM2IN: CALL COM2IS ; Char Ready? JR Z,COM2IN ; ..loop if Not - IN A,(_RBR) ; Else Read Receive Buffer + IN0 A,(_RBR) ; Else Read Receive Buffer + IF MOVCPM ; (No Swap allowed) LD C,A ; Save byte LD A,(COM2+6) ; .get mask AND C ; ..apply it + ELSE ; (Swapping permitted) +IPAT2: AND $-$ ; Mask as set in Config + ENDIF ;Movcpm RET ;..... ; COM2 Output Status Test COM2OS: - IN A,(_LSR) ; Read Status Reg + IF XONOFF + LD A,(COM2+5) ; Get Config Byte + AND 00010000B ; Xon/Xoff Active? + JR Z,COM2O0 ; ..jump if Not + LD A,(COM2WT) ; Get Flags Byte + RLA ; Xoff to Carry + LD A,0 ; (prepare for Xoff active) + JR C,SOSTV ; ..jump if Waiting to Return Not Rdy +COM2O0: ;..else fall thru to Check Real Status.. + ENDIF ;xonoff + IF RTSCTS + LD A,(COM2+5) ; Get this Chan's Config settings + AND 00100000B ; RTS/CTS in use? + JR Z,COM2O1 ; ..jump if Not + IN0 A,(_MMSR) ; Else Get Port 1 Modem Status + BIT 4,A ; Clear-To-Send? + LD A,0 ; (prepare for No) + JR Z,SOSTV ; ..jump if Not +COM2O1: + ENDIF ;Rtscts + IN0 A,(_LSR) ; Read Status Reg SOSTV: AND 20H ; Mask Bit of interest RETST: RET Z ; ..return if nothing valid ISTRUE: OR 0FFH ; Else set flags for Ready @@ -261,9 +286,14 @@ ISTRUE: OR 0FFH ; Else set flags for Ready COM2OT: CALL COM2OS ; Test if ready JR Z,COM2OT ; ..loop if not + IF MOVCPM ; (No Swap allowed) LD A,(COM2+7) ; Get output mask AND C ; apply - OUT (_THR),A ; and send char to Xmt Holding Reg + ELSE ; (Swapping permitted) + LD A,C ; Get Output Char +OPAT2: AND $-$ ; mask as set in Config + ENDIF ;Movcpm + OUT0 (_THR),A ; and send char to Xmt Holding Reg RET PAGE @@ -284,12 +314,398 @@ PIO1IN: JP ISFALSE ; Not implemented ;..... ; Parallel Output Status Test -PIO1OS: JP ISTRUE ; Not implemented +PIO1OS: IN0 A,(SPORT) ; Read Port Status + RLA ; Status Bit [7] -> Carry + SBC A,A ; A=0 if Not Ready, FF if Ready to Send + RET ;..... ; Parallel Output Routine -PIO1OT: JP ISFALSE ; Not implemented +PIO1OT: CALL PIO1OS ; List on the parallel device + JR Z,PIO1OT + IF MOVCPM ; (No Swap Allowed) + LD A,(PIO1+7) ; Get output mask + AND C ; ..and apply to char + ELSE ; (Swapping permitted) + LD A,C ; Get Output Char +OPATP: AND $-$ ; .mask as set in Config + ENDIF ;Movcpm + OUT0 (DPORT),A ; Latch the output byte to Data Port + LD A,0DH + OUT0 (CPORT),A ; Strobe (STB) = 1 to Control Port + NOP ; (delay) + NOP + LD A,0CH + OUT0 (CPORT),A ; then Strobe = 0 to Control Port + RET + PAGE + +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +;---->> Additional Driver Code goes Here <<---- +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; To constrain the size of the boot system to available space on +; Floppy Disks, The additional drivers are only included if a +; banked system is being assembled, and "MorDev" is set TRUE. + + IF MORDEV AND NOT MOVCPM +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; COM3 Driver +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Z80182 SCC Channel B, Auxiliary Serial Port + IF ESCC_B +;..... +; COM3 Input Status Test +; Bit 0 of SCC Ch.B Control Port signifies Char Ready + +COM3IS: IN0 A,(SCCBCNT) ; Input Status + RRA ; Input Ready = Bit0 -> Carry + SBC A,A ; A=00 if Not Ready, FF if Char Ready + RET + +;..... +; COM3 Input Routine +; Remain in Loop until Char ready, then Return Char in A + +COM3IN: CALL COM3IS ; Console input from SCC Ch.B Ready? + JR Z,COM3IN ; ..loop if Not + IN0 A,(SCCBD) ; Else Read SCC Ch.B Data + IF MOVCPM ; (No Swap allowed) + LD C,A ; Store byte temporarily + LD A,(COM3+6) ; .get Input mask + AND C ; ..and apply to byte + ELSE ; (Swapping permitted) +IPAT3: AND $-$ ; Char Mask patched in Config + ENDIF ;Movcpm + RET + +;..... +; COM3 Output Status Test + +COM3OS: + IF XONOFF + LD A,(COM3+5) ; Get this Chan's Config settings + AND 00010000B ; Xon/Xoff in use? + JR Z,COM3O0 ; ..jump if Not + LD A,(COM3WT) ; Else get Current flow status + RLA + LD A,00 ; (prepare for stopped) + JR C,SOSTV ; ..jump to return Not Ready if Stopped +COM3O0: + ENDIF ;Xonoff + IN0 A,(SCCACNT) ; Read SCC Ch.A Control Reg + RRA ; Output Ready = Bit 2 + RRA + RRA ; -> Carry + SBC A,A ; A=00 if Not Ready, FF if Xmt Buffer Empty + RET + +;..... +; COM3 Output Routine (Byte to Send in C) + +COM3OT: CALL COM3OS ; Output to SCC Ch.B Ready? + JR Z,COM3OT ; ..loop if Not + IF MOVCPM ; (No Swap allowed) + LD A,(COM3+7) ; Get output mask + AND C ; .apply to byte + ELSE ; (Swapping permitted) + LD A,C ; Get Char +OPAT3: AND $-$ ; mask as set in Config + ENDIF ;Movcpm + OUT0 (SCCBD),A ; and send + RET + ENDIF ;Escc_b + +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; ASCI0 Driver Routines +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + IF ASCI_0 + IF NOT BUFFA0 +;..... +; COM4 Input Status Test + +COM4IS: IN0 A,(STAT0) ; Get Status byte + RLA ; RDRF Bit to Carry + SBC A,A ; set A=0 if Not Rdy, FF if Ready + RET + +;..... +; COM4 Input Routine + +COM4IN: CALL COM4IS ; Anything ready? + JR Z,COM4IN ; ..loop if Not + IN0 A,(RDR0) + IF MOVCPM ; (No Swap allowed) + LD C,A ; Store byte temporarily + LD A,(COM4+6) ; get input mask + AND C ; apply to byte + ELSE ; (swapping permitted) +IPAT4: AND $-$ ; Char Mask patched in Config + ENDIF ;Movcpm + RET + ELSE ; Proceed with Buffered input +;..... +; COM4 Input Status Test (Buffered) + +COM4IS: LD A,(COM4Q) ; Get COM4 Queue Char Count + OR A ; Anything there? + JR RETST ; ..set appropriate flag and exit + +;..... +; COM4 Input Routine (Buffered) + +COM4IN: CALL COM4IS ; Anything there? + JR Z,COM4IN ; ..loop if Not + DI + PUSH HL ; Save Regs + PUSH BC + LD HL,COM4Q+QSIZE ; Point to end of Input Buffer + LD BC,QSIZE*256 ; length to B, Null in C + +; "Pop" character from the Buffer + +COM4LP: LD A,(HL) ; Get a byte + LD (HL),C ; store Null 1st time, else character + LD C,A ; move previous char for later save + DEC HL ; down to previous char + DJNZ COM4LP ; ..loop til Done + DEC (HL) ; Decrement Count in Queue + IF MOVCPM ; (No Swap Allowed) + LD A,(COM4+6) ; Get Input Mask + AND C ; apply setting flags based on Char + ELSE ; (swapping permitted) +IPAT4: AND $-$ ; Mask as set in Config + ENDIF ;Movcpm + POP BC ; Restore Regs + POP HL + EI + RET + ENDIF ;BuffA0 + +;..... +; COM4 Output Status Test + +COM4OS: IN0 A,(STAT0) ; ASCI0 Output Status + RRA ; TDRE Bit + RRA ; to Carry + SBC A,A ; set status, A=0 if Not ready, FF if Rdy + RET + +;..... +; COM4 Output Routine + +COM4OT: CALL COM4OS ; Ready to Send? + JR Z,COM4OT ; ..loop if Not + IF MOVCPM ; (No Swap allowed) + LD A,(COM4+7) ; Get output mask + AND C ; apply to byte + ELSE ; (swapping permitted) + LD A,C ; Get Char +OPAT4: AND $-$ ; mask as set in Config + ENDIF ;Movcpm + OUT0 (TDR0),A ; and Send + RET + +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Interrupt service routines for ASCI0 +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + IF BUFFA0 +RCAA: LD (INTSP),SP + LD SP,INTSP + PUSH AF + PUSH BC + PUSH HL + + IN0 A,(RDR0) ; Get character from ASCI0 + LD C,A ; ..save it + + IF XONOFF + LD A,(COM4+5) ; Get Config Byte + AND 00010000B ; Xon/Xoff Active? + JR Z,RCAA0 ; ..jump if Not + LD HL,COM4WT ; Else Point to Flags Byte + LD A,C ; get Byte Back + CP XON ; Is it Xon? + JR NZ,RCAA1 ; ..jump if Not + RES 7,(HL) ; Else Enable Sending again + JR RCAAX ; and Exit + +RCAA1: CP XOFF ; Is it Xoff? + JR NZ,RCAA0 ; ..jump if Not to add to Queue + SET 7,(HL) ; Else Stop Sending + JR RCAAX ; and Exit + ENDIF ;Xonoff + +RCAA0: LD HL,COM4Q ; Point to char count + LD A,(HL) ; ..and get it + INC A ; Bump + CP QSIZE ; Buffer Full? + JR NC,RCAAX ; ..exit if so + LD (HL),A ; Else save new char count + CALL ADDAHL ; Offset to storage in Queue + LD (HL),C ; ..and save the character +RCAAX: POP HL ; Restore Regs + POP BC + POP AF + LD SP,(INTSP) ; and Entry Stack Ptr + EI ; Ints back On + RET + ENDIF ;BuffA0 + ENDIF ;Asci_0 + +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; ASCI1 Driver Routines +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + IF ASCI_1 + IF NOT BUFFA1 +;..... +; COM5 Input Status Test + +COM5IS: IN0 A,(STAT1) ; Get Status byte + RLA ; RDRF Bit to Carry + SBC A,A ; set A=0 if Not Rdy, FF if Ready + RET + +;..... +; COM5 Input Routine + +COM5IN: CALL COM5IS ; Anything ready? + JR Z,COM5IN ; ..loop if Not + IN0 A,(RDR1) + IF MOVCPM ; (No Swap allowed) + LD C,A ; Store byte temporarily + LD A,(COM5+6) ; get input mask + AND C ; apply to byte + ELSE ; (swapping permitted) +IPAT5: AND $-$ ; Char Mask patched in Config + ENDIF ;Movcpm + RET + + ELSE ;proceed w/buffered input +;..... +; COM5 Input Status Test (Buffered) + +COM5IS: LD A,(COM5Q) ; Get COM5 Queue Char Count + OR A ; Anything there? + JP RETST + +;..... +; COM5 Input Routine (Buffered) + +COM5IN: CALL COM5IS ; COM5 input + JR Z,COM5IN + DI + PUSH HL ; Save registers + PUSH BC + LD HL,COM5Q+QSIZE ; Point to end of Type ahead Buffer + LD BC,QSIZE*256 ; Length in B, Null in C + +; "Pop" character from the Buffer + +COM5LP: LD A,(HL) ; Get a character + LD (HL),C ; Store Null 1st time, else character + LD C,A ; Move previous char for later save + DEC HL ; down to previous char + DJNZ COM5LP ; Loop til done + DEC (HL) ; Decrement Count in Queue + IF MOVCPM ; (No Swap Allowed) + LD A,(COM5+6) ; Get input mask + AND C ; apply setting flags based on char + ELSE ; (Swapping permitted) +IPAT5: AND $-$ ; Mask as set in Config + ENDIF ;Movcpm + POP BC ; Restore regs + POP HL + EI + RET + ENDIF ;buffered + +;..... +; COM5 Output Status Test + +COM5OS: IN0 A,(STAT1) ; ASCI1 Output Status + RRA ; TDRE Bit + RRA ; to Carry + SBC A,A ; set status, A=0 if Not ready, FF if Rdy + RET + +;..... +; COM5 Output Routine + +COM5OT: CALL COM5OS ; Ready to Send? + JR Z,COM5OT ; ..loop if Not + IF MOVCPM ; (No Swap allowed) + LD A,(COM5+7) ; Get output mask + AND C ; apply to byte + ELSE ; (swapping permitted) + LD A,C ; Get Char +OPAT5: AND $-$ ; mask as set in Config + ENDIF ;Movcpm + OUT0 (TDR1),A ; and Send + RET + +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Interrupt service routines for ASCI1 +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + IF BUFFA1 +RCAB: LD (INTSP),SP + LD SP,INTSP + PUSH AF + PUSH BC + PUSH HL + + IN0 A,(RDR1) ; Get character from ASCI1 + LD C,A ; ..save it + + IF XONOFF + LD A,(COM5+5) ; Get Config Byte + AND 00010000B ; Xon/Xoff Active? + JR Z,RCAB0 ; ..jump if Not + LD HL,COM5WT ; Else Point to Flags Byte + LD A,C ; get Byte Back + CP XON ; Is it Xon? + JR NZ,RCAB1 ; ..jump if Not + RES 7,(HL) ; Else Enable Sending again + JR RCABX ; and Exit + +RCAB1: CP XOFF ; Is it Xoff? + JR NZ,RCAB0 ; ..jump if Not to add to Queue + SET 7,(HL) ; Else Stop Sending + JR RCABX ; and Exit + ENDIF ;Xonoff +RCAB0: LD HL,COM5Q ; Point to char count + LD A,(HL) ; ..and get it + INC A ; Bump + CP QSIZE ; Buffer Full? + JR NC,RCABX ; ..exit if so + LD (HL),A ; Else save new char count + CALL ADDAHL ; Offset to storage in Queue + LD (HL),C ; ..and save the character +RCABX: POP HL ; Restore Regs + POP BC + POP AF + LD SP,(INTSP) ; and Entry Stack Ptr + EI ; Ints back On + RET + ENDIF ;BuffA1 + ENDIF ;Asci_1 + +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Skeletons for Additional Expansion IO +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +;..... +; COMx Input Status (Non-buffered) +COMxIS: +;..... +; COMx Input Routine (Non-buffered) +COMxIN: +;..... +; COMx Output Status (Non-buffered) +COMxOS: +;..... +; COMx Output Routine (Non-buffered) +COMxOT: + ENDIF ;Mordev ;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: ;:: I n t e r r u p t T a b l e :: @@ -306,8 +722,16 @@ INTTBL: DEFW BADINT ; DMA Channel 0 DEFW BADINT ; DMA Channel 1 DEFW BADINT ; Clocked Serial IO + IF MORDEV AND ASCI_0 AND BUFFA0 + DEFW RCAA ; ASCI 0 + ELSE DEFW BADINT ; ASCI 0 if Not Interrupt/Mordev + ENDIF + IF MORDEV AND ASCI_1 AND BUFFA1 + DEFW RCAB ; ASCI 1 + ELSE DEFW BADINT ; ASCI 1 if Not Interrupt/Mordev + ENDIF ; Error trap for unimplemented Interrupts @@ -329,4 +753,544 @@ DEVINI: JDVINI: ENDIF - RET ; WW +; Synchronize Environment Descriptor Speed byte to Bios CPU Clock Speed setting + + LD A,(SPEED) ; Get Processor Speed from Bios Setting + LD HL,(ENVADR) ; Get ENV Address + LD L,2BH ; offset to CPU Clock rate + LD (HL),A ; and slam it into the ENV + +; Set Clock Rate and Dividers before we initialize devices + ;;--(ENH182 doesn't seem to be variable at present) + +;;-- LD C,0 ; (preset ESCC Div-by-1, No Halt) +;;-- CP 20 ; < 20 MHz? +;;-- JR C,IsBy1 ; ..jump if So +;;-- LD C,00001000B ; Else Divide ESCC clock by 2 + ; |||||+++- (reserved) + ; ||||+---- 0 = ESCC Clk Div-by-1, 1 = ESCC Clk Div-by-2 + ; |||+----- 1 = TxDA Disable on Halt + ; ||+------ 1 = Force Halt + ; ++------- (reserved) +;;--IsBy1: OUT0 (ENH182),C ; Set ESC Divider + + LD C,10000000B ; (preset flags) + ; |+++++++- Normal Drive, Standby/Idle Disabled + ; +-------- 0 = XTAL/2 Rate, 1 = XTAL/1 Rate + CP 12+1 ; Is Clock Speed > 12 MHz? + JR NC,ISHI ; jump if Yes + LD C,0 ; Else Set for Low (Xtal / 2) Speed +ISHI: OUT0 (1FH),C ; and Set Speed + +; Set Configured Wait States for IO and Memory + + LD A,(WAITS) ; Get # Wait states for Memory & IO + AND 00110011B ; Mask off all but 2 LSBs in each nybble + RLCA ; move Mem bits to B7,6 + RLCA + LD C,A ; Save partially shifted byte + RLCA ; Move IO to Bits 5,4 + RLCA + OR C ; OR in Memory waits + AND 11110000B ; and mask off all others + OR 00001100B ; Edge Triggering for both DMA channels + OUT0 (DCNTL),A ; set parameters + +; Set Refresh to Assembled Setting + + IF REFRSH ; (Must be TRUE if using Dynamic RAM) + LD A,83H ; Set refreshing on for Dynamic Rams + ELSE ; (Don't need wasted time if Static Memory) + LD A,00H ; Else disable Refresh cycles + ENDIF + OUT0 (RCR),A ; Set Refresh timing specs + +; Set Reload constant to values in header + + LD HL,(RELOD0) ; Get the timer reload constant + OUT0 (RLDR0L),L ; send low byte + OUT0 (RLDR0H),H ; and hi byte + +; Configure COM1 IO Masks and Channel characteristics + + IF NOT MOVCPM ; (Swapping permitted) + LD DE,C1NAM ; Point to COM1 Name String + CALL SETPTR ; locate data returning ptr + JR Z,DEVIN0 ; jump to next if No Device Name + LD A,(HL) ; Else Get Dev+7 Mask + LD (OPAT1+1),A ; patch + DEC HL ; Down to Input Mask @ Dev+6 + LD A,(HL) ; fetch + LD (IPAT1+1),A ; and patch + DEC HL ; Down to Config byte @ Dev+5 + ELSE ; (No Swap Allowed) + LD HL,DEVCFG+5 ; Point to second COM1 Config byte + ENDIF ;Movcpm + LD BC,SCCACNT ; Point to SCC Channel A Control Port + CALL INSCC ; Set the SCC parameters + +; Configure COM2 IO Masks and Channel Characteristics + +DEVIN0: + IF NOT MOVCPM ; (Swapping permitted) + LD DE,C2NAM ; Point to COM2 Name String + CALL SETPTR ; locate data returning ptr + JR Z,DEVIN1 ; ..jump to next if No Device Name + LD A,(HL) ; Else Get Dev+7 Mask + LD (OPAT2+1),A ; patch + DEC HL ; Down to Input Mask @ Dev+6 + LD A,(HL) ; fetch + LD (IPAT2+1),A ; and patch + DEC HL ; Down to Config Byte @ Dev+5 + ELSE ; (No Swap Allowed) + LD HL,DEVCFG+[COM2-COM1]+5 ; Point to second COM2 Config byte + ENDIF ;Movcpm + CALL IOI550 ; Initialize 16550-compatible 37C665 Port + +; Configure Parallel Port IO Masks and Characteristics and Reset + + IF NOT MOVCPM ; (No Swap Allowed) +DEVIN1: LD DE,P1NAM ; Point to PIO1 Name String + CALL SETPTR ; locate data returning ptr + JR Z,DEVIN2 ; jump if No Device Name + LD A,(HL) ; Get Dev+7 Mask + LD (OPATP+1),A ; and patch +DEVIN2: + ENDIF ;Movcpm + ; Reset Parallel port on FDC37C665 Multi-IO Chip + LD A,00001000B ; Command to Reset Parallel Port + OUT0 (CPORT),A ; by bringing INIT Low + LD BC,4000 +PDly: DEC BC ; and + LD A,B + OR C + JR NZ,PDly ; holding there for a while + LD A,00001100B ; Re-activate Port + OUT0 (CPORT),A ; by bringing INIT High + IN0 A,(SPORT) ; Clear by + IN0 A,(SPORT) ; reading status twice + + IF MORDEV AND NOT MOVCPM +; -- Add necessary Initialization for Expansion Drivers here -- + IF ESCC_B + ; Initialize ESCC Channel B + LD DE,C3NAM ; Point to COM3 Name String + CALL SETPTR ; locate data returning ptr + JR Z,DEVIN3 ; jump to next if No Device Name + LD A,(HL) ; Else Get Dev+7 Mask + LD (OPAT3+1),A ; patch + DEC HL ; Down to Input Mask @ Dev+6 + LD A,(HL) ; fetch + LD (IPAT3+1),A ; and patch + DEC HL ; Down to Config byte @ Dev+5 + LD BC,SCCBCNT ; Point to SCC Channel B Control Port + CALL INSCC ; Set the SCC parameters + ENDIF ;Escc_b +DEVIN3: + IF ASCI_0 + ; Initialize ASCI0 + LD DE,C4NAM ; Point to COM4 Name String + CALL SETPTR ; locate data returning ptr + JR Z,DEVIN4 ; jump to next if No Device Name + LD A,(HL) ; Else Get Dev+7 Mask + LD (OPAT4+1),A ; patch + DEC HL ; Down to Input Mask @ Dev+6 + LD A,(HL) ; fetch + LD (IPAT4+1),A ; and patch + DEC HL ; Down to Config byte @ Dev+5 + LD BC,CNTLA0 ; B=0 for Hi-order IO Address, C=CNTLA0 Port + LD E,01100000B ; CNTLA0 Mask, RE, TE, RTS* + CALL INASCI ; and set a couple of bytes +DEVIN4: + IF BUFFA0 + LD A,00001000B ; Enable ASCI0 Interrupts + ELSE + XOR A ; No Interrupts + ENDIF + OUT0 (STAT0),A + ENDIF ;Asci_0 + IF ASCI_1 + ; Initialize ASCI1 + LD DE,C5NAM ; Point to COM5 Name String + CALL SETPTR ; locate data returning ptr + JR Z,DEVIN5 ; jump to next if No Device Name + LD A,(HL) ; Else Get Dev+7 Mask + LD (OPAT5+1),A ; patch + DEC HL ; Down to Input Mask @ Dev+6 + LD A,(HL) ; fetch + LD (IPAT5+1),A ; and patch + DEC HL ; Down to Config byte @ Dev+5 + LD BC,CNTLA1 ; B=0 for Hi-order IO Address, C=CNTLA1 Port + LD E,01110000B ; CNTLA1 Mask, RE, TE, Internal Clk + CALL INASCI ; and set a couple of bytes +DEVIN5: + IF BUFFA1 + LD A,00001100B ; Enable ASCI1 Interrupts & CTS1* + ELSE + LD A,00000100B ; No Interrupts, Enable CTS1* + ENDIF + OUT0 (STAT1),A + ENDIF ;Asci_1 + ENDIF ;Mordev & Not Movcpm + +; Set IOByte(s) to Configured Device Settings + + IF BANKED + LD A,(TPABNK) ; Get Bank # for TPA + LD C,A ; and set for destination + LD HL,0003H ; Point to IOBYTE + LD A,(IOBYT) ; get the new settings + CALL FRPUTB ; and stuff it in TPA bank + ENDIF + LD A,(IOBYT) ; If Non-banked, just get the byte + LD (0003H),A ; and stuff it, else stuff in SYStem bank + +; De-Select any IDE Drives to force re-initialization on first select + + IF IDE + OR 0FFH ; Set all bits + LD (hdUnit),A ; to mismatch select on current unit + ENDIF + +; Set Interrupt Conditions + + LD A,00010001B ; Turn Ints On and enable downcounting + OUT0 (TCR),A + + LD A,00000111B ; Activate INT0 and Internals + OUT0 (ITC),A + EI ; Insure interrupts enabled + RET + +;..... +; Z182 [E]SCC Configuration Routine. +; Enter= BC -> respective Control Register SCCACNT/SCCBCNT. +; HL -> Dev+5 Configuration byte + +INSCC: LD DE,0100010000101010B ; Skeleton WR4 (D), WR5 (E) contents + ; |||||||||||||||+- Tx CRC Enable \---------------+ + ; ||||||||||||||+-- RTS | + ; |||||||||||||+--- /SDLC/CRC-16 | + ; ||||||||||||+---- Tx Enable WR5 + ; |||||||||||+----- Send Break | + ; |||||||||++------ Bits/Char (00=5, 01=7, 10=6, 11=8) | + ; ||||||||+-------- DTR /---------------+ + ; |||||||+--------- Parity Enable \---------------+ + ; ||||||+---------- Parity EVEN/ODD | WR4 + ; ||||++----------- 00=Sync, 01=1 Stop, 10=1.5 Stop, 11=2 + ; ||++------------- Sync Char Settings | + ; ++--------------- Clock 00=X1,01=X16,10=X32,11=X64 /-+ + BIT 0,(HL) ; One Stop Bit? + JR NZ,INSCC0 ; ..jump if So + SET 3,D ; Else Set for 2 Stop bits +INSCC0: BIT 1,(HL) ; Parity On? + JR Z,INSCC1 ; ..jump if Not + SET 0,D ; Else Turn it On + BIT 2,(HL) ; Is Odd parity desired? + JR NZ,INSCC1 ; ..jump if Even parity + SET 1,D ; Else set to Odd +INSCC1: BIT 3,(HL) ; 7-bit Data? + JR NZ,INSCC2 ; ..jump if So + SET 6,E ; Else set for 8-bit data +INSCC2: LD A,WR4 + CALL IWdOut ; Set basic Parms + LD A,E ; Get WR4 Config Byte + SCF ; (prep to set LSB) + ADC A,A ; Move old B6/5 to B7/6 and Set LSB + AND 0C1H ; strip off Garbage + BIT 5,(HL) ; RTS/CTS Handshake selected? + JR Z,INSCC8 ; ..jump if Not + OR 00100000B ; Else Set Auto-Enables +INSCC8: LD E,A ; (position) + LD A,WR3 + CALL IBytO ; Set Receive Bits/Char & activate + + CALL ChkRat ; Can we set the Data Rate? + RET Z ; ..quit if Not + + PUSH BC ; Else Save regs (A [0..3] = Rate index) + DEC A ; adjust index to Base 0 + LD C,A ; store + LD HL,brSCC ; Pt to Start of Baud Rate Table + CALL ADDAHL ; -> appropriate constant + LD L,(HL) ; fetch constant +;;-- IN0 A,(ENH182) ; Get Enhancement Reg +;;-- AND 00001000B ; Keep ESCC Divide Rate Bit + LD A,(SPEED) ; Fetch Clock speed +;;-- JR Z,INSCC9 ; ..jump if Div-by-1 +;;-- SRL A ; Else Divide Rate by 2 (by dividing Clk) +;;--INSCC9: + LD H,A + LD A,C + CP 3 ; Rate In [134.5, 50, 75]? + JR NC,INSCC3 ; ..jump if Not + LD A,H ; Else + ADD A,A ; Multiply + ADD A,H ; constant * 3 + LD H,A +INSCC3: MLT HL ; Multiply Clock Rate by Constant + LD A,C + CP 7 ; Rate < 2400 bps? + JR C,INSCC4 ; ..jump if Yes + LD C,18 ; Else Compute Divisor / 18 + LD B,17 ; 17 times thru loop for 16 bits + XOR A ; start w/Carry Clear + +; Divide computed value in HL by 18 (in C), Ret: Remainder in A, Quotient in HL + +SDiv0: ADC A,A + SBC A,C + JR NC,SDiv1 + ADD A,C ; correct for underflow +SDiv1: CCF + ADC HL,HL + DJNZ SDiv0 ; ..loop til Done + SRL C ; Dividend / 2 + CP C ; Rounding Needed? + JR C,INSCC4 ; ..jump if Not + INC HL ; Else round up + +INSCC4: POP BC + DEC HL ; Compute Divisor + DEC HL ; - 2 + LD A,H + OR L ; If Divisor = 0 + JR NZ,INSCC5 + INC L ; default to 1 +INSCC5: LD A,WR12 ; Address Divisor Reg pair + LD E,H ; swap + LD D,L ; bytes to send Lower first + +IWdOut: DI + OUT (C),A ; Address WR4 + OUT (C),D ; Set values + INC A ; Bump to WR5 +IBytO: OUT (C),A ; address it + OUT (C),E ; Set values + EI + RET + +;..... +; Divisor factors are computed as: +; (Xtal Freq (Hz) / (2 * bps * Divisor)) - 2 +; These rate constants represent a compromise between the "standard" rates of +; multiples of 6.144 and 9.216 MHz, and the 8.000/16.000 MHz used in the P112. +; All factors are based on a x16 clock divisor. + +brSCC: DEFB 79 ; 1 = 134.5 bps / 3 + DEFB 213 ; 2 = 50 bps / 3 + DEFB 142 ; 3 = 75 bps / 3 + DEFB 213 ; 4 = 150 bps + DEFB 106 ; 5 = 300 bps + DEFB 53 ; 6 = 600 bps + DEFB 26 ; 7 = 1200 bps + DEFB 240 ; 8 = 2400 bps * 18 + DEFB 120 ; 9 = 4800 bps * 18 + DEFB 60 ; 10 = 9600 bps * 18 + DEFB 30 ; 11 = 19.2 kbps * 18 + DEFB 15 ; 12 = 38.4 kbps * 18 + DEFB 10 ; 13 = 57.6 kbps * 18 + DEFB 5 ; 14 = 115.2 kbps * 18 + +;..... +; 16550-compatible Configuration Routine + +IOI550: LD E,00000011B ; Start w/byte going to Line Contr Reg (LCR) + ; ||||||++- Word Len in Bits (00=5, 01=6, 10=7, 11=8) + ; |||||+--- Stop Bits (0=1, 1=1.5 or 2) + ; ||||+---- 0 = No Parity, 1 = Parity Enabled + ; ||++----- (If Parity) 00=Odd, 01=Even, 10=Mark, 11=Space + ; |+-------- 0 = Normal, 1 = Send Break + ; +--------- 0 = Normal, 1 = Set Baud Rate + BIT 0,(HL) ; One Stop Bit? + JR NZ,IOI55a ; ..jump if So + SET 2,E ; Else Set for 2 Stop Bits +IOI55a: BIT 1,(HL) ; Parity On? + JR Z,IOI55b ; ..jump if Not + SET 3,E ; Else Turn it On + BIT 2,(HL) ; Even Parity? + JR Z,IOI55b ; ..jump if Odd + SET 4,E ; Else Set Even Parity +IOI55b: CALL ChkRat ; Can we set the Data Rate? + JR Z,IOI55c ; ..jump if Not + ADD A,A ; Else double index + LD C,A + LD B,0 + LD HL,RATE55-2 ; Pt to compensated Table + ADD HL,BC + SET 7,E ; Address DLAB + OUT0 (_LCR),E + LD A,(HL) + OUT0 (_DDL),A ; send Low Byte + INC HL + LD A,(HL) + OUT0 (_DLM),A ; and High Byte +IOI55c: RES 7,E ; Clear DLAB Bit + OUT0 (_LCR),E ; and Set configuration + LD A,00000011B + ; |||||||+-- 1 = DTR Active + ; ||||||+--- 1 = RTS Active + ; |||||+---- (unused) + ; ||||+----- 1 = Send Ints to CPU, 0 = Ints Hi-Z + ; |||+------ 1 = Line Loopback + ; +++------- (unused) + OUT0 (_MCR),A ; Activate Port + LD A,00000000B + ; |||||||+-- 1 = Enable Rcv Buff Full Interrupt + ; ||||||+--- 1 = Enable Xmt Buff Empty Interrupt + ; |||||+---- 1 = Enable Line Status Interrupt + ; ||||+----- 1 = Enable Delta Status Signals Inerrupt + ; ++++------ (unused) + OUT0 (_IER),A ; Set Interrupt Settings + RET + +; Clock Divisor factors for various rates + +RATE55: DEFW 857 ; 1 = 134.5 bps + DEFW 2304 ; 2 = 50 bps + DEFW 1536 ; 3 = 75 bps + DEFW 768 ; 4 = 150 bps + DEFW 384 ; 5 = 300 bps + DEFW 192 ; 6 = 600 bps + DEFW 96 ; 7 = 1200 bps + DEFW 48 ; 8 = 2400 bps + DEFW 24 ; 9 = 4800 bps + DEFW 12 ; 10 = 9600 bps + DEFW 6 ; 11 = 19.2 kbps + DEFW 3 ; 12 = 38.4 kbps + DEFW 2 ; 13 = 57.6 kbps (non-std) + DEFW 1 ; 14 = 115.2 kbps + +;..... +; Expansion Common routines may be places here + IF MORDEV AND NOT MOVCPM + IF ASCI_0 OR ASCI_1 +INASCI: BIT 0,(HL) ; One Stop Bit? + JR NZ,INASC0 ; ..jump if Not + SET 0,E ; Else Set for 2 Stop bits +INASC0: BIT 1,(HL) ; Parity On? + JR Z,INASC1 ; ..jump if Not + SET 1,E ; Else Turn it On +INASC1: BIT 3,(HL) ; 7-bit Data? + JR NZ,INASC2 ; ..jump if So + SET 2,E ; Else set for 8-bit Data +INASC2: OUT (C),E ; Send the byte to CNTLA0/1 + INC C ; advance to CNTLB0/1 + INC C + DEC HL ; Back up to first Config byte + LD A,(HL) ; fetch + AND 0F0H ; Check Config Status + LD E,0111B ; (preset for External clock in case) + JR Z,INASCX ; ..jump if No rate to Set + LD A,(HL) ; Refetch the rate byte + AND 0FH ; masking off all but desired rate + PUSH HL ; Save Config byte pointer + LD HL,ASCRAT-1 ; pt to Rate Table (Correcting for Base 0) + CALL ADDAHL ; offsetting to desired byte + LD E,0 ; Prepare an initial mask + LD A,(SPEED) ; Check processor speed + CP 6+1 ; Is it 6 or below? + JR C,INASC8 ; ..jump assuming 6.144 MHz if <= 6 + DEC HL ; (prepare for 12 test) + CP 12 ; Is it 12 MHz? + JR Z,INASC8 ; ..jump assuming 12.288 MHz if = 12 + DEC HL ; (prepare for 24 test) + CP 24 ; Is it 24 MHz? + JR NC,INASC8 ; ..jump if >= 24 MHz + INC HL ; Else correct pointer + INC HL ; Advance for 18 MHz + SET 5,E ; Set additional divisor bit for 9/18 MHz + CP 16 ; Is it >= 16 MHz? (including 18 MHz) + JR NC,INASC8 ; ..jump to use 6 MHz rates if So + INC HL ; Else bump up one in Rate Table +INASC8: LD A,(HL) ; Get the Rate Setting Byte + OR E ; add in any additional divisor + LD E,A ; back to output reg + POP HL ; Restore Config byte ptr +INASCX: INC HL ; advance to second byte + BIT 2,(HL) ; Is Odd parity desired? + JR NZ,INASC9 ; ..jump if Even parity + SET 4,E ; Else set to Odd +INASC9: OUT (C),E ; Send the byte to CNTLB0/1 + RET + + ; bps @ 6MHz 9MHz 12MHz 18MHz 24MHz + DEFB 00001110B ; 0 (protection) +ASCRAT: DEFB 00001110B ; 1 = default to lowest rate + DEFB 00001110B ; 2 = default to lowest rate + DEFB 00001110B ; 3 = default to lowest rate + DEFB 00001110B ; 4 = 150 75 300 150 600 + DEFB 00001101B ; 5 = 300 150 600 300 1200 + DEFB 00000110B ; 6 = 600 300 1200 600 2400 + DEFB 00000101B ; 7 = 1200 600 2400 1200 4800 + DEFB 00000100B ; 8 = 2400 1200 4800 2400 9600 + DEFB 00000011B ; 9 = 4800 2400 9600 4800 19.2k + DEFB 00000010B ; 10 = 9600 4800 19.2k 9600 38.4k + DEFB 00000001B ; 11 = 19.2 k 9600 38.4k 19.2k 76.8k + DEFB 00000000B ; 12 = 38.4 k 19.2 k 76.8k 38.4k 153.6k + DEFB 00000000B ; 13 = default to highest rate + DEFB 00000000B ; 14 = default to highest rate + DEFB 00000000B ; 15 = default to highest rate + ENDIF ;Asci_0 | Asci_1 + ENDIF ;Mordev + +;..... +; Check Data Rate Config byte for authority and limits on configuration +; Enter: HL -> Second Config byte (back up to get rate byte) +; Exit : Zero Set if Can't configure + +ChkRat: DEC HL ; Pt to Data Rate + LD A,(HL) ; fetch + AND 0F0H ; Any Allowed rate to set? + RET Z ; ..quit if Not (Z Set) + LD A,(HL) ; Fetch byte again + AND 0FH ; Anything to Set? + RET Z ; ..quit if Not (Z Set) + CP 0FH ; Fixed Rate? + RET ; ..exit w/Z Set if Fixed, else NZ for Ok + +;..... +; Locate Named Device and return pointer to last Config byte + IF NOT MOVCPM +SETPTR: LD HL,DEVCFG-[COM2-COM1] ; Point ahead of start +SETPTL: LD BC,COM2-COM1 ; Set size of entries + ADD HL,BC ; advance to next entry + LD B,4 ; Set # chars to compare + LD A,(HL) ; Get first char + OR A ; Is it Table End? + RET Z ; ..return Zero Set if so + PUSH DE ; (save source & dest strings) + PUSH HL +SETPT0: LD A,(DE) + CP (HL) ; Compare each char + JR NZ,SETPTX ; ..quitting if mismatch + INC DE ; Else advance to next + INC HL + DJNZ SETPT0 ; ..loop to next char +SETPTX: POP HL ; Restore source & dest ptrs + POP DE + JR NZ,SETPTL ; ..try next entry if mismatch + LD DE,7 ; Else advance to Dev+7 + ADD HL,DE + OR 0FFH ; Insure Zero Clear on Return + RET ; ..and quit + +C1NAM: DEFB 'COM1' ; Device needing Configuration to match +C2NAM: DEFB 'COM2' +P1NAM: DEFB 'PIO1' + ENDIF ;Movcpm +; Name strings for Expansion IO added here after Primary Devices + IF MORDEV AND ESCC_B AND NOT MOVCPM +C3NAM: DEFB 'COM3' ; ESCC Channel B Expansion Device + ENDIF + IF MORDEV AND ASCI_0 AND NOT MOVCPM +C4NAM: DEFB 'COM4' ; ASCI0 Expansion Device + ENDIF + IF MORDEV AND ASCI_1 AND NOT MOVCPM +C5NAM: DEFB 'COM5' ; ASCI1 Expansion Device + ENDIF +;..... +; NOTE: BuffA0 and BuffA1 Intrpt Buffers are located at end of B/P Root module. + +;===================== End of IIO-DX.Z80 ========================== + \ No newline at end of file diff --git a/Source/BPBIOS/iio-ww.z80 b/Source/BPBIOS/iio-ww.z80 new file mode 100644 index 00000000..093e4835 --- /dev/null +++ b/Source/BPBIOS/iio-ww.z80 @@ -0,0 +1,334 @@ +;:::::::::::::::::::::::::::::::::::::::::::::::::************************* +; Byte I/O Routines *** Hardware Specific *** +; - D-X Designs Pty Ltd P112 - ************************* +; +; Several serial and parallel options exist on the P112, with two serial +; ports available at RS-232 signalling levels. The primary port defined here +; as COM1 uses SCC Channel A of the Z80182. A 16550-compatible serial port +; on the SMC FDC37C665 is used as COM2. Three other serial ports (the two +; ACSI ports in the Z180 core, and SCC Channel B) are available at TTL +; voltage levels on a single header and may be defined as COM3-5 if the pins +; from the Z182 are not otherwise used. +; This code supports the additional serial channels if the MORDEV equate +; is set to YES. If any of the three additional serial ports are defined +; (ESCC_B, ASCI_0, ASCI_1), then the System Configuration Register is set to +; Zero activating the additional signals in the conditions specified herein +; as activated by options in DEF-DX.LIB. +; A full Parallel port on the SMC FDC37C655 (in Normal Centronics mode) is +; used as the primary List (Printer) Device. +; +; NOTE: At the present time, it appears that port 0D9H (ENH182) cannot be set +; so ESCC operation at 24 MHz will occur at the full clock rate instead +; of being divided by Two as specified in Zilog documentation. Code +; managing ENH182 is commented out with ";;--" markers (HFB). +; +; 1.2 - 28 Aug 01 - Final scrub for GPL release. HFB +; 1.1a- 11 May 97 - Cleaned code, fixed added port accesses. HFB +; 1.1 - 25 Jan 97 - Revised ESCC Baud rate calcs, added COM3-5. HFB +; 1.0 - 19 Jun 96 - Initial Release for the P112 from YASBEC. HFB +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Place constants for Expansions here + + CSEG +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Byte Device Control Tables +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + +DEVCFG: + +; The Clock Rate for the SCC channels on the Z80182 is based on a divider +; constant loaded in extended registers, the Processor Crystal frequency, +; and the setting of the divider in the SCC Register (1FH). +; +; NOTE: Divisor values are computed based on a compromise between the Crystal +; rates considered "standard" (6.144, 9.216, 12.288 MHz, etc) and the +; 16.000 MHz initially placed on the P112. Higher data rates (38.4 kbps +; and higher) may be out of tolerance, particularly at low CPU speeds. +; +; Clock rates for the serial port on the SMC 37C655 are based on a software +; programmable divider from the 24 MHz crystal driving the chip. + +COM1: DEFB 'COM1' ; 4-Char ID + DEFB 11101011B ; Baud Rate +; ||||++++--- Baud Rate setting (19.2 kbps) +; ++++------- Maximum Baud Rate (115.2 kbps) +; Rates are as: +; 0000 = None 0001 = 134.5 0011 = 50 0011 = 75 +; 0100 = 150 0101 = 300 0110 = 600 0111 = 1200 +; 1000 = 2400 1001 = 4800 1010 = 9600 1011 = 19200 +; 1100 = 38400 1101 = 76800 1110 = 115200 1111 = Fixed + + DEFB 11100001B ; Config Byte (In,Out,CTS/RTS control,1 Stop) +; |||||||+---------- Stop Bits 1 (1), 2 (0) +; ||||||+----------- Parity Enable (1), Disable (0) +; |||||+------------ Parity Even (1), Odd (0) +; ||||+------------- Data Bits 8 (0), 7 (1) +; |||+-------------- Xon-Xoff Handshake +; ||+--------------- CTS/RTS Handshake +; |+---------------- Input Device No (0), Yes (1) +; +----------------- Output Device No (0), Yes (1) + + DEFB 0FFH ; Input Data Mask + DEFB 0FFH ; Output Data Mask + + DEFW COM1OT ; COM 1 Byte Output + DEFW COM1OS ; COM 1 Output Status + DEFW COM1IN ; COM 1 Byte Input + DEFW COM1IS ; COM 1 Input Status + +COM2: DEFB 'COM2' ; 4-Char ID + DEFB 11101010B ; Baud Rate (115.2k Max, 9600 Set) + DEFB 11100001B ; Config Byte (In,Out,CTS/RTS control,1 Stop) + DEFB 0FFH ; Input Data Mask + DEFB 0FFH ; Output Data Mask + + DEFW COM2OT ; COM 2 Byte Output + DEFW COM2OS ; COM 2 Output Status + DEFW COM2IN ; COM 2 Byte Input + DEFW COM2IS ; COM 2 Input Status + +PIO1: DEFB 'PIO1' ; 4-Char ID + DEFB 00000000B ; Baud Rate (None) + DEFB 10000000B ; Config Byte (Output Only) + DEFB 0FFH ; Input Data Mask + DEFB 07FH ; Output Data Mask + + DEFW PIO1OT ; PIO Byte Output + DEFW PIO1OS ; PIO Output Status + DEFW PIO1IN ; PIO Byte Input + DEFW PIO1IS ; PIO Input Status + + IF MOVCPM OR [MORDEV AND NOT [ESCC_B OR ASCI_0 OR ASCI_1]] + DEFB 'NULL' ; 4-Char ID + DEFB 00000000B ; Baud Rate (None) + DEFB 11000000B ; Config Byte + DEFB 0FFH ; Input Data Mask + DEFB 0FFH ; Output Data Mask + + DEFW ISFALSE ; Null Output + DEFW ISTRUE ; Null Output Status + DEFW ISFALSE ; Null Input + DEFW ISTRUE ; Null Input Status + ENDIF + + DEFB 0 ; - End-of-Table marker +MAXBDV EQU [$-DEVCFG-1]/[COM2-COM1] ; Number of Character Devices Defined + +DEVTBL: LD HL,DEVCFG ; BYTE device table + RET ; CP/M-3 device init + +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; COM1 Drivers +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + + IF HBIOS +; Uses HBIOS +;..... +; COM1 Input Status Test + +COM1IS: + PUSH BC + PUSH DE + PUSH HL + LD BC,0200H + HB_IODEV ; Func=$02 (IS), Device/Unit=HB_IODEV + CALL HBX_INVOKE + POP HL + POP DE + POP BC + RET + +;..... +; COM1 Input Routine +; Remain in Loop until Char ready, then Return Char in A + +COM1IN: + PUSH BC + PUSH DE + PUSH HL + LD BC,0000H + HB_IODEV ; Func=$00 (IN), Device/Unit=HB_IODEV + CALL HBX_INVOKE + LD A,E + POP HL + POP DE + POP BC + RET + +;..... +; COM1 Output Status Test + +COM1OS: + PUSH BC + PUSH DE + PUSH HL + LD BC,0300H + HB_IODEV ; Func=$03 (OS), Device/Unit=HB_IODEV + CALL HBX_INVOKE + POP HL + POP DE + POP BC + RET + +;..... +; COM1 Output Routine (Byte to Send in C) + +COM1OT: + PUSH BC + PUSH DE + PUSH HL + LD E,C ; Character to E + LD BC,0100H + HB_IODEV ; Func=$01 (OT), Device/Unit=HB_IODEV + CALL HBX_INVOKE + POP HL + POP DE + POP BC + RET + + ELSE +;..... +; COM1 Input Status Test + +COM1IS: IN A,(_LSR) ; Input Status Reg Byte + RRA ; Rcv Rdy Bit[0] -> Carry + SBC A,A ; A=00 if Not Ready, FF if Char received + RET + +;..... +; COM1 Input Routine + +COM1IN: CALL COM1IS ; Char Ready? + JR Z,COM1IN ; ..loop if Not + IN A,(_RBR) ; Else Read Receive Buffer + LD C,A ; Save byte + LD A,(COM1+6) ; .get mask + AND C ; ..apply it + RET + +;..... +; COM1 Output Status Test + +COM1OS: + IN A,(_LSR) ; Read Status Reg + AND 20H ; Mask Bit of interest + RET Z ; ..return if nothing valid + OR 0FFH ; Else set flags for Ready + RET + +;..... +; COM1 Output Routine + +COM1OT: CALL COM1OS ; Test if ready + JR Z,COM1OT ; ..loop if not + LD A,(COM1+7) ; Get output mask + AND C ; apply + OUT (_THR),A ; and send char to Xmt Holding Reg + RET + + ENDIF + + PAGE +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; COM2 Drivers +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Uses generic 16550 UART +;..... +; COM2 Input Status Test + +COM2IS: IN A,(_LSR) ; Input Status Reg Byte + RRA ; Rcv Rdy Bit[0] -> Carry + SBC A,A ; A=00 if Not Ready, FF if Char received + RET + +;..... +; COM2 Input Routine + +COM2IN: CALL COM2IS ; Char Ready? + JR Z,COM2IN ; ..loop if Not + IN A,(_RBR) ; Else Read Receive Buffer + LD C,A ; Save byte + LD A,(COM2+6) ; .get mask + AND C ; ..apply it + RET + +;..... +; COM2 Output Status Test + +COM2OS: + IN A,(_LSR) ; Read Status Reg +SOSTV: AND 20H ; Mask Bit of interest +RETST: RET Z ; ..return if nothing valid +ISTRUE: OR 0FFH ; Else set flags for Ready + RET + +;..... +; COM2 Output Routine + +COM2OT: CALL COM2OS ; Test if ready + JR Z,COM2OT ; ..loop if not + LD A,(COM2+7) ; Get output mask + AND C ; apply + OUT (_THR),A ; and send char to Xmt Holding Reg + RET + + PAGE +;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Parallel I/O Drivers +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; Uses "Standard" Parallel Centronics mode of SMC37C655 (output only) +;..... +; Parallel Input Status Test + +PIO1IS: JR ISTRUE ; Not implemented + +;..... +; Parallel Input Data fetch + +PIO1IN: JP ISFALSE ; Not implemented + +;..... +; Parallel Output Status Test + +PIO1OS: JP ISTRUE ; Not implemented + +;..... +; Parallel Output Routine + +PIO1OT: JP ISFALSE ; Not implemented + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +;:: I n t e r r u p t T a b l e :: +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; The Z80182 Interrupt Vector table is placed here on a 32-byte +; boundary for internal peripherals. + + DEFS 32-[$-BIOSJT AND 31] ; Align +INTTBL: + DEFW BADINT ; FDC Controller w/Ints (FDCINT if Real Ints) + DEFW BADINT ; Parallel output port (INTPIO if Real Ints) + DEFW TIMER ; Timer0 + DEFW BADINT ; Timer1 + DEFW BADINT ; DMA Channel 0 + DEFW BADINT ; DMA Channel 1 + DEFW BADINT ; Clocked Serial IO + DEFW BADINT ; ASCI 0 if Not Interrupt/Mordev + DEFW BADINT ; ASCI 1 if Not Interrupt/Mordev + +; Error trap for unimplemented Interrupts + +BADINT: CALL PRINT + DEFC CR,LF,'Bad Int.' + JP WBOOT + +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +;:: D e v i c e I n i t i a l i z a t i o n :: +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + + CSEG +DEVINI: + IF BANKED + CALL BIOSTK + CALL GOSYSB + JP JDVINI + COMMON /BANK2/ +JDVINI: + ENDIF + + RET ; WW diff --git a/Source/BPBIOS/ramd-ww.z80 b/Source/BPBIOS/ramd-ww.z80 new file mode 100644 index 00000000..c5592030 --- /dev/null +++ b/Source/BPBIOS/ramd-ww.z80 @@ -0,0 +1,89 @@ +;===============================================************************ +; RAM Disk Driver. ** Hardware Specific ** +; D-X Designs Pty Ltd P112 ************************ +; +; 1.1 - 28 Jul 01 - Updated to latest fix for external driver. HFB +; 1.0 - 10 Jun 96 - Initial Release for P112 from YASBEC. HFB +;======================================================================= + + CSEG + IF BANKED + COMMON /BANK2/ + ENDIF + +; This module creates a RAM Drive using the available memory (if available) +; above the TPA and possible System banks. For a banked system, the minimum +; needed is a 64k Main TPA and a 32k System Bank. + +;..... +; Select the RAM Drive. This routine performs any setup required in a select. + +SELRAM: JP SETPARMS ; No action locally. + +;..... +; Read a 128-byte logical sector from the RAM Drive to main memory. +; This routine uses the HSTxxx values from the base BIOS routines. + +RAMRD: OR 0FFH ; Set Read flag (non-0) + JR RamRW ; ..go to common code + +;..... +; Write a 128-byte logical sector from main memory to the RAM Drive. +; This routine uses the HSTxxx values from the base BIOS routines. + +RAMWR: XOR A ; Set Write flag with 0, Read w/AFH + LD (HSTWRT),A ; clear pending write flag + ;..fall thru to common code.. + +; The following performs calculations for the proper address and bank, sets +; the DMA block and executes the Move to/from the Host Buffer. + +RamRW: + PUSH AF ; Save R/W flag for later + ; BUILD TOTAL BYTE OFFSET INTO A:HL + XOR A,A ; A STARTS OUT ZERO + LD HL,(HSTTRK) ; HL STARTS WITH TRACK NUM + LD H,0 ; ONLY LSB IS NEEDED (INIRAMD PASSES INVALID MSB) + LD B,5 ; MULT BY 32 SECTORS PER TRACK +RAMWR1: + ADD HL,HL ; DOUBLE VALUE + ADC A,A ; ... INCLUDING A WITH CARRY + DJNZ RAMWR1 ; LOOP 5 TIMES FOR MULT BY 32 + LD DE,(HSTSEC) ; SECTOR VALUE TO 3 (ONE BYTE) + LD D,0 ; CLEAR MSB SINCE HSTSEC IS JUST ONE BYTE + ADD HL,DE ; ADD TO WORKING VALUE + ADC A,0 ; HANDLE POSSIBLE CARRY + LD B,7 ; MULT BY 128 BYTES PER SECTOR +RAMWR2: + ADD HL,HL ; DOUBLE VALUE + ADC A,A ; ... INCLUDING A WITH CARRY + DJNZ RAMWR2 ; LOOP 7 TIME FOR MULT BY 128 + ; CONVERT BYTE OFFSET IN A:HL TO BANK(A):OFFSET(HL) + SLA H ; ROTATE HIGH BIT OF H INTO CF + RL A ; ROTATE CF INTO LOW BIT OF A + SRL H ; FIX H (ROTATE BACK W/ ZERO INTO HIGH BIT) + ; ADJUST FOR STARTING RAM BANK + LD C,A ; BANK TO C + LD A,(RAMBNK) ; GET STARTING RAM BANK NUM + ADD A,C ; COMBINE TO GET ACTUAL SOURCE BANK NUM + ; SETUP FOR INTERBANK COPY + LD C,A ; SOURCE BANK TO C + LD B,BID_HB ; DEST BANK TO B (HSTBUF IN HBIOS) + LD DE,(HB_DSKBUF) ; DEST ADDRESS TO DE; HL ALREADY HAS SOURCE ADDRESS + ; REVERSE VALUES IF WRITE + POP AF ; Read or Write? + JR NZ,RAMWR3 ; ..jump if Read + EX DE,HL ; Else swap things around + LD A,C + LD C,B + LD B,A +RAMWR3: + ; PERFORM THE COPY + CALL HBX_XCOPY ; SET BANKS FOR COPY + LD BC,128 ; SET LENGTH OF COPY (ONE SECTOR) + CALL HBX_COPY ; DO THE COPY + ; CLEAN UP AND RETURN + XOR A ; SIGNAL SUCCESS + RET ; AND RETURN + +;================== End of RAM Disk Code ==================== diff --git a/Source/BPBIOS/def-ww-mk4.lib b/Source/BPBIOS/romwbw-mk4.lib similarity index 80% rename from Source/BPBIOS/def-ww-mk4.lib rename to Source/BPBIOS/romwbw-mk4.lib index 516bf3d8..84366ce0 100644 --- a/Source/BPBIOS/def-ww-mk4.lib +++ b/Source/BPBIOS/romwbw-mk4.lib @@ -10,7 +10,7 @@ ; HBIOS EQU YES ; Use HBIOS functions INTPXY EQU YES ; Internal HBIOS Proxy -HBLOC EQU 0FE00H ; Location of HBIOS proxy (if used) +HBLOC EQU 0FE00H ; Location of HBIOS proxy (used if not INTPXY) ; ; Set exactly one of the following to YES to specify platform ; @@ -42,7 +42,7 @@ HB_ROMBLKS EQU 192 ; 512K - 128K reserved / 2K per block ; ; Layout of RAM banks ; - IF N8VEM OR ZETA + IF N8VEM OR ZETA OR MK4 BID_RAMD EQU 80H BID_RAMM EQU 8BH BID_SYS EQU 8CH @@ -58,14 +58,6 @@ BID_HB EQU 9DH BID_USR EQU 9EH BID_COM EQU 9FH ENDIF - IF MK4 -BID_RAMD EQU 10H -BID_RAMM EQU 1BH -BID_SYS EQU 1CH -BID_HB EQU 1DH -BID_USR EQU 1EH -BID_COM EQU 1FH - ENDIF ; IF N8 OR MK4 HB_IODEV EQU HBCIO_ASCI @@ -74,7 +66,7 @@ HB_IODEV EQU HBCIO_UART ENDIF ; IF INTPXY -MEMTOP EQU 0FFDFH ; Reserve memory above this for HBIOS +MEMTOP EQU 0FFE0H - 1 ; Start of HBIOS 32 byte control block ELSE -MEMTOP EQU HBLOC - 1 ; Reserve memory above this for HBIOS +MEMTOP EQU HBLOC - 1 ; Start of HBIOS 512 byte proxy ENDIF diff --git a/Source/BPBIOS/def-ww-sim.lib b/Source/BPBIOS/romwbw-sim.lib similarity index 80% rename from Source/BPBIOS/def-ww-sim.lib rename to Source/BPBIOS/romwbw-sim.lib index 3d5a7fc8..03fc7bb0 100644 --- a/Source/BPBIOS/def-ww-sim.lib +++ b/Source/BPBIOS/romwbw-sim.lib @@ -10,7 +10,7 @@ ; HBIOS EQU YES ; Use HBIOS functions INTPXY EQU YES ; Internal HBIOS Proxy -HBLOC EQU 0FE00H ; Location of HBIOS proxy (if used) +HBLOC EQU 0FE00H ; Location of HBIOS proxy (used if not INTPXY) ; ; Set exactly one of the following to YES to specify platform ; @@ -42,7 +42,7 @@ HB_ROMBLKS EQU 192 ; 512K - 128K reserved / 2K per block ; ; Layout of RAM banks ; - IF N8VEM OR ZETA + IF N8VEM OR ZETA OR MK4 BID_RAMD EQU 80H BID_RAMM EQU 8BH BID_SYS EQU 8CH @@ -58,14 +58,6 @@ BID_HB EQU 9DH BID_USR EQU 9EH BID_COM EQU 9FH ENDIF - IF MK4 -BID_RAMD EQU 10H -BID_RAMM EQU 1BH -BID_SYS EQU 1CH -BID_HB EQU 1DH -BID_USR EQU 1EH -BID_COM EQU 1FH - ENDIF ; IF N8 OR MK4 HB_IODEV EQU HBCIO_ASCI @@ -74,7 +66,7 @@ HB_IODEV EQU HBCIO_UART ENDIF ; IF INTPXY -MEMTOP EQU 0FFDFH ; Reserve memory above this for HBIOS +MEMTOP EQU 0FFE0H - 1 ; Start of HBIOS 32 byte control block ELSE -MEMTOP EQU HBLOC - 1 ; Reserve memory above this for HBIOS +MEMTOP EQU HBLOC - 1 ; Start of HBIOS 512 byte proxy ENDIF diff --git a/Source/BPBIOS/romwbw.lib b/Source/BPBIOS/romwbw.lib new file mode 100644 index 00000000..03fc7bb0 --- /dev/null +++ b/Source/BPBIOS/romwbw.lib @@ -0,0 +1,72 @@ +;:::::::::::::::::::::::::::::::::::::::::::::::********************** +; B/P BIOS Configuration and Equate File. ** System Dependant ** +; - D-X Designs Pty Ltd P112 CPU Board - ********************** +; HBIOS specific customizations +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: +; BIOS Configuration Equates and Macros +; +; NOTE: Must make sure settings below match hardware and +; HBIOS configuration. +; +HBIOS EQU YES ; Use HBIOS functions +INTPXY EQU YES ; Internal HBIOS Proxy +HBLOC EQU 0FE00H ; Location of HBIOS proxy (used if not INTPXY) +; +; Set exactly one of the following to YES to specify platform +; +N8VEM EQU YES +ZETA EQU NO +N8 EQU NO +MK4 EQU NO +; +; Set either the following to YES (or both to NO for no clock code) +; +SIMHCLK EQU NO ; Direct SIMH clock access +HBCLK EQU YES ; HBIOS clock driver +; +; Set HB_HDDEV to appropriate hard disk driver +; +HB_HDDEV EQU HBDEV_HDSK ; SIMH HDSK Driver +;HB_HDDEV EQU HBDEV_IDE ; IDE Driver +;HB_HDDEV EQU HBDEV_SD ; SD Card Driver +; +; Set HB_MDDEV to appropriate memory disk driver +; +HB_MDDEV EQU HBDEV_MD ; Memory Disk Driver +; +; RAM/ROM disk sizes expressed as count of 2K blocks +; +HB_RAMBLKS EQU 192 ; 512K - 128K reserved / 2K per block +HB_ROMBLKS EQU 192 ; 512K - 128K reserved / 2K per block +;HB_ROMBLKS EQU 448 ; 1024K - 128K reserved / 2K per block +; +; Layout of RAM banks +; + IF N8VEM OR ZETA OR MK4 +BID_RAMD EQU 80H +BID_RAMM EQU 8BH +BID_SYS EQU 8CH +BID_HB EQU 8DH +BID_USR EQU 8EH +BID_COM EQU 8FH + ENDIF + IF N8 +BID_RAMD EQU 80H +BID_RAMM EQU 9BH +BID_SYS EQU 9CH +BID_HB EQU 9DH +BID_USR EQU 9EH +BID_COM EQU 9FH + ENDIF +; + IF N8 OR MK4 +HB_IODEV EQU HBCIO_ASCI + ELSE +HB_IODEV EQU HBCIO_UART + ENDIF +; + IF INTPXY +MEMTOP EQU 0FFE0H - 1 ; Start of HBIOS 32 byte control block + ELSE +MEMTOP EQU HBLOC - 1 ; Start of HBIOS 512 byte proxy + ENDIF diff --git a/Source/BPBIOS/sectran.z80 b/Source/BPBIOS/sectran.z80 index 183375c3..5b021f93 100644 --- a/Source/BPBIOS/sectran.z80 +++ b/Source/BPBIOS/sectran.z80 @@ -15,17 +15,6 @@ ; associated with each DPB. SECTRN: -; PUSH AF -; PUSH BC -; PUSH DE -; PUSH HL -; CALL PRINT -; DEFB '[SECTRN',']'+80H -; POP HL -; POP DE -; POP BC -; POP AF - IF BANKED CALL BIOSTK CALL GOSYSB @@ -40,7 +29,6 @@ BSTRN: LD (CPMSEC),BC ; Save logical record from Dos for deblocker LD H,B LD L,C ; Sector number to hl RET Z ; Return if no translation -; RET ; Return if no translation LD A,C ; Logical record number CALL PHYSEC ; Convert to logical host sector diff --git a/Source/BPBIOS/selrwd.z80 b/Source/BPBIOS/selrwd.z80 index d690acd2..efb7665e 100644 --- a/Source/BPBIOS/selrwd.z80 +++ b/Source/BPBIOS/selrwd.z80 @@ -12,11 +12,6 @@ CSEG SELDSK: -; CALL PRTSTRD -; DEFB '[SELDSK]$' -; LD A,C -; CALL PRTHEXBYTE - IF BANKED CALL BIOSTK CALL GOSYSB @@ -60,8 +55,6 @@ SELDKV: LD (HL),A ; Save back in DPH SELDK0: LD (SEKDVT),A ; Save Drive Type Byte locally POP DE ; Restore new mount flag - - BIT 0,E ; New mount? JR NZ,SETPARMS ; Set params if old mount @@ -120,22 +113,19 @@ DVRVCT: DEFW SELERR ; Driver 0 Select DEFW SELHD ; Driver 2 Select (Hard Drive) DEFW HDREAD ; Driver 2 Read DEFW HDWRIT ; Driver 2 Write - ELSE + ENDIF ; harddsk + IF [RAMDSK AND NOT HARDDSK] DEFW SELERR ; Driver 2 Select (Dummy if No Hard Drive) DEFW ISTRUE ; Driver 2 Read DEFW ISTRUE ; Driver 2 Write - ENDIF ;harddsk + ENDIF ;ramdsk & not harddsk IF RAMDSK DEFW SELRAM ; Driver 3 Select (RAM Drive) DEFW RAMRD ; Driver 3 Read DEFW RAMWR ; Driver 3 Write - ELSE - DEFW SELERR ; Driver 3 Select (Dummy if No RAM Drive) - DEFW ISTRUE ; Driver 3 Read - DEFW ISTRUE ; Driver 3 Write ENDIF ;ramdsk - + SELERR: LD HL,0 ; Send null DPH pointer back to caller RET @@ -243,7 +233,6 @@ GETDPH: ADD A,A ; Form table index value ; RAM Storage SEKPDN: DEFS 1 ; Physical drive number to use -HSTPDN: DEFS 1 ; WW SEKDVT: DEFS 1 ; Drive type byte for selected drive ;============================= End of SELRWD ============================== diff --git a/Source/BPBIOS/util.z80 b/Source/BPBIOS/util.z80 index ac30ecb7..c217956d 100644 --- a/Source/BPBIOS/util.z80 +++ b/Source/BPBIOS/util.z80 @@ -312,7 +312,7 @@ COUT: POP AF RET ; -STR_PANIC DB "\r\n\r\n>>> FATAL ERROR:$" +STR_PANIC DB CR,LF,CR,LF,">>> FATAL ERROR:$" STR_AF DB " AF=$" STR_BC DB " BC=$" STR_DE DB " DE=$" diff --git a/Source/BPBIOS/wboot-dx.z80 b/Source/BPBIOS/wboot-dx.z80 index cb648265..03fd31d0 100644 --- a/Source/BPBIOS/wboot-dx.z80 +++ b/Source/BPBIOS/wboot-dx.z80 @@ -15,22 +15,9 @@ WBOOT: ELSE LD SP,80H ; Use space below default buffer ENDIF - IF FASTWB - ; Restore command processor from - ; cache in (SYSBNK):100H. We assume that the - ; command processor lives in high memory. - LD A,(SYSBNK) ; Source bank is SYSBNK - LD C,A ; Put it in C - LD A,(TPABNK) ; Destination bank is TPABNK - LD B,A ; Put it in B - CALL HBX_XCOPY ; Set banks for extended copy - LD HL,100H ; Copy from start of cache in SYS - LD DE,(CPADR) ; .. to location of command processor in TPA - LD BC,(CPLEN) ; Length of command processor - CALL HBX_COPY ; Do it - -WBOOTV: + LD HL,SARL ; Point to DMA Initialization block +WBOOTV: CALL DMAMOV XOR A ; Indicate "A" logged as Host Disk LD (HSTDSK),A ; ..by showing Host Disk already logged ELSE @@ -40,7 +27,6 @@ WBOOTV: ELSE LD SP,EXTSTK+32 ; Place default stack up high ENDIF - LD A,0FFH ; Insure the default drive is logged LD (HSTDSK),A ; ..by unlogging the Host Disk LD A,(SYSDRV) @@ -127,29 +113,21 @@ GOZSYS: LD BC,80H ; Default DMA address is 80H LD D,(HL) ; Get the vector DEC HL LD E,(HL) - PUSH DE ; Save CCP entry address - IF BANKED - ; Copy vectors from TPA page zero to SYS page zero - LD BC,(TPABNK) ; C := TPABNK, B := SYSBNK - CALL XMOVE ; Set source/dest banks for copy - LD HL,0 ; Source address is zero - LD DE,0 ; Destination address is zero - LD BC,40H ; Copy 40H bytes - CALL MOVE ; Do it + LD HL,CPYVEC ; Copy Page0 Vectors and RSTs to System Bank + CALL DMAMOV LD A,(TPABNK) ; Set all Bank regs to TPA + LD (SRCBNK),A + LD (DSTBNK),A LD (DMABNK),A - CALL SELMEM ; Insure TPA in context (also set USRBNK) XOR A LD (BIOSTK),A ; Init bank switcher ENDIF LD A,(4) ; Get current disk number LD C,A ; Send to the CCP -; EI ; Enable the interrupt system -; EX DE,HL ; ..put destination in HL - POP HL ; Restore CCP entry address - + EI ; Enable the interrupt system + EX DE,HL ; ..put destination in HL JP (HL) ; Go to Z-System for further processing ;..... @@ -181,11 +159,25 @@ IOPRET: JP CONST DSEG ; Put the following areas in Data Segment -; Command processor address and length used when saving -; and restoring cached copy. +; This table in unitialized RAM is filled from the Cold Boot module. + IF FASTWB -CPADR DEFS 2 ; Command processor address -CPLEN DEFS 2 ; Command processor length +SARL: DEFS 2 ; Source Segment address + DEFS 1 ; Source Bank Number + DEFS 2 ; Destination Segment address + DEFS 1 ; Destination Bank Number (TPA) + DEFS 2 ; Number of bytes to move ENDIF ;fastwb + +; This table is used to copy Page 0 vectors from TPA to base of System bank +; on Warm Boots to insure that needed IO can vector to the correct devices. + + IF BANKED +CPYVEC: DEFS 2 ; Offset of Source area + DEFS 1 ; ..Source Bank (Base of TPA) [BNK0 SHR 1] + DEFS 2 ; Offset of Destination + DEFS 1 ; ..Dest Bank (Base of System Bank) [BNK2 SHR 1] + DEFS 2 ; Length of move + ENDIF ;========================= End of WBOOT ============================  \ No newline at end of file diff --git a/Source/BPBIOS/wboot-ww.z80 b/Source/BPBIOS/wboot-ww.z80 new file mode 100644 index 00000000..cb648265 --- /dev/null +++ b/Source/BPBIOS/wboot-ww.z80 @@ -0,0 +1,191 @@ +;:::::::::::::::::::::::::::::::::::::::************************************ +; Warm Boot Routine *** Machine Dependant for Moves *** +; - D-X Designs Pty Ltd P112 - *** and custom load formatting *** +; ************************************ +; 1.0 - 12 Jun 96 - Initial Release for P112 from YASBEC. HFB +;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: + + CSEG + +WBOOT: + IF BANKED + LD A,(TPABNK) ; Get TPA Bank # in case currently in Bank + CALL SELMEM ; ..and make current + LD SP,USP ; Set stack in high memory + ELSE + LD SP,80H ; Use space below default buffer + ENDIF + + IF FASTWB + ; Restore command processor from + ; cache in (SYSBNK):100H. We assume that the + ; command processor lives in high memory. + LD A,(SYSBNK) ; Source bank is SYSBNK + LD C,A ; Put it in C + LD A,(TPABNK) ; Destination bank is TPABNK + LD B,A ; Put it in B + CALL HBX_XCOPY ; Set banks for extended copy + LD HL,100H ; Copy from start of cache in SYS + LD DE,(CPADR) ; .. to location of command processor in TPA + LD BC,(CPLEN) ; Length of command processor + CALL HBX_COPY ; Do it + +WBOOTV: + XOR A ; Indicate "A" logged as Host Disk + LD (HSTDSK),A ; ..by showing Host Disk already logged + ELSE + IF BANKED + LD SP,USP ; If banked, use stack in high common memory + CALL GOSYSB ; Disk routines are in banked memory + ELSE + LD SP,EXTSTK+32 ; Place default stack up high + ENDIF + + LD A,0FFH ; Insure the default drive is logged + LD (HSTDSK),A ; ..by unlogging the Host Disk + LD A,(SYSDRV) + LD C,A ; Select system disk + LD E,0 ; Declare new mount + CALL SELDSK ; We're going to use the system disk + LD BC,0 + CALL SETTRK ; Set track 0 + LD BC,10H*256+1 ; B sectors remaining, C first sector + LD DE,0 ; DE beginning track + +; Note that we begin by reading track 0, sector 1 since sector 0 +; contains the cold start loader, which is skipped in a warm start + + LD HL,CPR ; Base of CP/M (initial load point) +LOAD1: PUSH DE ; Load a Sector, Save Current Track + PUSH BC ; Save sectors remaining and next sector + PUSH HL ; Save DMA address + LD (DMAADR),HL ; ..in deblocker + LD HL,(SEKDPH) + LD E,(HL) + INC HL + LD D,(HL) ; Get sector XLATE address + CALL SECTRN ; Skew sector as needed + LD (SEKSEC),HL ; Save Sector # directly in deblocker + +; Drive = 0, track set, sector set, DMA address set + + CALL READ + OR A ; Any errors? + JR NZ,WBOOT ; Retry the entire boot if an error occurs + +; No error, move to next sector + + POP HL ; Recall DMA address + LD DE,128 ; DMA=DMA+128 + ADD HL,DE ; New DMA address is in H,L + POP BC ; Recall NSECTS and current sector + POP DE ; Recall current track + DEC B ; Sectors=sectors-1 + JR Z,GOZSYS ; Go to Z-System if all have been loaded + +; More sectors remain to load, check for track change + + INC C ; Increment sector count + LD A,(CPMSPT) ; Max sector +1 + CP C ; Have we reached the end? + JR NZ,LOAD1 ; If not + +; End of current track, go to next track + + INC DE ; Track=track+1 + LD C,0 ; First sector on next track + +; Save register state, and set new track + + LD (SEKTRK),DE ; Save track directly + JR LOAD1 ; For another sector + ENDIF ;fastwb + +; End load operation, set parameters & go to Z-System + +GOZSYS: LD BC,80H ; Default DMA address is 80H + CALL SETDMA + + LD A,0C3H ; C3 is a JMP instruction + LD (0),A ; For JMP to WBOOT + LD (5),A ; For JMP to BDOS + LD HL,BIOSJT+3 ; Wboot entry point + LD (1),HL ; Set address field for JMP at 0 + LD HL,(ENVADR) ; Get the pointer to the ENV + LD DE,43H ; Offset to high byte of Dos Start + ADD HL,DE + LD D,(HL) ; Load Dos start + DEC HL + LD E,(HL) + EX DE,HL ; Put Dos in HL + LD BC,6 ; .offset to Entry + ADD HL,BC + LD (6),HL ; ..and set Address field of jump at 5 to BDOS + EX DE,HL + DEC HL ; Back down to CCP entry + DEC HL + LD D,(HL) ; Get the vector + DEC HL + LD E,(HL) + PUSH DE ; Save CCP entry address + + IF BANKED + ; Copy vectors from TPA page zero to SYS page zero + LD BC,(TPABNK) ; C := TPABNK, B := SYSBNK + CALL XMOVE ; Set source/dest banks for copy + LD HL,0 ; Source address is zero + LD DE,0 ; Destination address is zero + LD BC,40H ; Copy 40H bytes + CALL MOVE ; Do it + LD A,(TPABNK) ; Set all Bank regs to TPA + LD (DMABNK),A + + CALL SELMEM ; Insure TPA in context (also set USRBNK) + XOR A + LD (BIOSTK),A ; Init bank switcher + ENDIF + LD A,(4) ; Get current disk number + LD C,A ; Send to the CCP +; EI ; Enable the interrupt system +; EX DE,HL ; ..put destination in HL + POP HL ; Restore CCP entry address + + JP (HL) ; Go to Z-System for further processing + +;..... +; Common DMA move sequence placed here in CSEG for Common access +; Enter with HL pointing to a DMA definition block + + IF [BANKED OR FASTWB OR RAMDSK] +DMAMOV: LD BC,8*256+SAR0L ; Send 8 bytes to Ports SAR0L + OTIMR + LD A,00000010B ; Set DMA Mode control to Burst Mode + OUT0 (DMODE),A + LD A,40H ; Enable DMA0 + OUT0 (DSTAT),A ; ..and move the block + RET + ENDIF + + IF [Z3 AND HAVIOP] +; Aux Jump Table so IOP's can find routines. After Cold Boot, the +; address of this table is placed in BIOSJT+1. + +IOPRET: JP CONST + JP CONIN + JP CONOUT + JP LIST + JP AUXOUT + JP AUXIN + JP LISTST + ENDIF + + DSEG ; Put the following areas in Data Segment + +; Command processor address and length used when saving +; and restoring cached copy. + IF FASTWB +CPADR DEFS 2 ; Command processor address +CPLEN DEFS 2 ; Command processor length + ENDIF ;fastwb +;========================= End of WBOOT ============================ + \ No newline at end of file diff --git a/Source/BPBIOS/z33.zex b/Source/BPBIOS/z33.zex index a51c0093..bd8b92d3 100644 --- a/Source/BPBIOS/z33.zex +++ b/Source/BPBIOS/z33.zex @@ -1,2 +1,3 @@ IOPINIT -LDR SYS.RCP,SYS.NDR,SYS.FCP,WW.Z3T \ No newline at end of file +LDR SYS.RCP,SYS.NDR,SYS.FCP,WW.Z3T + \ No newline at end of file diff --git a/Source/BPBIOS/z34.zex b/Source/BPBIOS/z34.zex index a51c0093..bd8b92d3 100644 --- a/Source/BPBIOS/z34.zex +++ b/Source/BPBIOS/z34.zex @@ -1,2 +1,3 @@ IOPINIT -LDR SYS.RCP,SYS.NDR,SYS.FCP,WW.Z3T \ No newline at end of file +LDR SYS.RCP,SYS.NDR,SYS.FCP,WW.Z3T + \ No newline at end of file diff --git a/Source/BPBIOS/z3base.lib.sav b/Source/BPBIOS/z3base.lib.sav new file mode 100644 index 00000000..520777ce --- /dev/null +++ b/Source/BPBIOS/z3base.lib.sav @@ -0,0 +1,125 @@ +; B/P Bios System Z3 Definition File. + +; This file is adapted from the basic Z3BASE.LIB configuration file used for +; most ZCPR33 systems. It has added the new definitions for the Resident +; User Space defined in B/P Bios descriptions. +;========================================================================= +;== NOTE: The Starting Address of the User Space marks the lower == +;== base of memory and MUST be entered. B/P Bios Utilities use == +;== this address to locate many portions of the operating system. == +;========================================================================= +; To change your systems definition, first sketch out the memory map in the +; comment table, then set the equates to reflect the memory map, doing any +; required calculations for element sizes and required spaces. As an +; alternative, just leave this file alone and configure everything with +; the utilities provided. + +; FFD0 - FFFF 48 Bytes ZCPR3 External Stack +; FF00 - FFCF 208 Bytes Multiple Command Line Buffer +; FE00 - FEFF 256 Bytes Environment Descriptor +; Bytes 00H-7FH: Z3 Parameters +; Bytes 80H-FFH: Z3 TCAP +; FDFF 1 Byte Wheel byte +; FDF4 - FDFE 11 Bytes Path (5 elements) +; FDD0 - FDF3 36 Bytes ZCPR3 External FCB +; FD80 - FDCF 80 Bytes ZCPR3 Message Buffers +; FD00 - FD7F 128 Bytes ZCPR3 Shell Stack +; FC00 - FCFF 256 Bytes Named Directory Buffer +; FA00 - FBFF 512 Bytes Flow Command Package +; F200 - F9FF 2.0 KBytes Resident Command Package +; EC00 - F1FF 1.5 KBytes IO Package +; E900 - EBFF .75 KBytes Resident User Space + +; The remainder is for the Operating System. Exact sizes vary depending +; primarily on the Number and sizes of Hard Drive Partitions, but may be: + +; D100 - EBFF 5.0 KBytes B/P BIOS (unbanked version) +; C300 - D0FF 3.5 KBytes ZSDOS 1.0 BDOS +; BB00 - C2FF 2 KBytes ZCPR 3.3 Command Processor +; 0100 - BAFF ~46 KBytes Transient Program Area +; 0000 - 00FF 256 Bytes Standard CP/M Buffers +;======================================================================== + +FALSE EQU 0 +TRUE EQU NOT FALSE + +YES EQU TRUE +NO EQU FALSE + +; The External Stack is placed in the very top position in memory. It is +; mandatory for B/P Bios and ZCPR 3.3. + +EXTSTK EQU 0FFD0H ; ZCPR3 External Stack +EXTSTKS EQU YES + +; The Multiple Command Line Buffer is placed in the Top Page of Memory to +; place it above the Environment. It is mandatory for ZCPR 3.3. + +Z3CL EQU 0FF00H ; ZCPR3 Command Line Buffer +Z3CLS EQU 208-5 ; Size of Command Line Buffer-5 + +; The ZCPR3 External Environment Descriptor is mandatory B/P Bios & ZCPR 3.3. +; The Environment Descriptor MUST begin on an even Page Boundary (xx00H). + +Z3ENV EQU 0FE00H ; Environment Descriptors +Z3ENVS EQU 2 ; Size of Env Descriptor in 128-Byte Blks + +; The ZCPR3 Wheel Byte is mandatory for ZCPR 3.3. + +Z3WHL EQU 0FDFFH ; Wheel Byte Address +Z3WHLS EQU YES + +; The Path is mandatory for ZCPR 3.3. + +EXPATH EQU 0FDF4H ; External Path starting Address +EXPATHS EQU 5 ; (Path Size = EXPATHS*2 + 1 = 11 bytes) + ; This defines 5 2-byte Path Elements + +; The ZCPR3 External FCB is mandatory for ZCPR 3.3. + +EXTFCB EQU 0FDD0H ; 36-Byte ZCPR3 External FCB +EXTFCBS EQU YES + +; The ZCPR3 Message Buffers are mandatory for ZCPR 3.3. + +Z3MSG EQU 0FD80H ; 80-Byte ZCPR3 Message Buffer +Z3MSGS EQU YES + +; Shell Stack definition. Set SHSTKS to 0 to eliminate Shell Stack + +SHSTK EQU 0FD00H ; Shell Stack Starting Address +SHSTKS EQU 4 ; Number of SHSIZE-Byte Shell Stack entries +SHSIZE EQU 32 ; (Stack Size = SHSTKS * SHSIZE = 128 Bytes) + +; ZCPR3 Named Directory Buffer definition. Set Z3NDIRS to 0 to eliminate +; the named directory buffer. + +Z3NDIR EQU 0FC00H ; Start of Named Directory Buffer +Z3NDIRS EQU 14 ; Number of Named Directory Elements + ; (NDIR Size = Z3NDIRS * 18 + 1 = 253 Bytes) + +; Flow Command Package definition. Set FCPS to 0 to eliminate FCP + +FCP EQU 0FA00H ; Start of Flow Command Package +FCPS EQU 4 ; (FCP Size = 128 * FCPS = 512 Bytes) + +; Resident Command Processor Definition. Set RCPS to 0 to eliminate RCP + +RCP EQU 0F200H ; Start of Resident Command Processor +RCPS EQU 16 ; (RCP Size = 128 * RCPS = 2 kBytes) + +; IO Package definition. Set IOPS to 0 to eliminate IOP + +IOP EQU 0EC00H ; Start of IO Package +IOPS DEFL 12 ; (IOP Size = 128 * IOPS = 1.5 kBytes) + +;========================================================================= +; Resident User Space Definition. Set USPCS to 0 to eliminate USPC. +; The USPC Value marks the Lower Limit of Reserved Common High Memory and +; MUST BE PRESENT! + +USPC EQU 0E900H ; Start of Resident User Space (MANDATORY) +USPCS EQU 6 ; (USPC Size = 128 * USPCS = 0.75 kBytes) + +;--- End of Z3BASE.LIB --- + \ No newline at end of file diff --git a/Source/BPBIOS/z41.zex b/Source/BPBIOS/z41.zex index 385be293..010e3334 100644 --- a/Source/BPBIOS/z41.zex +++ b/Source/BPBIOS/z41.zex @@ -1,2 +1,4 @@ IOPINIT -LDR SYS.NDR,SYS.FCP,WW.Z3T \ No newline at end of file +LDR SYS.NDR,SYS.FCP,WW.Z3T +ZSCFG2 CB + \ No newline at end of file diff --git a/Source/BPBIOS/zcpr33.bin b/Source/BPBIOS/zcpr33.bin deleted file mode 100644 index 984d1ba6b33dc1404671cf9f0a17e6336ff08516..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 2048 zcmaJ?U2Ggz6~42(9*TAumBzg~FtrNKuK38@ckuui{@6u1sTm zuJHcM7XEwFL zBK@^vt7n6-`r}{(hl%`0{j^`5#^K&GKHZh=iPH}pbvLt3s4Y}0$Wi!F577@Dbyy!P z23XY$WaImKI+!E#Q1>d`X*NHm*ZctEc>hXqArOaNevlQME0%tfhHxAI%NlV;nC1%1 z6uGK60J*e?);MG)O!~H?3UQL?5O34Ro!05^zVbIKUVjZh>vuBr=MIhqA(bb?hzth` z3MfMIuZ)laxgN%0ZPBm3RXu>^>J(O3x_hc0DCd0BRuceb>1tX+zJh)32-xiO7l?zn6DnKB_-EQ=*1&+Fblpz|*l5A0 zJ!Lq}g&}0!K-v=-Z-B5W@LjmF-g_n^y@+;V0_d0Lv%OLp78U6zvLMptGfRGCbN@<_ z{v{jecmPbqTccmgsjam-EYi8!+O~eF7*9~!*@CRp@BUyn(5K1HkS+YxAkP z`i9>0ZTy`wtIhT>_X!NPLt;)#{i1@;h@D{xTX#>wEN zYr&hV8?!FM;79ISSqRO-Mgh=MoSQ(Io32Uh%J#-d`Z;Io6Zs#&9pOH2txQ``p;otD zptO*b|2``S@?S0OBcJVeLWF&;Aj%&Ll6*_K0Mx8lb07ww142SB7|mG$%a^2ZKnUSm zlDRyfb=QQOAmM)w*p*?Fw1O+vZR4)~Kuh0AA{#e!;iZy%rP!P0IA_sH65NPp8dM?NFM2*}?Ze zJ}^hW?WmnnxT!26ZV_6A{x+Y7{)3iNkk8mEN|7dqVW(kmpn~%Kw85G(C&Z*s6ChQ> zO_MOLAy;Sz6fa9o5O%+JY_-o-zJVkW$vm55h(pL`EM6bF1|_xx(zW&0^w>30zDe)o zA4134CdcdYjp&I#pvpeg;Yh(h=tX0YMp(YJQm!N@%Jf;bd~@m$)lIsw?6)r~=+qU{BENWGt76et{7A zD)7}~sH$zo7}pNrYk4Cohm1DhGA-s)cgj>u*X6K+ICieIn9(P*AScREcf?cbvQi@+w!A-xpzNX{#(SYrKP)HxLvMF>S1}!#w0- zZtzBHv7D){E1zfb$#p=UOj8eMA%J{kf=sctBJ`mGec4ej(=R!AoV5cmfyucLgi|pf z`#rosd%HMKKGP%4Lg}o- RDzC85lkR@%Q~ZAn{{f6JiOv83 diff --git a/Source/Build.cmd b/Source/Build.cmd index aa70ae82..d2e89e9e 100644 --- a/Source/Build.cmd +++ b/Source/Build.cmd @@ -1,4 +1,4 @@ @echo off setlocal -pushd BIOS && Powershell .\Build.ps1 %* && popd +pushd HBIOS && Powershell .\Build.ps1 %* && popd diff --git a/Source/BuildCommon.cmd b/Source/BuildCommon.cmd index 96c1def1..ff5f5f1a 100644 --- a/Source/BuildCommon.cmd +++ b/Source/BuildCommon.cmd @@ -6,3 +6,4 @@ pushd CPM22 && call Build && popd pushd ZCPR && call Build && popd pushd ZCPR-DJ && call Build && popd pushd ZSDOS && call Build && popd +pushd CBIOS && call Build && popd diff --git a/Source/CBIOS/Build.cmd b/Source/CBIOS/Build.cmd index ee0da72b..14d1eab1 100644 --- a/Source/CBIOS/Build.cmd +++ b/Source/CBIOS/Build.cmd @@ -11,12 +11,14 @@ set ZXBINDIR=%TOOLS%/cpm/bin/ set ZXLIBDIR=%TOOLS%/cpm/lib/ set ZXINCDIR=%TOOLS%/cpm/include/ -call :asm cbios || goto :eof - -goto :eof +echo. +echo Building CBIOS for RomWBW... +echo. +tasm -t80 -b -g3 -fFF -dPLTWBW cbios.asm cbios_wbw.bin cbios_wbw.lst +if errorlevel 1 goto :eof -:asm echo. -echo Building %1... -tasm -t80 -b -g3 -fFF %1.asm %1.bin %1.lst -goto :eof +echo Building CBIOS for UNA... +echo. +tasm -t80 -b -g3 -fFF -dPLTUNA cbios.asm cbios_una.bin cbios_una.lst +if errorlevel 1 goto :eof diff --git a/Source/CBIOS/build.inc b/Source/CBIOS/build.inc deleted file mode 100644 index cad054b7..00000000 --- a/Source/CBIOS/build.inc +++ /dev/null @@ -1,13 +0,0 @@ -; RomWBW Configured for N8VEM simh, 2015-02-14T09:50:52 -; -#DEFINE TIMESTAMP "14-Feb-2015" -; -PLATFORM .EQU PLT_N8VEM ; HARDWARE PLATFORM -ROMSIZE .EQU 512 ; SIZE OF ROM IN KB -; -; INCLUDE PLATFORM SPECIFIC DEVICE DEFINITIONS -; -#INCLUDE "std-n8vem.inc" -; -#INCLUDE "config.asm" -; diff --git a/Source/CBIOS/cbios.asm b/Source/CBIOS/cbios.asm index 1a2d9000..e32bfabc 100644 --- a/Source/CBIOS/cbios.asm +++ b/Source/CBIOS/cbios.asm @@ -1,23 +1,66 @@ ;__________________________________________________________________________________________________ ; -; CBIOS FOR N8VEM +; CBIOS FOR SBC ; ; BY ANDREW LYNCH, WITH INPUT FROM MANY SOURCES ; ROMWBW ADAPTATION BY WAYNE WARTHEN ;__________________________________________________________________________________________________ ; -; The std.asm file contains the majority of the standard equates -; that describe data structures, magic values and bit fields used -; by the CBIOS. +FALSE .EQU 0 +TRUE .EQU ~FALSE ; +; DEFINE PLATFORM STRING ; +#IFDEF PLTWBW +#DEFINE PLTSTR "WBW" +#ENDIF +#IFDEF PLTUNA +#DEFINE PLTSTR "UNA" +#ENDIF ; -; IOBYTE INIT -; CIO ASSIGNMENTS -; CRT SETUP +; RAM DISK INITIALIZATION OPTIONS ; - -#INCLUDE "std.asm" +CLR_NEVER .EQU 0 ; NEVER CLEAR RAM DISK +CLR_AUTO .EQU 1 ; CLEAR RAM DISK IF INVALID DIR ENTRIES +CLR_ALWAYS .EQU 2 ; ALWAYS CLEAR RAM DISK +; +; DISK OPERATION CONSTANTS +; +DOP_READ .EQU 0 ; READ OPERATION +DOP_WRITE .EQU 1 ; WRITE OPERATION +; +; SPECIAL CHARACTER DEVICES IMPLEMENTED INTERNALLY +; +DEV_BAT .EQU $FE ; BAT: +DEV_NUL .EQU $FF ; NUL: +; +#INCLUDE "../HBIOS/ver.inc" +; +#INCLUDE "config.asm" +; +; MEMORY LAYOUT +; +IOBYTE .EQU 3 ; LOC IN PAGE 0 OF I/O DEFINITION BYTE +CDISK .EQU 4 ; LOC IN PAGE 0 OF CURRENT DISK NUMBER 0=A,...,15=P +; +CCP_LOC .EQU CPM_LOC +CCP_SIZ .EQU $800 +; +BDOS_LOC .EQU CCP_LOC + CCP_SIZ +BDOS_SIZ .EQU $E00 +; +CBIOS_LOC .EQU BDOS_LOC + BDOS_SIZ +CBIOS_END .EQU CPM_END +; +MEMTOP .EQU $10000 +; +#IFDEF PLTWBW +#INCLUDE "../HBIOS/hbios.inc" +#ENDIF +; +#IFDEF PLTUNA +#INCLUDE "../HBIOS/ubios.inc" +#ENDIF ; .ORG CBIOS_LOC ; DEFINED IN STD.ASM ; @@ -90,67 +133,64 @@ CBXSIZ .EQU $ - CBX ; ; MAP LOGICAL CHARACTER DEVICES TO PHYSICAL CHARACTER DEVICES ; -#IF (PLATFORM == PLT_UNA) - -LD_TTY .EQU 0 -LD_CRT .EQU 0 -LD_BAT .EQU CIODEV_BAT -LD_UC1 .EQU 0 -LD_PTR .EQU 0 -LD_UR1 .EQU 0 -LD_UR2 .EQU 0 -LD_PTP .EQU 0 -LD_UP1 .EQU 0 -LD_UP2 .EQU 0 -LD_LPT .EQU 0 -LD_UL1 .EQU 0 +; IOBYTE (0003H) +; ============== +; +; Device LST: PUN: RDR: CON: +; Bit position 7 6 5 4 3 2 1 0 +; +; Dec Binary +; +; 0 00 TTY: TTY: TTY: TTY: +; 1 01 CRT: PTP: PTR: CRT: +; 2 10 LPT: UP1: UR1: BAT: +; 3 11 UL1: UP2: UR2: UC1: +; +; TTY: Teletype device (slow speed console) +; CRT: Cathode ray tube device (high speed console) +; BAT: Batch processing (input from RDR:, output to LST:) +; UC1: User-defined console +; PTR: Paper tape reader (high speed reader) +; UR1: User-defined reader #1 +; UR2: User-defined reader #2 +; PTP: Paper tape punch (high speed punch) +; UP1: User-defined punch #1 +; UP2: User-defined punch #2 +; LPT: Line printer +; UL1: User-defined list device #1 +; +#IFDEF PLTUNA + +LD_TTY .EQU 0 ; -> COM0: +LD_CRT .EQU 0 ; -> CRT: +LD_BAT .EQU DEV_BAT +LD_UC1 .EQU 0 ; -> COM1: +LD_PTR .EQU 0 ; -> COM1: +LD_UR1 .EQU 0 ; -> COM2: +LD_UR2 .EQU 0 ; -> COM3: +LD_PTP .EQU 0 ; -> COM1: +LD_UP1 .EQU 0 ; -> COM2: +LD_UP2 .EQU 0 ; -> COM3: +LD_LPT .EQU 0 ; -> LPT0: +LD_UL1 .EQU 0 ; -> LPT1: #ELSE -#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) -TTYDEV .EQU CIODEV_ASCI -#ELSE -TTYDEV .EQU CIODEV_UART -#ENDIF -; -LD_TTY .EQU TTYDEV -LD_CRT .EQU TTYDEV -LD_BAT .EQU CIODEV_BAT -LD_UC1 .EQU TTYDEV -LD_PTR .EQU TTYDEV -LD_UR1 .EQU TTYDEV -LD_UR2 .EQU TTYDEV -LD_PTP .EQU TTYDEV -LD_UP1 .EQU TTYDEV -LD_UP2 .EQU TTYDEV -LD_LPT .EQU TTYDEV -LD_UL1 .EQU TTYDEV -;; -;#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) -;LD_UC1 .SET CIODEV_ASCI + 1 -;LD_PTR .SET CIODEV_ASCI + 1 -;LD_PTP .SET CIODEV_ASCI + 1 -;#ENDIF -;; -;#IF (UARTENABLE & (UARTCNT >= 2)) -LD_UC1 .SET CIODEV_UART + 1 -LD_PTR .SET CIODEV_UART + 1 -LD_PTP .SET CIODEV_UART + 1 -;#ENDIF -; -;#IF (VDUENABLE | CVDUENABLE | N8VENABLE) -LD_CRT .SET CIODEV_CRT -;#ENDIF -;#IF (PRPENABLE & PRPCONENABLE) -;LD_CRT .SET CIODEV_PRPCON -;#ENDIF -;#IF (PPPENABLE & PPPCONENABLE) -;LD_CRT .SET CIODEV_PPPCON -;#ENDIF +LD_TTY .EQU CIODEV_CONSOLE ; -> COM0: +LD_CRT .EQU CIODEV_CONSOLE ; -> CRT: +LD_BAT .EQU DEV_BAT +LD_UC1 .EQU CIODEV_CONSOLE ; -> COM1: +LD_PTR .EQU CIODEV_CONSOLE ; -> COM1: +LD_UR1 .EQU CIODEV_CONSOLE ; -> COM2: +LD_UR2 .EQU CIODEV_CONSOLE ; -> COM3: +LD_PTP .EQU CIODEV_CONSOLE ; -> COM1: +LD_UP1 .EQU CIODEV_CONSOLE ; -> COM2: +LD_UP2 .EQU CIODEV_CONSOLE ; -> COM3: +LD_LPT .EQU CIODEV_CONSOLE ; -> LPT0: +LD_UL1 .EQU CIODEV_CONSOLE ; -> LPT1: #ENDIF ; - .DB DEVCNT DEVMAP: ; ; CONSOLE @@ -174,12 +214,8 @@ DEVMAP: .DB LD_LPT ; LST:=LPT: (IOBYTE 10XXXXXX) .DB LD_UL1 ; LST:=UL1: (IOBYTE 11XXXXXX) ; -DEVCNT .EQU ($ - DEVMAP) - .ECHO DEVCNT - .ECHO " Input/Output devices defined.\n" -; ;================================================================================================== -; DRIVE MAPPING TABLE +; DRIVE MAPPING TABLE (DRVMAP) ;================================================================================================== ; ; Disk mapping is done using a drive map table (DRVMAP) which is built @@ -221,31 +257,46 @@ DPBCNT .EQU ($ - DPBMAP) / 2 ;================================================================================================== ; ;__________________________________________________________________________________________________ - BOOT: ; STANDARD BOOT INVOCATION DI IM 1 LD SP,STACK ; STACK FOR INITIALIZATION ; - CALL INIT ; EXECUTE COLD BOOT CODE ROUTINE + CALL INIT ; EXECUTE COLD BOOT ROUTINE ; - LD SP,$100 ; MOVE STACK SO WE CAN INIT BUFFER AREA - LD HL,INIT ; INIT BUFFERS AREA - LD BC,CBIOS_END - INIT ; SIZE OF BUFFER SPACE - CALL FILL ; DO IT + ; CLEAR BUFFER SPACE STARTING AT DIRBUF TO TOP OF CBIOS + ; INIT SETS UP HL AND BC SO WE ARE READY TO CALL FILL + LD SP,$100 ; MOVE STACK OUT OF THE WAY TEMPORARILY + CALL FILL ; CLEAR DISK BUFFER AREA ; LD SP,STACK ; PUT STACK BACK WHERE IT BELONGS JR GOCPM ; THEN OFF TO CP/M WE GO... ; ;__________________________________________________________________________________________________ +REBOOT: + ; REBOOT FROM ROM, REPLACES BOOT AFTER INIT +#IFDEF PLTUNA + LD BC,$01FB ; UNA FUNC = SET BANK + LD DE,0 ; ROM BOOT BANK + CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) +#ENDIF +#IFDEF PLTWBW + LD A,0 ; ROM BOOT BANK + CALL HB_BNKSEL ; SELECT IT INTO LOW MEMORY +#ENDIF +; + ; JUMP TO RESTART ADDRESS + JP 0 +; +;__________________________________________________________________________________________________ WBOOT: DI IM 1 ; LD SP,STACK ; STACK FOR INITIALIZATION ; -#IF (PLATFORM == PLT_UNA) +#IFDEF PLTUNA ; RESTORE COMMAND PROCESSOR FROM UNA BIOS CACHE LD BC,$01FB ; UNA FUNC = SET BANK LD DE,BID_BIOS ; UBIOS_PAGE (SEE PAGES.INC) @@ -253,7 +304,7 @@ WBOOT: PUSH DE ; SAVE PREVIOUS BANK LD HL,(CCPBUF) ; ADDRESS OF CCP BUF IN BIOS MEM - LD DE,CPM_LOC ; ADDRESS IN HI MEM OF CCP + LD DE,CCP_LOC ; ADDRESS IN HI MEM OF CCP LD BC,CCP_SIZ ; SIZE OF CCP LDIR ; DO IT @@ -263,21 +314,30 @@ WBOOT: #ELSE ; RESTORE COMMAND PROCESSOR FROM CACHE IN HB BANK LD B,BF_SYSXCPY ; HBIOS FUNC: SYSTEM EXTENDED COPY - LD D,BID_USR ; D = DEST BANK = USR BANK = TPA - LD E,BID_BIOS ; E = SRC BANK = HB BANK + LD DE,(BNKBIOS) ; D = DEST (USER BANK), E = SRC (BIOS BANK) RST 08 ; SET BANKS FOR INTERBANK COPY LD B,BF_SYSCPY ; HBIOS FUNC: SYSTEM COPY LD HL,(CCPBUF) ; COPY FROM FIXED LOCATION IN HB BANK - LD DE,CPM_LOC ; TO CCP LOCATION IN USR BANK + LD DE,CCP_LOC ; TO CCP LOCATION IN USR BANK LD IX,CCP_SIZ ; COPY CONTENTS OF COMMAND PROCESSOR RST 08 ; DO IT #ENDIF ; + ; SOME APPLICATIONS STEAL THE BDOS SERIAL NUMBER STORAGE + ; AREA (FIRST 6 BYTES OF BDOS) ASSUMING IT WILL BE RESTORED + ; AT WARM BOOT BY RELOADING OF BDOS. WE DON'T WANT TO RELOAD + ; BDOS, SO INSTEAD THE SERIAL NUMBER STORAGE IS FIXED HERE + ; SO THAT THE DRI SERIAL NUMBER VERIFICATION DOES NOT FAIL + LD HL,BDOS_LOC + LD BC,6 + XOR A + CALL FILL +; ; FALL THRU TO INVOKE CP/M ; ;__________________________________________________________________________________________________ GOCPM: -#IF (PLATFORM == PLT_UNA) +#IFDEF PLTUNA ; USE A DEDICATED BUFFER FOR UNA PHYSICAL DISK I/O LD HL,SECBUF ; ADDRESS OF PHYSICAL SECTOR BUFFER LD (BUFADR),HL ; SAVE IT IN BUFADR FOR LATER @@ -338,7 +398,7 @@ CURDSK: LD A,(CDISK) ; GET CURRENT USER/DISK GOCCP: LD C,A ; SETUP C WITH CURRENT USER/DISK, ASSUME IT IS OK - JP CCP_ENT ; JUMP TO COMMAND PROCESSOR + JP CCP_LOC ; JUMP TO COMMAND PROCESSOR ; ;__________________________________________________________________________________________________ GOMON: @@ -485,13 +545,13 @@ CIOIN: ;CIOOUT: ;; COMPLETION ROUTINE FOR CHARACTER OUTPUT FUNCTIONS ;; - RET +; RET ; ;__________________________________________________________________________________________________ CIOST: ; COMPLETION ROUTINE FOR CHARACTER STATUS FUNCTIONS (IST/OST) ; -#IF (PLATFORM == PLT_UNA) +#IFDEF PLTUNA LD A,E #ENDIF OR A ; SET FLAGS @@ -519,24 +579,23 @@ CIO_DISP: CALL ADDHLA ; ADD OFFSET LD A,(HL) ; LOOKUP DEVICE CODE -#IF (PLATFORM == PLT_UNA) +#IFDEF PLTUNA LD C,B ; MOVE FUNCTION TO C LD B,A ; DEVICE GOES IN B #ELSE LD C,A ; SAVE IN C FOR BIOS USAGE #ENDIF - CP CIODEV_BAT ; CHECK FOR SPECIAL DEVICE (BAT, NUL) + CP DEV_BAT ; CHECK FOR SPECIAL DEVICE (BAT, NUL) JR NC,CIO_DISP1 ; HANDLE SPECIAL DEVICE RST 08 ; RETURN VIA COMPLETION ROUTINE SET AT START RET - + CIO_DISP1: ; HANDLE SPECIAL DEVICES - AND $F0 ; ISOLATE DEVICE - CP CIODEV_BAT ; BAT: ? + CP DEV_BAT ; BAT: ? JR Z,CIO_BAT ; YES, GO TO BAT DEVICE HANDLER - CP CIODEV_NUL ; NUL: ? + CP DEV_NUL ; NUL: ? JR Z,CIO_NUL ; YES, GO TO NUL DEVICE HANDLER CALL PANIC ; SOMETHING BAD HAPPENED ; @@ -572,11 +631,11 @@ CIO_NUL: NUL_IN: LD E,$1B ; RETURN EOF NUL_OUT: - RET + RET ; SWALLOW CHARACTER ; NUL_IST: NUL_OST: - OR $FF ; A=$FF & NZ SET + OR $FF ; A=$FF & NZ (READY) RET ; ;================================================================================================== @@ -645,7 +704,7 @@ WRITE: ; ;__________________________________________________________________________________________________ READWRITE: - LD (DSKOP),A ; SET THE ACTIVE DISK OPERATION + LD (DSKOP),A ; SET THE ACTIVE DISK OPERATION JR BLKRW ; ;================================================================================================== @@ -663,7 +722,6 @@ BLKRES: LD (UNACNT),A ; CLEAR UNALLOC COUNT RET - ;__________________________________________________________________________________________________ ; ; FLUSH (DE)BLOCKING ALGORITHM - DO PENDING WRITES @@ -826,20 +884,20 @@ UNA_INI: ; SETUP UNACNT AND UNASPT LD HL,(SEKDPH) ; HL POINTS TO DPH LD DE,10 ; OFFSET OF DPB ADDRESS IN DPH - ADD HL,DE ; DPH POINTS TO DPB ADDRESS - LD A,(HL) - INC HL - LD H,(HL) - LD L,A ; HL POINTS TO DPB - LD C,(HL) - INC HL - LD B,(HL) ; BC HAS SPT + ADD HL,DE ; HL PIONTS TO DPB ENTRY IN DPH + LD A,(HL) ; DEREFERENCE HL + INC HL ; ... TO GET + LD H,(HL) ; ... DPB ADDRESS + LD L,A ; ... SO HL NOW POINTS TO DPB ADDRESS + LD C,(HL) ; DEREFERENCE HL + INC HL ; ... INTO BC SO THAT + LD B,(HL) ; ... BC NOW HAS SPT LD (UNASPT),BC ; SAVE SECTORS PER TRACK - DEC HL - DEC HL ; HL POINTS TO RECORDS PER BLOCK (BYTE IN FRONT OF DPB) + DEC HL ; BACKUP TO START OF DPB + DEC HL ; BACKUP ONE BYTE FOR RECORDS PER BLOCK (BYTE IN FRONT OF DPB) LD A,(HL) ; GET IT LD (UNACNT),A ; SAVE IT - + RET ; ;__________________________________________________________________________________________________ @@ -991,7 +1049,7 @@ BLK_CMPLOOP: ; BLOCK DATA - INSERT CPM DMA BUF INTO PROPER PART OF PHYSICAL SECTOR BUFFER ; BLK_BLOCK: -#IF (PLATFORM == PLT_UNA) +#IFDEF PLTUNA CALL BLK_SETUP EX DE,HL LD BC,128 @@ -999,8 +1057,10 @@ BLK_BLOCK: RET #ELSE LD B,BF_SYSXCPY ; HBIOS FUNC: SYSTEM EXTENDED COPY - LD E,BID_USR ; E=SRC=USER BANK=TPA - LD D,BID_BIOS ; D=DEST=HBIOS + LD A,(BNKUSER) ; GET USER BANK + LD E,A ; E = SOURCE (USER BANK) + LD A,(BNKBIOS) ; GET DEST BANK + LD D,A ; D = DEST (BIOS BANK) RST 08 ; SET BANKS FOR INTERBANK COPY CALL BLK_SETUP ; SETUP SOURCE AND DESTINATION LD B,BF_SYSCPY ; HBIOS FUNC: SYSTEM COPY @@ -1017,15 +1077,14 @@ BLK_BLOCK: ; DEBLOCK DATA - EXTRACT DESIRED CPM DMA BUF FROM PHYSICAL SECTOR BUFFER ; BLK_DEBLOCK: -#IF (PLATFORM == PLT_UNA) +#IFDEF PLTUNA CALL BLK_SETUP LD BC,128 LDIR RET #ELSE LD B,BF_SYSXCPY ; HBIOS FUNC: SYSTEM EXTENDED COPY - LD E,BID_BIOS ; C=SRC=HBIOS - LD D,BID_USR ; B=DEST=USER BANK=TPA + LD DE,(BNKBIOS) ; E = SOURCE (BIOS BANK), D = DEST (USER BANK) RST 08 ; DO IT CALL BLK_SETUP ; SETUP SOURCE AND DESTINATION LD B,BF_SYSCPY ; HBIOS FUNC: SYSTEM COPY @@ -1041,9 +1100,8 @@ BLK_DEBLOCK: ; SETUP SOURCE AND DESTINATION POINTERS FOR BLOCK COPY OPERATION ; AT EXIT, HL = ADDRESS OF DESIRED BLOCK IN SECTOR BUFFER, DE = DMA ; -BLK_SETUP: - LD BC,(SEKSEC) - LD A,C +BLK_SETUP: + LD A,(SEKSEC) ; GET LOW BYTE OF SECTOR AND 3 ; A = INDEX OF CPM BUF IN SEC BUF RRCA ; MULTIPLY BY 64 RRCA @@ -1122,7 +1180,7 @@ DSK_SELECT: ; RESTORE DE TO BC (FOR ACCESS TO DRIVE LOGIN BIT) POP BC ; GET ORIGINAL E INTO B ; -#IF (PLATFORM != PLT_UNA) +#IFDEF PLTWBW ; ; CHECK IF THIS IS LOGIN, IF NOT, BYPASS MEDIA DETECTION ; FIX: WHAT IF PREVIOUS MEDIA DETECTION FAILED??? @@ -1165,7 +1223,7 @@ DSK_SELECT2: ; ; DSK_STATUS: -#IF (PLATFORM == PLT_UNA) +#IFDEF PLTUNA XOR A ; ASSUME OK FOR NOW RET ; RETURN #ELSE @@ -1196,7 +1254,7 @@ DSK_WRITE: ; ; ; -#IF (PLATFORM == PLT_UNA) +#IFDEF PLTUNA DSK_IO: DSK_IO1: @@ -1297,7 +1355,6 @@ DSK_IO2: ; UTILITY FUNCTIONS ;================================================================================================== ; -#DEFINE CIOMODE_CBIOS ORG_UTIL .EQU $ #INCLUDE "util.asm" SIZ_UTIL .EQU $ - ORG_UTIL @@ -1340,10 +1397,6 @@ PRTHOME: ; ;__________________________________________________________________________________________________ PRTDSKOP: - - LD (XSTKSAV),SP - LD SP,XSTK - CALL NEWLINE LD A,(DSKOP) LD DE,STR_READ @@ -1366,16 +1419,7 @@ PRTDSKOP: CALL WRITESTR LD BC,(SEKSEC) CALL PRTHEXWORD - - LD SP,(XSTKSAV) - - RET - RET - -XSTKSAV .DW 0 - .FILL $20 -XSTK .EQU $ ; STR_SELDSK .DB "SELDSK$" STR_HOME .DB "HOME$" @@ -1398,24 +1442,29 @@ SECADR .DW 0 ; ADDRESS OF SECTOR IN ROM/RAM PAGE DEFDRIVE .DB 0 ; DEFAULT DRIVE CCPBUF .DW $7000 ; ADDRESS OF CCP BUF IN BIOS BANK ; +#IFDEF PLTWBW +BNKBIOS .DB 0 ; BIOS BANK ID +BNKUSER .DB 0 ; USER BANK ID +#ENDIF +; ; DOS DISK VARIABLES ; -DSKOP: .DB 0 ; DISK OPERATION (DOP_READ/DOP_WRITE) -WRTYPE: .DB 0 ; WRITE TYPE (0=NORMAL, 1=DIR (FORCE), 2=FIRST RECORD OF BLOCK) -DMAADR: .DW 0 ; DIRECT MEMORY ADDRESS -HSTWRT: .DB 0 ; TRUE = BUFFER IS DIRTY -BUFADR: .DW $8000-$0400 ; ADDRESS OF PHYSICAL SECTOR BUFFER (DEFAULT MATCHES HBIOS) +DSKOP .DB 0 ; DISK OPERATION (DOP_READ/DOP_WRITE) +WRTYPE .DB 0 ; WRITE TYPE (0=NORMAL, 1=DIR (FORCE), 2=FIRST RECORD OF BLOCK) +DMAADR .DW 0 ; DIRECT MEMORY ADDRESS +HSTWRT .DB 0 ; TRUE = BUFFER IS DIRTY +BUFADR .DW $8000-$0400 ; ADDRESS OF PHYSICAL SECTOR BUFFER (DEFAULT MATCHES HBIOS) ; -; DISK I/O REQUEST PENDING +; LOGICAL DISK I/O REQUEST PENDING ; SEK: -SEKDSK: .DB 0 ; DISK NUMBER 0-15 -SEKTRK: .DW 0 ; TWO BYTES FOR TRACK # (LOGICAL) -SEKSEC: .DW 0 ; TWO BYTES FOR SECTOR # (LOGICAL) -SEKDU: .DB 0 ; DEVICE/UNIT -SEKDPH: .DW 0 ; ADDRESS OF ACTIVE (SELECTED) DPH -SEKOFF: .DW 0 ; TRACK OFFSET IN EFFECT FOR LU -SEKACT: .DB TRUE ; ALWAYS TRUE! +SEKDSK .DB 0 ; DISK NUMBER 0-15 +SEKTRK .DW 0 ; TWO BYTES FOR TRACK # (LOGICAL) +SEKSEC .DW 0 ; TWO BYTES FOR SECTOR # (LOGICAL) +SEKDU .DB 0 ; DEVICE/UNIT +SEKDPH .DW 0 ; ADDRESS OF ACTIVE (SELECTED) DPH +SEKOFF .DW 0 ; TRACK OFFSET IN EFFECT FOR LU +SEKACT .DB TRUE ; ALWAYS TRUE! ; ; RESULT OF CPM TO PHYSICAL TRANSLATION ; @@ -1425,7 +1474,7 @@ XLTTRK .DW 0 XLTSEC .DW 0 XLTDU .DB 0 XLTDPH .DW 0 -XLTOFF: .DW 0 +XLTOFF .DW 0 XLTACT .DB TRUE ; ALWAYS TRUE! ; XLTSIZ .EQU $ - XLT @@ -1441,35 +1490,33 @@ HSTDPH .DW 0 ; CURRENT DPH ADDRESS HSTOFF .DW 0 ; TRACK OFFSET IN EFFECT FOR LU HSTACT .DB 0 ; TRUE = BUFFER HAS VALID DATA ; -; SEQUENTIAL WRITE TRACKING FOR UNALLOCATED BLOCK +; SEQUENTIAL WRITE TRACKING FOR (UNA)LLOCATED BLOCK ; UNA: -UNADSK: .DB 0 ; DISK NUMBER 0-15 -UNATRK: .DW 0 ; TWO BYTES FOR TRACK # (LOGICAL) -UNASEC: .DW 0 ; TWO BYTES FOR SECTOR # (LOGICAL) +UNADSK .DB 0 ; DISK NUMBER 0-15 +UNATRK .DW 0 ; TWO BYTES FOR TRACK # (LOGICAL) +UNASEC .DW 0 ; TWO BYTES FOR SECTOR # (LOGICAL) ; UNASIZ .EQU $ - UNA ; -UNACNT: .DB 0 ; COUNT DOWN UNALLOCATED RECORDS IN BLOCK -UNASPT: .DW 0 ; SECTORS PER TRACK +UNACNT .DB 0 ; COUNT DOWN UNALLOCATED RECORDS IN BLOCK +UNASPT .DW 0 ; SECTORS PER TRACK ; ;================================================================================================== ; DISK CONTROL STRUCTURES (DPB, DPH) ;================================================================================================== ; -RAMBLKS .EQU (((BID_RAMDN - BID_RAMD0 + 1) * 32) / 2) -CKS_RAM .EQU 0 ; CKS: 0 FOR NON-REMOVABLE MEDIA -ALS_RAM .EQU ((RAMBLKS + 7) / 8) ; ALS: BLKS / 8 (ROUNDED UP) +CKS_RAM .EQU 0 ; CKS: 0 FOR NON-REMOVABLE MEDIA +ALS_RAM .EQU 24 ; ALS: BLKS / 8 = 192 / 8 = 24 (ASSUMES 512K DISK) ; -ROMBLKS .EQU (((BID_ROMDN - BID_ROMD0 + 1) * 32) / 2) -CKS_ROM .EQU 0 ; CKS: 0 FOR NON-REMOVABLE MEDIA -ALS_ROM .EQU ((ROMBLKS + 7) / 8) ; ALS: BLKS / 8 (ROUNDED UP) +CKS_ROM .EQU 0 ; CKS: 0 FOR NON-REMOVABLE MEDIA +ALS_ROM .EQU 24 ; ALS: BLKS / 8 = 192 / 8 = 24 (ASSUMES 512K DISK) ; -CKS_FD .EQU 64 ; CKS: DIR ENT / 4 = 256 / 4 = 64 -ALS_FD .EQU 128 ; ALS: BLKS / 8 = 1024 / 8 = 128 +CKS_FD .EQU 64 ; CKS: DIR ENT / 4 = 256 / 4 = 64 +ALS_FD .EQU 128 ; ALS: BLKS / 8 = 1024 / 8 = 128 ; -CKS_HD .EQU 0 ; CKS: 0 FOR NON-REMOVABLE MEDIA -ALS_HD .EQU 256 ; ALS: BLKS / 8 = 2048 / 8 = 256 (ROUNDED UP) +CKS_HD .EQU 0 ; CKS: 0 FOR NON-REMOVABLE MEDIA +ALS_HD .EQU 256 ; ALS: BLKS / 8 = 2048 / 8 = 256 (ROUNDED UP) ; ; ; DISK PARAMETER BLOCKS @@ -1492,21 +1539,24 @@ ALS_HD .EQU 256 ; ALS: BLKS / 8 = 2048 / 8 = 256 (ROUNDED UP) ; ; ROM DISK: 64 SECS/TRK (LOGICAL), 128 BYTES/SEC ; BLOCKSIZE (BLS) = 2K, DIRECTORY ENTRIES = 256 -; ROM DISK SIZE = TOTAL ROM - 32K RESERVED FOR SYSTEM USE +; ROM DISK SIZE = TOTAL ROM - 128K RESERVED FOR SYSTEM USE +; +; ALS_ROM, EXM, DSM MUST BE FILLED DYNAMICALLY: +; - ALS_ROM := (BANKS * 2) +; - EXM := (BANKS <= 16) ? 1 : 0 +; - DSM := (BANKS * 16) +; +; DEFAULT VALUES BELOW ARE FOR 512K ROM ; - .DW CKS_ROM - .DW ALS_ROM + .DW CKS_ROM ; CKS: ZERO FOR NON-REMOVABLE MEDIA + .DW ALS_ROM ; ALS: BLKS / 8 .DB (2048 / 128) ; RECORDS PER BLOCK (BLS / 128) DPB_ROM: .DW 64 ; SPT: SECTORS PER TRACK .DB 4 ; BSH: BLOCK SHIFT FACTOR .DB 15 ; BLM: BLOCK MASK -#IF ((ROMBLKS - 1) < 256) - .DB 1 ; EXM: EXTENT MASK -#ELSE - .DB 0 ; EXM: EXTENT MASK -#ENDIF - .DW ROMBLKS - 1 ; DSM: TOTAL STORAGE IN BLOCKS - 1 + .DB 1 ; EXM: (BLKS <= 256) ? 1 : 0 + .DW 192 - 1 ; DSM: TOTAL STORAGE IN BLOCKS - 1 .DW 255 ; DRM: DIR ENTRIES - 1 = 255 .DB 11110000B ; AL0: DIR BLK BIT MAP, FIRST BYTE .DB 00000000B ; AL1: DIR BLK BIT MAP, SECOND BYTE @@ -1516,21 +1566,24 @@ DPB_ROM: ; ; RAM DISK: 64 SECS/TRK, 128 BYTES/SEC ; BLOCKSIZE (BLS) = 2K, DIRECTORY ENTRIES = 256 -; RAM DISK SIZE = TOTAL RAM - 64K RESERVED FOR SYSTEM USE +; RAM DISK SIZE = TOTAL RAM - 128K RESERVED FOR SYSTEM USE +; +; ALS_RAM, EXM, DSM MUST BE FILLED DYNAMICALLY: +; - ALS_RAM := (BANKS * 2) +; - EXM := (BANKS <= 16) ? 1 : 0 +; - DSM := (BANKS * 16) ; - .DW CKS_RAM - .DW ALS_RAM +; DEFAULT VALUES BELOW ARE FOR 512K RAM +; + .DW CKS_RAM ; CKS: ZERO FOR NON-REMOVABLE MEDIA + .DW ALS_RAM ; ALS: BLKS / 8 .DB (2048 / 128) ; RECORDS PER BLOCK (BLS / 128) DPB_RAM: .DW 64 ; SPT: SECTORS PER TRACK .DB 4 ; BSH: BLOCK SHIFT FACTOR .DB 15 ; BLM: BLOCK MASK -#IF ((RAMBLKS - 1) < 256) - .DB 1 ; EXM: EXTENT MASK -#ELSE - .DB 0 ; EXM: EXTENT MASK -#ENDIF - .DW RAMBLKS - 1 ; DSM: TOTAL STORAGE IN BLOCKS - 1 + .DB 1 ; EXM: (BLKS <= 256) ? 1 : 0 + .DW 192 - 1 ; DSM: TOTAL STORAGE IN BLOCKS - 1 .DW 255 ; DRM: DIR ENTRIES - 1 = 255 .DB 11110000B ; AL0: DIR BLK BIT MAP, FIRST BYTE .DB 00000000B ; AL1: DIR BLK BIT MAP, SECOND BYTE @@ -1673,7 +1726,7 @@ DPB_FD111: .DW 64 ; CKS: DIRECTORY CHECK VECTOR SIZE = 256 / 4 .DW 2 ; OFF: RESERVED TRACKS = 2 TRKS * (512 B/SEC * 60 SEC/TRK) = 15K ; -#IF (PLATFORM == PLT_UNA) +#IFDEF PLTUNA SECBUF .FILL 512,0 ; PHYSICAL DISK SECTOR BUFFER #ENDIF ; @@ -1681,36 +1734,34 @@ SECBUF .FILL 512,0 ; PHYSICAL DISK SECTOR BUFFER ; CBIOS BUFFERS ;================================================================================================== ; -;BUFFERS: -; BUFPOOL .EQU $ ; START OF BUFFER POOL ; ;================================================================================================== ; COLD BOOT INITIALIZATION ; ; THIS CODE IS PLACED IN THE BDOS BUFFER AREA TO CONSERVE SPACE. SINCE -; COLD BOOT DOES NO DISK IO, SO THIS IS SAFE. +; COLD BOOT DOES NO DISK IO, THIS IS SAFE. ; ;================================================================================================== ; - .FILL 16 * 4,0 ; RESERVED FOR DRVMAP TABLE - .FILL 16 * 16,0 ; RESERVED FOR DPH TABLE +HCB .EQU $8000 ; LOCATION OF TEMP COPY OF HCB DURING INIT (256 BYTES) +INIBUF .EQU $8800 ; LOCATION OF TEMP WORK BUF DURING INIT (512 BYTES) +; +HEAPEND .EQU CBIOS_END - 64 ; TOP OF HEAP MEM, END OF CBIOS LESS 32 ENTRY STACK +; + .FILL 16 * 4,0 ; SKIP DRVMAP TABLE AREA + .FILL 16 * 16,0 ; SKIP DPH TABLE AREA ; INIT: - ; THIS INIT CODE WILL BE OVERLAID, SO WE ARE GOING - ; TO MODIFY THE BOOT ENTRY POINT TO CAUSE A PANIC - ; TO EASILY IDENTIFY IF SOMETHING TRIES TO INVOKE - ; THE BOOT ENTRY POINT AFTER INIT IS DONE. - LD A,$CD ; "CALL" INSTRUCTION - LD (BOOT),A ; STORE IT BOOT ENTRY POINT - LD HL,PANIC ; ADDRESS OF PANIC ROUTINE - LD (BOOT+1),HL ; STORE IT AT BOOT ENTRY + 1 - -#IF (PLATFORM == PLT_UNA) + ; ADJUST BOOT VECTOR TO REBOOT ROUTINE + LD HL,REBOOT ; GET REBOOT ADDRESS + LD (CBIOS_LOC + 1),HL ; STORE IT IN FIRST ENTRY OF CBIOS JUMP TABLE + +#IFDEF PLTUNA ; MAKE SURE UNA EXEC PAGE IS ACTIVE LD BC,$01FB ; UNA FUNC = SET BANK LD DE,BID_USR ; SWITCH BACK TO EXEC BANK - CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) + CALL $FFFD ; DO IT (RST 08 NOT YET INSTALLED) ; INSTALL UNA INVOCATION VECTOR FOR RST 08 LD A,$C3 ; JP INSTRUCTION @@ -1718,43 +1769,61 @@ INIT: LD HL,($FFFE) ; UNA ENTRY VECTOR LD (9),HL ; STORE AT 0x0009 #ELSE + ; ASK HBIOS FOR CRITICAL BANK ID'S (BIOS AND USER BANKS) + ; SAVE THESE VALUES FOR LATER USE + LD B,BF_SYSHCBGETB ; HB FUNC: GET HCB BYTE + LD C,HCB_BIDBIOS ; BIOS BANK ID + CALL $FFF0 ; RST 8 IS NOT YET INSTALLED + LD A,E ; PUT IN A + LD (BNKBIOS),A ; SAVE IT + LD B,BF_SYSHCBGETB ; HB FUNC: GET HCB BYTE + LD C,HCB_BIDUSR ; USER BANK ID + CALL $FFF0 ; RST 8 IS NOT YET INSTALLED + LD A,E ; PUT IN A + LD (BNKUSER),A ; SAVE IT + ; MAKE SURE USER BANK IS ACTIVE - LD B,BF_SYSSETBNK - LD C,BID_USR - CALL $FFF0 + LD B,BF_SYSSETBNK ; HB FUNC: SET BANK + LD A,(BNKUSER) ; SELECT USER BANK + LD C,A ; PUT IN C + CALL $FFF0 ; RST 8 IS NOT YET INSTALLED ; INSTALL HBIOS INVOCATION VECTOR FOR RST 08 LD A,$C3 ; JP INSTRUCTION LD (8),A ; STORE AT 0x0008 LD HL,($FFF1) ; HBIOS ENTRY VECTOR LD (9),HL ; STORE AT 0x0009 + + ; CREATE A TEMP COPY OF THE HBIOS CONFIG BLOCK (HCB) + ; FOR USE DURING INIT + LD B,BF_SYSXCPY ; HBIOS FUNC: SYSTEM EXTENDED COPY + LD DE,(BNKBIOS) ; D = DEST (USER BANK), E = SOURCE (BIOS BANK) + RST 08 ; SET BANKS FOR INTERBANK COPY + LD B,BF_SYSCPY ; HBIOS FUNC: SYSTEM COPY + LD HL,HCB_LOC ; COPY FROM FIXED LOCATION IN HB BANK + LD DE,HCB ; TO TEMP LOCATION IN USR BANK + LD IX,HCB_SIZ ; COPY CONTENTS OF HCB + RST 08 ; DO IT + + ; CAPTURE RAM DRIVE STARTING BANK + LD A,(HCB + HCB_BIDRAMD0) + LD (BNKRAMD),A #ENDIF + ; CBIOS BANNER + CALL NEWLINE ; FORMATTING + LD DE,STR_BANNER ; POINT TO BANNER + CALL WRITESTR ; DISPLAY IT + ; PARAMETER INITIALIZATION - LD A,DEFIOBYTE ; LOAD DEFAULT IOBYTE + XOR A ; LOAD DEFAULT IOBYTE LD (IOBYTE),A ; STORE IT -#IF ((PLATFORM != PLT_N8) & (PLATFORM != PLT_MK4) & (PLATFORM != PLT_S100) & (PLATFORM != PLT_UNA)) - IN A,(RTC) ; RTC PORT, BIT 6 HAS STATE OF CONFIG JUMPER - BIT 6,A ; BIT 6 HAS CONFIG JUMPER STATE - LD A,DEFIOBYTE ; ASSUME WE WANT DEFAULT IOBYTE VALUE - JR NZ,INIT1 ; IF BIT6=1, NOT SHORTED, CONTINUE WITH DEFAULT - LD A,ALTIOBYTE ; LOAD ALT IOBYTE VALUE -INIT1: - LD (IOBYTE),A ; SET THE ACTIVE IOBYTE -#ENDIF - ; INIT DEFAULT DRIVE TO A: FOR NOW XOR A ; ZERO LD (DEFDRIVE),A ; STORE IT - ; STARTUP MESSAGE - CALL NEWLINE ; FORMATTING - LD DE,STR_BANNER ; POINT TO BANNER - CALL WRITESTR ; DISPLAY IT - CALL NEWLINE ; FORMATTING - -#IF (PLATFORM == PLT_UNA) +#IFDEF PLTUNA ; SAVE COMMAND PROCESSOR IMAGE TO MALLOCED CACHE IN UNA BIOS PAGE LD C,$F7 ; UNA MALLOC LD DE,CCP_SIZ ; SIZE OF CCP @@ -1767,7 +1836,7 @@ INIT1: RST 08 ; DO IT PUSH DE ; SAVE PREVIOUS BANK - LD HL,CPM_LOC ; ADDRESS IN HI MEM OF CCP + LD HL,CCP_LOC ; ADDRESS IN HI MEM OF CCP LD DE,(CCPBUF) ; ADDRESS OF CCP BUF IN BIOS MEM LD BC,CCP_SIZ ; SIZE OF CCP LDIR ; DO IT @@ -1778,11 +1847,13 @@ INIT1: #ELSE ; SAVE COMMAND PROCESSOR TO DEDICATED CACHE IN RAM BANK 1 LD B,BF_SYSXCPY ; HBIOS FUNC: SYSTEM EXTENDED COPY - LD E,BID_USR ; E = SRC BANK = USR BANK = TPA - LD D,BID_BIOS ; D = DEST BANK = HB BANK + LD A,(BNKUSER) ; GET USER BANK + LD E,A ; E = SOURCE (USER BANK) + LD A,(BNKBIOS) ; GET BIOS BANK + LD D,A ; D = DEST (BIOS BANK) RST 08 ; DO IT LD B,BF_SYSCPY ; HBIOS FUNC: SYSTEM COPY - LD HL,CPM_LOC ; COPY FROM CCP LOCATION IN USR BANK + LD HL,CCP_LOC ; COPY FROM CCP LOCATION IN USR BANK LD DE,(CCPBUF) ; TO FIXED LOCATION IN HB BANK LD IX,CCP_SIZ ; COPY CONTENTS OF COMMAND PROCESSOR RST 08 ; DO IT @@ -1790,16 +1861,16 @@ INIT1: ; DISK SYSTEM INITIALIZATION CALL BLKRES ; RESET DISK (DE)BLOCKING ALGORITHM + CALL DEV_INIT ; INITIALIZE CHARACTER DEVICE MAP CALL MD_INIT ; INITIALIZE MEMORY DISK DRIVER (RAM/ROM) CALL DRV_INIT ; INITIALIZE DRIVE MAP CALL DPH_INIT ; INITIALIZE DPH TABLE AND BUFFERS - CALL NEWLINE ; FORMATTING ; ; DISPLAY FREE MEMORY - LD DE,STR_LDR ; FORMATTING + LD DE,STR_LDR2 ; FORMATTING CALL WRITESTR ; AND PRINT IT LD HL,CBIOS_END ; SUBTRACT HIGH WATER - LD DE,(BUFTOP) ; ... FROM TOP OF CBIOS + LD DE,(HEAPTOP) ; ... FROM TOP OF CBIOS OR A ; ... WITH CF CLEAR SBC HL,DE ; ... SO HL GETS BYTES FREE CALL PRTDEC ; PRINT IT @@ -1815,23 +1886,159 @@ INIT1: LD BC,CMDLEN ; LENGTH OF AUTOSTART COMMAND LDIR ; INSTALL IT ; - RET + ; OS BANNER + CALL NEWLINE2 ; FORMATTING + LD DE,STR_CPM ; DEFAULT TO CP/M LABEL + LD A,(BDOS_LOC) ; GET FIRST BYTE OF BDOS + CP 'Z' ; IS IT A 'Z' (FOR ZSDOS)? + JR NZ,INIT2 ; NOPE, CP/M IS RIGHT + LD DE,STR_ZSDOS ; SWITCH TO ZSDOS LABEL +INIT2: + CALL WRITESTR ; DISPLAY OS LABEL + LD DE,STR_TPA1 ; TPA PREFIX + CALL WRITESTR + LD A,BDOS_LOC / 1024 ; TPA SIZE IS START OF BDOS + CALL PRTDECB ; PRINT IT + CALL PC_PERIOD ; DECIMAL POINT + LD A,0 + (((BDOS_LOC % 1024) * 100) / 1024) + CALL PRTDECB ; MANTISSA + LD DE,STR_TPA2 ; AND TPA SUFFIX + CALL WRITESTR + CALL NEWLINE ; FORMATTING ; -CMD .DB CMDLEN - 1 -#IFDEF AUTOCMD - .TEXT AUTOCMD + ; SETUP HL & DE TO CLEAR BUFFER AFTER RETURN (VIA CALL TO FILL) + ; HL: START OF BUFFER AREA TO CLEAR (DIRBUF) + ; BC: LENGTH OF BUFFER AREA TO CLEAR CBIOS_END - (DIRBUF) + ; CLEAR BUFFER SPACE STARTING AT DIRBUF TO TOP OF CBIOS + LD HL,CBIOS_END ; CALC SIZE TO CLEAR BY + LD DE,(DIRBUF) ; ... SUBTRACTING DIRBUF START + SBC HL,DE ; ... FROM TOP OF CBIOS + PUSH HL ; MOVE SIZE + POP BC ; ... TO BC + LD HL,(DIRBUF) ; START OF AREA TO CLEAR -> HL + XOR A ; FILL WITH ZEROES +; + RET ; DONE +; +; +;__________________________________________________________________________________________________ +DEV_INIT: +; +#IFDEF PLTWBW +; + ; PATCH IN CRT: DEVICE + LD A,(HCB + HCB_CRTDEV) ; GET CONSOLE DEVICE + CP CIODEV_NUL ; NUL MEANS NO CRT DEVICE + JR Z,DEV_INIT1 ; IF SO, LEAVE IT ALONE + LD (DEVMAP + 1),A ; CONSOLE CRT + LD (DEVMAP + 13),A ; LIST CRT +; +#IFDEF PLTWBW + ; UPDATE IOBYTE IF CRT DEVICE IS ACTIVE + LD A,(HCB + HCB_CRTDEV) ; GET CRT DEVICE + LD B,A ; SAVE IN B + LD A,(HCB + HCB_CONDEV) ; GET CONSOLE DEVICE + CP B ; COMPARE + JR NZ,DEV_INIT1 ; IF DIFFERENT (CRT NOT ACTIVE), LEAVE IOBYTE ALONE + LD A,1 ; IF SAME (CRT ACTIVE), SET IOBYTE FOR CON: = CRT: + LD (IOBYTE),A ; STORE IN IOBYTE #ENDIF - .DB 0 -CMDLEN .EQU $ - CMD ; -STR_BANNER .DB OSLBL, " CBIOS v", BIOSVER, "$" -STR_MEMFREE .DB " Disk Buffer Bytes Free\r\n$" +DEV_INIT1: + ; PATCH IN COM0: DEVICE ENTRIES + LD A,(HCB + HCB_CDL + 1) ; COM0: + CP $FF ; $FF MEANS NO ENTRY + JR Z,DEV_INIT2 ; IF SO, LEAVE IT ALONE + LD (DEVMAP + 0),A ; CONSOLE TTY + LD (DEVMAP + 4),A ; READER TTY + LD (DEVMAP + 8),A ; PUNCH TTY + LD (DEVMAP + 12),A ; LIST TTY +; +DEV_INIT2: + ; PATCH IN COM1: DEVICE ENTRIES + LD A,(HCB + HCB_CDL + 2) ; COM1: + CP $FF ; $FF MEANS NO ENTRY + JR Z,DEV_INIT3 ; IF SO, LEAVE IT ALONE + LD (DEVMAP + 3),A ; CONSOLE UC1 + LD (DEVMAP + 5),A ; READER PTR + LD (DEVMAP + 9),A ; PUNCH PTP +; +DEV_INIT3: + ; PATCH IN COM2: DEVICE ENTRIES + LD A,(HCB + HCB_CDL + 3) ; COM2: + CP $FF ; $FF MEANS NO ENTRY + JR Z,DEV_INIT4 ; IF SO, LEAVE IT ALONE + LD (DEVMAP + 6),A ; READER UR1 + LD (DEVMAP + 10),A ; PUNCH PT1 +; +DEV_INIT4: + ; PATCH IN COM3: DEVICE ENTRIES + LD A,(HCB + HCB_CDL + 4) ; COM3: + CP $FF ; $FF MEANS NO ENTRY + JR Z,DEV_INIT5 ; IF SO, LEAVE IT ALONE + LD (DEVMAP + 7),A ; READER UR2 + LD (DEVMAP + 11),A ; PUNCH PT2 +; +DEV_INIT5: +; + RET +; +#ENDIF ; ; ;__________________________________________________________________________________________________ MD_INIT: ; -#IF (PLATFORM == PLT_UNA) +; UDPATE THE RAM/ROM DPB STRUCTURES BASED ON HARDWARE +; +#IFDEF PLTWBW + LD A,(HCB + HCB_ROMBANKS) ; ROM BANK COUNT + LD IX,DPB_ROM ; ADDRESS OF DPB + CALL MD_INIT1 ; FIX IT UP +; + LD A,(HCB + HCB_RAMBANKS) ; RAM BANK COUNT + LD IX,DPB_RAM ; ADDRESS OF DPB + CALL MD_INIT1 ; FIX IT UP +; + JR MD_INIT4 ; DONE +; +MD_INIT1: +; + ; PUT USABLE BANK COUNT IN HL + SUB 4 ; REDUCE BANK COUNT BY RESERVED PAGES + LD L,A ; PUT IN LSB OF HL + LD H,0 ; MSB IS ALWAYS ZERO +; + ; UPDATE ALS FIELD + LD A,L ; LSB OF PAGE COUNT + RLCA ; DOUBLE IT + LD (IX - 3),A ; SAVE IT AS LSB OF ALS +; + ; UDPATE EXM FIELD + LD A,L ; LSB OF PAGE COUNT + CP 16 + 1 ; COMPARE TO EXM THRESHOLD + LD A,1 ; ASSUME <= 16 BANKS, EXM := 1 + JR C,MD_INIT2 + XOR A ; > 16 BANKS, EXM := 0 +MD_INIT2: + LD (IX + 4),A ; SAVE EXM VALUE +; + ; UPDATE DSM FIELD + LD B,4 ; ROTATE 4 TIMES TO MULTIPLY BY 16 +MD_INIT3: + SLA L ; SHIFT LSB + RL H ; SHIFT MSB W/ CARRY + DJNZ MD_INIT3 ; REPEAT AS NEEDED + DEC HL ; SUBTRACT 1 FOR PROPER DSM VALUE + LD (IX+5),L ; SAVE UPDATED + LD (IX+6),H ; ... DSM VALUE + RET +; +MD_INIT4: +; +#ENDIF +; +#IFDEF PLTUNA ; ; INITIALIZE RAM DISK BY FILLING DIRECTORY WITH 'E5' BYTES ; FILL FIRST 8K OF RAM DISK TRACK 1 WITH 'E5' @@ -1866,6 +2073,7 @@ CLRRAM2: LD DE,BID_USR ; SWITCH BACK TO EXEC BANK FOR WRITESTR CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) + CALL NEWLINE2 ; FORMATTING LD DE,STR_INITRAMDISK ; RAM DISK INIT MESSAGE CALL WRITESTR ; DISPLAY IT @@ -1891,7 +2099,8 @@ CLRRAM3: ; #IF (CLRRAMDISK != CLR_NEVER) LD B,BF_SYSSETBNK ; HBIOS FUNC: SET BANK - LD C,BID_RAMD0 ; FIRST BANK OF RAM DISK + LD A,(BNKRAMD) ; FIRST BANK OF RAM DISK + LD C,A ; ... TO C CALL $FFF0 ; DO IT (RST 08 NOT SAFE) #IF (CLRRAMDISK == CLR_AUTO) @@ -1916,12 +2125,14 @@ CLRRAM1: CLRRAM2: #ENDIF LD B,BF_SYSSETBNK ; HBIOS FUNC: SET BANK - LD C,BID_USR ; SWITCH BACK TO USR BANK + LD A,(BNKUSER) ; SWITCH BACK TO USER BANK + LD C,A ; ... TO REG C CALL $FFF0 ; DO IT (RST 08 NOT SAFE) LD DE,STR_INITRAMDISK ; RAM DISK INIT MESSAGE CALL WRITESTR ; DISPLAY IT LD B,BF_SYSSETBNK ; HBIOS FUNC: SET BANK - LD C,BID_RAMD0 ; SWITCH BACK TO FIRST BANK + LD A,(BNKRAMD) ; SWITCH BACK TO FIRST BANK + LD C,A ; ... TO REG C CALL $FFF0 ; DO IT (RST 08 NOT SAFE) LD HL,0 ; SOURCE ADR FOR FILL LD BC,$2000 ; LENGTH OF FILL IS 8K @@ -1929,7 +2140,8 @@ CLRRAM2: CALL FILL ; DO IT CLRRAM3: LD B,BF_SYSSETBNK ; HBIOS FUNC: SET BANK - LD C,BID_USR ; USR BANK (TPA) + LD A,(BNKUSER) ; USR BANK (TPA) + LD C,A ; ... TO REG C CALL $FFF0 ; DO IT (RST 08 NOT SAFE) #ENDIF ; @@ -1939,7 +2151,7 @@ CLRRAM3: ; ; ;__________________________________________________________________________________________________ -#IF (PLATFORM == PLT_UNA) +#IFDEF PLTUNA ; DRV_INIT: ; @@ -1952,67 +2164,105 @@ DRV_INIT: LD D,L ; SAVE L AS DEVICE/UNIT LD E,0 ; LU IS ZERO LD (BOOTVOL),DE ; D -> DEVICE/UNIT, E -> LU -; -; PERFORM UNA BIOS SPECIFIC INITIALIZATION -; UPDATE DRVMAP BASED ON AVAILABLE UNA UNITS ; ; SETUP THE DRVMAP STRUCTURE - LD HL,(BUFTOP) ; GET CURRENT BUFFER TOP + LD HL,(HEAPTOP) ; GET CURRENT HEAP TOP INC HL ; SKIP 1 BYTE FOR ENTRY COUNT PREFIX LD (DRVMAPADR),HL ; SAVE AS DRIVE MAP ADDRESS - LD (BUFTOP),HL ; ... AND AS NEW BUFTOP + LD (HEAPTOP),HL ; ... AND AS NEW HEAP TOP ; + + + +; + ; LOOP THRU DEVICES TO COUNT TOTAL HARD DISK VOLUMES LD B,0 ; START WITH UNIT 0 + LD L,0 ; INIT HD VOL COUNT ; -DRV_INIT1: ; LOOP THRU ALL UNITS AVAILABLE +DRV_INIT2: ; LOOP THRU ALL UNITS AVAILABLE + PUSH HL ; SAVE HD VOL COUNT LD C,$48 ; UNA FUNC: GET DISK TYPE LD L,0 ; PRESET UNIT COUNT TO ZERO CALL $FFFD ; CALL UNA, B IS ASSUMED TO BE UNTOUCHED!!! LD A,L ; UNIT COUNT TO A + POP HL ; RESTORE HD VOL COUNT OR A ; PAST END? - JR Z,DRV_INIT2 ; WE ARE DONE - PUSH BC ; SAVE UNIT + JR Z,DRV_INIT4 ; WE ARE DONE, MOVE ON CALL DRV_INIT3 ; PROCESS THE UNIT - POP BC ; RESTORE UNIT INC B ; NEXT UNIT - JR DRV_INIT1 ; LOOP + JR DRV_INIT2 ; LOOP ; -DRV_INIT2: ; FINALIZE THE DRIVE MAP +DRV_INIT3: + LD A,D ; DRIVER TYPE TO A + CP $40 ; RAM/ROM? + RET Z ; DO NOT COUNT + ;CP $?? ; FLOPPY? + ;RET Z ; DO NOT COUNT + INC L ; INCREMENT HARD DISK COUNT RET ; DONE ; -DRV_INIT3: ; PROCESS CURRENT UNIT (SEE UNA PROTOIDS.INC) - LD A,D ; MOVE DISK TYPE TO A -; CALL PC_LBKT ; *DEBUG* -; CALL PRTHEXBYTE ; *DEBUG* -; CALL PC_RBKT ; *DEBUG* +DRV_INIT4: ; SET SLICES PER VOLUME (HDSPV) BASED ON HARD DISK VOLUME COUNT + LD A,L ; HARD DISK VOLUME COUNT TO A + LD E,8 ; ASSUME 8 SLICES PER VOLUME + DEC A ; DEC ACCUM TO CHECK FOR COUNT = 1 + JR Z,DRV_INIT5 ; YES, SKIP AHEAD TO IMPLEMENT 8 HDSPV + LD E,4 ; NOW ASSUME 4 SLICES PER VOLUME + DEC A ; DEC ACCUM TO CHECK FOR COUNT = 2 + JR Z,DRV_INIT5 ; YES, SKIP AHEAD TO IMPLEMENT 4 HDSPV + LD E,2 ; IN ALL OTHER CASES, WE USE 2 HDSPV +; +DRV_INIT5: + LD A,E ; SLICES PER VOLUME VALUE TO ACCUM + LD (HDSPV),A ; SAVE IT +; + ; SETUP TO ENUMERATE DEVICES TO BUILD DRVMAP + LD B,0 ; START WITH UNIT 0 ; - CALL DRV_INIT4 ; MAKE A DRIVE MAP ENTRY - LD A,D ; LOAD DRIVE TYPE +DRV_INIT6: ; LOOP THRU ALL UNITS AVAILABLE + LD C,$48 ; UNA FUNC: GET DISK TYPE + LD L,0 ; PRESET UNIT COUNT TO ZERO + CALL $FFFD ; CALL UNA, B IS ASSUMED TO BE UNTOUCHED!!! + LD A,L ; UNIT COUNT TO A + OR A ; PAST END? + RET Z ; WE ARE DONE + PUSH BC ; SAVE UNIT + CALL DRV_INIT7 ; PROCESS THE UNIT + POP BC ; RESTORE UNIT + INC B ; NEXT UNIT + JR DRV_INIT6 ; LOOP +; +DRV_INIT7: ; PROCESS CURRENT UNIT (SEE UNA PROTOIDS.INC) + LD A,D ; DRIVE TYPE TO ACCUM + LD D,B ; UNIT TO D + LD E,0 ; INIT SLICE INDEX + LD B,1 ; DEFAULT LOOP COUNTER (1 SLICE) CP $40 ; RAM/ROM? - RET Z ; DONE IF SO -; CP $?? ; FLOPPY DRIVE? -; RET Z ; DONE IF SO - CALL DRV_INIT4 ; ANOTHER ENTRY FOR HARD DISK - LD A,1 ; BUT WITH SLICE VALUE OF 1 - INC HL ; BUMP TO SLICE POSITION - LD (HL),A ; SAVE IT - RET ; DONE + JR Z,DRV_INIT8 ; SINGLE SLICE, DO IT + ;CP $?? ; FLOPPY? + ;JR Z,DRV_INIT8 ; SINGLE SLICE, DO IT + LD A,(HDSPV) ; GET SLICES PER VOLUME TO ACCUM + LD B,A ; MOVE TO B FOR LOOP COUNTER ; -DRV_INIT4: - ; ALLOCATE SPACE IN DRVMAP - PUSH BC ; SAVE INCOMING UNIT NUM - LD BC,4 ; 4 BYTES PER ENTRY - CALL ALLOC ; ALLOCATE - CALL NZ,PANIC ; SHOULD NEVER ERROR HERE - PUSH BC ; MOVE MEM PTR - POP HL ; ... TO HL - POP BC ; RECOVER UNIT NUM - LD (HL),B ; SAVE IT IN FIRST BYTE OF DRV MAP ENTRY - PUSH HL ; SAVE HL +DRV_INIT8: ; SLICE CREATION LOOP +; + ; INC DRVMAP ENTRY COUNT AND CHECK FOR 16 ENTRY MAXIMUM LD HL,(DRVMAPADR) ; POINT TO DRIVE MAP - DEC HL ; BACK TO ENTRY COUNT + DEC HL ; BACKUP TO POINT TO ENTRY COUNT + LD A,(HL) ; CURRENT COUNT TO ACCUM + CP 16 ; AT MAX? + RET NC ; IF >= MAX, JUST BAIL OUT INC (HL) ; INCREMENT THE ENTRY COUNT - POP HL ; RECOVER HL +; + ; ALLOCATE ENTRY AND FILL IN DEVICE/UNIT, SLICE + LD HL,4 ; 4 BYTES PER ENTRY + CALL ALLOC ; ALLOCATE SPACE + CALL NZ,PANIC ; SHOULD NEVER ERROR HERE + LD (HL),D ; SAVE DEVICE/UNIT IN FIRST BYTE OF DRVMAP ENTRY + INC HL ; POINT TO NEXT BYTE OF DRVMAP ENTRY + LD (HL),E ; SAVE SLICE NUM IN SECOND BYTE OF DRVMAP ENTRY +; + INC E ; INCREMENT SLICE INDEX + DJNZ DRV_INIT8 ; LOOP AS NEEDED RET ; DONE ; #ELSE @@ -2023,63 +2273,106 @@ DRV_INIT: ; BUILD DRVMAP BASED ON AVAILABLE HBIOS DISK DEVICE LIST ; ; GET BOOT DEVICE/UNIT/LU INFO - LD B,BF_SYSATTR ; HBIOS FUNC: GET/SET ATTR - LD C,AID_BOOTVOL ; ATTRIB ID FOR BOOT DEVICE - RST 08 ; GET THE VALUE + LD DE,(HCB + HCB_BOOTVOL) ; BOOT VOLUME (DEV/UNIT, SLICE) LD (BOOTVOL),DE ; D -> DEVICE/UNIT, E -> LU ; ; SETUP THE DRVMAP STRUCTURE - LD HL,(BUFTOP) ; GET CURRENT BUFFER TOP + LD HL,(HEAPTOP) ; GET CURRENT HEAP TOP INC HL ; SKIP 1 BYTE FOR ENTRY COUNT PREFIX LD (DRVMAPADR),HL ; SAVE AS DRVMAP ADDRESS - LD (BUFTOP),HL ; AND AS NEW BUFTOP + LD (HEAPTOP),HL ; AND AS NEW HEAP TOP ; ; SETUP TO LOOP THROUGH AVAILABLE DEVICES - LD B,BF_DIODEVCNT ; HBIOS FUNC: DEVICE COUNT + LD B,BF_DIOGETCNT ; HBIOS FUNC: DEVICE COUNT RST 08 ; CALL HBIOS, DEVICE COUNT TO B LD A,B ; COUNT TO A OR A ; SET FLAGS RET Z ; HANDLE ZERO DEVICES (ALBEIT POORLY) +; + ; LOOP THRU DEVICES TO COUNT TOTAL HARD DISK VOLUMES + PUSH BC ; SAVE THE DEVICE COUNT + LD C,0 ; USE C AS DEVICE LIST INDEX + LD E,0 ; INIT E FOR HARD DISK VOLUME COUNT +; +DRV_INIT2: + PUSH BC ; SAVE LOOP CONTROL + CALL DRV_INIT3 ; CHECK DRIVE + POP BC ; RESTORE LOOP CONTROL + INC C ; NEXT DEVICE/UNIT + DJNZ DRV_INIT2 ; LOOP + POP BC ; RESTORE DEVICE/UNIT COUNT IN B + JR DRV_INIT4 ; CONTINUE +; +DRV_INIT3: + PUSH DE ; SAVE DE (HARD DISK VOLUME COUNTER) + LD B,BF_DIOGETINF ; HBIOS FUNC: DEVICE INFO + RST 08 ; CALL HBIOS, DEVICE/UNIT TO C + POP DE ; RESTORE DE + LD A,C ; DEVICE/UNIT TO A + CP DIODEV_IDE ; HARD DISK DEVICE? + RET C ; NOPE, RETURN + INC E ; INCREMENT HARD DISK COUNT + RET ; AND RETURN +; +DRV_INIT4: ; SET SLICES PER VOLUME (HDSPV) BASED ON HARD DISK VOLUME COUNT + LD A,E ; HARD DISK VOLUME COUNT TO A + LD E,8 ; ASSUME 8 SLICES PER VOLUME + DEC A ; DEC ACCUM TO CHECK FOR COUNT = 1 + JR Z,DRV_INIT5 ; YES, SKIP AHEAD TO IMPLEMENT 8 HDSPV + LD E,4 ; NOW ASSUME 4 SLICES PER VOLUME + DEC A ; DEC ACCUM TO CHECK FOR COUNT = 2 + JR Z,DRV_INIT5 ; YES, SKIP AHEAD TO IMPLEMENT 4 HDSPV + LD E,2 ; IN ALL OTHER CASES, WE USE 2 HDSPV +; +DRV_INIT5: + LD A,E ; SLICES PER VOLUME VALUE TO ACCUM + LD (HDSPV),A ; SAVE IT +; + ; SETUP TO ENUMERATE DEVICES TO BUILD DRVMAP + LD B,BF_DIOGETCNT ; HBIOS FUNC: DEVICE COUNT + RST 08 ; CALL HBIOS, DEVICE COUNT TO B LD C,0 ; USE C AS DEVICE LIST INDEX ; -DRV_INIT1: ; DEVICE ENUMERATION LOOP +DRV_INIT6: ; LOOP THRU ALL UNITS AVAILABLE PUSH BC ; PRESERVE LOOP CONTROL - LD B,BF_DIODEVINF ; HBIOS FUNC: DEVICE INFO + LD B,BF_DIOGETINF ; HBIOS FUNC: DEVICE INFO RST 08 ; CALL HBIOS, DEVICE/UNIT TO C - CALL DRV_INIT3 ; MAKE DRIVE MAP ENTRY(S) + CALL DRV_INIT7 ; MAKE DRIVE MAP ENTRY(S) POP BC ; RESTORE LOOP CONTROL INC C ; INCREMENT LIST INDEX - DJNZ DRV_INIT1 ; LOOP AS NEEDED + DJNZ DRV_INIT6 ; LOOP AS NEEDED RET ; FINISHED ; -DRV_INIT3: ; PROCESS DEVICE/UNIT - LD A,C ; DEVICE/UNIT TO A - PUSH AF ; SAVE DEVICE/UNIT - CALL DRV_INIT4 ; MAKE A DRIVE MAP ENTRY - POP AF ; RESTORE DEVICE/UNIT - CP DIODEV_IDE ; FIRST SLICE CAPABLE DEVICE? - RET C ; DONE IF NOT SLICE WORTHY - CALL DRV_INIT4 ; MAKE ANOTHER ENTRY IF HARD DISK - LD A,1 ; ... BUT WITH SLICE = 1 - INC HL ; BUMP TO SLICE POSITION - LD (HL),A ; SAVE IT - RET ; DONE +DRV_INIT7: ; PROCESS DEVICE/UNIT + LD D,C ; DEVICE/UNIT TO D + LD E,0 ; INITIALIZE SLICE INDEX + LD B,1 ; DEFAULT LOOP COUNTER + LD A,D ; DEVICE/UNIT TO ACCUM + CP DIODEV_IDE ; HARD DISK DEVICE? + JR C,DRV_INIT8 ; NOPE, LEAVE LOOP COUNT AT 1 + LD A,(HDSPV) ; GET SLICES PER VOLUME TO ACCUM + LD B,A ; MOVE TO B FOR LOOP COUNTER ; -DRV_INIT4: ; MAKE A DRIVE MAP ENTRY - ; ALLOCATE SPACE FOR ENTRY - PUSH AF ; SAVE INCOMING DEVICE/UNIT - LD BC,4 ; 4 BYTES PER ENTRY - CALL ALLOC ; ALLOCATE SPACE - CALL NZ,PANIC ; SHOULD NEVER ERROR HERE - PUSH BC ; MOVE MEM PTR - POP HL ; ... TO HL - POP AF ; RECOVER DEVICE/UNIT - LD (HL),A ; SAVE IT IN FIRST BYTE OF DRVMAP - PUSH HL ; SAVE ENTRY PTR +DRV_INIT8: ; SLICE CREATION LOOP +; + ; INC DRVMAP ENTRY COUNT AND ENFORCE FOR 16 ENTRY MAXIMUM LD HL,(DRVMAPADR) ; POINT TO DRIVE MAP - DEC HL ; BACKUP TO ENTRY COUNT + DEC HL ; BACKUP TO POINT TO ENTRY COUNT + LD A,(HL) ; CURRENT COUNT TO ACCUM + CP 16 ; AT MAX? + RET NC ; IF >= MAX, JUST BAIL OUT INC (HL) ; INCREMENT THE ENTRY COUNT - POP HL ; RECOVER ENTRY POINTER +; + ; ALLOCATE ENTRY AND FILL IN DEVICE/UNIT, SLICE + LD HL,4 ; 4 BYTES PER ENTRY + CALL ALLOC ; ALLOCATE SPACE + CALL NZ,PANIC ; SHOULD NEVER ERROR HERE + LD (HL),D ; SAVE DEVICE/UNIT IN FIRST BYTE OF DRVMAP ENTRY + INC HL ; POINT TO NEXT BYTE OF DRVMAP ENTRY + LD (HL),E ; SAVE SLICE NUM IN SECOND BYTE OF DRVMAP ENTRY +; + INC E ; INCREMENT SLICE INDEX + DJNZ DRV_INIT8 ; LOOP AS NEEDED RET ; DONE ; #ENDIF @@ -2091,6 +2384,7 @@ DPH_INIT: ; ; ITERATE THROUGH DRIVE MAP TO BUILD DPH ENTRIES DYNAMICALLY ; + CALL NEWLINE2 ; FORMATTING LD DE,STR_DPHINIT ; POINT TO MSG CALL WRITESTR ; DISPLAY IT CALL NEWLINE ; FORMATTING @@ -2105,22 +2399,16 @@ DPH_INIT: ADD HL,HL ; ... BY SIZE ADD HL,HL ; ... OF DPH (16) ADD HL,HL ; ... FOR TOTAL SIZE - PUSH HL ; MOVE POOL SIZE - POP BC ; ... INTO BC FOR MEM ALLOC CALL ALLOC ; ALLOCATE THE SPACE CALL NZ,PANIC ; SHOULD NEVER ERROR ; ; SET DPHTOP TO START OF ALLOCATED SPACE - PUSH BC ; MOVE MEM POINTER - POP HL ; ... TO HL LD (DPHTOP),HL ; ... AND SAVE IN DPHTOP ; ; ALLOCATE DIRECTORY BUFFER - LD BC,128 ; SIZE OF DIRECTORY BUFFER + LD HL,128 ; SIZE OF DIRECTORY BUFFER CALL ALLOC ; ALLOCATE THE SPACE CALL NZ,PANIC ; SHOULD NEVER ERROR - PUSH BC ; MOVE MEM POINTER - POP HL ; ... TO HL LD (DIRBUF),HL ; ... AND SAVE IN DIRBUF ; ; SETUP FOR DPH BUILD LOOP @@ -2196,7 +2484,7 @@ MAKDPH: ; PUSH DE ; SAVE INCOMING DPH ADDRESS ; -#IF (PLATFORM == PLT_UNA) +#IFDEF PLTUNA ; LD B,A ; UNIT NUM TO B LD C,$48 ; UNA FUNC: GET DISK TYPE @@ -2213,7 +2501,7 @@ MAKDPH: ; MAKDPH0: ; HANDLE RAM/ROM LD C,$45 ; UNA FUNC: GET DISK INFO - LD DE,$9000 ; 512 BYTE BUFFER *** FIX!!! *** + LD DE,INIBUF ; 512 BYTE BUFFER CALL $FFFD ; CALL UNA BIT 7,B ; TEST RAM DRIVE BIT LD DE,DPB_ROM ; ASSUME ROM @@ -2244,7 +2532,7 @@ MAKDPH0: ; HANDLE RAM/ROM ; MAKDPH1: ; - ; BUILD THE DPH + ; BUILD THE DPH (DE POINTS TO DPB) POP HL ; HL := START OF DPH LD A,8 ; SIZE OF DPH RESERVED AREA CALL ADDHLA ; LEAVE IT ALONE (ZERO FILLED) @@ -2266,19 +2554,22 @@ MAKDPH1: DEC DE ; ... PREFIX DATA (CKS & ALS BUF SIZES) CALL MAKDPH2 ; HANDLE CKS BUF, THEN FALL THRU FOR ALS BUF RET NZ ; BAIL OUT ON ERROR + ; FALL THRU FOR ALS BUF MAKDPH2: - EX DE,HL ; POINT HL TO CKS/ALS SIZE ADR - LD C,(HL) ; BC := CKS/ALS SIZE + PUSH HL ; SAVE DPH PTR + EX DE,HL ; USE HL AS DPB PTR, DE IS NOW SCRATCH + LD E,(HL) ; DE := CKS/ALS SIZE INC HL ; ... AND BUMP - LD B,(HL) ; ... PAST + LD D,(HL) ; ... PAST INC HL ; ... CKS/ALS SIZE - EX DE,HL ; BC AND HL ROLES RESTORED - LD A,B ; CHECK TO SEE - OR C ; ... IF BC IS ZERO - JR Z,MAKDPH3 ; IF ZERO, BYPASS ALLOC, USE ZERO FOR ADDRESS - CALL ALLOC ; ALLOC BC BYTES, ADDRESS RETURNED IN BC - JR NZ,ERR_BUFOVF ; HANDLE OVERFLOW ERROR -MAKDPH3: + EX DE,HL ; DPB PTR BACK TO DE, ALLOC SIZE TO HL + LD A,H ; CHECK TO SEE + OR L ; ... IF HL (ALLOC SIZE) IS ZERO + CALL NZ,ALLOC ; ALLOC BC BYTES, ADDRESS RETURNED IN BC + PUSH HL ; MOVE ALLOC RESULT PTR + POP BC ; ... TO BC + POP HL ; RECOVER DPH PTR TO HL + JR NZ,ERR_HEAPOVF ; HANDLE POSSIBLE ALLOC OVERFLOW HERE LD (HL),C ; SAVE CKS/ALS BUF INC HL ; ... ADDRESS IN LD (HL),B ; ... DPH AND BUMP @@ -2288,37 +2579,32 @@ MAKDPH3: ; ALLOC: ; -; ALLOCATE BC BYTES FROM BUF POOL, RETURN STARTING -; ADDRESS IN BC. LEAVE ALL OTHER REGS ALONE EXCEPT A +; ALLOCATE HL BYTES FROM HEAP, RETURN STARTING +; ADDRESS IN HL. LEAVE ALL OTHER REGS ALONE EXCEPT A ; Z FOR SUCCESS, NZ FOR FAILURE ; - PUSH DE ; SAVE ORIGINAL DE - PUSH HL ; SAVE ORIGINAL HL - LD HL,(BUFTOP) ; HL := CURRENT BUFFER TOP - PUSH HL ; SAVE AS START OF NEW BUFFER - PUSH BC ; GET BYTE COUNT - POP DE ; ... INTO DE - ADD HL,DE ; ADD IT TO BUFFER TOP + PUSH BC ; SAVE ORIGINAL HL + LD BC,(HEAPTOP) ; BC := CURRENT HEAP TOP + PUSH BC ; SAVE AS START OF REQUESTED BUFFER + ADD HL,BC ; HL := NEW HEAP TOP LD A,$FF ; ASSUME OVERFLOW FAILURE - JR C,ALLOC1 ; IF OVERFLOW, BYPASS WITH A == $FF - PUSH HL ; SAVE IT - LD DE,$10000 - CBIOS_END ; SETUP DE FOR OVERFLOW TEST - ADD HL,DE ; CHECK FOR OVERFLOW - POP HL ; RECOVER HL - LD A,$FF ; ASSUME FAILURE - JR C,ALLOC1 ; IF OVERFLOW, CONTINUE WITH A == $FF - LD (BUFTOP),HL ; SAVE NEW TOP + JR C,ALLOC1 ; IF MEMTOP OVERFLOW, EXIT WITH A == $FF + PUSH HL ; OTHERWISE, SAVE NEW HEAP TOP VALUE + LD BC,MEMTOP - HEAPEND ; SETUP BC FOR HEAP OVERFLOW TEST + ADD HL,BC ; CHECK FOR HEAP OVERFLOW + POP HL ; RECOVER HL (NEW HEAP TOP VALUE) + JR C,ALLOC1 ; IF HEAP OVERFLOW, EXIT WITH A == $FF + LD (HEAPTOP),HL ; SAVE NEW HEAP TOP INC A ; SIGNAL SUCCESS ; ALLOC1: - POP BC ; BUF START ADDRESS TO BC - POP HL ; RESTORE ORIGINAL HL - POP DE ; RESTORE ORIGINAL DE - OR A ; SIGNAL SUCCESS + POP HL ; ALLOCATED BUF START ADDRESS TO HL + POP BC ; RESTORE BC + OR A ; SET ZF TO SIGNAL RESULT RET ; -ERR_BUFOVF: - LD DE,STR_BUFOVF +ERR_HEAPOVF: + LD DE,STR_HEAPOVF JR ERR ; ERR_INVMED: @@ -2336,7 +2622,7 @@ PRTDUS: ; ON INPUT D HAS DEVICE/UNIT, E HAS SLICE ; DESTROY NO REGISTERS OTHER THAN A ; -#IF (PLATFORM == PLT_UNA) +#IFDEF PLTUNA ; PUSH BC ; PRESERVE BC PUSH DE ; PRESERVE DE @@ -2368,7 +2654,7 @@ PRTDUS: PRTDUS1: LD C,$45 ; UNA FUNC: GET DISK INFO - LD DE,$9000 ; 512 BYTE BUFFER *** FIX!!! *** + LD DE,INIBUF ; 512 BYTE BUFFER CALL $FFFD ; CALL UNA BIT 7,B ; TEST RAM DRIVE BIT LD DE,DEVROM ; ASSUME ROM @@ -2450,33 +2736,53 @@ DEV15 .EQU DEVUNK ; #ENDIF ; -DPHTOP .DW 0 ; CURRENT TOP OF DPH POOL -DIRBUF .DW 0 ; DIR BUF POINTER -BUFTOP .DW BUFPOOL ; CURRENT TOP OF BUF POOL -BOOTVOL .DW ; BOOT VOLUME, MSB=BOOT DEVICE/UNIT, LSB=BOOT LU +DPHTOP .DW 0 ; CURRENT TOP OF DPH POOL +DIRBUF .DW 0 ; DIR BUF POINTER +HEAPTOP .DW BUFPOOL ; CURRENT TOP OF HEAP +BOOTVOL .DW 0 ; BOOT VOLUME, MSB=BOOT DEVICE/UNIT, LSB=BOOT LU +BNKRAMD .DB 0 ; STARTING BANK ID FOR RAM DRIVE +HDSPV .DB 2 ; SLICES PER VOLUME FOR HARD DISKS (MUST BE >= 1) ; -STR_INITRAMDISK .DB "\r\nFormatting RAMDISK...$" +CMD .DB CMDLEN - 1 +#IFDEF AUTOCMD + .TEXT AUTOCMD +#ENDIF + .DB 0 +CMDLEN .EQU $ - CMD +; +STR_BANNER .DB "CBIOS v", BIOSVER, " [", PLTSTR, "]$" +STR_INITRAMDISK .DB "Formatting RAMDISK...$" +STR_LDR2 .DB "\r\n" STR_LDR .DB "\r\n $" -STR_DPHINIT .DB "\r\n\r\nConfiguring Drives...$" -STR_BUFOVF .DB " *** Insufficient Memory ***$" +STR_DPHINIT .DB "Configuring Drives...$" +STR_HEAPOVF .DB " *** Insufficient Memory ***$" STR_INVMED .DB " *** Invalid Device ID ***$" +STR_MEMFREE .DB " Disk Buffer Bytes Free$" +STR_CPM .DB "CP/M-80 v2.2$" +STR_ZSDOS .DB "ZSDOS v1.1$" +STR_TPA1 .DB ", $" +STR_TPA2 .DB "K TPA$" ; ;================================================================================================== ; ;================================================================================================== ; - .FILL CBIOS_END - $,$00 -; -SLACK .EQU (CBIOS_END - BUFPOOL) - .ECHO "CBIOS buffer space: " +SLACK .EQU (CBIOS_END - $) + .ECHO "INIT code slack space: " .ECHO SLACK .ECHO " bytes.\n" + .FILL SLACK,$00 +; +HEAPS .EQU (CBIOS_END - BUFPOOL) + .ECHO "HEAP space: " + .ECHO HEAPS + .ECHO " bytes.\n" ; .ECHO "CBIOS total space used: " .ECHO $ - CBIOS_LOC .ECHO " bytes.\n" ; ; PAD OUT AREA RESERVED FOR HBIOS PROXY - .FILL $10000 - $ + .FILL MEMTOP - $ ; .END diff --git a/Source/CBIOS/cbios.bin b/Source/CBIOS/cbios.bin deleted file mode 100644 index ff2b33dcab99ab9dd204b19f50703af58fadaa67..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 6656 zcmeHJdu$ZP8K1q!+CJmETTHDzK+fJna2$?1N7J_%#2}P;rV+9r^d(Wq17clpEo@zQZsFiU z_rg83`6-mfqv}(LagM4?r5&#)fbeUVE$qFLq0)0v_O9=B!lCI~PLv;I9ZrOzu6Kwi z`4Ms&6&Hj2X5?gVx>)3VTH&e?!y@%Vd?Ue}LikD|U_y#5ga_xn=D=%&H^Mk1p=sQn zWDQO+!52cD_nO4rGdOsbd|2C1%&IjHkG;;*}z{Gn37f9M53J`!1Ia0QIjI?|a}gQ;aZY4lF6zZhP9`F< z^CIEK2xEr7#CMr+7UURkw|9NVU8~kik0kR+}b> zZ;C|J#t|22*|IIGvxRG~kGPBN|B%^x zr9&m>qS!dk-X*u`!JJ|KrgMKv;^ri`K;C9mLiKNib8Gm{_5w2-HnZ*#(+ntuHESocGZ9g?gp{vc@PbB*wnDo zGykiuX^&ijUS{(*l`{_e19|@oy~TyR1|D`sP4MzHJ4J- z<%-?)4f_v>9;m43C>033y4+C-6=9`)MO}fQ=aIb%nQYAGXbEXq{J&v{u_KeohL-Xk z`yocCLgptJz!(~9M^)$)vU?yOI>-#75hNhfGPZ|e;|3aAg$$4Vn9FDout$Cs)Gzd( zei>~0BP_efT=z8@5V1e3INOu1c7@ffLs(ma3o{@2QcJD^BqF~N{pILXuZRRgW)She zM)3M1w{H;+6)4$C$=-FMX|?rrlDT`K+~Z#^;*S?Gx!#mf62sQB-Xj(tKw%w`+&u zI;*j3qbG(ZtZ0l~7sY>G99?DCS=E{S8Iqwl1XY-c{TKk`}yX&bq*(n3xX{>fSTjPuxe{G{-vHuzY8Pz*XxeCqD9; zVYR{rYKNS0ASpgJ;}Dm&S>qfsIAWlgfU=6w*vzoZO=!HCi)&Euo0IVMF&po^|3-0zn9d4-eG&E4XDd=fvY@o7%%00oRy_tIVvjv2TEVW(TM_xRByrc85 z0MWs^roCllWu797AP69fEHz!7?Hz|->81|B?v9@DF=`ilKA%w6c?`B!$4edI&f`LT z_()fGAH`RUJum*a= 2)) -0136 E63F LD_UC1 .SET CIODEV_UART + 1 -0137 E63F LD_PTR .SET CIODEV_UART + 1 -0138 E63F LD_PTP .SET CIODEV_UART + 1 -0139 E63F ;#ENDIF -0140 E63F ; -0141 E63F ;#IF (VDUENABLE | CVDUENABLE | N8VENABLE) -0142 E63F LD_CRT .SET CIODEV_CRT -0143 E63F ;#ENDIF -0144 E63F ;#IF (PRPENABLE & PRPCONENABLE) -0145 E63F ;LD_CRT .SET CIODEV_PRPCON -0146 E63F ;#ENDIF -0147 E63F ;#IF (PPPENABLE & PPPCONENABLE) -0148 E63F ;LD_CRT .SET CIODEV_PPPCON -0149 E63F ;#ENDIF -0150 E63F -0151 E63F #ENDIF -0152 E63F ; -0153 E63F 10 .DB DEVCNT -0154 E640 DEVMAP: -0155 E640 ; -0156 E640 ; CONSOLE -0157 E640 00 .DB LD_TTY ; CON:=TTY: (IOBYTE XXXXXX00) -0158 E641 D0 .DB LD_CRT ; CON:=CRT: (IOBYTE XXXXXX01) -0159 E642 E0 .DB LD_BAT ; CON:=BAT: (IOBYTE XXXXXX10) -0160 E643 01 .DB LD_UC1 ; CON:=UC1: (IOBYTE XXXXXX11) -0161 E644 ; READER -0162 E644 00 .DB LD_TTY ; RDR:=TTY: (IOBYTE XXXX00XX) -0163 E645 01 .DB LD_PTR ; RDR:=PTR: (IOBYTE XXXX01XX) -0164 E646 00 .DB LD_UR1 ; RDR:=UR1: (IOBYTE XXXX10XX) -0165 E647 00 .DB LD_UR2 ; RDR:=UR2: (IOBYTE XXXX11XX) -0166 E648 ; PUNCH -0167 E648 00 .DB LD_TTY ; PUN:=TTY: (IOBYTE XX00XXXX) -0168 E649 01 .DB LD_PTP ; PUN:=PTP: (IOBYTE XX01XXXX) -0169 E64A 00 .DB LD_UP1 ; PUN:=UP1: (IOBYTE XX10XXXX) -0170 E64B 00 .DB LD_UP2 ; PUN:=UP2: (IOBYTE XX11XXXX) -0171 E64C ; LIST -0172 E64C 00 .DB LD_TTY ; LST:=TTY: (IOBYTE 00XXXXXX) -0173 E64D D0 .DB LD_CRT ; LST:=CRT: (IOBYTE 01XXXXXX) -0174 E64E 00 .DB LD_LPT ; LST:=LPT: (IOBYTE 10XXXXXX) -0175 E64F 00 .DB LD_UL1 ; LST:=UL1: (IOBYTE 11XXXXXX) -0176 E650 ; -0177 E650 DEVCNT .EQU ($ - DEVMAP) -0178 E650 .ECHO DEVCNT -0179 E650 .ECHO " Input/Output devices defined.\n" -0180 E650 ; -0181 E650 ;================================================================================================== -0182 E650 ; DRIVE MAPPING TABLE -0183 E650 ;================================================================================================== -0184 E650 ; -0185 E650 ; Disk mapping is done using a drive map table (DRVMAP) which is built -0186 E650 ; dynamically at cold boot. See the DRV_INIT routine. This table is -0187 E650 ; made up of entries as documented below. The table is prefixed with one -0188 E650 ; byte indicating the number of entries. The index of the entry indicates -0189 E650 ; the drive letter, so the first entry is A:, the second entry is B:, etc. -0190 E650 ; -0191 E650 ; BYTE: DEVICE/UNIT (OR JUST UNIT FOR UNA) -0192 E650 ; BYTE: SLICE -0193 E650 ; WORD: ADDRESS OF DPH FOR THE DRIVE -0194 E650 ; -0195 E650 ;================================================================================================== -0196 E650 ; DPB MAPPING TABLE -0197 E650 ;================================================================================================== -0198 E650 ; -0199 E650 ; MAP MEDIA ID'S TO APPROPRIATE DPB ADDRESSEES -0200 E650 ; THE ENTRIES IN THIS TABLE MUST CONCIDE WITH THE VALUES -0201 E650 ; OF THE MEDIA ID'S (SAME SEQUENCE, NO GAPS) -0202 E650 ; -0203 E650 0A .DB DPBCNT -0204 E651 ; -0205 E651 DPBMAP: -0206 E651 00 00 .DW 0 ; MID_NONE (NO MEDIA) -0207 E653 D2 EB .DW DPB_ROM ; MID_MDROM -0208 E655 E6 EB .DW DPB_RAM ; MID_MDRAM -0209 E657 FA EB .DW DPB_RF ; MID_RF -0210 E659 0E EC .DW DPB_HD ; MID_HD -0211 E65B 22 EC .DW DPB_FD720 ; MID_FD720 -0212 E65D 36 EC .DW DPB_FD144 ; MID_FD144 -0213 E65F 4A EC .DW DPB_FD360 ; MID_FD360 -0214 E661 5E EC .DW DPB_FD120 ; MID_FD120 -0215 E663 72 EC .DW DPB_FD111 ; MID_FD111 -0216 E665 ; -0217 E665 DPBCNT .EQU ($ - DPBMAP) / 2 -0218 E665 ; -0219 E665 ;================================================================================================== -0220 E665 ; BIOS FUNCTIONS -0221 E665 ;================================================================================================== -0222 E665 ; -0223 E665 ;__________________________________________________________________________________________________ -0224 E665 -0225 E665 BOOT: -0226 E665 ; STANDARD BOOT INVOCATION -0227 E665 F3 DI -0228 E666 ED 56 IM 1 -0229 E668 31 00 FE LD SP,STACK ; STACK FOR INITIALIZATION -0230 E66B ; -0231 E66B CD C1 ED CALL INIT ; EXECUTE COLD BOOT CODE ROUTINE -0232 E66E ; -0233 E66E 31 00 01 LD SP,$100 ; MOVE STACK SO WE CAN INIT BUFFER AREA -0234 E671 21 C1 ED LD HL,INIT ; INIT BUFFERS AREA -0235 E674 01 3F 10 LD BC,CBIOS_END - INIT ; SIZE OF BUFFER SPACE -0236 E677 CD 1C EB CALL FILL ; DO IT -0237 E67A ; -0238 E67A 31 00 FE LD SP,STACK ; PUT STACK BACK WHERE IT BELONGS -0239 E67D 18 1A JR GOCPM ; THEN OFF TO CP/M WE GO... -0240 E67F ; -0241 E67F ;__________________________________________________________________________________________________ -0242 E67F WBOOT: -0243 E67F F3 DI -0244 E680 ED 56 IM 1 -0245 E682 ; -0246 E682 31 00 FE LD SP,STACK ; STACK FOR INITIALIZATION -0247 E685 ; -0248 E685~ #IF (PLATFORM == PLT_UNA) -0249 E685~ ; RESTORE COMMAND PROCESSOR FROM UNA BIOS CACHE -0250 E685~ LD BC,$01FB ; UNA FUNC = SET BANK -0251 E685~ LD DE,BID_BIOS ; UBIOS_PAGE (SEE PAGES.INC) -0252 E685~ RST 08 ; DO IT -0253 E685~ PUSH DE ; SAVE PREVIOUS BANK -0254 E685~ -0255 E685~ LD HL,(CCPBUF) ; ADDRESS OF CCP BUF IN BIOS MEM -0256 E685~ LD DE,CPM_LOC ; ADDRESS IN HI MEM OF CCP -0257 E685~ LD BC,CCP_SIZ ; SIZE OF CCP -0258 E685~ LDIR ; DO IT -0259 E685~ -0260 E685~ LD BC,$01FB ; UNA FUNC = SET BANK -0261 E685~ POP DE ; RECOVER OPERATING BANK -0262 E685~ RST 08 ; DO IT -0263 E685 #ELSE -0264 E685 ; RESTORE COMMAND PROCESSOR FROM CACHE IN HB BANK -0265 E685 06 F3 LD B,BF_SYSXCPY ; HBIOS FUNC: SYSTEM EXTENDED COPY -0266 E687 16 8E LD D,BID_USR ; D = DEST BANK = USR BANK = TPA -0267 E689 1E 8D LD E,BID_BIOS ; E = SRC BANK = HB BANK -0268 E68B CF RST 08 ; SET BANKS FOR INTERBANK COPY -0269 E68C 06 F2 LD B,BF_SYSCPY ; HBIOS FUNC: SYSTEM COPY -0270 E68E 2A 9B EB LD HL,(CCPBUF) ; COPY FROM FIXED LOCATION IN HB BANK -0271 E691 11 00 D0 LD DE,CPM_LOC ; TO CCP LOCATION IN USR BANK -0272 E694 DD 21 00 08 LD IX,CCP_SIZ ; COPY CONTENTS OF COMMAND PROCESSOR -0273 E698 CF RST 08 ; DO IT -0274 E699 #ENDIF -0275 E699 ; -0276 E699 ; FALL THRU TO INVOKE CP/M -0277 E699 ; -0278 E699 ;__________________________________________________________________________________________________ -0279 E699 GOCPM: -0280 E699~ #IF (PLATFORM == PLT_UNA) -0281 E699~ ; USE A DEDICATED BUFFER FOR UNA PHYSICAL DISK I/O -0282 E699~ LD HL,SECBUF ; ADDRESS OF PHYSICAL SECTOR BUFFER -0283 E699~ LD (BUFADR),HL ; SAVE IT IN BUFADR FOR LATER -0284 E699 #ELSE -0285 E699 ; CALL BF_DIOSETBUF WITH A PARM OF ZERO TO CAUSE IT TO RESET -0286 E699 ; THE PHYSICAL DISK BUFFER TO THE DEFAULT LOCATION PRE-ALLOCATED -0287 E699 ; INSIDE OF THE HBIOS BANK. THE ADDRESS IS RETURNED IN HL AND SAVED. -0288 E699 06 19 LD B,BF_DIOSETBUF ; GET DISK BUFFER ADR IN HBIOS DRIVER BANK -0289 E69B 21 00 00 LD HL,0 -0290 E69E CF RST 08 ; MAKE HBIOS CALL -0291 E69F 22 A2 EB LD (BUFADR),HL ; RECORD THE BUFFER ADDRESS -0292 E6A2 #ENDIF -0293 E6A2 ; -0294 E6A2 3E C3 LD A,$C3 ; LOAD A WITH 'JP' INSTRUCTION (USED BELOW) -0295 E6A4 ; -0296 E6A4 ; CPU RESET / RST 0 / JP 0 -> WARM START CP/M -0297 E6A4 32 00 00 LD ($0000),A ; JP OPCODE GOES HERE -0298 E6A7 21 03 E6 LD HL,WBOOTE ; GET WARM BOOT ENTRY ADDRESS -0299 E6AA 22 01 00 LD ($0001),HL ; AND PUT IT AT $0001 -0300 E6AD -0301 E6AD ; ; INT / RST 38 -> INVOKE MONITOR -0302 E6AD ; LD ($0038),A -0303 E6AD ; LD HL,GOMON -0304 E6AD ; LD ($0039),HL -0305 E6AD -0306 E6AD ; ; INT / RST 38 -> PANIC -0307 E6AD ; LD ($0038),A -0308 E6AD ; LD HL,PANIC ; PANIC ROUTINE ADDRESS -0309 E6AD ; LD ($0039),HL ; POKE IT -0310 E6AD -0311 E6AD ; CALL 5 -> INVOKE BDOS -0312 E6AD 32 05 00 LD ($0005),A ; JP OPCODE AT $0005 -0313 E6B0 21 06 D8 LD HL,BDOS_LOC + 6 ; GET BDOS ENTRY ADDRESS -0314 E6B3 22 06 00 LD ($0006),HL ; PUT IT AT $0006 -0315 E6B6 ; -0316 E6B6 ; INSTALL ROMWBW CBIOS PAGE ZERO STAMP AT $40 -0317 E6B6 21 33 E6 LD HL,STPIMG ; FORM STAMP DATA IMAGE -0318 E6B9 11 40 00 LD DE,STPLOC ; TO IT'S LOCATION IN PAGE ZERO -0319 E6BC 01 06 00 LD BC,STPSIZ ; SIZE OF BLOCK TO COPY -0320 E6BF ED B0 LDIR ; DO IT -0321 E6C1 ; -0322 E6C1 ; RESET (DE)BLOCKING ALGORITHM -0323 E6C1 CD C2 E7 CALL BLKRES -0324 E6C4 ; -0325 E6C4 ; DEFAULT DMA ADDRESS -0326 E6C4 01 80 00 LD BC,$80 ; DEFAULT DMA ADDRESS IS $80 -0327 E6C7 CD AC E7 CALL SETDMA ; SET IT -0328 E6CA ; -0329 E6CA ; ENSURE VALID DISK AND JUMP TO CCP -0330 E6CA 3A 04 00 LD A,(CDISK) ; GET CURRENT USER/DISK -0331 E6CD E6 0F AND $0F ; ISOLATE DISK PART -0332 E6CF 4F LD C,A ; SETUP C WITH CURRENT USER/DISK, ASSUME IT IS OK -0333 E6D0 CD 7F E9 CALL DSK_STATUS ; CHECK DISK STATUS -0334 E6D3 28 05 JR Z,CURDSK ; ZERO MEANS OK -0335 E6D5 3A 9A EB LD A,(DEFDRIVE) ; CURRENT DRIVE NOT READY, USE DEFAULT -0336 E6D8 18 03 JR GOCCP ; JUMP TO COMMAND PROCESSOR -0337 E6DA CURDSK: -0338 E6DA 3A 04 00 LD A,(CDISK) ; GET CURRENT USER/DISK -0339 E6DD GOCCP: -0340 E6DD 4F LD C,A ; SETUP C WITH CURRENT USER/DISK, ASSUME IT IS OK -0341 E6DE C3 00 D0 JP CCP_ENT ; JUMP TO COMMAND PROCESSOR -0342 E6E1 ; -0343 E6E1 ;__________________________________________________________________________________________________ -0344 E6E1 GOMON: -0345 E6E1 CD 66 EA CALL PANIC -0346 E6E4 ; -0347 E6E4 ; DI -0348 E6E4 ; IM 1 -0349 E6E4 ; -0350 E6E4 ; LD SP,STACK -0351 E6E4 ; -0352 E6E4 ; ; RELOAD MONITOR INTO RAM (IN CASE IT HAS BEEN OVERWRITTEN) -0353 E6E4 ; CALL ROMPGZ -0354 E6E4 ; LD HL,MON_IMG -0355 E6E4 ; LD DE,MON_LOC -0356 E6E4 ; LD BC,MON_SIZ -0357 E6E4 ; LDIR -0358 E6E4 ; CALL RAMPGZ -0359 E6E4 -0360 E6E4 ; ; JUMP TO MONITOR WARM ENTRY -0361 E6E4 ; JP MON_UART -0362 E6E4 ; -0363 E6E4 ; -0364 E6E4 ;================================================================================================== -0365 E6E4 ; CHARACTER BIOS FUNCTIONS -0366 E6E4 ;================================================================================================== -0367 E6E4 ; -0368 E6E4 ;__________________________________________________________________________________________________ -0369 E6E4 ; -0370 E6E4 ;__________________________________________________________________________________________________ -0371 E6E4 CONST: -0372 E6E4 ; CONSOLE STATUS, RETURN $FF IF CHARACTER READY, $00 IF NOT -0373 E6E4 ; -0374 E6E4 06 02 LD B,BF_CIOIST ; B = FUNCTION -0375 E6E6 21 3E E7 LD HL,CIOST ; HL = ADDRESS OF COMPLETION ROUTINE -0376 E6E9 18 0B JR CONIO -0377 E6EB ; -0378 E6EB ;__________________________________________________________________________________________________ -0379 E6EB CONIN: -0380 E6EB ; CONSOLE CHARACTER INTO REGISTER A -0381 E6EB ; -0382 E6EB 06 00 LD B,BF_CIOIN ; B = FUNCTION -0383 E6ED 21 3B E7 LD HL,CIOIN ; HL = ADDRESS OF COMPLETION ROUTINE -0384 E6F0 18 04 JR CONIO -0385 E6F2 -0386 E6F2 ;__________________________________________________________________________________________________ -0387 E6F2 CONOUT: -0388 E6F2 ; CONSOLE CHARACTER OUTPUT FROM REGISTER C -0389 E6F2 ; -0390 E6F2 06 01 LD B,BF_CIOOUT ; B = FUNCTION -0391 E6F4 E1 POP HL ; NO COMPLETION ROUTINE, SETUP DIRECT RETURN TO CALLER -0392 E6F5 59 LD E,C ; E = CHARACTER TO SEND -0393 E6F6 ; JR CONIO ; COMMENTED OUT, FALL THROUGH OK -0394 E6F6 ; -0395 E6F6 ;__________________________________________________________________________________________________ -0396 E6F6 CONIO: -0397 E6F6 ; -0398 E6F6 3A 03 00 LD A,(IOBYTE) ; GET IOBYTE -0399 E6F9 E6 03 AND $03 ; ISOLATE RELEVANT IOBYTE BITS FOR CONSOLE -0400 E6FB ; OR $00 ; PUT LOGICAL DEVICE IN BITS 2-3 (CON:=$00, RDR:=$04, PUN:=$08, LST:=$0C -0401 E6FB 18 46 JR CIO_DISP -0402 E6FD ; -0403 E6FD ;__________________________________________________________________________________________________ -0404 E6FD LIST: -0405 E6FD ; LIST CHARACTER FROM REGISTER C -0406 E6FD ; -0407 E6FD 06 01 LD B,BF_CIOOUT ; B = FUNCTION -0408 E6FF E1 POP HL ; NO COMPLETION ROUTINE, SETUP DIRECT RETURN TO CALLER -0409 E700 59 LD E,C ; E = CHARACTER TO SEND -0410 E701 18 05 JR LISTIO -0411 E703 ; -0412 E703 ;__________________________________________________________________________________________________ -0413 E703 LISTST: -0414 E703 ; RETURN LIST STATUS (0 IF NOT READY, 1 IF READY) -0415 E703 ; -0416 E703 06 03 LD B,BF_CIOOST ; B = FUNCTION -0417 E705 21 3E E7 LD HL,CIOST ; HL = ADDRESS OF COMPLETION ROUTINE -0418 E708 ; JR LISTIO ; COMMENTED OUT, FALL THROUGH OK -0419 E708 ; -0420 E708 ;__________________________________________________________________________________________________ -0421 E708 LISTIO: -0422 E708 ; -0423 E708 3A 03 00 LD A,(IOBYTE) ; GET IOBYTE -0424 E70B 07 RLCA ; SHIFT RELEVANT BITS TO BITS 0-1 -0425 E70C 07 RLCA -0426 E70D E6 03 AND $03 ; ISOLATE RELEVANT IOBYTE BITS FOR LST: -0427 E70F F6 0C OR $0C ; PUT LOGICAL DEVICE IN BITS 2-3 (CON:=$00, RDR:=$04, PUN:=$08, LST:=$0C -0428 E711 18 30 JR CIO_DISP -0429 E713 ; -0430 E713 ;__________________________________________________________________________________________________ -0431 E713 PUNCH: -0432 E713 ; PUNCH CHARACTER FROM REGISTER C -0433 E713 ; -0434 E713 06 01 LD B,BF_CIOOUT ; B = FUNCTION -0435 E715 E1 POP HL ; NO COMPLETION ROUTINE, SETUP DIRECT RETURN TO CALLER -0436 E716 59 LD E,C ; E = CHARACTER TO SEND -0437 E717 ; JR PUNCHIO ; COMMENTED OUT, FALL THROUGH OK -0438 E717 ; -0439 E717 ;__________________________________________________________________________________________________ -0440 E717 PUNCHIO: -0441 E717 ; -0442 E717 3A 03 00 LD A,(IOBYTE) ; GET IOBYTE -0443 E71A 07 RLCA ; SHIFT RELEVANT BITS TO BITS 0-1 -0444 E71B 07 RLCA -0445 E71C 07 RLCA -0446 E71D 07 RLCA -0447 E71E E6 03 AND $03 ; ISOLATE RELEVANT IOBYTE BITS FOR PUN: -0448 E720 F6 08 OR $08 ; PUT LOGICAL DEVICE IN BITS 2-3 (CON:=$00, RDR:=$04, PUN:=$08, LST:=$0C -0449 E722 18 1F JR CIO_DISP -0450 E724 ; -0451 E724 ;__________________________________________________________________________________________________ -0452 E724 READER: -0453 E724 ; READ CHARACTER INTO REGISTER A FROM READER DEVICE -0454 E724 ; -0455 E724 06 00 LD B,BF_CIOIN ; B = FUNCTION -0456 E726 21 3B E7 LD HL,CIOIN ; HL = ADDRESS OF COMPLETION ROUTINE -0457 E729 18 05 JR READERIO -0458 E72B ; -0459 E72B ;__________________________________________________________________________________________________ -0460 E72B READERST: -0461 E72B ; RETURN READER STATUS (0 IF NOT READY, 1 IF READY) -0462 E72B ; -0463 E72B 06 02 LD B,BF_CIOIST ; B = FUNCTION -0464 E72D 21 3E E7 LD HL,CIOST ; HL = ADDRESS OF COMPLETION ROUTINE -0465 E730 ; JR READERIO ; COMMENTED OUT, FALL THROUGH OK -0466 E730 ; -0467 E730 ;__________________________________________________________________________________________________ -0468 E730 READERIO: -0469 E730 ; -0470 E730 3A 03 00 LD A,(IOBYTE) ; GET IOBYTE -0471 E733 0F RRCA ; SHIFT RELEVANT BITS TO BITS 0-1 -0472 E734 0F RRCA -0473 E735 E6 03 AND $03 ; ISOLATE RELEVANT IOBYTE BITS FOR RDR: -0474 E737 F6 04 OR $04 ; PUT LOGICAL DEVICE IN BITS 2-3 (CON:=$00, RDR:=$04, PUN:=$08, LST:=$0C -0475 E739 18 08 JR CIO_DISP -0476 E73B ; -0477 E73B ;__________________________________________________________________________________________________ -0478 E73B CIOIN: -0479 E73B ; COMPLETION ROUTINE FOR CHARACTER INPUT FUNCTIONS -0480 E73B ; -0481 E73B 7B LD A,E ; MOVE CHARACTER RETURNED TO A -0482 E73C C9 RET ; FALL THRU -0483 E73D ;; -0484 E73D ;;__________________________________________________________________________________________________ -0485 E73D ;CIOOUT: -0486 E73D ;; COMPLETION ROUTINE FOR CHARACTER OUTPUT FUNCTIONS -0487 E73D ;; -0488 E73D C9 RET -0489 E73E ; -0490 E73E ;__________________________________________________________________________________________________ -0491 E73E CIOST: -0492 E73E ; COMPLETION ROUTINE FOR CHARACTER STATUS FUNCTIONS (IST/OST) -0493 E73E ; -0494 E73E~ #IF (PLATFORM == PLT_UNA) -0495 E73E~ LD A,E -0496 E73E #ENDIF -0497 E73E B7 OR A ; SET FLAGS -0498 E73F C8 RET Z ; NO CHARACTERS WAITING (IST) OR OUTPUT BUF FULL (OST) -0499 E740 F6 FF OR $FF ; $FF SIGNALS READY TO READ (IST) OR WRITE (OST) -0500 E742 C9 RET -0501 E743 ; -0502 E743 ;================================================================================================== -0503 E743 ; CHARACTER DEVICE INTERFACE -0504 E743 ;================================================================================================== -0505 E743 ; -0506 E743 ; ROUTING FOR CHARACTER DEVICE FUNCTIONS -0507 E743 ; A = INDEX INTO DEVICE MAP BASED ON IOBYTE BIOS REQUEST -0508 E743 ; B = FUNCTION REQUESTED: BF_CIO(IN/OUT/IST/OST) -0509 E743 ; E = CHARACTER (IF APPLICABLE TO FUNCTION) -0510 E743 ; HL = ADDRESS OF COMPLETION ROUTINE -0511 E743 ; -0512 E743 CIO_DISP: -0513 E743 E5 PUSH HL ; PUT COMPLETION ROUTINE ON STACK -0514 E744 -0515 E744 ; LOOKUP IOBYTE MAPPED DEVICE CODE -0516 E744 E6 0F AND $0F ; ISOLATE INDEX INTO DEVICE MAP -0517 E746 -0518 E746 21 40 E6 LD HL,DEVMAP ; HL = ADDRESS OF DEVICE MAP -0519 E749 CD 0B EB CALL ADDHLA ; ADD OFFSET -0520 E74C -0521 E74C 7E LD A,(HL) ; LOOKUP DEVICE CODE -0522 E74D~ #IF (PLATFORM == PLT_UNA) -0523 E74D~ LD C,B ; MOVE FUNCTION TO C -0524 E74D~ LD B,A ; DEVICE GOES IN B -0525 E74D #ELSE -0526 E74D 4F LD C,A ; SAVE IN C FOR BIOS USAGE -0527 E74E #ENDIF -0528 E74E -0529 E74E FE E0 CP CIODEV_BAT ; CHECK FOR SPECIAL DEVICE (BAT, NUL) -0530 E750 30 02 JR NC,CIO_DISP1 ; HANDLE SPECIAL DEVICE -0531 E752 CF RST 08 ; RETURN VIA COMPLETION ROUTINE SET AT START -0532 E753 C9 RET -0533 E754 -0534 E754 CIO_DISP1: -0535 E754 ; HANDLE SPECIAL DEVICES -0536 E754 E6 F0 AND $F0 ; ISOLATE DEVICE -0537 E756 FE E0 CP CIODEV_BAT ; BAT: ? -0538 E758 28 07 JR Z,CIO_BAT ; YES, GO TO BAT DEVICE HANDLER -0539 E75A FE F0 CP CIODEV_NUL ; NUL: ? -0540 E75C 28 18 JR Z,CIO_NUL ; YES, GO TO NUL DEVICE HANDLER -0541 E75E CD 66 EA CALL PANIC ; SOMETHING BAD HAPPENED -0542 E761 ; -0543 E761 ; BAT: IS A PSEUDO DEVICE REDIRECTING INPUT TO READER AND OUTPUT TO LIST -0544 E761 ; -0545 E761 CIO_BAT: -0546 E761 4B LD C,E ; PUT CHAR BACK IN C -0547 E762 78 LD A,B ; GET REQUESTED FUNCTION -0548 E763 FE 00 CP BF_CIOIN ; INPUT? -0549 E765 28 BD JR Z,READER ; -> READER -0550 E767 FE 02 CP BF_CIOIST ; INPUT STATUS? -0551 E769 28 C0 JR Z,READERST ; -> READER -0552 E76B FE 01 CP BF_CIOOUT ; OUTPUT? -0553 E76D 28 8E JR Z,LIST ; -> LIST -0554 E76F FE 03 CP BF_CIOOST ; OUTPUT STATUS? -0555 E771 28 90 JR Z,LISTST ; -> LIST -0556 E773 CD 66 EA CALL PANIC ; SOMETHING BAD HAPPENED -0557 E776 ; -0558 E776 ; NUL: IS A DUMMY DEVICE THAT DOES NOTHING -0559 E776 ; -0560 E776 CIO_NUL: -0561 E776 78 LD A,B ; FUNCTION -0562 E777 FE 00 CP BF_CIOIN -0563 E779 28 0F JR Z,NUL_IN -0564 E77B FE 02 CP BF_CIOIST -0565 E77D 28 0E JR Z,NUL_IST -0566 E77F FE 01 CP BF_CIOOUT -0567 E781 28 09 JR Z,NUL_OUT -0568 E783 FE 03 CP BF_CIOOST -0569 E785 28 06 JR Z,NUL_OST -0570 E787 CD 66 EA CALL PANIC -0571 E78A ; -0572 E78A NUL_IN: -0573 E78A 1E 1B LD E,$1B ; RETURN EOF -0574 E78C NUL_OUT: -0575 E78C C9 RET -0576 E78D ; -0577 E78D NUL_IST: -0578 E78D NUL_OST: -0579 E78D F6 FF OR $FF ; A=$FF & NZ SET -0580 E78F C9 RET -0581 E790 ; -0582 E790 ;================================================================================================== -0583 E790 ; DISK BIOS FUNCTIONS -0584 E790 ;================================================================================================== -0585 E790 ; -0586 E790 ;__________________________________________________________________________________________________ -0587 E790 SELDSK: -0588 E790 ; SELECT DISK NUMBER FOR SUBSEQUENT DISK OPS -0589 E790~ #IF DSKTRACE -0590 E790~ CALL PRTSELDSK ; *DEBUG* -0591 E790 #ENDIF -0592 E790 ; -0593 E790 C3 3C E9 JP DSK_SELECT -0594 E793 ; -0595 E793 ;__________________________________________________________________________________________________ -0596 E793 HOME: -0597 E793 ; SELECT TRACK 0 (BC = 0) AND FALL THRU TO SETTRK -0598 E793~ #IF DSKTRACE -0599 E793~ CALL PRTHOME ; *DEBUG* -0600 E793 #ENDIF -0601 E793 ; -0602 E793 3A A1 EB LD A,(HSTWRT) ; CHECK FOR PENDING WRITE -0603 E796 B7 OR A ; SET FLAGS -0604 E797 20 03 JR NZ,HOMED ; BUFFER IS DIRTY -0605 E799 32 C4 EB LD (HSTACT),A ; CLEAR HOST ACTIVE FLAG -0606 E79C ; -0607 E79C HOMED: -0608 E79C 01 00 00 LD BC,0 -0609 E79F ; -0610 E79F ;__________________________________________________________________________________________________ -0611 E79F SETTRK: -0612 E79F ; SET TRACK GIVEN BY REGISTER BC -0613 E79F ED 43 A5 EB LD (SEKTRK),BC -0614 E7A3 C9 RET -0615 E7A4 ; -0616 E7A4 ;__________________________________________________________________________________________________ -0617 E7A4 SETSEC: -0618 E7A4 ; SET SECTOR GIVEN BY REGISTER BC -0619 E7A4 ED 43 A7 EB LD (SEKSEC),BC -0620 E7A8 C9 RET -0621 E7A9 ; -0622 E7A9 ;__________________________________________________________________________________________________ -0623 E7A9 SECTRN: -0624 E7A9 ; SECTOR TRANSLATION FOR SKEW, HARD CODED 1:1, NO SKEW IMPLEMENTED -0625 E7A9 60 LD H,B -0626 E7AA 69 LD L,C -0627 E7AB C9 RET -0628 E7AC ; -0629 E7AC ;__________________________________________________________________________________________________ -0630 E7AC SETDMA: -0631 E7AC ED 43 9F EB LD (DMAADR),BC -0632 E7B0 C9 RET -0633 E7B1 ; -0634 E7B1 ;__________________________________________________________________________________________________ -0635 E7B1 READ: -0636 E7B1 3E 00 LD A,DOP_READ -0637 E7B3 18 08 JR READWRITE -0638 E7B5 ; -0639 E7B5 ;__________________________________________________________________________________________________ -0640 E7B5 WRITE: -0641 E7B5 79 LD A,C -0642 E7B6 32 9E EB LD (WRTYPE),A ; SAVE WRITE TYPE -0643 E7B9 3E 01 LD A,DOP_WRITE -0644 E7BB 18 00 JR READWRITE -0645 E7BD ; -0646 E7BD ;__________________________________________________________________________________________________ -0647 E7BD READWRITE: -0648 E7BD 32 9D EB LD (DSKOP),A ; SET THE ACTIVE DISK OPERATION -0649 E7C0 18 14 JR BLKRW -0650 E7C2 ; -0651 E7C2 ;================================================================================================== -0652 E7C2 ; BLOCKED READ/WRITE (BLOCK AND BUFFER FOR 512 BYTE SECTOR) -0653 E7C2 ;================================================================================================== -0654 E7C2 ; -0655 E7C2 ;__________________________________________________________________________________________________ -0656 E7C2 ; -0657 E7C2 ; RESET (DE)BLOCKING ALGORITHM - JUST MARK BUFFER INVALID -0658 E7C2 ; NOTE: BUFFER CONTENTS INVALIDATED, BUT RETAIN ANY PENDING WRITE -0659 E7C2 ; -0660 E7C2 BLKRES: -0661 E7C2 AF XOR A -0662 E7C3 32 C4 EB LD (HSTACT),A ; BUFFER NO LONGER VALID -0663 E7C6 32 CA EB LD (UNACNT),A ; CLEAR UNALLOC COUNT -0664 E7C9 -0665 E7C9 C9 RET -0666 E7CA -0667 E7CA ;__________________________________________________________________________________________________ -0668 E7CA ; -0669 E7CA ; FLUSH (DE)BLOCKING ALGORITHM - DO PENDING WRITES -0670 E7CA ; -0671 E7CA BLKFLSH: -0672 E7CA ; CHECK FOR BUFFER WRITTEN (DIRTY) -0673 E7CA 3A A1 EB LD A,(HSTWRT) ; GET BUFFER WRITTEN FLAG -0674 E7CD B7 OR A -0675 E7CE C8 RET Z ; NOT DIRTY, RETURN WITH A=0 AND Z SET -0676 E7CF -0677 E7CF ; CLEAR THE BUFFER WRITTEN FLAG (EVEN IF A WRITE ERROR OCCURS) -0678 E7CF AF XOR A ; Z = 0 -0679 E7D0 32 A1 EB LD (HSTWRT),A ; SAVE IT -0680 E7D3 -0681 E7D3 ; DO THE WRITE AND RETURN RESULT -0682 E7D3 C3 8C E9 JP DSK_WRITE -0683 E7D6 -0684 E7D6 #IF WRTCACHE -0685 E7D6 -0686 E7D6 WRT_ALC .EQU 0 ; WRITE TO ALLOCATED -0687 E7D6 WRT_DIR .EQU 1 ; WRITE TO DIRECTORY -0688 E7D6 WRT_UNA .EQU 2 ; WRITE TO UNALLOCATED -0689 E7D6 -0690 E7D6 ; -0691 E7D6 ;__________________________________________________________________________________________________ -0692 E7D6 ; -0693 E7D6 ; (DE)BLOCKING READ/WRITE ROUTINE. MANAGES PHYSICAL DISK BUFFER AND CALLS -0694 E7D6 ; PHYSICAL READ/WRITE ROUTINES APPROPRIATELY. -0695 E7D6 ; -0696 E7D6 BLKRW: -0697 E7D6~ #IF DSKTRACE -0698 E7D6~ CALL PRTDSKOP ; *DEBUG* -0699 E7D6 #ENDIF -0700 E7D6 -0701 E7D6 ; FIX!!! WE ABORT ON FIRST ERROR, DRI SEEMS TO PASS ERROR STATUS TO THE END!!! -0702 E7D6 -0703 E7D6 ; IF WRITE OPERATION, GO TO SPECIAL WRITE PROCESSING -0704 E7D6 3A 9D EB LD A,(DSKOP) ; GET REQUESTED OPERATION -0705 E7D9 FE 01 CP DOP_WRITE ; WRITE -0706 E7DB 28 09 JR Z,BLKRW1 ; GO TO WRITE PROCESSING -0707 E7DD -0708 E7DD ; OTHERWISE, CLEAR OUT ANY SEQUENTIAL, UNALLOC WRITE PROCESSING -0709 E7DD ; AND GO DIRECTLY TO MAIN I/O -0710 E7DD AF XOR A ; ZERO TO A -0711 E7DE 32 9E EB LD (WRTYPE),A ; SET WRITE TYPE = 0 (WRT_ALC) TO ENSURE READ OCCURS -0712 E7E1 32 CA EB LD (UNACNT),A ; SET UNACNT TO ABORT SEQ WRITE PROCESSING -0713 E7E4 -0714 E7E4 18 24 JR BLKRW4 ; GO TO I/O -0715 E7E6 -0716 E7E6 BLKRW1: -0717 E7E6 ; WRITE PROCESSING -0718 E7E6 ; CHECK FOR FIRST WRITE TO UNALLOCATED BLOCK -0719 E7E6 3A 9E EB LD A,(WRTYPE) ; GET WRITE TYPE -0720 E7E9 FE 02 CP WRT_UNA ; IS IT WRITE TO UNALLOC? -0721 E7EB 20 07 JR NZ,BLKRW2 ; NOPE, BYPASS -0722 E7ED -0723 E7ED ; INITIALIZE START OF SEQUENTIAL WRITING TO UNALLOCATED BLOCK -0724 E7ED ; AND THEN TREAT SUBSEQUENT PROCESSING AS A NORMAL WRITE -0725 E7ED CD 49 E8 CALL UNA_INI ; INITIALIZE SEQUENTIAL WRITE TRACKING -0726 E7F0 AF XOR A ; A = 0 = WRT_ALC -0727 E7F1 32 9E EB LD (WRTYPE),A ; NOW TREAT LIKE WRITE TO ALLOCATED -0728 E7F4 -0729 E7F4 BLKRW2: -0730 E7F4 ; IF WRTYPE = WRT_ALC AND SEQ WRITE, GOTO BLKRW7 (SKIP READ) -0731 E7F4 B7 OR A ; NOTE: A WILL ALREADY HAVE THE WRITE TYPE HERE -0732 E7F5 20 0F JR NZ,BLKRW3 ; NOT TYPE = 0 = WRT_ALC, SO MOVE ON -0733 E7F7 -0734 E7F7 CD 6D E8 CALL UNA_CHK ; CHECK FOR CONTINUATION OF SEQ WRITES TO UNALLOCATED BLOCK -0735 E7FA 20 0A JR NZ,BLKRW3 ; NOPE, ABORT -0736 E7FC -0737 E7FC ; WE MATCHED EVERYTHING, TREAT AS WRITE TO UNALLOCATED BLOCK -0738 E7FC 3E 02 LD A,WRT_UNA ; WRITE TO UNALLOCATED -0739 E7FE 32 9E EB LD (WRTYPE),A ; SAVE WRITE TYPE -0740 E801 -0741 E801 CD 7F E8 CALL UNA_INC ; INCREMENT SEQUENTIAL WRITE TRACKING -0742 E804 18 04 JR BLKRW4 ; PROCEED TO I/O PROCESSING -0743 E806 -0744 E806 BLKRW3: -0745 E806 ; NON-SEQUENTIAL WRITE DETECTED, STOP ANY FURTHER CHECKING -0746 E806 AF XOR A ; ZERO -0747 E807 32 CA EB LD (UNACNT),A ; CLEAR UNALLOCATED WRITE COUNT -0748 E80A -0749 E80A ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -0750 E80A ; IS A FLUSH NEEDED HERE??? -0751 E80A ; FLUSH CURRENT BUFFER CONTENTS IF NEEDED -0752 E80A ;CALL BLKFLSH ; FLUSH PENDING WRITES -0753 E80A ;RET NZ ; ABORT ON ERROR -0754 E80A ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -0755 E80A -0756 E80A BLKRW4: -0757 E80A ; START OF ACTUAL I/O PROCESSING -0758 E80A CD 9E E8 CALL BLK_XLT ; DO THE LOGICAL TO PHYSICAL MAPPING: SEK... -> XLT... -0759 E80D CD C6 E8 CALL BLK_CMP ; IS THE DESIRED PHYSICAL BLOCK IN BUFFER? -0760 E810 28 19 JR Z,BLKRW6 ; BLOCK ALREADY IN ACTIVE BUFFER, NO READ REQUIRED -0761 E812 -0762 E812 ; AT THIS POINT, WE KNOW WE NEED TO READ THE TARGET PHYSICAL SECTOR -0763 E812 ; IT MAY ACTUALLY BE A PREREAD FOR A SUBSEQUENT WRITE, BUT THAT IS OK -0764 E812 -0765 E812 ; FIRST, FLUSH CURRENT BUFFER CONTENTS -0766 E812 CD CA E7 CALL BLKFLSH ; FLUSH PENDING WRITES -0767 E815 C0 RET NZ ; ABORT ON ERROR -0768 E816 -0769 E816 ; IMPLEMENT THE TRANSLATED VALUES -0770 E816 CD BA E8 CALL BLK_SAV ; SAVE XLAT VALUES: XLT... -> HST... -0771 E819 -0772 E819 ; IF WRITE TO UNALLOC BLOCK, BYPASS READ, LEAVES BUFFER UNDEFINED -0773 E819 3A 9E EB LD A,(WRTYPE) -0774 E81C FE 02 CP 2 -0775 E81E 28 0B JR Z,BLKRW6 -0776 E820 -0777 E820 ; DO THE ACTUAL READ -0778 E820 CD 88 E9 CALL DSK_READ ; READ PHYSICAL SECTOR INTO BUFFER -0779 E823 28 06 JR Z,BLKRW6 ; GOOD READ, CONTINUE -0780 E825 -0781 E825 ; IF READ FAILED, RESET (DE)BLOCKING ALGORITHM AND RETURN ERROR -0782 E825 F5 PUSH AF ; SAVE ERROR STATUS -0783 E826 CD C2 E7 CALL BLKRES ; INVALIDATE (DE)BLOCKING BUFFER -0784 E829 F1 POP AF ; RECOVER ERROR STATUS -0785 E82A C9 RET ; ERROR RETURN -0786 E82B -0787 E82B BLKRW6: -0788 E82B ; CHECK TYPE OF OPERATIONS, IF WRITE, THEN GO TO WRITE PROCESSING -0789 E82B 3A 9D EB LD A,(DSKOP) ; GET PENDING OPERATION -0790 E82E FE 01 CP DOP_WRITE ; IS IT A WRITE? -0791 E830 28 05 JR Z,BLKRW7 ; YES, GO TO WRITE PROCESSING -0792 E832 -0793 E832 ; THIS IS A READ OPERATION, WE ALREADY DID THE I/O, NOW JUST DEBLOCK AND RETURN -0794 E832 CD ED E8 CALL BLK_DEBLOCK ; EXTRACT DATA FROM BLOCK -0795 E835 AF XOR A ; NO ERROR -0796 E836 C9 RET ; ALL DONE -0797 E837 -0798 E837 BLKRW7: -0799 E837 ; THIS IS A WRITE OPERATION, INSERT DATA INTO BLOCK -0800 E837 CD D6 E8 CALL BLK_BLOCK ; INSERT DATA INTO BLOCK -0801 E83A -0802 E83A ; MARK THE BUFFER AS WRITTEN -0803 E83A 3E 01 LD A,TRUE ; BUFFER DIRTY = TRUE -0804 E83C 32 A1 EB LD (HSTWRT),A ; SAVE IT -0805 E83F -0806 E83F ; CHECK WRITE TYPE, IF WRT_DIR, FORCE THE PHYSICAL WRITE -0807 E83F 3A 9E EB LD A,(WRTYPE) ; GET WRITE TYPE -0808 E842 FE 01 CP WRT_DIR ; 1 = DIRECTORY WRITE -0809 E844 CA CA E7 JP Z,BLKFLSH ; FLUSH PENDING WRITES AND RETURN STATUS -0810 E847 -0811 E847 AF XOR A ; ALL IS WELL, SET RETURN CODE 0 -0812 E848 C9 RET ; RETURN -0813 E849 ; -0814 E849 ;__________________________________________________________________________________________________ -0815 E849 ; -0816 E849 ; INITIALIZE TRACKING OF SEQUENTIAL WRITES INTO UNALLOCATED BLOCK -0817 E849 ; SETUP UNA... VARIABLES -0818 E849 ; -0819 E849 UNA_INI: -0820 E849 ; COPY SEKDSK/TRK/SEC TO UNA... -0821 E849 21 A4 EB LD HL,SEK -0822 E84C 11 C5 EB LD DE,UNA -0823 E84F 01 05 00 LD BC,UNASIZ -0824 E852 ED B0 LDIR -0825 E854 -0826 E854 ; SETUP UNACNT AND UNASPT -0827 E854 2A AA EB LD HL,(SEKDPH) ; HL POINTS TO DPH -0828 E857 11 0A 00 LD DE,10 ; OFFSET OF DPB ADDRESS IN DPH -0829 E85A 19 ADD HL,DE ; DPH POINTS TO DPB ADDRESS -0830 E85B 7E LD A,(HL) -0831 E85C 23 INC HL -0832 E85D 66 LD H,(HL) -0833 E85E 6F LD L,A ; HL POINTS TO DPB -0834 E85F 4E LD C,(HL) -0835 E860 23 INC HL -0836 E861 46 LD B,(HL) ; BC HAS SPT -0837 E862 ED 43 CB EB LD (UNASPT),BC ; SAVE SECTORS PER TRACK -0838 E866 2B DEC HL -0839 E867 2B DEC HL ; HL POINTS TO RECORDS PER BLOCK (BYTE IN FRONT OF DPB) -0840 E868 7E LD A,(HL) ; GET IT -0841 E869 32 CA EB LD (UNACNT),A ; SAVE IT -0842 E86C -0843 E86C C9 RET -0844 E86D ; -0845 E86D ;__________________________________________________________________________________________________ -0846 E86D ; -0847 E86D ; CHECK FOR CONTINUATION OF SEQUENTIAL WRITES TO UNALLOCATED BLOCK -0848 E86D ; SEE IF UNACNT > 0 AND UNA... VARIABLES MATCH SEK... VARIABLES -0849 E86D ; -0850 E86D UNA_CHK: -0851 E86D 3A CA EB LD A,(UNACNT) ; GET THE COUNTER -0852 E870 B7 OR A -0853 E871 20 02 JR NZ,UNA_CHK1 ; IF NOT DONE WITH BLOCK, KEEP CHECKING -0854 E873 -0855 E873 ; CNT IS NOW ZERO, EXHAUSTED RECORDS IN ONE BLOCK! -0856 E873 3D DEC A ; HACK TO SET NZ -0857 E874 C9 RET ; RETURN WITH NZ -0858 E875 -0859 E875 UNA_CHK1: -0860 E875 ; COMPARE UNA... VARIABLES WITH SEK... VARIABLES -0861 E875 21 A4 EB LD HL,SEK -0862 E878 11 C5 EB LD DE,UNA -0863 E87B 06 05 LD B,UNASIZ -0864 E87D 18 4F JR BLK_CMPLOOP -0865 E87F ; -0866 E87F ;__________________________________________________________________________________________________ -0867 E87F ; -0868 E87F ; INCREMENT THE SEQUENTIAL WRITE TRACKING VARIABLES -0869 E87F ; TO REFLECT THE NEXT RECORD (TRK/SEC) WE EXPECT -0870 E87F ; -0871 E87F UNA_INC: -0872 E87F ; DECREMENT THE BLOCK RECORD COUNT -0873 E87F 21 CA EB LD HL,UNACNT -0874 E882 35 DEC (HL) -0875 E883 -0876 E883 ; INCREMENT THE SECTOR -0877 E883 ED 5B C8 EB LD DE,(UNASEC) -0878 E887 13 INC DE -0879 E888 ED 53 C8 EB LD (UNASEC),DE -0880 E88C -0881 E88C ; CHECK FOR END OF TRACK -0882 E88C 2A CB EB LD HL,(UNASPT) -0883 E88F AF XOR A -0884 E890 ED 52 SBC HL,DE -0885 E892 C0 RET NZ -0886 E893 -0887 E893 ; HANDLE END OF TRACK -0888 E893 22 C8 EB LD (UNASEC),HL ; SECTOR BACK TO 0 (NOTE: HL=0 AT THIS POINT) -0889 E896 2A C6 EB LD HL,(UNATRK) ; GET CURRENT TRACK -0890 E899 23 INC HL ; BUMP IT -0891 E89A 22 C6 EB LD (UNATRK),HL ; SAVE IT -0892 E89D -0893 E89D C9 RET -0894 E89E~ #ELSE -0895 E89E~ ; -0896 E89E~ ;__________________________________________________________________________________________________ -0897 E89E~ ; -0898 E89E~ ; (DE)BLOCKING READ/WRITE ROUTINE. MANAGES PHYSICAL DISK BUFFER AND CALLS -0899 E89E~ ; PHYSICAL READ/WRITE ROUTINES APPROPRIATELY. -0900 E89E~ ; -0901 E89E~ BLKRW: -0902 E89E~ #IF DSKTRACE -0903 E89E~ CALL PRTDSKOP ; *DEBUG* -0904 E89E~ #ENDIF -0905 E89E~ -0906 E89E~ CALL BLK_XLT ; SECTOR XLAT: SEK... -> XLT... -0907 E89E~ CALL BLK_CMP ; IN BUFFER? -0908 E89E~ JR Z,BLKRW1 ; YES, BYPASS READ -0909 E89E~ CALL BLK_SAV ; SAVE XLAT VALUES: XLT... -> HST... -0910 E89E~ LD A,FALSE ; ASSUME FAILURE, INVALIDATE BUFFER -0911 E89E~ LD (HSTACT),A ; SAVE IT -0912 E89E~ CALL DSK_READ ; READ PHYSICAL SECTOR INTO BUFFER -0913 E89E~ RET NZ ; BAIL OUT ON ERROR -0914 E89E~ -0915 E89E~ BLKRW1: -0916 E89E~ LD A,(DSKOP) ; GET PENDING OPERATION -0917 E89E~ CP DOP_WRITE ; IS IT A WRITE? -0918 E89E~ JR Z,BLKRW2 ; YES, GO TO WRITE ROUTINE -0919 E89E~ -0920 E89E~ CALL BLK_DEBLOCK ; EXTRACT DATA FROM BLOCK -0921 E89E~ XOR A ; NO ERROR -0922 E89E~ RET ; ALL DONE -0923 E89E~ -0924 E89E~ BLKRW2: -0925 E89E~ CALL BLK_BLOCK ; INSERT DATA INTO BLOCK -0926 E89E~ CALL DSK_WRITE ; WRITE PHYSICAL SECTOR FROM BUFFER -0927 E89E~ RET NZ ; BAIL OUT ON ERROR -0928 E89E~ -0929 E89E~ LD A,TRUE ; BUFFER IS NOW VALID -0930 E89E~ LD (HSTACT),A ; SAVE IT -0931 E89E~ -0932 E89E~ XOR A ; ALL IS WELL, SET RETURN CODE 0 -0933 E89E~ RET ; RETURN -0934 E89E #ENDIF -0935 E89E ; -0936 E89E ;__________________________________________________________________________________________________ -0937 E89E ; -0938 E89E ; TRANSLATE FROM CP/M DSK/TRK/SEC TO PHYSICAL -0939 E89E ; SEK... -> XLT... -0940 E89E ; -0941 E89E BLK_XLT: -0942 E89E ; FIRST, DO A BYTE COPY OF SEK... TO XLT... -0943 E89E 21 A4 EB LD HL,SEK -0944 E8A1 11 AF EB LD DE,XLT -0945 E8A4 01 0B 00 LD BC,XLTSIZ -0946 E8A7 ED B0 LDIR -0947 E8A9 -0948 E8A9 ; NOW UPDATE XLTSEC BASED ON (DE)BLOCKING FACTOR (ALWAYS 4:1) -0949 E8A9 ED 4B A7 EB LD BC,(SEKSEC) ; SECTOR IS FACTORED DOWN (4:1) DUE TO BLOCKING -0950 E8AD CB 38 SRL B ; 16 BIT RIGHT SHIFT TWICE TO DIVIDE BY 4 -0951 E8AF CB 19 RR C -0952 E8B1 CB 38 SRL B -0953 E8B3 CB 19 RR C -0954 E8B5 ED 43 B2 EB LD (XLTSEC),BC -0955 E8B9 -0956 E8B9 C9 RET -0957 E8BA ; -0958 E8BA ;__________________________________________________________________________________________________ -0959 E8BA ; -0960 E8BA ; SAVE RESULTS OF TRANSLATION: XLT... -> HST... -0961 E8BA ; IMPLICITLY SETS HSTACT TO TRUE! -0962 E8BA ; -0963 E8BA BLK_SAV: -0964 E8BA 21 AF EB LD HL,XLT -0965 E8BD 11 BA EB LD DE,HST -0966 E8C0 01 0B 00 LD BC,XLTSIZ -0967 E8C3 ED B0 LDIR -0968 E8C5 C9 RET -0969 E8C6 ; -0970 E8C6 ;__________________________________________________________________________________________________ -0971 E8C6 ; -0972 E8C6 ; COMPARE RESULTS OF TRANSLATION TO CURRENT BUF (XLT... TO HST...) -0973 E8C6 ; NOTE THAT HSTACT IS COMPARED TO XLTACT IMPLICITLY! XLTACT IS ALWAYS TRUE, SO -0974 E8C6 ; HSTACT MUST BE TRUE FOR COMPARE TO SUCCEED. -0975 E8C6 ; -0976 E8C6 BLK_CMP: -0977 E8C6 21 AF EB LD HL,XLT -0978 E8C9 11 BA EB LD DE,HST -0979 E8CC 06 0B LD B,XLTSIZ -0980 E8CE BLK_CMPLOOP: -0981 E8CE 1A LD A,(DE) -0982 E8CF BE CP (HL) -0983 E8D0 C0 RET NZ ; BAD COMPARE, RETURN WITH NZ -0984 E8D1 23 INC HL -0985 E8D2 13 INC DE -0986 E8D3 10 F9 DJNZ BLK_CMPLOOP -0987 E8D5 C9 RET ; RETURN WITH Z -0988 E8D6 ; -0989 E8D6 ;__________________________________________________________________________________________________ -0990 E8D6 ; -0991 E8D6 ; BLOCK DATA - INSERT CPM DMA BUF INTO PROPER PART OF PHYSICAL SECTOR BUFFER -0992 E8D6 ; -0993 E8D6 BLK_BLOCK: -0994 E8D6~ #IF (PLATFORM == PLT_UNA) -0995 E8D6~ CALL BLK_SETUP -0996 E8D6~ EX DE,HL -0997 E8D6~ LD BC,128 -0998 E8D6~ LDIR -0999 E8D6~ RET -1000 E8D6 #ELSE -1001 E8D6 06 F3 LD B,BF_SYSXCPY ; HBIOS FUNC: SYSTEM EXTENDED COPY -1002 E8D8 1E 8E LD E,BID_USR ; E=SRC=USER BANK=TPA -1003 E8DA 16 8D LD D,BID_BIOS ; D=DEST=HBIOS -1004 E8DC CF RST 08 ; SET BANKS FOR INTERBANK COPY -1005 E8DD CD 03 E9 CALL BLK_SETUP ; SETUP SOURCE AND DESTINATION -1006 E8E0 06 F2 LD B,BF_SYSCPY ; HBIOS FUNC: SYSTEM COPY -1007 E8E2 EB EX DE,HL ; SWAP HL/DE FOR BLOCK OPERATION -1008 E8E3 DD E5 PUSH IX ; SAVE IX -1009 E8E5 DD 21 80 00 LD IX,128 ; DMA BUFFER SIZE -1010 E8E9 CF RST 08 ; DO IT -1011 E8EA DD E1 POP IX ; RESTORE IX -1012 E8EC C9 RET -1013 E8ED #ENDIF -1014 E8ED ; -1015 E8ED ;__________________________________________________________________________________________________ -1016 E8ED ; -1017 E8ED ; DEBLOCK DATA - EXTRACT DESIRED CPM DMA BUF FROM PHYSICAL SECTOR BUFFER -1018 E8ED ; -1019 E8ED BLK_DEBLOCK: -1020 E8ED~ #IF (PLATFORM == PLT_UNA) -1021 E8ED~ CALL BLK_SETUP -1022 E8ED~ LD BC,128 -1023 E8ED~ LDIR -1024 E8ED~ RET -1025 E8ED #ELSE -1026 E8ED 06 F3 LD B,BF_SYSXCPY ; HBIOS FUNC: SYSTEM EXTENDED COPY -1027 E8EF 1E 8D LD E,BID_BIOS ; C=SRC=HBIOS -1028 E8F1 16 8E LD D,BID_USR ; B=DEST=USER BANK=TPA -1029 E8F3 CF RST 08 ; DO IT -1030 E8F4 CD 03 E9 CALL BLK_SETUP ; SETUP SOURCE AND DESTINATION -1031 E8F7 06 F2 LD B,BF_SYSCPY ; HBIOS FUNC: SYSTEM COPY -1032 E8F9 DD E5 PUSH IX ; SAVE IX -1033 E8FB DD 21 80 00 LD IX,128 ; DMA BUFFER SIZE -1034 E8FF CF RST 08 ; DO IT -1035 E900 DD E1 POP IX ; RESTORE IX -1036 E902 C9 RET -1037 E903 #ENDIF -1038 E903 ; -1039 E903 ;__________________________________________________________________________________________________ -1040 E903 ; -1041 E903 ; SETUP SOURCE AND DESTINATION POINTERS FOR BLOCK COPY OPERATION -1042 E903 ; AT EXIT, HL = ADDRESS OF DESIRED BLOCK IN SECTOR BUFFER, DE = DMA -1043 E903 ; -1044 E903 BLK_SETUP: -1045 E903 ED 4B A7 EB LD BC,(SEKSEC) -1046 E907 79 LD A,C -1047 E908 E6 03 AND 3 ; A = INDEX OF CPM BUF IN SEC BUF -1048 E90A 0F RRCA ; MULTIPLY BY 64 -1049 E90B 0F RRCA -1050 E90C 5F LD E,A ; INTO LOW ORDER BYTE OF DESTINATION -1051 E90D 16 00 LD D,0 ; HIGH ORDER BYTE IS ZERO -1052 E90F 2A A2 EB LD HL,(BUFADR) ; HL = START OF SEC BUF -1053 E912 19 ADD HL,DE ; ADD IN COMPUTED OFFSET -1054 E913 19 ADD HL,DE ; HL NOW = INDEX * 128 (SOURCE) -1055 E914 ED 5B 9F EB LD DE,(DMAADR) ; DE = DESTINATION = DMA BUF -1056 E918 C9 RET -1057 E919 ; -1058 E919 ;================================================================================================== -1059 E919 ; PHYSICAL DISK INTERFACE -1060 E919 ;================================================================================================== -1061 E919 ; -1062 E919 ; LOOKUP DISK INFORMATION BASED ON CPM DRIVE IN C -1063 E919 ; ON RETURN, D=DEVICE/UNIT, E=SLICE, HL=DPH ADDRESS -1064 E919 ; -1065 E919 DSK_GETINF: -1066 E919 2A 3B E6 LD HL,(DRVMAPADR) ; HL := START OF UNA DRIVE MAP -1067 E91C 2B DEC HL ; POINT TO DRIVE COUNT -1068 E91D 79 LD A,C ; A := CPM DRIVE -1069 E91E BE CP (HL) ; COMPARE TO NUMBER OF DRIVES CONFIGURED -1070 E91F 30 14 JR NC,DSK_GETINF1 ; IF OUT OF RANGE, GO TO ERROR RETURN -1071 E921 23 INC HL ; POINT TO START OF DRIVE MAP -1072 E922 ; -1073 E922 07 RLCA ; MULTIPLY A BY 4... -1074 E923 07 RLCA ; TO USE AS OFFSET INTO ???? MAP -1075 E924 CD 0B EB CALL ADDHLA ; ADD OFFSET -1076 E927 56 LD D,(HL) ; D := DEVICE/UNIT -1077 E928 23 INC HL ; BUMP TO SLICE -1078 E929 5E LD E,(HL) ; E := SLICE -1079 E92A 23 INC HL ; POINT TO DPH LSB -1080 E92B 7E LD A,(HL) ; A := DPH LSB -1081 E92C 23 INC HL ; POINT TO DPH MSB -1082 E92D 66 LD H,(HL) ; H := DPH MSB -1083 E92E 6F LD L,A ; L := DPH LSB -1084 E92F 7C LD A,H ; TEST FOR INVALID DPH -1085 E930 B5 OR L ; ... BY CHECKING FOR ZERO VALUE -1086 E931 28 02 JR Z,DSK_GETINF1 ; HANDLE ZERO DPH, DRIVE IS INVALID -1087 E933 AF XOR A ; SET SUCCESS -1088 E934 C9 RET -1089 E935 ; -1090 E935 DSK_GETINF1: ; ERROR RETURN -1091 E935 AF XOR A -1092 E936 67 LD H,A -1093 E937 6F LD L,A -1094 E938 57 LD D,A -1095 E939 5F LD E,A -1096 E93A 3C INC A -1097 E93B C9 RET -1098 E93C ; -1099 E93C ; -1100 E93C ; -1101 E93C DSK_SELECT: -1102 E93C 43 LD B,E ; SAVE E IN B FOR NOW -1103 E93D CD 19 E9 CALL DSK_GETINF ; GET D=DEVICE/UNIT, E=SLICE, HL=DPH ADDRESS -1104 E940 C0 RET NZ ; RETURN IF INVALID DRIVE (A=1, NZ SET, HL=0) -1105 E941 C5 PUSH BC ; WE NEED B LATER, SAVE ON STACK -1106 E942 ; -1107 E942 ; SAVE ALL THE NEW STUFF -1108 E942 79 LD A,C ; A := CPM DRIVE NO -1109 E943 32 A4 EB LD (SEKDSK),A ; SAVE IT -1110 E946 7A LD A,D ; A := DEVICE/UNIT -1111 E947 32 A9 EB LD (SEKDU),A ; SAVE DEVICE/UNIT -1112 E94A 22 AA EB LD (SEKDPH),HL ; SAVE DPH POINTER -1113 E94D ; -1114 E94D ; UPDATE OFFSET FOR ACTIVE SLICE -1115 E94D ; A TRACK IS ASSUMED TO BE 16 SECTORS -1116 E94D ; THE OFFSET REPRESENTS THE NUMBER OF BLOCKS * 256 -1117 E94D ; TO USE AS THE OFFSET -1118 E94D 26 41 LD H,65 ; H = TRACKS PER SLICE, E = SLICE NO -1119 E94F CD 10 EB CALL MULT8 ; HL := H * E (TOTAL TRACK OFFSET) -1120 E952 22 AC EB LD (SEKOFF),HL ; SAVE NEW TRACK OFFSET -1121 E955 ; -1122 E955 ; RESTORE DE TO BC (FOR ACCESS TO DRIVE LOGIN BIT) -1123 E955 C1 POP BC ; GET ORIGINAL E INTO B -1124 E956 ; -1125 E956 #IF (PLATFORM != PLT_UNA) -1126 E956 ; -1127 E956 ; CHECK IF THIS IS LOGIN, IF NOT, BYPASS MEDIA DETECTION -1128 E956 ; FIX: WHAT IF PREVIOUS MEDIA DETECTION FAILED??? -1129 E956 CB 40 BIT 0,B ; TEST DRIVE LOGIN BIT -1130 E958 20 20 JR NZ,DSK_SELECT2 ; BYPASS MEDIA DETECTION -1131 E95A ; -1132 E95A ; DETERMINE MEDIA IN DRIVE -1133 E95A 3A A9 EB LD A,(SEKDU) ; GET DEVICE/UNIT -1134 E95D 4F LD C,A ; STORE IN C -1135 E95E 06 13 LD B,BF_DIOMED ; DRIVER FUNCTION = DISK MEDIA -1136 E960 CF RST 08 -1137 E961 B7 OR A ; SET FLAGS -1138 E962 21 00 00 LD HL,0 ; ASSUME FAILURE -1139 E965 C8 RET Z ; BAIL OUT IF NO MEDIA -1140 E966 ; -1141 E966 ; A HAS MEDIA ID, SET HL TO CORRESPONDING DPBMAP ENTRY -1142 E966 21 51 E6 LD HL,DPBMAP ; HL = DPBMAP -1143 E969 07 RLCA ; DPBMAP ENTRIES ARE 2 BYTES EACH -1144 E96A CD 0B EB CALL ADDHLA ; ADD OFFSET TO HL -1145 E96D ; -1146 E96D ; LOOKUP THE ACTUAL DPB ADDRESS NOW -1147 E96D 5E LD E,(HL) ; DEREFERENCE HL... -1148 E96E 23 INC HL ; INTO DE... -1149 E96F 56 LD D,(HL) ; DE = ADDRESS OF DESIRED DPB -1150 E970 ; -1151 E970 ; PLUG DPB INTO THE ACTIVE DPH -1152 E970 2A AA EB LD HL,(SEKDPH) -1153 E973 01 0A 00 LD BC,10 ; OFFSET OF DPB IN DPH -1154 E976 09 ADD HL,BC ; HL := DPH.DPB -1155 E977 73 LD (HL),E ; SET LSB OF DPB IN DPH -1156 E978 23 INC HL ; BUMP TO MSB -1157 E979 72 LD (HL),D ; SET MSB OF DPB IN DPH -1158 E97A #ENDIF -1159 E97A ; -1160 E97A DSK_SELECT2: -1161 E97A 2A AA EB LD HL,(SEKDPH) ; HL = DPH ADDRESS FOR CP/M -1162 E97D AF XOR A ; FLAG SUCCESS -1163 E97E C9 RET ; NORMAL RETURN -1164 E97F ; -1165 E97F ; -1166 E97F ; -1167 E97F DSK_STATUS: -1168 E97F~ #IF (PLATFORM == PLT_UNA) -1169 E97F~ XOR A ; ASSUME OK FOR NOW -1170 E97F~ RET ; RETURN -1171 E97F #ELSE -1172 E97F ; C HAS CPM DRIVE, LOOKUP DEVICE/UNIT AND CHECK FOR INVALID DRIVE -1173 E97F CD 19 E9 CALL DSK_GETINF ; B = DEVICE/UNIT -1174 E982 C0 RET NZ ; INVALID DRIVE ERROR -1175 E983 -1176 E983 ; VALID DRIVE, DISPATCH TO DRIVER -1177 E983 4A LD C,D ; C := DEVICE/UNIT -1178 E984 06 12 LD B,BF_DIOST ; B := FUNCTION: STATUS -1179 E986 CF RST 08 -1180 E987 C9 RET -1181 E988 #ENDIF -1182 E988 ; -1183 E988 ; -1184 E988 ; -1185 E988 DSK_READ: -1186 E988 ; SET B = FUNCTION: READ -1187 E988 06 10 LD B,BF_DIORD -1188 E98A 18 04 JR DSK_IO -1189 E98C ; -1190 E98C ; -1191 E98C ; -1192 E98C DSK_WRITE: -1193 E98C ; SET B = FUNCTION: WRITE -1194 E98C 06 11 LD B,BF_DIOWR -1195 E98E 18 00 JR DSK_IO -1196 E990 ; -1197 E990 ; -1198 E990 ; -1199 E990~ #IF (PLATFORM == PLT_UNA) -1200 E990~ -1201 E990~ DSK_IO: -1202 E990~ DSK_IO1: -1203 E990~ PUSH BC -1204 E990~ LD DE,(HSTTRK) ; GET TRACK INTO HL -1205 E990~ LD B,4 ; PREPARE TO LEFT SHIFT BY 4 BITS -1206 E990~ DSK_IO2: -1207 E990~ SLA E ; SHIFT DE LEFT BY 4 BITS -1208 E990~ RL D -1209 E990~ DJNZ DSK_IO2 ; LOOP TILL ALL BITS DONE -1210 E990~ LD A,(HSTSEC) ; GET THE SECTOR INTO A -1211 E990~ AND $0F ; GET RID OF TOP NIBBLE -1212 E990~ OR E ; COMBINE WITH E -1213 E990~ LD E,A ; BACK IN E -1214 E990~ LD HL,0 ; HL:DE NOW HAS SLICE RELATIVE LBA -1215 E990~ ; APPLY OFFSET NOW -1216 E990~ ; OFFSET IS EXPRESSED AS NUMBER OF BLOCKS * 256 TO OFFSET! -1217 E990~ LD A,(HSTOFF) ; LSB OF SLICE OFFSET TO A -1218 E990~ ADD A,D ; ADD WITH D -1219 E990~ LD D,A ; PUT IT BACK IN D -1220 E990~ LD A,(HSTOFF+1) ; MSB OF SLICE OFFSET TO A -1221 E990~ CALL ADDHLA ; ADD OFFSET -1222 E990~ POP BC ; RECOVER FUNCTION IN B -1223 E990~ LD A,(HSTDU) ; GET THE DEVICE/UNIT VALUE -1224 E990~ LD C,A ; PUT IT IN C -1225 E990~ ; DISPATCH TO DRIVER -1226 E990~ PUSH BC -1227 E990~ EX DE,HL ; DE:HL NOW HAS LBA -1228 E990~ LD B,C ; UNIT TO B -1229 E990~ LD C,$41 ; UNA SET LBA -1230 E990~ RST 08 ; CALL UNA -1231 E990~ CALL NZ,PANIC -1232 E990~ POP BC ; RECOVER B=FUNC, C=UNIT -1233 E990~ LD E,C ; UNIT TO E -1234 E990~ LD C,B ; FUNC TO C -1235 E990~ LD B,E ; UNIT TO B -1236 E990~ LD DE,(BUFADR) ; SET BUFFER ADDRESS -1237 E990~ LD HL,1 ; 1 SECTOR -1238 E990~ -1239 E990~ RST 08 -1240 E990~ CALL NZ,PANIC -1241 E990~ XOR A ; SET FLAGS BASED ON RESULT -1242 E990~ RET -1243 E990~ -1244 E990 #ELSE -1245 E990 -1246 E990 DSK_IO: -1247 E990 3A BF EB LD A,(HSTDU) ; GET ACTIVE DEVICE/UNIT BYTE -1248 E993 E6 F0 AND $F0 ; ISOLATE DEVICE PORTION -1249 E995 FE 10 CP DIODEV_FD ; FLOPPY? -1250 E997 20 13 JR NZ,DSK_IO1 ; NO, USE LBA HANDLING -1251 E999 ; SET HL=TRACK (ADD IN TRACK OFFSET) -1252 E999 ED 5B C2 EB LD DE,(HSTOFF) ; DE = TRACK OFFSET FOR LU SUPPORT -1253 E99D 2A BB EB LD HL,(HSTTRK) ; HL = TRACK # -1254 E9A0 19 ADD HL,DE ; APPLY OFFSET FOR ACTIVE SLICE -1255 E9A1 ; SET DE=SECTOR -1256 E9A1 ED 5B BD EB LD DE,(HSTSEC) ; DE = SECTOR # -1257 E9A5 ; SET C = DEVICE/UNIT -1258 E9A5 3A BF EB LD A,(HSTDU) ; LOAD DEVICE/UNIT VALUE -1259 E9A8 4F LD C,A ; SAVE IN C -1260 E9A9 ; DISPATCH TO DRIVER -1261 E9A9 CF RST 08 -1262 E9AA B7 OR A ; SET FLAGS BASED ON RESULT -1263 E9AB C9 RET -1264 E9AC ; NEW LBA HANDLING -1265 E9AC ; COERCE TRACK/SECTOR INTO HL:DE AS 0000:TTTS -1266 E9AC DSK_IO1: -1267 E9AC C5 PUSH BC -1268 E9AD ED 5B BB EB LD DE,(HSTTRK) ; GET TRACK INTO HL -1269 E9B1 06 04 LD B,4 ; PREPARE TO LEFT SHIFT BY 4 BITS -1270 E9B3 DSK_IO2: -1271 E9B3 CB 23 SLA E ; SHIFT DE LEFT BY 4 BITS -1272 E9B5 CB 12 RL D -1273 E9B7 10 FA DJNZ DSK_IO2 ; LOOP TILL ALL BITS DONE -1274 E9B9 3A BD EB LD A,(HSTSEC) ; GET THE SECTOR INTO A -1275 E9BC E6 0F AND $0F ; GET RID OF TOP NIBBLE -1276 E9BE B3 OR E ; COMBINE WITH E -1277 E9BF 5F LD E,A ; BACK IN E -1278 E9C0 21 00 00 LD HL,0 ; HL:DE NOW HAS SLICE RELATIVE LBA -1279 E9C3 ; APPLY OFFSET NOW -1280 E9C3 ; OFFSET IS EXPRESSED AS NUMBER OF BLOCKS * 256 TO OFFSET! -1281 E9C3 3A C2 EB LD A,(HSTOFF) ; LSB OF SLICE OFFSET TO A -1282 E9C6 82 ADD A,D ; ADD WITH D -1283 E9C7 57 LD D,A ; PUT IT BACK IN D -1284 E9C8 3A C3 EB LD A,(HSTOFF+1) ; MSB OF SLICE OFFSET TO A -1285 E9CB CD 0B EB CALL ADDHLA ; ADD OFFSET -1286 E9CE C1 POP BC ; RECOVER FUNCTION IN B -1287 E9CF 3A BF EB LD A,(HSTDU) ; GET THE DEVICE/UNIT VALUE -1288 E9D2 4F LD C,A ; PUT IT IN C -1289 E9D3 ; DISPATCH TO DRIVER -1290 E9D3 CF RST 08 -1291 E9D4 B7 OR A ; SET FLAGS BASED ON RESULT -1292 E9D5 C9 RET -1293 E9D6 -1294 E9D6 #ENDIF -1295 E9D6 ; -1296 E9D6 ;================================================================================================== -1297 E9D6 ; UTILITY FUNCTIONS -1298 E9D6 ;================================================================================================== -1299 E9D6 ; -1300 E9D6 #DEFINE CIOMODE_CBIOS -1301 E9D6 ORG_UTIL .EQU $ -1302 E9D6 #INCLUDE "util.asm" -0001+ E9D6 ; -0002+ E9D6 ;================================================================================================== -0003+ E9D6 ; UTILITY FUNCTIONS -0004+ E9D6 ;================================================================================================== -0005+ E9D6 ; -0006+ E9D6 ; -0007+ E9D6 CHR_CR .EQU 0DH -0008+ E9D6 CHR_LF .EQU 0AH -0009+ E9D6 CHR_BS .EQU 08H -0010+ E9D6 CHR_ESC .EQU 1BH -0011+ E9D6 ; -0012+ E9D6 ;__________________________________________________________________________________________________ -0013+ E9D6 ; -0014+ E9D6 ; UTILITY PROCS TO PRINT SINGLE CHARACTERS WITHOUT TRASHING ANY REGISTERS -0015+ E9D6 ; -0016+ E9D6 PC_SPACE: -0017+ E9D6 F5 PUSH AF -0018+ E9D7 3E 20 LD A,' ' -0019+ E9D9 18 3C JR PC_PRTCHR -0020+ E9DB -0021+ E9DB PC_PERIOD: -0022+ E9DB F5 PUSH AF -0023+ E9DC 3E 2E LD A,'.' -0024+ E9DE 18 37 JR PC_PRTCHR -0025+ E9E0 -0026+ E9E0 PC_COLON: -0027+ E9E0 F5 PUSH AF -0028+ E9E1 3E 3A LD A,':' -0029+ E9E3 18 32 JR PC_PRTCHR -0030+ E9E5 -0031+ E9E5 PC_COMMA: -0032+ E9E5 F5 PUSH AF -0033+ E9E6 3E 2C LD A,',' -0034+ E9E8 18 2D JR PC_PRTCHR -0035+ E9EA -0036+ E9EA PC_LBKT: -0037+ E9EA F5 PUSH AF -0038+ E9EB 3E 5B LD A,'[' -0039+ E9ED 18 28 JR PC_PRTCHR -0040+ E9EF -0041+ E9EF PC_RBKT: -0042+ E9EF F5 PUSH AF -0043+ E9F0 3E 5D LD A,']' -0044+ E9F2 18 23 JR PC_PRTCHR -0045+ E9F4 -0046+ E9F4 PC_LT: -0047+ E9F4 F5 PUSH AF -0048+ E9F5 3E 3C LD A,'<' -0049+ E9F7 18 1E JR PC_PRTCHR -0050+ E9F9 -0051+ E9F9 PC_GT: -0052+ E9F9 F5 PUSH AF -0053+ E9FA 3E 3E LD A,'>' -0054+ E9FC 18 19 JR PC_PRTCHR -0055+ E9FE -0056+ E9FE PC_LPAREN: -0057+ E9FE F5 PUSH AF -0058+ E9FF 3E 28 LD A,'(' -0059+ EA01 18 14 JR PC_PRTCHR -0060+ EA03 -0061+ EA03 PC_RPAREN: -0062+ EA03 F5 PUSH AF -0063+ EA04 3E 29 LD A,')' -0064+ EA06 18 0F JR PC_PRTCHR -0065+ EA08 -0066+ EA08 PC_ASTERISK: -0067+ EA08 F5 PUSH AF -0068+ EA09 3E 2A LD A,'*' -0069+ EA0B 18 0A JR PC_PRTCHR -0070+ EA0D -0071+ EA0D PC_CR: -0072+ EA0D F5 PUSH AF -0073+ EA0E 3E 0D LD A,CHR_CR -0074+ EA10 18 05 JR PC_PRTCHR -0075+ EA12 -0076+ EA12 PC_LF: -0077+ EA12 F5 PUSH AF -0078+ EA13 3E 0A LD A,CHR_LF -0079+ EA15 18 00 JR PC_PRTCHR -0080+ EA17 -0081+ EA17 PC_PRTCHR: -0082+ EA17 CD B6 EA CALL COUT -0083+ EA1A F1 POP AF -0084+ EA1B C9 RET -0085+ EA1C -0086+ EA1C NEWLINE: -0087+ EA1C CD 0D EA CALL PC_CR -0088+ EA1F CD 12 EA CALL PC_LF -0089+ EA22 C9 RET -0090+ EA23 ; -0091+ EA23 ; PRINT THE HEX BYTE VALUE IN A -0092+ EA23 ; -0093+ EA23 PRTHEXBYTE: -0094+ EA23 F5 PUSH AF -0095+ EA24 D5 PUSH DE -0096+ EA25 CD 3E EA CALL HEXASCII -0097+ EA28 7A LD A,D -0098+ EA29 CD B6 EA CALL COUT -0099+ EA2C 7B LD A,E -0100+ EA2D CD B6 EA CALL COUT -0101+ EA30 D1 POP DE -0102+ EA31 F1 POP AF -0103+ EA32 C9 RET -0104+ EA33 ; -0105+ EA33 ; PRINT THE HEX WORD VALUE IN BC -0106+ EA33 ; -0107+ EA33 PRTHEXWORD: -0108+ EA33 F5 PUSH AF -0109+ EA34 78 LD A,B -0110+ EA35 CD 23 EA CALL PRTHEXBYTE -0111+ EA38 79 LD A,C -0112+ EA39 CD 23 EA CALL PRTHEXBYTE -0113+ EA3C F1 POP AF -0114+ EA3D C9 RET -0115+ EA3E ; -0116+ EA3E ; CONVERT BINARY VALUE IN A TO ASCII HEX CHARACTERS IN DE -0117+ EA3E ; -0118+ EA3E HEXASCII: -0119+ EA3E 57 LD D,A -0120+ EA3F CD 4D EA CALL HEXCONV -0121+ EA42 5F LD E,A -0122+ EA43 7A LD A,D -0123+ EA44 07 RLCA -0124+ EA45 07 RLCA -0125+ EA46 07 RLCA -0126+ EA47 07 RLCA -0127+ EA48 CD 4D EA CALL HEXCONV -0128+ EA4B 57 LD D,A -0129+ EA4C C9 RET -0130+ EA4D ; -0131+ EA4D ; CONVERT LOW NIBBLE OF A TO ASCII HEX -0132+ EA4D ; -0133+ EA4D HEXCONV: -0134+ EA4D E6 0F AND 0FH ;LOW NIBBLE ONLY -0135+ EA4F C6 90 ADD A,90H -0136+ EA51 27 DAA -0137+ EA52 CE 40 ADC A,40H -0138+ EA54 27 DAA -0139+ EA55 C9 RET -0140+ EA56 ; -0141+ EA56 ; OUTPUT A '$' TERMINATED STRING -0142+ EA56 ; -0143+ EA56 WRITESTR: -0144+ EA56 F5 PUSH AF -0145+ EA57 WRITESTR1: -0146+ EA57 1A LD A,(DE) -0147+ EA58 FE 24 CP '$' ; TEST FOR STRING TERMINATOR -0148+ EA5A CA 64 EA JP Z,WRITESTR2 -0149+ EA5D CD B6 EA CALL COUT -0150+ EA60 13 INC DE -0151+ EA61 C3 57 EA JP WRITESTR1 -0152+ EA64 WRITESTR2: -0153+ EA64 F1 POP AF -0154+ EA65 C9 RET -0155+ EA66 ; -0156+ EA66 ; PANIC: TRY TO DUMP MACHINE STATE AND HALT -0157+ EA66 ; -0158+ EA66 PANIC: -0159+ EA66 E5 PUSH HL -0160+ EA67 D5 PUSH DE -0161+ EA68 C5 PUSH BC -0162+ EA69 F5 PUSH AF -0163+ EA6A 11 D7 EA LD DE,STR_PANIC -0164+ EA6D CD 56 EA CALL WRITESTR -0165+ EA70 11 EC EA LD DE,STR_AF -0166+ EA73 CD 56 EA CALL WRITESTR -0167+ EA76 C1 POP BC ; AF -0168+ EA77 CD 33 EA CALL PRTHEXWORD -0169+ EA7A 11 F1 EA LD DE,STR_BC -0170+ EA7D CD 56 EA CALL WRITESTR -0171+ EA80 C1 POP BC ; BC -0172+ EA81 CD 33 EA CALL PRTHEXWORD -0173+ EA84 11 F6 EA LD DE,STR_DE -0174+ EA87 CD 56 EA CALL WRITESTR -0175+ EA8A C1 POP BC ; DE -0176+ EA8B CD 33 EA CALL PRTHEXWORD -0177+ EA8E 11 FB EA LD DE,STR_HL -0178+ EA91 CD 56 EA CALL WRITESTR -0179+ EA94 C1 POP BC ; HL -0180+ EA95 CD 33 EA CALL PRTHEXWORD -0181+ EA98 11 00 EB LD DE,STR_PC -0182+ EA9B CD 56 EA CALL WRITESTR -0183+ EA9E C1 POP BC ; PC -0184+ EA9F CD 33 EA CALL PRTHEXWORD -0185+ EAA2 11 05 EB LD DE,STR_SP -0186+ EAA5 CD 56 EA CALL WRITESTR -0187+ EAA8 21 00 00 LD HL,0 -0188+ EAAB 39 ADD HL,SP ; SP -0189+ EAAC 44 LD B,H -0190+ EAAD 4D LD C,L -0191+ EAAE CD 33 EA CALL PRTHEXWORD -0192+ EAB1 -0193+ EAB1 FF RST 38 -0194+ EAB2 -0195+ EAB2 76 HALT -0196+ EAB3 -0197+ EAB3 C3 00 00 JP 0 -0198+ EAB6 ; -0199+ EAB6 ;================================================================================================== -0200+ EAB6 ; CONSOLE CHARACTER I/O HELPER ROUTINES (REGISTERS PRESERVED) -0201+ EAB6 ;================================================================================================== -0202+ EAB6 ; -0203+ EAB6 ; OUTPUT CHARACTER FROM A -0204+ EAB6 COUT: -0205+ EAB6 F5 PUSH AF -0206+ EAB7 C5 PUSH BC -0207+ EAB8 D5 PUSH DE -0208+ EAB9 E5 PUSH HL -0209+ EABA 4F LD C,A -0210+ EABB CD 0C E6 CALL CBIOS_CONOUT -0211+ EABE E1 POP HL -0212+ EABF D1 POP DE -0213+ EAC0 C1 POP BC -0214+ EAC1 F1 POP AF -0215+ EAC2 C9 RET -0216+ EAC3 ; -0217+ EAC3 ; INPUT CHARACTER TO A -0218+ EAC3 ; -0219+ EAC3 CIN: -0220+ EAC3 C5 PUSH BC -0221+ EAC4 D5 PUSH DE -0222+ EAC5 E5 PUSH HL -0223+ EAC6 CD 09 E6 CALL CBIOS_CONIN -0224+ EAC9 E1 POP HL -0225+ EACA D1 POP DE -0226+ EACB C1 POP BC -0227+ EACC C9 RET -0228+ EACD ; -0229+ EACD ; RETURN INPUT STATUS IN A (0 = NO CHAR, !=0 CHAR WAITING) -0230+ EACD ; -0231+ EACD CST: -0232+ EACD C5 PUSH BC -0233+ EACE D5 PUSH DE -0234+ EACF E5 PUSH HL -0235+ EAD0 CD 06 E6 CALL CBIOS_CONST -0236+ EAD3 E1 POP HL -0237+ EAD4 D1 POP DE -0238+ EAD5 C1 POP BC -0239+ EAD6 C9 RET -0240+ EAD7 ; -0241+ EAD7 0D 0A 0D 0A STR_PANIC .DB "\r\n\r\n>>> FATAL ERROR:$" -0241+ EADB 3E 3E 3E 20 -0241+ EADF 46 41 54 41 -0241+ EAE3 4C 20 45 52 -0241+ EAE7 52 4F 52 3A -0241+ EAEB 24 -0242+ EAEC 20 41 46 3D STR_AF .DB " AF=$" -0242+ EAF0 24 -0243+ EAF1 20 42 43 3D STR_BC .DB " BC=$" -0243+ EAF5 24 -0244+ EAF6 20 44 45 3D STR_DE .DB " DE=$" -0244+ EAFA 24 -0245+ EAFB 20 48 4C 3D STR_HL .DB " HL=$" -0245+ EAFF 24 -0246+ EB00 20 50 43 3D STR_PC .DB " PC=$" -0246+ EB04 24 -0247+ EB05 20 53 50 3D STR_SP .DB " SP=$" -0247+ EB09 24 -0248+ EB0A ; -0249+ EB0A ; INDIRECT JUMP TO ADDRESS IN HL -0250+ EB0A ; -0251+ EB0A ; MOSTLY USEFUL TO PERFORM AN INDIRECT CALL LIKE: -0252+ EB0A ; LD HL,xxxx -0253+ EB0A ; CALL JPHL -0254+ EB0A ; -0255+ EB0A E9 JPHL: JP (HL) -0256+ EB0B ; -0257+ EB0B ; ADD HL,A -0258+ EB0B ; -0259+ EB0B ; A REGISTER IS DESTROYED! -0260+ EB0B ; -0261+ EB0B -0262+ EB0B ADDHLA: -0263+ EB0B 85 ADD A,L -0264+ EB0C 6F LD L,A -0265+ EB0D D0 RET NC -0266+ EB0E 24 INC H -0267+ EB0F C9 RET -0268+ EB10 ; -0269+ EB10 ; MULTIPLY 8-BIT VALUES -0270+ EB10 ; IN: MULTIPLY H BY E -0271+ EB10 ; OUT: HL = RESULT, E = 0, B = 0 -0272+ EB10 ; -0273+ EB10 MULT8: -0274+ EB10 16 00 LD D,0 -0275+ EB12 6A LD L,D -0276+ EB13 06 08 LD B,8 -0277+ EB15 MULT8_LOOP: -0278+ EB15 29 ADD HL,HL -0279+ EB16 30 01 JR NC,MULT8_NOADD -0280+ EB18 19 ADD HL,DE -0281+ EB19 MULT8_NOADD: -0282+ EB19 10 FA DJNZ MULT8_LOOP -0283+ EB1B C9 RET -0284+ EB1C ; -0285+ EB1C ; FILL MEMORY AT HL WITH VALUE A, LENGTH IN BC, ALL REGS USED -0286+ EB1C ; LENGTH *MSUT* BE GREATER THAN 1 FOR PROPER OPERATION!!! -0287+ EB1C ; -0288+ EB1C FILL: -0289+ EB1C 54 LD D,H ; SET DE TO HL -0290+ EB1D 5D LD E,L ; SO DESTINATION EQUALS SOURCE -0291+ EB1E 77 LD (HL),A ; FILL THE FIRST BYTE WITH DESIRED VALUE -0292+ EB1F 13 INC DE ; INCREMENT DESTINATION -0293+ EB20 0B DEC BC ; DECREMENT THE COUNT -0294+ EB21 ED B0 LDIR ; DO THE REST -0295+ EB23 C9 RET ; RETURN -0296+ EB24 ; -0297+ EB24 ; SET A BIT IN BYTE ARRAY AT HL, INDEX IN A -0298+ EB24 ; -0299+ EB24 BITSET: -0300+ EB24 CD 36 EB CALL BITLOC ; LOCATE THE BIT -0301+ EB27 B6 OR (HL) ; SET THE SPECIFIED BIT -0302+ EB28 77 LD (HL),A ; SAVE IT -0303+ EB29 C9 RET ; RETURN -0304+ EB2A ; -0305+ EB2A ; CLEAR A BIT IN BYTE ARRAY AT HL, INDEX IN A -0306+ EB2A ; -0307+ EB2A BITCLR: -0308+ EB2A CD 36 EB CALL BITLOC ; LOCATE THE BIT -0309+ EB2D 2F CPL ; INVERT ALL BITS -0310+ EB2E A6 AND (HL) ; CLEAR SPECIFIED BIT -0311+ EB2F 77 LD (HL),A ; SAVE IT -0312+ EB30 C9 RET ; RETURN -0313+ EB31 ; -0314+ EB31 ; GET VALUE OF A BIT IN BYTE ARRAY AT HL, INDEX IN A -0315+ EB31 ; -0316+ EB31 BITTST: -0317+ EB31 CD 36 EB CALL BITLOC ; LOCATE THE BIT -0318+ EB34 A6 AND (HL) ; SET Z FLAG BASED ON BIT -0319+ EB35 C9 RET ; RETURN -0320+ EB36 ; -0321+ EB36 ; LOCATE A BIT IN BYTE ARRAY AT HL, INDEX IN A -0322+ EB36 ; RETURN WITH HL POINTING TO BYTE AND A WITH MASK FOR SPECIFIC BIT -0323+ EB36 ; -0324+ EB36 BITLOC: -0325+ EB36 F5 PUSH AF ; SAVE BIT INDEX -0326+ EB37 CB 3F SRL A ; DIVIDE BY 8 TO GET BYTE INDEX -0327+ EB39 CB 3F SRL A ; " -0328+ EB3B CB 3F SRL A ; " -0329+ EB3D 4F LD C,A ; MOVE TO BC -0330+ EB3E 06 00 LD B,0 ; " -0331+ EB40 09 ADD HL,BC ; HL NOW POINTS TO BYTE CONTAINING BIT -0332+ EB41 F1 POP AF ; RECOVER A (INDEX) -0333+ EB42 E6 07 AND $07 ; ISOLATE REMAINDER, Z SET IF ZERO -0334+ EB44 47 LD B,A ; SETUP SHIFT COUNTER -0335+ EB45 3E 01 LD A,1 ; SETUP A WITH MASK -0336+ EB47 C8 RET Z ; DONE IF ZERO -0337+ EB48 BITLOC1: -0338+ EB48 CB 27 SLA A ; SHIFT -0339+ EB4A 10 FC DJNZ BITLOC1 ; LOOP AS NEEDED -0340+ EB4C C9 RET ; DONE -0341+ EB4D ; -0342+ EB4D ; PRINT VALUE OF A IN DECIMAL WITH LEADING ZERO SUPPRESSION -0343+ EB4D ; -0344+ EB4D PRTDECB: -0345+ EB4D E5 PUSH HL -0346+ EB4E F5 PUSH AF -0347+ EB4F 6F LD L,A -0348+ EB50 26 00 LD H,0 -0349+ EB52 CD 58 EB CALL PRTDEC -0350+ EB55 F1 POP AF -0351+ EB56 E1 POP HL -0352+ EB57 C9 RET -0353+ EB58 ; -0354+ EB58 ; PRINT VALUE OF HL IN DECIMAL WITH LEADING ZERO SUPPRESSION -0355+ EB58 ; -0356+ EB58 PRTDEC: -0357+ EB58 C5 PUSH BC -0358+ EB59 D5 PUSH DE -0359+ EB5A E5 PUSH HL -0360+ EB5B 1E 30 LD E,'0' -0361+ EB5D 01 F0 D8 LD BC,-10000 -0362+ EB60 CD 7F EB CALL PRTDEC1 -0363+ EB63 01 18 FC LD BC,-1000 -0364+ EB66 CD 7F EB CALL PRTDEC1 -0365+ EB69 01 9C FF LD BC,-100 -0366+ EB6C CD 7F EB CALL PRTDEC1 -0367+ EB6F 0E F6 LD C,-10 -0368+ EB71 CD 7F EB CALL PRTDEC1 -0369+ EB74 1E 00 LD E,0 -0370+ EB76 0E FF LD C,-1 -0371+ EB78 CD 7F EB CALL PRTDEC1 -0372+ EB7B E1 POP HL -0373+ EB7C D1 POP DE -0374+ EB7D C1 POP BC -0375+ EB7E C9 RET -0376+ EB7F PRTDEC1: -0377+ EB7F 3E 2F LD A,'0' - 1 -0378+ EB81 PRTDEC2: -0379+ EB81 3C INC A -0380+ EB82 09 ADD HL,BC -0381+ EB83 38 FC JR C,PRTDEC2 -0382+ EB85 ED 42 SBC HL,BC -0383+ EB87 BB CP E -0384+ EB88 28 05 JR Z,PRTDEC3 -0385+ EB8A 1E 00 LD E,0 -0386+ EB8C CD B6 EA CALL COUT -0387+ EB8F PRTDEC3: -0388+ EB8F C9 RET -0389+ EB90 ; -0390+ EB90 ;================================================================================================== -0391+ EB90 ; DATA -0392+ EB90 ;================================================================================================== -0393+ EB90 ; -0394+ EB90 3C 45 4D 50 STR_EMPTY .TEXT "$" -0394+ EB94 54 59 3E 24 -1303 EB98 SIZ_UTIL .EQU $ - ORG_UTIL -1304 EB98 .ECHO "UTIL occupies " -1305 EB98 .ECHO SIZ_UTIL -1306 EB98 .ECHO " bytes.\n" -1307 EB98 ; -1308 EB98 ;================================================================================================== -1309 EB98 ; DIAGNOSTICS -1310 EB98 ;================================================================================================== -1311 EB98 ; -1312 EB98~ #IF DSKTRACE -1313 EB98~ ;__________________________________________________________________________________________________ -1314 EB98~ PRTSELDSK: -1315 EB98~ CALL NEWLINE -1316 EB98~ PUSH BC -1317 EB98~ PUSH DE -1318 EB98~ LD B,E -1319 EB98~ LD DE,STR_SELDSK -1320 EB98~ CALL WRITESTR -1321 EB98~ CALL PC_SPACE -1322 EB98~ LD DE,STR_DSK -1323 EB98~ LD A,C -1324 EB98~ CALL PRTHEXBYTE -1325 EB98~ CALL PC_SPACE -1326 EB98~ CALL PC_LBKT -1327 EB98~ LD A,B -1328 EB98~ CALL PRTHEXBYTE -1329 EB98~ CALL PC_RBKT -1330 EB98~ POP DE -1331 EB98~ POP BC -1332 EB98~ RET -1333 EB98~ ; -1334 EB98~ ;__________________________________________________________________________________________________ -1335 EB98~ PRTHOME: -1336 EB98~ CALL NEWLINE -1337 EB98~ LD DE,STR_HOME -1338 EB98~ CALL WRITESTR -1339 EB98~ RET -1340 EB98~ ; -1341 EB98~ ;__________________________________________________________________________________________________ -1342 EB98~ PRTDSKOP: -1343 EB98~ -1344 EB98~ LD (XSTKSAV),SP -1345 EB98~ LD SP,XSTK -1346 EB98~ -1347 EB98~ CALL NEWLINE -1348 EB98~ LD A,(DSKOP) -1349 EB98~ LD DE,STR_READ -1350 EB98~ CP DOP_READ -1351 EB98~ CALL Z,WRITESTR -1352 EB98~ LD DE,STR_WRITE -1353 EB98~ CP DOP_WRITE -1354 EB98~ CALL Z,WRITESTR -1355 EB98~ LD A,C -1356 EB98~ CALL Z,PRTHEXBYTE -1357 EB98~ LD DE,STR_DSK -1358 EB98~ CALL WRITESTR -1359 EB98~ LD A,(SEKDSK) -1360 EB98~ CALL PRTHEXBYTE -1361 EB98~ LD DE,STR_TRK -1362 EB98~ CALL WRITESTR -1363 EB98~ LD BC,(SEKTRK) -1364 EB98~ CALL PRTHEXWORD -1365 EB98~ LD DE,STR_SEC -1366 EB98~ CALL WRITESTR -1367 EB98~ LD BC,(SEKSEC) -1368 EB98~ CALL PRTHEXWORD -1369 EB98~ -1370 EB98~ LD SP,(XSTKSAV) -1371 EB98~ -1372 EB98~ RET -1373 EB98~ -1374 EB98~ RET -1375 EB98~ -1376 EB98~ XSTKSAV .DW 0 -1377 EB98~ .FILL $20 -1378 EB98~ XSTK .EQU $ -1379 EB98~ ; -1380 EB98~ STR_SELDSK .DB "SELDSK$" -1381 EB98~ STR_HOME .DB "HOME$" -1382 EB98~ STR_READ .DB "READ$" -1383 EB98~ STR_WRITE .DB "WRITE$" -1384 EB98~ STR_DSK .DB " DSK=$" -1385 EB98~ STR_TRK .DB " TRK=$" -1386 EB98~ STR_SEC .DB " SEC=$" -1387 EB98~ ; -1388 EB98 #ENDIF -1389 EB98 ; -1390 EB98 ;================================================================================================== -1391 EB98 ; DATA -1392 EB98 ;================================================================================================== -1393 EB98 ; -1394 EB98 ;STR_READONLY .DB "\r\nCBIOS Err: Read Only Drive$" -1395 EB98 ;STR_STALE .DB "\r\nCBIOS Err: Stale Drive$" -1396 EB98 ; -1397 EB98 00 00 SECADR .DW 0 ; ADDRESS OF SECTOR IN ROM/RAM PAGE -1398 EB9A 00 DEFDRIVE .DB 0 ; DEFAULT DRIVE -1399 EB9B 00 70 CCPBUF .DW $7000 ; ADDRESS OF CCP BUF IN BIOS BANK -1400 EB9D ; -1401 EB9D ; DOS DISK VARIABLES -1402 EB9D ; -1403 EB9D 00 DSKOP: .DB 0 ; DISK OPERATION (DOP_READ/DOP_WRITE) -1404 EB9E 00 WRTYPE: .DB 0 ; WRITE TYPE (0=NORMAL, 1=DIR (FORCE), 2=FIRST RECORD OF BLOCK) -1405 EB9F 00 00 DMAADR: .DW 0 ; DIRECT MEMORY ADDRESS -1406 EBA1 00 HSTWRT: .DB 0 ; TRUE = BUFFER IS DIRTY -1407 EBA2 00 7C BUFADR: .DW $8000-$0400 ; ADDRESS OF PHYSICAL SECTOR BUFFER (DEFAULT MATCHES HBIOS) -1408 EBA4 ; -1409 EBA4 ; DISK I/O REQUEST PENDING -1410 EBA4 ; -1411 EBA4 SEK: -1412 EBA4 00 SEKDSK: .DB 0 ; DISK NUMBER 0-15 -1413 EBA5 00 00 SEKTRK: .DW 0 ; TWO BYTES FOR TRACK # (LOGICAL) -1414 EBA7 00 00 SEKSEC: .DW 0 ; TWO BYTES FOR SECTOR # (LOGICAL) -1415 EBA9 00 SEKDU: .DB 0 ; DEVICE/UNIT -1416 EBAA 00 00 SEKDPH: .DW 0 ; ADDRESS OF ACTIVE (SELECTED) DPH -1417 EBAC 00 00 SEKOFF: .DW 0 ; TRACK OFFSET IN EFFECT FOR LU -1418 EBAE 01 SEKACT: .DB TRUE ; ALWAYS TRUE! -1419 EBAF ; -1420 EBAF ; RESULT OF CPM TO PHYSICAL TRANSLATION -1421 EBAF ; -1422 EBAF XLT: -1423 EBAF 00 XLTDSK .DB 0 -1424 EBB0 00 00 XLTTRK .DW 0 -1425 EBB2 00 00 XLTSEC .DW 0 -1426 EBB4 00 XLTDU .DB 0 -1427 EBB5 00 00 XLTDPH .DW 0 -1428 EBB7 00 00 XLTOFF: .DW 0 -1429 EBB9 01 XLTACT .DB TRUE ; ALWAYS TRUE! -1430 EBBA ; -1431 EBBA XLTSIZ .EQU $ - XLT -1432 EBBA ; -1433 EBBA ; DSK/TRK/SEC IN BUFFER (VALID WHEN HSTACT=TRUE) -1434 EBBA ; -1435 EBBA HST: -1436 EBBA 00 HSTDSK .DB 0 ; DISK IN BUFFER -1437 EBBB 00 00 HSTTRK .DW 0 ; TRACK IN BUFFER -1438 EBBD 00 00 HSTSEC .DW 0 ; SECTOR IN BUFFER -1439 EBBF 00 HSTDU .DB 0 ; DEVICE/UNIT IN BUFFER -1440 EBC0 00 00 HSTDPH .DW 0 ; CURRENT DPH ADDRESS -1441 EBC2 00 00 HSTOFF .DW 0 ; TRACK OFFSET IN EFFECT FOR LU -1442 EBC4 00 HSTACT .DB 0 ; TRUE = BUFFER HAS VALID DATA -1443 EBC5 ; -1444 EBC5 ; SEQUENTIAL WRITE TRACKING FOR UNALLOCATED BLOCK -1445 EBC5 ; -1446 EBC5 UNA: -1447 EBC5 00 UNADSK: .DB 0 ; DISK NUMBER 0-15 -1448 EBC6 00 00 UNATRK: .DW 0 ; TWO BYTES FOR TRACK # (LOGICAL) -1449 EBC8 00 00 UNASEC: .DW 0 ; TWO BYTES FOR SECTOR # (LOGICAL) -1450 EBCA ; -1451 EBCA UNASIZ .EQU $ - UNA -1452 EBCA ; -1453 EBCA 00 UNACNT: .DB 0 ; COUNT DOWN UNALLOCATED RECORDS IN BLOCK -1454 EBCB 00 00 UNASPT: .DW 0 ; SECTORS PER TRACK -1455 EBCD ; -1456 EBCD ;================================================================================================== -1457 EBCD ; DISK CONTROL STRUCTURES (DPB, DPH) -1458 EBCD ;================================================================================================== -1459 EBCD ; -1460 EBCD RAMBLKS .EQU (((BID_RAMDN - BID_RAMD0 + 1) * 32) / 2) -1461 EBCD CKS_RAM .EQU 0 ; CKS: 0 FOR NON-REMOVABLE MEDIA -1462 EBCD ALS_RAM .EQU ((RAMBLKS + 7) / 8) ; ALS: BLKS / 8 (ROUNDED UP) -1463 EBCD ; -1464 EBCD ROMBLKS .EQU (((BID_ROMDN - BID_ROMD0 + 1) * 32) / 2) -1465 EBCD CKS_ROM .EQU 0 ; CKS: 0 FOR NON-REMOVABLE MEDIA -1466 EBCD ALS_ROM .EQU ((ROMBLKS + 7) / 8) ; ALS: BLKS / 8 (ROUNDED UP) -1467 EBCD ; -1468 EBCD CKS_FD .EQU 64 ; CKS: DIR ENT / 4 = 256 / 4 = 64 -1469 EBCD ALS_FD .EQU 128 ; ALS: BLKS / 8 = 1024 / 8 = 128 -1470 EBCD ; -1471 EBCD CKS_HD .EQU 0 ; CKS: 0 FOR NON-REMOVABLE MEDIA -1472 EBCD ALS_HD .EQU 256 ; ALS: BLKS / 8 = 2048 / 8 = 256 (ROUNDED UP) -1473 EBCD ; -1474 EBCD ; -1475 EBCD ; DISK PARAMETER BLOCKS -1476 EBCD ; -1477 EBCD ; BLS BSH BLM EXM (DSM<256) EXM (DSM>255) -1478 EBCD ; ---------- --- --- ------------- ------------- -1479 EBCD ; 1,024 3 7 0 N/A -1480 EBCD ; 2,048 4 15 1 0 -1481 EBCD ; 4,096 5 31 3 1 -1482 EBCD ; 8,192 6 63 7 3 -1483 EBCD ; 16,384 7 127 15 7 -1484 EBCD ; -1485 EBCD ; AL0/1: EACH BIT SET ALLOCATES A BLOCK OF DIR ENTRIES. EACH DIR ENTRY -1486 EBCD ; IS 32 BYTES. BIT COUNT = (((DRM + 1) * 32) / BLS) -1487 EBCD ; -1488 EBCD ; CKS = (DIR ENT / 4), ZERO FOR NON-REMOVABLE MEDIA -1489 EBCD ; -1490 EBCD ; ALS = TOTAL BLKS (DSM + 1) / 8 -1491 EBCD ;__________________________________________________________________________________________________ -1492 EBCD ; -1493 EBCD ; ROM DISK: 64 SECS/TRK (LOGICAL), 128 BYTES/SEC -1494 EBCD ; BLOCKSIZE (BLS) = 2K, DIRECTORY ENTRIES = 256 -1495 EBCD ; ROM DISK SIZE = TOTAL ROM - 32K RESERVED FOR SYSTEM USE -1496 EBCD ; -1497 EBCD 00 00 .DW CKS_ROM -1498 EBCF 18 00 .DW ALS_ROM -1499 EBD1 10 .DB (2048 / 128) ; RECORDS PER BLOCK (BLS / 128) -1500 EBD2 DPB_ROM: -1501 EBD2 40 00 .DW 64 ; SPT: SECTORS PER TRACK -1502 EBD4 04 .DB 4 ; BSH: BLOCK SHIFT FACTOR -1503 EBD5 0F .DB 15 ; BLM: BLOCK MASK -1504 EBD6 #IF ((ROMBLKS - 1) < 256) -1505 EBD6 01 .DB 1 ; EXM: EXTENT MASK -1506 EBD7~ #ELSE -1507 EBD7~ .DB 0 ; EXM: EXTENT MASK -1508 EBD7 #ENDIF -1509 EBD7 BF 00 .DW ROMBLKS - 1 ; DSM: TOTAL STORAGE IN BLOCKS - 1 -1510 EBD9 FF 00 .DW 255 ; DRM: DIR ENTRIES - 1 = 255 -1511 EBDB F0 .DB 11110000B ; AL0: DIR BLK BIT MAP, FIRST BYTE -1512 EBDC 00 .DB 00000000B ; AL1: DIR BLK BIT MAP, SECOND BYTE -1513 EBDD 00 00 .DW 0 ; CKS: ZERO FOR NON-REMOVABLE MEDIA -1514 EBDF 00 00 .DW 0 ; OFF: ROM DISK HAS NO SYSTEM AREA -1515 EBE1 ;__________________________________________________________________________________________________ -1516 EBE1 ; -1517 EBE1 ; RAM DISK: 64 SECS/TRK, 128 BYTES/SEC -1518 EBE1 ; BLOCKSIZE (BLS) = 2K, DIRECTORY ENTRIES = 256 -1519 EBE1 ; RAM DISK SIZE = TOTAL RAM - 64K RESERVED FOR SYSTEM USE -1520 EBE1 ; -1521 EBE1 00 00 .DW CKS_RAM -1522 EBE3 18 00 .DW ALS_RAM -1523 EBE5 10 .DB (2048 / 128) ; RECORDS PER BLOCK (BLS / 128) -1524 EBE6 DPB_RAM: -1525 EBE6 40 00 .DW 64 ; SPT: SECTORS PER TRACK -1526 EBE8 04 .DB 4 ; BSH: BLOCK SHIFT FACTOR -1527 EBE9 0F .DB 15 ; BLM: BLOCK MASK -1528 EBEA #IF ((RAMBLKS - 1) < 256) -1529 EBEA 01 .DB 1 ; EXM: EXTENT MASK -1530 EBEB~ #ELSE -1531 EBEB~ .DB 0 ; EXM: EXTENT MASK -1532 EBEB #ENDIF -1533 EBEB BF 00 .DW RAMBLKS - 1 ; DSM: TOTAL STORAGE IN BLOCKS - 1 -1534 EBED FF 00 .DW 255 ; DRM: DIR ENTRIES - 1 = 255 -1535 EBEF F0 .DB 11110000B ; AL0: DIR BLK BIT MAP, FIRST BYTE -1536 EBF0 00 .DB 00000000B ; AL1: DIR BLK BIT MAP, SECOND BYTE -1537 EBF1 00 00 .DW 0 ; CKS: ZERO FOR NON-REMOVABLE MEDIA -1538 EBF3 00 00 .DW 0 ; OFF: RESERVED TRACKS = 0 TRK -1539 EBF5 ;__________________________________________________________________________________________________ -1540 EBF5 ; -1541 EBF5 ; 4MB RAM FLOPPY DRIVE, 32 TRKS, 1024 SECS/TRK, 128 BYTES/SEC -1542 EBF5 ; BLOCKSIZE (BLS) = 2K, DIRECTORY ENTRIES = 256 -1543 EBF5 ; SEC/TRK ENGINEERED SO THAT AFTER DEBLOCKING, SECTOR NUMBER OCCUPIES 1 BYTE (0-255) -1544 EBF5 ; -1545 EBF5 00 00 .DW CKS_HD -1546 EBF7 00 01 .DW ALS_HD -1547 EBF9 10 .DB (2048 / 128) ; RECORDS PER BLOCK (BLS / 128) -1548 EBFA DPB_RF: -1549 EBFA 00 04 .DW 1024 ; SPT: SECTORS PER TRACK -1550 EBFC 04 .DB 4 ; BSH: BLOCK SHIFT FACTOR -1551 EBFD 0F .DB 15 ; BLM: BLOCK MASK -1552 EBFE 00 .DB 0 ; EXM: EXTENT MASK -1553 EBFF FF 07 .DW 2047 ; DSM: TOTAL STORAGE IN BLOCKS - 1 BLK = (4MB / 2K BLS) - 1 = 2047 -1554 EC01 FF 00 .DW 255 ; DRM: DIR ENTRIES - 1 = 256 - 1 = 255 -1555 EC03 F0 .DB 11110000B ; AL0: DIR BLK BIT MAP, FIRST BYTE -1556 EC04 00 .DB 00000000B ; AL1: DIR BLK BIT MAP, SECOND BYTE -1557 EC05 00 00 .DW 0 ; CKS: ZERO FOR NON-REMOVABLE MEDIA -1558 EC07 00 00 .DW 0 ; OFF: RESERVED TRACKS = 0 TRK -1559 EC09 ;__________________________________________________________________________________________________ -1560 EC09 ; -1561 EC09 ; GENERIC HARD DISK DRIVE (8MB DATA SPACE + 128K RESERVED SPACE) -1562 EC09 ; LOGICAL: 1040 TRKS (16 RESERVED), 64 SECS/TRK, 128 BYTES/SEC -1563 EC09 ; PHYSICAL: 65 CYLS (1 RESERVED), 16 HEADS/CYL, 16 SECS/TRK, 512 BYTES/SEC -1564 EC09 ; BLOCKSIZE (BLS) = 4K, DIRECTORY ENTRIES = 512 -1565 EC09 ; -1566 EC09 00 00 .DW CKS_HD -1567 EC0B 00 01 .DW ALS_HD -1568 EC0D 20 .DB (4096 / 128) ; RECORDS PER BLOCK (BLS / 128) -1569 EC0E DPB_HD: -1570 EC0E 40 00 .DW 64 ; SPT: SECTORS PER TRACK -1571 EC10 05 .DB 5 ; BSH: BLOCK SHIFT FACTOR -1572 EC11 1F .DB 31 ; BLM: BLOCK MASK -1573 EC12 01 .DB 1 ; EXM: EXTENT MASK -1574 EC13 FF 07 .DW 2047 ; DSM: TOTAL STORAGE IN BLOCKS - 1 = (8MB / 4K BLS) - 1 = 2047 -1575 EC15 FF 01 .DW 511 ; DRM: DIR ENTRIES - 1 = 512 - 1 = 511 -1576 EC17 F0 .DB 11110000B ; AL0: DIR BLK BIT MAP, FIRST BYTE -1577 EC18 00 .DB 00000000B ; AL1: DIR BLK BIT MAP, SECOND BYTE -1578 EC19 00 00 .DW 0 ; CKS: DIRECTORY CHECK VECTOR SIZE = 256 / 4 -1579 EC1B 10 00 .DW 16 ; OFF: RESERVED TRACKS = 16 TRKS * (16 TRKS * 16 HEADS * 16 SECS * 512 BYTES) = 128K -1580 EC1D ;__________________________________________________________________________________________________ -1581 EC1D ; -1582 EC1D ; IBM 720KB 3.5" FLOPPY DRIVE, 80 TRKS, 36 SECS/TRK, 512 BYTES/SEC -1583 EC1D ; BLOCKSIZE (BLS) = 2K, DIRECTORY ENTRIES = 128 -1584 EC1D ; -1585 EC1D 40 00 .DW CKS_FD -1586 EC1F 80 00 .DW ALS_FD -1587 EC21 10 .DB (2048 / 128) ; RECORDS PER BLOCK (BLS / 128) -1588 EC22 DPB_FD720: -1589 EC22 24 00 .DW 36 ; SPT: SECTORS PER TRACK -1590 EC24 04 .DB 4 ; BSH: BLOCK SHIFT FACTOR -1591 EC25 0F .DB 15 ; BLM: BLOCK MASK -1592 EC26 00 .DB 0 ; EXM: EXTENT MASK -1593 EC27 5E 01 .DW 350 ; DSM: TOTAL STORAGE IN BLOCKS - 1 BLK = ((720K - 18K OFF) / 2K BLS) - 1 = 350 -1594 EC29 7F 00 .DW 127 ; DRM: DIR ENTRIES - 1 = 128 - 1 = 127 -1595 EC2B C0 .DB 11000000B ; AL0: DIR BLK BIT MAP, FIRST BYTE -1596 EC2C 00 .DB 00000000B ; AL1: DIR BLK BIT MAP, SECOND BYTE -1597 EC2D 20 00 .DW 32 ; CKS: DIRECTORY CHECK VECTOR SIZE = 128 / 4 -1598 EC2F 04 00 .DW 4 ; OFF: RESERVED TRACKS = 4 TRKS * (512 B/SEC * 36 SEC/TRK) = 18K -1599 EC31 ;__________________________________________________________________________________________________ -1600 EC31 ; -1601 EC31 ; IBM 1.44MB 3.5" FLOPPY DRIVE, 80 TRKS, 72 SECS/TRK, 512 BYTES/SEC -1602 EC31 ; BLOCKSIZE (BLS) = 2K, DIRECTORY ENTRIES = 256 -1603 EC31 ; -1604 EC31 40 00 .DW CKS_FD -1605 EC33 80 00 .DW ALS_FD -1606 EC35 10 .DB (2048 / 128) ; RECORDS PER BLOCK (BLS / 128) -1607 EC36 DPB_FD144: -1608 EC36 48 00 .DW 72 ; SPT: SECTORS PER TRACK -1609 EC38 04 .DB 4 ; BSH: BLOCK SHIFT FACTOR -1610 EC39 0F .DB 15 ; BLM: BLOCK MASK -1611 EC3A 00 .DB 0 ; EXM: EXTENT MASK -1612 EC3B C6 02 .DW 710 ; DSM: TOTAL STORAGE IN BLOCKS - 1 BLK = ((1,440K - 18K OFF) / 2K BLS) - 1 = 710 -1613 EC3D FF 00 .DW 255 ; DRM: DIR ENTRIES - 1 = 256 - 1 = 255 -1614 EC3F F0 .DB 11110000B ; AL0: DIR BLK BIT MAP, FIRST BYTE -1615 EC40 00 .DB 00000000B ; AL1: DIR BLK BIT MAP, SECOND BYTE -1616 EC41 40 00 .DW 64 ; CKS: DIRECTORY CHECK VECTOR SIZE = 256 / 4 -1617 EC43 02 00 .DW 2 ; OFF: RESERVED TRACKS = 2 TRKS * (512 B/SEC * 72 SEC/TRK) = 18K -1618 EC45 ;__________________________________________________________________________________________________ -1619 EC45 ; -1620 EC45 ; IBM 360KB 5.25" FLOPPY DRIVE, 40 TRKS, 9 SECS/TRK, 512 BYTES/SEC -1621 EC45 ; BLOCKSIZE (BLS) = 2K, DIRECTORY ENTRIES = 128 -1622 EC45 ; -1623 EC45 40 00 .DW CKS_FD -1624 EC47 80 00 .DW ALS_FD -1625 EC49 10 .DB (2048 / 128) ; RECORDS PER BLOCK (BLS / 128) -1626 EC4A DPB_FD360: -1627 EC4A 24 00 .DW 36 ; SPT: SECTORS PER TRACK -1628 EC4C 04 .DB 4 ; BSH: BLOCK SHIFT FACTOR -1629 EC4D 0F .DB 15 ; BLM: BLOCK MASK -1630 EC4E 01 .DB 1 ; EXM: EXTENT MASK -1631 EC4F AA 00 .DW 170 ; DSM: TOTAL STORAGE IN BLOCKS - 1 BLK = ((360K - 18K OFF) / 2K BLS) - 1 = 170 -1632 EC51 7F 00 .DW 127 ; DRM: DIR ENTRIES - 1 = 128 - 1 = 127 -1633 EC53 F0 .DB 11110000B ; AL0: DIR BLK BIT MAP, FIRST BYTE -1634 EC54 00 .DB 00000000B ; AL1: DIR BLK BIT MAP, SECOND BYTE -1635 EC55 20 00 .DW 32 ; CKS: DIRECTORY CHECK VECTOR SIZE = 128 / 4 -1636 EC57 04 00 .DW 4 ; OFF: RESERVED TRACKS = 4 TRKS * (512 B/SEC * 36 SEC/TRK) = 18K -1637 EC59 ;__________________________________________________________________________________________________ -1638 EC59 ; -1639 EC59 ; IBM 1.20MB 5.25" FLOPPY DRIVE, 80 TRKS, 15 SECS/TRK, 512 BYTES/SEC -1640 EC59 ; BLOCKSIZE (BLS) = 2K, DIRECTORY ENTRIES = 256 -1641 EC59 ; -1642 EC59 40 00 .DW CKS_FD -1643 EC5B 80 00 .DW ALS_FD -1644 EC5D 10 .DB (2048 / 128) ; RECORDS PER BLOCK (BLS / 128) -1645 EC5E DPB_FD120: -1646 EC5E 3C 00 .DW 60 ; SPT: SECTORS PER TRACK -1647 EC60 04 .DB 4 ; BSH: BLOCK SHIFT FACTOR -1648 EC61 0F .DB 15 ; BLM: BLOCK MASK -1649 EC62 00 .DB 0 ; EXM: EXTENT MASK -1650 EC63 4F 02 .DW 591 ; DSM: TOTAL STORAGE IN BLOCKS - 1 BLK = ((1,200K - 15K OFF) / 2K BLS) - 1 = 591 -1651 EC65 FF 00 .DW 255 ; DRM: DIR ENTRIES - 1 = 256 - 1 = 255 -1652 EC67 F0 .DB 11110000B ; AL0: DIR BLK BIT MAP, FIRST BYTE -1653 EC68 00 .DB 00000000B ; AL1: DIR BLK BIT MAP, SECOND BYTE -1654 EC69 40 00 .DW 64 ; CKS: DIRECTORY CHECK VECTOR SIZE = 256 / 4 -1655 EC6B 02 00 .DW 2 ; OFF: RESERVED TRACKS = 2 TRKS * (512 B/SEC * 60 SEC/TRK) = 15K -1656 EC6D ;__________________________________________________________________________________________________ -1657 EC6D ; -1658 EC6D ; IBM 1.11MB 8" FLOPPY DRIVE, 77 TRKS, 15 SECS/TRK, 512 BYTES/SEC -1659 EC6D ; BLOCKSIZE (BLS) = 2K, DIRECTORY ENTRIES = 256 -1660 EC6D ; -1661 EC6D 40 00 .DW CKS_FD -1662 EC6F 80 00 .DW ALS_FD -1663 EC71 10 .DB (2048 / 128) ; RECORDS PER BLOCK (BLS / 128) -1664 EC72 DPB_FD111: -1665 EC72 3C 00 .DW 60 ; SPT: SECTORS PER TRACK -1666 EC74 04 .DB 4 ; BSH: BLOCK SHIFT FACTOR -1667 EC75 0F .DB 15 ; BLM: BLOCK MASK -1668 EC76 00 .DB 0 ; EXM: EXTENT MASK -1669 EC77 39 02 .DW 569 ; DSM: TOTAL STORAGE IN BLOCKS - 1 BLK = ((1,155K - 15K OFF) / 2K BLS) - 1 = 569 -1670 EC79 FF 00 .DW 255 ; DRM: DIR ENTRIES - 1 = 256 - 1 = 255 -1671 EC7B F0 .DB 11110000B ; AL0: DIR BLK BIT MAP, FIRST BYTE -1672 EC7C 00 .DB 00000000B ; AL1: DIR BLK BIT MAP, SECOND BYTE -1673 EC7D 40 00 .DW 64 ; CKS: DIRECTORY CHECK VECTOR SIZE = 256 / 4 -1674 EC7F 02 00 .DW 2 ; OFF: RESERVED TRACKS = 2 TRKS * (512 B/SEC * 60 SEC/TRK) = 15K -1675 EC81 ; -1676 EC81~ #IF (PLATFORM == PLT_UNA) -1677 EC81~ SECBUF .FILL 512,0 ; PHYSICAL DISK SECTOR BUFFER -1678 EC81 #ENDIF -1679 EC81 ; -1680 EC81 ;================================================================================================== -1681 EC81 ; CBIOS BUFFERS -1682 EC81 ;================================================================================================== -1683 EC81 ; -1684 EC81 ;BUFFERS: -1685 EC81 ; -1686 EC81 BUFPOOL .EQU $ ; START OF BUFFER POOL -1687 EC81 ; -1688 EC81 ;================================================================================================== -1689 EC81 ; COLD BOOT INITIALIZATION -1690 EC81 ; -1691 EC81 ; THIS CODE IS PLACED IN THE BDOS BUFFER AREA TO CONSERVE SPACE. SINCE -1692 EC81 ; COLD BOOT DOES NO DISK IO, SO THIS IS SAFE. -1693 EC81 ; -1694 EC81 ;================================================================================================== -1695 EC81 ; -1696 EC81 00 00 00 00 .FILL 16 * 4,0 ; RESERVED FOR DRVMAP TABLE -1696 EC85 00 00 00 00 -1696 EC89 00 00 00 00 -1696 EC8D 00 00 00 00 -1696 EC91 00 00 00 00 -1696 EC95 00 00 00 00 -1696 EC99 00 00 00 00 -1696 EC9D 00 00 00 00 -1696 ECA1 00 00 00 00 -1696 ECA5 00 00 00 00 -1696 ECA9 00 00 00 00 -1696 ECAD 00 00 00 00 -1696 ECB1 00 00 00 00 -1696 ECB5 00 00 00 00 -1696 ECB9 00 00 00 00 -1696 ECBD 00 00 00 00 -1697 ECC1 00 00 00 00 .FILL 16 * 16,0 ; RESERVED FOR DPH TABLE -1697 ECC5 00 00 00 00 -1697 ECC9 00 00 00 00 -1697 ECCD 00 00 00 00 -1697 ECD1 00 00 00 00 -1697 ECD5 00 00 00 00 -1697 ECD9 00 00 00 00 -1697 ECDD 00 00 00 00 -1697 ECE1 00 00 00 00 -1697 ECE5 00 00 00 00 -1697 ECE9 00 00 00 00 -1697 ECED 00 00 00 00 -1697 ECF1 00 00 00 00 -1697 ECF5 00 00 00 00 -1697 ECF9 00 00 00 00 -1697 ECFD 00 00 00 00 -1697 ED01 00 00 00 00 -1697 ED05 00 00 00 00 -1697 ED09 00 00 00 00 -1697 ED0D 00 00 00 00 -1697 ED11 00 00 00 00 -1697 ED15 00 00 00 00 -1697 ED19 00 00 00 00 -1697 ED1D 00 00 00 00 -1697 ED21 00 00 00 00 -1697 ED25 00 00 00 00 -1697 ED29 00 00 00 00 -1697 ED2D 00 00 00 00 -1697 ED31 00 00 00 00 -1697 ED35 00 00 00 00 -1697 ED39 00 00 00 00 -1697 ED3D 00 00 00 00 -1697 ED41 00 00 00 00 -1697 ED45 00 00 00 00 -1697 ED49 00 00 00 00 -1697 ED4D 00 00 00 00 -1697 ED51 00 00 00 00 -1697 ED55 00 00 00 00 -1697 ED59 00 00 00 00 -1697 ED5D 00 00 00 00 -1697 ED61 00 00 00 00 -1697 ED65 00 00 00 00 -1697 ED69 00 00 00 00 -1697 ED6D 00 00 00 00 -1697 ED71 00 00 00 00 -1697 ED75 00 00 00 00 -1697 ED79 00 00 00 00 -1697 ED7D 00 00 00 00 -1697 ED81 00 00 00 00 -1697 ED85 00 00 00 00 -1697 ED89 00 00 00 00 -1697 ED8D 00 00 00 00 -1697 ED91 00 00 00 00 -1697 ED95 00 00 00 00 -1697 ED99 00 00 00 00 -1697 ED9D 00 00 00 00 -1697 EDA1 00 00 00 00 -1697 EDA5 00 00 00 00 -1697 EDA9 00 00 00 00 -1697 EDAD 00 00 00 00 -1697 EDB1 00 00 00 00 -1697 EDB5 00 00 00 00 -1697 EDB9 00 00 00 00 -1697 EDBD 00 00 00 00 -1698 EDC1 ; -1699 EDC1 INIT: -1700 EDC1 ; THIS INIT CODE WILL BE OVERLAID, SO WE ARE GOING -1701 EDC1 ; TO MODIFY THE BOOT ENTRY POINT TO CAUSE A PANIC -1702 EDC1 ; TO EASILY IDENTIFY IF SOMETHING TRIES TO INVOKE -1703 EDC1 ; THE BOOT ENTRY POINT AFTER INIT IS DONE. -1704 EDC1 3E CD LD A,$CD ; "CALL" INSTRUCTION -1705 EDC3 32 65 E6 LD (BOOT),A ; STORE IT BOOT ENTRY POINT -1706 EDC6 21 66 EA LD HL,PANIC ; ADDRESS OF PANIC ROUTINE -1707 EDC9 22 66 E6 LD (BOOT+1),HL ; STORE IT AT BOOT ENTRY + 1 -1708 EDCC -1709 EDCC~ #IF (PLATFORM == PLT_UNA) -1710 EDCC~ ; MAKE SURE UNA EXEC PAGE IS ACTIVE -1711 EDCC~ LD BC,$01FB ; UNA FUNC = SET BANK -1712 EDCC~ LD DE,BID_USR ; SWITCH BACK TO EXEC BANK -1713 EDCC~ CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) -1714 EDCC~ -1715 EDCC~ ; INSTALL UNA INVOCATION VECTOR FOR RST 08 -1716 EDCC~ LD A,$C3 ; JP INSTRUCTION -1717 EDCC~ LD (8),A ; STORE AT 0x0008 -1718 EDCC~ LD HL,($FFFE) ; UNA ENTRY VECTOR -1719 EDCC~ LD (9),HL ; STORE AT 0x0009 -1720 EDCC #ELSE -1721 EDCC ; MAKE SURE USER BANK IS ACTIVE -1722 EDCC 06 F0 LD B,BF_SYSSETBNK -1723 EDCE 0E 8E LD C,BID_USR -1724 EDD0 CD F0 FF CALL $FFF0 -1725 EDD3 -1726 EDD3 ; INSTALL HBIOS INVOCATION VECTOR FOR RST 08 -1727 EDD3 3E C3 LD A,$C3 ; JP INSTRUCTION -1728 EDD5 32 08 00 LD (8),A ; STORE AT 0x0008 -1729 EDD8 2A F1 FF LD HL,($FFF1) ; HBIOS ENTRY VECTOR -1730 EDDB 22 09 00 LD (9),HL ; STORE AT 0x0009 -1731 EDDE #ENDIF -1732 EDDE -1733 EDDE ; PARAMETER INITIALIZATION -1734 EDDE 3E 00 LD A,DEFIOBYTE ; LOAD DEFAULT IOBYTE -1735 EDE0 32 03 00 LD (IOBYTE),A ; STORE IT -1736 EDE3 -1737 EDE3 #IF ((PLATFORM != PLT_N8) & (PLATFORM != PLT_MK4) & (PLATFORM != PLT_S100) & (PLATFORM != PLT_UNA)) -1738 EDE3 DB 70 IN A,(RTC) ; RTC PORT, BIT 6 HAS STATE OF CONFIG JUMPER -1739 EDE5 CB 77 BIT 6,A ; BIT 6 HAS CONFIG JUMPER STATE -1740 EDE7 3E 00 LD A,DEFIOBYTE ; ASSUME WE WANT DEFAULT IOBYTE VALUE -1741 EDE9 20 02 JR NZ,INIT1 ; IF BIT6=1, NOT SHORTED, CONTINUE WITH DEFAULT -1742 EDEB 3E 00 LD A,ALTIOBYTE ; LOAD ALT IOBYTE VALUE -1743 EDED INIT1: -1744 EDED 32 03 00 LD (IOBYTE),A ; SET THE ACTIVE IOBYTE -1745 EDF0 #ENDIF -1746 EDF0 -1747 EDF0 ; INIT DEFAULT DRIVE TO A: FOR NOW -1748 EDF0 AF XOR A ; ZERO -1749 EDF1 32 9A EB LD (DEFDRIVE),A ; STORE IT -1750 EDF4 -1751 EDF4 ; STARTUP MESSAGE -1752 EDF4 CD 1C EA CALL NEWLINE ; FORMATTING -1753 EDF7 11 51 EE LD DE,STR_BANNER ; POINT TO BANNER -1754 EDFA CD 56 EA CALL WRITESTR ; DISPLAY IT -1755 EDFD CD 1C EA CALL NEWLINE ; FORMATTING -1756 EE00 -1757 EE00~ #IF (PLATFORM == PLT_UNA) -1758 EE00~ ; SAVE COMMAND PROCESSOR IMAGE TO MALLOCED CACHE IN UNA BIOS PAGE -1759 EE00~ LD C,$F7 ; UNA MALLOC -1760 EE00~ LD DE,CCP_SIZ ; SIZE OF CCP -1761 EE00~ RST 08 ; DO IT -1762 EE00~ CALL NZ,PANIC ; BIG PROBLEM -1763 EE00~ LD (CCPBUF),HL ; SAVE THE ADDRESS (IN BIOS MEM) -1764 EE00~ -1765 EE00~ LD BC,$01FB ; UNA FUNC = SET BANK -1766 EE00~ LD DE,BID_BIOS ; UBIOS_PAGE (SEE PAGES.INC) -1767 EE00~ RST 08 ; DO IT -1768 EE00~ PUSH DE ; SAVE PREVIOUS BANK -1769 EE00~ -1770 EE00~ LD HL,CPM_LOC ; ADDRESS IN HI MEM OF CCP -1771 EE00~ LD DE,(CCPBUF) ; ADDRESS OF CCP BUF IN BIOS MEM -1772 EE00~ LD BC,CCP_SIZ ; SIZE OF CCP -1773 EE00~ LDIR ; DO IT -1774 EE00~ -1775 EE00~ LD BC,$01FB ; UNA FUNC = SET BANK -1776 EE00~ POP DE ; RECOVER OPERATING BANK -1777 EE00~ RST 08 ; DO IT -1778 EE00 #ELSE -1779 EE00 ; SAVE COMMAND PROCESSOR TO DEDICATED CACHE IN RAM BANK 1 -1780 EE00 06 F3 LD B,BF_SYSXCPY ; HBIOS FUNC: SYSTEM EXTENDED COPY -1781 EE02 1E 8E LD E,BID_USR ; E = SRC BANK = USR BANK = TPA -1782 EE04 16 8D LD D,BID_BIOS ; D = DEST BANK = HB BANK -1783 EE06 CF RST 08 ; DO IT -1784 EE07 06 F2 LD B,BF_SYSCPY ; HBIOS FUNC: SYSTEM COPY -1785 EE09 21 00 D0 LD HL,CPM_LOC ; COPY FROM CCP LOCATION IN USR BANK -1786 EE0C ED 5B 9B EB LD DE,(CCPBUF) ; TO FIXED LOCATION IN HB BANK -1787 EE10 DD 21 00 08 LD IX,CCP_SIZ ; COPY CONTENTS OF COMMAND PROCESSOR -1788 EE14 CF RST 08 ; DO IT -1789 EE15 #ENDIF -1790 EE15 -1791 EE15 ; DISK SYSTEM INITIALIZATION -1792 EE15 CD C2 E7 CALL BLKRES ; RESET DISK (DE)BLOCKING ALGORITHM -1793 EE18 CD 84 EE CALL MD_INIT ; INITIALIZE MEMORY DISK DRIVER (RAM/ROM) -1794 EE1B CD B2 EE CALL DRV_INIT ; INITIALIZE DRIVE MAP -1795 EE1E CD 00 EF CALL DPH_INIT ; INITIALIZE DPH TABLE AND BUFFERS -1796 EE21 CD 1C EA CALL NEWLINE ; FORMATTING -1797 EE24 ; -1798 EE24 ; DISPLAY FREE MEMORY -1799 EE24 11 A8 F0 LD DE,STR_LDR ; FORMATTING -1800 EE27 CD 56 EA CALL WRITESTR ; AND PRINT IT -1801 EE2A 21 00 FE LD HL,CBIOS_END ; SUBTRACT HIGH WATER -1802 EE2D ED 5B 8C F0 LD DE,(BUFTOP) ; ... FROM TOP OF CBIOS -1803 EE31 B7 OR A ; ... WITH CF CLEAR -1804 EE32 ED 52 SBC HL,DE ; ... SO HL GETS BYTES FREE -1805 EE34 CD 58 EB CALL PRTDEC ; PRINT IT -1806 EE37 11 6A EE LD DE,STR_MEMFREE ; ADD DESCRIPTION -1807 EE3A CD 56 EA CALL WRITESTR ; AND PRINT IT -1808 EE3D ; -1809 EE3D 3A 9A EB LD A,(DEFDRIVE) ; GET DEFAULT DRIVE -1810 EE40 32 04 00 LD (CDISK),A ; ... AND SETUP CDISK -1811 EE43 ; -1812 EE43 ; SETUP AUTOSTART COMMAND -1813 EE43 21 4F EE LD HL,CMD ; ADDRESS OF STARTUP COMMAND -1814 EE46 11 07 D0 LD DE,CCP_LOC + 7 ; START OF COMMAND BUFFER IN CCP -1815 EE49 01 02 00 LD BC,CMDLEN ; LENGTH OF AUTOSTART COMMAND -1816 EE4C ED B0 LDIR ; INSTALL IT -1817 EE4E ; -1818 EE4E C9 RET -1819 EE4F ; -1820 EE4F 01 CMD .DB CMDLEN - 1 -1821 EE50 #IFDEF AUTOCMD -1822 EE50 .TEXT AUTOCMD -1823 EE50 #ENDIF -1824 EE50 00 .DB 0 -1825 EE51 CMDLEN .EQU $ - CMD -1826 EE51 ; -1827 EE51 43 50 2F 4D STR_BANNER .DB OSLBL, " CBIOS v", BIOSVER, "$" -1827 EE55 2D 38 30 20 -1827 EE59 32 2E 32 20 -1827 EE5D 43 42 49 4F -1827 EE61 53 20 76 32 -1827 EE65 2E 37 2E 30 -1827 EE69 24 -1828 EE6A 20 44 69 73 STR_MEMFREE .DB " Disk Buffer Bytes Free\r\n$" -1828 EE6E 6B 20 42 75 -1828 EE72 66 66 65 72 -1828 EE76 20 42 79 74 -1828 EE7A 65 73 20 46 -1828 EE7E 72 65 65 0D -1828 EE82 0A 24 -1829 EE84 ; -1830 EE84 ; -1831 EE84 ;__________________________________________________________________________________________________ -1832 EE84 MD_INIT: -1833 EE84 ; -1834 EE84~ #IF (PLATFORM == PLT_UNA) -1835 EE84~ ; -1836 EE84~ ; INITIALIZE RAM DISK BY FILLING DIRECTORY WITH 'E5' BYTES -1837 EE84~ ; FILL FIRST 8K OF RAM DISK TRACK 1 WITH 'E5' -1838 EE84~ ; -1839 EE84~ #IF (CLRRAMDISK != CLR_NEVER) -1840 EE84~ LD BC,$01FB ; UNA FUNC = SET BANK -1841 EE84~ LD DE,BID_RAMD0 ; FIRST BANK OF RAM DISK -1842 EE84~ CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) -1843 EE84~ -1844 EE84~ #IF (CLRRAMDISK == CLR_AUTO) -1845 EE84~ ; CHECK FIRST 32 DIRECTORY ENTRIES. IF ANY START WITH AN INVALID -1846 EE84~ ; VALUE, INIT THE RAM DISK. VALID ENTRIES ARE E5 (EMPTY ENTRY) OR -1847 EE84~ ; 0-15 (USER NUMBER). -1848 EE84~ LD HL,0 -1849 EE84~ LD DE,32 -1850 EE84~ LD B,32 -1851 EE84~ CLRRAM0: -1852 EE84~ LD A,(HL) -1853 EE84~ CP $E5 -1854 EE84~ JR Z,CLRRAM1 ; E5 IS VALID -1855 EE84~ CP 16 -1856 EE84~ JR C,CLRRAM1 ; 0-15 IS ALSO VALID -1857 EE84~ JR CLRRAM2 ; INVALID ENTRY! JUMP TO INIT -1858 EE84~ CLRRAM1: -1859 EE84~ ADD HL,DE ; LOOP FOR 32 ENTRIES -1860 EE84~ DJNZ CLRRAM0 -1861 EE84~ ; JR CLRRAM2 ; *DEBUG* -1862 EE84~ JR CLRRAM3 ; ALL ENTRIES VALID, BYPASS INIT -1863 EE84~ CLRRAM2: -1864 EE84~ #ENDIF -1865 EE84~ LD BC,$01FB ; UNA FUNC = SET BANK -1866 EE84~ LD DE,BID_USR ; SWITCH BACK TO EXEC BANK FOR WRITESTR -1867 EE84~ CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) -1868 EE84~ -1869 EE84~ LD DE,STR_INITRAMDISK ; RAM DISK INIT MESSAGE -1870 EE84~ CALL WRITESTR ; DISPLAY IT -1871 EE84~ -1872 EE84~ LD BC,$01FB ; UNA FUNC = SET BANK -1873 EE84~ LD DE,BID_RAMD0 ; FIRST BANK OF RAM DISK -1874 EE84~ CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) -1875 EE84~ -1876 EE84~ LD HL,0 ; SOURCE ADR FOR FILL -1877 EE84~ LD BC,$2000 ; LENGTH OF FILL IS 8K -1878 EE84~ LD A,$E5 ; FILL VALUE -1879 EE84~ CALL FILL ; DO IT -1880 EE84~ CLRRAM3: -1881 EE84~ LD BC,$01FB ; UNA FUNC = SET BANK -1882 EE84~ LD DE,BID_USR ; SWITCH BACK TO EXEC BANK -1883 EE84~ CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) -1884 EE84~ -1885 EE84~ #ENDIF -1886 EE84~ -1887 EE84 #ELSE -1888 EE84 ; -1889 EE84 ; INITIALIZE RAM DISK BY FILLING DIRECTORY WITH 'E5' BYTES -1890 EE84 ; FILL FIRST 8K OF RAM DISK TRACK 1 WITH 'E5' -1891 EE84 ; -1892 EE84 #IF (CLRRAMDISK != CLR_NEVER) -1893 EE84 06 F0 LD B,BF_SYSSETBNK ; HBIOS FUNC: SET BANK -1894 EE86 0E 80 LD C,BID_RAMD0 ; FIRST BANK OF RAM DISK -1895 EE88 CD F0 FF CALL $FFF0 ; DO IT (RST 08 NOT SAFE) -1896 EE8B -1897 EE8B~ #IF (CLRRAMDISK == CLR_AUTO) -1898 EE8B~ ; CHECK FIRST 32 DIRECTORY ENTRIES. IF ANY START WITH AN INVALID -1899 EE8B~ ; VALUE, INIT THE RAM DISK. VALID ENTRIES ARE E5 (EMPTY ENTRY) OR -1900 EE8B~ ; 0-15 (USER NUMBER). -1901 EE8B~ LD HL,0 -1902 EE8B~ LD DE,32 -1903 EE8B~ LD B,32 -1904 EE8B~ CLRRAM0: -1905 EE8B~ LD A,(HL) -1906 EE8B~ CP $E5 -1907 EE8B~ JR Z,CLRRAM1 ; E5 IS VALID -1908 EE8B~ CP 16 -1909 EE8B~ JR C,CLRRAM1 ; 0-15 IS ALSO VALID -1910 EE8B~ JR CLRRAM2 ; INVALID ENTRY! JUMP TO INIT -1911 EE8B~ CLRRAM1: -1912 EE8B~ ADD HL,DE ; LOOP FOR 32 ENTRIES -1913 EE8B~ DJNZ CLRRAM0 -1914 EE8B~ ; JR CLRRAM2 ; *DEBUG* -1915 EE8B~ JR CLRRAM3 ; ALL ENTRIES VALID, BYPASS INIT -1916 EE8B~ CLRRAM2: -1917 EE8B #ENDIF -1918 EE8B 06 F0 LD B,BF_SYSSETBNK ; HBIOS FUNC: SET BANK -1919 EE8D 0E 8E LD C,BID_USR ; SWITCH BACK TO USR BANK -1920 EE8F CD F0 FF CALL $FFF0 ; DO IT (RST 08 NOT SAFE) -1921 EE92 11 90 F0 LD DE,STR_INITRAMDISK ; RAM DISK INIT MESSAGE -1922 EE95 CD 56 EA CALL WRITESTR ; DISPLAY IT -1923 EE98 06 F0 LD B,BF_SYSSETBNK ; HBIOS FUNC: SET BANK -1924 EE9A 0E 80 LD C,BID_RAMD0 ; SWITCH BACK TO FIRST BANK -1925 EE9C CD F0 FF CALL $FFF0 ; DO IT (RST 08 NOT SAFE) -1926 EE9F 21 00 00 LD HL,0 ; SOURCE ADR FOR FILL -1927 EEA2 01 00 20 LD BC,$2000 ; LENGTH OF FILL IS 8K -1928 EEA5 3E E5 LD A,$E5 ; FILL VALUE -1929 EEA7 CD 1C EB CALL FILL ; DO IT -1930 EEAA CLRRAM3: -1931 EEAA 06 F0 LD B,BF_SYSSETBNK ; HBIOS FUNC: SET BANK -1932 EEAC 0E 8E LD C,BID_USR ; USR BANK (TPA) -1933 EEAE CD F0 FF CALL $FFF0 ; DO IT (RST 08 NOT SAFE) -1934 EEB1 #ENDIF -1935 EEB1 ; -1936 EEB1 #ENDIF -1937 EEB1 ; -1938 EEB1 C9 RET -1939 EEB2 ; -1940 EEB2 ; -1941 EEB2 ;__________________________________________________________________________________________________ -1942 EEB2~ #IF (PLATFORM == PLT_UNA) -1943 EEB2~ ; -1944 EEB2~ DRV_INIT: -1945 EEB2~ ; -1946 EEB2~ ; PERFORM UBIOS SPECIFIC INITIALIZATION -1947 EEB2~ ; BUILD DRVMAP BASED ON AVAILABLE UBIOS DISK DEVICE LIST -1948 EEB2~ ; -1949 EEB2~ ; GET BOOT DEVICE/UNIT/LU INFO -1950 EEB2~ LD BC,$00FC ; UNA FUNC: GET BOOTSTRAP HISTORY -1951 EEB2~ RST 08 ; CALL UNA -1952 EEB2~ LD D,L ; SAVE L AS DEVICE/UNIT -1953 EEB2~ LD E,0 ; LU IS ZERO -1954 EEB2~ LD (BOOTVOL),DE ; D -> DEVICE/UNIT, E -> LU -1955 EEB2~ ; -1956 EEB2~ ; PERFORM UNA BIOS SPECIFIC INITIALIZATION -1957 EEB2~ ; UPDATE DRVMAP BASED ON AVAILABLE UNA UNITS -1958 EEB2~ ; -1959 EEB2~ ; SETUP THE DRVMAP STRUCTURE -1960 EEB2~ LD HL,(BUFTOP) ; GET CURRENT BUFFER TOP -1961 EEB2~ INC HL ; SKIP 1 BYTE FOR ENTRY COUNT PREFIX -1962 EEB2~ LD (DRVMAPADR),HL ; SAVE AS DRIVE MAP ADDRESS -1963 EEB2~ LD (BUFTOP),HL ; ... AND AS NEW BUFTOP -1964 EEB2~ ; -1965 EEB2~ LD B,0 ; START WITH UNIT 0 -1966 EEB2~ ; -1967 EEB2~ DRV_INIT1: ; LOOP THRU ALL UNITS AVAILABLE -1968 EEB2~ LD C,$48 ; UNA FUNC: GET DISK TYPE -1969 EEB2~ LD L,0 ; PRESET UNIT COUNT TO ZERO -1970 EEB2~ CALL $FFFD ; CALL UNA, B IS ASSUMED TO BE UNTOUCHED!!! -1971 EEB2~ LD A,L ; UNIT COUNT TO A -1972 EEB2~ OR A ; PAST END? -1973 EEB2~ JR Z,DRV_INIT2 ; WE ARE DONE -1974 EEB2~ PUSH BC ; SAVE UNIT -1975 EEB2~ CALL DRV_INIT3 ; PROCESS THE UNIT -1976 EEB2~ POP BC ; RESTORE UNIT -1977 EEB2~ INC B ; NEXT UNIT -1978 EEB2~ JR DRV_INIT1 ; LOOP -1979 EEB2~ ; -1980 EEB2~ DRV_INIT2: ; FINALIZE THE DRIVE MAP -1981 EEB2~ RET ; DONE -1982 EEB2~ ; -1983 EEB2~ DRV_INIT3: ; PROCESS CURRENT UNIT (SEE UNA PROTOIDS.INC) -1984 EEB2~ LD A,D ; MOVE DISK TYPE TO A -1985 EEB2~ ; CALL PC_LBKT ; *DEBUG* -1986 EEB2~ ; CALL PRTHEXBYTE ; *DEBUG* -1987 EEB2~ ; CALL PC_RBKT ; *DEBUG* -1988 EEB2~ ; -1989 EEB2~ CALL DRV_INIT4 ; MAKE A DRIVE MAP ENTRY -1990 EEB2~ LD A,D ; LOAD DRIVE TYPE -1991 EEB2~ CP $40 ; RAM/ROM? -1992 EEB2~ RET Z ; DONE IF SO -1993 EEB2~ ; CP $?? ; FLOPPY DRIVE? -1994 EEB2~ ; RET Z ; DONE IF SO -1995 EEB2~ CALL DRV_INIT4 ; ANOTHER ENTRY FOR HARD DISK -1996 EEB2~ LD A,1 ; BUT WITH SLICE VALUE OF 1 -1997 EEB2~ INC HL ; BUMP TO SLICE POSITION -1998 EEB2~ LD (HL),A ; SAVE IT -1999 EEB2~ RET ; DONE -2000 EEB2~ ; -2001 EEB2~ DRV_INIT4: -2002 EEB2~ ; ALLOCATE SPACE IN DRVMAP -2003 EEB2~ PUSH BC ; SAVE INCOMING UNIT NUM -2004 EEB2~ LD BC,4 ; 4 BYTES PER ENTRY -2005 EEB2~ CALL ALLOC ; ALLOCATE -2006 EEB2~ CALL NZ,PANIC ; SHOULD NEVER ERROR HERE -2007 EEB2~ PUSH BC ; MOVE MEM PTR -2008 EEB2~ POP HL ; ... TO HL -2009 EEB2~ POP BC ; RECOVER UNIT NUM -2010 EEB2~ LD (HL),B ; SAVE IT IN FIRST BYTE OF DRV MAP ENTRY -2011 EEB2~ PUSH HL ; SAVE HL -2012 EEB2~ LD HL,(DRVMAPADR) ; POINT TO DRIVE MAP -2013 EEB2~ DEC HL ; BACK TO ENTRY COUNT -2014 EEB2~ INC (HL) ; INCREMENT THE ENTRY COUNT -2015 EEB2~ POP HL ; RECOVER HL -2016 EEB2~ RET ; DONE -2017 EEB2~ ; -2018 EEB2 #ELSE -2019 EEB2 ; -2020 EEB2 DRV_INIT: -2021 EEB2 ; -2022 EEB2 ; PERFORM HBIOS SPECIFIC INITIALIZATION -2023 EEB2 ; BUILD DRVMAP BASED ON AVAILABLE HBIOS DISK DEVICE LIST -2024 EEB2 ; -2025 EEB2 ; GET BOOT DEVICE/UNIT/LU INFO -2026 EEB2 06 F4 LD B,BF_SYSATTR ; HBIOS FUNC: GET/SET ATTR -2027 EEB4 0E 00 LD C,AID_BOOTVOL ; ATTRIB ID FOR BOOT DEVICE -2028 EEB6 CF RST 08 ; GET THE VALUE -2029 EEB7 ED 53 8E F0 LD (BOOTVOL),DE ; D -> DEVICE/UNIT, E -> LU -2030 EEBB ; -2031 EEBB ; SETUP THE DRVMAP STRUCTURE -2032 EEBB 2A 8C F0 LD HL,(BUFTOP) ; GET CURRENT BUFFER TOP -2033 EEBE 23 INC HL ; SKIP 1 BYTE FOR ENTRY COUNT PREFIX -2034 EEBF 22 3B E6 LD (DRVMAPADR),HL ; SAVE AS DRVMAP ADDRESS -2035 EEC2 22 8C F0 LD (BUFTOP),HL ; AND AS NEW BUFTOP -2036 EEC5 ; -2037 EEC5 ; SETUP TO LOOP THROUGH AVAILABLE DEVICES -2038 EEC5 06 1A LD B,BF_DIODEVCNT ; HBIOS FUNC: DEVICE COUNT -2039 EEC7 CF RST 08 ; CALL HBIOS, DEVICE COUNT TO B -2040 EEC8 78 LD A,B ; COUNT TO A -2041 EEC9 B7 OR A ; SET FLAGS -2042 EECA C8 RET Z ; HANDLE ZERO DEVICES (ALBEIT POORLY) -2043 EECB 0E 00 LD C,0 ; USE C AS DEVICE LIST INDEX -2044 EECD ; -2045 EECD DRV_INIT1: ; DEVICE ENUMERATION LOOP -2046 EECD C5 PUSH BC ; PRESERVE LOOP CONTROL -2047 EECE 06 1B LD B,BF_DIODEVINF ; HBIOS FUNC: DEVICE INFO -2048 EED0 CF RST 08 ; CALL HBIOS, DEVICE/UNIT TO C -2049 EED1 CD D9 EE CALL DRV_INIT3 ; MAKE DRIVE MAP ENTRY(S) -2050 EED4 C1 POP BC ; RESTORE LOOP CONTROL -2051 EED5 0C INC C ; INCREMENT LIST INDEX -2052 EED6 10 F5 DJNZ DRV_INIT1 ; LOOP AS NEEDED -2053 EED8 C9 RET ; FINISHED -2054 EED9 ; -2055 EED9 DRV_INIT3: ; PROCESS DEVICE/UNIT -2056 EED9 79 LD A,C ; DEVICE/UNIT TO A -2057 EEDA F5 PUSH AF ; SAVE DEVICE/UNIT -2058 EEDB CD EA EE CALL DRV_INIT4 ; MAKE A DRIVE MAP ENTRY -2059 EEDE F1 POP AF ; RESTORE DEVICE/UNIT -2060 EEDF FE 30 CP DIODEV_IDE ; FIRST SLICE CAPABLE DEVICE? -2061 EEE1 D8 RET C ; DONE IF NOT SLICE WORTHY -2062 EEE2 CD EA EE CALL DRV_INIT4 ; MAKE ANOTHER ENTRY IF HARD DISK -2063 EEE5 3E 01 LD A,1 ; ... BUT WITH SLICE = 1 -2064 EEE7 23 INC HL ; BUMP TO SLICE POSITION -2065 EEE8 77 LD (HL),A ; SAVE IT -2066 EEE9 C9 RET ; DONE -2067 EEEA ; -2068 EEEA DRV_INIT4: ; MAKE A DRIVE MAP ENTRY -2069 EEEA ; ALLOCATE SPACE FOR ENTRY -2070 EEEA F5 PUSH AF ; SAVE INCOMING DEVICE/UNIT -2071 EEEB 01 04 00 LD BC,4 ; 4 BYTES PER ENTRY -2072 EEEE CD DE EF CALL ALLOC ; ALLOCATE SPACE -2073 EEF1 C4 66 EA CALL NZ,PANIC ; SHOULD NEVER ERROR HERE -2074 EEF4 C5 PUSH BC ; MOVE MEM PTR -2075 EEF5 E1 POP HL ; ... TO HL -2076 EEF6 F1 POP AF ; RECOVER DEVICE/UNIT -2077 EEF7 77 LD (HL),A ; SAVE IT IN FIRST BYTE OF DRVMAP -2078 EEF8 E5 PUSH HL ; SAVE ENTRY PTR -2079 EEF9 2A 3B E6 LD HL,(DRVMAPADR) ; POINT TO DRIVE MAP -2080 EEFC 2B DEC HL ; BACKUP TO ENTRY COUNT -2081 EEFD 34 INC (HL) ; INCREMENT THE ENTRY COUNT -2082 EEFE E1 POP HL ; RECOVER ENTRY POINTER -2083 EEFF C9 RET ; DONE -2084 EF00 ; -2085 EF00 #ENDIF -2086 EF00 ; -2087 EF00 ; -2088 EF00 ;__________________________________________________________________________________________________ -2089 EF00 ; -2090 EF00 DPH_INIT: -2091 EF00 ; -2092 EF00 ; ITERATE THROUGH DRIVE MAP TO BUILD DPH ENTRIES DYNAMICALLY -2093 EF00 ; -2094 EF00 11 AE F0 LD DE,STR_DPHINIT ; POINT TO MSG -2095 EF03 CD 56 EA CALL WRITESTR ; DISPLAY IT -2096 EF06 CD 1C EA CALL NEWLINE ; FORMATTING -2097 EF09 ; -2098 EF09 ; ALLOCATE DPH POOL SPACE BASED ON DRIVE COUNT -2099 EF09 2A 3B E6 LD HL,(DRVMAPADR) ; LOAD DRIVE MAP POINTER -2100 EF0C 2B DEC HL ; BACKUP TO ENTRY COUNT -2101 EF0D 7E LD A,(HL) ; GET THE ENTRY COUNT -2102 EF0E 6F LD L,A ; PUT DRIVE COUNT -2103 EF0F 26 00 LD H,0 ; ... INTO HL -2104 EF11 29 ADD HL,HL ; MULTIPLY -2105 EF12 29 ADD HL,HL ; ... BY SIZE -2106 EF13 29 ADD HL,HL ; ... OF DPH (16) -2107 EF14 29 ADD HL,HL ; ... FOR TOTAL SIZE -2108 EF15 E5 PUSH HL ; MOVE POOL SIZE -2109 EF16 C1 POP BC ; ... INTO BC FOR MEM ALLOC -2110 EF17 CD DE EF CALL ALLOC ; ALLOCATE THE SPACE -2111 EF1A C4 66 EA CALL NZ,PANIC ; SHOULD NEVER ERROR -2112 EF1D ; -2113 EF1D ; SET DPHTOP TO START OF ALLOCATED SPACE -2114 EF1D C5 PUSH BC ; MOVE MEM POINTER -2115 EF1E E1 POP HL ; ... TO HL -2116 EF1F 22 88 F0 LD (DPHTOP),HL ; ... AND SAVE IN DPHTOP -2117 EF22 ; -2118 EF22 ; ALLOCATE DIRECTORY BUFFER -2119 EF22 01 80 00 LD BC,128 ; SIZE OF DIRECTORY BUFFER -2120 EF25 CD DE EF CALL ALLOC ; ALLOCATE THE SPACE -2121 EF28 C4 66 EA CALL NZ,PANIC ; SHOULD NEVER ERROR -2122 EF2B C5 PUSH BC ; MOVE MEM POINTER -2123 EF2C E1 POP HL ; ... TO HL -2124 EF2D 22 8A F0 LD (DIRBUF),HL ; ... AND SAVE IN DIRBUF -2125 EF30 ; -2126 EF30 ; SETUP FOR DPH BUILD LOOP -2127 EF30 2A 3B E6 LD HL,(DRVMAPADR) ; POINT TO DRIVE MAP -2128 EF33 2B DEC HL ; BACKUP TO ENTRY COUNT -2129 EF34 46 LD B,(HL) ; LOOP DRVCNT TIMES -2130 EF35 0E 00 LD C,0 ; DRIVE INDEX -2131 EF37 23 INC HL ; BUMP TO START OF DRIVE MAP -2132 EF38 ; -2133 EF38 DPH_INIT1: -2134 EF38 ; DISPLAY DRIVE LETTER -2135 EF38 79 LD A,C ; LOAD DRIVE INDEX -2136 EF39 C6 41 ADD A,'A' ; MAKE IT A DISPLAY LETTER -2137 EF3B 11 A8 F0 LD DE,STR_LDR ; LEADER STRING -2138 EF3E CD 56 EA CALL WRITESTR ; DISPLAY IT -2139 EF41 CD B6 EA CALL COUT ; DISPLAY DRIVE LETTER -2140 EF44 CD E0 E9 CALL PC_COLON ; DISPLAY COLON -2141 EF47 3E 3D LD A,'=' ; SEPARATOR -2142 EF49 CD B6 EA CALL COUT ; DISPLAY IT -2143 EF4C ; SETUP FOR DPH BUILD ROUTINE INCLUDING DPH BLOCK ALLOCATION -2144 EF4C 56 LD D,(HL) ; D := DEV/UNIT -2145 EF4D 23 INC HL ; BUMP -2146 EF4E 5E LD E,(HL) ; E := SLICE -2147 EF4F 23 INC HL ; BUMP -2148 EF50 CD 0E F0 CALL PRTDUS ; PRINT DEVICE/UNIT/SLICE -2149 EF53 7A LD A,D ; A := DEV/UNIT -2150 EF54 E5 PUSH HL ; SAVE DRIVE MAP POINTER -2151 EF55 F5 PUSH AF ; SAVE DEV/UNIT -2152 EF56 ; MATCH AND SAVE DEFAULT DRIVE BASED ON BOOT DEVICE/UNIT/SLICE -2153 EF56 21 8F F0 LD HL,BOOTVOL + 1 ; POINT TO BOOT DEVICE/UNIT -2154 EF59 7A LD A,D ; LOAD CURRENT DEVICE/UNIT -2155 EF5A BE CP (HL) ; MATCH? -2156 EF5B 20 09 JR NZ,DPH_INIT1A ; BYPASS IF NOT BOOT DEVICE/UNIT -2157 EF5D 2B DEC HL ; POINT TO BOOT SLICE -2158 EF5E 7B LD A,E ; LOAD CURRENT SLICE -2159 EF5F BE CP (HL) ; MATCH? -2160 EF60 20 04 JR NZ,DPH_INIT1A ; BYPASS IF NOT BOOT SLICE -2161 EF62 79 LD A,C ; LOAD THE CURRENT DRIVE NUM -2162 EF63 32 9A EB LD (DEFDRIVE),A ; SAVE AS DEFAULT -2163 EF66 DPH_INIT1A: -2164 EF66 F1 POP AF ; RESTORE DEV/UNIT -2165 EF67 ED 5B 88 F0 LD DE,(DPHTOP) ; GET ADDRESS OF NEXT DPH -2166 EF6B D5 PUSH DE ; ... AND SAVE IT -2167 EF6C ; INVOKE THE DPH BUILD ROUTINE -2168 EF6C C5 PUSH BC ; SAVE LOOP CONTROL -2169 EF6D CD 8A EF CALL MAKDPH ; MAKE THE DPH AT DE, DEV/UNIT IN A -2170 EF70 ;CALL NZ,PANIC ; FOR NOW, PANIC ON ANY ERROR -2171 EF70 C1 POP BC ; RESTORE LOOP CONTROL -2172 EF71 ; STORE THE DPH POINTER IN DRIVE MAP -2173 EF71 D1 POP DE ; RESTORE DPH ADDRESS TO DE -2174 EF72 E1 POP HL ; RESTORE DRIVE MAP POINTER TO HL -2175 EF73 28 03 JR Z,DPH_INIT2 ; IF MAKDPH OK, CONTINUE -2176 EF75 11 00 00 LD DE,0 ; ... OTHERWISE ZERO OUT THE DPH POINTER -2177 EF78 DPH_INIT2: -2178 EF78 73 LD (HL),E ; SAVE DPH POINTER -2179 EF79 23 INC HL ; ... IN -2180 EF7A 72 LD (HL),D ; ... DRIVE MAP -2181 EF7B 23 INC HL ; AND BUMP TO START OF NEXT ENTRY -2182 EF7C ; UPDATE DPH ALLOCATION TOP -2183 EF7C 3E 10 LD A,16 ; SIZE OF A DPH ENTRY -2184 EF7E EB EX DE,HL ; HL := DPH POINTER -2185 EF7F CD 0B EB CALL ADDHLA ; CALC NEW DPHTOP -2186 EF82 22 88 F0 LD (DPHTOP),HL ; SAVE IT -2187 EF85 ; HANDLE THE NEXT DRIVE MAP ENTRY -2188 EF85 EB EX DE,HL ; HL := NEXT DRIVE MAP ENTRY -2189 EF86 0C INC C ; NEXT DRIVE -2190 EF87 10 AF DJNZ DPH_INIT1 ; LOOP AS NEEDED -2191 EF89 C9 RET ; DONE -2192 EF8A ; -2193 EF8A MAKDPH: -2194 EF8A ; -2195 EF8A ; MAKE A DPH AT ADDRESS IN DE FOR DEV/UNIT IN A -2196 EF8A ; -2197 EF8A D5 PUSH DE ; SAVE INCOMING DPH ADDRESS -2198 EF8B ; -2199 EF8B~ #IF (PLATFORM == PLT_UNA) -2200 EF8B~ ; -2201 EF8B~ LD B,A ; UNIT NUM TO B -2202 EF8B~ LD C,$48 ; UNA FUNC: GET DISK TYPE -2203 EF8B~ CALL $FFFD ; CALL UNA -2204 EF8B~ LD A,D ; MOVE DISK TYPE TO A -2205 EF8B~ ; -2206 EF8B~ ; DERIVE DPB ADDRESS BASED ON DISK TYPE -2207 EF8B~ CP $40 ; RAM/ROM DRIVE? -2208 EF8B~ JR Z,MAKDPH0 ; HANDLE RAM/ROM DRIVE IF SO -2209 EF8B~ ; CP $?? ; FLOPPY DRIVE? -2210 EF8B~ ; JR Z,XXXXX ; HANDLE FLOPPY -2211 EF8B~ LD DE,DPB_HD ; ASSUME HARD DISK -2212 EF8B~ JR MAKDPH1 ; CONTINUE -2213 EF8B~ ; -2214 EF8B~ MAKDPH0: ; HANDLE RAM/ROM -2215 EF8B~ LD C,$45 ; UNA FUNC: GET DISK INFO -2216 EF8B~ LD DE,$9000 ; 512 BYTE BUFFER *** FIX!!! *** -2217 EF8B~ CALL $FFFD ; CALL UNA -2218 EF8B~ BIT 7,B ; TEST RAM DRIVE BIT -2219 EF8B~ LD DE,DPB_ROM ; ASSUME ROM -2220 EF8B~ JR Z,MAKDPH1 ; NOT SET, ROM DRIVE, CONTINUE -2221 EF8B~ LD DE,DPB_RAM ; OTHERWISE, MUST BE RAM DRIVE -2222 EF8B~ JR MAKDPH1 ; CONTINUE -2223 EF8B~ ; -2224 EF8B #ELSE -2225 EF8B ; -2226 EF8B ; DETERMINE APPROPRIATE DPB -2227 EF8B 11 D2 EB LD DE,DPB_ROM ; ASSUME ROM -2228 EF8E FE 00 CP DIODEV_MD+0 ; ROM? -2229 EF90 28 1C JR Z,MAKDPH1 ; YES, JUMP AHEAD -2230 EF92 11 E6 EB LD DE,DPB_RAM ; ASSUME ROM -2231 EF95 FE 01 CP DIODEV_MD+1 ; ROM? -2232 EF97 28 15 JR Z,MAKDPH1 ; YES, JUMP AHEAD -2233 EF99 E6 F0 AND $F0 ; IGNORE UNIT NIBBLE NOW -2234 EF9B 11 36 EC LD DE,DPB_FD144 ; ASSUME FLOPPY -2235 EF9E FE 10 CP DIODEV_FD ; FLOPPY? -2236 EFA0 28 0C JR Z,MAKDPH1 ; YES, JUMP AHEAD -2237 EFA2 11 FA EB LD DE,DPB_RF ; ASSUME RAM FLOPPY -2238 EFA5 FE 20 CP DIODEV_RF ; RAM FLOPPY? -2239 EFA7 28 05 JR Z,MAKDPH1 ; YES, JUMP AHEAD -2240 EFA9 11 0E EC LD DE,DPB_HD ; EVERYTHING ELSE IS ASSUMED TO BE HARD DISK -2241 EFAC 18 00 JR MAKDPH1 ; JUMP AHEAD -2242 EFAE ; -2243 EFAE #ENDIF -2244 EFAE ; -2245 EFAE MAKDPH1: -2246 EFAE ; -2247 EFAE ; BUILD THE DPH -2248 EFAE E1 POP HL ; HL := START OF DPH -2249 EFAF 3E 08 LD A,8 ; SIZE OF DPH RESERVED AREA -2250 EFB1 CD 0B EB CALL ADDHLA ; LEAVE IT ALONE (ZERO FILLED) -2251 EFB4 -2252 EFB4 ED 4B 8A F0 LD BC,(DIRBUF) ; ADDRESS OF DIRBUF -2253 EFB8 71 LD (HL),C ; PLUG DIRBUF -2254 EFB9 23 INC HL ; ... INTO DPH -2255 EFBA 70 LD (HL),B ; ... AND BUMP -2256 EFBB 23 INC HL ; ... TO NEXT DPH ENTRY -2257 EFBC -2258 EFBC 73 LD (HL),E ; PLUG DPB ADDRESS -2259 EFBD 23 INC HL ; ... INTO DPH -2260 EFBE 72 LD (HL),D ; ... AND BUMP -2261 EFBF 23 INC HL ; ... TO NEXT ENTRY -2262 EFC0 1B DEC DE ; POINT -2263 EFC1 1B DEC DE ; ... TO START -2264 EFC2 1B DEC DE ; ... OF -2265 EFC3 1B DEC DE ; ... DPB -2266 EFC4 1B DEC DE ; ... PREFIX DATA (CKS & ALS BUF SIZES) -2267 EFC5 CD C9 EF CALL MAKDPH2 ; HANDLE CKS BUF, THEN FALL THRU FOR ALS BUF -2268 EFC8 C0 RET NZ ; BAIL OUT ON ERROR -2269 EFC9 MAKDPH2: -2270 EFC9 EB EX DE,HL ; POINT HL TO CKS/ALS SIZE ADR -2271 EFCA 4E LD C,(HL) ; BC := CKS/ALS SIZE -2272 EFCB 23 INC HL ; ... AND BUMP -2273 EFCC 46 LD B,(HL) ; ... PAST -2274 EFCD 23 INC HL ; ... CKS/ALS SIZE -2275 EFCE EB EX DE,HL ; BC AND HL ROLES RESTORED -2276 EFCF 78 LD A,B ; CHECK TO SEE -2277 EFD0 B1 OR C ; ... IF BC IS ZERO -2278 EFD1 28 05 JR Z,MAKDPH3 ; IF ZERO, BYPASS ALLOC, USE ZERO FOR ADDRESS -2279 EFD3 CD DE EF CALL ALLOC ; ALLOC BC BYTES, ADDRESS RETURNED IN BC -2280 EFD6 20 26 JR NZ,ERR_BUFOVF ; HANDLE OVERFLOW ERROR -2281 EFD8 MAKDPH3: -2282 EFD8 71 LD (HL),C ; SAVE CKS/ALS BUF -2283 EFD9 23 INC HL ; ... ADDRESS IN -2284 EFDA 70 LD (HL),B ; ... DPH AND BUMP -2285 EFDB 23 INC HL ; ... TO NEXT DPH ENTRY -2286 EFDC AF XOR A ; SIGNAL SUCCESS -2287 EFDD C9 RET -2288 EFDE ; -2289 EFDE ALLOC: -2290 EFDE ; -2291 EFDE ; ALLOCATE BC BYTES FROM BUF POOL, RETURN STARTING -2292 EFDE ; ADDRESS IN BC. LEAVE ALL OTHER REGS ALONE EXCEPT A -2293 EFDE ; Z FOR SUCCESS, NZ FOR FAILURE -2294 EFDE ; -2295 EFDE D5 PUSH DE ; SAVE ORIGINAL DE -2296 EFDF E5 PUSH HL ; SAVE ORIGINAL HL -2297 EFE0 2A 8C F0 LD HL,(BUFTOP) ; HL := CURRENT BUFFER TOP -2298 EFE3 E5 PUSH HL ; SAVE AS START OF NEW BUFFER -2299 EFE4 C5 PUSH BC ; GET BYTE COUNT -2300 EFE5 D1 POP DE ; ... INTO DE -2301 EFE6 19 ADD HL,DE ; ADD IT TO BUFFER TOP -2302 EFE7 3E FF LD A,$FF ; ASSUME OVERFLOW FAILURE -2303 EFE9 38 0E JR C,ALLOC1 ; IF OVERFLOW, BYPASS WITH A == $FF -2304 EFEB E5 PUSH HL ; SAVE IT -2305 EFEC 11 00 02 LD DE,$10000 - CBIOS_END ; SETUP DE FOR OVERFLOW TEST -2306 EFEF 19 ADD HL,DE ; CHECK FOR OVERFLOW -2307 EFF0 E1 POP HL ; RECOVER HL -2308 EFF1 3E FF LD A,$FF ; ASSUME FAILURE -2309 EFF3 38 04 JR C,ALLOC1 ; IF OVERFLOW, CONTINUE WITH A == $FF -2310 EFF5 22 8C F0 LD (BUFTOP),HL ; SAVE NEW TOP -2311 EFF8 3C INC A ; SIGNAL SUCCESS -2312 EFF9 ; -2313 EFF9 ALLOC1: -2314 EFF9 C1 POP BC ; BUF START ADDRESS TO BC -2315 EFFA E1 POP HL ; RESTORE ORIGINAL HL -2316 EFFB D1 POP DE ; RESTORE ORIGINAL DE -2317 EFFC B7 OR A ; SIGNAL SUCCESS -2318 EFFD C9 RET -2319 EFFE ; -2320 EFFE ERR_BUFOVF: -2321 EFFE 11 C8 F0 LD DE,STR_BUFOVF -2322 F001 18 05 JR ERR -2323 F003 ; -2324 F003 ERR_INVMED: -2325 F003 11 E5 F0 LD DE,STR_INVMED -2326 F006 18 00 JR ERR -2327 F008 ; -2328 F008 ERR: -2329 F008 CD 56 EA CALL WRITESTR -2330 F00B F6 FF OR $FF -2331 F00D C9 RET -2332 F00E ; -2333 F00E PRTDUS: -2334 F00E ; -2335 F00E ; PRINT THE DEVICE/UNIT/SLICE INFO -2336 F00E ; ON INPUT D HAS DEVICE/UNIT, E HAS SLICE -2337 F00E ; DESTROY NO REGISTERS OTHER THAN A -2338 F00E ; -2339 F00E~ #IF (PLATFORM == PLT_UNA) -2340 F00E~ ; -2341 F00E~ PUSH BC ; PRESERVE BC -2342 F00E~ PUSH DE ; PRESERVE DE -2343 F00E~ PUSH HL ; PRESERVE HL -2344 F00E~ -2345 F00E~ LD B,D ; B := UNIT -2346 F00E~ LD C,$48 ; UNA FUNC: GET DISK TYPE -2347 F00E~ CALL $FFFD ; CALL UNA -2348 F00E~ LD A,D ; DISK TYPE TO A -2349 F00E~ -2350 F00E~ CP $40 -2351 F00E~ JR Z,PRTDUS1 ; IF SO, HANDLE RAM/ROM -2352 F00E~ -2353 F00E~ LD DE,DEVIDE ; IDE STRING -2354 F00E~ CP $41 ; IDE? -2355 F00E~ JR Z,PRTDUSX ; IF YES, PRINT -2356 F00E~ LD DE,DEVPPIDE ; PPIDE STRING -2357 F00E~ CP $42 ; PPIDE? -2358 F00E~ JR Z,PRTDUSX ; IF YES, PRINT -2359 F00E~ LD DE,DEVSD ; SD STRING -2360 F00E~ CP $43 ; SD? -2361 F00E~ JR Z,PRTDUSX ; IF YES, PRINT -2362 F00E~ LD DE,DEVDSD ; DSD STRING -2363 F00E~ CP $44 ; DSD? -2364 F00E~ JR Z,PRTDUSX ; IF YES, PRINT -2365 F00E~ -2366 F00E~ LD DE,DEVUNK ; OTHERWISE, UNKNOWN -2367 F00E~ JR PRTDUSX ; PRINT IT -2368 F00E~ -2369 F00E~ PRTDUS1: -2370 F00E~ LD C,$45 ; UNA FUNC: GET DISK INFO -2371 F00E~ LD DE,$9000 ; 512 BYTE BUFFER *** FIX!!! *** -2372 F00E~ CALL $FFFD ; CALL UNA -2373 F00E~ BIT 7,B ; TEST RAM DRIVE BIT -2374 F00E~ LD DE,DEVROM ; ASSUME ROM -2375 F00E~ JR Z,PRTDUSX ; IF SO, DISPLAY ROM -2376 F00E~ LD DE,DEVRAM ; ELSE RAM -2377 F00E~ JR Z,PRTDUSX ; DO IT -2378 F00E~ -2379 F00E~ PRTDUSX: -2380 F00E~ CALL WRITESTR ; PRINT DEVICE NAME -2381 F00E~ POP HL ; RECOVER HL -2382 F00E~ POP DE ; RECOVER DE -2383 F00E~ POP BC ; RECOVER BC -2384 F00E~ LD A,D ; LOAD DEVICE/UNIT -2385 F00E~ CALL PRTDECB ; PRINT IT -2386 F00E~ CALL PC_COLON ; FORMATTING -2387 F00E~ LD A,E ; LOAD SLICE -2388 F00E~ CALL PRTDECB ; PRINT IT -2389 F00E~ RET -2390 F00E~ ; -2391 F00E~ DEVRAM .DB "RAM$" -2392 F00E~ DEVROM .DB "ROM$" -2393 F00E~ DEVIDE .DB "IDE$" -2394 F00E~ DEVPPIDE .DB "PPIDE$" -2395 F00E~ DEVSD .DB "SD$" -2396 F00E~ DEVDSD .DB "DSD$" -2397 F00E~ DEVUNK .DB "UNK$" -2398 F00E~ ; -2399 F00E #ELSE -2400 F00E ; -2401 F00E D5 PUSH DE ; PRESERVE DE -2402 F00F E5 PUSH HL ; PRESERVE HL -2403 F010 7A LD A,D ; LOAD DEVICE/UNIT -2404 F011 0F RRCA ; ROTATE DEVICE -2405 F012 0F RRCA ; ... BITS -2406 F013 0F RRCA ; ... INTO -2407 F014 0F RRCA ; ... LOWEST 4 BITS -2408 F015 E6 0F AND $0F ; ISOLATE DEVICE BITS -2409 F017 87 ADD A,A ; MULTIPLE BY TWO FOR WORD TABLE -2410 F018 21 35 F0 LD HL,DEVTBL ; POINT TO START OF DEVICE NAME TABLE -2411 F01B CD 0B EB CALL ADDHLA ; ADD A TO HL TO POINT TO TABLE ENTRY -2412 F01E 7E LD A,(HL) ; DEREFERENCE HL TO LOC OF DEVICE NAME STRING -2413 F01F 23 INC HL ; ... -2414 F020 56 LD D,(HL) ; ... -2415 F021 5F LD E,A ; ... -2416 F022 CD 56 EA CALL WRITESTR ; PRINT THE DEVICE NMEMONIC -2417 F025 E1 POP HL ; RECOVER HL -2418 F026 D1 POP DE ; RECOVER DE -2419 F027 7A LD A,D ; LOAD DEVICE/UNIT -2420 F028 E6 0F AND $0F ; ISOLATE UNIT -2421 F02A CD 4D EB CALL PRTDECB ; PRINT IT -2422 F02D CD E0 E9 CALL PC_COLON ; FORMATTING -2423 F030 7B LD A,E ; LOAD SLICE -2424 F031 CD 4D EB CALL PRTDECB ; PRINT IT -2425 F034 C9 RET -2426 F035 ; -2427 F035 DEVTBL: ; DEVICE TABLE -2428 F035 59 F0 5C F0 .DW DEV00, DEV01, DEV02, DEV03 -2428 F039 5F F0 64 F0 -2429 F03D 68 F0 6E F0 .DW DEV04, DEV05, DEV06, DEV07 -2429 F041 74 F0 77 F0 -2430 F045 7D F0 83 F0 .DW DEV08, DEV09, DEV10, DEV11 -2430 F049 55 F0 55 F0 -2431 F04D 55 F0 55 F0 .DW DEV12, DEV13, DEV14, DEV15 -2431 F051 55 F0 55 F0 -2432 F055 ; -2433 F055 3F 3F 3F 24 DEVUNK .DB "???$" -2434 F059 4D 44 24 DEV00 .DB "MD$" -2435 F05C 46 44 24 DEV01 .DB "FD$" -2436 F05F 52 41 4D 46 DEV02 .DB "RAMF$" -2436 F063 24 -2437 F064 49 44 45 24 DEV03 .DB "IDE$" -2438 F068 41 54 41 50 DEV04 .DB "ATAPI$" -2438 F06C 49 24 -2439 F06E 50 50 49 44 DEV05 .DB "PPIDE$" -2439 F072 45 24 -2440 F074 53 44 24 DEV06 .DB "SD$" -2441 F077 50 52 50 53 DEV07 .DB "PRPSD$" -2441 F07B 44 24 -2442 F07D 50 50 50 53 DEV08 .DB "PPPSD$" -2442 F081 44 24 -2443 F083 48 44 53 4B DEV09 .DB "HDSK$" -2443 F087 24 -2444 F088 DEV10 .EQU DEVUNK -2445 F088 DEV11 .EQU DEVUNK -2446 F088 DEV12 .EQU DEVUNK -2447 F088 DEV13 .EQU DEVUNK -2448 F088 DEV14 .EQU DEVUNK -2449 F088 DEV15 .EQU DEVUNK -2450 F088 ; -2451 F088 #ENDIF -2452 F088 ; -2453 F088 00 00 DPHTOP .DW 0 ; CURRENT TOP OF DPH POOL -2454 F08A 00 00 DIRBUF .DW 0 ; DIR BUF POINTER -2455 F08C 81 EC BUFTOP .DW BUFPOOL ; CURRENT TOP OF BUF POOL -2456 F08E 00 00 BOOTVOL .DW ; BOOT VOLUME, MSB=BOOT DEVICE/UNIT, LSB=BOOT LU -2457 F090 ; -2458 F090 0D 0A 46 6F STR_INITRAMDISK .DB "\r\nFormatting RAMDISK...$" -2458 F094 72 6D 61 74 -2458 F098 74 69 6E 67 -2458 F09C 20 52 41 4D -2458 F0A0 44 49 53 4B -2458 F0A4 2E 2E 2E 24 -2459 F0A8 0D 0A 20 20 STR_LDR .DB "\r\n $" -2459 F0AC 20 24 -2460 F0AE 0D 0A 0D 0A STR_DPHINIT .DB "\r\n\r\nConfiguring Drives...$" -2460 F0B2 43 6F 6E 66 -2460 F0B6 69 67 75 72 -2460 F0BA 69 6E 67 20 -2460 F0BE 44 72 69 76 -2460 F0C2 65 73 2E 2E -2460 F0C6 2E 24 -2461 F0C8 20 2A 2A 2A STR_BUFOVF .DB " *** Insufficient Memory ***$" -2461 F0CC 20 49 6E 73 -2461 F0D0 75 66 66 69 -2461 F0D4 63 69 65 6E -2461 F0D8 74 20 4D 65 -2461 F0DC 6D 6F 72 79 -2461 F0E0 20 2A 2A 2A -2461 F0E4 24 -2462 F0E5 20 2A 2A 2A STR_INVMED .DB " *** Invalid Device ID ***$" -2462 F0E9 20 49 6E 76 -2462 F0ED 61 6C 69 64 -2462 F0F1 20 44 65 76 -2462 F0F5 69 63 65 20 -2462 F0F9 49 44 20 2A -2462 F0FD 2A 2A 24 -2463 F100 ; -2464 F100 ;================================================================================================== -2465 F100 ; -2466 F100 ;================================================================================================== -2467 F100 ; -2468 F100 00 00 00 00 .FILL CBIOS_END - $,$00 -2468 F104 00 00 00 00 -2468 F108 00 00 00 00 -2468 F10C 00 00 00 00 -2468 F110 00 00 00 00 -2468 F114 00 00 00 00 -2468 F118 00 00 00 00 -2468 F11C 00 00 00 00 -2468 F120 00 00 00 00 -2468 F124 00 00 00 00 -2468 F128 00 00 00 00 -2468 F12C 00 00 00 00 -2468 F130 00 00 00 00 -2468 F134 00 00 00 00 -2468 F138 00 00 00 00 -2468 F13C 00 00 00 00 -2468 F140 00 00 00 00 -2468 F144 00 00 00 00 -2468 F148 00 00 00 00 -2468 F14C 00 00 00 00 -2468 F150 00 00 00 00 -2468 F154 00 00 00 00 -2468 F158 00 00 00 00 -2468 F15C 00 00 00 00 -2468 F160 00 00 00 00 -2468 F164 00 00 00 00 -2468 F168 00 00 00 00 -2468 F16C 00 00 00 00 -2468 F170 00 00 00 00 -2468 F174 00 00 00 00 -2468 F178 00 00 00 00 -2468 F17C 00 00 00 00 -2468 F180 00 00 00 00 -2468 F184 00 00 00 00 -2468 F188 00 00 00 00 -2468 F18C 00 00 00 00 -2468 F190 00 00 00 00 -2468 F194 00 00 00 00 -2468 F198 00 00 00 00 -2468 F19C 00 00 00 00 -2468 F1A0 00 00 00 00 -2468 F1A4 00 00 00 00 -2468 F1A8 00 00 00 00 -2468 F1AC 00 00 00 00 -2468 F1B0 00 00 00 00 -2468 F1B4 00 00 00 00 -2468 F1B8 00 00 00 00 -2468 F1BC 00 00 00 00 -2468 F1C0 00 00 00 00 -2468 F1C4 00 00 00 00 -2468 F1C8 00 00 00 00 -2468 F1CC 00 00 00 00 -2468 F1D0 00 00 00 00 -2468 F1D4 00 00 00 00 -2468 F1D8 00 00 00 00 -2468 F1DC 00 00 00 00 -2468 F1E0 00 00 00 00 -2468 F1E4 00 00 00 00 -2468 F1E8 00 00 00 00 -2468 F1EC 00 00 00 00 -2468 F1F0 00 00 00 00 -2468 F1F4 00 00 00 00 -2468 F1F8 00 00 00 00 -2468 F1FC 00 00 00 00 -2468 F200 00 00 00 00 -2468 F204 00 00 00 00 -2468 F208 00 00 00 00 -2468 F20C 00 00 00 00 -2468 F210 00 00 00 00 -2468 F214 00 00 00 00 -2468 F218 00 00 00 00 -2468 F21C 00 00 00 00 -2468 F220 00 00 00 00 -2468 F224 00 00 00 00 -2468 F228 00 00 00 00 -2468 F22C 00 00 00 00 -2468 F230 00 00 00 00 -2468 F234 00 00 00 00 -2468 F238 00 00 00 00 -2468 F23C 00 00 00 00 -2468 F240 00 00 00 00 -2468 F244 00 00 00 00 -2468 F248 00 00 00 00 -2468 F24C 00 00 00 00 -2468 F250 00 00 00 00 -2468 F254 00 00 00 00 -2468 F258 00 00 00 00 -2468 F25C 00 00 00 00 -2468 F260 00 00 00 00 -2468 F264 00 00 00 00 -2468 F268 00 00 00 00 -2468 F26C 00 00 00 00 -2468 F270 00 00 00 00 -2468 F274 00 00 00 00 -2468 F278 00 00 00 00 -2468 F27C 00 00 00 00 -2468 F280 00 00 00 00 -2468 F284 00 00 00 00 -2468 F288 00 00 00 00 -2468 F28C 00 00 00 00 -2468 F290 00 00 00 00 -2468 F294 00 00 00 00 -2468 F298 00 00 00 00 -2468 F29C 00 00 00 00 -2468 F2A0 00 00 00 00 -2468 F2A4 00 00 00 00 -2468 F2A8 00 00 00 00 -2468 F2AC 00 00 00 00 -2468 F2B0 00 00 00 00 -2468 F2B4 00 00 00 00 -2468 F2B8 00 00 00 00 -2468 F2BC 00 00 00 00 -2468 F2C0 00 00 00 00 -2468 F2C4 00 00 00 00 -2468 F2C8 00 00 00 00 -2468 F2CC 00 00 00 00 -2468 F2D0 00 00 00 00 -2468 F2D4 00 00 00 00 -2468 F2D8 00 00 00 00 -2468 F2DC 00 00 00 00 -2468 F2E0 00 00 00 00 -2468 F2E4 00 00 00 00 -2468 F2E8 00 00 00 00 -2468 F2EC 00 00 00 00 -2468 F2F0 00 00 00 00 -2468 F2F4 00 00 00 00 -2468 F2F8 00 00 00 00 -2468 F2FC 00 00 00 00 -2468 F300 00 00 00 00 -2468 F304 00 00 00 00 -2468 F308 00 00 00 00 -2468 F30C 00 00 00 00 -2468 F310 00 00 00 00 -2468 F314 00 00 00 00 -2468 F318 00 00 00 00 -2468 F31C 00 00 00 00 -2468 F320 00 00 00 00 -2468 F324 00 00 00 00 -2468 F328 00 00 00 00 -2468 F32C 00 00 00 00 -2468 F330 00 00 00 00 -2468 F334 00 00 00 00 -2468 F338 00 00 00 00 -2468 F33C 00 00 00 00 -2468 F340 00 00 00 00 -2468 F344 00 00 00 00 -2468 F348 00 00 00 00 -2468 F34C 00 00 00 00 -2468 F350 00 00 00 00 -2468 F354 00 00 00 00 -2468 F358 00 00 00 00 -2468 F35C 00 00 00 00 -2468 F360 00 00 00 00 -2468 F364 00 00 00 00 -2468 F368 00 00 00 00 -2468 F36C 00 00 00 00 -2468 F370 00 00 00 00 -2468 F374 00 00 00 00 -2468 F378 00 00 00 00 -2468 F37C 00 00 00 00 -2468 F380 00 00 00 00 -2468 F384 00 00 00 00 -2468 F388 00 00 00 00 -2468 F38C 00 00 00 00 -2468 F390 00 00 00 00 -2468 F394 00 00 00 00 -2468 F398 00 00 00 00 -2468 F39C 00 00 00 00 -2468 F3A0 00 00 00 00 -2468 F3A4 00 00 00 00 -2468 F3A8 00 00 00 00 -2468 F3AC 00 00 00 00 -2468 F3B0 00 00 00 00 -2468 F3B4 00 00 00 00 -2468 F3B8 00 00 00 00 -2468 F3BC 00 00 00 00 -2468 F3C0 00 00 00 00 -2468 F3C4 00 00 00 00 -2468 F3C8 00 00 00 00 -2468 F3CC 00 00 00 00 -2468 F3D0 00 00 00 00 -2468 F3D4 00 00 00 00 -2468 F3D8 00 00 00 00 -2468 F3DC 00 00 00 00 -2468 F3E0 00 00 00 00 -2468 F3E4 00 00 00 00 -2468 F3E8 00 00 00 00 -2468 F3EC 00 00 00 00 -2468 F3F0 00 00 00 00 -2468 F3F4 00 00 00 00 -2468 F3F8 00 00 00 00 -2468 F3FC 00 00 00 00 -2468 F400 00 00 00 00 -2468 F404 00 00 00 00 -2468 F408 00 00 00 00 -2468 F40C 00 00 00 00 -2468 F410 00 00 00 00 -2468 F414 00 00 00 00 -2468 F418 00 00 00 00 -2468 F41C 00 00 00 00 -2468 F420 00 00 00 00 -2468 F424 00 00 00 00 -2468 F428 00 00 00 00 -2468 F42C 00 00 00 00 -2468 F430 00 00 00 00 -2468 F434 00 00 00 00 -2468 F438 00 00 00 00 -2468 F43C 00 00 00 00 -2468 F440 00 00 00 00 -2468 F444 00 00 00 00 -2468 F448 00 00 00 00 -2468 F44C 00 00 00 00 -2468 F450 00 00 00 00 -2468 F454 00 00 00 00 -2468 F458 00 00 00 00 -2468 F45C 00 00 00 00 -2468 F460 00 00 00 00 -2468 F464 00 00 00 00 -2468 F468 00 00 00 00 -2468 F46C 00 00 00 00 -2468 F470 00 00 00 00 -2468 F474 00 00 00 00 -2468 F478 00 00 00 00 -2468 F47C 00 00 00 00 -2468 F480 00 00 00 00 -2468 F484 00 00 00 00 -2468 F488 00 00 00 00 -2468 F48C 00 00 00 00 -2468 F490 00 00 00 00 -2468 F494 00 00 00 00 -2468 F498 00 00 00 00 -2468 F49C 00 00 00 00 -2468 F4A0 00 00 00 00 -2468 F4A4 00 00 00 00 -2468 F4A8 00 00 00 00 -2468 F4AC 00 00 00 00 -2468 F4B0 00 00 00 00 -2468 F4B4 00 00 00 00 -2468 F4B8 00 00 00 00 -2468 F4BC 00 00 00 00 -2468 F4C0 00 00 00 00 -2468 F4C4 00 00 00 00 -2468 F4C8 00 00 00 00 -2468 F4CC 00 00 00 00 -2468 F4D0 00 00 00 00 -2468 F4D4 00 00 00 00 -2468 F4D8 00 00 00 00 -2468 F4DC 00 00 00 00 -2468 F4E0 00 00 00 00 -2468 F4E4 00 00 00 00 -2468 F4E8 00 00 00 00 -2468 F4EC 00 00 00 00 -2468 F4F0 00 00 00 00 -2468 F4F4 00 00 00 00 -2468 F4F8 00 00 00 00 -2468 F4FC 00 00 00 00 -2468 F500 00 00 00 00 -2468 F504 00 00 00 00 -2468 F508 00 00 00 00 -2468 F50C 00 00 00 00 -2468 F510 00 00 00 00 -2468 F514 00 00 00 00 -2468 F518 00 00 00 00 -2468 F51C 00 00 00 00 -2468 F520 00 00 00 00 -2468 F524 00 00 00 00 -2468 F528 00 00 00 00 -2468 F52C 00 00 00 00 -2468 F530 00 00 00 00 -2468 F534 00 00 00 00 -2468 F538 00 00 00 00 -2468 F53C 00 00 00 00 -2468 F540 00 00 00 00 -2468 F544 00 00 00 00 -2468 F548 00 00 00 00 -2468 F54C 00 00 00 00 -2468 F550 00 00 00 00 -2468 F554 00 00 00 00 -2468 F558 00 00 00 00 -2468 F55C 00 00 00 00 -2468 F560 00 00 00 00 -2468 F564 00 00 00 00 -2468 F568 00 00 00 00 -2468 F56C 00 00 00 00 -2468 F570 00 00 00 00 -2468 F574 00 00 00 00 -2468 F578 00 00 00 00 -2468 F57C 00 00 00 00 -2468 F580 00 00 00 00 -2468 F584 00 00 00 00 -2468 F588 00 00 00 00 -2468 F58C 00 00 00 00 -2468 F590 00 00 00 00 -2468 F594 00 00 00 00 -2468 F598 00 00 00 00 -2468 F59C 00 00 00 00 -2468 F5A0 00 00 00 00 -2468 F5A4 00 00 00 00 -2468 F5A8 00 00 00 00 -2468 F5AC 00 00 00 00 -2468 F5B0 00 00 00 00 -2468 F5B4 00 00 00 00 -2468 F5B8 00 00 00 00 -2468 F5BC 00 00 00 00 -2468 F5C0 00 00 00 00 -2468 F5C4 00 00 00 00 -2468 F5C8 00 00 00 00 -2468 F5CC 00 00 00 00 -2468 F5D0 00 00 00 00 -2468 F5D4 00 00 00 00 -2468 F5D8 00 00 00 00 -2468 F5DC 00 00 00 00 -2468 F5E0 00 00 00 00 -2468 F5E4 00 00 00 00 -2468 F5E8 00 00 00 00 -2468 F5EC 00 00 00 00 -2468 F5F0 00 00 00 00 -2468 F5F4 00 00 00 00 -2468 F5F8 00 00 00 00 -2468 F5FC 00 00 00 00 -2468 F600 00 00 00 00 -2468 F604 00 00 00 00 -2468 F608 00 00 00 00 -2468 F60C 00 00 00 00 -2468 F610 00 00 00 00 -2468 F614 00 00 00 00 -2468 F618 00 00 00 00 -2468 F61C 00 00 00 00 -2468 F620 00 00 00 00 -2468 F624 00 00 00 00 -2468 F628 00 00 00 00 -2468 F62C 00 00 00 00 -2468 F630 00 00 00 00 -2468 F634 00 00 00 00 -2468 F638 00 00 00 00 -2468 F63C 00 00 00 00 -2468 F640 00 00 00 00 -2468 F644 00 00 00 00 -2468 F648 00 00 00 00 -2468 F64C 00 00 00 00 -2468 F650 00 00 00 00 -2468 F654 00 00 00 00 -2468 F658 00 00 00 00 -2468 F65C 00 00 00 00 -2468 F660 00 00 00 00 -2468 F664 00 00 00 00 -2468 F668 00 00 00 00 -2468 F66C 00 00 00 00 -2468 F670 00 00 00 00 -2468 F674 00 00 00 00 -2468 F678 00 00 00 00 -2468 F67C 00 00 00 00 -2468 F680 00 00 00 00 -2468 F684 00 00 00 00 -2468 F688 00 00 00 00 -2468 F68C 00 00 00 00 -2468 F690 00 00 00 00 -2468 F694 00 00 00 00 -2468 F698 00 00 00 00 -2468 F69C 00 00 00 00 -2468 F6A0 00 00 00 00 -2468 F6A4 00 00 00 00 -2468 F6A8 00 00 00 00 -2468 F6AC 00 00 00 00 -2468 F6B0 00 00 00 00 -2468 F6B4 00 00 00 00 -2468 F6B8 00 00 00 00 -2468 F6BC 00 00 00 00 -2468 F6C0 00 00 00 00 -2468 F6C4 00 00 00 00 -2468 F6C8 00 00 00 00 -2468 F6CC 00 00 00 00 -2468 F6D0 00 00 00 00 -2468 F6D4 00 00 00 00 -2468 F6D8 00 00 00 00 -2468 F6DC 00 00 00 00 -2468 F6E0 00 00 00 00 -2468 F6E4 00 00 00 00 -2468 F6E8 00 00 00 00 -2468 F6EC 00 00 00 00 -2468 F6F0 00 00 00 00 -2468 F6F4 00 00 00 00 -2468 F6F8 00 00 00 00 -2468 F6FC 00 00 00 00 -2468 F700 00 00 00 00 -2468 F704 00 00 00 00 -2468 F708 00 00 00 00 -2468 F70C 00 00 00 00 -2468 F710 00 00 00 00 -2468 F714 00 00 00 00 -2468 F718 00 00 00 00 -2468 F71C 00 00 00 00 -2468 F720 00 00 00 00 -2468 F724 00 00 00 00 -2468 F728 00 00 00 00 -2468 F72C 00 00 00 00 -2468 F730 00 00 00 00 -2468 F734 00 00 00 00 -2468 F738 00 00 00 00 -2468 F73C 00 00 00 00 -2468 F740 00 00 00 00 -2468 F744 00 00 00 00 -2468 F748 00 00 00 00 -2468 F74C 00 00 00 00 -2468 F750 00 00 00 00 -2468 F754 00 00 00 00 -2468 F758 00 00 00 00 -2468 F75C 00 00 00 00 -2468 F760 00 00 00 00 -2468 F764 00 00 00 00 -2468 F768 00 00 00 00 -2468 F76C 00 00 00 00 -2468 F770 00 00 00 00 -2468 F774 00 00 00 00 -2468 F778 00 00 00 00 -2468 F77C 00 00 00 00 -2468 F780 00 00 00 00 -2468 F784 00 00 00 00 -2468 F788 00 00 00 00 -2468 F78C 00 00 00 00 -2468 F790 00 00 00 00 -2468 F794 00 00 00 00 -2468 F798 00 00 00 00 -2468 F79C 00 00 00 00 -2468 F7A0 00 00 00 00 -2468 F7A4 00 00 00 00 -2468 F7A8 00 00 00 00 -2468 F7AC 00 00 00 00 -2468 F7B0 00 00 00 00 -2468 F7B4 00 00 00 00 -2468 F7B8 00 00 00 00 -2468 F7BC 00 00 00 00 -2468 F7C0 00 00 00 00 -2468 F7C4 00 00 00 00 -2468 F7C8 00 00 00 00 -2468 F7CC 00 00 00 00 -2468 F7D0 00 00 00 00 -2468 F7D4 00 00 00 00 -2468 F7D8 00 00 00 00 -2468 F7DC 00 00 00 00 -2468 F7E0 00 00 00 00 -2468 F7E4 00 00 00 00 -2468 F7E8 00 00 00 00 -2468 F7EC 00 00 00 00 -2468 F7F0 00 00 00 00 -2468 F7F4 00 00 00 00 -2468 F7F8 00 00 00 00 -2468 F7FC 00 00 00 00 -2468 F800 00 00 00 00 -2468 F804 00 00 00 00 -2468 F808 00 00 00 00 -2468 F80C 00 00 00 00 -2468 F810 00 00 00 00 -2468 F814 00 00 00 00 -2468 F818 00 00 00 00 -2468 F81C 00 00 00 00 -2468 F820 00 00 00 00 -2468 F824 00 00 00 00 -2468 F828 00 00 00 00 -2468 F82C 00 00 00 00 -2468 F830 00 00 00 00 -2468 F834 00 00 00 00 -2468 F838 00 00 00 00 -2468 F83C 00 00 00 00 -2468 F840 00 00 00 00 -2468 F844 00 00 00 00 -2468 F848 00 00 00 00 -2468 F84C 00 00 00 00 -2468 F850 00 00 00 00 -2468 F854 00 00 00 00 -2468 F858 00 00 00 00 -2468 F85C 00 00 00 00 -2468 F860 00 00 00 00 -2468 F864 00 00 00 00 -2468 F868 00 00 00 00 -2468 F86C 00 00 00 00 -2468 F870 00 00 00 00 -2468 F874 00 00 00 00 -2468 F878 00 00 00 00 -2468 F87C 00 00 00 00 -2468 F880 00 00 00 00 -2468 F884 00 00 00 00 -2468 F888 00 00 00 00 -2468 F88C 00 00 00 00 -2468 F890 00 00 00 00 -2468 F894 00 00 00 00 -2468 F898 00 00 00 00 -2468 F89C 00 00 00 00 -2468 F8A0 00 00 00 00 -2468 F8A4 00 00 00 00 -2468 F8A8 00 00 00 00 -2468 F8AC 00 00 00 00 -2468 F8B0 00 00 00 00 -2468 F8B4 00 00 00 00 -2468 F8B8 00 00 00 00 -2468 F8BC 00 00 00 00 -2468 F8C0 00 00 00 00 -2468 F8C4 00 00 00 00 -2468 F8C8 00 00 00 00 -2468 F8CC 00 00 00 00 -2468 F8D0 00 00 00 00 -2468 F8D4 00 00 00 00 -2468 F8D8 00 00 00 00 -2468 F8DC 00 00 00 00 -2468 F8E0 00 00 00 00 -2468 F8E4 00 00 00 00 -2468 F8E8 00 00 00 00 -2468 F8EC 00 00 00 00 -2468 F8F0 00 00 00 00 -2468 F8F4 00 00 00 00 -2468 F8F8 00 00 00 00 -2468 F8FC 00 00 00 00 -2468 F900 00 00 00 00 -2468 F904 00 00 00 00 -2468 F908 00 00 00 00 -2468 F90C 00 00 00 00 -2468 F910 00 00 00 00 -2468 F914 00 00 00 00 -2468 F918 00 00 00 00 -2468 F91C 00 00 00 00 -2468 F920 00 00 00 00 -2468 F924 00 00 00 00 -2468 F928 00 00 00 00 -2468 F92C 00 00 00 00 -2468 F930 00 00 00 00 -2468 F934 00 00 00 00 -2468 F938 00 00 00 00 -2468 F93C 00 00 00 00 -2468 F940 00 00 00 00 -2468 F944 00 00 00 00 -2468 F948 00 00 00 00 -2468 F94C 00 00 00 00 -2468 F950 00 00 00 00 -2468 F954 00 00 00 00 -2468 F958 00 00 00 00 -2468 F95C 00 00 00 00 -2468 F960 00 00 00 00 -2468 F964 00 00 00 00 -2468 F968 00 00 00 00 -2468 F96C 00 00 00 00 -2468 F970 00 00 00 00 -2468 F974 00 00 00 00 -2468 F978 00 00 00 00 -2468 F97C 00 00 00 00 -2468 F980 00 00 00 00 -2468 F984 00 00 00 00 -2468 F988 00 00 00 00 -2468 F98C 00 00 00 00 -2468 F990 00 00 00 00 -2468 F994 00 00 00 00 -2468 F998 00 00 00 00 -2468 F99C 00 00 00 00 -2468 F9A0 00 00 00 00 -2468 F9A4 00 00 00 00 -2468 F9A8 00 00 00 00 -2468 F9AC 00 00 00 00 -2468 F9B0 00 00 00 00 -2468 F9B4 00 00 00 00 -2468 F9B8 00 00 00 00 -2468 F9BC 00 00 00 00 -2468 F9C0 00 00 00 00 -2468 F9C4 00 00 00 00 -2468 F9C8 00 00 00 00 -2468 F9CC 00 00 00 00 -2468 F9D0 00 00 00 00 -2468 F9D4 00 00 00 00 -2468 F9D8 00 00 00 00 -2468 F9DC 00 00 00 00 -2468 F9E0 00 00 00 00 -2468 F9E4 00 00 00 00 -2468 F9E8 00 00 00 00 -2468 F9EC 00 00 00 00 -2468 F9F0 00 00 00 00 -2468 F9F4 00 00 00 00 -2468 F9F8 00 00 00 00 -2468 F9FC 00 00 00 00 -2468 FA00 00 00 00 00 -2468 FA04 00 00 00 00 -2468 FA08 00 00 00 00 -2468 FA0C 00 00 00 00 -2468 FA10 00 00 00 00 -2468 FA14 00 00 00 00 -2468 FA18 00 00 00 00 -2468 FA1C 00 00 00 00 -2468 FA20 00 00 00 00 -2468 FA24 00 00 00 00 -2468 FA28 00 00 00 00 -2468 FA2C 00 00 00 00 -2468 FA30 00 00 00 00 -2468 FA34 00 00 00 00 -2468 FA38 00 00 00 00 -2468 FA3C 00 00 00 00 -2468 FA40 00 00 00 00 -2468 FA44 00 00 00 00 -2468 FA48 00 00 00 00 -2468 FA4C 00 00 00 00 -2468 FA50 00 00 00 00 -2468 FA54 00 00 00 00 -2468 FA58 00 00 00 00 -2468 FA5C 00 00 00 00 -2468 FA60 00 00 00 00 -2468 FA64 00 00 00 00 -2468 FA68 00 00 00 00 -2468 FA6C 00 00 00 00 -2468 FA70 00 00 00 00 -2468 FA74 00 00 00 00 -2468 FA78 00 00 00 00 -2468 FA7C 00 00 00 00 -2468 FA80 00 00 00 00 -2468 FA84 00 00 00 00 -2468 FA88 00 00 00 00 -2468 FA8C 00 00 00 00 -2468 FA90 00 00 00 00 -2468 FA94 00 00 00 00 -2468 FA98 00 00 00 00 -2468 FA9C 00 00 00 00 -2468 FAA0 00 00 00 00 -2468 FAA4 00 00 00 00 -2468 FAA8 00 00 00 00 -2468 FAAC 00 00 00 00 -2468 FAB0 00 00 00 00 -2468 FAB4 00 00 00 00 -2468 FAB8 00 00 00 00 -2468 FABC 00 00 00 00 -2468 FAC0 00 00 00 00 -2468 FAC4 00 00 00 00 -2468 FAC8 00 00 00 00 -2468 FACC 00 00 00 00 -2468 FAD0 00 00 00 00 -2468 FAD4 00 00 00 00 -2468 FAD8 00 00 00 00 -2468 FADC 00 00 00 00 -2468 FAE0 00 00 00 00 -2468 FAE4 00 00 00 00 -2468 FAE8 00 00 00 00 -2468 FAEC 00 00 00 00 -2468 FAF0 00 00 00 00 -2468 FAF4 00 00 00 00 -2468 FAF8 00 00 00 00 -2468 FAFC 00 00 00 00 -2468 FB00 00 00 00 00 -2468 FB04 00 00 00 00 -2468 FB08 00 00 00 00 -2468 FB0C 00 00 00 00 -2468 FB10 00 00 00 00 -2468 FB14 00 00 00 00 -2468 FB18 00 00 00 00 -2468 FB1C 00 00 00 00 -2468 FB20 00 00 00 00 -2468 FB24 00 00 00 00 -2468 FB28 00 00 00 00 -2468 FB2C 00 00 00 00 -2468 FB30 00 00 00 00 -2468 FB34 00 00 00 00 -2468 FB38 00 00 00 00 -2468 FB3C 00 00 00 00 -2468 FB40 00 00 00 00 -2468 FB44 00 00 00 00 -2468 FB48 00 00 00 00 -2468 FB4C 00 00 00 00 -2468 FB50 00 00 00 00 -2468 FB54 00 00 00 00 -2468 FB58 00 00 00 00 -2468 FB5C 00 00 00 00 -2468 FB60 00 00 00 00 -2468 FB64 00 00 00 00 -2468 FB68 00 00 00 00 -2468 FB6C 00 00 00 00 -2468 FB70 00 00 00 00 -2468 FB74 00 00 00 00 -2468 FB78 00 00 00 00 -2468 FB7C 00 00 00 00 -2468 FB80 00 00 00 00 -2468 FB84 00 00 00 00 -2468 FB88 00 00 00 00 -2468 FB8C 00 00 00 00 -2468 FB90 00 00 00 00 -2468 FB94 00 00 00 00 -2468 FB98 00 00 00 00 -2468 FB9C 00 00 00 00 -2468 FBA0 00 00 00 00 -2468 FBA4 00 00 00 00 -2468 FBA8 00 00 00 00 -2468 FBAC 00 00 00 00 -2468 FBB0 00 00 00 00 -2468 FBB4 00 00 00 00 -2468 FBB8 00 00 00 00 -2468 FBBC 00 00 00 00 -2468 FBC0 00 00 00 00 -2468 FBC4 00 00 00 00 -2468 FBC8 00 00 00 00 -2468 FBCC 00 00 00 00 -2468 FBD0 00 00 00 00 -2468 FBD4 00 00 00 00 -2468 FBD8 00 00 00 00 -2468 FBDC 00 00 00 00 -2468 FBE0 00 00 00 00 -2468 FBE4 00 00 00 00 -2468 FBE8 00 00 00 00 -2468 FBEC 00 00 00 00 -2468 FBF0 00 00 00 00 -2468 FBF4 00 00 00 00 -2468 FBF8 00 00 00 00 -2468 FBFC 00 00 00 00 -2468 FC00 00 00 00 00 -2468 FC04 00 00 00 00 -2468 FC08 00 00 00 00 -2468 FC0C 00 00 00 00 -2468 FC10 00 00 00 00 -2468 FC14 00 00 00 00 -2468 FC18 00 00 00 00 -2468 FC1C 00 00 00 00 -2468 FC20 00 00 00 00 -2468 FC24 00 00 00 00 -2468 FC28 00 00 00 00 -2468 FC2C 00 00 00 00 -2468 FC30 00 00 00 00 -2468 FC34 00 00 00 00 -2468 FC38 00 00 00 00 -2468 FC3C 00 00 00 00 -2468 FC40 00 00 00 00 -2468 FC44 00 00 00 00 -2468 FC48 00 00 00 00 -2468 FC4C 00 00 00 00 -2468 FC50 00 00 00 00 -2468 FC54 00 00 00 00 -2468 FC58 00 00 00 00 -2468 FC5C 00 00 00 00 -2468 FC60 00 00 00 00 -2468 FC64 00 00 00 00 -2468 FC68 00 00 00 00 -2468 FC6C 00 00 00 00 -2468 FC70 00 00 00 00 -2468 FC74 00 00 00 00 -2468 FC78 00 00 00 00 -2468 FC7C 00 00 00 00 -2468 FC80 00 00 00 00 -2468 FC84 00 00 00 00 -2468 FC88 00 00 00 00 -2468 FC8C 00 00 00 00 -2468 FC90 00 00 00 00 -2468 FC94 00 00 00 00 -2468 FC98 00 00 00 00 -2468 FC9C 00 00 00 00 -2468 FCA0 00 00 00 00 -2468 FCA4 00 00 00 00 -2468 FCA8 00 00 00 00 -2468 FCAC 00 00 00 00 -2468 FCB0 00 00 00 00 -2468 FCB4 00 00 00 00 -2468 FCB8 00 00 00 00 -2468 FCBC 00 00 00 00 -2468 FCC0 00 00 00 00 -2468 FCC4 00 00 00 00 -2468 FCC8 00 00 00 00 -2468 FCCC 00 00 00 00 -2468 FCD0 00 00 00 00 -2468 FCD4 00 00 00 00 -2468 FCD8 00 00 00 00 -2468 FCDC 00 00 00 00 -2468 FCE0 00 00 00 00 -2468 FCE4 00 00 00 00 -2468 FCE8 00 00 00 00 -2468 FCEC 00 00 00 00 -2468 FCF0 00 00 00 00 -2468 FCF4 00 00 00 00 -2468 FCF8 00 00 00 00 -2468 FCFC 00 00 00 00 -2468 FD00 00 00 00 00 -2468 FD04 00 00 00 00 -2468 FD08 00 00 00 00 -2468 FD0C 00 00 00 00 -2468 FD10 00 00 00 00 -2468 FD14 00 00 00 00 -2468 FD18 00 00 00 00 -2468 FD1C 00 00 00 00 -2468 FD20 00 00 00 00 -2468 FD24 00 00 00 00 -2468 FD28 00 00 00 00 -2468 FD2C 00 00 00 00 -2468 FD30 00 00 00 00 -2468 FD34 00 00 00 00 -2468 FD38 00 00 00 00 -2468 FD3C 00 00 00 00 -2468 FD40 00 00 00 00 -2468 FD44 00 00 00 00 -2468 FD48 00 00 00 00 -2468 FD4C 00 00 00 00 -2468 FD50 00 00 00 00 -2468 FD54 00 00 00 00 -2468 FD58 00 00 00 00 -2468 FD5C 00 00 00 00 -2468 FD60 00 00 00 00 -2468 FD64 00 00 00 00 -2468 FD68 00 00 00 00 -2468 FD6C 00 00 00 00 -2468 FD70 00 00 00 00 -2468 FD74 00 00 00 00 -2468 FD78 00 00 00 00 -2468 FD7C 00 00 00 00 -2468 FD80 00 00 00 00 -2468 FD84 00 00 00 00 -2468 FD88 00 00 00 00 -2468 FD8C 00 00 00 00 -2468 FD90 00 00 00 00 -2468 FD94 00 00 00 00 -2468 FD98 00 00 00 00 -2468 FD9C 00 00 00 00 -2468 FDA0 00 00 00 00 -2468 FDA4 00 00 00 00 -2468 FDA8 00 00 00 00 -2468 FDAC 00 00 00 00 -2468 FDB0 00 00 00 00 -2468 FDB4 00 00 00 00 -2468 FDB8 00 00 00 00 -2468 FDBC 00 00 00 00 -2468 FDC0 00 00 00 00 -2468 FDC4 00 00 00 00 -2468 FDC8 00 00 00 00 -2468 FDCC 00 00 00 00 -2468 FDD0 00 00 00 00 -2468 FDD4 00 00 00 00 -2468 FDD8 00 00 00 00 -2468 FDDC 00 00 00 00 -2468 FDE0 00 00 00 00 -2468 FDE4 00 00 00 00 -2468 FDE8 00 00 00 00 -2468 FDEC 00 00 00 00 -2468 FDF0 00 00 00 00 -2468 FDF4 00 00 00 00 -2468 FDF8 00 00 00 00 -2468 FDFC 00 00 00 00 -2469 FE00 ; -2470 FE00 SLACK .EQU (CBIOS_END - BUFPOOL) -2471 FE00 .ECHO "CBIOS buffer space: " -2472 FE00 .ECHO SLACK -2473 FE00 .ECHO " bytes.\n" -2474 FE00 ; -2475 FE00 .ECHO "CBIOS total space used: " -2476 FE00 .ECHO $ - CBIOS_LOC -2477 FE00 .ECHO " bytes.\n" -2478 FE00 ; -2479 FE00 ; PAD OUT AREA RESERVED FOR HBIOS PROXY -2480 FE00 FF FF FF FF .FILL $10000 - $ -2480 FE04 FF FF FF FF -2480 FE08 FF FF FF FF -2480 FE0C FF FF FF FF -2480 FE10 FF FF FF FF -2480 FE14 FF FF FF FF -2480 FE18 FF FF FF FF -2480 FE1C FF FF FF FF -2480 FE20 FF FF FF FF -2480 FE24 FF FF FF FF -2480 FE28 FF FF FF FF -2480 FE2C FF FF FF FF -2480 FE30 FF FF FF FF -2480 FE34 FF FF FF FF -2480 FE38 FF FF FF FF -2480 FE3C FF FF FF FF -2480 FE40 FF FF FF FF -2480 FE44 FF FF FF FF -2480 FE48 FF FF FF FF -2480 FE4C FF FF FF FF -2480 FE50 FF FF FF FF -2480 FE54 FF FF FF FF -2480 FE58 FF FF FF FF -2480 FE5C FF FF FF FF -2480 FE60 FF FF FF FF -2480 FE64 FF FF FF FF -2480 FE68 FF FF FF FF -2480 FE6C FF FF FF FF -2480 FE70 FF FF FF FF -2480 FE74 FF FF FF FF -2480 FE78 FF FF FF FF -2480 FE7C FF FF FF FF -2480 FE80 FF FF FF FF -2480 FE84 FF FF FF FF -2480 FE88 FF FF FF FF -2480 FE8C FF FF FF FF -2480 FE90 FF FF FF FF -2480 FE94 FF FF FF FF -2480 FE98 FF FF FF FF -2480 FE9C FF FF FF FF -2480 FEA0 FF FF FF FF -2480 FEA4 FF FF FF FF -2480 FEA8 FF FF FF FF -2480 FEAC FF FF FF FF -2480 FEB0 FF FF FF FF -2480 FEB4 FF FF FF FF -2480 FEB8 FF FF FF FF -2480 FEBC FF FF FF FF -2480 FEC0 FF FF FF FF -2480 FEC4 FF FF FF FF -2480 FEC8 FF FF FF FF -2480 FECC FF FF FF FF -2480 FED0 FF FF FF FF -2480 FED4 FF FF FF FF -2480 FED8 FF FF FF FF -2480 FEDC FF FF FF FF -2480 FEE0 FF FF FF FF -2480 FEE4 FF FF FF FF -2480 FEE8 FF FF FF FF -2480 FEEC FF FF FF FF -2480 FEF0 FF FF FF FF -2480 FEF4 FF FF FF FF -2480 FEF8 FF FF FF FF -2480 FEFC FF FF FF FF -2480 FF00 FF FF FF FF -2480 FF04 FF FF FF FF -2480 FF08 FF FF FF FF -2480 FF0C FF FF FF FF -2480 FF10 FF FF FF FF -2480 FF14 FF FF FF FF -2480 FF18 FF FF FF FF -2480 FF1C FF FF FF FF -2480 FF20 FF FF FF FF -2480 FF24 FF FF FF FF -2480 FF28 FF FF FF FF -2480 FF2C FF FF FF FF -2480 FF30 FF FF FF FF -2480 FF34 FF FF FF FF -2480 FF38 FF FF FF FF -2480 FF3C FF FF FF FF -2480 FF40 FF FF FF FF -2480 FF44 FF FF FF FF -2480 FF48 FF FF FF FF -2480 FF4C FF FF FF FF -2480 FF50 FF FF FF FF -2480 FF54 FF FF FF FF -2480 FF58 FF FF FF FF -2480 FF5C FF FF FF FF -2480 FF60 FF FF FF FF -2480 FF64 FF FF FF FF -2480 FF68 FF FF FF FF -2480 FF6C FF FF FF FF -2480 FF70 FF FF FF FF -2480 FF74 FF FF FF FF -2480 FF78 FF FF FF FF -2480 FF7C FF FF FF FF -2480 FF80 FF FF FF FF -2480 FF84 FF FF FF FF -2480 FF88 FF FF FF FF -2480 FF8C FF FF FF FF -2480 FF90 FF FF FF FF -2480 FF94 FF FF FF FF -2480 FF98 FF FF FF FF -2480 FF9C FF FF FF FF -2480 FFA0 FF FF FF FF -2480 FFA4 FF FF FF FF -2480 FFA8 FF FF FF FF -2480 FFAC FF FF FF FF -2480 FFB0 FF FF FF FF -2480 FFB4 FF FF FF FF -2480 FFB8 FF FF FF FF -2480 FFBC FF FF FF FF -2480 FFC0 FF FF FF FF -2480 FFC4 FF FF FF FF -2480 FFC8 FF FF FF FF -2480 FFCC FF FF FF FF -2480 FFD0 FF FF FF FF -2480 FFD4 FF FF FF FF -2480 FFD8 FF FF FF FF -2480 FFDC FF FF FF FF -2480 FFE0 FF FF FF FF -2480 FFE4 FF FF FF FF -2480 FFE8 FF FF FF FF -2480 FFEC FF FF FF FF -2480 FFF0 FF FF FF FF -2480 FFF4 FF FF FF FF -2480 FFF8 FF FF FF FF -2480 FFFC FF FF FF FF -2481 10000 ; -2482 10000 .END -tasm: Number of errors = 0 diff --git a/Source/CBIOS/config.asm b/Source/CBIOS/config.asm index 59e4fed8..6031d4bc 100644 --- a/Source/CBIOS/config.asm +++ b/Source/CBIOS/config.asm @@ -1,20 +1,18 @@ ; -;================================================================================================== -; ROMWBW 2.X CONFIGURATION FOR SIMH EMULATOR -;================================================================================================== +; CBIOS BUILD CONFIGURATION OPTIONS ; -; BUILD CONFIGURATION OPTIONS -; -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -; -RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_ALWAYS ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) -; -;DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) -; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) +CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS ; #DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M +; +CPM_LOC .EQU $D000 ; LOCATION OF START OF CCP +; +#IFDEF PLTWBW +CPM_END .EQU $FE00 ; ROMWBW HBIOS PROXY OCCUPIES TOP 2 PAGES OF MEMORY +#ENDIF +; +#IFDEF PLTUNA +CPM_END .EQU $FF00 ; UNA UBIOS PROXY OCCUPIES TOP 1 PAGE OF MEMORY +#ENDIF diff --git a/Source/CBIOS/n8vem.inc b/Source/CBIOS/n8vem.inc deleted file mode 100644 index 4ba6d0ed..00000000 --- a/Source/CBIOS/n8vem.inc +++ /dev/null @@ -1,25 +0,0 @@ -; -; N8VEM HARDWARE IO PORT ADDRESSES AND MEMORY LOCATIONS -; -RTC .EQU $70 ; ADDRESS OF RTC LATCH AND INPUT PORT -; -; MEMORY BANK CONFIGURATION -; -BID_ROM0 .EQU $00 -BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1)) -BID_RAM0 .EQU $80 -BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1)) - -BID_BOOT .EQU BID_ROM0 ; BOOT BANK -BID_BIOSIMG .EQU BID_ROM0 + 1 ; BIOS IMAGE BANK -BID_OSIMG .EQU BID_ROM0 + 2 ; ROM LOADER AND IMAGES BANK -BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK -BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK -BID_ROMDN .EQU BID_ROMN ; LAST ROM DRIVE BANK - -BID_RAMD0 .EQU BID_RAM0 ; FIRST RAM DRIVE BANK -BID_RAMDN .EQU BID_RAMN - 4 ; LAST RAM DRIVE BANK -BID_AUX .EQU BID_RAMN - 3 ; AUX BANK (BPBIOS, ETC.) -BID_BIOS .EQU BID_RAMN - 2 ; BIOS BANK -BID_USR .EQU BID_RAMN - 1 ; USER BANK (CP/M TPA, ETC.) -BID_COM .EQU BID_RAMN ; COMMON BANK, UPPER 32K diff --git a/Source/CBIOS/std-n8vem.inc b/Source/CBIOS/std-n8vem.inc deleted file mode 100644 index 3c3aad30..00000000 --- a/Source/CBIOS/std-n8vem.inc +++ /dev/null @@ -1,36 +0,0 @@ -; -; CHARACTER DEVICES -; -CIODEV_UART .EQU $00 -CIODEV_ASCI .EQU $10 -CIODEV_VDU .EQU $20 -CIODEV_CVDU .EQU $30 -CIODEV_UPD7220 .EQU $40 -CIODEV_N8V .EQU $50 -CIODEV_PRPCON .EQU $60 -CIODEV_PPPCON .EQU $70 -CIODEV_CONSOLE .EQU $C0 -CIODEV_CRT .EQU $D0 -CIODEV_BAT .EQU $E0 -CIODEV_NUL .EQU $F0 -; -; DISK DEVICES (ONLY FIRST NIBBLE RELEVANT, SECOND NIBBLE RESERVED FOR UNIT) -; -DIODEV_MD .EQU $00 -DIODEV_FD .EQU $10 -DIODEV_RF .EQU $20 -DIODEV_IDE .EQU $30 -DIODEV_ATAPI .EQU $40 -DIODEV_PPIDE .EQU $50 -DIODEV_SD .EQU $60 -DIODEV_PRPSD .EQU $70 -DIODEV_PPPSD .EQU $80 -DIODEV_HDSK .EQU $90 -; -; VDA DEVICES (VIDEO DISPLAY ADAPTER) -; -VDADEV_NONE .EQU $00 ; NO VDA DEVICE -VDADEV_VDU .EQU $10 ; ECB VDU - 6545 CHIP -VDADEV_CVDU .EQU $20 ; ECB COLOR VDU - 8563 CHIP (NOT IMP) -VDADEV_UPD7220 .EQU $30 ; ECB uP7220 (NOT IMPLEMENTED) -VDADEV_N8V .EQU $40 ; N8 ONBOARD VDA SUBSYSTEM diff --git a/Source/CBIOS/std.asm b/Source/CBIOS/std.asm deleted file mode 100644 index d3006359..00000000 --- a/Source/CBIOS/std.asm +++ /dev/null @@ -1,308 +0,0 @@ -; ~/RomWBW/branches/s100/Source/std.asm 1/19/2013 dwg - -; - -; The purpose of this file is to define generic symbols and to include -; the appropriate std-*.inc file to bring in platform specifics. - -; There are four classes of systems supported by N8VEM. -; 1. N8VEM Platforms that include ECB interface -; 2. ZETA Genrally N8VEM-like, but no ECB -; 3. N8 Generally N8VEM-like bt 180 and extra embedded devices -; 4. S100 Assumes Z80 Master CPU Card - -; All the classes require certain generic definitions, and these are -; defined here prior to the inclusion of platform specific .inc files. - -; It is unfortunate, but all the possible config items must be defined -; here because the config gets read before the specific std-*.inc's - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; -TRUE .EQU 1 -FALSE .EQU 0 -; -; PRIMARY HARDWARE PLATFORMS -; -PLT_N8VEM .EQU 1 ; N8VEM ECB Z80 SBC -PLT_ZETA .EQU 2 ; ZETA Z80 SBC -PLT_N8 .EQU 3 ; N8 (HOME COMPUTER) Z180 SBC -PLT_MK4 .EQU 4 -PLT_S2I .EQU 5 ; SCSI2IDE -PLT_S100 .EQU 6 ; S100COMPUTERS Z80 based system -PLT_UNA .EQU 7 ; UNA BIOS -; -; RAM DISK INITIALIZATION OPTIONS -; -CLR_NEVER .EQU 0 ; NEVER CLEAR RAM DISK -CLR_AUTO .EQU 1 ; CLEAR RAM DISK IF INVALID DIR ENTRIES -CLR_ALWAYS .EQU 2 ; ALWAYS CLEAR RAM DISK -; -; FLOPPY DISK MEDIA SELECTIONS (ID'S MUST BE INDEX OF ENTRY IN FCD_TBL) -; -FDM720 .EQU 0 ; 3.5" FLOPPY, 720KB, 2 SIDES, 80 TRKS, 9 SECTORS -FDM144 .EQU 1 ; 3.5" FLOPPY, 1.44MB, 2 SIDES, 80 TRKS, 18 SECTORS -FDM360 .EQU 2 ; 5.25" FLOPPY, 360KB, 2 SIDES, 40 TRKS, 9 SECTORS -FDM120 .EQU 3 ; 5.25" FLOPPY, 1.2MB, 2 SIDES, 80 TRKS, 15 SECTORS -FDM111 .EQU 4 ; 8" FLOPPY, 1.11MB, 2 SIDES, 74 TRKS, 15 SECTORS -; -; MEDIA ID VALUES -; -MID_NONE .EQU 0 -MID_MDROM .EQU 1 -MID_MDRAM .EQU 2 -MID_RF .EQU 3 -MID_HD .EQU 4 -MID_FD720 .EQU 5 -MID_FD144 .EQU 6 -MID_FD360 .EQU 7 -MID_FD120 .EQU 8 -MID_FD111 .EQU 9 -; -; CONSOLE TERMINAL TYPE CHOICES -; -TERM_TTY .EQU 0 -TERM_ANSI .EQU 1 -TERM_WYSE .EQU 2 -TERM_VT52 .EQU 3 -; -; EMULATION TYPES -; -EMUTYP_NONE .EQU 0 -EMUTYP_TTY .EQU 1 -EMUTYP_ANSI .EQU 2 -; -; SYSTEM GENERATION SETTINGS -; -SYS_CPM .EQU 1 ; CPM (IMPLIES BDOS + CCP) -SYS_ZSYS .EQU 2 ; ZSYSTEM OS (IMPLIES ZSDOS + ZCPR) -; -DOS_BDOS .EQU 1 ; BDOS -DOS_ZDDOS .EQU 2 ; ZDDOS VARIANT OF ZSDOS -DOS_ZSDOS .EQU 3 ; ZSDOS -; -CP_CCP .EQU 1 ; CCP COMMAND PROCESSOR -CP_ZCPR .EQU 2 ; ZCPR COMMAND PROCESSOR -; -; CONFIGURE DOS (DOS) AND COMMAND PROCESSOR (CP) BASED ON SYSTEM SETTING (SYS) -; -#IFNDEF BLD_SYS -SYS .EQU SYS_CPM -#ELSE -SYS .EQU BLD_SYS -#ENDIF -; -#IF (SYS == SYS_CPM) -DOS .EQU DOS_BDOS -CP .EQU CP_CCP -#DEFINE OSLBL "CP/M-80 2.2" -#ENDIF -; -#IF (SYS == SYS_ZSYS) -DOS .EQU DOS_ZSDOS -CP .EQU CP_ZCPR -#DEFINE OSLBL "ZSDOS 1.1" -#ENDIF -; -; INCLUDE VERSION AND BUILD SETTINGS -; -#INCLUDE "ver.inc" ; ADD BIOSVER -; -#INCLUDE "build.inc" ; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE -; -; INCLUDE PLATFORM SPECIFIC HARDWARE DEFINITIONS -; -#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA)) -#INCLUDE "n8vem.inc" -#ENDIF -; -#IF (PLATFORM == PLT_S2I) -#INCLUDE "s2i.inc" -#ENDIF -; -#IF (PLATFORM == PLT_N8) -#INCLUDE "n8.inc" -#ENDIF -; -#IF (PLATFORM == PLT_MK4) -#INCLUDE "mk4.inc" -#ENDIF -; -#IF (PLATFORM == PLT_UNA) -#INCLUDE "una.inc" -#ENDIF -; -; CHARACTER DEVICE FUNCTIONS -; -CF_INIT .EQU 0 -CF_IN .EQU 1 -CF_IST .EQU 2 -CF_OUT .EQU 3 -CF_OST .EQU 4 -; -; DISK OPERATIONS -; -DOP_READ .EQU 0 ; READ OPERATION -DOP_WRITE .EQU 1 ; WRITE OPERATION -DOP_FORMAT .EQU 2 ; FORMAT OPERATION -DOP_READID .EQU 3 ; READ ID OPERATION -; -; BIOS FUNCTIONS -; -#IF (PLATFORM == PLT_UNA) -BF_CIO .EQU $10 -BF_CIOIN .EQU BF_CIO + 1 ; CHARACTER INPUT -BF_CIOOUT .EQU BF_CIO + 2 ; CHARACTER OUTPUT -BF_CIOIST .EQU BF_CIO + 3 ; CHARACTER INPUT STATUS -BF_CIOOST .EQU BF_CIO + 4 ; CHARACTER OUTPUT STATUS -; -BF_DIO .EQU $40 -BF_DIORD .EQU BF_DIO + 2 ; DISK READ -BF_DIOWR .EQU BF_DIO + 3 ; DISK WRITE -#ELSE -BF_CIO .EQU $00 -BF_CIOIN .EQU BF_CIO + 0 ; CHARACTER INPUT -BF_CIOOUT .EQU BF_CIO + 1 ; CHARACTER OUTPUT -BF_CIOIST .EQU BF_CIO + 2 ; CHARACTER INPUT STATUS -BF_CIOOST .EQU BF_CIO + 3 ; CHARACTER OUTPUT STATUS -BF_CIOCFG .EQU BF_CIO + 4 ; CHARACTER I/O CONFIG -; -BF_DIO .EQU $10 -BF_DIORD .EQU BF_DIO + 0 ; DISK READ -BF_DIOWR .EQU BF_DIO + 1 ; DISK WRITE -BF_DIOST .EQU BF_DIO + 2 ; DISK STATUS -BF_DIOMED .EQU BF_DIO + 3 ; DISK MEDIA -BF_DIOID .EQU BF_DIO + 4 ; DISK IDENTIFY -BF_DIOGETBUF .EQU BF_DIO + 8 ; DISK GET BUFFER ADR -BF_DIOSETBUF .EQU BF_DIO + 9 ; DISK SET BUFFER ADR -BF_DIODEVCNT .EQU BF_DIO + 10 ; DISK DEVICE COUNT -BF_DIODEVINF .EQU BF_DIO + 11 ; DISK DEVICE INFO -; -BF_RTC .EQU $20 -BF_RTCGETTIM .EQU BF_RTC + 0 ; GET TIME -BF_RTCSETTIM .EQU BF_RTC + 1 ; SET TIME -BF_RTCGETBYT .EQU BF_RTC + 2 ; GET NVRAM BYTE BY INDEX -BF_RTCSETBYT .EQU BF_RTC + 3 ; SET NVRAM BYTE BY INDEX -BF_RTCGETBLK .EQU BF_RTC + 4 ; GET NVRAM DATA BLOCK -BF_RTCSETBLK .EQU BF_RTC + 5 ; SET NVRAM DATA BLOCK -; -BF_EMU .EQU $30 -BF_EMUIN .EQU BF_EMU + 0 ; EMULATOR CHARACTER INPUT -BF_EMUOUT .EQU BF_EMU + 1 ; EMULATOR CHARACTER OUTPUT -BF_EMUIST .EQU BF_EMU + 2 ; EMULATOR CHARACTER INPUT STATUS -BF_EMUOST .EQU BF_EMU + 3 ; EMULATOR CHARACTER OUTPUT STATUS -BF_EMUCFG .EQU BF_EMU + 4 ; EMULATOR CHARACTER I/O CONFIG -BF_EMUINI .EQU BF_EMU + 8 ; INITIALIZE EMULATION -BF_EMUQRY .EQU BF_EMU + 9 ; QUERY EMULATION STATUS -; -BF_VDA .EQU $40 -BF_VDAINI .EQU BF_VDA + 0 ; INITIALIZE VDU -BF_VDAQRY .EQU BF_VDA + 1 ; QUERY VDU STATUS -BF_VDARES .EQU BF_VDA + 2 ; SOFT RESET VDU -BF_VDASCS .EQU BF_VDA + 3 ; SET CURSOR STYLE -BF_VDASCP .EQU BF_VDA + 4 ; SET CURSOR POSITION -BF_VDASAT .EQU BF_VDA + 5 ; SET CHARACTER ATTRIBUTE -BF_VDASCO .EQU BF_VDA + 6 ; SET CHARACTER COLOR -BF_VDAWRC .EQU BF_VDA + 7 ; WRITE CHARACTER -BF_VDAFIL .EQU BF_VDA + 8 ; FILL -BF_VDACPY .EQU BF_VDA + 9 ; COPY -BF_VDASCR .EQU BF_VDA + 10 ; SCROLL -BF_VDAKST .EQU BF_VDA + 11 ; GET KEYBOARD STATUS -BF_VDAKFL .EQU BF_VDA + 12 ; FLUSH KEYBOARD BUFFER -BF_VDAKRD .EQU BF_VDA + 13 ; READ KEYBOARD -; -BF_SYS .EQU $F0 -BF_SYSSETBNK .EQU BF_SYS + 0 ; SET CURRENT BANK -BF_SYSGETBNK .EQU BF_SYS + 1 ; GET CURRENT BANK -BF_SYSCPY .EQU BF_SYS + 2 ; COPY TO/FROM RAM/ROM MEMORY BANK -BF_SYSXCPY .EQU BF_SYS + 3 ; EXTENDED COPY SETUP -BF_SYSATTR .EQU BF_SYS + 4 ; GET/SET SYSTEM ATTRIBUTE VALUE -;BF_SYSXXXX .EQU BF_SYS + 5 ; -BF_SYSGETVER .EQU BF_SYS + 6 ; GET VERSION OF HBIOS -#ENDIF -; -; SYSTEM ATTRIBUTE IDS -; -AID_BOOTVOL .EQU 0 ; BOOT VOLUME, MSB=DEV/UNIT, LSB=LU -AID_BOOTROM .EQU 0 ; BANK ID OF ROM PAGE BOOTED -; -; MEMORY LAYOUT -; -SYS_SIZ .EQU $3000 ; COMBINED SIZE OF SYSTEM AREA (OS + HBIOS PROXY) -HBBUF_SIZ .EQU 1024 ; INVARIANT HBIOS PHYSICAL DISK BUFFER, 1K -HBX_SIZ .EQU $200 ; HBIOS PROXY SIZE (SUBJECT TO CHANGE) -CPM_SIZ .EQU SYS_SIZ - HBX_SIZ ; NET SIZE OF ALL OS COMPONENTS (EXCLUDING HBIOS PROXY) -CCP_SIZ .EQU $800 ; INVARIANT SIZE OF CCP -BDOS_SIZ .EQU $E00 ; INVARIANT SIZE OF BDOS -CBIOS_SIZ .EQU CPM_SIZ - CCP_SIZ - BDOS_SIZ ; CBIOS IS THE REMAINDER - -MEMTOP .EQU $10000 ; INVARIANT TOP OF Z80 ADDRESSABLE MEMORY -BNKTOP .EQU $8000 ; BANK MEMORY BARRIER - -HBBUF_IMG .EQU BNKTOP - HBBUF_SIZ ; LOC OF DISK BUFFER IN HBIOS IMAGE BANK -HBX_IMG .EQU BNKTOP - HBX_SIZ ; LOC OF HBX IMAGE IN HBIOS IMAGE BANK - -HBBUF_END .EQU BNKTOP ; END OF PHYSICAL DISK BUFFER IN HBIOS -HBBUF_LOC .EQU HBBUF_END - HBBUF_SIZ ; START OF PHYSICAL DISK BUFFER -HBX_END .EQU MEMTOP ; END OF HBIOS PROXY -HBX_LOC .EQU HBX_END - HBX_SIZ ; START OF HBIOS PROXY -CPM_END .EQU HBX_LOC ; END OF CPM COMPONENTS (INCLUDING CBIOS) -CPM_LOC .EQU CPM_END - CPM_SIZ ; START OF CPM COMPONENTS -CBIOS_END .EQU HBX_LOC ; END OF CBIOS -CBIOS_LOC .EQU CBIOS_END - CBIOS_SIZ ; START OF CBIOS -BDOS_END .EQU CBIOS_LOC ; END OF BDOS -BDOS_LOC .EQU BDOS_END - BDOS_SIZ ; START OF BDOS -CCP_END .EQU BDOS_LOC ; END OF CCP -CCP_LOC .EQU CCP_END - CCP_SIZ ; START OF CCP - -CPM_ENT .EQU CBIOS_LOC ; CPM ENTRY POINT (IN CBIOS) -CCP_ENT .EQU CPM_LOC ; COMMAND PROCESSOR ENTRY POINT (IN CCP) - -MON_LOC .EQU $C000 ; LOCATION OF MONITOR FOR RUNNING SYSTEM -MON_SIZ .EQU $1000 ; SIZE OF MONITOR BINARY IMAGE -MON_END .EQU MON_LOC + MON_SIZ ; END OF MONITOR - -MON_DSKY .EQU MON_LOC + (0 * 3) ; MONITOR ENTRY (DSKY) -MON_SERIAL .EQU MON_LOC + (1 * 3) ; MONITOR ENTRY (SERIAL PORT) - -CBIOS_BOOT .EQU CBIOS_LOC + (0 * 3) -CBIOS_WBOOT .EQU CBIOS_LOC + (1 * 3) -CBIOS_CONST .EQU CBIOS_LOC + (2 * 3) -CBIOS_CONIN .EQU CBIOS_LOC + (3 * 3) -CBIOS_CONOUT .EQU CBIOS_LOC + (4 * 3) -CBIOS_LIST .EQU CBIOS_LOC + (5 * 3) -CBIOS_PUNCH .EQU CBIOS_LOC + (6 * 3) -CBIOS_READER .EQU CBIOS_LOC + (7 * 3) -CBIOS_HOME .EQU CBIOS_LOC + (8 * 3) -CBIOS_SELDSK .EQU CBIOS_LOC + (9 * 3) -CBIOS_SETTRK .EQU CBIOS_LOC + (10 * 3) -CBIOS_SETSEC .EQU CBIOS_LOC + (11 * 3) -CBIOS_SETDMA .EQU CBIOS_LOC + (12 * 3) -CBIOS_READ .EQU CBIOS_LOC + (13 * 3) -CBIOS_WRITE .EQU CBIOS_LOC + (14 * 3) -CBIOS_LISTST .EQU CBIOS_LOC + (15 * 3) -CBIOS_SECTRN .EQU CBIOS_LOC + (16 * 3) -; -CDISK: .EQU 4 ; LOC IN PAGE 0 OF CURRENT DISK NUMBER 0=A,...,15=P -IOBYTE: .EQU 3 ; LOC IN PAGE 0 OF I/O DEFINITION BYTE -; -; HBIOS PROXY COMMON DATA BLOCK -; EXACTLY 32 BYTES AT $FFE0-$FFFF -; -HBX_XFC .EQU $10000 - $20 ; HBIOS PROXY INTERFACE AREA, 32 BYTES FIXED -; -HBX_XFCDAT .EQU HBX_XFC ; DATA PORTION OF HBIOX PROXY INTERFACE AREA -HB_CURBNK .EQU HBX_XFCDAT + 0 ; CURRENTLY ACTIVE LOW MEMORY BANK ID -HB_PRVBNK .EQU HBX_XFCDAT + 1 ; PREVIOUS BANK (BANK SELECTED PRIOR TO CURRENT BANK) -HB_SRCADR .EQU HBX_XFCDAT + 2 ; BNKCPY: DESTINATION BANK ID -HB_SRCBNK .EQU HBX_XFCDAT + 4 ; BNKCPY: SOURCE BANK ID -HB_DSTADR .EQU HBX_XFCDAT + 5 ; BNKCPY: DESTINATION ADDRESS -HB_DSTBNK .EQU HBX_XFCDAT + 7 ; BNKCPY: SOURCE ADDRESS -HB_CNT .EQU HBX_XFCDAT + 8 ; BNKCPY: COUNT -; -HBX_XFCFNS .EQU HBX_XFC + $10 ; JUMP TABLE PORTION OF HBIOS PROXY INTERFACE AREA -HB_INVOKE .EQU HBX_XFCFNS + (0 * 3) ; INVOKE HBIOS FUNCTION -HB_BNKSEL .EQU HBX_XFCFNS + (1 * 3) ; SELECT LOW MEMORY BANK ID -HB_BNKCPY .EQU HBX_XFCFNS + (2 * 3) ; INTERBANK MEMORY COPY -HB_BNKCALL .EQU HBX_XFCFNS + (3 * 3) ; INTERBANK FUNCTION CALL -HB_LOC .EQU HBX_XFCFNS + 12 ; ADDRESS OF HBIOS PROXY START -HB_IDENT .EQU HBX_XFCFNS + 14 ; POINTER TO HBIOS IDENT DATA BLOCK diff --git a/Source/CBIOS/util.asm b/Source/CBIOS/util.asm index 71758d30..cdcaf9a6 100644 --- a/Source/CBIOS/util.asm +++ b/Source/CBIOS/util.asm @@ -83,61 +83,13 @@ PC_PRTCHR: POP AF RET +NEWLINE2: + CALL NEWLINE NEWLINE: CALL PC_CR CALL PC_LF RET ; -; PRINT THE HEX BYTE VALUE IN A -; -PRTHEXBYTE: - PUSH AF - PUSH DE - CALL HEXASCII - LD A,D - CALL COUT - LD A,E - CALL COUT - POP DE - POP AF - RET -; -; PRINT THE HEX WORD VALUE IN BC -; -PRTHEXWORD: - PUSH AF - LD A,B - CALL PRTHEXBYTE - LD A,C - CALL PRTHEXBYTE - POP AF - RET -; -; CONVERT BINARY VALUE IN A TO ASCII HEX CHARACTERS IN DE -; -HEXASCII: - LD D,A - CALL HEXCONV - LD E,A - LD A,D - RLCA - RLCA - RLCA - RLCA - CALL HEXCONV - LD D,A - RET -; -; CONVERT LOW NIBBLE OF A TO ASCII HEX -; -HEXCONV: - AND 0FH ;LOW NIBBLE ONLY - ADD A,90H - DAA - ADC A,40H - DAA - RET -; ; OUTPUT A '$' TERMINATED STRING ; WRITESTR: @@ -207,37 +159,13 @@ COUT: PUSH DE PUSH HL LD C,A - CALL CBIOS_CONOUT + CALL CONOUT POP HL POP DE POP BC POP AF RET ; -; INPUT CHARACTER TO A -; -CIN: - PUSH BC - PUSH DE - PUSH HL - CALL CBIOS_CONIN - POP HL - POP DE - POP BC - RET -; -; RETURN INPUT STATUS IN A (0 = NO CHAR, !=0 CHAR WAITING) -; -CST: - PUSH BC - PUSH DE - PUSH HL - CALL CBIOS_CONST - POP HL - POP DE - POP BC - RET -; STR_PANIC .DB "\r\n\r\n>>> FATAL ERROR:$" STR_AF .DB " AF=$" STR_BC .DB " BC=$" @@ -283,7 +211,7 @@ MULT8_NOADD: RET ; ; FILL MEMORY AT HL WITH VALUE A, LENGTH IN BC, ALL REGS USED -; LENGTH *MSUT* BE GREATER THAN 1 FOR PROPER OPERATION!!! +; LENGTH *MUST* BE GREATER THAN 1 FOR PROPER OPERATION!!! ; FILL: LD D,H ; SET DE TO HL @@ -294,51 +222,6 @@ FILL: LDIR ; DO THE REST RET ; RETURN ; -; SET A BIT IN BYTE ARRAY AT HL, INDEX IN A -; -BITSET: - CALL BITLOC ; LOCATE THE BIT - OR (HL) ; SET THE SPECIFIED BIT - LD (HL),A ; SAVE IT - RET ; RETURN -; -; CLEAR A BIT IN BYTE ARRAY AT HL, INDEX IN A -; -BITCLR: - CALL BITLOC ; LOCATE THE BIT - CPL ; INVERT ALL BITS - AND (HL) ; CLEAR SPECIFIED BIT - LD (HL),A ; SAVE IT - RET ; RETURN -; -; GET VALUE OF A BIT IN BYTE ARRAY AT HL, INDEX IN A -; -BITTST: - CALL BITLOC ; LOCATE THE BIT - AND (HL) ; SET Z FLAG BASED ON BIT - RET ; RETURN -; -; LOCATE A BIT IN BYTE ARRAY AT HL, INDEX IN A -; RETURN WITH HL POINTING TO BYTE AND A WITH MASK FOR SPECIFIC BIT -; -BITLOC: - PUSH AF ; SAVE BIT INDEX - SRL A ; DIVIDE BY 8 TO GET BYTE INDEX - SRL A ; " - SRL A ; " - LD C,A ; MOVE TO BC - LD B,0 ; " - ADD HL,BC ; HL NOW POINTS TO BYTE CONTAINING BIT - POP AF ; RECOVER A (INDEX) - AND $07 ; ISOLATE REMAINDER, Z SET IF ZERO - LD B,A ; SETUP SHIFT COUNTER - LD A,1 ; SETUP A WITH MASK - RET Z ; DONE IF ZERO -BITLOC1: - SLA A ; SHIFT - DJNZ BITLOC1 ; LOOP AS NEEDED - RET ; DONE -; ; PRINT VALUE OF A IN DECIMAL WITH LEADING ZERO SUPPRESSION ; PRTDECB: @@ -387,8 +270,52 @@ PRTDEC2: PRTDEC3: RET ; -;================================================================================================== -; DATA -;================================================================================================== +; PRINT THE HEX BYTE VALUE IN A +; +PRTHEXBYTE: + PUSH AF + PUSH DE + CALL HEXASCII + LD A,D + CALL COUT + LD A,E + CALL COUT + POP DE + POP AF + RET +; +; PRINT THE HEX WORD VALUE IN BC +; +PRTHEXWORD: + PUSH AF + LD A,B + CALL PRTHEXBYTE + LD A,C + CALL PRTHEXBYTE + POP AF + RET +; +; CONVERT BINARY VALUE IN A TO ASCII HEX CHARACTERS IN DE +; +HEXASCII: + LD D,A + CALL HEXCONV + LD E,A + LD A,D + RLCA + RLCA + RLCA + RLCA + CALL HEXCONV + LD D,A + RET +; +; CONVERT LOW NIBBLE OF A TO ASCII HEX ; -STR_EMPTY .TEXT "$" +HEXCONV: + AND 0FH ;LOW NIBBLE ONLY + ADD A,90H + DAA + ADC A,40H + DAA + RET diff --git a/Source/CBIOS/ver.inc b/Source/CBIOS/ver.inc index bc9d86ad..2e9018a2 100644 --- a/Source/CBIOS/ver.inc +++ b/Source/CBIOS/ver.inc @@ -1,7 +1,5 @@ #DEFINE RMJ 2 #DEFINE RMN 7 -#DEFINE RUP 0 +#DEFINE RUP 1 #DEFINE RTP 0 -#DEFINE BIOSVER "2.7.0" -#DEFINE BIOSBLD "Build 0 Developmental" -#DEFINE REVISION 500 +#DEFINE BIOSVER "2.7.1" diff --git a/Source/Clean.cmd b/Source/Clean.cmd index e87ccc0b..cb16f111 100644 --- a/Source/Clean.cmd +++ b/Source/Clean.cmd @@ -6,7 +6,8 @@ pushd CPM22 && call Clean.cmd && popd pushd ZCPR && call Clean.cmd && popd pushd ZCPR-DJ && call Clean.cmd && popd pushd ZSDOS && call Clean.cmd && popd +pushd CBIOS && call Clean.cmd && popd pushd BPBIOS && call Clean.cmd && popd -pushd BIOS && call Clean.cmd && popd +pushd HBIOS && call Clean.cmd && popd diff --git a/Source/BIOS/Build.cmd b/Source/HBIOS/Build.cmd similarity index 100% rename from Source/BIOS/Build.cmd rename to Source/HBIOS/Build.cmd diff --git a/Source/BIOS/Build.ps1 b/Source/HBIOS/Build.ps1 similarity index 81% rename from Source/BIOS/Build.ps1 rename to Source/HBIOS/Build.ps1 index ff3f9688..4eb4a6ab 100644 --- a/Source/BIOS/Build.ps1 +++ b/Source/HBIOS/Build.ps1 @@ -3,8 +3,8 @@ param([string]$Platform = "", [string]$Config = "", [string]$RomSize = "512", [s $Platform = $Platform.ToUpper() while ($true) { - if (($Platform -eq "N8VEM") -or ($Platform -eq "ZETA") -or ($Platform -eq "ZETA2") -or ($Platform -eq "N8") -or ($Platform -eq "MK4") -or ($Platform -eq "UNA") -or ($Platform -eq "S2I") -or ($Platform -eq "S100")) {break} - $Platform = (Read-Host -prompt "Platform [N8VEM|ZETA|ZETA2|N8|MK4|UNA|S2I|S100]").Trim().ToUpper() + if (($Platform -eq "SBC") -or ($Platform -eq "ZETA") -or ($Platform -eq "ZETA2") -or ($Platform -eq "N8") -or ($Platform -eq "MK4") -or ($Platform -eq "UNA")) {break} + $Platform = (Read-Host -prompt "Platform [SBC|ZETA|ZETA2|N8|MK4|UNA]").Trim().ToUpper() } while ($true) @@ -48,6 +48,7 @@ $RomDiskFile = "RomDisk.tmp" $RomFile = "${OutDir}/${RomName}.rom" $ComFile = "${OutDir}/${RomName}.com" $ImgFile = "${OutDir}/${RomName}.img" +if ($Platform -eq "UNA") {$CBiosFile = '../CBIOS/cbios_una.bin'} else {$CBiosFile = '../CBIOS/cbios_wbw.bin'} "" "Building ${RomName}: ${ROMSize}KB ROM configuration ${Config} for Z${CPUType}..." @@ -82,10 +83,6 @@ Function Concat($InputFileList, $OutputFile) PLATFORM .EQU PLT_${Platform} ; HARDWARE PLATFORM ROMSIZE .EQU ${ROMSize} ; SIZE OF ROM IN KB ; -; INCLUDE PLATFORM SPECIFIC DEVICE DEFINITIONS -; -#INCLUDE "std-n8vem.inc" -; #INCLUDE "${ConfigFile}" ; "@ | Out-File "build.inc" -Encoding ASCII @@ -96,8 +93,6 @@ Copy-Item '..\cpm22\os3bdos.bin' 'bdos.bin' Copy-Item '..\zcpr-dj\zcpr.bin' 'zcpr.bin' Copy-Item '..\zsdos\zsdos.bin' 'zsdos.bin' -Asm 'cbios' "-dBLD_SYS=SYS_CPM" -Output "cbios_cpm.bin" -Asm 'cbios' "-dBLD_SYS=SYS_ZSYS" -Output "cbios_zsys.bin" Asm 'dbgmon' Asm 'prefix' Asm 'romldr' @@ -115,8 +110,8 @@ if ($Platform -ne "UNA") "Building ${RomName} output files..." -Concat 'ccp.bin','bdos.bin','cbios_cpm.bin' 'cpm.bin' -Concat 'zcpr.bin','zsdos.bin','cbios_zsys.bin' 'zsys.bin' +Concat 'ccp.bin','bdos.bin',$CBiosFile 'cpm.bin' +Concat 'zcpr.bin','zsdos.bin',$CBiosFile 'zsys.bin' Concat 'prefix.bin','cpm.bin' 'cpm.sys' Concat 'prefix.bin','zsys.bin' 'zsys.sys' @@ -138,7 +133,7 @@ if ($Platform -eq "UNA") Copy-Item 'osimg.bin' ${OutDir}\UNA_WBW_SYS.bin Copy-Item $RomDiskFile ${OutDir}\UNA_WBW_ROM${ROMSize}.bin - Concat 'UNA\UNA-BIOS.BIN','osimg.bin','UNA\FSFAT.BIN',$RomDiskFile $RomFile + Concat '..\UBIOS\UNA-BIOS.BIN','osimg.bin','..\UBIOS\FSFAT.BIN',$RomDiskFile $RomFile } else { diff --git a/Source/BIOS/Clean.cmd b/Source/HBIOS/Clean.cmd similarity index 100% rename from Source/BIOS/Clean.cmd rename to Source/HBIOS/Clean.cmd diff --git a/Source/HBIOS/Config/mk4_cvdu.asm b/Source/HBIOS/Config/mk4_cvdu.asm new file mode 100644 index 00000000..0a78d2a0 --- /dev/null +++ b/Source/HBIOS/Config/mk4_cvdu.asm @@ -0,0 +1,113 @@ +; +;================================================================================================== +; ROMWBW 2.X CONFIGURATION FOR MARK IV +;================================================================================================== +; +; BUILD CONFIGURATION OPTIONS +; +CPUOSC .EQU 18432000 ; CPU OSC FREQ +RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_ASCI ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_VDA ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_CVDU ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) +; +DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) +; +SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER +DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER +; +UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER) +UARTCNT .EQU 0 ; NUMBER OF UARTS +; +ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT +ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_ASCIB0) +ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_ASCIB1) +; +VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT +CVDUENABLE .EQU TRUE ; TRUE FOR CVDU BOARD SUPPORT +UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT +N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT +; +MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) +MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) +; +FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT +FDMODE .EQU FDMODE_N8 ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3 +FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE) +FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE) +FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE) +FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY +; +RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS +; +IDEENABLE .EQU TRUE ; TRUE FOR IDE SUPPORT +IDEMODE .EQU IDEMODE_MK4 ; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_MK4 +IDECNT .EQU 1 ; NUMBER OF IDE UNITS +IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) +IDE8BIT .EQU TRUE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) +IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) +; +PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) +PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS +PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) +PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) +PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) +PPIDESLOW .EQU FALSE ; ADD DELAYS TO HELP PROBLEMATIC HARDWARE (TRY THIS IF PPIDE IS UNRELIABLE) +; +SDENABLE .EQU TRUE ; TRUE FOR SD SUPPORT +SDMODE .EQU SDMODE_MK4 ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD, SDMODE_MK4 +SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) +SDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) +SDCSIOFAST .EQU TRUE ; TABLE-DRIVEN BIT INVERTER +; +PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!) +PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE +PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT (FOR N8VEM PROPIO ONLY!) +PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE) +PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) +PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO) +; +PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT +PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT +PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE) +PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB) +PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO) +; +HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT +HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) +HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) +; +PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD +PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE) +KBDENABLE .EQU TRUE ; TRUE FOR PS/2 KEYBOARD ON I8242 +KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE) +; +TTYENABLE .EQU TRUE ; INCLUDE TTY EMULATION SUPPORT +ANSIENABLE .EQU TRUE ; INCLUDE ANSI EMULATION SUPPORT +ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE) +; +BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) +BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE +BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT +; +; 18.432MHz OSC @ FULL SPEED, 38.4Kbps +; +Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2 +Z180_MEMWAIT .EQU 3 ; MEMORY WAIT STATES TO INSERT (0-3) +Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3) +Z180_ASCIB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT +Z180_ASCIB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT +; +; 18.432MHz OSC @ DOUBLE SPEED, 38.4Kbps +; +;Z180_CLKDIV .EQU 2 ; 0=OSC/2, 1=OSC, 2=OSC*2 +;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3) +;Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3) +;Z180_ASCIB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT +;Z180_ASCIB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT diff --git a/Source/BIOS/Config/mk4_diskio3.asm b/Source/HBIOS/Config/mk4_diskio3.asm similarity index 74% rename from Source/BIOS/Config/mk4_diskio3.asm rename to Source/HBIOS/Config/mk4_diskio3.asm index 559e05c0..71984e4d 100644 --- a/Source/BIOS/Config/mk4_diskio3.asm +++ b/Source/HBIOS/Config/mk4_diskio3.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 18432 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_ASCI ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 18432000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_ASCI ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -27,19 +24,14 @@ UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER) UARTCNT .EQU 0 ; NUMBER OF UARTS ; ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT -ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0) -ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1) +ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_ASCIB0) +ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_ASCIB1) ; VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -51,15 +43,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_MK4 ; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_MK4 +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU TRUE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $20 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -101,20 +96,18 @@ BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTE BOOT_TIMEOUT .EQU 21 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT ; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M -; ; 18.432MHz OSC @ FULL SPEED, 38.4Kbps ; ;Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2 ;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3) ;Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3) -;Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT -;Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT +;Z180_ASCIB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT +;Z180_ASCIB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT ; ; 18.432MHz OSC @ DOUBLE SPEED, 38.4Kbps ; Z180_CLKDIV .EQU 2 ; 0=OSC/2, 1=OSC, 2=OSC*2 Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3) Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3) -Z180_CNTLB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT -Z180_CNTLB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT +Z180_ASCIB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT +Z180_ASCIB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT diff --git a/Source/BIOS/Config/mk4_propio.asm b/Source/HBIOS/Config/mk4_propio.asm similarity index 74% rename from Source/BIOS/Config/mk4_propio.asm rename to Source/HBIOS/Config/mk4_propio.asm index f319397a..d28cb26f 100644 --- a/Source/BIOS/Config/mk4_propio.asm +++ b/Source/HBIOS/Config/mk4_propio.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 18432 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_ASCI ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU CIODEV_PRPCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 18432000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_ASCI ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_PRPCON ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -27,19 +24,14 @@ UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER) UARTCNT .EQU 0 ; NUMBER OF UARTS ; ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT -ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0) -ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1) +ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_ASCIB0) +ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_ASCIB1) ; VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU $01 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -51,15 +43,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_MK4 ; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_MK4 +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU TRUE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -101,20 +96,18 @@ BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTE BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT ; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M -; ; 18.432MHz OSC @ FULL SPEED, 38.4Kbps ; ;Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2 ;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3) ;Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3) -;Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT -;Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT +;Z180_ASCIB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT +;Z180_ASCIB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT ; ; 18.432MHz OSC @ DOUBLE SPEED, 38.4Kbps ; Z180_CLKDIV .EQU 2 ; 0=OSC/2, 1=OSC, 2=OSC*2 Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3) Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3) -Z180_CNTLB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT -Z180_CNTLB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT +Z180_ASCIB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT +Z180_ASCIB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT diff --git a/Source/BIOS/Config/mk4_std.asm b/Source/HBIOS/Config/mk4_std.asm similarity index 67% rename from Source/BIOS/Config/mk4_std.asm rename to Source/HBIOS/Config/mk4_std.asm index 6a0f6673..316fa5e1 100644 --- a/Source/BIOS/Config/mk4_std.asm +++ b/Source/HBIOS/Config/mk4_std.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 18432 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_ASCI ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 18432000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_ASCI ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_VDA ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_CVDU ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -27,19 +24,14 @@ UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER) UARTCNT .EQU 0 ; NUMBER OF UARTS ; ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT -ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0) -ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1) +ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_ASCIB0) +ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_ASCIB1) ; VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -51,15 +43,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU TRUE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_MK4 ; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_MK4 +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU TRUE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -90,31 +85,29 @@ HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPKENABLE .EQU FALSE ; TRUE FOR PARALLEL PORT KEYBOARD PPKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPKENABLE = TRUE) -KBDENABLE .EQU FALSE ; TRUE FOR PS/2 KEYBOARD ON I8242 +KBDENABLE .EQU TRUE ; TRUE FOR PS/2 KEYBOARD ON I8242 KBDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF KBDENABLE = TRUE) ; -TTYENABLE .EQU FALSE ; INCLUDE TTY EMULATION SUPPORT -ANSIENABLE .EQU FALSE ; INCLUDE ANSI EMULATION SUPPORT +TTYENABLE .EQU TRUE ; INCLUDE TTY EMULATION SUPPORT +ANSIENABLE .EQU TRUE ; INCLUDE ANSI EMULATION SUPPORT ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABLE = TRUE) ; BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) -BOOT_TIMEOUT .EQU 21 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE +BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT ; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M -; ; 18.432MHz OSC @ FULL SPEED, 38.4Kbps ; -;Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2 -;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3) -;Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3) -;Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT -;Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT +Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2 +Z180_MEMWAIT .EQU 3 ; MEMORY WAIT STATES TO INSERT (0-3) +Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3) +Z180_ASCIB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT +Z180_ASCIB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT ; ; 18.432MHz OSC @ DOUBLE SPEED, 38.4Kbps ; -Z180_CLKDIV .EQU 2 ; 0=OSC/2, 1=OSC, 2=OSC*2 -Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3) -Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3) -Z180_CNTLB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT -Z180_CNTLB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT +;Z180_CLKDIV .EQU 2 ; 0=OSC/2, 1=OSC, 2=OSC*2 +;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3) +;Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3) +;Z180_ASCIB0 .EQU 21H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT +;Z180_ASCIB1 .EQU 21H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT diff --git a/Source/BIOS/Config/n8_2312.asm b/Source/HBIOS/Config/n8_2312.asm similarity index 74% rename from Source/BIOS/Config/n8_2312.asm rename to Source/HBIOS/Config/n8_2312.asm index a25c7456..d96ea873 100644 --- a/Source/BIOS/Config/n8_2312.asm +++ b/Source/HBIOS/Config/n8_2312.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 18432 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_ASCI ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_N8V ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 18432000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_ASCI ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_VDA ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_N8V ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -27,19 +24,14 @@ UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER) UARTCNT .EQU 0 ; NUMBER OF UARTS ; ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT -ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0) -ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1) +ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_ASCIB0) +ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_ASCIB1) ; VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU TRUE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -51,15 +43,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $80 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -101,10 +96,8 @@ BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTE BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT ; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M -; Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC/1 -Z180_MEMWAIT .EQU 0 ; MEMORY WAIT STATES TO INSERT (0-3) +Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3) Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3) -Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT -Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT +Z180_ASCIB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT +Z180_ASCIB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT diff --git a/Source/BIOS/Config/n8_2511.asm b/Source/HBIOS/Config/n8_2511.asm similarity index 74% rename from Source/BIOS/Config/n8_2511.asm rename to Source/HBIOS/Config/n8_2511.asm index ad8ebc2f..84a7e511 100644 --- a/Source/BIOS/Config/n8_2511.asm +++ b/Source/HBIOS/Config/n8_2511.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 18432 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_ASCI ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_ASCI ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_N8V ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 18432000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_ASCI ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_VDA ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_N8V ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -27,19 +24,14 @@ UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (N8 USES ASCI DRIVER) UARTCNT .EQU 0 ; NUMBER OF UARTS ; ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT -ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0) -ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_CNTLB1) +ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_ASCIB0) +ASCI1BAUD .EQU CONBAUD ; ASCI1 BAUDRATE (IMPLEMENTED BY Z180_ASCIB1) ; VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU TRUE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -51,15 +43,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $80 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -101,10 +96,8 @@ BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTE BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT ; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M -; Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC/1 -Z180_MEMWAIT .EQU 0 ; MEMORY WAIT STATES TO INSERT (0-3) +Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3) Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3) -Z180_CNTLB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT -Z180_CNTLB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT +Z180_ASCIB0 .EQU 20H ; SERIAL PORT 0 DIV, SEE Z180 CLOCKING DOCUMENT +Z180_ASCIB1 .EQU 20H ; SERIAL PORT 1 DIV, SEE Z180 CLOCKING DOCUMENT diff --git a/Source/BIOS/Config/n8vem_ci.asm b/Source/HBIOS/Config/sbc_ci.asm similarity index 79% rename from Source/BIOS/Config/n8vem_ci.asm rename to Source/HBIOS/Config/sbc_ci.asm index e1ec8839..957cdcd6 100644 --- a/Source/BIOS/Config/n8vem_ci.asm +++ b/Source/HBIOS/Config/sbc_ci.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,12 +23,12 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 2 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) UART1IOB .EQU $80 ; UART1 IOBASE IS $80 FOR CASSETTE INTERFACE -UART1OSC .EQU 1843200 ; UART 1 OSC FREQUENCY +UART1OSC .EQU 1843200 ; UART1 OSC FREQUENCY UART1BAUD .EQU 300 ; UART1 BAUDRATE IS 300 FOR CASSETTE INTERFACE UART1FIFO .EQU TRUE ; UART1 FIFO ENABLED FOR CASSETTE INTERFACE UART1AFC .EQU FALSE ; UART1 AUTO FLOW CONTROL DISABLED FOR CASSETTE INTERFACE @@ -45,11 +42,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -61,15 +53,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -110,5 +105,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_cvdu.asm b/Source/HBIOS/Config/sbc_cvdu.asm similarity index 78% rename from Source/BIOS/Config/n8vem_cvdu.asm rename to Source/HBIOS/Config/sbc_cvdu.asm index 6fb8bfb5..b30d4f78 100644 --- a/Source/BIOS/Config/n8vem_cvdu.asm +++ b/Source/HBIOS/Config/sbc_cvdu.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_CRT ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_CVDU ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_VDA ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_CVDU ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU TRUE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU TRUE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -83,7 +78,7 @@ PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENA PRPSDCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO) ; -PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT +PPPENABLE .EQU FALSE ; TRUE FOR OP SUPPORT PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE) PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_dide.asm b/Source/HBIOS/Config/sbc_dide.asm similarity index 79% rename from Source/BIOS/Config/n8vem_dide.asm rename to Source/HBIOS/Config/sbc_dide.asm index 2b6bba63..4108178a 100644 --- a/Source/BIOS/Config/n8vem_dide.asm +++ b/Source/HBIOS/Config/sbc_dide.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU TRUE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIDE ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_diskio.asm b/Source/HBIOS/Config/sbc_diskio.asm similarity index 79% rename from Source/BIOS/Config/n8vem_diskio.asm rename to Source/HBIOS/Config/sbc_diskio.asm index 1e9a8f3e..8f8ea75c 100644 --- a/Source/BIOS/Config/n8vem_diskio.asm +++ b/Source/HBIOS/Config/sbc_diskio.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU TRUE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_diskio3+cvdu.asm b/Source/HBIOS/Config/sbc_diskio3+cvdu.asm similarity index 79% rename from Source/BIOS/Config/n8vem_diskio3+cvdu.asm rename to Source/HBIOS/Config/sbc_diskio3+cvdu.asm index 65da5a96..f1e1f435 100644 --- a/Source/BIOS/Config/n8vem_diskio3+cvdu.asm +++ b/Source/HBIOS/Config/sbc_diskio3+cvdu.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_CRT ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_CVDU ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_VDA ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU TRUE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_CVDU ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU TRUE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $20 ; PPIDE IOBASE IS $20 FOR DISKIO V3 +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_diskio3.asm b/Source/HBIOS/Config/sbc_diskio3.asm similarity index 79% rename from Source/BIOS/Config/n8vem_diskio3.asm rename to Source/HBIOS/Config/sbc_diskio3.asm index 2aecb66e..be5d9e83 100644 --- a/Source/BIOS/Config/n8vem_diskio3.asm +++ b/Source/HBIOS/Config/sbc_diskio3.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $20 ; PPIDE IOBASE IS $20 FOR DISKIO V3 +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_dsd.asm b/Source/HBIOS/Config/sbc_dsd.asm similarity index 79% rename from Source/BIOS/Config/n8vem_dsd.asm rename to Source/HBIOS/Config/sbc_dsd.asm index 50eb39f5..70d6142b 100644 --- a/Source/BIOS/Config/n8vem_dsd.asm +++ b/Source/HBIOS/Config/sbc_dsd.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_mfp.asm b/Source/HBIOS/Config/sbc_mfp.asm similarity index 76% rename from Source/BIOS/Config/n8vem_mfp.asm rename to Source/HBIOS/Config/sbc_mfp.asm index 2814e0be..a2462dab 100644 --- a/Source/BIOS/Config/n8vem_mfp.asm +++ b/Source/HBIOS/Config/sbc_mfp.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,15 +23,15 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 2 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) UART1IOB .EQU $88 ; UART1 IOBASE AT $88 FOR MFPIC -UART1OSC .EQU 1843200 ; UART 1 OSC FREQUENCY -UART1BAUD .EQU 38400 ; UART1 BAUDRATE IS 38400 FOR MFPIC -UART1FIFO .EQU TRUE ; UART1 FIFO ENABLED FOR MFPIC -UART1AFC .EQU FALSE ; UART1 AUTO FLOW CONTROL DISABLED FOR MFPIC (ENABLE IF DESIRED) +UART1OSC .EQU 1843200 ; UART1 OSC FREQUENCY +UART1BAUD .EQU CONBAUD ; UART1 BAUDRATE +UART1FIFO .EQU TRUE ; UART1 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) +UART1AFC .EQU FALSE ; UART1 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) ; ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT ASCI0BAUD .EQU CONBAUD ; ASCI0 BAUDRATE (IMPLEMENTED BY Z180_CNTLB0) @@ -45,11 +42,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -61,15 +53,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $84 ; PPIDE IOBASE IS $84 FOR MFPIC (PRELIMINARY ADDRESS) +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -110,5 +105,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_ppide.asm b/Source/HBIOS/Config/sbc_ppide.asm similarity index 79% rename from Source/BIOS/Config/n8vem_ppide.asm rename to Source/HBIOS/Config/sbc_ppide.asm index 646ca239..334703ef 100644 --- a/Source/BIOS/Config/n8vem_ppide.asm +++ b/Source/HBIOS/Config/sbc_ppide.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_ppisd.asm b/Source/HBIOS/Config/sbc_ppisd.asm similarity index 79% rename from Source/BIOS/Config/n8vem_ppisd.asm rename to Source/HBIOS/Config/sbc_ppisd.asm index 1224e1fd..f84f21d4 100644 --- a/Source/BIOS/Config/n8vem_ppisd.asm +++ b/Source/HBIOS/Config/sbc_ppisd.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_propio.asm b/Source/HBIOS/Config/sbc_propio.asm similarity index 79% rename from Source/BIOS/Config/n8vem_propio.asm rename to Source/HBIOS/Config/sbc_propio.asm index a8559336..223ea31f 100644 --- a/Source/BIOS/Config/n8vem_propio.asm +++ b/Source/HBIOS/Config/sbc_propio.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_PRPCON ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_PRPCON ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU TRUE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_rf.asm b/Source/HBIOS/Config/sbc_rf.asm similarity index 79% rename from Source/BIOS/Config/n8vem_rf.asm rename to Source/HBIOS/Config/sbc_rf.asm index e7a25bde..b541918c 100644 --- a/Source/BIOS/Config/n8vem_rf.asm +++ b/Source/HBIOS/Config/sbc_rf.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_ALWAYS ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU TRUE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_simh.asm b/Source/HBIOS/Config/sbc_simh.asm similarity index 79% rename from Source/BIOS/Config/n8vem_simh.asm rename to Source/HBIOS/Config/sbc_simh.asm index fdc82d6c..581ff772 100644 --- a/Source/BIOS/Config/n8vem_simh.asm +++ b/Source/HBIOS/Config/sbc_simh.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 115200 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_ALWAYS ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 115200 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU FALSE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU FALSE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -90,6 +85,7 @@ PPPSDCAPACITY .EQU 64 ; CAPACITY OF PPP SD DEVICE (IN MB) PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO) ; HDSKENABLE .EQU TRUE ; TRUE FOR HDSK SUPPORT +HDSKCNT .EQU 2 ; NUMBER OF HDSK UNITS HDSKTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) HDSKCAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; @@ -105,5 +101,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_std.asm b/Source/HBIOS/Config/sbc_std.asm similarity index 79% rename from Source/BIOS/Config/n8vem_std.asm rename to Source/HBIOS/Config/sbc_std.asm index 77fa86bf..33be685e 100644 --- a/Source/BIOS/Config/n8vem_std.asm +++ b/Source/HBIOS/Config/sbc_std.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/n8vem_vdu.asm b/Source/HBIOS/Config/sbc_vdu.asm similarity index 79% rename from Source/BIOS/Config/n8vem_vdu.asm rename to Source/HBIOS/Config/sbc_vdu.asm index 69d60f9f..140f889d 100644 --- a/Source/BIOS/Config/n8vem_vdu.asm +++ b/Source/HBIOS/Config/sbc_vdu.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 8000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_CRT ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_VDU ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 8000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU TRUE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_VDU ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/una_std.asm b/Source/HBIOS/Config/una_std.asm similarity index 59% rename from Source/BIOS/Config/una_std.asm rename to Source/HBIOS/Config/una_std.asm index 006b9265..2dea37fb 100644 --- a/Source/BIOS/Config/una_std.asm +++ b/Source/HBIOS/Config/una_std.asm @@ -5,19 +5,11 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 18432 ; CPU OSC FREQ IN KHZ -; +CPUOSC .EQU 18432000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 21 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/zeta2_ppide.asm b/Source/HBIOS/Config/zeta2_ppide.asm similarity index 79% rename from Source/BIOS/Config/zeta2_ppide.asm rename to Source/HBIOS/Config/zeta2_ppide.asm index c656b8d6..9e0541ef 100644 --- a/Source/BIOS/Config/zeta2_ppide.asm +++ b/Source/HBIOS/Config/zeta2_ppide.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 20000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 20000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/zeta2_ppisd.asm b/Source/HBIOS/Config/zeta2_ppisd.asm similarity index 79% rename from Source/BIOS/Config/zeta2_ppisd.asm rename to Source/HBIOS/Config/zeta2_ppisd.asm index 801bd858..73945807 100644 --- a/Source/BIOS/Config/zeta2_ppisd.asm +++ b/Source/HBIOS/Config/zeta2_ppisd.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 20000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 20000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/zeta2_ppp.asm b/Source/HBIOS/Config/zeta2_ppp.asm similarity index 79% rename from Source/BIOS/Config/zeta2_ppp.asm rename to Source/HBIOS/Config/zeta2_ppp.asm index 01638d0c..8ffbabeb 100644 --- a/Source/BIOS/Config/zeta2_ppp.asm +++ b/Source/HBIOS/Config/zeta2_ppp.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 20000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_PPPCON ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 20000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_PPPCON ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU TRUE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/zeta2_std.asm b/Source/HBIOS/Config/zeta2_std.asm similarity index 79% rename from Source/BIOS/Config/zeta2_std.asm rename to Source/HBIOS/Config/zeta2_std.asm index 336659d3..3a882bb6 100644 --- a/Source/BIOS/Config/zeta2_std.asm +++ b/Source/HBIOS/Config/zeta2_std.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 20000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 20000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/zeta_ppide.asm b/Source/HBIOS/Config/zeta_ppide.asm similarity index 79% rename from Source/BIOS/Config/zeta_ppide.asm rename to Source/HBIOS/Config/zeta_ppide.asm index b00bcabf..5ba6b5d8 100644 --- a/Source/BIOS/Config/zeta_ppide.asm +++ b/Source/HBIOS/Config/zeta_ppide.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 20000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 20000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU TRUE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/zeta_ppisd.asm b/Source/HBIOS/Config/zeta_ppisd.asm similarity index 79% rename from Source/BIOS/Config/zeta_ppisd.asm rename to Source/HBIOS/Config/zeta_ppisd.asm index 99b8a666..6ce01677 100644 --- a/Source/BIOS/Config/zeta_ppisd.asm +++ b/Source/HBIOS/Config/zeta_ppisd.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 20000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 20000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/zeta_ppp.asm b/Source/HBIOS/Config/zeta_ppp.asm similarity index 79% rename from Source/BIOS/Config/zeta_ppp.asm rename to Source/HBIOS/Config/zeta_ppp.asm index 88ed0f06..80333b30 100644 --- a/Source/BIOS/Config/zeta_ppp.asm +++ b/Source/HBIOS/Config/zeta_ppp.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 20000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_PPPCON ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU CIODEV_UART ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 20000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_PPPCON ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU TRUE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $01 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU $00 ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Config/zeta_std.asm b/Source/HBIOS/Config/zeta_std.asm similarity index 79% rename from Source/BIOS/Config/zeta_std.asm rename to Source/HBIOS/Config/zeta_std.asm index 6143dec0..91f26641 100644 --- a/Source/BIOS/Config/zeta_std.asm +++ b/Source/HBIOS/Config/zeta_std.asm @@ -5,18 +5,15 @@ ; ; BUILD CONFIGURATION OPTIONS ; -CPUOSC .EQU 20000 ; CPU OSC FREQ IN KHZ -; -BOOTCON .EQU CIODEV_UART ; CONSOLE DEVICE FOR BOOT MESSAGES (MUST BE PRIMARY SERIAL PORT FOR PLATFORM) -DEFCON .EQU CIODEV_UART ; DEFAULT CONSOLE DEVICE (LOADER AND MONITOR): CIODEV_UART, CIODEV_CRT, CIODEV_PRPCON, CIODEV_PPPCON -ALTCON .EQU DEFCON ; ALT CONSOLE DEVICE (USED WHEN CONFIG JUMPER SHORTED) -CONBAUD .EQU 38400 ; BAUDRATE FOR CONSOLE DURING HARDWARE INIT -DEFVDA .EQU VDADEV_NONE ; DEFAULT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) -DEFEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) -TERMTYPE .EQU TERM_ANSI ; TERM_TTY=0, TERM_ANSI=1, TERM_WYSE=2 -; +CPUOSC .EQU 20000000 ; CPU OSC FREQ RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! -CLRRAMDISK .EQU CLR_AUTO ; CLR_ALWAYS, CLR_NEVER, CLR_AUTO (CLEAR IF INVALID DIR AREA) +CONBAUD .EQU 38400 ; DEFAULT BAUDRATE USED BELOW +; +SERDEV .EQU CIODEV_UART ; PRIMARY SERIAL DEVICE FOR BOOT/DEBUG/MONITOR (TYPICALLY CIODEV_UART OR CIODEV_ASCI) +CRTDEV .EQU CIODEV_NUL ; CRT DEVICE (CIODEV_PRPCON, CIODEV_PPPCON, CIODEV_VDA), USE CIODEV_NUL IF NO CRT +CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP +VDADEV .EQU VDADEV_NONE ; CRT VDA DEVICE (VDADEV_NONE, VDADEV_VDU, VDADEV_CVDU, VDADEV_N8V, VDADEV_UPD7220) +VDAEMU .EQU EMUTYP_TTY ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) ; DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) ; @@ -26,7 +23,7 @@ DSRTCENABLE .EQU TRUE ; DS-1302 CLOCK DRIVER UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTCNT .EQU 1 ; NUMBER OF UARTS UART0IOB .EQU $68 ; UART0 IOBASE -UART0OSC .EQU 1843200 ; UART 0 OSC FREQUENCY +UART0OSC .EQU 1843200 ; UART0 OSC FREQUENCY UART0BAUD .EQU CONBAUD ; UART0 BAUDRATE UART0FIFO .EQU TRUE ; UART0 TRUE ENABLES UART FIFO (16550 ASSUMED, N8VEM AND ZETA ONLY) UART0AFC .EQU FALSE ; UART0 TRUE ENABLES AUTO FLOW CONTROL (YOUR TERMINAL/UART MUST SUPPORT RTS/CTS FLOW CONTROL!!!) @@ -40,11 +37,6 @@ CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT UPD7220ENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT N8VENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT ; -DEFIOBYTE .EQU $00 ; DEFAULT INITIAL VALUE FOR CP/M IOBYTE, $00=TTY, $01=CRT (MUST HAVE CRT HARDWARE) -ALTIOBYTE .EQU DEFIOBYTE ; ALT INITIAL VALUE (USED WHEN CONFIG JUMPER SHORTED) -WRTCACHE .EQU TRUE ; ENABLE WRITE CACHING IN CBIOS (DE)BLOCKING ALGORITHM -DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS -; MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) ; @@ -56,15 +48,18 @@ FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RE FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY ; RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT +RFCNT .EQU 1 ; NUMBER OF RAM FLOPPY UNITS ; IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT IDEMODE .EQU IDEMODE_DIO ; IDEMODE_DIO, IDEMODE_DIDE +IDECNT .EQU 1 ; NUMBER OF IDE UNITS IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) IDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) IDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) ; PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) PPIDEIOB .EQU $60 ; PPIDE IOBASE +PPIDECNT .EQU 1 ; NUMBER OF PPIDE UNITS PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) PPIDECAPACITY .EQU 64 ; CAPACITY OF DEVICE (IN MB) @@ -105,5 +100,3 @@ ANSITRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF ANSIENABL BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT -; -#DEFINE AUTOCMD "" ; AUTO STARTUP COMMAND FOR CP/M diff --git a/Source/BIOS/Make.cmd b/Source/HBIOS/Make.cmd similarity index 100% rename from Source/BIOS/Make.cmd rename to Source/HBIOS/Make.cmd diff --git a/Source/BIOS/MakeBlankROM.ps1 b/Source/HBIOS/MakeBlankROM.ps1 similarity index 100% rename from Source/BIOS/MakeBlankROM.ps1 rename to Source/HBIOS/MakeBlankROM.ps1 diff --git a/Source/BIOS/Old/bioshdr.inc b/Source/HBIOS/Old/bioshdr.inc similarity index 100% rename from Source/BIOS/Old/bioshdr.inc rename to Source/HBIOS/Old/bioshdr.inc diff --git a/Source/BIOS/Old/bootapp.asm b/Source/HBIOS/Old/bootapp.asm similarity index 100% rename from Source/BIOS/Old/bootapp.asm rename to Source/HBIOS/Old/bootapp.asm diff --git a/Source/BIOS/Old/bootgen.asm b/Source/HBIOS/Old/bootgen.asm similarity index 100% rename from Source/BIOS/Old/bootgen.asm rename to Source/HBIOS/Old/bootgen.asm diff --git a/Source/BIOS/Old/bootrom.asm b/Source/HBIOS/Old/bootrom.asm similarity index 100% rename from Source/BIOS/Old/bootrom.asm rename to Source/HBIOS/Old/bootrom.asm diff --git a/Source/BIOS/cbios.asm b/Source/HBIOS/Old/cbios.asm similarity index 93% rename from Source/BIOS/cbios.asm rename to Source/HBIOS/Old/cbios.asm index 536b8ca4..8f0ae584 100644 --- a/Source/BIOS/cbios.asm +++ b/Source/HBIOS/Old/cbios.asm @@ -1,6 +1,6 @@ ;__________________________________________________________________________________________________ ; -; CBIOS FOR N8VEM +; CBIOS FOR SBC ; ; BY ANDREW LYNCH, WITH INPUT FROM MANY SOURCES ; ROMWBW ADAPTATION BY WAYNE WARTHEN @@ -126,50 +126,21 @@ LD_UL1 .EQU 0 ; -> LPT1: #ELSE -#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) -TTYDEV .EQU CIODEV_ASCI -#ELSE -TTYDEV .EQU CIODEV_UART -#ENDIF -; -LD_TTY .EQU TTYDEV ; -> COM0: -LD_CRT .EQU TTYDEV ; -> COM14: +LD_TTY .EQU CIODEV_CONSOLE ; -> COM0: +LD_CRT .EQU CIODEV_CRT ; -> COM14: LD_BAT .EQU CIODEV_BAT -LD_UC1 .EQU TTYDEV ; -> COM1: -LD_PTR .EQU TTYDEV ; -> COM1: -LD_UR1 .EQU TTYDEV ; -> COM2: -LD_UR2 .EQU TTYDEV ; -> COM3: -LD_PTP .EQU TTYDEV ; -> COM1: -LD_UP1 .EQU TTYDEV ; -> COM2: -LD_UP2 .EQU TTYDEV ; -> COM3: -LD_LPT .EQU TTYDEV ; -> LPT0: -LD_UL1 .EQU TTYDEV ; -> LPT1: -; -#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) -LD_UC1 .SET CIODEV_ASCI + 1 -LD_PTR .SET CIODEV_ASCI + 1 -LD_PTP .SET CIODEV_ASCI + 1 -#ENDIF -; -#IF (UARTENABLE & (UARTCNT >= 2)) -LD_UC1 .SET CIODEV_UART + 1 -LD_PTR .SET CIODEV_UART + 1 -LD_PTP .SET CIODEV_UART + 1 -#ENDIF -; -#IF (VDUENABLE | CVDUENABLE | N8VENABLE) -LD_CRT .SET CIODEV_CRT -#ENDIF -#IF (PRPENABLE & PRPCONENABLE) -LD_CRT .SET CIODEV_PRPCON -#ENDIF -#IF (PPPENABLE & PPPCONENABLE) -LD_CRT .SET CIODEV_PPPCON -#ENDIF +LD_UC1 .EQU CIODEV_CONSOLE ; -> COM1: +LD_PTR .EQU CIODEV_CONSOLE ; -> COM1: +LD_UR1 .EQU CIODEV_CONSOLE ; -> COM2: +LD_UR2 .EQU CIODEV_CONSOLE ; -> COM3: +LD_PTP .EQU CIODEV_CONSOLE ; -> COM1: +LD_UP1 .EQU CIODEV_CONSOLE ; -> COM2: +LD_UP2 .EQU CIODEV_CONSOLE ; -> COM3: +LD_LPT .EQU CIODEV_CONSOLE ; -> LPT0: +LD_UL1 .EQU CIODEV_CONSOLE ; -> LPT1: #ENDIF ; - .DB DEVCNT DEVMAP: ; ; CONSOLE @@ -193,10 +164,6 @@ DEVMAP: .DB LD_LPT ; LST:=LPT: (IOBYTE 10XXXXXX) .DB LD_UL1 ; LST:=UL1: (IOBYTE 11XXXXXX) ; -DEVCNT .EQU ($ - DEVMAP) - .ECHO DEVCNT - .ECHO " Input/Output devices defined.\n" -; ;================================================================================================== ; DRIVE MAPPING TABLE ;================================================================================================== @@ -1764,7 +1731,7 @@ INIT: LD A,DEFIOBYTE ; LOAD DEFAULT IOBYTE LD (IOBYTE),A ; STORE IT -#IF ((PLATFORM != PLT_N8) & (PLATFORM != PLT_MK4) & (PLATFORM != PLT_S100) & (PLATFORM != PLT_UNA)) +#IF ((PLATFORM != PLT_N8) & (PLATFORM != PLT_MK4) & (PLATFORM != PLT_UNA)) IN A,(RTC) ; RTC PORT, BIT 6 HAS STATE OF CONFIG JUMPER BIT 6,A ; BIT 6 HAS CONFIG JUMPER STATE LD A,DEFIOBYTE ; ASSUME WE WANT DEFAULT IOBYTE VALUE @@ -1780,6 +1747,13 @@ INIT1: ; STARTUP MESSAGE CALL NEWLINE ; FORMATTING + LD DE,STR_CPM ; DEFAULT TO CP/M LABEL + LD A,(BDOS_LOC) ; GET FIRST BYTE OF BDOS + CP 'Z' ; IS IT A 'Z' (FOR ZSDOS)? + JR NZ,INIT2 ; NOPE, CP/M IS RIGHT + LD DE,STR_ZSDOS ; SWITCH TO ZSDOS LABEL +INIT2: + CALL WRITESTR ; DISPLAY OS LABEL LD DE,STR_BANNER ; POINT TO BANNER CALL WRITESTR ; DISPLAY IT CALL NEWLINE ; FORMATTING @@ -1820,6 +1794,7 @@ INIT1: ; DISK SYSTEM INITIALIZATION CALL BLKRES ; RESET DISK (DE)BLOCKING ALGORITHM + CALL DEV_INIT ; INITIALIZE CHARACTER DEVICE MAP CALL MD_INIT ; INITIALIZE MEMORY DISK DRIVER (RAM/ROM) CALL DRV_INIT ; INITIALIZE DRIVE MAP CALL DPH_INIT ; INITIALIZE DPH TABLE AND BUFFERS @@ -1854,11 +1829,66 @@ CMD .DB CMDLEN - 1 .DB 0 CMDLEN .EQU $ - CMD ; -STR_BANNER .DB OSLBL, " for ", PLATFORM_NAME, ", CBIOS v", BIOSVER, "$" +STR_CPM .DB "CP/M-80 2.2$" +STR_ZSDOS .DB "ZSDOS 1.1$" +STR_BANNER .DB " for ", PLATFORM_NAME, ", CBIOS v", BIOSVER, "$" STR_MEMFREE .DB " Disk Buffer Bytes Free\r\n$" ; ; ;__________________________________________________________________________________________________ +DEV_INIT: +; +#IF (PLATFORM != PLT_UNA) +; + ; ACTIVATE BIOS BANK + LD B,BF_SYSSETBNK + LD C,BID_BIOS + CALL $FFF0 +; + ; PATCH IN COM0: DEVICE ENTRIES + LD A,(HCB_LOC + HCB_CDL + 1) ; COM0: + CP $FF + JR Z,DEV_INIT1 + LD (DEVMAP + 0),A ; CONSOLE TTY + LD (DEVMAP + 4),A ; READER TTY + LD (DEVMAP + 8),A ; PUNCH TTY + LD (DEVMAP + 12),A ; LIST TTY +; + ; PATCH IN COM1: DEVICE ENTRIES + LD A,(HCB_LOC + HCB_CDL + 2) ; COM1: + CP $FF + JR Z,DEV_INIT1 + LD (DEVMAP + 3),A ; CONSOLE UC1 + LD (DEVMAP + 5),A ; READER PTR + LD (DEVMAP + 9),A ; PUNCH PTP +; + ; PATCH IN COM2: DEVICE ENTRIES + LD A,(HCB_LOC + HCB_CDL + 3) ; COM2: + CP $FF + JR Z,DEV_INIT1 + LD (DEVMAP + 6),A ; READER UR1 + LD (DEVMAP + 10),A ; PUNCH PT1 +; + ; PATCH IN COM3: DEVICE ENTRIES + LD A,(HCB_LOC + HCB_CDL + 4) ; COM3: + CP $FF + JR Z,DEV_INIT1 + LD (DEVMAP + 7),A ; READER UR2 + LD (DEVMAP + 11),A ; PUNCH PT2 +; +DEV_INIT1: +; + ; REACTIVATE USER BANK + LD B,BF_SYSSETBNK + LD C,BID_USR + CALL $FFF0 +; + RET +; +#ENDIF +; +; +;__________________________________________________________________________________________________ MD_INIT: ; #IF (PLATFORM == PLT_UNA) @@ -2053,8 +2083,8 @@ DRV_INIT: ; BUILD DRVMAP BASED ON AVAILABLE HBIOS DISK DEVICE LIST ; ; GET BOOT DEVICE/UNIT/LU INFO - LD B,BF_SYSATTR ; HBIOS FUNC: GET/SET ATTR - LD C,AID_BOOTVOL ; ATTRIB ID FOR BOOT DEVICE + LD B,BF_SYSHCBGETW ; HB FUNC: GET HCB WORD + LD C,HCB_BOOTVOL ; BOOT VOLUME (DEV/UNIT, SLICE) RST 08 ; GET THE VALUE LD (BOOTVOL),DE ; D -> DEVICE/UNIT, E -> LU ; @@ -2065,7 +2095,7 @@ DRV_INIT: LD (BUFTOP),HL ; AND AS NEW BUFTOP ; ; SETUP TO LOOP THROUGH AVAILABLE DEVICES - LD B,BF_DIODEVCNT ; HBIOS FUNC: DEVICE COUNT + LD B,BF_DIOGETCNT ; HBIOS FUNC: DEVICE COUNT RST 08 ; CALL HBIOS, DEVICE COUNT TO B LD A,B ; COUNT TO A OR A ; SET FLAGS @@ -2074,7 +2104,7 @@ DRV_INIT: ; DRV_INIT1: ; DEVICE ENUMERATION LOOP PUSH BC ; PRESERVE LOOP CONTROL - LD B,BF_DIODEVINF ; HBIOS FUNC: DEVICE INFO + LD B,BF_DIOGETINF ; HBIOS FUNC: DEVICE INFO RST 08 ; CALL HBIOS, DEVICE/UNIT TO C CALL DRV_INIT3 ; MAKE DRIVE MAP ENTRY(S) POP BC ; RESTORE LOOP CONTROL diff --git a/Source/BIOS/Old/fill1k.asm b/Source/HBIOS/Old/fill1k.asm similarity index 100% rename from Source/BIOS/Old/fill1k.asm rename to Source/HBIOS/Old/fill1k.asm diff --git a/Source/BIOS/Old/infolist.inc b/Source/HBIOS/Old/infolist.inc similarity index 100% rename from Source/BIOS/Old/infolist.inc rename to Source/HBIOS/Old/infolist.inc diff --git a/Source/BIOS/Old/loader.asm b/Source/HBIOS/Old/loader.asm similarity index 100% rename from Source/BIOS/Old/loader.asm rename to Source/HBIOS/Old/loader.asm diff --git a/Source/BIOS/Old/osldr.asm b/Source/HBIOS/Old/osldr.asm similarity index 100% rename from Source/BIOS/Old/osldr.asm rename to Source/HBIOS/Old/osldr.asm diff --git a/Source/BIOS/Old/pgzero.asm b/Source/HBIOS/Old/pgzero.asm similarity index 100% rename from Source/BIOS/Old/pgzero.asm rename to Source/HBIOS/Old/pgzero.asm diff --git a/Source/BIOS/Old/rom0.asm b/Source/HBIOS/Old/rom0.asm similarity index 100% rename from Source/BIOS/Old/rom0.asm rename to Source/HBIOS/Old/rom0.asm diff --git a/Source/BIOS/Old/romfill.asm b/Source/HBIOS/Old/romfill.asm similarity index 100% rename from Source/BIOS/Old/romfill.asm rename to Source/HBIOS/Old/romfill.asm diff --git a/Source/BIOS/Old/syscfg.asm b/Source/HBIOS/Old/syscfg.asm similarity index 100% rename from Source/BIOS/Old/syscfg.asm rename to Source/HBIOS/Old/syscfg.asm diff --git a/Source/BIOS/ubios.asm b/Source/HBIOS/Old/ubios.asm similarity index 100% rename from Source/BIOS/ubios.asm rename to Source/HBIOS/Old/ubios.asm diff --git a/Source/BIOS/ansi.asm b/Source/HBIOS/ansi.asm similarity index 100% rename from Source/BIOS/ansi.asm rename to Source/HBIOS/ansi.asm diff --git a/Source/BIOS/asci.asm b/Source/HBIOS/asci.asm similarity index 84% rename from Source/BIOS/asci.asm rename to Source/HBIOS/asci.asm index 78c77ba7..64a26d05 100644 --- a/Source/BIOS/asci.asm +++ b/Source/HBIOS/asci.asm @@ -112,11 +112,11 @@ ASCI0: ASCI_INIT: ; ASCI0 PRTS("ASCI0: IO=0x$") - LD A,CPU_TDR0 + LD A,Z180_TDR0 CALL PRTHEXBYTE CALL PC_COMMA - LD A,CPU_RDR0 + LD A,Z180_RDR0 CALL PRTHEXBYTE ; PRTS(" BAUD=$") ; LD HL,ASCI0BAUD / 10 @@ -125,20 +125,20 @@ ASCI_INIT: #IF (PLATFORM != PLT_MK4) LD A,66H - OUT0 (CPU_ASEXT0),A + OUT0 (Z180_ASEXT0),A LD A,64H - OUT0 (CPU_CNTLA0),A - LD A,Z180_CNTLB0 - OUT0 (CPU_CNTLB0),A + OUT0 (Z180_CNTLA0),A + LD A,Z180_ASCIB0 + OUT0 (Z180_CNTLB0),A #ENDIF ; ASCI1 CALL NEWLINE PRTS("ASCI1: IO=0x$") - LD A,CPU_TDR1 + LD A,Z180_TDR1 CALL PRTHEXBYTE CALL PC_COMMA - LD A,CPU_RDR1 + LD A,Z180_RDR1 CALL PRTHEXBYTE ; PRTS(" BAUD=$") ; LD HL,ASCI1BAUD / 10 @@ -147,11 +147,11 @@ ASCI_INIT: #IF (PLATFORM != PLT_MK4) LD A,66H - OUT0 (CPU_ASEXT1),A + OUT0 (Z180_ASEXT1),A LD A,64H - OUT0 (CPU_CNTLA1),A - LD A,Z180_CNTLB1 - OUT0 (CPU_CNTLB1),A + OUT0 (Z180_CNTLA1),A + LD A,Z180_ASCIB1 + OUT0 (Z180_CNTLB1),A #ENDIF RET @@ -162,7 +162,7 @@ ASCI0_IN: CALL ASCI0_IST OR A JR Z,ASCI0_IN - IN0 A,(CPU_RDR0) ; READ THE CHAR FROM THE ASCI + IN0 A,(Z180_RDR0) ; READ THE CHAR FROM THE ASCI LD E,A RET ; @@ -170,17 +170,17 @@ ASCI0_IN: ; ASCI0_IST: ; CHECK FOR ERROR FLAGS - IN0 A,(CPU_STAT0) + IN0 A,(Z180_STAT0) AND 70H ; PARITY, FRAMING, OR OVERRUN ERROR JR Z,ASCI0_IST1 ; ALL IS WELL, CHECK FOR DATA ; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!! - IN0 A,(CPU_CNTLA0) + IN0 A,(Z180_CNTLA0) RES 3,A ; CLEAR EFR (ERROR FLAG RESET) - OUT0 (CPU_CNTLA0),A + OUT0 (Z180_CNTLA0),A ASCI0_IST1: ; CHECK FOR STAT0.RDRF (DATA READY) - IN0 A,(CPU_STAT0) ; READ LINE STATUS REGISTER + IN0 A,(Z180_STAT0) ; READ LINE STATUS REGISTER AND $80 ; TEST IF DATA IN RECEIVE BUFFER JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN XOR A @@ -194,11 +194,11 @@ ASCI0_OUT: OR A JR Z,ASCI0_OUT LD A,E - OUT0 (CPU_TDR0),A + OUT0 (Z180_TDR0),A RET ; ASCI0_OST: - IN0 A,(CPU_STAT0) + IN0 A,(Z180_STAT0) AND $02 JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN XOR A @@ -225,7 +225,7 @@ ASCI1_IN: CALL ASCI1_IST OR A JR Z,ASCI1_IN - IN0 A,(CPU_RDR1) ; READ THE CHAR FROM THE ASCI + IN0 A,(Z180_RDR1) ; READ THE CHAR FROM THE ASCI LD E,A RET ; @@ -233,17 +233,17 @@ ASCI1_IN: ; ASCI1_IST: ; CHECK FOR ERROR FLAGS - IN0 A,(CPU_STAT1) + IN0 A,(Z180_STAT1) AND 70H ; PARITY, FRAMING, OR OVERRUN ERROR JR Z,ASCI1_IST1 ; ALL IS WELL, CHECK FOR DATA ; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!! - IN0 A,(CPU_CNTLA1) + IN0 A,(Z180_CNTLA1) RES 3,A ; CLEAR EFR (ERROR FLAG RESET) - OUT0 (CPU_CNTLA1),A + OUT0 (Z180_CNTLA1),A ASCI1_IST1: ; CHECK FOR STAT0.RDRF (DATA READY) - IN0 A,(CPU_STAT1) ; READ LINE STATUS REGISTER + IN0 A,(Z180_STAT1) ; READ LINE STATUS REGISTER AND $80 ; TEST IF DATA IN RECEIVE BUFFER JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN XOR A @@ -257,11 +257,11 @@ ASCI1_OUT: OR A JR Z,ASCI1_OUT LD A,E - OUT0 (CPU_TDR1),A + OUT0 (Z180_TDR1),A RET ; ASCI1_OST: - IN0 A,(CPU_STAT1) + IN0 A,(Z180_STAT1) AND $02 JR Z,ASCI1_OST JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN diff --git a/Source/BIOS/bcd.asm b/Source/HBIOS/bcd.asm similarity index 100% rename from Source/BIOS/bcd.asm rename to Source/HBIOS/bcd.asm diff --git a/Source/BIOS/blank1024KB.dat b/Source/HBIOS/blank1024KB.dat similarity index 100% rename from Source/BIOS/blank1024KB.dat rename to Source/HBIOS/blank1024KB.dat diff --git a/Source/BIOS/blank512KB.dat b/Source/HBIOS/blank512KB.dat similarity index 100% rename from Source/BIOS/blank512KB.dat rename to Source/HBIOS/blank512KB.dat diff --git a/Source/BIOS/cvdu.asm b/Source/HBIOS/cvdu.asm similarity index 96% rename from Source/BIOS/cvdu.asm rename to Source/HBIOS/cvdu.asm index d02067c3..fc1e56df 100644 --- a/Source/BIOS/cvdu.asm +++ b/Source/HBIOS/cvdu.asm @@ -1,5 +1,5 @@ ;====================================================================== -; COLOR VDU DRIVER FOR N8VEM PROJECT +; COLOR VDU DRIVER FOR SBC PROJECT ; ; WRITTEN BY: DAN WERNER -- 11/4/2011 ; ROMWBW ADAPTATION BY: WAYNE WARTHEN -- 11/9/2012 diff --git a/Source/BIOS/cvdu_font.asm b/Source/HBIOS/cvdu_font.asm similarity index 100% rename from Source/BIOS/cvdu_font.asm rename to Source/HBIOS/cvdu_font.asm diff --git a/Source/BIOS/dbgmon.asm b/Source/HBIOS/dbgmon.asm similarity index 95% rename from Source/BIOS/dbgmon.asm rename to Source/HBIOS/dbgmon.asm index 703b4df0..16a7f7d0 100644 --- a/Source/BIOS/dbgmon.asm +++ b/Source/HBIOS/dbgmon.asm @@ -42,6 +42,8 @@ BS: .EQU 08H ; ASCII BACKSPACE CHARACTER ; #INCLUDE "memmgr.asm" ; +#IF DSKYENABLE +; ;__DSKY_ENTRY_________________________________________________________________ ; DSKY_ENTRY: @@ -87,28 +89,9 @@ EXIT: ;_____________________________________________________________________________ ; DOBOOT: - ; ENSURE DEFAULT MEMORY PAGE CONFIGURATION -;#IF (PLATFORM == PLT_N8) -; LD A,DEFACR -; OUT0 (ACR),A -; XOR A -; OUT0 (RMAP),A -;#ELSE -; XOR A -; OUT (MPCL_ROM),A -; OUT (MPCL_RAM),A -;#ENDIF -#IF (PLATFORM == PLT_UNA) - LD BC,$01FB ; UNA FUNC = SET BANK - LD DE,$0000 ; ROM BANK 0 - CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) -#ELSE - LD A,BID_BOOT - CALL BNKSEL -#ENDIF - ; JUMP TO RESTART ADDRESS - JP 0000H -; + JP BOOT + + ;__DOPORTREAD_________________________________________________________________ ; ; PERFORM PORT READ FRONT PANEL ACTION @@ -545,6 +528,11 @@ GETVALUECLEAR: LD (DISPLAYBUF),A ; LD (DISPLAYBUF+1),A ; JP GETVALUE1 ; +; +#ELSE +DSKY_ENTRY: + CALL PANIC +#ENDIF ;__UART_ENTRY_________________________________________________________________ @@ -591,7 +579,7 @@ SERIALCMDLOOP: INC HL ; INC POINTER CP 'B' ; IS IT "B" (Y/N) - JP Z,DOBOOT ; IF YES DO BOOT + JP Z,BOOT ; IF YES BOOT CP 'R' ; IS IT "R" (Y/N) JP Z,RUN ; IF YES GO RUN ROUTINE CP 'P' ; IS IT "P" (Y/N) @@ -617,6 +605,33 @@ SERIALCMDLOOP: +;__BOOT_______________________________________________________________________ +; +; PERFORM BOOT ACTION +;_____________________________________________________________________________ +; +BOOT: + ; ENSURE DEFAULT MEMORY PAGE CONFIGURATION +;#IF (PLATFORM == PLT_N8) +; LD A,DEFACR +; OUT0 (ACR),A +; XOR A +; OUT0 (RMAP),A +;#ELSE +; XOR A +; OUT (MPCL_ROM),A +; OUT (MPCL_RAM),A +;#ENDIF +#IF (PLATFORM == PLT_UNA) + LD BC,$01FB ; UNA FUNC = SET BANK + LD DE,$0000 ; ROM BANK 0 + CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE) +#ELSE + LD A,BID_BOOT + CALL BNKSEL +#ENDIF + ; JUMP TO RESTART ADDRESS + JP 0000H ;__KLOP_______________________________________________________________________ @@ -1254,6 +1269,8 @@ INITIALIZE: RET ; +#IF DSKYENABLE + ;__MTERM_INIT_________________________________________________________________ ; ; SETUP 8255, MODE 0, PORT A=OUT, PORT B=IN, PORT C=OUT/OUT @@ -1465,6 +1482,8 @@ SEGDISPLAY_LP: POP AF ; RESTORE AF RET +#ENDIF + ; ;__WORK_AREA__________________________________________________________________ ; diff --git a/Source/BIOS/diskdefs b/Source/HBIOS/diskdefs similarity index 100% rename from Source/BIOS/diskdefs rename to Source/HBIOS/diskdefs diff --git a/Source/BIOS/dsrtc.asm b/Source/HBIOS/dsrtc.asm similarity index 96% rename from Source/BIOS/dsrtc.asm rename to Source/HBIOS/dsrtc.asm index 55abfe9c..6a58cbd5 100644 --- a/Source/BIOS/dsrtc.asm +++ b/Source/HBIOS/dsrtc.asm @@ -63,7 +63,7 @@ ; ; CONSTANTS ; -DSRTC_BASE .EQU RTC ; RTC PORT ON ALL N8VEM SERIES Z80 PLATFORMS +DSRTC_BASE .EQU RTC ; RTC PORT ON ALL SBC SERIES Z80 PLATFORMS ; DSRTC_DATA .EQU %10000000 ; BIT 7 CONTROLS RTC DATA (I/O) LINE DSRTC_CLK .EQU %01000000 ; BIT 6 CONTROLS RTC CLOCK LINE, 1 = HIGH diff --git a/Source/BIOS/fd.asm b/Source/HBIOS/fd.asm similarity index 93% rename from Source/BIOS/fd.asm rename to Source/HBIOS/fd.asm index 0c08330f..a0fe98ee 100644 --- a/Source/BIOS/fd.asm +++ b/Source/HBIOS/fd.asm @@ -42,6 +42,13 @@ FDC_TC .EQU 093H ; TERMINAL COUNT (W/ DACK) FDC_DMA: .EQU 03CH ; NOT USED BY N8 #ENDIF ; +; DISK OPERATIONS +; +DOP_READ .EQU 0 ; READ OPERATION +DOP_WRITE .EQU 1 ; WRITE OPERATION +DOP_FORMAT .EQU 2 ; FORMAT OPERATION +DOP_READID .EQU 3 ; READ ID OPERATION +; ; FDC RESULT CODES ; FRC_OK .EQU 0 ; 00 @@ -1015,7 +1022,7 @@ FC_RESETFDC: POP AF CALL FC_SETDOR - LD DE,100 ; DELAY: 25us * 100 = 2.5ms + LD DE,150 ; DELAY: 16us * 150 = 2.4ms CALL VDELAY RET ; @@ -1358,7 +1365,7 @@ FXR_NOP: FXR_NULL: LD BC,$4000 ; LOOP COUNTER, $4000 * 25us = 410ms FXR_NULL1: - CALL DELAY + CALL DELAY ; FDC MAY TAKE UP TO 12us TO UPDATE MSR IN A,(FDC_MSR) ; GET MSR AND 0E0H ; ISOLATE RQM/DIO/NDM CP 0C0H ; WE WANT RQM=1,DIO=1,NDM=0 (READY TO READ A BYTE W/ EXEC INACTIVE) @@ -1375,8 +1382,13 @@ FXR_NULL1: FXR_READ: LD HL,(DIOBUF) ; POINT TO SECTOR BUFFER START LD DE,(FCD_SECSZ) - LD A,(CPUMHZ + 3) / 4 - LD (FCD_TO),A + ; TIMEOUT COUNTER IS CPU MHZ / 4 (MAKING SURE IT IS AT LEAST 1) +; LD A,(CPUMHZ + 3) / 4 + LD A,(HCB_CPUMHZ) ; GET CPU SPEED IN MHZ + SRL A ; SHIFT RIGHT TWICE + SRL A ; ... TO DIVIDE BY 4 + INC A ; MAKE SURE RESULT IS AT LEAST 1 + LD (FCD_TO),A ; INIT TIMEOUT COUNTER FXRR1 LD C,0 ; OUTER LOOP TIMEOUT COUNTER FXRR2: LD B,0 ; SETUP FOR 256 ITERATIONS FXRR3: IN A,(FDC_MSR) ; GET MSR @@ -1410,7 +1422,12 @@ FXRR5: ; OUTER LOOP, REALLY ONLY HAPPENS WHEN WAITING FOR FIRST BYTE OR ABOR FXR_WRITE: LD HL,(DIOBUF) ; POINT TO SECTOR BUFFER START LD DE,(FCD_SECSZ) - LD A,(CPUMHZ + 3) / 4 + ; TIMEOUT COUNTER IS CPU MHZ / 4 (MAKING SURE IT IS AT LEAST 1) +; LD A,(CPUMHZ + 3) / 4 + LD A,(HCB_CPUMHZ) ; GET CPU SPEED IN MHZ + SRL A ; SHIFT RIGHT TWICE + SRL A ; ... TO DIVIDE BY 4 + INC A ; MAKE SURE RESULT IS AT LEAST 1 LD (FCD_TO),A FXRW1 LD C,0 ; OUTER LOOP TIMEOUT COUNTER FXRW2: LD B,0 ; SETUP FOR 256 ITERATIONS diff --git a/Source/BIOS/hbfill.asm b/Source/HBIOS/hbfill.asm similarity index 100% rename from Source/BIOS/hbfill.asm rename to Source/HBIOS/hbfill.asm diff --git a/Source/BIOS/hbios.asm b/Source/HBIOS/hbios.asm similarity index 76% rename from Source/BIOS/hbios.asm rename to Source/HBIOS/hbios.asm index c5a263cc..4d1de2c9 100644 --- a/Source/BIOS/hbios.asm +++ b/Source/HBIOS/hbios.asm @@ -42,37 +42,13 @@ ROM_SIG: .DW DESC ; POINTER TO LONGER DESCRIPTION OF ROM .DB 0, 0, 0, 0, 0, 0 ; RESERVED FOR FUTURE USE; MUST BE ZERO ; -;NAME .DB "ROMWBW v", BIOSVER, ", ", BIOSBLD, ", ", TIMESTAMP, 0 NAME .DB "ROMWBW v", BIOSVER, ", ", TIMESTAMP, 0 AUTH .DB "WBW",0 DESC .DB "ROMWBW v", BIOSVER, ", Copyright 2015, Wayne Warthen, GNU GPL v3", 0 ; .FILL ($100 - $),$FF ; PAD REMAINDER OF PAGE ZERO ; -;================================================================================================== -; BUILD META DATA -;================================================================================================== -; - .DB 'W',~'W' ; MARKER - .DB RMJ << 4 | RMN ; FIRST BYTE OF VERSION INFO - .DB RUP << 4 | RTP ; SECOND BYTE OF VERSION INFO -; - .DB PLATFORM -HB_CPUMHZ .DB CPUMHZ -HB_CPUKHZ .DW CPUKHZ - .DW RAMSIZE - .DW ROMSIZE -; - .DB BID_COM - .DB BID_USR - .DB BID_BIOS - .DB BID_AUX - .DB BID_RAMD0 - .DB BID_RAMDN - .DB BID_ROMD0 - .DB BID_ROMDN -; - .FILL ($200 - $),$FF ; PAD REMAINDER OF PAGE ONE +HCB .FILL $100,$FF ; RESERVED FOR HBIOS CONTROL BLOCK ; ;================================================================================================== ; HBIOS UPPER MEMORY PROXY @@ -94,7 +70,7 @@ HB_CPUKHZ .DW CPUKHZ ; DEFINITIONS ; HBX_CODSIZ .EQU $100 ; 256 BYTE CODE SPACE -HBX_IVTSIZ .EQU $20 ; VECTOR TABLE SIZE (16 ENTRIES) +HBX_IVTSIZ .EQU $20 ; INT VECTOR TABLE SIZE (16 ENTRIES) HBX_BUFSIZ .EQU $80 ; INTERBANK COPY BUFFER HBX_STKSIZ .EQU $40 ; PRIVATE STACK SIZE ; @@ -139,66 +115,66 @@ HBX_STKSAV .EQU $ - 2 ;;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: ; HBX_BNKSEL: - LD (HB_CURBNK),A ; RECORD NEW CURRENT BANK + LD (HB_CURBNK),A ; RECORD NEW CURRENT BANK ; -#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA)) - OUT (MPCL_ROM),A - OUT (MPCL_RAM),A +#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_ZETA)) + OUT (MPCL_ROM),A ; SET ROM PAGE SELECTOR + OUT (MPCL_RAM),A ; SET RAM PAGE SELECTOR + RET ; DONE #ENDIF #IF (PLATFORM == PLT_ZETA2) - BIT 7,A - JR Z,HBX_ROM ; JUMP IF IT IS A ROM PAGE - RES 7,A ; RAM PAGE REQUESTED: CLEAR ROM BIT - ADD A,16 ; ADD 16 x 32K - RAM STARTS FROM 512K -; -HBX_ROM: + BIT 7,A ; BIT 7 SET REQUESTS RAM PAGE + JR Z,HBX_ROM ; NOT SET, SELECT ROM PAGE + RES 7,A ; RAM PAGE REQUESTED: CLEAR ROM BIT + ADD A,16 ; ADD 16 x 32K - RAM STARTS FROM 512K +; +HBX_ROM: RLCA ; TIMES 2 - GET 16K PAGE INSTEAD OF 32K OUT (MPGSEL_0),A ; BANK_0: 0K - 16K - INC A + INC A ; OUT (MPGSEL_1),A ; BANK_1: 16K - 32K + RET ; DONE #ENDIF #IF (PLATFORM == PLT_N8) - BIT 7,A - JR Z,HBX_ROM -; -HBX_RAM: - RES 7,A - RLCA - RLCA - RLCA - OUT0 (CPU_BBR),A - LD A,DEFACR | 80H - OUT0 (ACR),A - RET -; -HBX_ROM: - OUT0 (RMAP),A - XOR A - OUT0 (CPU_BBR),A - LD A,DEFACR - OUT0 (ACR),A - RET + BIT 7,A ; TEST BIT 7 FOR RAM VS. ROM + JR Z,HBX_ROM ; IF NOT SET, SELECT ROM PAGE +; +HBX_RAM: + RES 7,A ; CLEAR BIT 7 FROM ABOVE + RLCA ; SCALE SELECTOR TO + RLCA ; ... GO FROM Z180 4K PAGE SIZE + RLCA ; ... TO DESIRED 32K PAGE SIZE + OUT0 (Z180_BBR),A ; WRITE TO BANK BASE + LD A,N8_DEFACR | 80H ; SELECT RAM BY SETTING BIT 7 + OUT0 (N8_ACR),A ; ... IN N8 ACR REGISTER + RET ; DONE +; +HBX_ROM: + OUT0 (N8_RMAP),A ; BANK INDEX TO N8 RMAP REGISTER + XOR A ; ZERO ACCUM + OUT0 (Z180_BBR),A ; ZERO BANK BASE + LD A,N8_DEFACR ; SELECT ROM BY CLEARING BIT 7 + OUT0 (N8_ACR),A ; ... IN N8 ACR REGISTER + RET ; DONE ; #ENDIF #IF (PLATFORM == PLT_MK4) -; BIT 7,A ; RAM? -; JR Z,HBX_BNKSEL1 ; IF NOT, BYPASS -; XOR %10010000 ; CLEAR BIT 8, SET BIT 4 TO ADDRESS RAM -; -HBX_BNKSEL1: - RLCA - RLCA - RLCA - OUT0 (CPU_BBR),A + RLCA ; RAM FLAG TO CARRY FLAG AND BIT 0 + JR NC,HBX_BNKSEL1 ; IF NC, WANT ROM PAGE, SKIP AHEAD + XOR %00100001 ; SET BIT FOR HI 512K, CLR BIT 0 +HBX_BNKSEL1: + RLCA ; CONTINUE SHIFTING TO SCALE SELECTOR + RLCA ; FOR Z180 4K PAGE -> DESIRED 32K PAGE + OUT0 (Z180_BBR),A ; WRITE TO BANK BASE + RET ; DONE #ENDIF - RET ; ;:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: ; Copy Data - Possibly between banks. This resembles CP/M 3, but ; usage of the HL and DE registers is reversed. ; Caller MUST ensure stack is already in high memory. ; Enter: -; HL = Source Address +; HL = Source Address ; DE = Destination Address ; BC = Number of bytes to copy ; Exit : None @@ -239,7 +215,7 @@ HBX_CPYBNK .EQU $ - 1 ; HBX_BNKCPY4: ; Switch to source bank LD A,(HB_SRCBNK) ; Get source bank - CALL HBX_BNKSEL ; Set bank without making it current + CALL HBX_BNKSEL ; Set source bank ; ; Copy BC bytes from HL -> BUF, allow HL to increment PUSH BC ; Save copy length @@ -251,7 +227,7 @@ HBX_BNKCPY4: ; Switch to source bank ; ; Switch to dest bank LD A,(HB_DSTBNK) ; Get destination bank - CALL HBX_BNKSEL ; Set bank without making it current + CALL HBX_BNKSEL ; Set destination bank ; ; Copy BC bytes from BUF -> HL, allow DE to increment PUSH BC ; Save copy length @@ -273,7 +249,7 @@ HBX_BNKCALL: LD A,(HB_CURBNK) ; get current bank PUSH AF ; save for return HBX_TGTBNK .EQU $ + 1 - LD A,$FF ; load bank to call ($ff overlaid at entry) + LD A,$FF ; load bank to call ($FF overlaid at entry) CALL HBX_BNKSEL ; activate the new bank HBX_TGTADR .EQU $ + 1 CALL $FFFF ; call routine ($FFFF is overlaid above) @@ -287,108 +263,112 @@ HBX_TGTADR .EQU $ + 1 ; ; INTERRUPT HANDLER DISPATCHING ; -INT_TIMER: - PUSH HL - LD HL,HB_TIMINT - JR HBX_INT +INT_TIMER: ; TIMER INTERRUPT HANDLER + PUSH HL ; SAVE HL + LD HL,HB_TIMINT ; HL := INT ADR IN BIOS + JR HBX_INT ; GO TO ROUTING CODE ; -INT_BAD: - PUSH HL +INT_BAD: ; BAD INTERRUPT HANDLER + PUSH HL ; SAVE HL LD HL,HB_BADINT JR HBX_INT ; ; COMMON INTERRUPT DISPATCHING CODE ; SETUP AND CALL HANDLER IN BIOS BANK ; -HBX_INT: - ; SAVE STATE (HL MUST BE SAVED PREVIOUSLY) - PUSH AF - PUSH BC - PUSH DE +HBX_INT: ; COMMON INTERRUPT ROUTING CODE +; + ; SAVE STATE (ASSUMES HL SAVED PREVIOUSLY) + PUSH AF ; SAVE AF + PUSH BC ; SAVE BC + PUSH DE ; SAVE DE ; ACTIVATE BIOS BANK -#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA)) - LD A,BID_BIOS - OUT (MPCL_ROM),A - OUT (MPCL_RAM),A +#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_ZETA)) + LD A,BID_BIOS ; BIOS PAGE INDEX TO ACCUM + OUT (MPCL_ROM),A ; SET ROM PAGE SELECTOR + OUT (MPCL_RAM),A ; SET RAM PAGE SELECTOR #ENDIF #IF (PLATFORM == PLT_ZETA2) - LD A,(BID_BIOS - $80 + $10) * 2 - OUT (MPGSEL_0),A ; BANK_0: 0K - 16K - INC A - OUT (MPGSEL_1),A ; BANK_1: 16K - 32K + LD A,(BID_BIOS - $80 + $10) * 2 ; BIOS BID -> PAGE INDEX -> A + OUT (MPGSEL_0),A ; BANK_0: 0K - 16K + INC A ; + OUT (MPGSEL_1),A ; BANK_1: 16K - 32K #ENDIF #IF (PLATFORM == PLT_N8) - LD A,(BID_BIOS << 3) & $FF - OUT0 (CPU_BBR),A - LD A,DEFACR | $80 - OUT0 (ACR),A + LD A,(BID_BIOS << 3) & $FF ; BIOS BID -> BBR VAL -> A + OUT0 (Z180_BBR),A ; WRITE TO Z180 BANK BASE REG + LD A,N8_DEFACR | $80 ; BIT 7 SET FOR RAM + OUT0 (N8_ACR),A ; WRITE TO N8 ACR #ENDIF #IF (PLATFORM == PLT_MK4) - LD A,BID_BIOS << 3 - OUT0 (CPU_BBR),A + LD A,(BID_BIOS << 3) & $FF | $80 ; BIOS BID -> PAGE INDEX -> A + OUT0 (Z180_BBR),A ; WRITE TO Z180 BANK BASE REG #ENDIF ; SETUP INTERRUPT PROCESSING STACK IN HBIOS - LD (HB_INTSTKSAV),SP - LD SP,HB_INTSTK + LD (HB_INTSTKSAV),SP ; SAVE STACK POINTER + LD SP,HB_INTSTK ; SWITCH TO INTERRUPT STACK ; DO THE REAL WORK - CALL JPHL + CALL JPHL ; CALL INTERRUPT ROUTINE ; RESTORE STACK - LD SP,(HB_INTSTKSAV) + LD SP,(HB_INTSTKSAV) ; RESTORE STACK ; RESTORE BANK - LD A,(HB_CURBNK) ; SET TARGET BANK + LD A,(HB_CURBNK) ; GET PRE-INT BANK ; -#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA)) - OUT (MPCL_ROM),A - OUT (MPCL_RAM),A +#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_ZETA)) + OUT (MPCL_ROM),A ; SET ROM PAGE SELECTOR + OUT (MPCL_RAM),A ; SET RAM PAGE SELECTOR #ENDIF #IF (PLATFORM == PLT_ZETA2) - BIT 7,A - JR Z,HBX_INT1 ; JUMP IF IT IS A ROM PAGE - RES 7,A ; RAM PAGE REQUESTED: CLEAR ROM BIT - ADD A,16 ; ADD 16 x 32K - RAM STARTS FROM 512K + BIT 7,A ; BIT 7 SET REQUESTS RAM PAGE + JR Z,HBX_INT1 ; NOT SET, SELECT ROM PAGE + RES 7,A ; RAM PAGE REQUESTED: CLEAR ROM BIT + ADD A,16 ; ADD 16 x 32K - RAM STARTS FROM 512K ; HBX_INT1: RLCA ; TIMES 2 - GET 16K PAGE INSTEAD OF 32K OUT (MPGSEL_0),A ; BANK_0: 0K - 16K - INC A + INC A ; OUT (MPGSEL_1),A ; BANK_1: 16K - 32K #ENDIF #IF (PLATFORM == PLT_N8) - BIT 7,A - JR Z,HBX_INT1 -; - RES 7,A - RLCA - RLCA - RLCA - OUT0 (CPU_BBR),A - JR HBX_INT2 -; -HBX_INT1: - XOR A - OUT0 (CPU_BBR),A - LD A,DEFACR - OUT0 (ACR),A + BIT 7,A ; TEST BIT 7 FOR RAM VS. ROM + JR Z,HBX_INT1 ; IF NOT SET, SELECT ROM PAGE +; + RES 7,A ; CLEAR BIT 7 FOR RAM VS. ROM + RLCA ; SCALE SELECTOR TO + RLCA ; ... GO FROM Z180 4K PAGE SIZE + RLCA ; ... TO DESIRED 32K PAGE SIZE + OUT0 (Z180_BBR),A ; WRITE TO BANK BASE + JR HBX_INT2 ; CONTINUE +; +HBX_INT1: ; SELECT ROM PAGE + XOR A ; ZERO ACCUM + OUT0 (Z180_BBR),A ; ZERO BANK BASE + LD A,N8_DEFACR ; SELECT ROM BY CLEARING BIT 7 + OUT0 (N8_ACR),A ; ... IN N8 ACR REGISTER ; HBX_INT2: #ENDIF #IF (PLATFORM == PLT_MK4) - RLCA - RLCA - RLCA - OUT0 (CPU_BBR),A + RLCA ; RAM FLAG TO CARRY AND BIT 0 + JR NC,HBX_INT1 ; IF NC, ROM, SKIP AHEAD + XOR %00100001 ; SET BIT FOR HI 512K, CLR BIT 0 +HBX_INT1: + RLCA ; ROTATE + RLCA ; ... AGAIN + OUT0 (Z180_BBR),A ; WRITE TO BANK REGISTER #ENDIF ; ; RESTORE STATE - POP DE - POP BC - POP AF - POP HL + POP DE ; RESTORE DE + POP BC ; RESTORE BC + POP AF ; RESTORE AF + POP HL ; RESTORE HL ; DONE RETI ; IMPLICITLY REENABLES INTERRUPTS! @@ -404,7 +384,7 @@ HBX_SLACK .EQU (HBX_LOC + HBX_CODSIZ - $) ; ; HBIOS INTERRUPT VECTOR TABLE (16 ENTRIES) ; -HBX_IVT ; .FILL HBX_IVTSIZ,$FF +HBX_IVT: .DW INT_TIMER .DW INT_BAD .DW INT_BAD @@ -444,7 +424,7 @@ HBX_STACK .EQU $ JP HBX_BNKSEL ; FIXED ADR ENTRY FOR HBX_BNKSEL JP HBX_BNKCPY ; FIXED ADR ENTRY FOR HBX_BNKCPY JP HBX_BNKCALL ; FIXED ADR ENTRY FOR HBX_BNKCALL - .DW HBX_IDENT ; ADDRESS OF HBIOX PROXY START + .DW HBX_IDENT ; ADDRESS OF HBIOS PROXY START .DW HBX_IDENT ; ADDRESS OF HBIOS IDENT INFO DATA BLOCK ; .FILL $MEMTOP - $ ; FILL TO END OF MEMORY (AS NEEDED) @@ -463,165 +443,63 @@ HBX_STACK .EQU $ JP HB_DISPATCH ; VECTOR TO DISPATCHER ; ;================================================================================================== -; CHARACTER DEVICE LIST -;================================================================================================== -; -#DEFINE CHRENT(DEV,UNIT) \ -#DEFCONT .DB DEV | UNIT -; - .DB CHRCNT -CHRMAP: -#IFDEF CHRLST - CHRLST -#ELSE - -#IF ASCIENABLE - CHRENT(CIODEV_ASCI,0) ; ASCI0: - CHRENT(CIODEV_ASCI,1) ; ASCI1: -#ENDIF - -#IF UARTENABLE -#IF (UARTCNT >= 1) - CHRENT(CIODEV_UART,0) ; UART0: -#ENDIF -#IF (UARTCNT >= 2) - CHRENT(CIODEV_UART,1) ; UART1: -#ENDIF -#IF (UARTCNT >= 3) - CHRENT(CIODEV_UART,2) ; UART2: -#ENDIF -#IF (UARTCNT >= 4) - CHRENT(CIODEV_UART,3) ; UART3: -#ENDIF -#ENDIF - -#ENDIF -; -CHRCNT .EQU ($ - CHRMAP) / 1 - .ECHO CHRCNT - .ECHO " character devices defined.\n" -; -;================================================================================================== -; DISK DEVICE LIST -;================================================================================================== -; -#DEFINE DEVENT(DEV,UNIT) \ -#DEFCONT .DB DEV | UNIT -; - .DB DEVCNT -DEVMAP: -#IFDEF DEVLST - DEVLST -#ELSE - -; RAM/ROM MEMORY DISK UNITS -#IF MDENABLE - DEVENT(DIODEV_MD,1) ; MD1: (RAM DISK) - DEVENT(DIODEV_MD,0) ; MD0: (ROM DISK) -#ENDIF - -#IF FDENABLE - DEVENT(DIODEV_FD,0) ; FD0: (PRIMARY FLOPPY DRIVE) - DEVENT(DIODEV_FD,1) ; FD1: (SECONDARY FLOPPY DRIVE) -#ENDIF - -; RAM FLOPPY MEMORY DISK UNITS -#IF RFENABLE - DEVENT(DIODEV_RF,0) ; RF0: (RAMFLOPPY DISK UNIT 0) -; DEVENT(DIODEV_RF,1) ; RF1: (RAMFLOPPY DISK UNIT 1) -#ENDIF - -; IDE DISK UNITS -#IF IDEENABLE - DEVENT(DIODEV_IDE,0) ; IDE0: (IDE PRIMARY MASTER DISK) -; DEVENT(DIODEV_IDE,1) ; IDE1: (IDE PRIMARY SLAVE DISK) -#ENDIF - -; PPIDE DISK UNITS -#IF PPIDEENABLE - DEVENT(DIODEV_PPIDE,0) ; PPIDE0: (PAR PORT IDE PRIMARY MASTER DISK) -; DEVENT(DIODEV_PPIDE,1) ; PPIDE1: (PAR PORT IDE PRIMARY SLAVE DISK) -#ENDIF - -; SD CARD DISK UNITS -#IF SDENABLE - DEVENT(DIODEV_SD,0) ; SD0: (SD CARD DISK) -#ENDIF - -; PROPIO SD CARD DISK UNITS -#IF (PRPENABLE & PRPSDENABLE) - DEVENT(DIODEV_PRPSD,0) ; PRPSD0: (PROPIO SD DISK) -#ENDIF - -; PARPORTPROP SD CARD DISK UNITS -#IF (PPPENABLE & PPPSDENABLE) - DEVENT(DIODEV_PPPSD,0) ; PPPSD0: (PARPORTPROP SD DISK) -#ENDIF - -; SIMH EMULATOR DISK UNITS -#IF HDSKENABLE - DEVENT(DIODEV_HDSK,0) ; HDSK0: (SIMH DISK DRIVE 0) - DEVENT(DIODEV_HDSK,1) ; HDSK1: (SIMH DISK DRIVE 1) -#ENDIF - -#ENDIF -; -DEVCNT .EQU ($ - DEVMAP) / 1 - .ECHO DEVCNT - .ECHO " disk devices defined.\n" -; -;================================================================================================== ; SYSTEM INITIALIZATION ;================================================================================================== ; HB_START: ; - #IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) ; SET BASE FOR CPU IO REGISTERS - LD A,CPU_BASE - OUT0 (CPU_ICR),A + LD A,Z180_BASE + OUT0 (Z180_ICR),A ; DISABLE REFRESH XOR A - OUT0 (CPU_RCR),A + OUT0 (Z180_RCR),A ; SET DEFAULT WAIT STATES TO ACCURATELY MEASURE CPU SPEED LD A,$F0 - OUT0 (CPU_DCNTL),A + OUT0 (Z180_DCNTL),A #IF (Z180_CLKDIV >= 1) ; SET CLOCK DIVIDE TO 1 RESULTING IN FULL XTAL SPEED LD A,$80 - OUT0 (CPU_CCR),A + OUT0 (Z180_CCR),A #ENDIF #IF (Z180_CLKDIV >= 2) ; SET CPU MULTIPLIER TO 1 RESULTING IN XTAL * 2 SPEED LD A,$80 - OUT0 (CPU_CMR),A + OUT0 (Z180_CMR),A #ENDIF #ENDIF - +; CALL HB_CPUSPD ; CPU SPEED DETECTION ; #IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) ; - ; SET DESIRED WAIT STATES LD A,0 + (Z180_MEMWAIT << 6) | (Z180_IOWAIT << 4) - OUT0 (CPU_DCNTL),A + OUT0 (Z180_DCNTL),A ; #ENDIF +; + CALL DELAY_INIT ; INITIALIZE SPEED COMPENSATED DELAY FUNCTIONS ; ; ANNOUNCE HBIOS +; +; +; DISPLAY THE PRE-INITIALIZATION BANNER ; + CALL NEWLINE + CALL NEWLINE + PRTX(STR_BANNER) CALL NEWLINE CALL NEWLINE PRTX(STR_PLATFORM) PRTS(" @ $") - LD HL,(HB_CPUKHZ) + LD HL,(HCB + HCB_CPUKHZ) CALL PRTD3M ; PRINT AS DECIMAL WITH 3 DIGIT MANTISSA PRTS("MHz ROM=$") LD HL,ROMSIZE @@ -631,17 +509,11 @@ HB_START: CALL PRTDEC PRTS("KB$") ; -; DURING INITIALIZATION, CONSOLE IS ALWAYS PRIMARY SERIAL PORT -; POST-INITIALIZATION, WILL BE SWITCHED TO USER CONFIGURED CONSOLE -; - LD A,BOOTCON - LD (CONDEV),A -; ; PERFORM DEVICE INITIALIZATION ; LD B,HB_INITTBLLEN LD DE,HB_INITTBL -INITSYS2: +INITSYS1: CALL NEWLINE LD A,(DE) LD L,A @@ -654,34 +526,44 @@ INITSYS2: CALL JPHL POP BC POP DE - DJNZ INITSYS2 + DJNZ INITSYS1 ; ; SET UP THE DEFAULT DISK BUFFER ADDRESS ; LD HL,HB_BUF ; DEFAULT DISK XFR BUF ADDRESS LD (DIOBUF),HL ; SAVE IT ; -; NOW SWITCH TO USER CONFIGURED CONSOLE +; NOW SWITCH TO CRT CONSOLE IF CONFIGURED ; -#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4) | (PLATFORM == PLT_S100)) - LD A,DEFCON -#ELSE +#IF CRTACT +; +; IF PLATFORM HAS A CONFIG JUMPER, CHECK TO SEE IF IT IS JUMPERED. +; IF SO, BYPASS SWITCH TO CRT CONSOLE (FAILSAFE MODE) +; +#IF ((PLATFORM != PLT_N8) & (PLATFORM != PLT_MK4)) IN A,(RTC) ; RTC PORT, BIT 6 HAS STATE OF CONFIG JUMPER BIT 6,A ; BIT 6 HAS CONFIG JUMPER STATE - LD A,DEFCON ; ASSUME WE WANT DEFAULT CONSOLE - JR NZ,INITSYS1 ; IF NZ, JUMPER OPEN, DEF CON IS CORRECT - LD A,ALTCON ; JUMPER SHORTED, USE ALTERNATE CONSOLE -INITSYS1: + JR Z,INITSYS2 ; Z=SHORTED, BYPASS CONSOLE SWITCH #ENDIF - LD (CONDEV),A ; SET THE ACTIVE CONSOLE DEVICE ; -; DISPLAY THE POST-INITIALIZATION BANNER + ; NOTIFY USER OF CONSOLE SWITCH ON BOOT CONSOLE + CALL NEWLINE + CALL NEWLINE + PRTX(STR_SWITCH) + CALL NEWLINE +; + ; SWITCH TO CRT CONSOLE + LD A,CRTDEV ; GET CRT DISPLAY DEVICE + LD (HCB + HCB_CONDEV),A ; SAVE IT ; + ; DISPLAY HBIOS BANNER ON NEW CONSOLE CALL NEWLINE CALL NEWLINE PRTX(STR_BANNER) CALL NEWLINE +#ENDIF ; +INITSYS2: RET ; ;================================================================================================== @@ -854,20 +736,20 @@ CIO_DISPATCH: CP CIODEV_N8V JP Z,N8V_DISPCIO #ENDIF - CP CIODEV_CRT - JR Z,CIOEMU + CP CIODEV_VDA + JR Z,CIOVDA CP CIODEV_CONSOLE JR Z,CIOCON CALL PANIC ; -CIOEMU: +CIOVDA: LD A,B ADD A,BF_EMU - BF_CIO ; TRANSLATE FUNCTION CIOXXX -> EMUXXX LD B,A JP EMU_DISPATCH ; CIOCON: - LD A,(CONDEV) + LD A,(HCB + HCB_CONDEV) LD C,A JR CIO_DISPATCH ; @@ -883,7 +765,7 @@ CIO_COMMON: ; CHARACTER DEVICE: GET DEVICE COUNT ; CIO_GETCNT: - LD A,(CHRMAP - 1) ; GET DEVICE COUNT + LD A,(HCB + HCB_CDL - 1) ; GET DEVICE COUNT (FIRST BYTE OF LIST) LD B,A ; PUT IT IN B XOR A ; SIGNALS SUCCESS RET @@ -891,7 +773,7 @@ CIO_GETCNT: ; CHARACTER DEVICE: GET DEVICE INFO ; CIO_GETINF: - LD HL,CHRMAP - 1 ; POINT TO DEVICE MAP ENTRY COUNT + LD HL,HCB + HCB_CDL - 1 ; POINT TO DEVICE MAP ENTRY COUNT (FIRST BYTE OF LIST) LD B,(HL) ; ENTRY COUNT TO B LD A,C ; INDEX TO A CP B ; CHECK INDEX AGAINST MAX VALUE (INDEX - COUNT) @@ -908,7 +790,7 @@ CIO_GETINF1: ; ;================================================================================================== ; DISK I/O DEVICE DISPATCHER -;================= ================================================================================= +;================================================================================================== ; ; ROUTE CALL TO SPECIFIED DISK I/O DRIVER ; B: FUNCTION @@ -983,10 +865,10 @@ DIO_COMMON: JR Z,DIO_GETBUF ; YES, HANDLE IT DEC A ; FUNCTION = DIOSETBUF? JR Z,DIO_SETBUF ; YES, HANDLE IT - DEC A ; FUNCTION = DIODEVCNT? - JR Z,DIO_DEVCNT ; YES, HANDLE IT - DEC A ; FUNCTION = DIODEVINF? - JR Z,DIO_DEVINF ; YES, HANDLE IT + DEC A ; FUNCTION = DIOGETCNT? + JR Z,DIO_GETCNT ; YES, HANDLE IT + DEC A ; FUNCTION = DIOGETINF? + JR Z,DIO_GETINF ; YES, HANDLE IT CALL PANIC ; INVALID FUNCTION SPECFIED ; ; DISK: GET BUFFER ADDRESS @@ -1010,27 +892,27 @@ DIO_SETBUF1: ; ; DISK: GET DEVICE COUNT ; -DIO_DEVCNT: - LD A,(DEVMAP - 1) ; GET DEVICE COUNT +DIO_GETCNT: + LD A,(HCB + HCB_DDL - 1) ; GET DEVICE COUNT (FIRST BYTE OF LIST) LD B,A ; PUT IT IN B XOR A ; SIGNALS SUCCESS RET ; ; DISK: GET DEVICE INFO ; -DIO_DEVINF: - LD HL,DEVMAP - 1 ; POINT TO DEVICE MAP ENTRY COUNT +DIO_GETINF: + LD HL,HCB + HCB_DDL - 1 ; POINT TO DEVICE MAP ENTRY COUNT (FIRST BYTE OF LIST) LD B,(HL) ; ENTRY COUNT TO B LD A,C ; INDEX TO A CP B ; CHECK INDEX AGAINST MAX VALUE (INDEX - COUNT) - JR NC,DIO_DEVINF1 ; IF INDEX TOO HIGH, ERR + JR NC,DIO_GETINF1 ; IF INDEX TOO HIGH, ERR INC HL ; BUMP TO START OF DEV MAP ENTRIES CALL ADDHLA ; AND POINT TO REQUESTED INDEX LD C,(HL) ; DEVICE/UNIT TO C XOR A ; SIGNAL SUCCESS RET ; DONE -DIO_DEVINF1: +DIO_GETINF1: OR $FF ; SIGNAL ERROR RET ; RETURN ; @@ -1064,14 +946,14 @@ EMU_DISPATCH: CP BF_EMUINI JR NC,EMU_COMMON ; - LD A,(CUREMU) ; GET ACTIVE EMULATION + LD A,(HCB + HCB_CUREMU) ; GET ACTIVE EMULATION ; -#IF (TTYENABLE) DEC A ; 1 = TTY +#IF (TTYENABLE) JP Z,TTY_DISPATCH #ENDIF -#IF (ANSIENABLE) DEC A ; 2 = ANSI +#IF (ANSIENABLE) JP Z,ANSI_DISPATCH #ENDIF CALL PANIC ; INVALID @@ -1092,9 +974,9 @@ EMU_COMMON: ; EMU_INI: LD A,E ; LOAD REQUESTED EMULATION TYPE - LD (CUREMU),A ; SAVE IT + LD (HCB + HCB_CUREMU),A ; SAVE IT LD A,C ; LOAD REQUESTED VDA DEVICE/UNIT - LD (CURVDA),A ; SAVE IT + LD (HCB + HCB_CURVDA),A ; SAVE IT ; ; UPDATE EMULATION VDA DISPATCHING ADDRESS #IF (VDUENABLE) @@ -1128,9 +1010,9 @@ EMU_INI1: ; RETURN CURRENT EMULATION TYPE IN E ; EMU_QRY: - LD A,(CURVDA) + LD A,(HCB + HCB_CURVDA) LD C,A - LD A,(CUREMU) + LD A,(HCB + HCB_CUREMU) LD E,A JP EMU_VDADISP ; NOW LET EMULATOR COMPLETE THE FUNCTION ; @@ -1142,7 +1024,7 @@ EMU_QRY: ; VDA TARGET AT ANY TIME, THE FOLLOWING IMPLEMENTS A FAST DISPATCHING ; MECHANISM THAT THE EMULATION HANDLERS CAN USE TO BYPASS SOME OF THE ; VDA DISPATCHING LOGIC. EMU_VDADISP CAN BE CALLED TO DISPATCH DIRECTLY -; TO THE CURRENT VDA EMULATION TARGET. IT IS A JUMP INSTRUCTION THAT +; TO THE CURRENT VDA EMULATION TARGET. IT IS A JUMP INSTRUCTION THAT ; IS DYNAMICALLY MODIFIED TO POINT TO THE VDA DISPATCHER FOR THE ; CURRENT EMULATION VDA TARGET. ; @@ -1156,23 +1038,23 @@ VDA_DISPERR: ; BASED ON THE DEFAULT VDA. ; VDA_DISPADR .EQU VDA_DISPERR -#IF (VDUENABLE & (DEFVDA == VDADEV_VDU)) +#IF (VDUENABLE & (VDADEV == VDADEV_VDU)) VDA_DISPADR .SET VDU_DISPVDA #ENDIF -#IF (CVDUENABLE & (DEFVDA == VDADEV_CVDU)) +#IF (CVDUENABLE & (VDADEV == VDADEV_CVDU)) VDA_DISPADR .SET CVDU_DISPVDA #ENDIF -#IF (VDUENABLE & (DEFVDA == VDADEV_UPD7220)) +#IF (VDUENABLE & (VDADEV == VDADEV_UPD7220)) VDA_DISPADR .SET UPD7220_DISPVDA #ENDIF -#IF (N8VENABLE & (DEFVDA == VDADEV_N8V)) +#IF (N8VENABLE & (VDADEV == VDADEV_N8V)) VDA_DISPADR .SET N8V_DISPVDA #ENDIF ; ; BELOW IS THE DYNAMICALLY MANAGED EMULATION VDA DISPATCH. ; EMULATION HANDLERS CAN CALL EMU_VDADISP TO INVOKE A VDA ; FUNCTION. EMU_VDADISPADR IS USED TO MARK THE LOCATION -; OF THE VDA DISPATCH ADDRESS. THIS ALLOWS US TO MODIFY +; OF THE VDA DISPATCH ADDRESS. THIS ALLOWS US TO MODIFY ; THE CODE DYNAMICALLY WHEN EMULATION IS INITIALIZED AND ; A NEW VDA TARGET IS SPECIFIED. ; @@ -1227,11 +1109,20 @@ SYS_DISPATCH: DEC A JP Z,SYS_XCOPY ; $F3 DEC A - JR Z,SYS_ATTR ; $F4 + ;JR Z,SYS_ATTR ; $F4 DEC A ;JR Z,SYS_XXXX ; $F5 DEC A JR Z,SYS_GETVER ; $F6 + DEC A + DEC A + JR Z,SYS_HCBGETB ; $F8 + DEC A + JR Z,SYS_HCBPUTB ; $F9 + DEC A + JR Z,SYS_HCBGETW ; $FA + DEC A + JR Z,SYS_HCBPUTW ; $FB CALL PANIC ; INVALID ; ; SET ACTIVE MEMORY BANK AND RETURN PREVIOUSLY ACTIVE MEMORY BANK @@ -1274,30 +1165,6 @@ SYS_XCOPY: XOR A RET ; -; GET/SET SYSTEM ATTRIBUTE -; C: ATTRIBUTE ID (BIT 7 INDICATES GET/SET, ON=SET) -; DE: ATTRIBUTE VALUES -; -SYS_ATTR: - LD A,C ; LOAD ATTRIB ID - AND $7F ; MASK OUT GET/SET BIT - RLCA ; MULTIPLY BY 2 FOR WORD OFFSET - LD HL,HB_ATTR ; POINT TO START OF ATTR TABLE - CALL ADDHLA ; ADD THE OFFSET - BIT 7,C ; TEST HIGH BIT - JR NZ,SYS_ATTR1 ; IF SET, GO TO SET OPER - LD E,(HL) ; GET LSB TO E - INC HL ; NEXT BYTE - LD D,(HL) ; GET MSB TO D - XOR A - RET -SYS_ATTR1: - LD (HL),E ; SAVE LSB - INC HL ; NEXT BYTE - LD (HL),D ; SAVE MSB - XOR A - RET -; ; GET THE CURRENT HBIOS VERSION ; RETURNS VERSION IN DE AS BCD ; D: MAJOR VERION IN TOP 4 BITS, MINOR VERSION IN LOW 4 BITS @@ -1310,6 +1177,53 @@ SYS_GETVER: XOR A RET ; +; GET HCB VALUE BYTE +; C: HCB INDEX (OFFSET INTO HCB) +; RETURN BYTE VALUE IN E +; +SYS_HCBGETB: + CALL SYS_HCBPTR ; LOAD HL WITH PTR + LD E,(HL) ; GET BYTE VALUE + RET ; DONE +; +; PUT HCB VALUE BYTE +; C: HCB INDEX (OFFSET INTO HCB) +; E: VALUE TO WRITE +; +SYS_HCBPUTB: + CALL SYS_HCBPTR ; LOAD HL WITH PTR + LD (HL),E ; PUT BYTE VALUE + RET +; +; GET HCB VALUE WORD +; C: HCB INDEX (OFFSET INTO HCB) +; RETURN WORD VALUE IN DE +; +SYS_HCBGETW: + CALL SYS_HCBPTR ; LOAD HL WITH PTR + LD E,(HL) ; GET BYTE VALUE + INC HL + LD D,(HL) ; GET BYTE VALUE + RET ; DONE +; +; PUT HCB VALUE WORD +; C: HCB INDEX (OFFSET INTO HCB) +; DE: VALUE TO WRITE +; +SYS_HCBPUTW: + CALL SYS_HCBPTR ; LOAD HL WITH PTR + LD (HL),E ; PUT BYTE VALUE + INC HL + LD (HL),D ; PUT BYTE VALUE + RET +; +; CALCULATE REAL ADDRESS OF HCB VALUE FROM HCB OFFSET +; +SYS_HCBPTR: + LD A,C ; LOAD INDEX (HCB OFFSET) + LD HL,HCB ; GET HCB ADDRESS + JP ADDHLA ; CALC REAL ADDRESS AND RET +; ;================================================================================================== ; GLOBAL HBIOS FUNCTIONS ;================================================================================================== @@ -1535,11 +1449,12 @@ SIZ_ANSI .EQU $ - ORG_ANSI ; #DEFINE CIOMODE_CONSOLE #DEFINE DSKY_KBD +#DEFINE USEDELAY #INCLUDE "util.asm" #INCLUDE "time.asm" #INCLUDE "bcd.asm" ; -#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA) | (PLATFORM == PLT_ZETA2)) +#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_ZETA) | (PLATFORM == PLT_ZETA2)) ; ; DETECT Z80 CPU SPEED USING DS-1302 RTC ; @@ -1578,11 +1493,11 @@ HB_CPUSPD1: SLA L RL H ; - LD (HB_CPUKHZ),HL + LD (HCB + HCB_CPUKHZ),HL LD DE,1000 CALL DIV16 LD A,C - LD (HB_CPUMHZ),A + LD (HCB + HCB_CPUMHZ),A ; RET ; @@ -1668,11 +1583,11 @@ HB_CPUSPD1: SLA L RL H ; - LD (HB_CPUKHZ),HL + LD (HCB + HCB_CPUKHZ),HL LD DE,1000 CALL DIV16 LD A,C - LD (HB_CPUMHZ),A + LD (HCB + HCB_CPUMHZ),A ; RET ; @@ -1761,34 +1676,22 @@ PRTD3M3: ; HBIOS GLOBAL DATA ;================================================================================================== ; -CONDEV .DB BOOTCON -; IDLECOUNT .DB 0 ; HSTDSK .DB 0 ; DISK IN BUFFER HSTTRK .DW 0 ; TRACK IN BUFFER HSTSEC .DW 0 ; SECTOR IN BUFFER ; -CUREMU .DB DEFEMU ; CURRENT EMULATION -CURVDA .DB DEFVDA ; CURRENT VDA TARGET FOR EMULATION -; DIOBUF .DW HB_BUF ; PTR TO 1024 BYTE DISK XFR BUFFER ; -BOOTDRV .DW 0 ; BOOT DRIVE / LU -; HB_INTSTKSAV .DW 0 ; SAVED STACK POINTER DURING INT PROCESSING - .FILL $40,$FF -HB_INTSTK .EQU $ + .FILL $40,$FF ; 32 ENTRY STACK FOR INTERRUPT PROCESSING +HB_INTSTK .EQU $ ; TOP OF INTERRUPT PROCESSING STACK ; -;STR_BANNER .DB "N8VEM HBIOS v", BIOSVER, ", ", BIOSBLD, ", ", TIMESTAMP, "$" -STR_BANNER .DB "N8VEM HBIOS v", BIOSVER, ", ", TIMESTAMP, "$" +STR_BANNER .DB "SBC HBIOS v", BIOSVER, ", ", TIMESTAMP, "$" STR_PLATFORM .DB PLATFORM_NAME, "$" -; -HB_ATTR: ; ATTRIBUTE TABLE, 128 WORD VALUES -AT_BOOTVOL .DW 0 ; BOOT VOLUME, MSB=DEV/UNIT, LSB=LU -AT_BOOTROM .DW 0 ; BANK ID OF ROM PAGE BOOTED - .FILL HB_ATTR + 256 - $,0 ; FILL OUT UNUSED ENTRIES +STR_SWITCH .DB "*** Console switch to CRT device ***$" ; HB_BUF .EQU $ ; PHYSICAL DISK BUFFER HB_END .EXPORT HB_END ; EXPORT ENDING ADDRESS diff --git a/Source/HBIOS/hbios.inc b/Source/HBIOS/hbios.inc new file mode 100644 index 00000000..cbce248b --- /dev/null +++ b/Source/HBIOS/hbios.inc @@ -0,0 +1,159 @@ +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +; +; HBIOS FUNCTIONS +; +BF_CIO .EQU $00 +BF_CIOIN .EQU BF_CIO + 0 ; CHARACTER INPUT +BF_CIOOUT .EQU BF_CIO + 1 ; CHARACTER OUTPUT +BF_CIOIST .EQU BF_CIO + 2 ; CHARACTER INPUT STATUS +BF_CIOOST .EQU BF_CIO + 3 ; CHARACTER OUTPUT STATUS +BF_CIOCFG .EQU BF_CIO + 4 ; CHARACTER I/O CONFIG +BF_CIOGETCNT .EQU BF_CIO + 8 ; CHARACTER DEVICE COUNT +BF_CIOGETINF .EQU BF_CIO + 9 ; CHARACTER DEVICE INFO +; +BF_DIO .EQU $10 +BF_DIORD .EQU BF_DIO + 0 ; DISK READ +BF_DIOWR .EQU BF_DIO + 1 ; DISK WRITE +BF_DIOST .EQU BF_DIO + 2 ; DISK STATUS +BF_DIOMED .EQU BF_DIO + 3 ; DISK MEDIA +BF_DIOID .EQU BF_DIO + 4 ; DISK IDENTIFY +BF_DIOGETBUF .EQU BF_DIO + 8 ; DISK GET BUFFER ADR +BF_DIOSETBUF .EQU BF_DIO + 9 ; DISK SET BUFFER ADR +BF_DIOGETCNT .EQU BF_DIO + 10 ; DISK DEVICE COUNT +BF_DIOGETINF .EQU BF_DIO + 11 ; DISK DEVICE INFO +; +BF_RTC .EQU $20 +BF_RTCGETTIM .EQU BF_RTC + 0 ; GET TIME +BF_RTCSETTIM .EQU BF_RTC + 1 ; SET TIME +BF_RTCGETBYT .EQU BF_RTC + 2 ; GET NVRAM BYTE BY INDEX +BF_RTCSETBYT .EQU BF_RTC + 3 ; SET NVRAM BYTE BY INDEX +BF_RTCGETBLK .EQU BF_RTC + 4 ; GET NVRAM DATA BLOCK +BF_RTCSETBLK .EQU BF_RTC + 5 ; SET NVRAM DATA BLOCK +; +BF_EMU .EQU $30 +BF_EMUIN .EQU BF_EMU + 0 ; EMULATOR CHARACTER INPUT +BF_EMUOUT .EQU BF_EMU + 1 ; EMULATOR CHARACTER OUTPUT +BF_EMUIST .EQU BF_EMU + 2 ; EMULATOR CHARACTER INPUT STATUS +BF_EMUOST .EQU BF_EMU + 3 ; EMULATOR CHARACTER OUTPUT STATUS +BF_EMUCFG .EQU BF_EMU + 4 ; EMULATOR CHARACTER I/O CONFIG +BF_EMUINI .EQU BF_EMU + 8 ; INITIALIZE EMULATION +BF_EMUQRY .EQU BF_EMU + 9 ; QUERY EMULATION STATUS +; +BF_VDA .EQU $40 +BF_VDAINI .EQU BF_VDA + 0 ; INITIALIZE VDU +BF_VDAQRY .EQU BF_VDA + 1 ; QUERY VDU STATUS +BF_VDARES .EQU BF_VDA + 2 ; SOFT RESET VDU +BF_VDASCS .EQU BF_VDA + 3 ; SET CURSOR STYLE +BF_VDASCP .EQU BF_VDA + 4 ; SET CURSOR POSITION +BF_VDASAT .EQU BF_VDA + 5 ; SET CHARACTER ATTRIBUTE +BF_VDASCO .EQU BF_VDA + 6 ; SET CHARACTER COLOR +BF_VDAWRC .EQU BF_VDA + 7 ; WRITE CHARACTER +BF_VDAFIL .EQU BF_VDA + 8 ; FILL +BF_VDACPY .EQU BF_VDA + 9 ; COPY +BF_VDASCR .EQU BF_VDA + 10 ; SCROLL +BF_VDAKST .EQU BF_VDA + 11 ; GET KEYBOARD STATUS +BF_VDAKFL .EQU BF_VDA + 12 ; FLUSH KEYBOARD BUFFER +BF_VDAKRD .EQU BF_VDA + 13 ; READ KEYBOARD +; +BF_SYS .EQU $F0 +BF_SYSSETBNK .EQU BF_SYS + 0 ; SET CURRENT BANK +BF_SYSGETBNK .EQU BF_SYS + 1 ; GET CURRENT BANK +BF_SYSCPY .EQU BF_SYS + 2 ; COPY TO/FROM RAM/ROM MEMORY BANK +BF_SYSXCPY .EQU BF_SYS + 3 ; EXTENDED COPY SETUP +BF_SYSGETVER .EQU BF_SYS + 6 ; GET VERSION OF HBIOS +BF_SYSHCBGETB .EQU BF_SYS + 8 ; GET HCB BYTE VALUE +BF_SYSHCBPUTB .EQU BF_SYS + 9 ; PUT HCB BYTE VALUE +BF_SYSHCBGETW .EQU BF_SYS + 10 ; GET HCB WORD VALUE +BF_SYSHCBPUTW .EQU BF_SYS + 11 ; PUT HCB BYTE VALUE +; +; CHARACTER DEVICES +; +CIODEV_UART .EQU $00 +CIODEV_ASCI .EQU $10 +CIODEV_VDU .EQU $20 +CIODEV_CVDU .EQU $30 +CIODEV_UPD7220 .EQU $40 +CIODEV_N8V .EQU $50 +CIODEV_PRPCON .EQU $60 +CIODEV_PPPCON .EQU $70 +CIODEV_CONSOLE .EQU $D0 +CIODEV_VDA .EQU $E0 +CIODEV_NUL .EQU $F0 +; +; DISK DEVICES (ONLY FIRST NIBBLE RELEVANT, SECOND NIBBLE RESERVED FOR UNIT) +; +DIODEV_MD .EQU $00 +DIODEV_FD .EQU $10 +DIODEV_RF .EQU $20 +DIODEV_IDE .EQU $30 +DIODEV_ATAPI .EQU $40 +DIODEV_PPIDE .EQU $50 +DIODEV_SD .EQU $60 +DIODEV_PRPSD .EQU $70 +DIODEV_PPPSD .EQU $80 +DIODEV_HDSK .EQU $90 +; +; VDA DEVICES (VIDEO DISPLAY ADAPTER) +; +VDADEV_NONE .EQU $00 ; NO VDA DEVICE +VDADEV_VDU .EQU $10 ; ECB VDU - 6545 CHIP +VDADEV_CVDU .EQU $20 ; ECB COLOR VDU - 8563 CHIP (NOT IMP) +VDADEV_UPD7220 .EQU $30 ; ECB uP7220 (NOT IMPLEMENTED) +VDADEV_N8V .EQU $40 ; N8 ONBOARD VDA SUBSYSTEM +; +; HBIOS CONTROL BLOCK OFFSETS +; WARNING: THESE OFFSETS WILL CHANGE SIGNIFICANTLY BETWEEN RELEASES +; IT IS STRONGLY RECOMMENDED THAT YOU DO NOT USE THEM! +; +HCB_LOC .EQU $100 ; LOCATION OF HCB IN HBIOS BANK +HCB_SIZ .EQU $100 ; SIZE OF HCB DATA BLOCK +; +HCB_CPUMHZ .EQU $05 ; CPU SPEED IN MHZ (BYTE) +HCB_CPUKHZ .EQU $06 ; CPU SPEED IN KHZ (WORD) +HCB_RAMBANKS .EQU $08 ; TOTAL SIZE OF RAM IN 32K BANKS (BYTE) +HCB_ROMBANKS .EQU $09 ; TOTAL SIZE OF ROM IN 32K BANKS (BYTE) +HCB_BOOTVOL .EQU $0A ; BOOT VOLUME, MSB=DEV/UNIT, LSB=LU (WORD) +HCB_BOOTBID .EQU $0C ; BANK ID OF ROM PAGE BOOTED (BYTE) +HCB_SERDEV .EQU $0D ; PRIMARY SERIAL DEVICE/UNIT (BYTE) +HCB_CRTDEV .EQU $0E ; CRT DISPLAY DEVICE/UNIT (BYTE) +HCB_CONDEV .EQU $0F ; ACTIVE CONSOLE DEVICE/UNIT (BYTE) +HCB_CUREMU .EQU $10 ; CURRENT VDA TERMINAL EMULATION +HCB_CURVDA .EQU $11 ; CURRENT VDA TARGET FOR EMULATION + +; MEMORY BANK IDS (ONE BYTE EACH) +HCB_BIDCOM .EQU $D8 ; COMMON BANK (UPPER 32K) +HCB_BIDUSR .EQU $D9 ; USER BANK (TPA) +HCB_BIDBIOS .EQU $DA ; BIOS BANK (HBIOS, UBIOS) +HCB_BIDAUX .EQU $DB ; AUX BANK (BPBIOS) +HCB_BIDRAMD0 .EQU $DC ; FIRST BANK OF RAM DRIVE +HCB_BIDRAMDN .EQU $DD ; LAST BANK OF RAM DRIVE +HCB_BIDROMD0 .EQU $DE ; FIRST BANK OF ROM DRIVE +HCB_BIDROMDN .EQU $DF ; LAST BANK OF ROM DRIVE + +; DEVICE LISTS (POINTS TO START OF LIST, PREFIXED BY ENTRY COUNT) +HCB_CDL .EQU $E0 + 1 ; CHARACTER DEVICES (MAX 7) +HCB_PDL .EQU $E8 + 1 ; PRINT DEVICE LIST (MAX 3) +HCB_VDL .EQU $EC + 1 ; VIDEO DEVICE LIST (MAX 3) +HCB_DDL .EQU $F0 + 1 ; DISK DEVICE LIST (MAX 15) +; +; HBIOS PROXY COMMON DATA BLOCK +; EXACTLY 32 BYTES AT $FFE0-$FFFF +; +HBX_XFC .EQU $10000 - $20 ; HBIOS PROXY INTERFACE AREA, 32 BYTES FIXED +; +HBX_XFCDAT .EQU HBX_XFC ; DATA PORTION OF HBIOS PROXY INTERFACE AREA +HB_CURBNK .EQU HBX_XFCDAT + 0 ; CURRENTLY ACTIVE LOW MEMORY BANK ID +;HB_PRVBNK .EQU HBX_XFCDAT + 1 ; PREVIOUS BANK (DEPRECATED) +HB_SRCADR .EQU HBX_XFCDAT + 2 ; BNKCPY: DESTINATION BANK ID +HB_SRCBNK .EQU HBX_XFCDAT + 4 ; BNKCPY: SOURCE BANK ID +HB_DSTADR .EQU HBX_XFCDAT + 5 ; BNKCPY: DESTINATION ADDRESS +HB_DSTBNK .EQU HBX_XFCDAT + 7 ; BNKCPY: SOURCE ADDRESS +HB_CNT .EQU HBX_XFCDAT + 8 ; BNKCPY: COUNT +; +HBX_XFCFNS .EQU HBX_XFC + $10 ; JUMP TABLE PORTION OF HBIOS PROXY INTERFACE AREA +HB_INVOKE .EQU HBX_XFCFNS + (0 * 3) ; INVOKE HBIOS FUNCTION +HB_BNKSEL .EQU HBX_XFCFNS + (1 * 3) ; SELECT LOW MEMORY BANK ID +HB_BNKCPY .EQU HBX_XFCFNS + (2 * 3) ; INTERBANK MEMORY COPY +HB_BNKCALL .EQU HBX_XFCFNS + (3 * 3) ; INTERBANK FUNCTION CALL +;HB_LOC .EQU HBX_XFCFNS + 12 ; ADDRESS OF HBIOS PROXY START (DEPRECATED) +HB_IDENT .EQU HBX_XFCFNS + 14 ; POINTER TO HBIOS IDENT DATA BLOCK diff --git a/Source/BIOS/hdsk.asm b/Source/HBIOS/hdsk.asm similarity index 80% rename from Source/BIOS/hdsk.asm rename to Source/HBIOS/hdsk.asm index d55a9b62..6085adba 100644 --- a/Source/BIOS/hdsk.asm +++ b/Source/HBIOS/hdsk.asm @@ -30,6 +30,10 @@ HDSK_DISPATCH: JR Z,HDSK_STATUS DEC A JR Z,HDSK_MEDIA + DEC A + JR Z,HDSK_CAP + DEC A + JR Z,HDSK_GEOM CALL PANIC ; ; HDSK_MEDIA @@ -37,7 +41,7 @@ HDSK_DISPATCH: HDSK_MEDIA: LD A,C ; GET THE DEVICE/UNIT AND $0F ; ISOLATE UNIT - CP 2 ; 2 UNITS + CP HDSKCNT ; NUM UNITS LD A,MID_HD ; ASSUME WE ARE OK RET C ; RETURN XOR A ; NO MEDIA @@ -46,7 +50,9 @@ HDSK_MEDIA: ; ; HDSK_INIT: - PRTS("HDSK: UNITS=4$") + PRTS("HDSK: UNITS=$") + LD A,HDSKCNT + CALL PRTDECB ; XOR A DEC A ; INITIAL STATUS IS NOT READY $FF @@ -61,6 +67,29 @@ HDSK_STATUS: OR A ; SET FLAGS RET ; +; GET DISK CAPACITY +; RETURN HL:DE=BLOCK COUNT, BC=BLOCK SIZE +; SLICE C/H/S = 65/16/16 OR 16,640 TOTAL SECTORS +; ASSUME 8 SLICES, SO 65 X 8 = 520 CYLS OR 16,640 * 8 = 133,120 TOTAL SECTORS +; +HDSK_CAP: + LD HL,133120 >> 16 ; BLOCK COUNT MSW + LD DE,133120 & $FFFF ; BLOCK COUNT LSW + LD BC,512 ; 512 BYTE SECTOR + XOR A ; SIGNAL SUCCESS + RET +; +; GET GEOMETRY +; RETURN HL:DE=CYLINDERS, B=HEADS, C=SECTORS +; +HDSK_GEOM: + LD HL,0 ; CYLINDER COUNT MSW + LD DE,520 ; CYLINDER COUNT LSW + LD B,16 ; HEADS / CYLINDER + LD C,16 ; SECTORS / TRACK + XOR A ; SIGNAL SUCCESS + RET +; ; ; HDSK_READ: diff --git a/Source/BIOS/ide.asm b/Source/HBIOS/ide.asm similarity index 92% rename from Source/BIOS/ide.asm rename to Source/HBIOS/ide.asm index 7630cb78..92bb6bdf 100644 --- a/Source/BIOS/ide.asm +++ b/Source/HBIOS/ide.asm @@ -82,8 +82,13 @@ IDE_MED: ; IDE_MEDIA ; IDE_MEDIA: - LD A,MID_HD - RET + LD A,C ; GET THE DEVICE/UNIT + AND $0F ; ISOLATE UNIT + CP IDECNT ; NUM UNITS + LD A,MID_HD ; ASSUME WE ARE OK + RET C ; RETURN + XOR A ; NO MEDIA + RET ; AND RETURN ; ; ; @@ -91,7 +96,9 @@ IDE_INIT: PRTS("IDE: IO=0x$") LD A,IDEDATA CALL PRTHEXBYTE - PRTS(" UNITS=2$") + PRTS(" UNITS=$") + LD A,IDECNT + CALL PRTDECB ; CALL IDE_RESET XOR A @@ -207,7 +214,7 @@ IDE_OK: IDE_RESET: LD A,000001110B ; NO INTERRUPTS, ASSERT RESET BOTH DRIVES OUT (IDECTRL),A - LD DE,8 ; DELAY ABOUT 200ms + LD DE,16 ; DELAY ~250US CALL VDELAY LD A,000001010B ; NO INTERRUPTS, DEASSERT RESET OUT (IDECTRL),A @@ -221,7 +228,7 @@ IDE_WAITRDY: LD DE,0 ; TIMEOUT IS 250us * 65536 = 15 SECONDS IDE_WBSY: PUSH DE - LD DE,10 ; INNER LOOP DELAY IS 250us (25us * 10) + LD DE,16 ; INNER LOOP DELAY IS ~250us (16us * 16) CALL VDELAY POP DE DEC DE diff --git a/Source/BIOS/kbd.asm b/Source/HBIOS/kbd.asm similarity index 96% rename from Source/BIOS/kbd.asm rename to Source/HBIOS/kbd.asm index 8806dfa5..fe179d7d 100644 --- a/Source/BIOS/kbd.asm +++ b/Source/HBIOS/kbd.asm @@ -1,6 +1,6 @@ ;__________________________________________________________________________________________________ ; -; 8242 BASED PS/2 KEYBOARD DRIVER FOR N8VEM +; 8242 BASED PS/2 KEYBOARD DRIVER FOR SBC ; ; ORIGINAL CODE BY DR JAMES MOXHAM ; ROMWBW ADAPTATION BY WAYNE WARTHEN diff --git a/Source/BIOS/loader.asm b/Source/HBIOS/loader.asm similarity index 56% rename from Source/BIOS/loader.asm rename to Source/HBIOS/loader.asm index 41083f41..e1db6333 100644 --- a/Source/BIOS/loader.asm +++ b/Source/HBIOS/loader.asm @@ -16,10 +16,10 @@ LM_ROM .EQU 1 ; LOAD FROM ROM PAGE LM_IMG .EQU 2 ; LOAD FROM IMAGE LM_COM .EQU 3 ; LOAD FROM COM APP ; -P2LOC .EQU $F000 ; PHASE 2 RUN LOCATION -; LDRMODE .EQU MODE ; DEFINE MODE ON COMMAND LINE ; +P2LOC .EQU $F000 ; PHASE 2 RUN LOCATION +; #IF (LDRMODE == LM_ROM) CURBNK .EQU BID_BOOT #ELSE @@ -28,6 +28,7 @@ CURBNK .EQU BID_USR #IF (LDRMODE == LM_COM) .ORG $100 + JP START #ELSE .ORG 0 ; @@ -67,7 +68,6 @@ ROM_SIG: .DW DESC ; POINTER TO LONGER DESCRIPTION OF ROM .DB 0, 0, 0, 0, 0, 0 ; RESERVED FOR FUTURE USE; MUST BE ZERO ; -;NAME .DB "ROMWBW v", BIOSVER, ", ", BIOSBLD, ", ", TIMESTAMP, 0 NAME .DB "ROMWBW v", BIOSVER, ", ", TIMESTAMP, 0 AUTH .DB "WBW",0 DESC .DB "ROMWBW v", BIOSVER, ", Copyright 2014, Wayne Warthen, GNU GPL v3", 0 @@ -76,6 +76,180 @@ DESC .DB "ROMWBW v", BIOSVER, ", Copyright 2014, Wayne Warthen, GNU GPL v3", 0 #ENDIF ; ;================================================================================================== +; HBIOS CONFIGURATION BLOCK +;================================================================================================== +; + .ORG $ + P2LOC +CB: + .DB 'W',~'W' ; MARKER + .DB RMJ << 4 | RMN ; FIRST BYTE OF VERSION INFO + .DB RUP << 4 | RTP ; SECOND BYTE OF VERSION INFO +; +CB_PLT .DB PLATFORM +CB_CPUMHZ .DB CPUMHZ +CB_CPUKHZ .DW CPUKHZ +CB_RAMBANKS .DB RAMSIZE / 32 +CB_ROMBANKS .DB ROMSIZE / 32 +; +CB_BOOTVOL .DW 0 +CB_BOOTBID .DB 0 +CB_SERDEV .DB SERDEV +CB_CRTDEV .DB CRTDEV +CB_CONDEV .DB SERDEV +; +CB_CUREMU .DB VDAEMU ; CURRENT VDA TERMINAL EMULATION +CB_CURVDA .DB VDADEV ; CURRENT VDA TARGET FOR EMULATION + +; +; STANDARD BANK ID'S START AT $D8 +; + .FILL (CB + $D8 - $),0 +; +CB_BIDCOM .DB BID_COM +CB_BIDUSR .DB BID_USR +CB_BIDBIOS .DB BID_BIOS +CB_BIDAUX .DB BID_AUX +CB_BIDRAMD0 .DB BID_RAMD0 +CB_BIDRAMDN .DB BID_RAMDN +CB_BIDROMD0 .DB BID_ROMD0 +CB_BIDROMDN .DB BID_ROMDN + +; +; DEVICE LISTS START AT $E0 +; + .FILL (CB + $E0 - $),0 +; +; CHARACTER DEVICE LIST AT $E0 (7 ENTRY MAX) +; + .DB CB_CDLEND - CB_CDL ; ENTRY COUNT +; +CB_CDL: ; START OF LIST +; +#IF ASCIENABLE + .DB CIODEV_ASCI + 0 ; ASCI0: + .DB CIODEV_ASCI + 1 ; ASCI1: +#ENDIF +; +#IF UARTENABLE +#IF (UARTCNT >= 1) + .DB CIODEV_UART + 0 ; UART0: +#ENDIF +#IF (UARTCNT >= 2) + .DB CIODEV_UART + 1 ; UART1: +#ENDIF +#IF (UARTCNT >= 3) + .DB CIODEV_UART + 2 ; UART2: +#ENDIF +#IF (UARTCNT >= 4) + .DB CIODEV_UART + 3 ; UART3: +#ENDIF +#ENDIF +; +CB_CDLEND: + .FILL (CB_CDL + 7 - $),0 ; PAD REMAINDER OF CDL +; +; PRINT DEVICE LIST AT $E8 (3 ENTRY MAX) +; + .DB CB_PDLEND - CB_PDL ; ENTRY COUNT +; +CB_PDL: ; START OF LIST +; +CB_PDLEND: + .FILL (CB_PDL + 3 - $),0 ; PAD REMAINDER OF PDL +; +; VIDEO DISPLAY DEVICE LIST AT $EC (3 ENTRY MAX) +; + .DB CB_VDLEND - CB_VDL ; ENTRY COUNT +; +CB_VDL: ; START OF LIST +; +CB_VDLEND: + .FILL (CB_VDL + 3 - $),0 ; PAD REMAINDER OF VDL +; +; DISK DEVICE LIST AT $F0 (7 ENTRY MAX) +; + .DB CB_DDLEND - CB_DDL ; ENTRY COUNT +; +CB_DDL: ; START OF LIST +; +#IF MDENABLE + .DB DIODEV_MD + 1 ; MD1: (RAM DISK) + .DB DIODEV_MD + 0 ; MD0: (ROM DISK) +#ENDIF +; +#IF FDENABLE + .DB DIODEV_FD + 0 ; FD0: (PRIMARY FLOPPY DRIVE) + .DB DIODEV_FD + 1 ; FD1: (SECONDARY FLOPPY DRIVE) +#ENDIF +; +#IF RFENABLE +#IF (RFCNT >= 1) + .DB DIODEV_RF + 0 ; RF0: (RAMFLOPPY DISK UNIT 0) +#ENDIF +#IF (RFCNT >= 2) + .DB DIODEV_RF + 1 ; RF1: (RAMFLOPPY DISK UNIT 1) +#ENDIF +#ENDIF +; +#IF IDEENABLE +#IF (IDECNT >= 1) + .DB DIODEV_IDE + 0 ; IDE0: (IDE PRIMARY MASTER DISK) +#ENDIF +#IF (IDECNT >= 2) + .DB DIODEV_IDE + 1 ; IDE1: (IDE PRIMARY SLAVE DISK) +#ENDIF +#IF (IDECNT >= 3) + .DB DIODEV_IDE + 2 ; IDE2: (IDE SECONDARY MASTER DISK) +#ENDIF +#IF (IDECNT >= 4) + .DB DIODEV_IDE + 3 ; IDE3: (IDE SECONDARY SLAVE DISK) +#ENDIF +#ENDIF +; +#IF PPIDEENABLE +#IF (PPIDECNT >= 1) + .DB DIODEV_PPIDE + 0 ; PPIDE0: (PAR PORT IDE PRIMARY MASTER DISK) +#ENDIF +#IF (PPIDECNT >= 2) + .DB DIODEV_PPIDE + 1 ; PPIDE1: (PAR PORT IDE PRIMARY SLAVE DISK) +#ENDIF +#ENDIF +; +#IF SDENABLE + .DB DIODEV_SD + 0 ; SD0: (SD CARD DISK) +#ENDIF +; +#IF (PRPENABLE & PRPSDENABLE) + .DB DIODEV_PRPSD + 0 ; PRPSD0: (PROPIO SD DISK) +#ENDIF +; +#IF (PPPENABLE & PPPSDENABLE) + .DB DIODEV_PPPSD + 0 ; PPPSD0: (PARPORTPROP SD DISK) +#ENDIF +; +#IF HDSKENABLE +#IF (HDSKCNT >= 1) + .DB DIODEV_HDSK + 0 ; HDSK0: (SIMH DISK DRIVE 0) +#ENDIF +#IF (HDSKCNT >= 2) + .DB DIODEV_HDSK + 1 ; HDSK1: (SIMH DISK DRIVE 1) +#ENDIF +#IF (HDSKCNT >= 3) + .DB DIODEV_HDSK + 2 ; HDSK2: (SIMH DISK DRIVE 2) +#ENDIF +#IF (HDSKCNT >= 4) + .DB DIODEV_HDSK + 3 ; HDSK3: (SIMH DISK DRIVE 3) +#ENDIF +#ENDIF +; +CB_DDLEND: + .FILL (CB_DDL + 15 - $),0 ; PAD REMAINDER OF DDL +; + .FILL (CB + HCB_SIZ - $),0 ; PAD REMAINDER OF HCB +; + .ORG $ - P2LOC +; +;================================================================================================== ; COLD START ;================================================================================================== ; @@ -90,48 +264,47 @@ START: ; #IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) ; SET BASE FOR CPU IO REGISTERS - LD A,CPU_BASE - OUT0 (CPU_ICR),A + LD A,Z180_BASE + OUT0 (Z180_ICR),A ; DISABLE REFRESH XOR A - OUT0 (CPU_RCR),A + OUT0 (Z180_RCR),A ; SET DEFAULT CPU CLOCK MULTIPLIERS (XTAL / 2) XOR A - OUT0 (CPU_CCR),A - OUT0 (CPU_CMR),A + OUT0 (Z180_CCR),A + OUT0 (Z180_CMR),A ; SET DEFAULT WAIT STATES LD A,$F0 - OUT0 (CPU_DCNTL),A + OUT0 (Z180_DCNTL),A ; MMU SETUP LD A,$80 - OUT0 (CPU_CBAR),A ; SETUP FOR 32K/32K BANK CONFIG + OUT0 (Z180_CBAR),A ; SETUP FOR 32K/32K BANK CONFIG #IF (LDRMODE == LM_ROM) XOR A - OUT0 (CPU_BBR),A ; BANK BASE = 0 + OUT0 (Z180_BBR),A ; BANK BASE = 0 #ENDIF LD A,(RAMSIZE + RAMBIAS - 64) >> 2 - OUT0 (CPU_CBR),A ; COMMON BASE = LAST (TOP) BANK + OUT0 (Z180_CBR),A ; COMMON BASE = LAST (TOP) BANK #IF (Z180_CLKDIV >= 1) ; SET CLOCK DIVIDE TO 1 RESULTING IN FULL XTAL SPEED LD A,$80 - OUT0 (CPU_CCR),A + OUT0 (Z180_CCR),A #ENDIF #IF (Z180_CLKDIV >= 2) ; SET CPU MULTIPLIER TO 1 RESULTING IN XTAL * 2 SPEED LD A,$80 - OUT0 (CPU_CMR),A + OUT0 (Z180_CMR),A #ENDIF ; SET DESIRED WAIT STATES LD A,0 + (Z180_MEMWAIT << 6) | (Z180_IOWAIT << 4) - OUT0 (CPU_DCNTL),A - + OUT0 (Z180_DCNTL),A #ENDIF ; ; HARDWARE BOOTSTRAP FOR ZETA 2 @@ -234,12 +407,22 @@ PHASE2: ;CALL XIO_OUTC ;CALL XIO_OUTC ; +; INSTALL HCB INTO HBIOS CODE BANK +; + LD A,BID_BIOS ; GET BIOS BANK + LD (HB_SRCBNK),A ; SET AS SOURCE (IRRELEVANT) + LD (HB_DSTBNK),A ; SET AS DEST + LD HL,CB ; LOCAL LOADER HCB ADDRESS + LD DE,HCB_LOC ; DEST HBIOS HCB ADDRESS + LD BC,HCB_SIZ ; ONE PAGE IN LENGTH + CALL HB_BNKCPY ; DO IT + CALL XIO_DOT ; MARK PROGRESS +; ; INITIALIZE HBIOS ; LD A,BID_BIOS ; HBIOS BANK LD HL,0 ; ADDRESS 0 IS HBIOS INIT ENTRY ADDRESS CALL HB_BNKCALL ; DO IT - ; ; CHAIN TO OS LOADER ; @@ -273,6 +456,6 @@ PHASE2: ; CLEAN UP ;================================================================================================== ; - .ORG $ - P2LOC ; BANK TO IMAGE-BASED ADDRESSING + .ORG $ - P2LOC ; BACK TO IMAGE-BASED ADDRESSING LDR_END .EXPORT LDR_END ; EXPORT ENDING ADDRESS .END diff --git a/Source/BIOS/makefile b/Source/HBIOS/makefile similarity index 100% rename from Source/BIOS/makefile rename to Source/HBIOS/makefile diff --git a/Source/BIOS/md.asm b/Source/HBIOS/md.asm similarity index 94% rename from Source/BIOS/md.asm rename to Source/HBIOS/md.asm index fe5f2524..bcf78aaa 100644 --- a/Source/BIOS/md.asm +++ b/Source/HBIOS/md.asm @@ -30,7 +30,7 @@ MD_MEDIA: MD_INIT: PRTS("MD: UNITS=2 $") PRTS("ROMDISK=$") - LD HL,ROMSIZE - 96 + LD HL,ROMSIZE - 128 CALL PRTDEC PRTS("KB RAMDISK=$") LD HL,RAMSIZE - 128 @@ -217,7 +217,6 @@ MD_DST .DW 0 MD_LEN .DW 0 ; MDSTR_PREFIX .TEXT "MD:$" -MDSTR_BANK .TEXT "BANK=$" MDSTR_SRC .TEXT "SRC=$" MDSTR_DST .TEXT "DEST=$" MDSTR_LEN .TEXT "LEN=$" \ No newline at end of file diff --git a/Source/HBIOS/memmgr.asm b/Source/HBIOS/memmgr.asm new file mode 100644 index 00000000..a45e54f0 --- /dev/null +++ b/Source/HBIOS/memmgr.asm @@ -0,0 +1,78 @@ +;================================================================================================== +; MEMORY BANK MANAGEMENT +;================================================================================================== +; +; SELECT THE REQUESTED 32K BANK OF RAM/ROM INTO THE LOWER 32K OF CPU ADDRESS SPACE. +; BANK INDEX IN A, BIT 7 IS SET TO TO SELECT RAM, OTHERWISE ROM +; MUST BE INVOKED FROM HIGH 32K AND STACK MUST BE IN HIGH 32K +;______________________________________________________________________________________________________________________ +; + +#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_ZETA)) +BNKSEL: + OUT (MPCL_ROM),A ; SET ROM PAGE SELECTOR + OUT (MPCL_RAM),A ; SET RAM PAGE SELECTOR + RET +#ENDIF + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +; ZETA SBC V2 USES 16K PAGES. ANY PAGE CAN BE MAPPED TO ONE OF FOUR BANKS: +; BANK_0: 0K - 16K; BANK_1: 16K - 32K; BANK_2: 32K - 48K; BANK_3: 48K - 64K +; THIS BNKSEL EMULATES SBC / ZETA BEHAVIOR BY SETTING BANK_0 and BANK_1 TO +; TWO CONSECUTIVE PAGES + +#IF (PLATFORM == PLT_ZETA2) +BNKSEL: + BIT 7,A ; BIT 7 SET REQUESTS RAM PAGE + JR Z,BNKSEL_ROM ; NOT SET, SELECT ROM PAGE + RES 7,A ; RAM PAGE REQUESTED: CLEAR ROM BIT + ADD A,16 ; ADD 16 x 32K - RAM STARTS FROM 512K +; +BNKSEL_ROM: + RLCA ; TIMES 2 - GET 16K PAGE INSTEAD OF 32K + OUT (MPGSEL_0),A ; BANK_0: 0K - 16K + INC A ; + OUT (MPGSEL_1),A ; BANK_1: 16K - 32K + RET +#ENDIF + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +#IF (PLATFORM == PLT_N8) +BNKSEL: + BIT 7,A ; TEST BIT 7 FOR RAM VS. ROM + JR Z,BNKSEL_ROM ; IF NOT SET, SELECT ROM PAGE +; +BNKSEL_RAM: ; SELECT RAM PAGE + RES 7,A ; CLEAR BIT 7 FROM ABOVE + RLCA ; SCALE SELECTOR TO + RLCA ; ... GO FROM Z180 4K PAGE SIZE + RLCA ; ... TO DESIRED 32K PAGE SIZE + OUT0 (Z180_BBR),A ; WRITE TO BANK BASE + LD A,N8_DEFACR | 80H ; SELECT RAM BY SETTING BIT 7 + OUT0 (N8_ACR),A ; ... IN N8 ACR REGISTER + RET ; DONE +; +BNKSEL_ROM: ; SELECT ROM PAGE + OUT0 (N8_RMAP),A ; BANK INDEX TO N8 RMAP REGISTER + XOR A ; ZERO ACCUM + OUT0 (Z180_BBR),A ; ZERO BANK BASE + LD A,N8_DEFACR ; SELECT ROM BY CLEARING BIT 7 + OUT0 (N8_ACR),A ; ... IN N8 ACR REGISTER + RET ; DONE +; +#ENDIF + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +#IF (PLATFORM == PLT_MK4) +BNKSEL: + RLCA ; RAM FLAG TO CARRY FLAG AND BIT 0 + JR NC,BNKSEL_ROM ; IF NC, WANT ROM PAGE, SKIP AHEAD + XOR %00100001 ; SET BIT FOR HI 512K, CLR BIT 0 +BNKSEL_ROM: + RLCA ; CONTINUE SHIFTING TO SCALE SELECTOR + RLCA ; FOR Z180 4K PAGE -> DESIRED 32K PAGE + OUT0 (Z180_BBR),A ; WRITE TO BANK BASE + RET ; DONE +#ENDIF diff --git a/Source/BIOS/n8v.asm b/Source/HBIOS/n8v.asm similarity index 96% rename from Source/BIOS/n8v.asm rename to Source/HBIOS/n8v.asm index 20f1dcd1..25ec9314 100644 --- a/Source/BIOS/n8v.asm +++ b/Source/HBIOS/n8v.asm @@ -1,5 +1,5 @@ ;====================================================================== -; N8 VDU DRIVER FOR N8VEM PROJECT +; N8 VDU DRIVER FOR SBC PROJECT ; ; WRITTEN BY: DOUGLAS GOODALL ; UPDATED BY: WAYNE WARTHEN -- 4/7/2013 diff --git a/Source/BIOS/n8v_font.inc b/Source/HBIOS/n8v_font.inc similarity index 100% rename from Source/BIOS/n8v_font.inc rename to Source/HBIOS/n8v_font.inc diff --git a/Source/HBIOS/plt_mk4.inc b/Source/HBIOS/plt_mk4.inc new file mode 100644 index 00000000..ce4d0f79 --- /dev/null +++ b/Source/HBIOS/plt_mk4.inc @@ -0,0 +1,16 @@ +; +; MARK IV HARDWARE DEFINITIONS +; +RAMBIAS .EQU 512 ; RAM STARTS AT 512K +; +MK4_BASE .EQU $80 ; I/O BASE ADDRESS FOR ONBOARD PERIPHERALS +; +MK4_IDE .EQU MK4_BASE + $00 ; IDE REGISTERS ($00-$07, $0E-$0F) +MK4_XAR .EQU MK4_BASE + $08 ; EXTERNAL ADDRESS REGISTER (XAR) +MK4_SD .EQU MK4_BASE + $09 ; SD CARD CONTROL REGISTER +MK4_RTC .EQU MK4_BASE + $0A ; RTC INTERFACE REGISTER +; +RTC .EQU MK4_RTC ; GENERIC ALIAS FOR RTC PORT +; +Z180_BASE .EQU $40 ; I/O BASE ADDRESS FOR INTERNAL Z180 REGISTERS +#INCLUDE "z180.inc" diff --git a/Source/HBIOS/plt_n8.inc b/Source/HBIOS/plt_n8.inc new file mode 100644 index 00000000..b9f087a8 --- /dev/null +++ b/Source/HBIOS/plt_n8.inc @@ -0,0 +1,24 @@ +; +; N8 HARDWARE DEFINITIONS +; +RAMBIAS .EQU 0 ; RAM STARTS AT 0K +; +N8_BASE .EQU $80 ; I/O BASE ADDRESS FOR ONBOARD PERIPHERALS +; +N8_PPI0 .EQU N8_BASE + $00 ; FIRST PARALLEL PORT +N8_PPI1 .EQU N8_BASE + $04 ; SECOND PARALLEL PORT +N8_RTC .EQU N8_BASE + $08 ; RTC LATCH AND BUFFER +N8_FDC .EQU N8_BASE + $0C ; FLOPPY DISK CONTROLLER +N8_UTIL .EQU N8_BASE + $10 ; FLOPPY DISK UTILITY +N8_ACR .EQU N8_BASE + $14 ; AUXILLARY CONTROL REGISTER +N8_RMAP .EQU N8_BASE + $16 ; ROM PAGE REGISTER +N8_VDP .EQU N8_BASE + $18 ; VIDEO DISPLAY PROCESSOR (TMS9918A) +N8_PSG .EQU N8_BASE + $1C ; PROGRAMMABLE SOUND GENERATOR (AY-3-8910) +; +N8_DEFACR .EQU $1B ; DEFAULT VALUE FOR ACR REGISTER +; +RTC .EQU N8_RTC ; GENERIC ALIAS FOR RTC PORT +PPIBASE .EQU N8_PPI0 ; GENERIC ALIAS FOR PRIMARY PARALLEL PORT +; +Z180_BASE .EQU $40 ; I/O BASE ADDRESS FOR INTERNAL Z180 REGISTERS +#INCLUDE "z180.inc" diff --git a/Source/HBIOS/plt_sbc.inc b/Source/HBIOS/plt_sbc.inc new file mode 100644 index 00000000..d500249b --- /dev/null +++ b/Source/HBIOS/plt_sbc.inc @@ -0,0 +1,22 @@ +; +; SBC HARDWARE DEFINITIONS +; +SBC_BASE .EQU $60 ; I/O BASE ADDRESS FOR ONBOARD PERIPHERALS +; +#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_ZETA)) +; BIT 7 OF MPCL_ROM SELECTS ROM/RAM (0=ROM, 1=RAM) +MPCL_RAM .EQU SBC_BASE + $18 ; MEMORY PAGER CONFIG LATCH - RAM (WRITE ONLY) +MPCL_ROM .EQU SBC_BASE + $1C ; MEMORY PAGER CONFIG LATCH - ROM (WRITE ONLY) +#ENDIF +; +#IF (PLATFORM == PLT_ZETA2) +MPGSEL_0 .EQU SBC_BASE + $18 ; BANK_0 PAGE SELECT REGISTER (WRITE ONLY) +MPGSEL_1 .EQU SBC_BASE + $19 ; BANK_1 PAGE SELECT REGISTER (WRITE ONLY) +MPGSEL_2 .EQU SBC_BASE + $1A ; BANK_2 PAGE SELECT REGISTER (WRITE ONLY) +MPGSEL_3 .EQU SBC_BASE + $1B ; BANK_3 PAGE SELECT REGISTER (WRITE ONLY) +MPGENA .EQU SBC_BASE + $1C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY) +#ENDIF +; +RTC .EQU SBC_BASE + $10 ; ADDRESS OF RTC LATCH AND INPUT PORT +PPIBASE .EQU SBC_BASE + $00 ; PPI 82C55 I/O IS DECODED TO PORT 60-67 +SIOBASE .EQU SBC_BASE + $08 ; 16550 UART I/O BASE ADDRESS diff --git a/Source/HBIOS/plt_una.inc b/Source/HBIOS/plt_una.inc new file mode 100644 index 00000000..71fe5208 --- /dev/null +++ b/Source/HBIOS/plt_una.inc @@ -0,0 +1,3 @@ +; +; UNA HARDWARE DEFINITIONS +; diff --git a/Source/BIOS/ppide.asm b/Source/HBIOS/ppide.asm similarity index 94% rename from Source/BIOS/ppide.asm rename to Source/HBIOS/ppide.asm index e1c876b8..ee35d806 100644 --- a/Source/BIOS/ppide.asm +++ b/Source/HBIOS/ppide.asm @@ -115,8 +115,13 @@ PPIDE_ST: RET ; PPIDE_MED: - LD A,MID_HD - RET + LD A,C ; GET THE DEVICE/UNIT + AND $0F ; ISOLATE UNIT + CP PPIDECNT ; NUM UNITS + LD A,MID_HD ; ASSUME WE ARE OK + RET C ; RETURN + XOR A ; NO MEDIA + RET ; AND RETURN ; ; ; @@ -124,7 +129,9 @@ PPIDE_INIT: PRTS("PPIDE: IO=0x$") LD A,IDELSB CALL PRTHEXBYTE - PRTS(" UNITS=2$") + PRTS(" UNITS=$") + LD A,PPIDECNT + CALL PRTDECB #IF (PPIDE8BIT) PRTS(" 8BIT$") #ENDIF @@ -219,7 +226,7 @@ PPIDE_RESET: LD C,PPIDE_CONTROL ; IDE CONTROL REGISTER LD A,000001110B ; NO INTERRUPTS, ASSERT RESET BOTH DRIVES CALL PPIDE_WRITE ; DO IT - LD DE,8 ; DELAY ABOUT 200ms + LD DE,16 ; DELAY ~250US CALL VDELAY #IF (PPIDETRACE >= 2) CALL PC_PERIOD @@ -265,7 +272,7 @@ PPIDE_WAITRDY: LD DE,0 ; TIMEOUT IS 250us * 65536 = 15 SECONDS PPIDE_WBSY: PUSH DE - LD DE,10 ; INNER LOOP DELAY IS 250us (25us * 10) + LD DE,16 ; INNER LOOP DELAY IS ~250us (16us * 16) CALL VDELAY POP DE DEC DE diff --git a/Source/BIOS/ppk.asm b/Source/HBIOS/ppk.asm similarity index 94% rename from Source/BIOS/ppk.asm rename to Source/HBIOS/ppk.asm index d877e3a6..506a5336 100644 --- a/Source/BIOS/ppk.asm +++ b/Source/HBIOS/ppk.asm @@ -1,6 +1,6 @@ ;__________________________________________________________________________________________________ ; -; PARALLEL PORT KEYBOARD DRIVER FOR N8VEM +; PARALLEL PORT KEYBOARD DRIVER FOR SBC ; SUPPORT KEYBOARD/MOUSE ON VDU AND N8 ; ; ORIGINAL CODE BY DR JAMES MOXHAM @@ -28,8 +28,8 @@ PPK_PPIX .EQU PPK_PPI + 3 ; KEYBOARD PPI CONTROL PORT PPK_DAT .EQU 01111000B ; PPIX MASK TO MANAGE DATA LINE (C:4) PPK_CLK .EQU 01111010B ; PPIX MASK TO MANAGE CLOCK LINE (C:5) -PPK_WAITTO .EQU 50 * CPUMHZ ; TUNE!!! WANT SMALL AS POSSIBLE W/O ERRORS -PPK_WAITRDY .EQU 10 * CPUMHZ ; TUNE!!! 100US LOOP DELAY TO ENSURE DEVICE READY +;PPK_WAITTO .EQU 50 * CPUMHZ ; TUNE!!! WANT SMALL AS POSSIBLE W/O ERRORS +PPK_WAITRDY .EQU 6 ; TUNE!!! LOOP COUNT TO ENSURE DEVICE READY ; ; STATUS BITS (FOR PPK_STATUS) ; @@ -63,6 +63,7 @@ PPK_RSTATE .DB 0 ; STATE BITS FOR "RIGHT" KEYS PPK_STATUS .DB 0 ; CURRENT STATUS BITS (SEE ABOVE) PPK_REPEAT .DB 0 ; CURRENT REPEAT RATE PPK_IDLE .DB 0 ; IDLE COUNT +PPK_WAITTO .DW 0 ; TIMEOUT WAIT LOOP COUNT (COMPUTED IN INIT) ; ;__________________________________________________________________________________________________ ; KEYBOARD INITIALIZATION @@ -72,6 +73,15 @@ PPK_INIT: PRTS("PPK: IO=0x$") LD A,PPK_PPIA CALL PRTHEXBYTE +; + ; PRECOMPUTE TIMEOUT LOOP COUNT (CPU KHZ / 16) + LD HL,(CPUKHZ) ; GET CPU SPEED IN KHZ + LD B,4 ; SHIFT 4 TIMES TO DIVIDE BY 16 +PPK_INIT1: + SRL H ; RIGHT SHIFT + RR L ; ... TO DIVIDE + DJNZ PPK_INIT1 ; LOOP UNTIL DONE DIVIDING + LD (PPK_WAITTO),HL ; SAVE RESULT FOR USE LATER ; CALL PPK_INITPORT ; SETS PORT C SO CAN INPUT AND OUTPUT @@ -83,7 +93,7 @@ PPK_INIT: CALL PPK_RESET ; RESET THE KEYBOARD CALL PPK_SETLEDS ; UPDATE LEDS BASED ON CURRENT TOGGLE STATE BITS CALL PPK_SETRPT ; UPDATE REPEAT RATE BASED ON CURRENT SETTING - + XOR A ; SIGNAL SUCCESS RET ; @@ -216,9 +226,11 @@ PPK_PUTDATA: CALL PPK_DATHI CALL PPK_CLKLO ; NEED CLOCK LOW TO GET DEVICE ATTENTION - ; WAIT 100US TO MAKE SURE DEVICE IS READY TO RECEIVE - LD B,PPK_WAITRDY ; WAIT 100US - DJNZ $ ; SPIN + ; WAIT 100US(?) TO MAKE SURE DEVICE IS READY TO RECEIVE + LD B,PPK_WAITRDY ; DELAY 6 * 16US = 96US +PPK_PUTDATA0: + CALL DELAY ; INVOKE 16US DELAY + DJNZ PPK_PUTDATA0 ; LOOP ; SEND START BIT CALL PPK_DATLO ; SET DATA LOW - REQUEST TO SEND/START BIT @@ -307,7 +319,7 @@ PPK_WTDATHI: ; WAIT FOR DATA LINE TO BE HIGH JR PPK_WAIT ; PPK_WAIT: ; COMPLETE THE WAIT PROCESSING - LD HL,PPK_WAITTO + LD HL,(PPK_WAITTO) PPK_WAIT1: IN A,(PPK_PPIB) ; GET BYTE FROM PORT B XOR E diff --git a/Source/BIOS/ppp.asm b/Source/HBIOS/ppp.asm similarity index 94% rename from Source/BIOS/ppp.asm rename to Source/HBIOS/ppp.asm index 23c953b2..131dedc2 100644 --- a/Source/BIOS/ppp.asm +++ b/Source/HBIOS/ppp.asm @@ -3,6 +3,11 @@ ; PARPORTPROP DRIVER ;================================================================================================== ; +PPIA .EQU PPIBASE + 0 ; PORT A +PPIB .EQU PPIBASE + 1 ; PORT B +PPIC .EQU PPIBASE + 2 ; PORT C +PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT +; ; COMMAND BYTES ; PPP_CMDNOP .EQU $00 ; DO NOTHING @@ -81,6 +86,7 @@ INIT1: CALL DELAY CALL DELAY CALL DELAY + CALL DELAY IN A,(PPIA) POP BC CP $AA diff --git a/Source/BIOS/prefix.asm b/Source/HBIOS/prefix.asm similarity index 100% rename from Source/BIOS/prefix.asm rename to Source/HBIOS/prefix.asm diff --git a/Source/BIOS/prp.asm b/Source/HBIOS/prp.asm similarity index 94% rename from Source/BIOS/prp.asm rename to Source/HBIOS/prp.asm index d683800c..4c27bff7 100644 --- a/Source/BIOS/prp.asm +++ b/Source/HBIOS/prp.asm @@ -3,11 +3,12 @@ ; PROPIO DRIVER ;================================================================================================== ; -; ; GLOBAL PARPORTPROP INITIALIZATION ; PRP_INIT: - PRTS("PRP:$") + PRTS("PRP: IO=0x$") + LD A,PRPIOB + CALL PRTHEXBYTE ; CALL PRPSD_INIT ; SD CARD INITIALIZATION diff --git a/Source/BIOS/rf.asm b/Source/HBIOS/rf.asm similarity index 79% rename from Source/BIOS/rf.asm rename to Source/HBIOS/rf.asm index 09a54ba8..48fd39ea 100644 --- a/Source/BIOS/rf.asm +++ b/Source/HBIOS/rf.asm @@ -32,17 +32,20 @@ RF_DISPATCH: ; RF_MEDIA ; RF_MEDIA: - LD A,C ; DEVICE/UNIT IS IN C - AND $0F ; ISOLATE UNIT NUM - CP 2 ; CHECK FOR MAX UNIT EXCEEDED - CALL NC,PANIC ; PANIC IF TOO HIGH - LD A,MID_RF ; SET CORRECT MEDIA VALUE - RET + LD A,C ; GET THE DEVICE/UNIT + AND $0F ; ISOLATE UNIT + CP RFCNT ; NUM UNITS + LD A,MID_RF ; ASSUME WE ARE OK + RET C ; RETURN + XOR A ; NO MEDIA + RET ; AND RETURN ; ; ; RF_INIT: - PRTS("RF: UNITS=2$") + PRTS("RF: UNITS=$") + LD A,RFCNT + CALL PRTDECB ; XOR A ; INIT SUCCEEDED RET ; RETURN diff --git a/Source/BIOS/romldr.asm b/Source/HBIOS/romldr.asm similarity index 93% rename from Source/BIOS/romldr.asm rename to Source/HBIOS/romldr.asm index 08aa2deb..c667e70a 100644 --- a/Source/BIOS/romldr.asm +++ b/Source/HBIOS/romldr.asm @@ -69,6 +69,11 @@ PHASE2: LD DE,STR_BANNER CALL WRITESTR +#IFDEF PLTWBW + ; INIT DELAY FUNCTIONS + CALL DELAY_INIT +#ENDIF + ; RUN THE BOOT LOADER MENU JP DOBOOTMENU ; @@ -78,7 +83,6 @@ PHASE2: ;________________________________________________________________________________________________________________________________ ; DOBOOTMENU: - CALL NEWLINE CALL NEWLINE LD DE,STR_BOOTMENU CALL WRITESTR @@ -89,7 +93,7 @@ DOBOOTMENU: #ENDIF #IF (BOOTTYPE == BT_AUTO) - LD BC,1000 * BOOT_TIMEOUT + LD BC,100 * BOOT_TIMEOUT LD (BL_TIMEOUT),BC #ENDIF @@ -145,8 +149,8 @@ DB_DSKYEND: ; #IF (BOOTTYPE == BT_AUTO) - ; DELAY FOR 1MS TO MAKE TIMEOUT CALC EASY - LD DE,40 + ; DELAY FOR 10MS TO MAKE TIMEOUT CALC EASY + LD DE,625 ; 16US * 625 = 10MS CALL VDELAY ; CHECK/INCREMENT TIMEOUT @@ -215,8 +219,8 @@ GOCPM2: LD BC,$01FC ; UNA FUNC: SET BOOTSTRAP HISTORY RST 08 ; CALL UNA #ELSE - LD B,BF_SYSATTR - LD C,AID_BOOTVOL | $80 + LD B,BF_SYSHCBPUTW ; HB FUNC: PUT HCB WORD + LD C,HCB_BOOTVOL ; BOOT VOLUME (DEV/UNIT, SLICE) LD DE,$0000 RST 08 #ENDIF @@ -432,14 +436,14 @@ UDEVUNK .DB "UNK$" ; CHECK FOR VALID DRIVE LETTER LD A,(BL_BOOTID) ; BOOT DEVICE TO A PUSH AF ; SAVE BOOT DEVICE - LD B,BF_DIODEVCNT ; HBIOS FUNC: DEVICE COUNT + LD B,BF_DIOGETCNT ; HBIOS FUNC: DEVICE COUNT RST 08 ; CALL HBIOS, DEVICE COUNT TO B POP AF ; RESTORE BOOT DEVICE CP B ; CHECK MAX (INDEX - COUNT) JP NC,DB_NODISK ; HANDLE INVALID SELECTION ; GET DEVICE/UNIT, LU - LD B,BF_DIODEVINF ; HBIOS FUNC: DEVICE INFO + LD B,BF_DIOGETINF ; HBIOS FUNC: DEVICE INFO LD A,(BL_BOOTID) ; GET BOOT DEVICE ID LD C,A ; PUT IN C RST 08 ; CALL HBIOS, DEV INFO TO C @@ -568,8 +572,8 @@ DB_LOOP: CALL NEWLINE ; FORMATTING ; PASS BOOT DEVICE/UNIT/LU TO CBIOS COLD BOOT - LD B,BF_SYSATTR - LD C,AID_BOOTVOL | $80 + LD B,BF_SYSHCBPUTW ; HB FUNC: PUT HCB WORD + LD C,HCB_BOOTVOL ; BOOT VOLUME (DEV/UNIT, SLICE) LD A,(BL_DEVICE) ; LOAD BOOT DEVICE/UNIT LD D,A ; SAVE IN D LD A,(BL_LU) ; LOAD BOOT LU @@ -691,7 +695,7 @@ DB_READSEC3: ; PRTALL: ; - LD B,BF_DIODEVCNT ; HBIOS FUNC: DEVICE COUNT + LD B,BF_DIOGETCNT ; HBIOS FUNC: DEVICE COUNT RST 08 ; CALL HBIOS LD A,B ; COUNT TO A OR A ; SET FLAGS @@ -708,7 +712,7 @@ PRTALL1: CALL COUT ; PRINT IT CALL PC_SPACE ; SPACING PUSH BC ; SAVE LOOP CONTROL - LD B,BF_DIODEVINF ; HBIOS FUNC: DEVICE INFO + LD B,BF_DIOGETINF ; HBIOS FUNC: DEVICE INFO RST 08 ; CALL HBIOS LD D,C ; DEVICE/UNIT TO D LD E,0 ; LU IS ZERO @@ -810,14 +814,14 @@ SEGDISPLAY: LD B,08H ; SET DIGIT COUNT LD A,40H | 30H ; SET CONTROL PORT 7218 TO OFF OUT (PPIC),A ; OUTPUT - CALL DELAY ; WAIT + CALL DLY2 ; WAIT LD A,0F0H ; SET CONTROL TO 1111 (DATA COMING, HEX DECODE,NO DECODE, NORMAL) SEGDISPLAY1: ; OUT (PPIA),A ; OUTPUT TO PORT LD A,80H | 30H ; STROBE WRITE PULSE WITH CONTROL=1 OUT (PPIC),A ; OUTPUT TO PORT - CALL DELAY ; WAIT + CALL DLY2 ; WAIT LD A,40H | 30H ; SET CONTROL PORT 7218 TO OFF OUT (PPIC),A ; OUTPUT @@ -826,10 +830,10 @@ SEGDISPLAY_LP: OUT (PPIA),A ; OUT TO PPIA LD A,00H | 30H ; SET WRITE STROBE OUT (PPIC),A ; OUT TO PPIC - CALL DELAY ; DELAY + CALL DLY2 ; DELAY LD A,40H | 30H ; SET CONTROL PORT OFF OUT (PPIC),A ; OUT TO PPIC - CALL DELAY ; WAIT + CALL DLY2 ; WAIT DEC HL ; INC POINTER DJNZ SEGDISPLAY_LP ; LOOP FOR NEXT DIGIT POP HL ; RESTORE HL @@ -875,6 +879,7 @@ BOOT: ; #DEFINE CIOMODE_HBIOS #DEFINE DSKY_KBD +#DEFINE USEDELAY #INCLUDE "util.asm" ; ; READ A CONSOLE CHARACTER AND CONVERT TO UPPER CASE diff --git a/Source/BIOS/sd.asm b/Source/HBIOS/sd.asm similarity index 94% rename from Source/BIOS/sd.asm rename to Source/HBIOS/sd.asm index fa882015..c5350aac 100644 --- a/Source/BIOS/sd.asm +++ b/Source/HBIOS/sd.asm @@ -70,8 +70,8 @@ SD_UNITCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS) SD_OPRREG .EQU RTC ; USES RTC LATCHES FOR OPERATION SD_OPRDEF .EQU %00000000 ; QUIESCENT STATE SD_CS .EQU %00000100 ; RTC:2 IS SELECT -SD_CNTR .EQU CPU_CNTR -SD_TRDR .EQU CPU_TRDR +SD_CNTR .EQU Z180_CNTR +SD_TRDR .EQU Z180_TRDR #ENDIF ; #IF (SDMODE == SDMODE_PPI) ; PPISD @@ -118,8 +118,8 @@ SD_UNITCNT .EQU 1 ; NUMBER OF PHYSICAL UNITS (SOCKETS) SD_OPRREG .EQU MK4_SD ; DEDICATED MK4 SDCARD REGISTER SD_OPRDEF .EQU %00000000 ; QUIESCENT STATE SD_CS .EQU %00000100 ; SELECT ACTIVE -SD_CNTR .EQU CPU_CNTR -SD_TRDR .EQU CPU_TRDR +SD_CNTR .EQU Z180_CNTR +SD_TRDR .EQU Z180_TRDR #ENDIF ; ; SD CARD COMMANDS @@ -368,7 +368,7 @@ SD_SETUP: ; #IF (SDMODE == SDMODE_PPI) LD A,82H ; PPI PORT A=OUT, B=IN, C=OUT - OUT (PPIX),A + OUT (SD_PPIX),A LD A,SD_OPRDEF LD (SD_OPRVAL),A OUT (SD_OPRREG),A @@ -523,11 +523,11 @@ SD_PUT1: SD_GET: #IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4)) CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING - IN0 A,(CPU_CNTR) ; GET CSIO STATUS + IN0 A,(Z180_CNTR) ; GET CSIO STATUS SET 5,A ; START RECEIVER - OUT0 (CPU_CNTR),A + OUT0 (Z180_CNTR),A CALL SD_WAITRX - IN0 A,(CPU_TRDR) ; GET RECEIVED BYTE + IN0 A,(Z180_TRDR) ; GET RECEIVED BYTE CALL MIRROR ; MSB<-->LSB MIRROR BITS LD A,C ; KEEP RESULT #ELSE @@ -751,8 +751,8 @@ SD_GOIDLE: ;CALL SD_DONE ; SEEMS TO HELP SOME CARDS... ; SMALL DELAY HERE HELPS SOME CARDS - LD DE,200 ; 5 MILISECONDS - CALL VDELAY + LD DE,300 ; 16US * 300 = ~5MS + CALL VDELAY ; CPU SPEED NORMALIZED DELAY ; PUT CARD IN IDLE STATE LD A,SD_CMD0 ; CMD0 = ENTER IDLE STATE @@ -825,8 +825,8 @@ SD_INITCARD0: LD (SD_LCNT),A SD_INITCARD1: ; CALL SD_APP_OP_COND UNTIL CARD IS READY (NOT IDLE) - LD DE,200 ; 5 MILLISECONDS - CALL VDELAY + LD DE,300 ; 16US * 300 = ~5MS + CALL VDELAY ; CPU SPEED NORMALIZED DELAY LD A,SD_CMD55 ; APP CMD IS NEXT CALL SD_EXECCMD0 CALL SD_DONE @@ -893,7 +893,7 @@ SD_INITCARD21: #IF ((SDMODE == SDMODE_CSIO) | (SDMODE == SDMODE_MK4)) CALL SD_WAITTX ; MAKE SURE WE ARE DONE SENDING XOR A ; NOW SET CSIO PORT TO FULL SPEED - OUT (CPU_CNTR),A + OUT (Z180_CNTR),A #ENDIF XOR A ; A = 0 (STATUS = OK) diff --git a/Source/BIOS/setup.asm b/Source/HBIOS/setup.asm similarity index 100% rename from Source/BIOS/setup.asm rename to Source/HBIOS/setup.asm diff --git a/Source/BIOS/simrtc.asm b/Source/HBIOS/simrtc.asm similarity index 95% rename from Source/BIOS/simrtc.asm rename to Source/HBIOS/simrtc.asm index 2ad86e4f..a5a1e86e 100644 --- a/Source/BIOS/simrtc.asm +++ b/Source/HBIOS/simrtc.asm @@ -72,7 +72,7 @@ SIMRTC_GETTIM: LD BC,SIMRTC_BUFSIZ ; LENGTH CALL BNKCPY ; COPY THE CLOCK DATA ; - LD DE,100 ; DELAY 100 * 25uS + LD DE,60 ; DELAY 60 * 16US = ~1MS CALL VDELAY ; SLOW DOWN SIMH FOR CLOCK TICKING TEST XOR A ; SIGNAL SUCCESS RET ; AND RETURN diff --git a/Source/HBIOS/std.asm b/Source/HBIOS/std.asm new file mode 100644 index 00000000..18555c4f --- /dev/null +++ b/Source/HBIOS/std.asm @@ -0,0 +1,237 @@ +; The purpose of this file is to define generic symbols and to include +; the appropriate std-*.inc file to bring in platform specifics. + +; There are several classes of systems supported by SBC. +; 1. SBC Z80 SBC (v1 or v2) w/ ECB interface +; 2. ZETA Standalone Z80 SBC w/ SBC compatibility +; 3. ZETA2 Second version of ZETA with enhanced memory bank switching +; 4. N8 MSX-compatible Z180 SBC w/ onboard video and sound +; 5. MK4 Mark IV Z180 based SBC w/ ECB interface +; 6. UNA Any Z80/Z180 computer with UNA BIOS + +; All the classes require certain generic definitions, and these are +; defined here prior to the inclusion of platform specific .inc files. + +; It is unfortunate, but all the possible config items must be defined +; here because the config gets read before the specific std-*.inc's + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +; +; INCLUDE VERSION +; +#INCLUDE "ver.inc" ; ADD BIOSVER +; +FALSE .EQU 0 +TRUE .EQU ~FALSE +; +; PRIMARY HARDWARE PLATFORMS +; +PLT_SBC .EQU 1 ; SBC ECB Z80 SBC +PLT_ZETA .EQU 2 ; ZETA Z80 SBC +PLT_ZETA2 .EQU 3 ; ZETA Z80 V2 SBC +PLT_N8 .EQU 4 ; N8 (HOME COMPUTER) Z180 SBC +PLT_MK4 .EQU 5 ; MARK IV +PLT_UNA .EQU 6 ; UNA BIOS +; +;#IFDEF PLTWBW +#INCLUDE "hbios.inc" +;#ENDIF +; +; BOOT STYLE +; +BT_MENU .EQU 1 ; WAIT FOR MENU SELECTION AT LOADER PROMPT +BT_AUTO .EQU 2 ; AUTO SELECT BOOT_DEFAULT AFTER BOOT_TIMEOUT +; +; FLOPPY DISK MEDIA SELECTIONS (ID'S MUST BE INDEX OF ENTRY IN FCD_TBL) +; +FDM720 .EQU 0 ; 3.5" FLOPPY, 720KB, 2 SIDES, 80 TRKS, 9 SECTORS +FDM144 .EQU 1 ; 3.5" FLOPPY, 1.44MB, 2 SIDES, 80 TRKS, 18 SECTORS +FDM360 .EQU 2 ; 5.25" FLOPPY, 360KB, 2 SIDES, 40 TRKS, 9 SECTORS +FDM120 .EQU 3 ; 5.25" FLOPPY, 1.2MB, 2 SIDES, 80 TRKS, 15 SECTORS +FDM111 .EQU 4 ; 8" FLOPPY, 1.11MB, 2 SIDES, 74 TRKS, 15 SECTORS +; +; MEDIA ID VALUES +; +MID_NONE .EQU 0 +MID_MDROM .EQU 1 +MID_MDRAM .EQU 2 +MID_RF .EQU 3 +MID_HD .EQU 4 +MID_FD720 .EQU 5 +MID_FD144 .EQU 6 +MID_FD360 .EQU 7 +MID_FD120 .EQU 8 +MID_FD111 .EQU 9 +; +; FD MODE SELECTIONS +; +FDMODE_NONE .EQU 0 +FDMODE_DIO .EQU 1 ; DISKIO V1 +FDMODE_ZETA .EQU 2 ; ZETA +FDMODE_ZETA2 .EQU 3 ; ZETA V2 +FDMODE_DIDE .EQU 4 ; DUAL IDE +FDMODE_N8 .EQU 5 ; N8 +FDMODE_DIO3 .EQU 6 ; DISKIO V3 +; +; IDE MODE SELECTIONS +; +IDEMODE_NONE .EQU 0 +IDEMODE_DIO .EQU 1 ; DISKIO V1 +IDEMODE_DIDE .EQU 2 ; DUAL IDE +IDEMODE_MK4 .EQU 3 ; MARK IV ONBOARD IDE (8 BIT) +; +; PPIDE MODE SELECTIONS +; +PPIDEMODE_NONE .EQU 0 +PPIDEMODE_STD .EQU 1 ; STANDARD SBC PARALLEL PORT +PPIDEMODE_DIO3 .EQU 2 ; DISKIO V3 PARALLEL PORT +PPIDEMODE_MFP .EQU 3 ; MULTIFUNCTION / PIC +; +; SD MODE SELECTIONS +; +SDMODE_NONE .EQU 0 +SDMODE_JUHA .EQU 1 ; JUHA MINI BOARD +SDMODE_N8 .EQU 2 ; N8-2511, UNMODIFIED +SDMODE_CSIO .EQU 3 ; N8-2312 OR N8-2511 MODIFIED +SDMODE_PPI .EQU 4 ; PPISD MINI BOARD +SDMODE_UART .EQU 5 ; SD INTERFACE VIA UART +SDMODE_DSD .EQU 6 ; DUAL SD +SDMODE_MK4 .EQU 7 ; MARK IV +; +; EMULATION TYPES +; +EMUTYP_NONE .EQU 0 +EMUTYP_TTY .EQU 1 +EMUTYP_ANSI .EQU 2 +; +#INCLUDE "build.inc" ; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE +; +#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) +#DEFINE CPU_Z180 +#ELSE +#DEFINE CPU_Z80 +#ENDIF +; +; SET PLATFORM NAME STRING +; +#IF (PLATFORM == PLT_SBC) + #DEFINE PLATFORM_NAME "SBC Z80" +#ENDIF +#IF (PLATFORM == PLT_ZETA) + #DEFINE PLATFORM_NAME "ZETA Z80" +#ENDIF +#IF (PLATFORM == PLT_ZETA2) + #DEFINE PLATFORM_NAME "ZETA Z80 V2" +#ENDIF +#IF (PLATFORM == PLT_N8) + #DEFINE PLATFORM_NAME "N8 Z180" +#ENDIF +#IF (PLATFORM == PLT_MK4) + #DEFINE PLATFORM_NAME "MARK IV Z180" +#ENDIF +#IF (PLATFORM == PLT_UNA) + #DEFINE PLATFORM_NAME "UNA" +#ENDIF +; +; INCLUDE PLATFORM SPECIFIC HARDWARE DEFINITIONS +; +#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_ZETA) | (PLATFORM == PLT_ZETA2)) +#INCLUDE "plt_sbc.inc" +#ENDIF +; +#IF (PLATFORM == PLT_N8) +#INCLUDE "plt_n8.inc" +#ENDIF +; +#IF (PLATFORM == PLT_MK4) +#INCLUDE "plt_mk4.inc" +#ENDIF +; +#IF (PLATFORM == PLT_UNA) +#INCLUDE "plt_una.inc" +#ENDIF +; +; SETUP DEFAULT CPU SPEED VALUES +; +CPUKHZ .EQU CPUOSC / 1000 ; CPU FREQ IN KHZ +; +#IFDEF CPU_Z180 +#IF (Z180_CLKDIV == 0) +CPUKHZ .SET CPUKHZ / 2 ; ADJUST FOR HALF SPEED OPERATION +#ENDIF +#IF (Z180_CLKDIV == 2) +CPUKHZ .SET CPUKHZ * 2 ; ADJUST FOR DOUBLE SPEED OPERATION +#ENDIF +#ENDIF +; +CPUMHZ .EQU CPUKHZ / 1000 ; CPU FREQ IN MHZ +; +; MEMORY BANK CONFIGURATION +; +#IF (PLATFORM == PLT_UNA) +BID_ROM0 .EQU $0000 +BID_RAM0 .EQU $8000 +#ELSE +BID_ROM0 .EQU $00 +BID_RAM0 .EQU $80 +#ENDIF + +BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1)) +BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1)) + +BID_BOOT .EQU BID_ROM0 ; BOOT BANK +BID_BIOSIMG .EQU BID_ROM0 + 1 ; BIOS IMAGE BANK +BID_OSIMG .EQU BID_ROM0 + 2 ; ROM LOADER AND IMAGES BANK +BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK +BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK +BID_ROMDN .EQU BID_ROMN ; LAST ROM DRIVE BANK + +BID_RAMD0 .EQU BID_RAM0 ; FIRST RAM DRIVE BANK +BID_RAMDN .EQU BID_RAMN - 4 ; LAST RAM DRIVE BANK +BID_AUX .EQU BID_RAMN - 3 ; AUX BANK (BPBIOS, ETC.) +BID_BIOS .EQU BID_RAMN - 2 ; BIOS BANK +BID_USR .EQU BID_RAMN - 1 ; USER BANK (CP/M TPA, ETC.) +BID_COM .EQU BID_RAMN ; COMMON BANK, UPPER 32K +; +; MEMORY LAYOUT +; +SYS_SIZ .EQU $3000 ; COMBINED SIZE OF SYSTEM AREA (OS + HBIOS PROXY) +HBBUF_SIZ .EQU 1024 ; INVARIANT HBIOS PHYSICAL DISK BUFFER, 1K +HBX_SIZ .EQU $200 ; HBIOS PROXY SIZE (SUBJECT TO CHANGE) +CPM_SIZ .EQU SYS_SIZ - HBX_SIZ ; NET SIZE OF ALL OS COMPONENTS (EXCLUDING HBIOS PROXY) +CCP_SIZ .EQU $800 ; INVARIANT SIZE OF CCP +BDOS_SIZ .EQU $E00 ; INVARIANT SIZE OF BDOS +CBIOS_SIZ .EQU CPM_SIZ - CCP_SIZ - BDOS_SIZ ; CBIOS IS THE REMAINDER + +MEMTOP .EQU $10000 ; INVARIANT TOP OF Z80 ADDRESSABLE MEMORY +BNKTOP .EQU $8000 ; BANK MEMORY BARRIER + +HBX_IMG .EQU $200 ; LOC OF HBX IMAGE IN HBIOS IMAGE BANK + +HBBUF_END .EQU BNKTOP ; END OF PHYSICAL DISK BUFFER IN HBIOS +HBBUF_LOC .EQU HBBUF_END - HBBUF_SIZ ; START OF PHYSICAL DISK BUFFER +HBX_END .EQU MEMTOP ; END OF HBIOS PROXY +HBX_LOC .EQU HBX_END - HBX_SIZ ; START OF HBIOS PROXY +CPM_END .EQU HBX_LOC ; END OF CPM COMPONENTS (INCLUDING CBIOS) +CPM_LOC .EQU CPM_END - CPM_SIZ ; START OF CPM COMPONENTS +CBIOS_END .EQU HBX_LOC ; END OF CBIOS +CBIOS_LOC .EQU CBIOS_END - CBIOS_SIZ ; START OF CBIOS + +CPM_ENT .EQU CBIOS_LOC ; CPM ENTRY POINT (IN CBIOS) + +MON_LOC .EQU $C000 ; LOCATION OF MONITOR FOR RUNNING SYSTEM +MON_SIZ .EQU $1000 ; SIZE OF MONITOR BINARY IMAGE +MON_END .EQU MON_LOC + MON_SIZ ; END OF MONITOR + +MON_DSKY .EQU MON_LOC + (0 * 3) ; MONITOR ENTRY (DSKY) +MON_SERIAL .EQU MON_LOC + (1 * 3) ; MONITOR ENTRY (SERIAL PORT) +; +; HELPER MACROS +; +#DEFINE PRTC(C) CALL PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X') +#DEFINE PRTS(S) CALL PRTSTRD \ .DB S ; PRINT STRING S TO CONSOLE - PRTD("HELLO") +#DEFINE PRTX(X) CALL PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO) +; +#DEFINE XIO_PRTC(C) CALL XIO_PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X') +#DEFINE XIO_PRTS(S) CALL XIO_PRTSTRD \ .DB S ; PRINT STRING S TO CONSOLE - PRTD("HELLO") +#DEFINE XIO_PRTX(X) CALL XIO_PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO) diff --git a/Source/BIOS/time.asm b/Source/HBIOS/time.asm similarity index 100% rename from Source/BIOS/time.asm rename to Source/HBIOS/time.asm diff --git a/Source/BIOS/tty.asm b/Source/HBIOS/tty.asm similarity index 100% rename from Source/BIOS/tty.asm rename to Source/HBIOS/tty.asm diff --git a/Source/BIOS/uart.asm b/Source/HBIOS/uart.asm similarity index 93% rename from Source/BIOS/uart.asm rename to Source/HBIOS/uart.asm index ad5bff7b..128e0621 100644 --- a/Source/BIOS/uart.asm +++ b/Source/HBIOS/uart.asm @@ -321,9 +321,17 @@ UART1_OST: ; UART INITIALIZATION ROUTINE ; UART_INITP: - LD DE,400 ; WAIT 1/10 SEC FOR UART TO SEND PENDING - CALL VDELAY + ; WAIT FOR ANY IN-FLIGHT DATA TO BE SENT + LD B,0 ; LOOP TIMEOUT COUNTER +UART_INITP00: + UART_IN(UART_LSR) ; GET LINE STATUS REGISTER + BIT 6,A ; TEST BIT 6 (TRANSMITTER EMPTY) + JR NZ,UART_INITP0 ; EMPTY, CONTINUE + LD DE,100 ; DELAY 100 * 16US + CALL VDELAY ; NORMALIZE TIMEOUT TO CPU SPEED + DJNZ UART_INITP00 ; KEEP CHECKING UNTIL TIMEOUT +UART_INITP0: ; DETECT THE UART TYPE CALL UART_DETECT ; DETERMINE UART TYPE LD (UART_TYPE),A ; SAVE TYPE diff --git a/Source/BIOS/una.inc b/Source/HBIOS/ubios.inc similarity index 58% rename from Source/BIOS/una.inc rename to Source/HBIOS/ubios.inc index f6ae8c6e..16c78170 100644 --- a/Source/BIOS/una.inc +++ b/Source/HBIOS/ubios.inc @@ -1,20 +1,24 @@ +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; -; UNA HARDWARE DEFINITIONS +; UBIOS FUNCTIONS ; -CPUKHZ .EQU CPUOSC ; OSCILLATOR FREQ -CPUMHZ .EQU CPUKHZ / 1000 ; CPU FREQ IN KHZ +BF_CIO .EQU $10 +BF_CIOIN .EQU BF_CIO + 1 ; CHARACTER INPUT +BF_CIOOUT .EQU BF_CIO + 2 ; CHARACTER OUTPUT +BF_CIOIST .EQU BF_CIO + 3 ; CHARACTER INPUT STATUS +BF_CIOOST .EQU BF_CIO + 4 ; CHARACTER OUTPUT STATUS ; -; DUMMY VALUES BELOW TO ALLOW DBGMON TO BUILD... -; NEED TO REMOVE AND CLEAN THIS UP LATER. +BF_DIO .EQU $40 +BF_DIORD .EQU BF_DIO + 2 ; DISK READ +BF_DIOWR .EQU BF_DIO + 3 ; DISK WRITE ; -PPIBASE .EQU $00 -PPIA .EQU PPIBASE + 0 ; PORT A -PPIB .EQU PPIBASE + 1 ; PORT B -PPIC .EQU PPIBASE + 2 ; PORT C -PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT -; -; MEMORY BANK CONFIGURATION (THIS NEEDS TO BE ERADICATED) +; MEMORY BANK CONFIGURATION ; +#IFDEF PLTUNA + +ROMSIZE .EQU 512 +RAMSIZE .EQU 512 + BID_ROM0 .EQU $0000 BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1)) BID_RAM0 .EQU $8000 @@ -34,3 +38,4 @@ BID_BIOS .EQU BID_RAMN - 2 ; BIOS BANK BID_USR .EQU BID_RAMN - 1 ; USER BANK (CP/M TPA, ETC.) BID_COM .EQU BID_RAMN ; COMMON BANK, UPPER 32K +#ENDIF diff --git a/Source/BIOS/util.asm b/Source/HBIOS/util.asm similarity index 76% rename from Source/BIOS/util.asm rename to Source/HBIOS/util.asm index bcbf6cc4..237b70d1 100644 --- a/Source/BIOS/util.asm +++ b/Source/HBIOS/util.asm @@ -209,9 +209,9 @@ HEXCONV: ; REGISTER A HAS SIZE OF BUFFER ; PRTHEXBUF: - CP 0 ; EMPTY BUFFER? - JP Z,PRTHEXBUF2 - + OR A + RET Z ; EMPTY BUFFER +; LD B,A PRTHEXBUF1: CALL PC_SPACE @@ -219,14 +219,6 @@ PRTHEXBUF1: CALL PRTHEXBYTE INC DE DJNZ PRTHEXBUF1 - JP PRTHEXBUFX - -PRTHEXBUF2: - CALL PC_SPACE - LD DE,STR_EMPTY - CALL WRITESTR - -PRTHEXBUFX: RET ; ; OUTPUT A '$' TERMINATED STRING @@ -314,7 +306,7 @@ COUT: #IFDEF CIOMODE_CONSOLE #DEFINE CIOMODE_NONDOS LD E,A - LD A,(CONDEV) + LD A,(HCB + HCB_CONDEV) LD C,A LD B,BF_CIOOUT CALL HB_DISPATCH @@ -365,7 +357,7 @@ CIN: #ELSE #IFDEF CIOMODE_CONSOLE #DEFINE CIOMODE_NONDOS - LD A,(CONDEV) + LD A,(HCB + HCB_CONDEV) LD C,A LD B,BF_CIOIN CALL HB_DISPATCH @@ -415,7 +407,7 @@ CST: #IFDEF CIOMODE_CONSOLE #DEFINE CIOMODE_NONDOS LD B,BF_CIOIST - LD A,(CONDEV) + LD A,(HCB + HCB_CONDEV) LD C,A CALL HB_DISPATCH #ENDIF @@ -511,64 +503,132 @@ BYTE2BCD1: OR B POP BC RET + +;#IFDEF PLTWBW +#IFDEF USEDELAY + ; -;******************************* -; -; DELAY ABOUT 25us (100 TSTATES INCLUDING CALL AND RET) -; NO REGISTERS DESTROYED -; -; TOTAL T STATES = ((B*13) + 51) -; B = ((2 * FREQ) - 4) -; -; 4MHZ CPU, B=4, 103 T STATES = 25.75us -; 8MHZ CPU, B=12, 207 T STATES = 25.875us -; 32MHZ CPU, B=60, 831 T STATES = 25.969us -; -DELAY: ; 17 T STATES (FOR CALL) - PUSH BC ; 11 T STATES - LD B,((CPUMHZ * 2) - 4) ; 8 T STATES - DJNZ $ ; (B*13) - 5 T STATES - POP BC ; 10 T STATES - RET ; 10 T STATES -; -; DELAY 25us * VALUE IN DE (VARIABLE DELAY) -; -VDELAY: - CALL DELAY - DEC DE - LD A,D - OR E - JP NZ,VDELAY - RET -; -; DELAY ABOUT 0.5 SECONDS = 25us * 20,000 +; DELAY 16US (CPU SPEED COMPENSATED) INCUDING CALL/RET INVOCATION +; REGISTER A AND FLAGS DESTROYED +; NO COMPENSATION FOR Z180 MEMORY WAIT STATES +; THERE IS AN OVERHEAD OF 3TS PER INVOCATION +; IMPACT OF OVERHEAD DIMINISHES AS CPU SPEED INCREASES +; +; CPU SCALER (CPUSCL) = (CPUHMZ - 2) FOR 16US + 3TS DELAY +; NOTE: CPUSCL MUST BE >= 3! +; +; EXAMPLE: 8MHZ CPU (DELAY GOAL IS 16US) +; LOOP = ((6 * 16) - 5) = 91TS +; TOTAL COST = (91 + 40) = 131TS +; ACTUAL DELAY = (131 / 8) = 16.375US +; + ; --- TOTAL COST = (LOOP COST + 40) TS -----------------+ +DELAY: ; 17TS (FROM INVOKING CALL) | + LD A,(CPUSCL) ; 13TS | +; | +DELAY1: ; | + ; --- LOOP = ((CPUSCL * 16) - 5) TS ------------+ | + DEC A ; 4TS | | +#IFDEF CPU_Z180 ; | | + OR A ; +4TS FOR Z180 | | +#ENDIF ; | | + JR NZ,DELAY1 ; 12TS (NZ) / 7TS (Z) | | + ; ----------------------------------------------+ | +; | + RET ; 10TS (RETURN) | + ;-------------------------------------------------------+ +; +; DELAY 16US * DE (CPU SPEED COMPENSATED) +; REGISTER DE, A, AND FLAGS DESTROYED +; NO COMPENSATION FOR Z180 MEMORY WAIT STATES +; THERE IS A 27TS OVERHEAD FOR CALL/RET PER INVOCATION +; IMPACT OF OVERHEAD DIMINISHES AS DE AND/OR CPU SPEED INCREASES +; +; CPU SCALER (CPUSCL) = (CPUHMZ - 2) FOR 16US OUTER LOOP COST +; NOTE: CPUSCL MUST BE >= 3! +; +; EXAMPLE: 8MHZ CPU, DE=6250 (DELAY GOAL IS .1 SEC OR 100,000US) +; INNER LOOP = ((16 * 6) - 5) = 91TS +; OUTER LOOP = ((91 + 37) * 6250) = 800,000TS +; ACTUAL DELAY = ((800,000 + 27) / 8) = 100,003US +; + ; --- TOTAL COST = (OUTER LOOP + 27) TS ------------------------+ +VDELAY: ; 17TS (FROM INVOKING CALL) | +; | + ; --- OUTER LOOP = ((INNER LOOP + 37) * DE) TS ---------+ | + LD A,(CPUSCL) ; 13TS | | +; | | +VDELAY1: ; | | + ; --- INNER LOOP = ((CPUSCL * 16) - 5) TS ------+ | | +#IFDEF CPU_Z180 ; | | | + OR A ; +4TS FOR Z180 | | | +#ENDIF ; | | | + DEC A ; 4TS | | | + JR NZ,VDELAY1 ; 12TS (NZ) / 7TS (Z) | | | + ; ----------------------------------------------+ | | +; | | + DEC DE ; 6TS | | +#IFDEF CPU_Z180 ; | | + OR A ; +4TS FOR Z180 | | +#ENDIF ; | | + LD A,D ; 4TS | | + OR E ; 4TS | | + JP NZ,VDELAY ; 10TS | | + ;-------------------------------------------------------+ | +; | + RET ; 10TS (FINAL RETURN) | + ;---------------------------------------------------------------+ +; +; DELAY ABOUT 0.5 SECONDS +; 500000US / 16US = 31250 ; LDELAY: + PUSH AF PUSH DE - LD DE,20000 + LD DE,31250 CALL VDELAY POP DE + POP AF + RET +; +; INITIALIZE DELAY SCALER BASED ON OPERATING CPU SPEED +; HBIOS *MUST* BE INSTALLED AND AVAILABLE VIA RST 8!!! +; CPU SCALER := MAX(1, (PHIMHZ - 2)) +; +DELAY_INIT: + LD B,BF_SYSHCBGETB ; HB FUNC: GET HCB BYTE + LD C,HCB_CPUMHZ ; CPU SPEED IN MHZ + RST 08 ; DO IT + LD A,E ; VALUE TO ACCUM + SUB 2 ; ADJUST AS REQUIRED BY DELAY FUNCTIONS + LD (CPUSCL),A ; UPDATE CPU SCALER VALUE + CP 1 ; CHECK FOR MINIMUM VALUE ALLOWED + RET NC ; IF >= 1, WE ARE ALL DONE, RETURN + LD A,1 ; OTHERWISE, SET MIN VALUE + LD (CPUSCL),A ; AND SAVE IT RET ; +#IF (CPUMHZ < 3) +CPUSCL .DB 1 ; CPU SCALER MUST BE > 0 +#ELSE +CPUSCL .DB CPUMHZ - 2 ; OTHERWISE 2 LESS THAN PHI MHZ +#ENDIF +; +#ENDIF +;#ENDIF +; ; SHORT DELAY FUNCTIONS. NO CLOCK SPEED COMPENSATION, SO THEY ; WILL RUN LONGER ON SLOWER SYSTEMS. THE NUMBER INDICATES THE ; NUMBER OF CALL/RET INVOCATIONS. A SINGLE CALL/RET IS ; 27 T-STATES ON A Z80, 25 T-STATES ON A Z180 ; -DLY64: - CALL DLY32 -DLY32: - CALL DLY16 -DLY16: - CALL DLY8 -DLY8: - CALL DLY4 -DLY4: - CALL DLY2 -DLY2: - CALL DLY1 -DLY1: - RET +DLY64: CALL DLY32 +DLY32: CALL DLY16 +DLY16: CALL DLY8 +DLY8: CALL DLY4 +DLY4: CALL DLY2 +DLY2: CALL DLY1 +DLY1: RET ; ; MULTIPLY 8-BIT VALUES @@ -745,6 +805,12 @@ PRTDEC3: ;================================================================================================== ; #IF (DSKYENABLE) + +PPIA .EQU PPIBASE + 0 ; PORT A +PPIB .EQU PPIBASE + 1 ; PORT B +PPIC .EQU PPIBASE + 2 ; PORT C +PPIX .EQU PPIBASE + 3 ; PPI CONTROL PORT + ; ; _____C0______C1______C2______C3__ ;B5 | $20 D $60 E $A0 F $E0 BO @@ -853,7 +919,7 @@ KY_SCAN: LD C,0000H LD A,41H | 30H ; SCAN COL ONE OUT (PPIC),A ; SEND TO COLUMN LINES - CALL DELAY ; DEBOUNCE + CALL DLY2 ; DEBOUNCE IN A,(PPIB) ; GET ROWS AND 7FH ;ignore PB7 for PPISD CP 00H ; ANYTHING PRESSED? @@ -862,7 +928,7 @@ KY_SCAN: LD C,0040H LD A,42H | 30H ; SCAN COL TWO OUT (PPIC),A ; SEND TO COLUMN LINES - CALL DELAY ; DEBOUNCE + CALL DLY2 ; DEBOUNCE IN A,(PPIB) ; GET ROWS AND 7FH ;ignore PB7 for PPISD CP 00H ; ANYTHING PRESSED? @@ -871,7 +937,7 @@ KY_SCAN: LD C,0080H LD A,44H | 30H ; SCAN COL THREE OUT (PPIC),A ; SEND TO COLUMN LINES - CALL DELAY ; DEBOUNCE + CALL DLY2 ; DEBOUNCE IN A,(PPIB) ; GET ROWS AND 7FH ;ignore PB7 for PPISD CP 00H ; ANYTHING PRESSED? @@ -880,7 +946,7 @@ KY_SCAN: LD C,00C0H ; LD A,48H | 30H ; SCAN COL FOUR OUT (PPIC),A ; SEND TO COLUMN LINES - CALL DELAY ; DEBOUNCE + CALL DLY2 ; DEBOUNCE IN A,(PPIB) ; GET ROWS AND 7FH ;ignore PB7 for PPISD CP 00H ; ANYTHING PRESSED? @@ -899,7 +965,7 @@ KY_SCAN_FOUND: ; WAIT FOR KEY TO BE RELEASED LD A,4FH | 30H ; SCAN ALL COL LINES OUT (PPIC),A ; SEND TO COLUMN LINES - CALL DELAY ; DEBOUNCE + CALL DLY2 ; DEBOUNCE KY_CLEAR_LOOP: ; WAIT FOR KEY TO CLEAR IN A,(PPIB) ; GET ROWS AND 7FH ;ignore PB7 for PPISD @@ -921,6 +987,7 @@ KY_KEYMAP: .DB 048H,088H,010H,050H,090H,020H,060H,0A0H ; FW BK CL EN DE EX GO BO .DB 001H,081H,0C1H,0C2H,0C4H,0C8H,0D0H,0E0H +; #ENDIF ; DSKY_KBD ; ;================================================================================================== @@ -971,22 +1038,20 @@ DSKY_STROBE: DSKY_STROBE0: OUT (PPIC),A ; OUT TO PORTC - CALL DELAY ; DELAY + CALL DLY2 ; DELAY DSKY_COFF LD A,40H | 30H ; SET CONTROL PORT OFF OUT (PPIC),A ; OUT TO PORTC - CALL DELAY ; WAIT +; CALL DSKY_DELAY ; WAIT RET -#ENDIF ; -;================================================================================================== -; DATA -;================================================================================================== ; -STR_EMPTY .TEXT "$" ; KY_BUF .DB 0 DSKY_BUF: .FILL 8,0 DSKY_BUFLEN .EQU $ - DSKY_BUF DSKY_HEXBUF .FILL 4,0 DSKY_HEXBUFLEN .EQU $ - DSKY_HEXBUF +; +; +#ENDIF diff --git a/Source/BIOS/vdu.asm b/Source/HBIOS/vdu.asm similarity index 96% rename from Source/BIOS/vdu.asm rename to Source/HBIOS/vdu.asm index ebd7aab7..5fca2267 100644 --- a/Source/BIOS/vdu.asm +++ b/Source/HBIOS/vdu.asm @@ -1,5 +1,5 @@ ;====================================================================== -; VDU DRIVER FOR N8VEM PROJECT +; VDU DRIVER FOR SBC PROJECT ; ; ORIGINALLY WRITTEN BY: ANDREW LYNCH ; REVISED/ENHANCED BY DAN WERNER -- 11/7/2009 diff --git a/Source/HBIOS/ver.inc b/Source/HBIOS/ver.inc new file mode 100644 index 00000000..912f5ba4 --- /dev/null +++ b/Source/HBIOS/ver.inc @@ -0,0 +1,5 @@ +#DEFINE RMJ 2 +#DEFINE RMN 7 +#DEFINE RUP 2 +#DEFINE RTP 0 +#DEFINE BIOSVER "2.7.2-alpha.7" diff --git a/Source/BIOS/xio.asm b/Source/HBIOS/xio.asm similarity index 65% rename from Source/BIOS/xio.asm rename to Source/HBIOS/xio.asm index 1cea2490..d21934cd 100644 --- a/Source/BIOS/xio.asm +++ b/Source/HBIOS/xio.asm @@ -6,6 +6,24 @@ ; ALLOWS USER MESSAGING/INTERACTION PRIOR TO AND DURING HBIOS INIT ;______________________________________________________________________________________________________________________ ; +; +#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_ZETA) | (PLATFORM == PLT_ZETA2)) +; +SIO_RBR .EQU UART0IOB + 0 ; DLAB=0: RCVR BUFFER REG (READ ONLY) +SIO_THR .EQU UART0IOB + 0 ; DLAB=0: XMIT HOLDING REG (WRITE ONLY) +SIO_IER .EQU UART0IOB + 1 ; DLAB=0: INT ENABLE REG +SIO_IIR .EQU UART0IOB + 2 ; INT IDENT REGISTER (READ ONLY) +SIO_FCR .EQU UART0IOB + 2 ; FIFO CONTROL REG (WRITE ONLY) +SIO_LCR .EQU UART0IOB + 3 ; LINE CONTROL REG +SIO_MCR .EQU UART0IOB + 4 ; MODEM CONTROL REG +SIO_LSR .EQU UART0IOB + 5 ; LINE STATUS REG +SIO_MSR .EQU UART0IOB + 6 ; MODEM STATUS REG +SIO_SCR .EQU UART0IOB + 7 ; SCRATCH REGISTER +SIO_DLL .EQU UART0IOB + 0 ; DLAB=1: DIVISOR LATCH (LS) +SIO_DLM .EQU UART0IOB + 1 ; DLAB=1: DIVISOR LATCH (MS) +; +#ENDIF +; XIO_INIT: ; MINIMAL UART INIT #IF (PLATFORM == PLT_UNA) @@ -16,15 +34,15 @@ XIO_INIT: ; MINIMAL UART INIT ; ASCI0 LD A,66H - OUT0 (CPU_ASEXT0),A + OUT0 (Z180_ASEXT0),A LD A,64H - OUT0 (CPU_CNTLA0),A - LD A,Z180_CNTLB0 - OUT0 (CPU_CNTLB0),A + OUT0 (Z180_CNTLA0),A + LD A,Z180_ASCIB0 + OUT0 (Z180_CNTLB0),A #ENDIF -#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA) | (PLATFORM == PLT_ZETA2) | (PLATFORM == PLT_S2I)) +#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_ZETA) | (PLATFORM == PLT_ZETA2)) XIO_DIV .EQU (UART0OSC / (16 * CONBAUD)) @@ -71,15 +89,15 @@ XIO_OUTC: ; OUTPUT BYTE IN A #IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) PUSH AF ; SAVE INCOMING BYTE XIO_OUTC1: - IN0 A,(CPU_STAT0) + IN0 A,(Z180_STAT0) AND $02 JR Z,XIO_OUTC1 POP AF - OUT0 (CPU_TDR0),A + OUT0 (Z180_TDR0),A RET #ENDIF -#IF ((PLATFORM == PLT_N8VEM) | (PLATFORM == PLT_ZETA) | (PLATFORM == PLT_ZETA2) | (PLATFORM == PLT_S2I)) +#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_ZETA) | (PLATFORM == PLT_ZETA2)) PUSH AF ; SAVE INCOMING BYTE XIO_OUTC1: IN A,(SIO_LSR) ; READ LINE STATUS REGISTER diff --git a/Source/HBIOS/z180.inc b/Source/HBIOS/z180.inc new file mode 100644 index 00000000..5ceb0bae --- /dev/null +++ b/Source/HBIOS/z180.inc @@ -0,0 +1,67 @@ +; +; Z180 REGISTERS +; +Z180_CNTLA0 .EQU Z180_BASE + $00 ; ASCI0 CONTROL A +Z180_CNTLA1 .EQU Z180_BASE + $01 ; ASCI1 CONTROL A +Z180_CNTLB0 .EQU Z180_BASE + $02 ; ASCI0 CONTROL B +Z180_CNTLB1 .EQU Z180_BASE + $03 ; ASCI1 CONTROL B +Z180_STAT0 .EQU Z180_BASE + $04 ; ASCI0 STATUS +Z180_STAT1 .EQU Z180_BASE + $05 ; ASCI1 STATUS +Z180_TDR0 .EQU Z180_BASE + $06 ; ASCI0 TRANSMIT +Z180_TDR1 .EQU Z180_BASE + $07 ; ASCI1 TRANSMIT +Z180_RDR0 .EQU Z180_BASE + $08 ; ASCI0 RECEIVE +Z180_RDR1 .EQU Z180_BASE + $09 ; ASCI1 RECEIVE +Z180_CNTR .EQU Z180_BASE + $0A ; CSI/O CONTROL +Z180_TRDR .EQU Z180_BASE + $0B ; CSI/O TRANSMIT/RECEIVE +Z180_TMDR0L .EQU Z180_BASE + $0C ; TIMER 0 DATA LO +Z180_TMDR0H .EQU Z180_BASE + $0D ; TIMER 0 DATA HI +Z180_RLDR0L .EQU Z180_BASE + $0E ; TIMER 0 RELOAD LO +Z180_RLDR0H .EQU Z180_BASE + $0F ; TIMER 0 RELOAD HI +Z180_TCR .EQU Z180_BASE + $10 ; TIMER CONTROL +; +Z180_ASEXT0 .EQU Z180_BASE + $12 ; ASCI0 EXTENSION CONTROL (Z8S180) +Z180_ASEXT1 .EQU Z180_BASE + $13 ; ASCI1 EXTENSION CONTROL (Z8S180) +; +Z180_TMDR1L .EQU Z180_BASE + $14 ; TIMER 1 DATA LO +Z180_TMDR1H .EQU Z180_BASE + $15 ; TIMER 1 DATA HI +Z180_RLDR1L .EQU Z180_BASE + $16 ; TIMER 1 RELOAD LO +Z180_RLDR1H .EQU Z180_BASE + $17 ; TIMER 1 RELOAD HI +Z180_FRC .EQU Z180_BASE + $18 ; FREE RUNNING COUNTER + +Z180_ASTC0L .EQU Z180_BASE + $1A ; ASCI0 TIME CONSTANT LO (Z8S180) +Z180_ASTC0H .EQU Z180_BASE + $1B ; ASCI0 TIME CONSTANT HI (Z8S180) +Z180_ASTC1L .EQU Z180_BASE + $1C ; ASCI1 TIME CONSTANT LO (Z8S180) +Z180_ASTC1H .EQU Z180_BASE + $1D ; ASCI1 TIME CONSTANT HI (Z8S180) +Z180_CMR .EQU Z180_BASE + $1E ; CLOCK MULTIPLIER (LATEST Z8S180) +Z180_CCR .EQU Z180_BASE + $1F ; CPU CONTROL (Z8S180) +; +Z180_SAR0L .EQU Z180_BASE + $20 ; DMA0 SOURCE ADDR LO +Z180_SAR0H .EQU Z180_BASE + $21 ; DMA0 SOURCE ADDR HI +Z180_SAR0B .EQU Z180_BASE + $22 ; DMA0 SOURCE ADDR BANK +Z180_DAR0L .EQU Z180_BASE + $23 ; DMA0 DEST ADDR LO +Z180_DAR0H .EQU Z180_BASE + $24 ; DMA0 DEST ADDR HI +Z180_DAR0B .EQU Z180_BASE + $25 ; DMA0 DEST ADDR BANK +Z180_BCR0L .EQU Z180_BASE + $26 ; DMA0 BYTE COUNT LO +Z180_BCR0H .EQU Z180_BASE + $27 ; DMA0 BYTE COUNT HI +Z180_MAR1L .EQU Z180_BASE + $28 ; DMA1 MEMORY ADDR LO +Z180_MAR1H .EQU Z180_BASE + $29 ; DMA1 MEMORY ADDR HI +Z180_MAR1B .EQU Z180_BASE + $2A ; DMA1 MEMORY ADDR BANK +Z180_IAR1L .EQU Z180_BASE + $2B ; DMA1 I/O ADDR LO +Z180_IAR1H .EQU Z180_BASE + $2C ; DMA1 I/O ADDR HI +Z180_IAR1B .EQU Z180_BASE + $2D ; DMA1 I/O ADDR BANK (Z8S180) +Z180_BCR1L .EQU Z180_BASE + $2E ; DMA1 BYTE COUNT LO +Z180_BCR1H .EQU Z180_BASE + $2F ; DMA1 BYTE COUNT HI +Z180_DSTAT .EQU Z180_BASE + $30 ; DMA STATUS +Z180_DMODE .EQU Z180_BASE + $31 ; DMA MODE +Z180_DCNTL .EQU Z180_BASE + $32 ; DMA/WAIT CONTROL +Z180_IL .EQU Z180_BASE + $33 ; INTERRUPT VECTOR LOAD +Z180_ITC .EQU Z180_BASE + $34 ; INT/TRAP CONTROL +; +Z180_RCR .EQU Z180_BASE + $36 ; REFRESH CONTROL +; +Z180_CBR .EQU Z180_BASE + $38 ; MMU COMMON BASE REGISTER +Z180_BBR .EQU Z180_BASE + $39 ; MMU BANK BASE REGISTER +Z180_CBAR .EQU Z180_BASE + $3A ; MMU COMMON/BANK AREA REGISTER +; +Z180_OMCR .EQU Z180_BASE + $3E ; OPERATION MODE CONTROL +Z180_ICR .EQU $3F ; I/O CONTROL REGISTER (NOT RELOCATED!!!) diff --git a/Source/RomDsk/ROM_1024KB/FLASH.COM b/Source/RomDsk/ROM_1024KB/FLASH.COM index 153751fb57e978a4b52ea15f73cab8ce3039364e..c62108d5ff8cafa23ae8d1c85a097c639616ac97 100644 GIT binary patch literal 12321 zcmdryYj{(~l_Ni7OXgwY1TM~lxly6QB#yBi)#9N90s_%*>f{&YU?9iA0q`8dPFtu(5ekLyAfz5|t^SqM4px<6QBu{~oWn zg@7nF%A$%aStT{;Cl675tWF4fJ^r-~I-v*O;*7?C9Pq!nV-oSl6K&J);7J12D$s#W z*0qW;#26@<6oXw|(vbG(?Gu%H>mL%S%F=_R_No>m9|_JVOz8kDG^C;>Ys-2^3ZP!x~VS;PTd*M+(HTVN8QNP~kp z1X~FtwMPe1f@hL=-ATV?z#Z2N04XkLd<>-cpwWU82aOv*N(>rHLDB?`WguyTMk`1Y zf<_xi6NAQbQ%unKq-jymSdCkmcT;1NUb|4AvQU4^LcO}R-mf0S*Tvyh)qtu;Y}pb> zzq#>DYu$%*>P2tRXbk3_@4gZ=o)6|`T|OE#X0--qv$o5);Q64KHNYpFxKJ-F)ZejC zpMs6*3Lu>Sz?QBe z-@nf(Y4y*1I?W->!9s_B(iDOAM41F7S}00_{0U&5h?_wW|GKAxje+zvUN%0`u<5W~ zllB{`N!29@7c*4CXBkBJgu|NN%PK516=uDcZh9MQX`ZCiv;{N)N1y~=lzu}8@#)oV zI!rr+e@@9u2tIOa2040Xt1PB8%61e7ohpvB1pKeR9SSLJH6&$XV|q&CEHd5RDkeM= z@Zb4%sQIae)s^H&*kt~of~T0ZdXRBql#A8Xsx4$dK@*CWwf&5 z2`hEgR98EkZfbKlS(j7ms&%=oRn$^eW-X&`2X$|(aM5a~qugn!%Fq&a3{ZrT;(?Cz z72ZI4o;Tp1_{$LfA-*w0Hp=!G*%li>#ATZ*kRIRYf8szWRM;VlaX0L3e{}OMy5N5| z{`l5sT21eTvl(h)VPPOWmam*`DvUI~mp-Pk;d+pN`|#vzhO>pgV2k^=K7+*gze6Q6 zoGpv7*U~n+|Lc*J;~152@#3(t4^cPvh$+N~!WL}&4(Pvq4Jks|P{OoJhnT?TM3GVE zY=?X;n3F6Ulj{FfzakAhS5iA##EA?<69GBa4mrJaBINYZM9ArMt|tTgPOA1ykc?EgPV#E(<>v|H2fVlw&OY* z^WVHx5isO)RJ0$RN;;G_)o5G$EK>i0qwZJb+1UZpg&WLs%X7zC@L1#74T(kGJ5-Iq z6{^OH$MAS<{*^urq@i6@4bt#V{UlMRu7u1T$U zOs8Wf^GDC&?Zf8GP=$~R=1PleBdxMlIh?h$bYn#|&09k8NM~-EnVIvzJW2}fPuLwE zJGCi*3<8h&OqZ5Kr6U}k7t@Fs9BB(a7kpUN*dcex_Bh!VuOcKYi+NtThA4$wC9d#R ziz~fPhD-@ci;v9WrD`fKVwBTZWp!l%-w-;X)*& zd9#*!v&`PCW!|jiUT;>OH|vMqtQFp@m0pGIQMAP?DAZsWAYd3IUKBR)^n#}kJpJNQ zFG|!Nka~6dLF!|#e%=0)cRr7;P4oe5?~bKE!mTa!GA+gmn@TB)Vw9pJHl)`2=KIoo zxB6~Nz8r>kXtQa5aT8ARdE~0VoEp;F2A8L`iV&O?OR43qB=EqnbIjy}7xVQFW^-X$Ozfd1v-x){a@c#V%EYi{u z5My5$*<1TDJQ8eoLr4O)n_=NV24OOuII}c@yA$^lK|PA8_@yETSBRXh!t0a?F4TMt z?w~pzd_fcVzP>&AGDtx<@-1PRof1$U2-28Oc~3_Ya2dxm~u$}8I=d-V@K z4boZgoCc`}JZDUaLL&H1&jQ~Wl_psbzb@OnOs&6HWHrr=JGW z*9+Ov4mP3f^4@l3hipp2ITY6O_*}v#%n_E<$VOR8P?&fL_8?2cu)pu*rI*2X#eAF< zYO`JohW`IXVc(9382UeDH7Mzaq5-jaJLLC*xvvHCFM&CXH09D50{bPfg#-S_p9w+D zm*5V7s~enOjZz6Y#33s2{)U=wzwjP}C8?ap*Vf^FIBjbHb^(Zq}RL%FkB#MV2|1_A-up`n9wy&`G z5^RA$x+Z!=d`ppRhRZ})1=2UL6*=$?NEcx{GT|afU&7Ww@O%kU0Jh8E34qiM+lRo@ z4boSz9Z$_ykaK~ZtPsP`)6ekp3^doh2)@ha5rAsR6h=2Hkrt0W$lq=U9-uU z$w!;9(eAcX*s0a&bU4}E+Vu2vTC{Xcp7}u<*$}p9wPVK@tPn?Ui|9SJuOYN*i6Rn# zt`xQ640Da#f{K-?nPY{I)b6B-n|3L8K$^nWDYZK{y_q=y-KE6ZCZ#3|#n!44W%xkf&{yDrB)9UvWrHEaJ zcyM>1#h-`vT|4^ANwQezl?^1mx%<^f|1YoCA2Ztj>+AK$j`knDUVq$Zf9u$OZDf75 zupzSie~s-%W!vu!W z<>NZ>P0QqOloE59`fiLB*ZB~|{!pKYQxsqVvxQ^~&~(OPd}i9cGd^v| zeS&Kv?x`D*gt2e3OM=CkQd6JUpa_zG&lo{U5Z8GPDj_@4ck-IPSYcWZo9<70@TfBJ zL+OiWgJS%5Y{h$dj`$aj8~A!r7tdSg9g5Y*E~Lq#_NR)hi@nUn5n>T{f8ldsw5m%) zv$sfG=FJzEd(GqRW_~lG=`*C5KEo{|?m@(U6mM5%6(P_;|uX_qDkV*914XF8#+}V7wtC1%D7t@#ieMs zQY#_1p}hRVYbY*4oUlNc$6S<0*CBPbHH5m9N<%}a@R6>kKG07cWry>PQGpKlCu|Ef z7wu*vp$46u;mGd%FEt>2^&%f8A)9shlKE#qeCZ8-HwiW<8G@o=v{b^`9sbu}31uTE zwBkYDFDzro$54SonN$qurWepVujvDKKQk5kxH%{F!;wDyWDbY&$iWy|0spfNA>~pt zuUxctc@EuBON%kGMAwc)mgs`(gqlq3-f>kp>~wBMRz?=y4R=2@H#c+1szv1PH3h4R z7Z(?-ToSF4y9@IdEzT=gOYUAhcW#!_j8*(!v}Rr2qLt{QI<2LSa(jgfZ#qY{o6UR2 zOxGP+Qs}C%ms2)1#kr}~US45mehP2LX(^kRZm`&&pe|2^8~s~*`AGj7M-^g1^^VH2 z*?$e@$5|PMIX8r2cwali{T933;ihHiJ2|TmF}l&=VL>%ZX{puaQUY!fzZ+?yc;|@P znx%`D5PrLo;x&2emXZfCFc*Ov>&T-Q&t@Mb4Gv!9a@F8U<@BDpS?JQ?v}kjT4FPPl zxX@OJUis8vqcbrUxS`f2lL-oO>RP zS{PN1G7LJ}EgLGWWr%`yZ7tdho91aX5s_gV!hw|tQe~wNbN;y=9qEr)65j%$kl}h$ zXbTi!a8Z4Pq*Ye;Mn@S7a9C>Gj=LD;6*~;Yw#;g?)Kt1>Yc)~1(k!a1M20Al4@NT! zt+Y7Ht&D2a=EQiZg}SONm6cW}t*EkK2SX8uW4|UcmN}evDU_+f$SYE_CK66jLM`sv zYO4zeL_}X>b~sC|S4%7QN5ntUe*>xI3!}VhB5+aZy{=@AK;t>P7XBV;v6oS+#aUTl zbzUvhIFvCzy3BP%TT3F6U5fj6bGj%864@W=aa3C|riAp0w&#sdkXyrL4l9@6Dhr-U zh33pko<|pLz<@NeLyKZht1PvYQ8vmlc6uUKFBeGnMhs%R(bi?eXCKI%JJ~t2q5@)J zZLP~L5t<&V~)-O7+G~-Uc}rF%Sru7DDRE3T zUz8Qt%L;5<^*{s(lu@$y?$viKd0;d!6XwRY`g;bVOCI2N{u3K?Hpq_yb9`OrJgQFX zJ`j_dnw{N(QJEpA9##>OR^Fr+J2UjRq2s8;S>>)SS(7TeNo;Lr;wElYd^}RkoWQ{} z1{y1zN$bp@s#K5$PiP9zU;2nF!>C6JA+m&)$xxI2R`lg??wczf!=%)Ztn;Kk)fu~) z&-v$(YGxw#8)&K!92dt6hr?*wDDHYZy6eH*&E1m|@UQ!VV-|t@elQQAYd)}#L0u?EH$m!0XL4X)=Doq(T4pU7WDHth=nR7t;gD$p_y#d*BToh25I(~g zy$Rwrwm5JX+sYBw7uTZ;`a-d=FqpgP?;o!0M@c_rt@5Im5x8zHWHn|}@-dt8&=&NZ zjD4*PFg?;JV?62V)Jhak7FV%2rIO!5!>+}D>djD3WI#TV%_?-RzHR)7ivm&-9MQI& zehbrioelW)Dann;kfosJfqM*4qVvmUXK`x`1B{EhN6 zj8QMPY*bhk_bhnO+lhY}Jn`t?yZ{~yh9$fRo&-!PZUGPa>6&fe(I6hLf=7#(ybhkE zX7gJaD)jrJfxWSjeE-3Hq0qQYPo!l`a)P(u3M`i}4s~VlRc#$OVd2$#WQ|I$D*Zb_ z9~^_V5|&2RV$uUMA4*O5e3#oybk;97Qg~KQz3gcun z=}?TEv9c>hcB?ROpOQZsTF0yv%hgC(H#IW5T|*>Uytz^K5S^4Ywb6fJ%N=XHt!F|k zp&eeb%Ij!UC(}4}V(n~S%CtKVVK8^ zwLGK?dxq$AStkcDDi<#Y=A)hJiHpRI1r#fm+$ougQE$dO`z-R*ZpY?*<@{_hw9$=D67b*L!7$;JGvp~~jsEXAYgp6x&QHq$j2^N;KP zYapYiN$g|s3FRjU9c&LhifFbYp{B1|f{p^!K8F!^)Qi4^ZdHU~M}}g;A@KF13LQZ8 zIf#!uRa*{w)VZ2Ee8*tl2~0tpz}RbF6a5b+_R6&56ukJKN@OH}O1Yab)dw|~z#V2{ z&!f(~?JIC&xcw{U^kTUFG;?~d@ckF*pe7OAn$6`+ZL<$`&OEL;1cnZr?l1U!iO(1K zbm8+EKA++P_yXPl<~EtYN!SQYz?c4MUF1g29+;z)&(OB#a}YJ{s(@FLhxjq5qpocE7xsSG-a4Ly!uhEs$!vRN&;lTDjn%hlp_^*$K>tP5JzzW+IDg6($EmO*eu)TThyT}0*L)q{pFTUW#XT11S zDSV%q_4lBXKY;>;0gNQZQ%-Qy`AG02&W<@yBZGUCHz$RA*`SzjA9VF7nYqw>_LCzV zJb4WV>)&M@tbdma9bZ=qwj>=2nHJnhbLL}Fr#ux$@v5n z)2ACvAHFIJjbYBINxzgO67T8r?*2UX=NK`Z|MQVuof$W6G>^`QqiT%(5wALR)xsgP zkd#!(0Lzmg=50s-1@)7x!f;>DjjYn!>YCcz?|vKdpD?2JfPFl@aK+jwshg%mH;unn z7<+0;0#MYQIzp07<9gdu#Ux@hM|=4=OziwQoZXV`@8*iGJrz?TELHV4z_|k8>=ss{ zKETMw=UQPgz7vH7O5K3(WFZsvgGv~=;H7I0IiAX#Zb1`alxq-tU~ZfLPh4R7!9Bo) z6SdU!C0deCV3G>^hCV{AI0Pj!6b*^DM-^@)Ylq*8qU4jZTqIAr7;i@oyk~&Y)N-$a9t@(>y)E&Sl}4 z{cwgxV}VZk!6_k(Q!kAUt;T{ZZ+%*S(o!P`(kb!MGyDnYkm98@zx_&zo3f563r zQ3)?oJoV*#>iQFdj=GPA%R73+??vg+F5VF#g|LQWbPn9-uNE;}a`UtU45@QqJ3j^~ zdK+(w;G|%56^P!z<_&O&{4QUuUQ|AivR&R?>rG^Dv5CAHCW2>$OSlZ9*&%&FM{hFIM0Lh2ZeQbp&(*|D)9Zq zOfj#GS|}It&rXPli+QkiN9OG}KEA2(!lzs)pc-Ym%dC%Hbf&w;ok_gs*v;4t_Y4X} zm-13QcTZyXB! zei?7w)HPzvZ`lk4n=wp0GHzAs}h~iU-9;WD%as}41j5QUow)L#B80R>F z2r#R9xQYIZ3l?`(mM#`gE%sDRvst0Ep)mpWS3gKcmuNIUxhnp?&2L%i9# zd<=ueEl%g%zYVUzEG}Qm^WbW2L07=m@!*(w+E*=6?3AtmDsqfCZB2Awi~_c6Fc74M z?b`LoMc9tyXFo0^Dyp*XZ6Jw+98^{AB{5iuo8j6^;#4Fieul&=2{X3sC5hOQIAbTT zq|SJ2FG6nb#R7vZwx`Gjv2pZEpe)kXB=ZKaVkpN_!6JflYEH}fBW%X zN+=;me%pnW`v__J?P;tuAR5Qda~LxE*Si%5}# Y{a|D37@+?r)%#bkTD_)V8JX7jKY2%{4*&oF literal 12727 zcmdsddsI|cn(rx~coaTRy7g!to|78w5<3KeRD+4w8ZF}_qN9R&Vo zLerB+cVdiDqtTXh(w$DsOjD#gvgWQeohXC1p>Fjw+OXEdd`8rwRV=jB@&Odw-`?jG z4m&G}I*WTa$_P4*+{`R+zEa=7wHM)kGL2u)jnsGXvEa>tAx`Q)4LGR3l z&;35HyjdW*p*|w(g!zk=2GiJn$rNi8!*w42@*1Pqg}3}geIOF>KfP^?;MWU=hCk8E z0#)e9NXCeHpYmCR#_G%6&VY=nkhi&rQ9)-sVJTb6VN&42UHYCg?dz{2@dMGBg_xK z116CQlQ39?U^9^t?=g~+;29&|5$Sgfc;L1Hq{IbtUm!&v%q<4uVD4&C5`(#GNJ$Fj zt|i3~%(ap-Dwt~{WppsNBrhhI`*PmgU~UDLGV4HngDGLQDQUJTwRw~O%0RQOSJx%~ z>*he(XZ7crtG|#YT&WA@<_2>vc3uzWUJT}BUi&JTo7o(k&f2bFqKiQ}vsXoAm~9#} z+a!X4&9hDpfLXvM$c8N(SyyvV$_$!vo8@>RSLsZ6ZH7-V#az<`0OzmW+)?QJpEHV@ z{i$0fJH#0%jQCT=i&9rqBvfRe!eq)HMV8SZ9U%UBTY}y|+F36fuQjZ%HziH}qm-0t zOct-C>%^1kg7}RJn|C0ypdhax^FUhO2dGWfI%r~S5mnlQ=UEQhxQ{G}g- z8aLJ~EwdK8tdh07xU@|2l$MqK)aCG4ovSO|ZddvmN4ZpLld2q*lE+b5wpJ=DeaR}h zDk~}+PPb%pI9Zp|;Hq-Dt>sej+O^iTlG`D<*Oj`Y3a6vQSzMlO5SY?KVZrJ^TUrO0 z@U1uCe*=VtLZCNBh~!4>F%esA0E9%&uS8_p&^%_jG|UjZ}z-;t6L&Wgyf zxAQi-{yVW%r7^1E@|A(yn;<>6OCBfWLfL}e??L_tx3MCWMMcb)w8_Z~Csc;xY^8hy zS(1y_C2#tJ>50kY=}m2Gk`o!oXbt30D`oddqbWNgB~o_36ie9yO>Ly~hO@|ilWaW! zvR^0LjUhp{9uj{?_IR=-pev4Sdd7dc2}2#X)N;>;-%GuNelz?%7PajTi}J_5%9RT; zj;i(Z6NEP2rWXwwuPt@6{_uk~~J`&w@w%4=iW`TFipHo4wLr<2c}JQcGVj8kuFz zc@29F!<()PfeV(hV%IvU+*<*7zvT;BL z0W+WKG6+%a2#06wuE(4QTaLdLeD=Niwn#_B9v89cb%GF%$lrP+l>#r^I=RDJA)oTT z9Lh`JEk0qITIwdKWsFwFPM9qbLsS$WDNJA-yw#hKbAVj^e3O0m`tD1)7N(*e zD(t2FKC(nYc?MsOZxZ_MnJtBN6W<85HE~IV_mM4vqK9m~fwW($9ttYZ zaJaRNvTrbbzZqzYD)RKraI2ddpbwsYG7ku3?mjU5+BDmw-_#x_#bLwz(KMl{Eg+v7T3hQO*a2HzKP-W* zW7no8fPFBN|ix!cgO3=*PTbc;QcArNa?17 zK`DjIK^>X91*+^K_XTk>nY$!1Ul2BRPBD!hXWy!=)qj2qDP80_N6H2AoX<-X6UldO z8u`vck;BX?;KwFee2<$_m{!~3Bld);(hoK@NGZObnkJGGoXzaHyTOz!zp<4|kD)YQ z6v%uDPZ-ZNm0%?vVv8sVeA!{z6(Qvs?e9N&>@D&QSPruy-eNM4xfguz+X_O=z5mK; zRMbm_ee#D}DL+D%{wB%~ljRzCs_I~f>|wH93;3UUB}A10a(9yJZ{$2X#3e{bh4|>h z5J0Yw`zo2wfIYpSt`AQL&t-v>bL6>B%6anKAoESM^`I?8yMm-#rv2SV?|+l*U1Yle zd{@YJbx`n&-hkkJ3rx_N0bS$$Z^{jyQ~o)!oM(pdH?o~Y5g=P}GfTHg%cN z$Bg4LOr!DHUy$#N<*@TD%D%{YFENg`;HT0@2YXG=MA`7Y7(wsrjF!}fAh~E9xiMc*EzDC4*=P%Ec{iJg{`R@A({;k zOvZEnJtkt7yNa{bx1go-O(xJ;UEX%Rl+Tw~6c;JfbFa=`IC=&A+j)#gN|@`;wGp~= zeJ3e5_K|XPFWlMtr@nftyQb%Vy~U7HcKGlYKd0<#jd&{;`PfTrEVF^h^1lt~`bDx_ z(l*qPh~o#d9K;Z?on8H=d#ET(h1c$pFGmMNtwKy8dxUKL0eSq}s-b`sI(XeQN&eB> zlz*KpH&m>0{@bUSA&H4{i3+JkBHXPO*sbd;tZUo|nO!IlOS?)pSm9?4f@SWaCl}0@ zme0*!wBl*$vBwuY_QY~&mIBLJogqgAY|U7OZ5T^NRZs2PoRcX6p*vO1j( zC&O(>OG}dq7c5(3d0NsIgcgHg`1mDH$V0nD)YtE;2`!$_RU*(aE}oxtRgc^R$I9Hy zp@QeCwo8fY-{pJ2WG>h7RomC^%@~FAQDRjCZ;weA;PvJH0mW!@6dG+C+9Og@b$dXH z%hQRvI>(5vm8|QN!LH!5pVZ@wpKr9tl|qs(p6xRJN3;L0Z^JLe zrpGq>FRHbeX1`$@Z__vX|78oW#Wkl3gTbVHljH~r~2D*xk3oWb8*_2L@P)F!9z3^e&)MZDIEQ*Uxa?(#;=LR{m| z-qHGha;N^7q5e5{>W>}je|&hqLBp>XS8M3=hj+u*9@U8pwXWsEx=cUR8ViRtGT(em zCr*5E4Fb=}?GH(#0xAW0Z@oD~-dAtl zBJZg;|3rSD)qYuTen#HUYQL&Czbb#oYPI#|m*fvn%hU6ryM(VdZRfQjVFDQc&ZJ3` z&NVu>v;U>r8|Q3q6t*`OZ)u(K#y=*E2n`$4M>Jv8AFWFR& zv8ncndGb4a_%z+=EPwv~Eb&3PUd2}zRvYe>|6PTM(IArLE^S5@D#Ra&4BB*^EzW}TR&^-aC4 zFIJq`#nAnD7p#h@5;RHA2F3VCy^1Y#hMc)e)lc71xXoGTz5TJK*x6Ew{Jh#OZ>`4> zM2tmD;(zS5Fv8v<`5SMcOx}F?gx4}MuvIrPL@9kdN{KWLhVEK;E5FRK%A2P+@#Y(^xdud_b^FCCNmhp`5VH}l0WHjx_w80uh&C$f zqe4V)$HG}{e$U&XEJ(s2|3U2+7c$~wBvFOR(=nhcZ{Xxyd4t?HSyXoet_0DQa+40; zFpX8=pnfVCBP-zlSxt!VKb9xwE`K~*T3scrMAk=IKA8299=$^vD35Isu2P3xnwg%N zJ`-;Ip=W01WXxYYS9oaIlEo|MtrQ+A$e%lJ(URrDLrZ7Q%;e3e;(zY46^rIRi9@5) zy2eprFLhxja#Xk(vInNR9xw<6u2Or6#PCT#C|T_#rFM3XP}_l4VtA$1#rBsZm#5T? z1E;-Yuz#7O9Mj*em(g;2-($sgyTdK5#d*b9j>)8T4iC#*6|Y%ib-8#}OFP_Rar_93 z>6R^+J6}+DG-2hkMJpBvPb2%K!3{qxrU^_Uy&0%dBfbf?;_T_UQGq3`v^o*@7^z3?SuJ=~-1KuIC5)wcYzWAUGTD zgu<|d3)m%@G?tcI-Rm4{Sr(zV((QPVah}IM(7&}-TXAKXd%7Vhsw+uz%gP`So?c)) zE0)TNoh4SrHOb~gQnFZbl^2(lS)Ed8c`-T|i5QOlByB7^SUF3YyBaB5@X`RCmCB2&B*vB~ zznSW5VWO%{?sZ7>x)B^Q&aofh?2nm|Sm6d(;@99Rwpra((D7oI!|viRL!yw%E1`_5 zt&meWBwLEa07GP5U%bW*U1eG-l{vT#XXaWmW@ZSi$j%VvuE<6uV`lz}p=z|2nLkvE zcJm>bxsSo9(20tQgjIl4ZOP0K7HhNc5@WK|Nm+qjR-ke5QyLLaFk#+9OCOy7)KDfP ztVXBte`gkqDZT2>`_gKojq>BjqOWeBCB;wftc^)crI-7uVjwmvt4SvalS`0@X-_vz z!1+E9NlJ~lh1jb0#P#Z?-Z5CsNbCqCnWb1U2xv){%5oS(Zb;yXTA%}7MQSxOayx2CrcR`AS^9!J|?&W6sh3Ha;0 z2&R=D9JzY;Wy}fYRIzN4If6L0AJ2dg z4&{v^UmtQCkqPAM$1{K&2hR3=n;pn1y|oCN|Nd~k9)2s6dD@E* zJ#fb>f=*mAoWUi-Gn;X~$i3Oj0MoR_2(m7>-Z(@7Bl2mM!{gUJh^d_{6?+9ZpBl^w;ntxBt_0P&10d?+hM~-WkL(xTNoUXW+lQ58S|o zK|R+zq=!#KuOPSxvJ_AwXKch36LIU1&mMPXDC3OF92RXUnFs1w$ebi75&5(Fh(|Cg zng3MpKfC#Xv)*Q0z~mOqu=}UgHm;}*u^Zm7Kb_SZ|MXGgn;$f0{HihdtHv)s%+vpS z<462Gp_bK)_`B)@R-eM_75iCzId8G?mI2;k%ZggO&l`0_FR;l z^4hLujhc$VYGZn>*1svCwq#>M?aJx{6RX1$GveRd>8RaN;@e<~fA8H@wcA(vD{4c3 zS*W(IZ=Tro7qzOP6b%}hX~K$)oi(3JDe)=67bm`(p?hUc@WqsCtD57JHkC~ieD?)k z3@*#iO`0?=_{l}e=T#rVYOSWHR}Tg7~koi9#+f}m#17e{G?FGj9>;l_!zD;q!i zaFF2eBe3U$P92U54W>zTND(;l1f&Q`*gJj|dnc?EN2ye(`w~_5lDm&w5pwpEFInNk z5|=R0q=oEl;3$$yFf2cjEJr(A=fAOu$;^-Eatq@ zb6yQ&G2iMn7AwhICjAX288S)4p32#aU6nH!8yqV^Pec^qC;6TWdXY{Bv3+cN@I()X z+RYB`eRf6}PQUBFGs{)GoWHov;f+s`;^Gslru)WCWSVt-(3wAiz=MgzJRo6ROe`gg zCvlL99ukSilQ6+2`NsKDedB%eO)HV1XJ-~mv@v&wM8}$%tY+NW=d$f{uw)6{*&hY`1s}6CHSZ7Htuw0mkEkZ8 z@*6>rVHGSxwNAto1GrXF?FEpyw6!%+QGdEn5OocQS|@dN1YAZZLtg}7Ths8~E^S;O(t&B2Lh;;!QE6*h zg-hKu=qf5ZA@iRs$lt1lkG(VOQwdrvr*`B%>rRcSpt#s*fa;XdfH+ z1dA!I`iO+z@oe|hVyY}T0m=iC*k>PEgYv^vJUSh_QVoP~U7^MriXJJAEWhP9ED(h8 z#&!N@Aj6d6CbRb<_K{Q@^SfO-_US?^v~kkn`AD8fhSykTMu{-P(ft3x{upLKJ+Po& zSWh3G$OJVA8eXtBra28r2?<3t1pBmCXzdeoZ$@(Ex4jq!tGNJe^p23)3EhZcslT$#Pcnl z6L<*EH+cSv=PI6KSQb1HF1Fx_u8{pQ*{(p5Lb&T$hFzs$!3*2u6H=ZwwUup`GnzR>T;d|W5S;SCK8 zwM#9QPgpslWezVNG;Lr%=d~>6KObv(mY4He+7GaHOUq?mKHj2Ew@7RMd+qm=CYWug zeM!qn4z{%AL0&Fzxxvw_(7*~>I(hq3Ef;wC4B8uS9DoFLjAV0%TAWmi6KX-c@SU)j z9)|Nj0-b^Yl9^yth8sA;lT~rdpvueS9+FL~IEM|2`R+ltj=IeJjEcQ=P=c+uN$`Qs zm;@jAOw~MfUKR*2pJyO<@{Acs5UX^-E4BG=*5QWt5*INJ8MsnAM!wS)X)depx|)&8 zZdrF-T1ol+WEo(auIWB@mCtQ9PZ}|O>!DbY)T1&vaVvX_JQs0BBoEGv1LWyeXJt18 z@5D4gX9@4V;Gfg&Dc4j4m3VSq-t?)D#0>Zcoj7;^Q*JYISY`Hrn4}5Hb(MVISXxeM3d25+V9E(sb!UxME+4`7 zGw8eWXUOyl6#u{0k|6Wl-3q*)2aV+VE)xv&#Z? zYQ7#G2}ku`VIjwog=7zsts5p_eA!q*zHcpu>7Ud#D5%k5v`r8Ya*cp$1cZ+)rk|*4 z!nlMj6INfMn%1TxeU9os50tcZ$@fJ0(JD`hey_AlrRWT~vFF`pk{c%0GNR6qjYSJl zqNMxOCXFUe(Jde*Gs7EDA@VzXRVJDL0B1Yu-sORPp0EeO@9u>fV&-w#cG9M!qO(+Z zj$d4k6><>=?_Y`X5 zc*;IXN?SKvBDDSn*=~Xmd`LUP_6Kjhw3}RK$O!{D%B6)p1hib$k?)j6!l40@Gjmm zeNg%n9G=+7K3{u%`YBu0O2U-gdxS)^Bu@EI zt)x!*=RHCSTArVBa1ZP+M)&I}U+#$!0M$0-Ppl_%*>f{&YU?9iA0q`8dPFtu(5ekLyAfz5|t^SqM4px<6QBu{~oWn zg@7nF%A$%aStT{;Cl675tWF4fJ^r-~I-v*O;*7?C9Pq!nV-oSl6K&J);7J12D$s#W z*0qW;#26@<6oXw|(vbG(?Gu%H>mL%S%F=_R_No>m9|_JVOz8kDG^C;>Ys-2^3ZP!x~VS;PTd*M+(HTVN8QNP~kp z1X~FtwMPe1f@hL=-ATV?z#Z2N04XkLd<>-cpwWU82aOv*N(>rHLDB?`WguyTMk`1Y zf<_xi6NAQbQ%unKq-jymSdCkmcT;1NUb|4AvQU4^LcO}R-mf0S*Tvyh)qtu;Y}pb> zzq#>DYu$%*>P2tRXbk3_@4gZ=o)6|`T|OE#X0--qv$o5);Q64KHNYpFxKJ-F)ZejC zpMs6*3Lu>Sz?QBe z-@nf(Y4y*1I?W->!9s_B(iDOAM41F7S}00_{0U&5h?_wW|GKAxje+zvUN%0`u<5W~ zllB{`N!29@7c*4CXBkBJgu|NN%PK516=uDcZh9MQX`ZCiv;{N)N1y~=lzu}8@#)oV zI!rr+e@@9u2tIOa2040Xt1PB8%61e7ohpvB1pKeR9SSLJH6&$XV|q&CEHd5RDkeM= z@Zb4%sQIae)s^H&*kt~of~T0ZdXRBql#A8Xsx4$dK@*CWwf&5 z2`hEgR98EkZfbKlS(j7ms&%=oRn$^eW-X&`2X$|(aM5a~qugn!%Fq&a3{ZrT;(?Cz z72ZI4o;Tp1_{$LfA-*w0Hp=!G*%li>#ATZ*kRIRYf8szWRM;VlaX0L3e{}OMy5N5| z{`l5sT21eTvl(h)VPPOWmam*`DvUI~mp-Pk;d+pN`|#vzhO>pgV2k^=K7+*gze6Q6 zoGpv7*U~n+|Lc*J;~152@#3(t4^cPvh$+N~!WL}&4(Pvq4Jks|P{OoJhnT?TM3GVE zY=?X;n3F6Ulj{FfzakAhS5iA##EA?<69GBa4mrJaBINYZM9ArMt|tTgPOA1ykc?EgPV#E(<>v|H2fVlw&OY* z^WVHx5isO)RJ0$RN;;G_)o5G$EK>i0qwZJb+1UZpg&WLs%X7zC@L1#74T(kGJ5-Iq z6{^OH$MAS<{*^urq@i6@4bt#V{UlMRu7u1T$U zOs8Wf^GDC&?Zf8GP=$~R=1PleBdxMlIh?h$bYn#|&09k8NM~-EnVIvzJW2}fPuLwE zJGCi*3<8h&OqZ5Kr6U}k7t@Fs9BB(a7kpUN*dcex_Bh!VuOcKYi+NtThA4$wC9d#R ziz~fPhD-@ci;v9WrD`fKVwBTZWp!l%-w-;X)*& zd9#*!v&`PCW!|jiUT;>OH|vMqtQFp@m0pGIQMAP?DAZsWAYd3IUKBR)^n#}kJpJNQ zFG|!Nka~6dLF!|#e%=0)cRr7;P4oe5?~bKE!mTa!GA+gmn@TB)Vw9pJHl)`2=KIoo zxB6~Nz8r>kXtQa5aT8ARdE~0VoEp;F2A8L`iV&O?OR43qB=EqnbIjy}7xVQFW^-X$Ozfd1v-x){a@c#V%EYi{u z5My5$*<1TDJQ8eoLr4O)n_=NV24OOuII}c@yA$^lK|PA8_@yETSBRXh!t0a?F4TMt z?w~pzd_fcVzP>&AGDtx<@-1PRof1$U2-28Oc~3_Ya2dxm~u$}8I=d-V@K z4boZgoCc`}JZDUaLL&H1&jQ~Wl_psbzb@OnOs&6HWHrr=JGW z*9+Ov4mP3f^4@l3hipp2ITY6O_*}v#%n_E<$VOR8P?&fL_8?2cu)pu*rI*2X#eAF< zYO`JohW`IXVc(9382UeDH7Mzaq5-jaJLLC*xvvHCFM&CXH09D50{bPfg#-S_p9w+D zm*5V7s~enOjZz6Y#33s2{)U=wzwjP}C8?ap*Vf^FIBjbHb^(Zq}RL%FkB#MV2|1_A-up`n9wy&`G z5^RA$x+Z!=d`ppRhRZ})1=2UL6*=$?NEcx{GT|afU&7Ww@O%kU0Jh8E34qiM+lRo@ z4boSz9Z$_ykaK~ZtPsP`)6ekp3^doh2)@ha5rAsR6h=2Hkrt0W$lq=U9-uU z$w!;9(eAcX*s0a&bU4}E+Vu2vTC{Xcp7}u<*$}p9wPVK@tPn?Ui|9SJuOYN*i6Rn# zt`xQ640Da#f{K-?nPY{I)b6B-n|3L8K$^nWDYZK{y_q=y-KE6ZCZ#3|#n!44W%xkf&{yDrB)9UvWrHEaJ zcyM>1#h-`vT|4^ANwQezl?^1mx%<^f|1YoCA2Ztj>+AK$j`knDUVq$Zf9u$OZDf75 zupzSie~s-%W!vu!W z<>NZ>P0QqOloE59`fiLB*ZB~|{!pKYQxsqVvxQ^~&~(OPd}i9cGd^v| zeS&Kv?x`D*gt2e3OM=CkQd6JUpa_zG&lo{U5Z8GPDj_@4ck-IPSYcWZo9<70@TfBJ zL+OiWgJS%5Y{h$dj`$aj8~A!r7tdSg9g5Y*E~Lq#_NR)hi@nUn5n>T{f8ldsw5m%) zv$sfG=FJzEd(GqRW_~lG=`*C5KEo{|?m@(U6mM5%6(P_;|uX_qDkV*914XF8#+}V7wtC1%D7t@#ieMs zQY#_1p}hRVYbY*4oUlNc$6S<0*CBPbHH5m9N<%}a@R6>kKG07cWry>PQGpKlCu|Ef z7wu*vp$46u;mGd%FEt>2^&%f8A)9shlKE#qeCZ8-HwiW<8G@o=v{b^`9sbu}31uTE zwBkYDFDzro$54SonN$qurWepVujvDKKQk5kxH%{F!;wDyWDbY&$iWy|0spfNA>~pt zuUxctc@EuBON%kGMAwc)mgs`(gqlq3-f>kp>~wBMRz?=y4R=2@H#c+1szv1PH3h4R z7Z(?-ToSF4y9@IdEzT=gOYUAhcW#!_j8*(!v}Rr2qLt{QI<2LSa(jgfZ#qY{o6UR2 zOxGP+Qs}C%ms2)1#kr}~US45mehP2LX(^kRZm`&&pe|2^8~s~*`AGj7M-^g1^^VH2 z*?$e@$5|PMIX8r2cwali{T933;ihHiJ2|TmF}l&=VL>%ZX{puaQUY!fzZ+?yc;|@P znx%`D5PrLo;x&2emXZfCFc*Ov>&T-Q&t@Mb4Gv!9a@F8U<@BDpS?JQ?v}kjT4FPPl zxX@OJUis8vqcbrUxS`f2lL-oO>RP zS{PN1G7LJ}EgLGWWr%`yZ7tdho91aX5s_gV!hw|tQe~wNbN;y=9qEr)65j%$kl}h$ zXbTi!a8Z4Pq*Ye;Mn@S7a9C>Gj=LD;6*~;Yw#;g?)Kt1>Yc)~1(k!a1M20Al4@NT! zt+Y7Ht&D2a=EQiZg}SONm6cW}t*EkK2SX8uW4|UcmN}evDU_+f$SYE_CK66jLM`sv zYO4zeL_}X>b~sC|S4%7QN5ntUe*>xI3!}VhB5+aZy{=@AK;t>P7XBV;v6oS+#aUTl zbzUvhIFvCzy3BP%TT3F6U5fj6bGj%864@W=aa3C|riAp0w&#sdkXyrL4l9@6Dhr-U zh33pko<|pLz<@NeLyKZht1PvYQ8vmlc6uUKFBeGnMhs%R(bi?eXCKI%JJ~t2q5@)J zZLP~L5t<&V~)-O7+G~-Uc}rF%Sru7DDRE3T zUz8Qt%L;5<^*{s(lu@$y?$viKd0;d!6XwRY`g;bVOCI2N{u3K?Hpq_yb9`OrJgQFX zJ`j_dnw{N(QJEpA9##>OR^Fr+J2UjRq2s8;S>>)SS(7TeNo;Lr;wElYd^}RkoWQ{} z1{y1zN$bp@s#K5$PiP9zU;2nF!>C6JA+m&)$xxI2R`lg??wczf!=%)Ztn;Kk)fu~) z&-v$(YGxw#8)&K!92dt6hr?*wDDHYZy6eH*&E1m|@UQ!VV-|t@elQQAYd)}#L0u?EH$m!0XL4X)=Doq(T4pU7WDHth=nR7t;gD$p_y#d*BToh25I(~g zy$Rwrwm5JX+sYBw7uTZ;`a-d=FqpgP?;o!0M@c_rt@5Im5x8zHWHn|}@-dt8&=&NZ zjD4*PFg?;JV?62V)Jhak7FV%2rIO!5!>+}D>djD3WI#TV%_?-RzHR)7ivm&-9MQI& zehbrioelW)Dann;kfosJfqM*4qVvmUXK`x`1B{EhN6 zj8QMPY*bhk_bhnO+lhY}Jn`t?yZ{~yh9$fRo&-!PZUGPa>6&fe(I6hLf=7#(ybhkE zX7gJaD)jrJfxWSjeE-3Hq0qQYPo!l`a)P(u3M`i}4s~VlRc#$OVd2$#WQ|I$D*Zb_ z9~^_V5|&2RV$uUMA4*O5e3#oybk;97Qg~KQz3gcun z=}?TEv9c>hcB?ROpOQZsTF0yv%hgC(H#IW5T|*>Uytz^K5S^4Ywb6fJ%N=XHt!F|k zp&eeb%Ij!UC(}4}V(n~S%CtKVVK8^ zwLGK?dxq$AStkcDDi<#Y=A)hJiHpRI1r#fm+$ougQE$dO`z-R*ZpY?*<@{_hw9$=D67b*L!7$;JGvp~~jsEXAYgp6x&QHq$j2^N;KP zYapYiN$g|s3FRjU9c&LhifFbYp{B1|f{p^!K8F!^)Qi4^ZdHU~M}}g;A@KF13LQZ8 zIf#!uRa*{w)VZ2Ee8*tl2~0tpz}RbF6a5b+_R6&56ukJKN@OH}O1Yab)dw|~z#V2{ z&!f(~?JIC&xcw{U^kTUFG;?~d@ckF*pe7OAn$6`+ZL<$`&OEL;1cnZr?l1U!iO(1K zbm8+EKA++P_yXPl<~EtYN!SQYz?c4MUF1g29+;z)&(OB#a}YJ{s(@FLhxjq5qpocE7xsSG-a4Ly!uhEs$!vRN&;lTDjn%hlp_^*$K>tP5JzzW+IDg6($EmO*eu)TThyT}0*L)q{pFTUW#XT11S zDSV%q_4lBXKY;>;0gNQZQ%-Qy`AG02&W<@yBZGUCHz$RA*`SzjA9VF7nYqw>_LCzV zJb4WV>)&M@tbdma9bZ=qwj>=2nHJnhbLL}Fr#ux$@v5n z)2ACvAHFIJjbYBINxzgO67T8r?*2UX=NK`Z|MQVuof$W6G>^`QqiT%(5wALR)xsgP zkd#!(0Lzmg=50s-1@)7x!f;>DjjYn!>YCcz?|vKdpD?2JfPFl@aK+jwshg%mH;unn z7<+0;0#MYQIzp07<9gdu#Ux@hM|=4=OziwQoZXV`@8*iGJrz?TELHV4z_|k8>=ss{ zKETMw=UQPgz7vH7O5K3(WFZsvgGv~=;H7I0IiAX#Zb1`alxq-tU~ZfLPh4R7!9Bo) z6SdU!C0deCV3G>^hCV{AI0Pj!6b*^DM-^@)Ylq*8qU4jZTqIAr7;i@oyk~&Y)N-$a9t@(>y)E&Sl}4 z{cwgxV}VZk!6_k(Q!kAUt;T{ZZ+%*S(o!P`(kb!MGyDnYkm98@zx_&zo3f563r zQ3)?oJoV*#>iQFdj=GPA%R73+??vg+F5VF#g|LQWbPn9-uNE;}a`UtU45@QqJ3j^~ zdK+(w;G|%56^P!z<_&O&{4QUuUQ|AivR&R?>rG^Dv5CAHCW2>$OSlZ9*&%&FM{hFIM0Lh2ZeQbp&(*|D)9Zq zOfj#GS|}It&rXPli+QkiN9OG}KEA2(!lzs)pc-Ym%dC%Hbf&w;ok_gs*v;4t_Y4X} zm-13QcTZyXB! zei?7w)HPzvZ`lk4n=wp0GHzAs}h~iU-9;WD%as}41j5QUow)L#B80R>F z2r#R9xQYIZ3l?`(mM#`gE%sDRvst0Ep)mpWS3gKcmuNIUxhnp?&2L%i9# zd<=ueEl%g%zYVUzEG}Qm^WbW2L07=m@!*(w+E*=6?3AtmDsqfCZB2Awi~_c6Fc74M z?b`LoMc9tyXFo0^Dyp*XZ6Jw+98^{AB{5iuo8j6^;#4Fieul&=2{X3sC5hOQIAbTT zq|SJ2FG6nb#R7vZwx`Gjv2pZEpe)kXB=ZKaVkpN_!6JflYEH}fBW%X zN+=;me%pnW`v__J?P;tuAR5Qda~LxE*Si%5}# Y{a|D37@+?r)%#bkTD_)V8JX7jKY2%{4*&oF literal 12727 zcmdsddsI|cn(rx~coaTRy7g!to|78w5<3KeRD+4w8ZF}_qN9R&Vo zLerB+cVdiDqtTXh(w$DsOjD#gvgWQeohXC1p>Fjw+OXEdd`8rwRV=jB@&Odw-`?jG z4m&G}I*WTa$_P4*+{`R+zEa=7wHM)kGL2u)jnsGXvEa>tAx`Q)4LGR3l z&;35HyjdW*p*|w(g!zk=2GiJn$rNi8!*w42@*1Pqg}3}geIOF>KfP^?;MWU=hCk8E z0#)e9NXCeHpYmCR#_G%6&VY=nkhi&rQ9)-sVJTb6VN&42UHYCg?dz{2@dMGBg_xK z116CQlQ39?U^9^t?=g~+;29&|5$Sgfc;L1Hq{IbtUm!&v%q<4uVD4&C5`(#GNJ$Fj zt|i3~%(ap-Dwt~{WppsNBrhhI`*PmgU~UDLGV4HngDGLQDQUJTwRw~O%0RQOSJx%~ z>*he(XZ7crtG|#YT&WA@<_2>vc3uzWUJT}BUi&JTo7o(k&f2bFqKiQ}vsXoAm~9#} z+a!X4&9hDpfLXvM$c8N(SyyvV$_$!vo8@>RSLsZ6ZH7-V#az<`0OzmW+)?QJpEHV@ z{i$0fJH#0%jQCT=i&9rqBvfRe!eq)HMV8SZ9U%UBTY}y|+F36fuQjZ%HziH}qm-0t zOct-C>%^1kg7}RJn|C0ypdhax^FUhO2dGWfI%r~S5mnlQ=UEQhxQ{G}g- z8aLJ~EwdK8tdh07xU@|2l$MqK)aCG4ovSO|ZddvmN4ZpLld2q*lE+b5wpJ=DeaR}h zDk~}+PPb%pI9Zp|;Hq-Dt>sej+O^iTlG`D<*Oj`Y3a6vQSzMlO5SY?KVZrJ^TUrO0 z@U1uCe*=VtLZCNBh~!4>F%esA0E9%&uS8_p&^%_jG|UjZ}z-;t6L&Wgyf zxAQi-{yVW%r7^1E@|A(yn;<>6OCBfWLfL}e??L_tx3MCWMMcb)w8_Z~Csc;xY^8hy zS(1y_C2#tJ>50kY=}m2Gk`o!oXbt30D`oddqbWNgB~o_36ie9yO>Ly~hO@|ilWaW! zvR^0LjUhp{9uj{?_IR=-pev4Sdd7dc2}2#X)N;>;-%GuNelz?%7PajTi}J_5%9RT; zj;i(Z6NEP2rWXwwuPt@6{_uk~~J`&w@w%4=iW`TFipHo4wLr<2c}JQcGVj8kuFz zc@29F!<()PfeV(hV%IvU+*<*7zvT;BL z0W+WKG6+%a2#06wuE(4QTaLdLeD=Niwn#_B9v89cb%GF%$lrP+l>#r^I=RDJA)oTT z9Lh`JEk0qITIwdKWsFwFPM9qbLsS$WDNJA-yw#hKbAVj^e3O0m`tD1)7N(*e zD(t2FKC(nYc?MsOZxZ_MnJtBN6W<85HE~IV_mM4vqK9m~fwW($9ttYZ zaJaRNvTrbbzZqzYD)RKraI2ddpbwsYG7ku3?mjU5+BDmw-_#x_#bLwz(KMl{Eg+v7T3hQO*a2HzKP-W* zW7no8fPFBN|ix!cgO3=*PTbc;QcArNa?17 zK`DjIK^>X91*+^K_XTk>nY$!1Ul2BRPBD!hXWy!=)qj2qDP80_N6H2AoX<-X6UldO z8u`vck;BX?;KwFee2<$_m{!~3Bld);(hoK@NGZObnkJGGoXzaHyTOz!zp<4|kD)YQ z6v%uDPZ-ZNm0%?vVv8sVeA!{z6(Qvs?e9N&>@D&QSPruy-eNM4xfguz+X_O=z5mK; zRMbm_ee#D}DL+D%{wB%~ljRzCs_I~f>|wH93;3UUB}A10a(9yJZ{$2X#3e{bh4|>h z5J0Yw`zo2wfIYpSt`AQL&t-v>bL6>B%6anKAoESM^`I?8yMm-#rv2SV?|+l*U1Yle zd{@YJbx`n&-hkkJ3rx_N0bS$$Z^{jyQ~o)!oM(pdH?o~Y5g=P}GfTHg%cN z$Bg4LOr!DHUy$#N<*@TD%D%{YFENg`;HT0@2YXG=MA`7Y7(wsrjF!}fAh~E9xiMc*EzDC4*=P%Ec{iJg{`R@A({;k zOvZEnJtkt7yNa{bx1go-O(xJ;UEX%Rl+Tw~6c;JfbFa=`IC=&A+j)#gN|@`;wGp~= zeJ3e5_K|XPFWlMtr@nftyQb%Vy~U7HcKGlYKd0<#jd&{;`PfTrEVF^h^1lt~`bDx_ z(l*qPh~o#d9K;Z?on8H=d#ET(h1c$pFGmMNtwKy8dxUKL0eSq}s-b`sI(XeQN&eB> zlz*KpH&m>0{@bUSA&H4{i3+JkBHXPO*sbd;tZUo|nO!IlOS?)pSm9?4f@SWaCl}0@ zme0*!wBl*$vBwuY_QY~&mIBLJogqgAY|U7OZ5T^NRZs2PoRcX6p*vO1j( zC&O(>OG}dq7c5(3d0NsIgcgHg`1mDH$V0nD)YtE;2`!$_RU*(aE}oxtRgc^R$I9Hy zp@QeCwo8fY-{pJ2WG>h7RomC^%@~FAQDRjCZ;weA;PvJH0mW!@6dG+C+9Og@b$dXH z%hQRvI>(5vm8|QN!LH!5pVZ@wpKr9tl|qs(p6xRJN3;L0Z^JLe zrpGq>FRHbeX1`$@Z__vX|78oW#Wkl3gTbVHljH~r~2D*xk3oWb8*_2L@P)F!9z3^e&)MZDIEQ*Uxa?(#;=LR{m| z-qHGha;N^7q5e5{>W>}je|&hqLBp>XS8M3=hj+u*9@U8pwXWsEx=cUR8ViRtGT(em zCr*5E4Fb=}?GH(#0xAW0Z@oD~-dAtl zBJZg;|3rSD)qYuTen#HUYQL&Czbb#oYPI#|m*fvn%hU6ryM(VdZRfQjVFDQc&ZJ3` z&NVu>v;U>r8|Q3q6t*`OZ)u(K#y=*E2n`$4M>Jv8AFWFR& zv8ncndGb4a_%z+=EPwv~Eb&3PUd2}zRvYe>|6PTM(IArLE^S5@D#Ra&4BB*^EzW}TR&^-aC4 zFIJq`#nAnD7p#h@5;RHA2F3VCy^1Y#hMc)e)lc71xXoGTz5TJK*x6Ew{Jh#OZ>`4> zM2tmD;(zS5Fv8v<`5SMcOx}F?gx4}MuvIrPL@9kdN{KWLhVEK;E5FRK%A2P+@#Y(^xdud_b^FCCNmhp`5VH}l0WHjx_w80uh&C$f zqe4V)$HG}{e$U&XEJ(s2|3U2+7c$~wBvFOR(=nhcZ{Xxyd4t?HSyXoet_0DQa+40; zFpX8=pnfVCBP-zlSxt!VKb9xwE`K~*T3scrMAk=IKA8299=$^vD35Isu2P3xnwg%N zJ`-;Ip=W01WXxYYS9oaIlEo|MtrQ+A$e%lJ(URrDLrZ7Q%;e3e;(zY46^rIRi9@5) zy2eprFLhxja#Xk(vInNR9xw<6u2Or6#PCT#C|T_#rFM3XP}_l4VtA$1#rBsZm#5T? z1E;-Yuz#7O9Mj*em(g;2-($sgyTdK5#d*b9j>)8T4iC#*6|Y%ib-8#}OFP_Rar_93 z>6R^+J6}+DG-2hkMJpBvPb2%K!3{qxrU^_Uy&0%dBfbf?;_T_UQGq3`v^o*@7^z3?SuJ=~-1KuIC5)wcYzWAUGTD zgu<|d3)m%@G?tcI-Rm4{Sr(zV((QPVah}IM(7&}-TXAKXd%7Vhsw+uz%gP`So?c)) zE0)TNoh4SrHOb~gQnFZbl^2(lS)Ed8c`-T|i5QOlByB7^SUF3YyBaB5@X`RCmCB2&B*vB~ zznSW5VWO%{?sZ7>x)B^Q&aofh?2nm|Sm6d(;@99Rwpra((D7oI!|viRL!yw%E1`_5 zt&meWBwLEa07GP5U%bW*U1eG-l{vT#XXaWmW@ZSi$j%VvuE<6uV`lz}p=z|2nLkvE zcJm>bxsSo9(20tQgjIl4ZOP0K7HhNc5@WK|Nm+qjR-ke5QyLLaFk#+9OCOy7)KDfP ztVXBte`gkqDZT2>`_gKojq>BjqOWeBCB;wftc^)crI-7uVjwmvt4SvalS`0@X-_vz z!1+E9NlJ~lh1jb0#P#Z?-Z5CsNbCqCnWb1U2xv){%5oS(Zb;yXTA%}7MQSxOayx2CrcR`AS^9!J|?&W6sh3Ha;0 z2&R=D9JzY;Wy}fYRIzN4If6L0AJ2dg z4&{v^UmtQCkqPAM$1{K&2hR3=n;pn1y|oCN|Nd~k9)2s6dD@E* zJ#fb>f=*mAoWUi-Gn;X~$i3Oj0MoR_2(m7>-Z(@7Bl2mM!{gUJh^d_{6?+9ZpBl^w;ntxBt_0P&10d?+hM~-WkL(xTNoUXW+lQ58S|o zK|R+zq=!#KuOPSxvJ_AwXKch36LIU1&mMPXDC3OF92RXUnFs1w$ebi75&5(Fh(|Cg zng3MpKfC#Xv)*Q0z~mOqu=}UgHm;}*u^Zm7Kb_SZ|MXGgn;$f0{HihdtHv)s%+vpS z<462Gp_bK)_`B)@R-eM_75iCzId8G?mI2;k%ZggO&l`0_FR;l z^4hLujhc$VYGZn>*1svCwq#>M?aJx{6RX1$GveRd>8RaN;@e<~fA8H@wcA(vD{4c3 zS*W(IZ=Tro7qzOP6b%}hX~K$)oi(3JDe)=67bm`(p?hUc@WqsCtD57JHkC~ieD?)k z3@*#iO`0?=_{l}e=T#rVYOSWHR}Tg7~koi9#+f}m#17e{G?FGj9>;l_!zD;q!i zaFF2eBe3U$P92U54W>zTND(;l1f&Q`*gJj|dnc?EN2ye(`w~_5lDm&w5pwpEFInNk z5|=R0q=oEl;3$$yFf2cjEJr(A=fAOu$;^-Eatq@ zb6yQ&G2iMn7AwhICjAX288S)4p32#aU6nH!8yqV^Pec^qC;6TWdXY{Bv3+cN@I()X z+RYB`eRf6}PQUBFGs{)GoWHov;f+s`;^Gslru)WCWSVt-(3wAiz=MgzJRo6ROe`gg zCvlL99ukSilQ6+2`NsKDedB%eO)HV1XJ-~mv@v&wM8}$%tY+NW=d$f{uw)6{*&hY`1s}6CHSZ7Htuw0mkEkZ8 z@*6>rVHGSxwNAto1GrXF?FEpyw6!%+QGdEn5OocQS|@dN1YAZZLtg}7Ths8~E^S;O(t&B2Lh;;!QE6*h zg-hKu=qf5ZA@iRs$lt1lkG(VOQwdrvr*`B%>rRcSpt#s*fa;XdfH+ z1dA!I`iO+z@oe|hVyY}T0m=iC*k>PEgYv^vJUSh_QVoP~U7^MriXJJAEWhP9ED(h8 z#&!N@Aj6d6CbRb<_K{Q@^SfO-_US?^v~kkn`AD8fhSykTMu{-P(ft3x{upLKJ+Po& zSWh3G$OJVA8eXtBra28r2?<3t1pBmCXzdeoZ$@(Ex4jq!tGNJe^p23)3EhZcslT$#Pcnl z6L<*EH+cSv=PI6KSQb1HF1Fx_u8{pQ*{(p5Lb&T$hFzs$!3*2u6H=ZwwUup`GnzR>T;d|W5S;SCK8 zwM#9QPgpslWezVNG;Lr%=d~>6KObv(mY4He+7GaHOUq?mKHj2Ew@7RMd+qm=CYWug zeM!qn4z{%AL0&Fzxxvw_(7*~>I(hq3Ef;wC4B8uS9DoFLjAV0%TAWmi6KX-c@SU)j z9)|Nj0-b^Yl9^yth8sA;lT~rdpvueS9+FL~IEM|2`R+ltj=IeJjEcQ=P=c+uN$`Qs zm;@jAOw~MfUKR*2pJyO<@{Acs5UX^-E4BG=*5QWt5*INJ8MsnAM!wS)X)depx|)&8 zZdrF-T1ol+WEo(auIWB@mCtQ9PZ}|O>!DbY)T1&vaVvX_JQs0BBoEGv1LWyeXJt18 z@5D4gX9@4V;Gfg&Dc4j4m3VSq-t?)D#0>Zcoj7;^Q*JYISY`Hrn4}5Hb(MVISXxeM3d25+V9E(sb!UxME+4`7 zGw8eWXUOyl6#u{0k|6Wl-3q*)2aV+VE)xv&#Z? zYQ7#G2}ku`VIjwog=7zsts5p_eA!q*zHcpu>7Ud#D5%k5v`r8Ya*cp$1cZ+)rk|*4 z!nlMj6INfMn%1TxeU9os50tcZ$@fJ0(JD`hey_AlrRWT~vFF`pk{c%0GNR6qjYSJl zqNMxOCXFUe(Jde*Gs7EDA@VzXRVJDL0B1Yu-sORPp0EeO@9u>fV&-w#cG9M!qO(+Z zj$d4k6><>=?_Y`X5 zc*;IXN?SKvBDDSn*=~Xmd`LUP_6Kjhw3}RK$O!{D%B6)p1hib$k?)j6!l40@Gjmm zeNg%n9G=+7K3{u%`YBu0O2U-gdxS)^Bu@EI zt)x!*=RHCSTArVBa1ZP+M)&I}U+#$!0M$0-Ppl7%Q6y9~#@gyQn_Y#Q%Wh8oFg$QAx60FElV;ehCY8%^W6;u>$>}{~>*zS4* z2_Oha2q~wkCys!Ggpg1paVeKpaT>R~?v|2NqE*%W7E6c&R46CJhBq_oI6pmLTRZQ2 z-+OP~oB6ydCvPG(DsLe5NqHTq&&X>?^~tM94ag6W>X)~W%E=Fr_-1FY%kguLDg-%L z-&=|`0_@xDtq-`$E53SQV!CaY7px`cJl_h65wI}3UQ^gs&SyOQ)cKaR$7${HUfP~%#OzzVdVvP2w^!yC@A2vphEjBCbUk{_MYW%J z>r#;Gb^e*ng8-Lv&jahR;Y`{{lQy*J3sIrG+%E7>a$7bGXG(7hb+!F{6BlB zPpPlT+adP2yWQED!2*T5!{e{ zUvRVb?}D4QcLaCXp7XnL`=;NG*mb{~vA_4bL-u9A8?%4)yD59wFV3@x#-L9>CthJ_ zaYV4hDYldIR|i1xqK90H<~_7Y(SnCkK5=2UfVj-OeVilt+IrZp*FOFbc|frsyE_OJ z1fl|c$_)gP1tH2ekbE71;^ZYHUqc`rxrRVZtp?b;0NVjSX`b`0t=(XYzexG#JpNTW z&Y*`rA;@_`AkX9Esq*A?^_EA2u6{$O_x0cFc9WMC==v_v^)9-HS|=;sW!cI@vvaX&M^JN`*-sSIuWb z5_F%DbQnR>-p9jI8R~_lcQs=|#|f#NV^%~W6W}4K1j#WHo|2|a90zxW_Cy<}n&rcp2yPs0p`uI2GC z%mK%fqGy;%g~Cz%MktNXmJM9er%f-Np7s9<&5#p+zCPK-!slq{psP@1mE a5u6=OMI&_9W87mta2Xs&ACDpTyZ!^A>#V{6 literal 0 HcmV?d00001 diff --git a/Source/RomDsk/mk4_cvdu/XM-A0.COM b/Source/RomDsk/mk4_cvdu/XM-A0.COM new file mode 100644 index 0000000000000000000000000000000000000000..6afb31f307de0049afa557d27887f99daabb4d04 GIT binary patch literal 5373 zcma)AeQX=Ym7k@=6~Cn=IkJ`1@=_~A4rS|uN*sIPu$E{?cI8B_>^2Vap{&GJOqdcC zlCmvZVwp6DAO~Dv+#fkKhxU)c==l!FDNW)qFxtT0wFB)Y+gMJes%mgork2}Sv0Jru zKhk2|H?yRy+P&ZwlE^;d0Xk8;{3 zZbPPh;Z<9-C-N~7wxRtHKblTuQ-i4_pOKUDU{;Rb3j)*G-a!8 z83@e1N|!Bi6>DZp8MYBR5Ewfs4<5>l4gX`Ynt4EZ#Rfu4vq!e@1LIlw7IA7MIZo!+ zmSHXfGvvoIA}nQ(zHEo}9A(XY@J0>swb5isif8ztL{iT1*%Y4{l?M|;2|3QE(){39 zIxUZ6`FJ98sC6tOrx9h^n@${-V9FIHB<308^`Q71a}P=x$GNCTT6v~he4aU>-&X-# z{02f4`P^ar#Sy(1hN&b()aul)Rv8mj#;=3T&HT=z((owJB{jq!mXZn3V>Fvcjbua~ zMmK;Gd@P$zZi*58=vxm_TN+5Ev#{#&&hF!P?cB4cw`E6fj4xjqc_hwDRBOUAo*G+m zgnfKhyLcN1B_B$shJj~98U~BRVcl}8l$NDij6HWwL>Ut!JUGTcG6h??LcNENb?$H3 z)73|xvEGM4wbfdcW=kdp(o%Z-7F*AqeE(n)5VrrI%r}te1T73kF&kMm72Pzp8; z{)1r5!LpZcXzGKJroO$gCfL9-@qxc1Zok9JfeT20>p+RC3D%rBlE{KwaA&e@vA!7D z=aq@1p{$(d?}z1O(+L@NrR*%7FzM}A=3webh9?Wiv}Q)7LGX6aeas4%M&p!|2GsfA zdyNgg`nZt~g#Q;C-^0dtJjS=Vg~wUr*Pf}!JT_`PMyp5s02e+u;5om~W5}L`yIA90 zjyNYI$GD(>m2ECv4OE)yV#VKK(+&X=tuzt=Xl#r84ih1dvnoUlsBsne z{+Wf?n%f?E!ivv6x_^n0XG9*+@l#}6onpmb;`cfcf+(cKB19v^DUqPF5WMP#toSR8 z(5fJYENHx3WyLB)Zs}#%Yy77d-XDUj0r4r1Kn?{<#m9-gOP=6$?FZXSBZG2Mv;y_O zMt)R+0Nz+?LXI+?buIK%8N2*oF2m(fw^oHOgFTeTstlW(EHLATZeu?;6?q?%_8V1a zA-y+$z4@t-2i5)I<`M0-uBjs$>&RXChRL6QJt)|f6IIa`SR`Aqs_$f#Ru)o?>Yft5 zF66HCn_Xw=<1y>8Q?u)rojEgfQBY^A?7Ee~iHu|2?ICXj5%rP@i##Ab^2aWyWFp^f`ygg0%j~kJxB5 zVz9J?0!cq;@ZY5CHP+_?oz;0K0w0>|?59oNdgv2`T;xrdSrEXkOAT+~CHms?z}O_{ z-sc34{{fB`=h@l8Bep}*w3_d(?aC)6Hr%R{_$SV|toN!m(bPATGxsR}~683sw-su+tV8gu*yH~m3G^PUt2AI53>9WexBPlDf zl7ax9{_L2XfpiL`sgZT(%rEO}TxJ+<;CQS{vsfNYB;%U~rSwWABUyzXNo7m*4S2yW zyIiI?Z!zp120SqesmiK1r0(*Aso{adh(szOnT)2E4u|+x@DQ7ubs8W07qV`X(T})I zo1SwQ^f8wiBR5QLYxU1uX5|CZECYm>PPxRN;zATF7hNPV(U)k9q!*HdK5|8S$oo8` znt5!xber3>D`T!`4B&}6<}#iP7;71j%2twDPl0shMHhr9%?(}`RB0>!$ff8{Qu`od zr`uZIUMZbTNJ-0%aR5vu19DFwUjTM}+gXb)CXF;T0rsF2<*X97*uVtpDHm+#l=@9~ z^kxWEHfR_S5z9oG$WO6ljz{To!7i<5^#5=J{jta=*oTZb4r_QR{3oEc2#*MNAA3_N zxQR9N&)i=v_n%R~RG;8(@iKl#uk>ttM>*rs>TTuWb;@seQn1>0%F zkjj@lQAVxzL~X>Hm$7wkCBsw)O4I3q)S>S1aHtaW$-y91rQ4&86GCGcAA{#{_)lr9 z%b4>ojCxFVy0kgr>sV;G4trE`oP7k~5K#7amTx38O#|(uX`f$${Az6A#!dUhDX^CY zaG5UW(hoh+wJ?p<&^=KvG^~9nVP%T2ELUFyAwt7t9R3ZaF5~b5-lkW>Z*aJhfr56( z3mfr1rYT16Ahp6vw1b+&3p`R|w5Q}JaneNvJ>dnBr3y%3#La{ za&qtBiGu!#FZ>~?@lRA++I{hg8=GM{s}~5$fE@J`VzH7-5tu_w@@jSH9c4aVc8mq35V^wKd zKARXOl8m{U#l+LZS;?8FIBB|~Z6CwwhBEL{mPeu2YHE>D&%F3zf8CPL2{wU-X^*!3 zm>z=o0ci~IIFbAR08E-4c~Jn>p?cJYzJ~qP1v{j zgS6S>t^LPZ9}R%UbrlO8oO`BDTM8kx?ZN3fwUe7%pDIkOf97H|e>$a+7_Ff}a*VSa zg%pG=KbTBGaMLUYQAltU^M{+<&701^!V4VZLe8a$)8~(K$KPus`vG8zWESN$PW&7{ z_<4~lXz)_di`<-pWrd`pujx=Mej_$pMzS83Dt*OtK1zEpXYoCC|8-*YESI*EqMYJ)SkVWAKIdkN1!c-l=kzKQ z{;4}A(v0uIt%8Q=o*-gn(czpqGvbDA}QaW|uTnAy_QYAOJAfkL4( z9$LT59{mRafIn{q0RH?}0N~FV&pP<4`2Z<;6v=2M%Cq!)&OH5^qlG`iMqQADoRJSs zL7j*kv=Yl%K;t2q06{$+gw!hp0a|xik3M)1K5wv+agK%32bgw0*T<~|h#eGCDwCxd2- z{+*yd0Iue}WcLZ=)S^BgG)@N9SAyfF^J0|udjjgoAOuan_&$Wi`Jm4RK10H!$EaY) z^Tv9(jM?DwmFo9SH2r9Mllpq_7dfGzUkgG&sm0(gG^#Bm`cJWst-lHUW`({Un{K!j zbHbw8sMlda`{&X}o+3H9iS#@Jr%a^-i{E7W>7jxab2ytS-55ROqh6xL)(j pU>uDpl|+qq?JqHuQ7w4%QBJ@NKK{}+B_ynS#D%I9mL^KV(>fBpaf literal 0 HcmV?d00001 diff --git a/Source/RomDsk/mk4_cvdu/XM-A1.COM b/Source/RomDsk/mk4_cvdu/XM-A1.COM new file mode 100644 index 0000000000000000000000000000000000000000..42a67c311fb07b82a40a8bc9e4fa7789b96d9812 GIT binary patch literal 5373 zcma)AeQX=Ym7k@=6+c&6k|SHmSzc;|$f0a~P>EwN9M%$}$gZ5omEFccK9rS6#e^wQ zAt~FkC6@Upf)u#IxIcPm4(%U>(eoXUQ`*F3V6=g~YX{m*wy~T_Rn?#^Q_F3v*sa=g zuT6{fy_qFt)oz0>$laZp_ujmD^FDsF>Pw7@kQ!!GnNc5Q)DWY#&|e3m?qk#^81-pJ z-OQ+4m}yPZu5H^*ZrvAdTp8=pA7-v?>%8)R*S2@AT*;gHqvy1hYukIs_!XOJ(;^Nn zf;0_%=GDb@p&&xr8*;Vnx!MqeL{V(m<}eaf^*1@eu%qyAFjq&OzsANd176pGNBSP> zendFj9&Wi`*dnxrTie@P+rz@6+l0=2(cSG{7YaUwa^a7$*{`p+i8)iyU$vRN%4wUl z1DW>4S8b8r@P|a$ruIX^SUQzW4W*JoCZ3EBW#h4XL4aDKiJ9U2dV$F;yBQ`<@0;31xLx(csBY$74W*$(!ZUdpE*~8m}!HI1A7IA7cIYH*v zR$wjzGvvoI5-eqpzG8><9A(XY@J0>s#j#{cj%9@5L^7TcvMC`m79UCsC*m<7l@^A^ z)9LtVR){4shg!!o@id}Ld((--GEBM3grq!UydIFAXYN5M<2WCYNGs3uNG~ua^!qA+ zOV~t+!k;>fzc?cI!Z4MDh+3Wc)hc7M%J^-dxmoBwDvyj2T~fosVL6!qJ;t($)M!Q$ zV005GAw;w3qZu%tFd|O~ zgK;4>lE{L8-ZE7Go%##u_)r{HTDBF{YOS^U_uk1==7Dv~;ER@nSf&EKI%6@RDGEx# zron#*j5$>H@=ZO@8qS*7&VwI=q058jsQHk>10F_YQc@@ADXO&*ELI z@itG{6&DL^lc)73Sm{Gt(7(Vom#zjXO?9!-AFyeM0Etu@2|qM;g#UnvkSACbq6XBs z3VdH>A-3jshM%^R8CR!S>DTz3PJ|!|DX|362ysdz=qv=U`aUcD z1|zg4h#?CaU#qfW6(YCvGU7G<%M0%hL)L)!jE_PN1xv*yh`mdm;C1Z>+smUv@uXx0 z>VeI|m<$2DxzvOlWjyCv?5#3(`M_L;%cE|u3S9$- z+0=ezi)E($2j$U2;ELcjSqMwZbzsfYp8>1{ZgCAg+D|`vIE?mSpvu*LP!;}{P%>gZQ=i)1l`A!%#D=+PGL7kHH z%MN3wYrZY~6HJ@mcSt|MCZp_f6)K=?;& zBoa1QT0((j05td?()Ak4aiFuh;6&g<^PK~<$!&x_QOt$kfSE-R?7H0WCSIm5oCn6H zK=*zpaQqxNTA+ig2)=;Wib8JVk!HKH)9F-eOX%wsU*PL)y-f)VRrTGsqR|$K)xZw1Oez4(Qhuy1Oa2hjy0s~AzsdQQ8>Cu#x zSV=(uPk(Mao`G}s)3CZs2&VOS4!WOC)1khUD~WB_mly7)@nM^$mEz zF1uW&v|usp9sxWt2C2%bH>BP#7nMhwngDxHigH$oS!`ee^^^;?b6S1T z9l04ql?@sOM8q-?Cj3)und33KT(C>)8T~)qKz}U!5$2E)!yyeXhyDcA7U2=`?qhE# z1vjyV{)zhw<^D4YnCc_kBVERC>6M-xZz*RyTD`42yg|9{HXa9-pAq3CeLd%juwXll z7*hEcPlQqHJrNtR=4EW%Tgfohfzot(Aa$q@d3aO_`s84cs?y`pCJ3Q1f{(%TIQ*wI z)@9857RNj$J5$=6&~+>}T!%d>InF);a0n>-8_PG6nPz}?%Cs*mLw+?j@e`)~;xyPx z1Gr3=bLoek$aiM#N`U1lsbX)TH$O=Pl}%>sdmGQig1;W!1bG+b%i97N$sM0ji0xLS8Qok~l@ zYQ*D4H9Ve7evX77CxR4^5t>3!tS3*Gyq2m#f_peMJ{sF> zp%3Aq-ThYBu1;S~rdLv&g#+vyjUI@dN8%%c5bys$0y$Q|5rklQWxTpvcDR70Nog2eEIux}!h8ne<@L=fLrzQNf=Wrl-__&s=s zH2!`48yuC!x<#eF`mVR(Ci?BlRgUKO#ZrE61{;JHal;gv4u839;vlS19j}IDSYOQq zkduE4PZso#xX}Bg#y?qYY4_PHZfu6-tX&`|19H@lh{Z}SMPLp!$*a}Dx3Gm*EC@(W zab^5McP5iK76)=bT^7d=t3`s^j`K?(jwG2>8csu-P?2{ah?B|F&m{CB&{%ba9IHyx z3faU6kz~x*EG3>H&PvWa#VOMjY5NdPHJZ zKi_eW5O6!}73getOJlvyWv{TI_V%{Mj<&YO`|fXR+zQVJpxqvBYYg89ecRd^w{L~^ zcIW^#YtcaPPz}T;9DT3W1fQ>|BXDWedVi@A!AMKNe=m`E`QW#$#SYZvipCD!=(+W~ z2WfN1TL+G{KIR9F>navIc=v3bwj4xg$AdFU^Q#g}--g`CTir_UefkH6DK_5;8a$t=oiy!0u4 z@Y5n+(BP$@7x{Sy&4B7jo)Q>5L=(%Xmw3prV`pupz=o@_x>Mej_$pMzS83DsWoMaUeTi~*F%bp1{uixiWuknx>e~%|X zdN5xL!pl*tev>cNB{JpmTGOq*gIZq!Ml-)aRx#5D>MYG&Sk(uEKIdkO1!dYt=kzL* zzUezA(v0u;IFjrEV_Q1Y{3jeqC$c0#mu+i(JD96?P3Jc#zx4I+Gj*i$SNb<7ANw%; z?aCFOQO%s^{j(2fhL4%OVdU`heJcg6K0shXH8Zn8@%ycc(C4QW0o55}N%Ap#5%g2Drey^KJLh?<%tYoMug6+|B47X09}~n({+kpitMM?X9WpEpoR@=`uv*E<8&xxpKlnt!23%A*rK zB`mmm)cU4TI^omr3dBRoRsncf9vZO<0o{zXK+`G#pv~4j;?^#4Yrl#D97DkC$$;6S ze=FeggR6Nj**TG%TGST;#>s&C^}vMbyciLD9>01r06{Y#y$fM+KET<)XGoaz8WjwA z-q;A2F&9|5QvJ?}rXTHWQeO}JDkm27YXJx-wHWx7Mzw`R|1sv+`kTOSR_GhC>4sY| zCoY+ddL1UTe=dFGDUy?$M9(vD%2YbA^dd7r4;8eS!`W2n!SJc5e2~y`fWqy{UaT#J z3@8=FnaE9T3GzgPfs5LWY49@mk+JiMJp6Kl3Bw?St!3K3@x+{}1YJfCT^m literal 0 HcmV?d00001 diff --git a/Source/RomDsk/mk4_cvdu/XM5-A0.COM b/Source/RomDsk/mk4_cvdu/XM5-A0.COM new file mode 100644 index 0000000000000000000000000000000000000000..e233bee9221e2d4ef887763f7a41ba60b3d38a7e GIT binary patch literal 3072 zcmeHIZERCj7{0f?ZSN_zY|II0fYWXAvGOrW3{Xa~yS;;ku6NvazygS4l#f`}xeeW* zn={c679bctB$0oZ5dC4}4>Ba6?3Ur~jpxUR12W@}g={fdHq+=(A-VHCw;e_O?LSWL zZO=XD{d(T_Iqz{X%=(fcw0a1UImlt(StA9+8vI_Y1;4SfVmn@e!|Sj=A_Ob&E zV?%SpzIbep!_Ii$Vst?Xv)(<7E-MGvl;<3R`4stypIEmAo{S#RzF~D)d&-hBvF1}tNkf^WJai-H*3 zE;{UGq}oK9E#w!=!dh~RC-t`B36^}xr95X5d159G&U+5^{!q%@S;&zJZumzw{XOgB z$Q7P`O|WSfq85JT$mcgBz_reUv%Jg|WW^1FE|lU@wE zHkcBN4NSTAFkL!U5+(y^Si*+Au)jvcky=p*RtH4`UYT`Pm%d5sG?iMEcTK7xE%?Jr zmPBz~M8rFSp#T>A@=T5*G$myelGRS?_~CZ5&T7Zaz1mfi&aEA=vaopXrimi;6)O)- z-t%;#Jv8|Q0O~!9DnV7Z4_`Gwn1Islt_%CC0BIf^t_n%QRzU5qlH_PGyqUUW$QH99 z9t=ZmYC~dF4Asx1Baj6b5b3gkibh6ml}ei(K8z%-;LUmCwx-tajhLZD#R?0tq;UHhWK_>)NEb^171X z)P<&*?FGt1Gf9F3+I~$2D2X@a6SwlU?z7W zYGrA&?5_bXgat7a5(7X32({948jZRbCV5S{$&IK!2Vt1r)Z2shF3XPjB|S*pIA%UU2e9Ph zyR#G3ZnqmGd!PJl`S#vrOS`8Bb%Cq&WlIX&<{->AoX)lyPK`5fATf|a0~_mB7FnUW zjdg3=vNF*v!AO?$@ShD(hBQT@aSVSzT2!|@oFnqy6nQ_Ph2AW}|G zA709kkTKa3YhQ*VMuJ)$_N5KY%`J)c!$%t0V)2fw!lZR{F_Tj}a=58=Ic7$ZHXEcM zx7ZqMY{hK}+!|}zj~m+Xnu-d%ui@zaWh))_T|%O%ttAm(v6D(PHZ(QH;wx#(R{O2I z)0tY9{N%~B^Q+KX|%JW%HO<1cmS1zOscPTG8|=K|^gFRlmFICwD(rt7KCaS#Tl z%HDiK?I$)D)}|-c1*XQDwIgsJzB%^C#QHZgW8HeU_7T58+07TjYf0PY4;xx6^0aa_rGhUc*EKOBA_$`15r(!CZSEh zNmHp6Dgs2sqe$hCN~ry))ejVkpe1WUv#ZWWPy;AcKO&T<5=tto4Q)Z%^v>GBwEgZM zqg{J;=DyCoXYLd;%=(gHR5^^u9OQEDtd)aeEq*uFhTm9Ku^q3(;dM9=5u{4IOHc&d z)Y#g%FCN?Dax%U*8ADLRtZxrvDCz+=uWQ>UZ4QnX+QOJB#{$DCKT1;z$KI@*|u6p7nF& zGEcuI*mNo!1MErmn~Obi2JMGOQRa8%AaW5{L8h|faqJHP|^-8z*?F9BT# zOo`0_ri%A4JqA`2787V##-_b+pjO0@I#H0SCDDXeW}nq#Y|^_er8e~)i)Km-f$-9$ zQCuGp@eU~z#6m!s$x(!+q>MtcJ4ro1(rGnV{g|~+zhW`CwS#sR7VqA$P^A7M^?}8A zj!yIk7QX;MeP>V=s2a|ZD;5Y7P@ANQ{c1hM9B(v*3avT{clM>2g%Kn{m%2Hm2&<^PsXq|I{=wG3gtYl=mDmApou& zGn3WV^@~>6JnB7(+zj!d;$CKE@4Xf3=T-_pvRanjz`;2)BfHzi`R9Yd?8p0@AHxTj$(@Kg zMXpf-wZMh2AcjI>5NH6QR(VgMv0{cvUR7^!qnh7E7^eI*DlIvU2!Vxx;W75{bm8%k{Jyl)2~RC43*F#1bazJAw8t&yEEpCy=&r+#6$`WY`j-pY=`DH z-m7oR%0#zFku2%qKO3L|X^KP@X>&d8Wh-z*R+I+Q0&OPE@fem{V=a(V%#@!%q@12U zyo@0sbFwAYxg1B#1hu=I%Nko-+Y+74hZ{R$@vf}Gqzdy`o|0>9DoLL5 z-SB2cHQzwS&d3AAkB9k8SL6YH&b{Y4GgeX>SuhvmfZql;}*lBU*m^|(qHhIiS;#_**%P+K||2*@y2{T z!7YS0eUqnmu~rYV9d_T<;PK%L++lJ zNX|QW_brs1EI8ObSquaVAu83M(WX*>5uPy+jqVxEXmpaiIy&f|)|lspz%us{GyP(` M$iRyX{NEY)8wjFS>Hq)$ literal 0 HcmV?d00001 diff --git a/Source/RomDsk/mk4_diskio3/FD.COM b/Source/RomDsk/mk4_diskio3/FD.COM new file mode 100644 index 0000000000000000000000000000000000000000..dcea26ca44b975b9d92b0bc60620a845ea841419 GIT binary patch literal 7974 zcmdTpYjhN4mip5S0`@98<>lX$VOZD*ixjVYnbCGDKC7R^g7V?=rh84zikDh#2eo8G)G8`LN{7NoDYMP{KYq}8+AoG8 z6yp`+RMFF&%AM4XjZ=7|1oYHZ_T9$`|ps##6;wQzXp!!v1(9 zql$^X4u4cCv%#RbWJ-!A6C9vHjxV!iaIkzDdga@(OTLNp$G4Gg_$c%d4aK52h?;Ib zGSv@{{os7^Vn=k-_Z*Llv3pxS@Q+u{dc`0x`odu$IaC`@3)lmrn(|Vnz`q=wc`f z?!U)8g;f4m#zIqmuQB(RM#gJ_Hf#u(yt?Zdok2KCH7nz_GUF%w(C90+d;~40Yh}WB zePyL$cFD?y66Joovb#iPy3O7JN^jIDx44zBOw8Yyy`NGRUC^>TiImx9=1H^nGo%;^ zh1qKMeoX20$S*VPX75LoawA~3n!QH}26hR<6m!;GFy!MVMmDSFTO{UXb3w{KVzNY- zeda<0u?+K)xsb_kH(An5uep#0ESEBYILM|SQZW<`%5Nhf61i$i%I#t2}u&x z-ZSNXYl4|QM#;=hvv&{-6;4ycQknUQ+4~6+MvH{U%-&;^aF%Ko&QUl#nb~Fb4pA1p za7L|rU$9v$aK;~ZZB~ZeO2P%B8QNZVM^|0l_PVy4!J2`(x>EY6412(0{BJSh>ZJ5K z!^m#ADH@A$ZJ}7J$frV*B&HKwMhc}RjfMx6C#R5$iEUzx;4S=0+|wB`EG5%CIl??1 zUD(l}ASQ;|#9||gw(xlE@aa$@l8o~iyaZ5iF6Wc{*bGR-4;)aY{e($7L6@`_sVTo| zDDXG=(R}s1Y3B1dBJI4uZvUKueWk8en+4YAyB1j7TP?6|cUf|s7G*twFB14EfhP!r zZ3xnXRNxaz_?#+C8z)qq6(&52}M)Fw^%l-hZ< zu8VoW=EN<L*qFceQVQ_ofCzWwgER4f1}9(yVDbqV zMwER;7LMa0rmaeU2|=?bt;%8wMh7EP2L)>w=wxAa16?dEP~cux7@`8}S>Xhn%|V!j zUs{z@#0n54R)7u^Izi!T>+&yK3;O&%E8G)VYr&X5Xw5C66s02fmQ@)eP^?6pP|&7= z4i$i?F$;`4sYx2hk;%rnfB{`og7X5mZ75$!!N#3U6{7iTsN95=>7k$rhWa@LGR*5( z%dN07`w6lLhW-oJEBOcoT0r41T*^%@rV*z{y+xRRLq4U=1*5>L1#b3tij+@^l=q4h z*j~eK^~T1#qxN^%C#Z@#T*04F@)0z&1yvu~@@@(kx58iW^FWl9L%0Ls6@=}_N6Fs1 z%q23U)9Lg&9rzmXO%OO87;Uw-g|-qKYfB|#v1p_gZGB3&VE&>-@kUjpigWY01xx>Hr7NS&D<@U1oAJXLK7&!O-t2?JA8IRle=S*<7#yW^?ImPQ|XIu%Y2f3zUAYe6Kz7>+-C=G>ZiCJk=&jra-_J!9?sK!F}BzR6-trD-1XBm;3~xrk5n$I5IfGrZ(2YP(vG z`Xd_qrCxR>97=GaZ_WfmHwz!PmADahcqLwUGydV8Ign23BtY< z_z~c)YyCvhQFP$Zdm&c=x*4Ko6S9EQor(IA{zREA2=1ijz2GutrXf&e52I`*T z)k#{_8j7iCEZNQ_)0{X(A?J6JlorDfNHnHH5M*TFo*;81rpYasNs(#dVS?J!>1oXX zlh}fBNCx5+KGmwu1|LCp4u?*n4>Dvm{D6lYUj2$Ph&E-o>EXZ7!VVjl-kI6Iw=?@^ zdN-6~%#kkZUxFdWZROC6h_eh{1X;O(hF6ai18Om*7E~o6dZ6f}l?70&r4bV=`~SW!-Cdi3y(K`G@goy_yoWz7Y`at zI!vDm)t66=A~~@mEQ%4}3^juP6^CsNzH&U82w}(w4-WX?(Ma*U5|5b+uM8!cMP7vS zn{493tKs2`h-p3&l0ux?LlTxS-I@SvIHVG*aHrv;#>by>PkaKA*t@yKMo8TL8wx5lK*Bu(rP!;=-T)8nK`+d8M&MJ;(q4Dj~RIGFZrfF z{OAq*kw2You-L<;nu~OFMf5`kD8SK~(CgHbIz8yYlafo<D9@jJ@Io)>&Ke z8`d+oVmDi|qGAtgZK-&fHLj`XVNJJH>|^csR=m#A_f=%spv5u~c%Sip;F$ddqpYq{ zuCA7Yr7A66GmU1p97Vo~>3oz*yNJ(Vc>wt?qS-7rBkf%x>sI?HQ)yR`J|0$S%=CUg zQ)$l2&^(u+l~`tBA8DfRY*o+@_<$jUu}*JrSHT6UH5jKiSgQ%MX*x}_)IObdR<(+r zPMfB5Kl33oJS!>O#}4Zq%|bU6yP@1jN(X$Q-Mvq-6+#!bL&G|D*tnamAlAx?yGrO} zNh^SR5!-}dErL4{Yz7ddU;u=7s_`yt{1a@nK;x02t0#o@5HYT0`JdH)!+gaEKV+Me zP<^m#s)NlSf*Q6xn0#&gwJOufZ9QjRs{*EylE4LK;E)WvfjPzqTUd6|G8kR$u$>JW zH4|LI-PrT@+2IFZFdJ}`V1wFvU$rvfl!YI#0l2E+;va*X|FAHM4?y4RhXrMyqi^D{ zz^v6NIR_ygI4tz-JS@m?wfDUR5{lv=_@gKd?@SB>-zaO*foT7dz<1c;HwtfLAFu9j zpht3UhxbE9_<(7@sCh@er@HV){y;VTdCu$Dez>8oD*HtB9N6i%dLUI7W7m7*EL<^@ z8c!GA&Y!L>?8q;4U_5oWI(M}r==j&X!_nWcv959mMFwh=;6$$85iB717Qr_NzD95g z!AS%o2)+OSHVf}F5SH(C2r;&xABQrI#$WHV6?XXCg*SYjn%j}Z>a!t-Vf;=ea+cDj@({Ha16Q6AvlZR z41!SvrvYFHxZlFlg)Ns>3lo2Y;S#U_hvZzQ26BKSYi=hw1YQ0IH4sBTT>~-n zYc&u9Kq}KBCcb|RqX_>>z%;W;RLP@CvttoRO^Hb%*~jQ(B-H2fO$F}gv?+T zq$9`@41Wx(b)OTao;#Jh-6;pnfs;(R&Z6sIQaGL8QA2;3`$-M11X{noCU>6`_`mNg z16(-CEC*)p5Xc4Pz*1d#!`I#YOZvK?edKA^)_=}EkNlHOBTr}Ftogbdiaw;5F9Rk} z`W|7L*6nVeiM~)%hINmwK|glDn|WCIhP z!7gsV3hbONC+w>(C(KXoM^4-xWxkSv&1Y1k>cA*75WX>_O&olDa{v$(>v#?Zp zf5|XLU7{!ds?$kdz$9>|3-bxxuG~Qo5bh`!)^^U5d?=u$Kdw&IEM$xnX zNp##vPu~FJ#hjY7Pe0~)B`>=QW%(+1!I~d+73#;KDvX=lg%D!R zfaPS@X5>;H#dJ5ovTK0Uyt!aFBfB<1*BeXgkO!`SIyap3I+T$2D-G_x67^p*;5&Nd z?RACg>y5*9dD#AYO0F&N`Bm!>uT>G*D9-*(rWHaA(5M_gKNtpjDee>F=v09L|PUj4As-IM>w{Z6MF#5c+v9sJl4<`XwWPC=eU1k!1+X2pFoD%URvEL^mB zNyF0XLXF{w*tCCW4BnAh@D1COUbBbV&Q^>fX-f{2+%C`XQEf_x28NhtJ$ehIhvz)&fkzLPe9m)l1fGZIZ#5kDKX~At$nEoJ2ONtn zd-5kdCxAEiYtMkJM%yG}oj-p*#GqohmBdL&$hxT!llEI0MlX|5)3nfqM7ShM0Zf7% zTAEL#lg$_isR0y3NATNUcqIqv0*s1Cm)O~yIde!pZ(4N60gcer7#d?gU{56z5sa^} zahaHm1OdiV(rPHRz$nOb^X3I1fP+wvhaU#{WK$EbWdOCT-L!n>RBDos#6xN-g5$Yx zxPCdp1q22FCg3j<2GE>}0gPZ(LZ*y_Oc@E8AY24UerV;nm4rt`nM7+GASM%`5R($5 r9sy|%rI0G2Oa}EQ!U$6YVzP+m8j%lvp9O8CSFHY#zsdOPe~tVH;^4NZtLE_avQN7Ys?376dNrHT!80dC1ANO8i*H+v95Qg^-zF~Lp(D8U8;F(6;} zn~`l;a&;g3=LX!bU%&2t{od>MUiZ_v!cR`lZJN)@FFI+jR_<}j>&iS&XysqID>brF z1LVTilXIn>*07is*`7s>i&$^EV?ooBg^QXNiA@Wentbei8y{xl%Q}S^8;+zqA_=y0 z5tlxoYuBf;x`e*#1Kl0^R#~@R-}#YlyFN0g`!jvGp!-xG`c`*J->uVYG-dj3t&v)B z!*BU=R_QwyjKtZP5YMoIzzsPoEZ($F5Hm@h&BP<(itcU}_`{JPVE92T5f;>nLJ(8I z5K<~E3;vHEbe{4F!7xR6yL_pLC;-yxOQd2!kySr$r%y;lT2}*W#0LhlEt%F4u9yACX`*a=W1F=EBqcaM%ydCMR@9L=M&&Jz!AFpQ7YycVW#qf{P!e?CWYY z9+Sm!M}6mM`16b*oi^zBuaK2~8ofr6&+EZ+q=3f%4J8W(`9*`=Y?1=nYpc5H>X^cy zpQeaL6p;f?nlYgxKJP9j^S{&=Tl4SfbAO|!8%)rK4c|9-G%IP1j{lNslPBsV+E4hQ zv8mMZ1+<*4lL+6+*|TM%Q0~qo)9d^50U#Qi*=S=sAOgi4x&&jh@pKe}!t} zuTnTXiGIWA`I<6m`O8Y(v&UjG!DfHaxmg}@$#Ex)X1K5ZzK!+uef6E|z?z}@`f}TG z34Fk$|8Ftk>Lj%qU17J>8i_{P&R{enaLJ%33aL1o7K15KrQt^9$S!1~LZ=WVcn8;x zKAjdqVj{(nEzIH81&;;=Q6bnVlp0aAgTrHoO9kWMM2t)0A%KFnuwK!J&47e`zyW2- zN0`(dbX|Lin)E4#0)MLy%~$rDYCeY}QuhmZ`#B2yN?EOSCRm?)O|ZBRm|)!=GUa+r z@>T-(5_p!t^8|t$f^>oMpP~43RBa!1k0A-&rr*OxA|S0=gLjH_JEp9c2Rz}|1l5h_51Qvw#r#3}-d%KA~ce2;r%`~I;> z6ZC+%7CS{XSed(j%wAU1K^5Rf=BE zXeotr8v}<>(U5<$44i%&BQLFy@2`>MM`|RKv0vUh`=A^$7cabPJ11#1HbUT2O!3m8 zqUO-7O~1|_E>jP;f*ZGGdyV{d8A@EtHk#$bvjIiq7bQf-#{9DDDZrBhBAk&s=imkn zOu`7jzT9QS6b7|AcDa%PIoQqTlL zJx75IeF$s0b~F7uf~c=lYf3tXhIXLpBU?UB0^?Tr3!L(&7%7Mz2)7`( z9~U9McY{M@SfkNsH5wfh8qFkuGeNnf-m=_cvp6luL^K+Sx53@ZsVMh7i{An#k9vzM zhfpe$6uFg_4s2M^8ide@Y$gV9^qctT{m5~&Wb%*VZBVP@SsYyYf@@;l29TRyQQbrftB zT|@G);iR_Nzp$f)hU(z%+E?yjKQB*28yMS$4_FpS)kF>Q8bYrlPZ{5i2nCCI5q=KUBV{JXTV9*nzXz)C9A+Y#ys%-=(m*`MVYs`6{=stc8utWm91XKSyrmfJ$}tu?l|-#XWp zY_ZncI{(P}JzKiV+GtDs(7MEyxyO2&Ex6vg(iVHj+Ge}G*P60*@3d+(&s+DD8>@dm z)}9KuZhgrHL-LG!s@kn3zQ;bb^kzt5i8!wLR6ut5%UxS31-=_SMWtE zEDAH+GC)8-4%t2U)3ZhU7{na^BX@o(E zjR+bEtGR*VQ=BqMt1`i;f<_ZvY$C-9(-g9Qr${Lw1c^jTDhNqN8qNtaM?#96g6Slg zCJrX3Q<C zn47=9Cie(lsc^B9Jm!89DyW_Av`O?6j0f~$?(j6@*`#34F`mr|_9EkfVL@x6gToU) z5=%w}yaHgAOWO=49i~r#%FU-_k*v@i5`-{t23sKhih)~0tQ?EPgP1bHg#$5oBwX69 zBw}Vm?ZJ4PzzMK>6Rm7$HC%jQA;pD*VvtpONWc=NGI6kmMJllhJq<54E*43r@v01l z!?2WTHWo~Es0$kmuVzKKy%HG_{UscVg{SIm;OD@fiHhkdn$RtTrYh(=EV(F4Dl~s- zoBS(V@paqPw`^Aq*e+*nmp-&z{K9tOqHSDHpRc0N&7sHU)1!^_+3(ZeB` zshCx@o1tr~_Ark6s<#;TlB)eoS$ow1#w=F7!|3m+$})xrtNI!1=Bh)Ct*>f;37AZi z{vq0P!ai@DmhY;TZ>^C6c&3yw}nQ1Qev4-foQXSCwPtasA=9vvQRl@axpZ=U4nVaDIm=UeLjo%K%ZYXz<(hgs6_raH#Dt;5TLqiWU zqTkI_5o;y+rfR;IA*}#5BeoO4dIUd4@G}4b3I;%UryC!_#x2-rg2rRR^C$VOkTI@j zxaSsLp>+)ZDASgJ>duYR9c%^>)Ua)5;_Zp|s}1ej_K&?^4NPTael0U}L;`Q1Pt*Kk z3^QdJjIM6P$^`VP2~PfD?D;3m$aWaaHXJ3`ptSbY$de9<|0&~#qZ$tWaX9&p@}qbG z47_ucm;3DllSg^_9*z7jc0&B%C_nJjQC@A%AQq_%kRC_e=&8-xOogfau^- zf0`M2xA<=MrJBKJTOoIo-SaukpP;+0Y2J~~))e2(AFi>T$~D;gjyBgqW zQ(cC6*we|t5i_OnZ1HgZ+nVBz{Bk?yQ~yzuyVV}B|8t(T4>tGK&mKmRp;|dGnY+y% zC?dFu;0l7v2);q^HG%?yGXTJ5eu##&{5?CLVT#%bC_B;km0nA6hu2kn*Xypm7g@|+ z3v%cter&I`1}^0e+5;C6TmZm#F$3GPuh<7RW?#1t{BiaT`#@LrP5VG1yVpL@mOWt4 zy=M=MBlmd(=Man`7)5Xv0H%QbCeBtoD8YE0TlQpO;*Zg692Ve+l>1>Vya5*0Y#?t4 zn*2{|A&34|E#%Pe*Fp~cX)O%kQ#?_x;W~|6a~;67(g9rE4&dr`AeWA*(ePSk9ll6t z^3#04Jd+PnW-tq$BghhrdLkbxE7wJlkNi(>#csBp1wYH177iw`O z(E6>lxkntp|0j+L!1;^x3SefBfLuWGFVj>uU+x)PIpQZ^sHa%ti;e(?$nOOYSiTdPRk|tZ4D-<+U~b3AzxvOc&Bu>3Ng1 zG~Rz~7@jIjvpu_LTCa)k&+l_MY?tuucY_n35qg}tLk_6c!(%j(;EAEfIdtUUs3JN< zn{1vZt7s#Np8Gw~2?vpbS51`QA7}PveRa?uycQ8>RcjaXYwL;^5L^O~TU&==o$P>z z4cLxwV90`-ehb4paBaGi!RoVfp*py1L<>fOLiu@zbbSDTV}ppqb4ML4|K#A(efcNr zdfV#Dai+Fm7xWfXLf=uh88i|Lk!VuiRFqae%|H+I4&*F!T&6cc4WDl5Clt!nY0A$P z%H$M9+N5|Hyp1DffPUct9mnn1FUiD z+xZpF3ieBo$eEqecz}f#nE1c~wdB=ug<4jqr9~~*sO4I<^s1##EzP9V!b_5TpEIBx zhgYRhiRJpohmZMpIq6-_N(z3KIx;kRP}&B@KB^cj!L#)9?!9@*S**xcyNc%gsI$0m z0;>Fk!Bq?*)&^Kka&AU0`5AoW23T=3klHpEbz_oq6Lj5MUXMJm^Xpx(!Rt{%>X(~c z17*s;Ho$irl=|w6D;MfVtkQ_}eM+h;a`{!R-ukMX;F6Rek7dnfPCKb7q*Ja!NOaBX zbm1(+1KDrLVg{UrH7W3AH`r0=5MAKNxQ=qG@(SNW?CWzjbh^lzJn2-Q)Vfi|^A~gF z55P)I{)7umm0YhP4u()=yO8@44vT)3q(5J2`McdC`yZ>%C*{Eb8iHpOgs5H%)gms0g zBtPyh{%GP=cX8{)%kJE(?vdl_lnxIK)4SYS6TAvH>~h0h2TR`Y8f<}ofLm`hZ1#`b za8Be7xYZ4g#g;w!)9%y2oBK!ikfbEpBvEZ_Y=qQP2xUlmlz_)JB~em;Lc^qGDp{J5 zv5>@;BqxB0@N|~qlBq-+=08f_1W6J6bT}hoW zP(iTi2RYaLI>W_yICJDqhB93iAKKNM{w2@x1`Un1|(ysqC@}ChF B%eMdk diff --git a/Source/RomDsk/n8_2312/FD.COM b/Source/RomDsk/n8_2312/FD.COM new file mode 100644 index 0000000000000000000000000000000000000000..0090b8c84c5b0c97ff5b0e1b01b72ac9c39bde69 GIT binary patch literal 7925 zcmdTpZFCz|cB4;g6w8_!JCEKsDetXf}|Mz%v50$X6WUD})l znopX9J>7CPo1A4?O4%N|P_is+3rm2qBtY0$A}u4I=_VxM%gF{q>=uZY#NZ?wK<>S7 zMvjw)o__3~PU8FSyYIgH?tP#4UVT!&UncQU`o~{?@g(^QkT&_oTkdkbPEvtzqy5eag_Y zPruqQ@Tz{TAwHtN+Ymjj|5rog1N}ROp-DYOozwT~Omz2^zvat$7%Ul%r}(6p%JZSn zmHE1DR$tC9O8HEX&!^&2_s|dzJ)-e2VE92T9Tl~TN|3VQ2vTg;w*TV?gJ=C>I7-vL zL4P(biGcL@)7fNL;}K30vU1V@J4FsrffKZ{)TrEJRIWD5A>E}_{l)5gDudx7C2GPhip|C9&A9Py z@>DXVzco~PO8;aiZa1*aW@y8PuNuA7bu6V1zD36rxmjix5PoR%R$JbLmR~i?gzvhB z2IWYztlUP2P8CoqYsp^|0_Gwc^Ds45IqwMph zN))ji`-G{IE3G%0v+RqeN*1tU+z8#FZ``;cFpQn$;4rd3VTAT4jLI*J%CC$_lCXBr zSbWL|GdoJl>^774I4BzYfF_#C>|dF@$B^)0mGFI&ca#pEqGQ1_jpoVh-q0PGB zM{3>su+?ma!+oo3qw>64@wmX6@hvU4u5D@A(lW3Hv>9t@sbx;cum{Y#{}v;zPDV%R z%e&>Ccp||MgcEsD$b=XCBrLzJ#!U7&$ z*wG*$A%+LUY9n^-6Qc24pO6iwqUofN!%F}=w(>s7kIjHY{lEcb)=!wU6LeX7m74LZ ziUNO+AJtdSo2I^i7HQ`NcKiD@>??J((q>qnycrgEl^NFUCUfx{X60K1K2G4f1fC=i zwjuOBP6v+B!T0IPbm{NS%Hw8Owsi0qy&R}}3wM}-1DZbo+Hs&AuhNdwvbtXmn_*#L zAE*-EHY;5gT;O%+-|Q)EtqEi}LW4Uca0BNp(`<~>(JJQv2bWOA zSbDSuHvIsnFpbL6Mp+qXl+C6C$`2ccmBp6I+5OBXvW{X1A=t`Q&c9ZnUYoPwnZo`W z?Q(nBgU50~qw-V@_BdCVXHov40Z>FXRFQqySn^#?0iGfd;f~DA!vh+c1`9ytlVC*Y+M&ziI)Vrc;3Q3OG6Ww`aTVP*gaS) zc3Ie02+{_o-{N|q)J=mF5O|AAX>+kGPLFzvum_M&xyl7r;MD>*`$&~?tV%gprNH)j z-mTu)cy~0vQurIXz6DqCd$fEM6>Ub*hc>;D0mjYn7y2;J%E@8ef$$2#_7mb{?_J>% z8K)>pM^WHwz&B0cY;d0boUXBE(uqVo6@zzI&`_b?I?oEXj`o797f?2zk%U(3GHht; z3Fn|yAO*Reu$A}aQ&}+)53fjweqqr1b!1&M7=|~WM;Qba)>=1NquKr{eFpW3Lm7C% z;c=G2iB>+9miWPRwhuJ(3;$@XSo`NZHs^P9616W|i`I;uhGU{%m^o;y)h!Ej^sV59 z#qCQM@G9QMe~nkK(OfGZ;B)b)2uN24Pwq`Xqv<^8$VbIgE-tMU>~k9DWb~Ylqx7!Z z4q9rd&h{lsk}Fh^D$cj@on8O6(B62gcShvb=lt;;pWdRgRJB~JYPqyM0BWk0HvUQy zmwc(3znrrVWX`gD@ioM9O(v;a+4L`$X{}{zGkUwu4yH?w5Yq!mm`zn?XFFEF^rim; z(^uEtT$`+lJm|#P?CgZu>{`I9*p~@hw(QFmD7(GxC-&$M>K?NXK2-OlU3|3eIlHvG z?nQh2rMh8zPqFSbd;h_@*X@bXx?}dTr*)wkY7xn?cu48hYb_=kzkKoL`m9 zWx=IhjW0meE7r~r6zHwudn_hYn&vIfFc3$UkNQM^!e&*O;T7*w+tqs9AJy0|_po!3 zaEcdw{eJL`5%nef=|y5ca;x=Te_X3)MR2miniAM9`cnR!$iwM`&b|!z5a6n7<3zJ@ zbl%Z(Ay)yq7^0>VvVg;#i~G|4l+Bv)<^2heBSqA{33wuSW||z$Erz#F2x@M9Ab-+l44PZfGcp zGqNItDr%qsPdL2q78?YVGTiC#KiJMqoM!KxSJ-A}@1N)WW*tTsG27@43@(Q1pc#=m z8{GY}(#^p8Mv7O};w`l}r503!tn@QV0~9d^F<*mRT+Cp%35!;@#RDuPHq()H-z~~ZUa~Q z47Zsxy~1tb=vTSBIsNP0Uvk#t+&!FaoZHT^liW_u`2}|`=dsuSh^tvp{{Uxcum3S; z2-QEt8GGs<=IpupM>%Gw{xL3OHctm$V!f|A7W|r3md{n_Mmbcg(z=>v(M;wO$oJuF zK3b(+!lyTHMZQaDR`VL94U@jp4P*?PN@K_v-&DtCXOBCg(wtYId9FaKG0(>_x{16u z=7#ivmsv89Wp=}K16-h5gJE{VN9t(C*)&a4`)t}9DjzeOHcRLMb{{)2KOG$6CUlNi za3vJGp}d}y4*0^mhachUgIR2ch731h*v-`wZDnP;A=uB6RscD~Rw0NX_yYug2p~j* z0fhHrV;?q3*l32vqvKzh4(1^?jB&!f9iOwu*x(=+OGEYUwHF822whOZU3aJVU3g@! zvG=aMlaI^=CJa^Cu|qQK2KE3OT+MMant^rA6Lv0S&{S{*6F72`o7f7*44{>ugW7sy zqcZB0gDEZmS2bMxQ*iSizV8gY7>Dm8D0?%d{K6rR{z!()e9Oe=X^dx|NgG2J2lK@< z>!FXb#}Q0(hku9+p<1Nid$R~b-B!*_DUUlwcLdtFiT#!Rh3_8FjA{iSCcnGcJ#jxC3Gw#+SjuW=#l_)ZTb=N56ddpkI|YGx#!t{g0lHdeNk z<~cBedZn?*Izo;YOM1uX&h;$~f-DxF6*=@5vW_Nu=zMXPBXkbISpdOK zZe(lWyN;2yh3$@!Zxnvu7#S?w?-)rJe(V^D6@KC<{>%}YLherye1c#S!5IXn0btN~ zz$`G8VHxaoZF;T%t8kR%Q?MF`qjI|RttRGNaYGZX1Zuy!so3uX{vM|d@Zce~8<_b+&@Uth zx~RIHpRF6+F|rog%a6J?KU=sT`DdESj~1S8`fME(zeIZ7a$o|X1;R9I*xf!ObH2%j zdk5Q(TpW}?Q62NhmB!qKV_KY-jJd1O;)F4G6&4~L#@vN6uOUpQihWMlNPSM2km4FA z?gyK%regIOz>5kTVat)DY&rKPyWnkBo;q-J9MTfz2JcpuHBhO&rTd*u<~-(kyIq(v z5M9NeI-%MEiDx81Ize=e9U4BPc72I8Gu|8PSrc~s^?&O6hLiMz3?}vn-oU+3Fg3$? zkQpM|RI8mUwKiAIA~+AA*xHPa-Ortn#DIecSBBEyVZVzG9&Bp1gM%u_Q2xv*U;gT& zIpBtP+nQmmr$=|}Ddn5j$69J}a{5pz8=nti*tX`4AcQD|#G@oJ<X`8@IHfR|Hhv0I&(mAZc_)=7j@O<3|H`y4X8ibu|3SbZG3%uzVLN`xmOhGGv`^ z^1M)b&{eUOPP!_V(tcN^;{sHJ7Y@5BVZ>s96(4kML@s4DCb0q9z6zw+#)^LOLDvQt zdVOsR^1v~lbirw!#2)ei#q1ubQUApN-!?37X{lV-VVJPX6ZU_m<>rb|;@#_8>Wd9- zS@rCA-eM7S(^NU%1zcJ@6s}6S7RUVAI(=D04=G~Gj34zL3gp+jkHgQs6Fp=yZ4r!a=+f~hVJX- zp&?=FDEq7%qNI?(Ap%Jj=%-sOR-q4<4|cBZk|^jzsh&qu&p-0T^XNtnr#=(N4P9pX(f zk|!}y8uDpsbfo=4hLOrlgfuHmA<-;}NC1-{JC+qP*>ntp9yM5kNCi}do42*3!4 z42gp+T)2>A>Sjf9JkSVTjh8Xb1NKZh6~$Nz8<&geXb503Bdvr|3xYxd-_{m_U=6}L z0eem)iWUcw_{pHw~x5YvQEh-nFuih#tz8Kg?sCx`M=5ri26F%2Z}E07O< Tbp>f;RIL7yZ)WF%`CQ#y*LC*Ofpx~w*%ftEm|2l@fm+R$pNRM%N{CK^4R8P*tMZy3IBj2<%VHAapYJ~Z}D7<9TbhAzFCT71dx+G{y=xI{RXz(q%>IMkp9A|;e2&eWiXznbeOS=Lc18V z1^3>~o?^Q2&&FbV;U%NA$;fyt(1s0jO zo=}*6v-bl^uSb5F$(p?fD5VLom1ge{!9cIzM-+3^Tr?D7CT6!;Ro@~q&zXy2;Xack z%4{lIM5lv<0Z_M6dB#ciHeq#0>q=HAOj^Hs0&6AnO&E65p zq7Qzd*1el;77Lv3Z@Jbh+uRE00&7MG>Tg|LUq4XaeFJDSQeR(256iFzEc*WzBd$(b zuQQBqmD^+SIM*GH=L9|-7DXYGd zcywV$gMhdY?iQvRv1=C}jb*#|OgI@$CHO2}0@(2?&L{e@8IY(SIH1h<36pk$E^42m zrv0j-z~Ami_0{vHsn4TD+IfN9K1RX5QdcWuf%WONz~Zj7z`EURk^ao0e3!td2>h79 z!vw-Mgx-g!z%UgYql%M-f3YY}Szy^x!C~rJpl;8vwEzb+9|77SpdFf`9in7)zr16C zg@t{fO8CH{EVAM%mjw?3`$1seW|0ULpvox&i)`W44s%L&qj2SF&)D7DPn@v82#D)( zP!xley6q=yB}HAqRssT{^B^tBkyKKQC3C_O&KLGCO=Uzfvx1oE10?3}NTxD^Hfh0+ zsUObKt!6gcoVcZ!PbfX38{Z0sje-$bwgc{)ZH4zPYctAswU;(In z7|dv5Uy_5PxQI!s@@@%1^PgFj77DBb%T%La4Fe(zs~gC%ut0%sHaJ2BdfDJ%IGcxH z7XHzy>?c}4SE2>Tz)puLTy0(9Icrg0*k*-$Vu!V8EbOvM&6M(drBtvgLj+z~g*c(0 zPDLFGfUd?oFy2p1)1V)jY@7=)=!z1Y7r1T11)745JDV!T3Rh6lSu67b1x;Y;7zKTp z-(pQ#WMu{k(hR2G?s}=vMu8L%c)Lq!b}>~rJ?bsOypDW|&jnWC)dDyB8&j0wDayVn z3T&@!ZuQ2-yQ6kT{-3DIdR)Pcl)N7m^`Pjzcf6AZ#trZn`Yh1I%3<7r@Cw5A<6~s+ zUE&fM)#-G4oeq2r_$CRQ3C>cJl+Bh-#pAJL2fVwyhVs=muMKV;?FCmapiC|;@=dlN zHZ-<}!4u+mQjqHjTRC4YnGxc#@Y1;8=dZKff~-wFVR-X7ltEB_jqNU5G_!n)K8^Z> z-ZZ@6@HmU%_*GmoC2~EfOc!Y8=l{*7FBMClEIn76DtpEDsx57x;FuU1(r=o|^a}#b zT}wH>b?*GjI2CW?uHn>cGb~fG8Zdg z`uzWa>8r|aD@#m?eA9`u+0p{Dx$rVh#lBA9f(2iV%A0w$m0v^;0 zymD?uBAWr1`g(i;ro3Y9{6K-;D!#`;T%~E=@-zc+WVxtM@W;z-Dl@#|U23~pkNKk- z`^6r1HWE&9f^WGWd}Bm?aet~wSdQFkz0)7l>KOr??69T;whO+bKPzx>I-#>K4L$_8 z>e@KbObnfO^jyeQfG&oh>4YrcaA#w_ls{Q+OZ#&EILHwrYTr0Kkz%AXh~Wo*zJxyo z&I!~Z==fUSKAF<|dSY=@hzp`H<>YHKq|pe2>ID%r7S*BvbqDe4lq}DM<0=|Y^>C>S zC!D8{(>hJc2oVSwmS(~bPGsR$ATuIl$eou>lS$!WI=a=#$Yp^^=)#C23y}$*&Z)NZ zQFPqUP!eZk1PE2sKm(p|c;8FQA*Ph!PKW=&7Iy3y^U&=4{dVTz+1_tgV05vpd}t#E z7b_~D84;!&?tWQmqv3rc#cOIYq!vfj!dN9MBCR-}SVkjuWtA*lO=Gtu(^z&IyR8bH zFp-7VUj|1)26uq;A5{DAhvHNC12yM^!*M&Uc&cThZed}y)Q68JJfS3FSwx%yZP1mp z%zTsef?SLeZfCtY75j76+pS{XW4&M&w5Gavyx(JqbX>p-A69wlP{E|b^r=vN3zduHQd6qt5WR90I$7-0Pjm#HInDG>IkVOfhTXuH{hA$M&4cW{EcF`ueb%s_{UK{R#QvBq|AgJdG860rtW#I{5bI$p|A8&J zyz&v&+EV#b))=mQj5Wn7H?#Kc$|qQQMdg!h$YPlc>|ngFIWBvPQI^b7%Btm1nMzw! zGlOQf3?tw8Og>7bUBG9s+>Lw}&}^0)khY8THK=2htF%fo#Ktx#T1N(X%5t%HxVmBAdgLqnDwGj3%oiMFz0m=zRR(h8s(v6Tpx zAxI#&0YHcX0|@W=#w0fOV50>Z_m9q*4E927xQyi=XgeqzfkU@C!7l^NM9!){<+XM(F(c3LyAu6E4MhK!mDu3!pBPP1co zgE4(*CFr2G-c+p|bjrcyYyhrmxcDdF=HK_=ad|6@t z*=JLxkkvtd^=v=%QGV+PX4rjyiwvPMq~LoKz)-h|wdjf+AA3)S>zlHD<|Z&UrO{Ko1A*zxl`kemy!YrL&2Ts6}Y zj}_l69IP(hQ}8-4f*P!rsvIH5Zwh9|(5C+Ss!{ARQlo?>rP+>95y4jo&LKF9;3$GG z5R4-@0swRl?qDDg|D_`sV2k=QP`0A-Z9ZG^9-q6o)90zV1zD^<8*&)VB#@gA^p-3nn3Q~Blr@* z2?WOx90Pzs-);*}7YAjq*LBD9d02)043~t}*egrn8p!&MujnFK16`r72BPK%Y9MNU zx(1?VsRj&?@LIiq>rLb`If1Lr30w=Dz_q}MT*FMYE_jf+0do+#!g)Smp2-J6GN=U! z2(koYhhVitCrmweREj#~kU8)+Q=zlyhBg+D6~0?TpOQAz;7XwOt7;_C3H&i}&?S+0JIj~SyvFYsEp^bZ1L;Lt<*M{fv4R4XQEHnl;hsP_IJ+@$_-DA`Szv8+=644IxiS=OMZ?M#@v!`L^_PQ1!Z1Cn2tzE zCv2po6DCCZrW5x=xv!*X^BKX53cSmVN8V$`vj>>VK49dD-TOx&En%th-p4RTU2=Qj zVW*Qmjd|WS7p4q4UD7X{P_2i=Gm;>k(CHf4J9u2}x`VOM-kT~JGj@IJ54yhZB>fpoa0^ZG3%g)nOUYsr5rd<`G!jQV45PYQ@0ePz7aFQxR4)5b2hmu=+Ob3 zQkcwgZUTx5dSqa1)c|J*%~jUB>hJh>&b;B}g56cleF8nC1GVx*h=UfG>rkUs2DNgr zR+ej}O)FPu<@H+W(@MWqT1lygM3J)471B>Y(&)I%@w+ER_Xql2Ouwswf*+dpjvOD9 z?*wJwL54rNX1GVtL`Pt7t7qu43~Us0Pox<0^&`>i|r8)U_VDlvS9-23US2 zkUG{E4JRITt%ITa%j%H_j`@TOPV)rzkasJTdryh_uLJOV2IYbJVq3Fu%r1}FU!~;Q zB44O?_t#fS4!5j&b{uE5^7={Lc$RmMN9MRM^SN=BA^)|B^hv1|&0^M)nCDY{aK2}3 z+k%hUJWBv`1m=6l*(3`|wm2M$3d`(CSXZdZO1GzY zi*$032*3!442gp^G&GP*-Hb?%0~(>L@iNAFz@APeqZmtJ$LML;^jX{3tSCyVlv5rk<1 bF%86XOOX$Lbp>f;RIL7qzv)=(e~tVX`9x<; diff --git a/Source/RomDsk/n8_2511/FD.COM b/Source/RomDsk/n8_2511/FD.COM new file mode 100644 index 0000000000000000000000000000000000000000..0090b8c84c5b0c97ff5b0e1b01b72ac9c39bde69 GIT binary patch literal 7925 zcmdTpZFCz|cB4;g6w8_!JCEKsDetXf}|Mz%v50$X6WUD})l znopX9J>7CPo1A4?O4%N|P_is+3rm2qBtY0$A}u4I=_VxM%gF{q>=uZY#NZ?wK<>S7 zMvjw)o__3~PU8FSyYIgH?tP#4UVT!&UncQU`o~{?@g(^QkT&_oTkdkbPEvtzqy5eag_Y zPruqQ@Tz{TAwHtN+Ymjj|5rog1N}ROp-DYOozwT~Omz2^zvat$7%Ul%r}(6p%JZSn zmHE1DR$tC9O8HEX&!^&2_s|dzJ)-e2VE92T9Tl~TN|3VQ2vTg;w*TV?gJ=C>I7-vL zL4P(biGcL@)7fNL;}K30vU1V@J4FsrffKZ{)TrEJRIWD5A>E}_{l)5gDudx7C2GPhip|C9&A9Py z@>DXVzco~PO8;aiZa1*aW@y8PuNuA7bu6V1zD36rxmjix5PoR%R$JbLmR~i?gzvhB z2IWYztlUP2P8CoqYsp^|0_Gwc^Ds45IqwMph zN))ji`-G{IE3G%0v+RqeN*1tU+z8#FZ``;cFpQn$;4rd3VTAT4jLI*J%CC$_lCXBr zSbWL|GdoJl>^774I4BzYfF_#C>|dF@$B^)0mGFI&ca#pEqGQ1_jpoVh-q0PGB zM{3>su+?ma!+oo3qw>64@wmX6@hvU4u5D@A(lW3Hv>9t@sbx;cum{Y#{}v;zPDV%R z%e&>Ccp||MgcEsD$b=XCBrLzJ#!U7&$ z*wG*$A%+LUY9n^-6Qc24pO6iwqUofN!%F}=w(>s7kIjHY{lEcb)=!wU6LeX7m74LZ ziUNO+AJtdSo2I^i7HQ`NcKiD@>??J((q>qnycrgEl^NFUCUfx{X60K1K2G4f1fC=i zwjuOBP6v+B!T0IPbm{NS%Hw8Owsi0qy&R}}3wM}-1DZbo+Hs&AuhNdwvbtXmn_*#L zAE*-EHY;5gT;O%+-|Q)EtqEi}LW4Uca0BNp(`<~>(JJQv2bWOA zSbDSuHvIsnFpbL6Mp+qXl+C6C$`2ccmBp6I+5OBXvW{X1A=t`Q&c9ZnUYoPwnZo`W z?Q(nBgU50~qw-V@_BdCVXHov40Z>FXRFQqySn^#?0iGfd;f~DA!vh+c1`9ytlVC*Y+M&ziI)Vrc;3Q3OG6Ww`aTVP*gaS) zc3Ie02+{_o-{N|q)J=mF5O|AAX>+kGPLFzvum_M&xyl7r;MD>*`$&~?tV%gprNH)j z-mTu)cy~0vQurIXz6DqCd$fEM6>Ub*hc>;D0mjYn7y2;J%E@8ef$$2#_7mb{?_J>% z8K)>pM^WHwz&B0cY;d0boUXBE(uqVo6@zzI&`_b?I?oEXj`o797f?2zk%U(3GHht; z3Fn|yAO*Reu$A}aQ&}+)53fjweqqr1b!1&M7=|~WM;Qba)>=1NquKr{eFpW3Lm7C% z;c=G2iB>+9miWPRwhuJ(3;$@XSo`NZHs^P9616W|i`I;uhGU{%m^o;y)h!Ej^sV59 z#qCQM@G9QMe~nkK(OfGZ;B)b)2uN24Pwq`Xqv<^8$VbIgE-tMU>~k9DWb~Ylqx7!Z z4q9rd&h{lsk}Fh^D$cj@on8O6(B62gcShvb=lt;;pWdRgRJB~JYPqyM0BWk0HvUQy zmwc(3znrrVWX`gD@ioM9O(v;a+4L`$X{}{zGkUwu4yH?w5Yq!mm`zn?XFFEF^rim; z(^uEtT$`+lJm|#P?CgZu>{`I9*p~@hw(QFmD7(GxC-&$M>K?NXK2-OlU3|3eIlHvG z?nQh2rMh8zPqFSbd;h_@*X@bXx?}dTr*)wkY7xn?cu48hYb_=kzkKoL`m9 zWx=IhjW0meE7r~r6zHwudn_hYn&vIfFc3$UkNQM^!e&*O;T7*w+tqs9AJy0|_po!3 zaEcdw{eJL`5%nef=|y5ca;x=Te_X3)MR2miniAM9`cnR!$iwM`&b|!z5a6n7<3zJ@ zbl%Z(Ay)yq7^0>VvVg;#i~G|4l+Bv)<^2heBSqA{33wuSW||z$Erz#F2x@M9Ab-+l44PZfGcp zGqNItDr%qsPdL2q78?YVGTiC#KiJMqoM!KxSJ-A}@1N)WW*tTsG27@43@(Q1pc#=m z8{GY}(#^p8Mv7O};w`l}r503!tn@QV0~9d^F<*mRT+Cp%35!;@#RDuPHq()H-z~~ZUa~Q z47Zsxy~1tb=vTSBIsNP0Uvk#t+&!FaoZHT^liW_u`2}|`=dsuSh^tvp{{Uxcum3S; z2-QEt8GGs<=IpupM>%Gw{xL3OHctm$V!f|A7W|r3md{n_Mmbcg(z=>v(M;wO$oJuF zK3b(+!lyTHMZQaDR`VL94U@jp4P*?PN@K_v-&DtCXOBCg(wtYId9FaKG0(>_x{16u z=7#ivmsv89Wp=}K16-h5gJE{VN9t(C*)&a4`)t}9DjzeOHcRLMb{{)2KOG$6CUlNi za3vJGp}d}y4*0^mhachUgIR2ch731h*v-`wZDnP;A=uB6RscD~Rw0NX_yYug2p~j* z0fhHrV;?q3*l32vqvKzh4(1^?jB&!f9iOwu*x(=+OGEYUwHF822whOZU3aJVU3g@! zvG=aMlaI^=CJa^Cu|qQK2KE3OT+MMant^rA6Lv0S&{S{*6F72`o7f7*44{>ugW7sy zqcZB0gDEZmS2bMxQ*iSizV8gY7>Dm8D0?%d{K6rR{z!()e9Oe=X^dx|NgG2J2lK@< z>!FXb#}Q0(hku9+p<1Nid$R~b-B!*_DUUlwcLdtFiT#!Rh3_8FjA{iSCcnGcJ#jxC3Gw#+SjuW=#l_)ZTb=N56ddpkI|YGx#!t{g0lHdeNk z<~cBedZn?*Izo;YOM1uX&h;$~f-DxF6*=@5vW_Nu=zMXPBXkbISpdOK zZe(lWyN;2yh3$@!Zxnvu7#S?w?-)rJe(V^D6@KC<{>%}YLherye1c#S!5IXn0btN~ zz$`G8VHxaoZF;T%t8kR%Q?MF`qjI|RttRGNaYGZX1Zuy!so3uX{vM|d@Zce~8<_b+&@Uth zx~RIHpRF6+F|rog%a6J?KU=sT`DdESj~1S8`fME(zeIZ7a$o|X1;R9I*xf!ObH2%j zdk5Q(TpW}?Q62NhmB!qKV_KY-jJd1O;)F4G6&4~L#@vN6uOUpQihWMlNPSM2km4FA z?gyK%regIOz>5kTVat)DY&rKPyWnkBo;q-J9MTfz2JcpuHBhO&rTd*u<~-(kyIq(v z5M9NeI-%MEiDx81Ize=e9U4BPc72I8Gu|8PSrc~s^?&O6hLiMz3?}vn-oU+3Fg3$? zkQpM|RI8mUwKiAIA~+AA*xHPa-Ortn#DIecSBBEyVZVzG9&Bp1gM%u_Q2xv*U;gT& zIpBtP+nQmmr$=|}Ddn5j$69J}a{5pz8=nti*tX`4AcQD|#G@oJ<X`8@IHfR|Hhv0I&(mAZc_)=7j@O<3|H`y4X8ibu|3SbZG3%uzVLN`xmOhGGv`^ z^1M)b&{eUOPP!_V(tcN^;{sHJ7Y@5BVZ>s96(4kML@s4DCb0q9z6zw+#)^LOLDvQt zdVOsR^1v~lbirw!#2)ei#q1ubQUApN-!?37X{lV-VVJPX6ZU_m<>rb|;@#_8>Wd9- zS@rCA-eM7S(^NU%1zcJ@6s}6S7RUVAI(=D04=G~Gj34zL3gp+jkHgQs6Fp=yZ4r!a=+f~hVJX- zp&?=FDEq7%qNI?(Ap%Jj=%-sOR-q4<4|cBZk|^jzsh&qu&p-0T^XNtnr#=(N4P9pX(f zk|!}y8uDpsbfo=4hLOrlgfuHmA<-;}NC1-{JC+qP*>ntp9yM5kNCi}do42*3!4 z42gp+T)2>A>Sjf9JkSVTjh8Xb1NKZh6~$Nz8<&geXb503Bdvr|3xYxd-_{m_U=6}L z0eem)iWUcw_{pHw~x5YvQEh-nFuih#tz8Kg?sCx`M=5ri26F%2Z}E07O< Tbp>f;RIL7yZ)WF%`CQ#y*LC*Ofpx~w*%ftEm|2l@fm+R$pNRM%N{CK^4R8P*tMZy3IBj2<%VHAapYJ~Z}D7<9TbhAzFCT71dx+G{y=xI{RXz(q%>IMkp9A|;e2&eWiXznbeOS=Lc18V z1^3>~o?^Q2&&FbV;U%NA$;fyt(1s0jO zo=}*6v-bl^uSb5F$(p?fD5VLom1ge{!9cIzM-+3^Tr?D7CT6!;Ro@~q&zXy2;Xack z%4{lIM5lv<0Z_M6dB#ciHeq#0>q=HAOj^Hs0&6AnO&E65p zq7Qzd*1el;77Lv3Z@Jbh+uRE00&7MG>Tg|LUq4XaeFJDSQeR(256iFzEc*WzBd$(b zuQQBqmD^+SIM*GH=L9|-7DXYGd zcywV$gMhdY?iQvRv1=C}jb*#|OgI@$CHO2}0@(2?&L{e@8IY(SIH1h<36pk$E^42m zrv0j-z~Ami_0{vHsn4TD+IfN9K1RX5QdcWuf%WONz~Zj7z`EURk^ao0e3!td2>h79 z!vw-Mgx-g!z%UgYql%M-f3YY}Szy^x!C~rJpl;8vwEzb+9|77SpdFf`9in7)zr16C zg@t{fO8CH{EVAM%mjw?3`$1seW|0ULpvox&i)`W44s%L&qj2SF&)D7DPn@v82#D)( zP!xley6q=yB}HAqRssT{^B^tBkyKKQC3C_O&KLGCO=Uzfvx1oE10?3}NTxD^Hfh0+ zsUObKt!6gcoVcZ!PbfX38{Z0sje-$bwgc{)ZH4zPYctAswU;(In z7|dv5Uy_5PxQI!s@@@%1^PgFj77DBb%T%La4Fe(zs~gC%ut0%sHaJ2BdfDJ%IGcxH z7XHzy>?c}4SE2>Tz)puLTy0(9Icrg0*k*-$Vu!V8EbOvM&6M(drBtvgLj+z~g*c(0 zPDLFGfUd?oFy2p1)1V)jY@7=)=!z1Y7r1T11)745JDV!T3Rh6lSu67b1x;Y;7zKTp z-(pQ#WMu{k(hR2G?s}=vMu8L%c)Lq!b}>~rJ?bsOypDW|&jnWC)dDyB8&j0wDayVn z3T&@!ZuQ2-yQ6kT{-3DIdR)Pcl)N7m^`Pjzcf6AZ#trZn`Yh1I%3<7r@Cw5A<6~s+ zUE&fM)#-G4oeq2r_$CRQ3C>cJl+Bh-#pAJL2fVwyhVs=muMKV;?FCmapiC|;@=dlN zHZ-<}!4u+mQjqHjTRC4YnGxc#@Y1;8=dZKff~-wFVR-X7ltEB_jqNU5G_!n)K8^Z> z-ZZ@6@HmU%_*GmoC2~EfOc!Y8=l{*7FBMClEIn76DtpEDsx57x;FuU1(r=o|^a}#b zT}wH>b?*GjI2CW?uHn>cGb~fG8Zdg z`uzWa>8r|aD@#m?eA9`u+0p{Dx$rVh#lBA9f(2iV%A0w$m0v^;0 zymD?uBAWr1`g(i;ro3Y9{6K-;D!#`;T%~E=@-zc+WVxtM@W;z-Dl@#|U23~pkNKk- z`^6r1HWE&9f^WGWd}Bm?aet~wSdQFkz0)7l>KOr??69T;whO+bKPzx>I-#>K4L$_8 z>e@KbObnfO^jyeQfG&oh>4YrcaA#w_ls{Q+OZ#&EILHwrYTr0Kkz%AXh~Wo*zJxyo z&I!~Z==fUSKAF<|dSY=@hzp`H<>YHKq|pe2>ID%r7S*BvbqDe4lq}DM<0=|Y^>C>S zC!D8{(>hJc2oVSwmS(~bPGsR$ATuIl$eou>lS$!WI=a=#$Yp^^=)#C23y}$*&Z)NZ zQFPqUP!eZk1PE2sKm(p|c;8FQA*Ph!PKW=&7Iy3y^U&=4{dVTz+1_tgV05vpd}t#E z7b_~D84;!&?tWQmqv3rc#cOIYq!vfj!dN9MBCR-}SVkjuWtA*lO=Gtu(^z&IyR8bH zFp-7VUj|1)26uq;A5{DAhvHNC12yM^!*M&Uc&cThZed}y)Q68JJfS3FSwx%yZP1mp z%zTsef?SLeZfCtY75j76+pS{XW4&M&w5Gavyx(JqbX>p-A69wlP{E|b^r=vN3zduHQd6qt5WR90I$7-0Pjm#HInDG>IkVOfhTXuH{hA$M&4cW{EcF`ueb%s_{UK{R#QvBq|AgJdG860rtW#I{5bI$p|A8&J zyz&v&+EV#b))=mQj5Wn7H?#Kc$|qQQMdg!h$YPlc>|ngFIWBvPQI^b7%Btm1nMzw! zGlOQf3?tw8Og>7bUBG9s+>Lw}&}^0)khY8THK=2htF%fo#Ktx#T1N(X%5t%HxVmBAdgLqnDwGj3%oiMFz0m=zRR(h8s(v6Tpx zAxI#&0YHcX0|@W=#w0fOV50>Z_m9q*4E927xQyi=XgeqzfkU@C!7l^NM9!){<+XM(F(c3LyAu6E4MhK!mDu3!pBPP1co zgE4(*CFr2G-c+p|bjrcyYyhrmxcDdF=HK_=ad|6@t z*=JLxkkvtd^=v=%QGV+PX4rjyiwvPMq~LoKz)-h|wdjf+AA3)S>zlHD<|Z&UrO{Ko1A*zxl`kemy!YrL&2Ts6}Y zj}_l69IP(hQ}8-4f*P!rsvIH5Zwh9|(5C+Ss!{ARQlo?>rP+>95y4jo&LKF9;3$GG z5R4-@0swRl?qDDg|D_`sV2k=QP`0A-Z9ZG^9-q6o)90zV1zD^<8*&)VB#@gA^p-3nn3Q~Blr@* z2?WOx90Pzs-);*}7YAjq*LBD9d02)043~t}*egrn8p!&MujnFK16`r72BPK%Y9MNU zx(1?VsRj&?@LIiq>rLb`If1Lr30w=Dz_q}MT*FMYE_jf+0do+#!g)Smp2-J6GN=U! z2(koYhhVitCrmweREj#~kU8)+Q=zlyhBg+D6~0?TpOQAz;7XwOt7;_C3H&i}&?S+0JIj~SyvFYsEp^bZ1L;Lt<*M{fv4R4XQEHnl;hsP_IJ+@$_-DA`Szv8+=644IxiS=OMZ?M#@v!`L^_PQ1!Z1Cn2tzE zCv2po6DCCZrW5x=xv!*X^BKX53cSmVN8V$`vj>>VK49dD-TOx&En%th-p4RTU2=Qj zVW*Qmjd|WS7p4q4UD7X{P_2i=Gm;>k(CHf4J9u2}x`VOM-kT~JGj@IJ54yhZB>fpoa0^ZG3%g)nOUYsr5rd<`G!jQV45PYQ@0ePz7aFQxR4)5b2hmu=+Ob3 zQkcwgZUTx5dSqa1)c|J*%~jUB>hJh>&b;B}g56cleF8nC1GVx*h=UfG>rkUs2DNgr zR+ej}O)FPu<@H+W(@MWqT1lygM3J)471B>Y(&)I%@w+ER_Xql2Ouwswf*+dpjvOD9 z?*wJwL54rNX1GVtL`Pt7t7qu43~Us0Pox<0^&`>i|r8)U_VDlvS9-23US2 zkUG{E4JRITt%ITa%j%H_j`@TOPV)rzkasJTdryh_uLJOV2IYbJVq3Fu%r1}FU!~;Q zB44O?_t#fS4!5j&b{uE5^7={Lc$RmMN9MRM^SN=BA^)|B^hv1|&0^M)nCDY{aK2}3 z+k%hUJWBv`1m=6l*(3`|wm2M$3d`(CSXZdZO1GzY zi*$032*3!442gp^G&GP*-Hb?%0~(>L@iNAFz@APeqZmtJ$LML;^jX{3tSCyVlv5rk<1 bF%86XOOX$Lbp>f;RIL7qzv)=(e~tVX`9x<; diff --git a/Source/RomDsk/n8vem_dide/FDTST.COM b/Source/RomDsk/n8vem_dide/FDTST.COM deleted file mode 100644 index a393b91614f246d9d321da4bb17c259022ffa174..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7988 zcmdTpZFCdYmHL)Owk6HjNR}nR2+#INPE2h9flfd{mc~NI`a&AnCM=N6$tGz-OMn#f z;Tq_s*=@F)-CDgyW72nNjnvYc zeoL0H%FwAuBF(0Rbb$?rZ^~I?4djD@Sjh5hA)OGHc6YPDA4^04!w+hin4ne^f|!d$ zky2xA{y%;&crGYJViXnV3g!}`07!cy%0Hj@<-nKTP%nB{7$c{G;G!Khpp4#~BX@wiSh z43~g05|L!$PC=E;#jcIR;W#*(oY0*RIap?NfDg3%rzT93a>Wfe6>7WVPuz@%DHOpv?j{hAMmn|NNZYBKC z*iva3hL&=JMEI7~)ycIUN#1UjciH8a%@W;b^nXf$}R4~v-jf(mv zk$%ls7E6yAOfmX(V>yOcp5A9H=SzP|Ih>04D~hMyS}lpud#D2XfxQ@SnW6| zfe)Cp|1Cybovc=)8{H$dCz46FGmh8fEdJPKw?4Q zfHD^(OzIB0p}j)Q1{FntzdeZREBj4VpF@k({Q}-TPJv%3tF^`i>vN9@7WW$_ShojF z#my#p8-c$h@GOB71cDnv?-43=hT_Mm@>FS$N&ck?mMz1dp_Tx3|G;-mzyZydfHnfO zkqT{uk`#YAWrBqTKTsrmVv^$)T;*#1G_aor_Sa2CLItRBO28tSSfxYAdtIn5vtI`=z@QZ$nm6X}9*2OEe4+cG(k%&Z{hRsxa; z#?zUcpiUZpmip7LXx7uuTixhV^m$54Yex5gVPjy#1||;Y&C8|7%%Keop~0CF+QIm* zQuO_dmQpx-7&wH=hSCdWaQYrbZgt9?PD$=@N+#nW`Ng_^xy@3(aL_R!X*CW);8RTb z(pzQCTUA?L7cvr6ZQ&5=uT=Tl}>} z{+z%>9pZ$7I+Zmj0J`c2fbnr^ng;#IWaC_bLG#TxFL2sMN?r;aw}~nzO7p3rnWFnC zXaZBmDdvwq(i z%dM!;r_q4WorN15E@v^4yp>I7M7ArF>j2Gy+$+|as=KOwQDv!KRejj{t~INpV4LWg zvPTTn+C`z3jy9H?KX2h&R>7Ouud&KWnZK0{v3ZEh09o9^l5-Q#Sf&6vvN0i@PlzkI z*;Ri~mDMp?Mx*nrJ7THUw9Z?wAl0UbRB*PLZC(6d3tgUwFP|2b;bIu9#g`ojN#>FcUDRi`Q8@?G1a^ z0h??WinjOc;!)cPd*VaeDSP{GZJ*j#jM*ma$*Z<6?8|L-vm@%a(~fkry}^-PYM<@s z6zp>y`J6rI$aL9T9EG*^1&+x5_S+q)b@n#Log3{bM|ZDXqxlQ_^VP;#|2fW{4#zQm zjAl|PxKOW)%Gp(^d=5hD)p!F`qGEObK!MRJ-p4{xp{ddGGy@4_*;qgbCTpw;Gu+}G zO1n}|1Y;`ujS+S}8cDN4U_}sOV?+bVVCJjB3glMm%YzBEo)aL*hFqoc<%K{xm={>s zozOXug%|=tb+t8?OJMMhkqbErFvJj4osb0r?tCJU38rhT*+3zf1UX_<>6?TrQj9L= zG5x?VkP2oXIDxuCz-i105XrNFJ3;L)jrP+SHPR<@5EGJuC{)6Jb!No9?L(@s-K}=Rs54hCf#&^{~#wo!m5C8cLGklJIXZFC) z?DVnO{vI3V8=W;LnlRnC&j!ti_-f!bkmNNExba9aq!gbkMNJ(c`k~n9kQYL6zXP#E zom3PZ*lqPRwqY9kULA&I8yScPBnT}e2oOmBlS=;yD9p2nnt2F89&yOGJ0+rSsnc2P z!Rr(*Rg%N>kT5|VwAUfgI~hO7#k}DW#=l9y{+#hYq+mZ}{9qQeW;!@L@e`?RQot(! zR=KjxVA5gw6sX*KN(RXa-BCe^0cWHQVy_gqHN?rOL^^`$B3w8Se*gLNGt|RnP*dx zT!*@_k=ROBgxf1q5Yb;^(Nt`@9tS@M{z6jBPt$~MAv#?_-(kr`SrMUm!ZGzDM|rp7 zix(VM_c^W{a9old7f(4Zj5{XFj`KEp!cC9+>9HVv?l$^t2mRSDd# zH+(ZMeT)Qt&!0w9T^Zp<$rU<=A=)7w6cFT0X*J4Dotg09PARUbFAlkiE9;9@^$6kr zDOa(zf<_YxgmhOzkU-er@dm#&BQlLB{@2ZIN+ot$l+Dn@m%o4{869YwkH( zUOh{0a!TQ9g|@PO2F++XiF{QvX_P{{j!$RWfqd7|tfsX{J4MD|l`(1*S}T$FeT7EP z9Ct*axo<-A-GpW~&A~C&5P278g>|8iXkv_IW&=A54p6m0KeM6QNtg{YX{x67nY4?F zR*spp8A1=yzoCccWcaPju+|mlw?VN7%I&0d!57)n{}fZpZ^CwH*uV_y_b|0YTS;bT z@f#V^3g98cdJ)`@-~j~R0T8CZ0K$8%aUC{(8yii~czoz9Q~YMg7Vl@cCt9x3U(oy( zCZ2)nuJzXj*a}@xLhr83fy@1~49k1>kN3|4CbKzol^#4Qfj7{@G~dTC)0%;G4a0UO ztXEa=@ZZFdzr_si0AqU4O3*=R-Q|=U8YF%_6M~}}4*p3v`H$T?1~VZD;zq$AanPbh!5UxfF-ZxoHep8G|BfsT3(G*HE z!w1U;2X;G8+~OE523-E%(ELYq*LBT1ONX50gQa6m$LV6TtMAw?jk5;+(b)tZ|DX?^ z>$1#7{|W|*WU&OS z$f3Ku$yIL;Un;)t3SUHU0RW$44(}NFx$E%yf#+O@?;F_TI@~qzlIw70;1$>5_`t7R z#W!8yN#s6{U;@E7f-wZ=0ALz;$iz9y{Sw&g*|v88R^d3!reQUXO2xJH@D4b->g(hk zK~w6fhdlcEddQ=tddQ;(>%o9QJXx>f`V6_2xq)ky8@M*Pfoqc+xxS#C8vZK17GEVa zrE7e^Jd+R7W>5>BB*+pB|2wSK6KK-f^+`WIe6~ zYTs91e8LU<-*eXh&X3beftfuD{lZdcvBq}GmCYxb4zGvy(WgDzUmSP|`KOykpB^|; ze`PZi?<3u|1eieR$AoFduzLaq$EErj^c`%Uyf!F%vNGm-Fy@Un+4c45VJjN#Mvda` z>onRuaJL&Y+CA`fq=QDgal~&Erjg>KZg8_l-7sCnzj33t)CA0BYd|mOouNs3GDZm2fGLp74%`Qc&D z;L-jurR#^Z$>HBsOB=DPt>MP5vl>W0c=5y@{0?T{K&%1AgO?=Y#A@wg>4Apw1q7D> z6d!27us(`~#P#S1?co8S+27rR!&IY6{JPAjQ9~0X$*qMAOTq zA2;;G8>?}09!072pUnX=^ty(vAcQD|#5(nfMQP>J3|LM-hMc1v7w9ce!uHmoKl#~8g>#2n`5wV_^v)y7oI1- zLpmf2-os|)UmWnA{Ze0Jd0C5o*e(s*-=L(1GFMvb?P;tn=Dm^<_pz+S!fB^8qxrkM zqtUy)bMNuuEW>-5L>4pY8C`W3xUUcN811;*3%-l%D2vLY{KG`QA9$MX@sc(9u}6Jj zyBGWTpPnNh2Q4+Fb6!yOeQ&YXi?omzMZNq%uXlfG#QScq7rOUI-QC>eaeB-PIaHWq z5P?TEShI@Xj7cr6q4^6I-nMA**CK7vn9zP`XcBIcIq(hJGyYm1)yLG1A!$Z+uwU8& z61T#i1d812i-RQ%U_!0qLUBEsMZZWgqEEH_2H)_@i%#|W?f}dc+TbI5lPn~0ao7|# z)9fi&SEx$z4}Il7y8NQAy#4YXU-3oX@JV$_hX#k}y*{l89*LXw`rz7wC2x8Ow!l8P z09V5PKIMb`T`c+3J&nb-y`|56XMnf(if>R-@@|s5&YL$6vQZ&gAQ@8z-rtnmN&Q6) z^O))UX+{!5a$Sko$Xzjg;63H9=vP87R^E#pbL|7?QC~;-PrwMIu$E1QQjmPHNg~6 z%RU&5Klo^j59$m0O7sC^Afa0!nJGg;n#SN#N`W1q0cA05(wC{{-kDvtLK98g&7OPC zJ?DJqcV=yex8p(SlSmBNVJ;Q`;%>3_1YFtL7jU;)ZwB0L)~5k?yY)lB?Y3?P+@!Uc zcXwDDd3UF^i+5FPh<8)gQQqBcUF6+&fQ$)&comI*0l+?c-eaXWVqxNcA^V94rLRTg z%gEjz2D{~yNeZ%zQtEjK;1y(d1l`3-Eg(JOssB5`W(x2$-vVGy(In&C28r9SdbRzb z;7Kt~xrK(s_DYIxvU%D8>2ohO;k*j%wF0oy$W8`Hz&n-8s0WnuoLj2A!F;}M@c}ES zWPiBn*x@^N1eGh`c!fGfE5~?d*ot+GVV&}@VjPT=@bjU0Jl{KCma7Qtrx4-g8AOnL z6_F#dgGgAufk;ihg~&7VEFz+O4Uw{Z9hpiMO(-VG$d}OAb3vl{XWl#Moau0(JMNno6_4}FxV^QI$ByMJQz?jYz$D?1fZ>zUt>2lWPclm?l^%;2kXGO5bHoS zIowVgP+cm{E)^HGYo}13NcvYlwOnz_ ze0U zl(qOnp`GJ&V)^{#Yk*bZN%HB zb`j6PTE$k)j5x23V4iHU7lii1Cvo__Q`SjA#5ciX>|?<^lO2zEUuWgnE?3#XpN)X& z!6nkDIY%(u*5MT4BvB@unX6687m;+)Tfhr5^-=SEi2s3?gBjx{?OenaJD+mf@Z*PE zuJi7*BH@M^78Jf9teqZiUvbFIHB>VTcFf(dS!h3xW{NCCJ_x1rl$MHxO z`0}VZ((d+l1)Y^9$1s@uGvp0eVbiNPmrEiISzF5+9);X*d(ptI!1_FNQ-mK@= Xv*#_qqjlxQBjHfZ!2Sb>|L4!&>V7fY diff --git a/Source/RomDsk/n8vem_diskio/FDTST.COM b/Source/RomDsk/n8vem_diskio/FDTST.COM deleted file mode 100644 index 168e91121389e19efa1d8b7da54fd005ee22821d..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7928 zcmdTpYjhjsm3mtvKQuFTEX$JcD4vs*3{Gt2$%Lp@q_M49uSg@?A+UrNQUWO{l*Tau zlXSaV&MvU+wrA5_c28O8!h!8s0!<*{Q4$Sa7`ekHKp;yF(DY!FI4Fq&PSODK-uuni zani77AN{kF_eJG9pKEGA*QBoZFae|5?NhI-@PFT^-s`I|s8$1z zOIx06QZ{wQq@2WUS~!0p7s&Orwl8j5*uGF|Z)6!6y$4M9nB#{`51C`*ro-mw8Pmt+{wb5eU@_;7R%*p%ziY1H zw1Jb6c#2DksXP}BUzW4l5y%BaDW4Izd@3%j=b5s=PcI-870oc;xRgJL$`xf)pGK~RueneXfrvs54!%qKI` zwa!?S3q*s-SWfFE2Ks|>soDW1bLor}Pp3FQ!yI4j$f2=(7Dna!a7ezBjK}wqVfZ+V z5sxI|*NVDqK6YUo9>>Aic`|)#VjVP_7&54Suu3 z{in^n$KlU^66uW5B#a>|b3bkwMV&Ciwo$@{&?l6-(xU#@|82iC(Px};y$yy-OT)n4cf3_nZi?KBnhk2mt4>*%pIiMU%4P`LR-};< zurmK_^`AhBl~9;%R{t1fG$OykTyOP%M5zk^yT$4sB^c->d_pn5x0X%CoQ3&!tERq9 zVqUVArQ!n?TZ}1K%Q3`q%r0v=SNws+mStYEma~A#y%y*WeS0mNLvLVbMR)_*cUho) zmqmTiqW;E$BnfNpTjUokFtbM~g?Z5G9|uK+GZfKOVSZxuA49^~X~NH}{-c!ed#Xz~ zPoa4V^OV(poU$2(b6VZM(_yp0Nnh_7RCjw-&I8tr4mGda*xWqS+LZCk*uWC@SyVK6mki%S4$+W0hW zoKm#?@>?4$EbIeK!kA4J?YPQS!cky93hV`&OsD`gP6b#L8>e+>s~AS%>Js1BeS1!S zVS^D6H{zfu1}jZ_PS;hG4aK?&5D1<3(XtXvr=)l)FMf>+M1m{RS&7W7C}mdz5)XEz z(pgcTG@(TOaGqf!v(w?mEybLsjEteQ0}ML}MyzMM;J(>ie4rw+bZBdZ4M)l|KrUR$r&ti$S4b^Fu~d-=>>`cuVdpb0?`+48y9 z%ZAr0H$PKQEA-3l6(1hU<@M?d71-l!;YzzI*8z&ikEf9$HWn9ON&y}jh;T>duD}Bt zo&pO%`rlemcecJ)XFK?|SR)#Vge2bO6@!5W5cWnpzgx3RE5p$)8XoC@8} z3KMWP$6*#8wX4U87SNSw0Wz@D1cj?@D86Jb8;b=y+!L?c%jV)6c3GfQrB;61u1*jb zsY9GlP^Yp11wdDG0T>^oW@yllOg7F17}Q>Y^8&YRq}WKo#tl&Ac(I+5trYVL1x;Y; zDGK^9!&s9=J2OHM0ZhNe^L+8^6i5Mqw|LYx4^xNJqunCRo5-gIJYWT0EpW3Rnx-6^ zro2B*f$g>1tKHamcQpRG@C&N88CURcDdiw4>O;{7?tUi&j9cI@JRTBRC4xH;UP0J? ze4OmP%UmL(27|$9Fo3TC-xPtfLA8T-tZ>}o*y>;$UPmUKNW@cJ@c!~T$_E?^9dP^T zFS&LRW%C({k2n(8(ApUR--zQ$L9Qum6h&K~Vk& zj=y%qva6=)GiX5U&%jF#kF*p?T*al*64#f`_JC$Vey^jpa$V&Ml{Hm2RvmC0a%4;t z92ZkdX20ce0d3gscK$T#^f|Q!F1^n zVtObEv#H5!pN|zVeewUm^gF8ttCG_q_q%a6+uLC_m(Arg?5hMWUHVlEl>K?lE@$i) zH7_~)o~eQ49@dMzb8byCmj&1QdVC3{y<`3SK!IK>zRO}lqv>Ar3rJi;!8cA_tU{w%&WJCjrV0wYL3c0mJd^I6Cp@!H}x}T@6v!30c7L&cy@iV5-`Y3FLzbkRwI4z6p3L zrD(T+VF-SKWH1d*3e+L^_(~r?mDc@xVsT7Nh>|$%?CUe6(+Gp+4G}aR)1v`x2l3jJ ztjb3c8k$J=ap^24UZ9ZEIz!5eQ3xGYW+M<*O=YUD< z!N?;A5elElYqs+-bl}iX5^rQh2wAj%1DWh!vD!+)WR9W$LUF+aJYu-(aQ zzrufS4aOPQRUcl0VaB&>fB})_YIp?{wU>sMjuh`}#e`N^>j=>e#jUj33dLF)u}GaF zCur=JpTXA8VE5LcJ9aAzet-flg#wNN>Hn_Q|2Py=@CS;n1lMDTRu|SQy28a&y?iY` zr0|@Q=w&%^5cFa1q7`N{>j%jgF$}T(+cfOYSpNnM`%BgjhCyq(hsQfUp3Edfy!2tE zrw_ld+k4mngxR&*c+RZiXiIi_w`1?jMdkjng6w_tR5pn`IKQ!yO{|;b80?wGRmCDGo_oEPX?Lef5E^b zf5|udxkn%1kNg=7k57+qspM%oIv~bT6BOXyOc@Q@X`LPF;AxRN8syhp^700`L?9rq zy5!mhq-g(v;o|@QUvCN9F#BV+s>uG7wZ6-4XQ}tuzh_Oy*?(jmXV^#B>N5Kn%T(4r z&bsSspJaW3+F!C2%WI!z?OnCcvgW?pU99DX+TE;kL+y(!eMjxD*|5zv6?&WTzvh~I zlu`3@)VcLaxJsifZD!=#S8!YvN*)p4^YwDa$ zJE>_!&!){1I?TMoj5Vc&JJ>O!t4p{OiXBjXmy|B}B0Kgy!qy76VLLReXUEJt*jl2k zqBhJCZe>X;fDMSxR&LA)b<54 z$q3(JyV6kIw(-IMgU|&f+_NqH^7%b;EZz6)IlX5NFjZ89K4Xp?P+&JOA27lumYvZI ztZN)|vSG8Xf=9R+M_$K{-3P{OL@PlDt@WGr>IZH`_!b+2s~WEUNx1vp5+)SpCWHEn z3txhf*WMCFe)yK4z-2!25b&rkx(NOT^26KGjRCI6+6?MbuER@0o$T1&^4`Lq*B@R= zmt=>_{|+M@Wcn^@-dcR3zPz`%tDYX0ovxv`mNw5RJW$^PdwY=&QgYqwo&Gorm&%O9 zQ|0}|59-TXi+&fzP5bKQI#<~BLec6vymX+sZWOy5X;8yc@)fRd8NrtbzCiFff|CeN zASfaD1OVtPyv;!P{iI9iX3NI&P{vXDj)0@QHQ+7p4fq;vMizU(fgGmuc~^rod`^Dc z6+VmL3;^Nl?8tqE`&}a&3lF+RzE$`e*GOMsyK5v}_y^ZWSK*&r@{_LcByxX-;8O&r z5lkRB1pq_6VH;1E_rU}0^4$Ha0!;ithD*T$98ly)1LXQjYi=aD0z+|i1H{TdYJgbz zUm74*mK(qT886U_xb`EL#SL6dZs1z#2Ck)U&44VZZ_6ff`r^K3o{jX^C) zJCG$9`z@@N?v-I;#hnI|Og!a;-o-NN7wj=*cQ|Zydvkjkbf?^NSYpww%5IRhl zW(~U|V4=@7RO8;k_IED~%6&LJ=G&JW^D!K=(tXjGj}_**Va&%0tw@J4A48c}6Q)n( zlp8iu$_*1Df5VOYp*m1eb_C4eF@;J@DSCn_WKzRlQZ|6na+#jbDuLD&CqlYWr5 z#2&%``+ULP2;)IMh-_26cDA^nv3v%>IRNs4Ms(qR>4ww=97MPrRF{vrA6+@v)J&X( zD#%dpa4VO-?`RG<9R9XOSnH|7OLiCg8wa|Yt8j8sD3wVxff%N(aS((MrI2`tq@y^! zRp?~FawdzMrJfVaW~gC4mg&85&zV#F@hL)j?15-7j(0EiV_Ho@(wW^pM|cR3^h5w7^`4TlG@V%N2TA zt(OkHT%(uQ>t#SMgL-Kvr4iCY>M~E*I0>nu35DZ_Cr1y420YAwr-p(bnhqS9*r(hB z%HFFftU#{$Cg1bLhdt%$;>Vt{y(oLiZRepXoPWntjv&?rnEbG35V_Q~n7Rg7eI<~( z2Fs??4|_Jl&;wP?$OFfG(gUY?5_>4aD&-xi(EfD+zIC56)LiapGmklyG3UQgN@JNX zHhTw}Yh{;L(R?_Lv)g&&l%bU4y`|_p@7#bFXBo0y50b1G?J2F{Vf*?(k5bP(FYH}h zN3}sqt#=dsGM<)zm#j&@N6(YBU?2awCiU+?OG9y|7gT-ND|dL2c7}-B{a%N6PjQF$ z%?>YgA5i-H`N@OKE-yqxVV*?`N ze?CN)Vl+>ppEP98v^YrrT?}KAnOJC6Ktf_y5_$YiVgAdAV6J8wWH(*P>&L=zu+wPQ@^4!p3XFbSw-onUPjQsfRmZo@;Fl zLs$j@91lP8@#)S^UeDy|*|%AF$qOk)K9-DVDFu$_qS3Y$2-^t^0ZhSPE()M4lK>dQ zs)S5A37K*dGC>dsko;)MbKQhT#6GEf5+Ei8p%Bv&q!0n=ie!)~VV@kzPel=C2*jih Y&#gp0_^lPBkx{YwNB(A_s{b|epSoXuTL1t6 diff --git a/Source/RomDsk/n8vem_diskio3+cvdu/FDTST.COM b/Source/RomDsk/n8vem_diskio3+cvdu/FDTST.COM deleted file mode 100644 index 39fd0a0a91a4204e0eaa4d635bc88c5410319acc..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7974 zcmdTpZEzD;lKQqr*p_CDEz6Q%geR=z1P6-`lUdLrOJiGSeIbo(6PA$8*Htb7Hrb8M zR}5^v>NZtLE_avQN7Ys?376dNrHT!80dC1ANO8i*H+v95Qg^-zF~Lp(D8U8;F(6;} zn~`l;a&;g3=LX!bU%&2t{od>MUiZ_v!cR`lZJN)@FFI+jR_<}j>&iS&XysqID>brF z1LVTilXIn>*07is*`7s>i&$^EV?ooBg^QXNiA@Wentbei8y{xl%Q}S^8;+zqA_=y0 z5tlxoYuBf;x`e*#1Kl0^R#~@R-}#YlyFN0g`!jvGp!-xG`c`*J->uVYG-dj3t&v)B z!*BU=R_QwyjKtZP5YMoIzzsPoEZ($F5Hm@h&BP<(itcU}_`{JPVE92T5f;>nLJ(8I z5K<~E3;vHEbe{4F!7xR6yL_pLC;-yxOQd2!kySr$r%y;lT2}*W#0LhlEt%F4u9yACX`*a=W1F=EBqcaM%ydCMR@9L=M&&Jz!AFpQ7YycVW#qf{P!e?CWYY z9+Sm!M}6mM`16b*oi^zBuaK2~8ofr6&+EZ+q=3f%4J8W(`9*`=Y?1=nYpc5H>X^cy zpQeaL6p;f?nlYgxKJP9j^S{&=Tl4SfbAO|!8%)rK4c|9-G%IP1j{lNslPBsV+E4hQ zv8mMZ1+<*4lL+6+*|TM%Q0~qo)9d^50U#Qi*=S=sAOgi4x&&jh@pKe}!t} zuTnTXiGIWA`I<6m`O8Y(v&UjG!DfHaxmg}@$#Ex)X1K5ZzK!+uef6E|z?z}@`f}TG z34Fk$|8Ftk>Lj%qU17J>8i_{P&R{enaLJ%33aL1o7K15KrQt^9$S!1~LZ=WVcn8;x zKAjdqVj{(nEzIH81&;;=Q6bnVlp0aAgTrHoO9kWMM2t)0A%KFnuwK!J&47e`zyW2- zN0`(dbX|Lin)E4#0)MLy%~$rDYCeY}QuhmZ`#B2yN?EOSCRm?)O|ZBRm|)!=GUa+r z@>T-(5_p!t^8|t$f^>oMpP~43RBa!1k0A-&rr*OxA|S0=gLjH_JEp9c2Rz}|1l5h_51Qvw#r#3}-d%KA~ce2;r%`~I;> z6ZC+%7CS{XSed(j%wAU1K^5Rf=BE zXeotr8v}<>(U5<$44i%&BQLFy@2`>MM`|RKv0vUh`=A^$7cabPJ11#1HbUT2O!3m8 zqUO-7O~1|_E>jP;f*ZGGdyV{d8A@EtHk#$bvjIiq7bQf-#{9DDDZrBhBAk&s=imkn zOu`7jzT9QS6b7|AcDa%PIoQqTlL zJx75IeF$s0b~F7uf~c=lYf3tXhIXLpBU?UB0^?Tr3!L(&7%7Mz2)7`( z9~U9McY{M@SfkNsH5wfh8qFkuGeNnf-m=_cvp6luL^K+Sx53@ZsVMh7i{An#k9vzM zhfpe$6uFg_4s2M^8ide@Y$gV9^qctT{m5~&Wb%*VZBVP@SsYyYf@@;l29TRyQQbrftB zT|@G);iR_Nzp$f)hU(z%+E?yjKQB*28yMS$4_FpS)kF>Q8bYrlPZ{5i2nCCI5q=KUBV{JXTV9*nzXz)C9A+Y#ys%-=(m*`MVYs`6{=stc8utWm91XKSyrmfJ$}tu?l|-#XWp zY_ZncI{(P}JzKiV+GtDs(7MEyxyO2&Ex6vg(iVHj+Ge}G*P60*@3d+(&s+DD8>@dm z)}9KuZhgrHL-LG!s@kn3zQ;bb^kzt5i8!wLR6ut5%UxS31-=_SMWtE zEDAH+GC)8-4%t2U)3ZhU7{na^BX@o(E zjR+bEtGR*VQ=BqMt1`i;f<_ZvY$C-9(-g9Qr${Lw1c^jTDhNqN8qNtaM?#96g6Slg zCJrX3Q<C zn47=9Cie(lsc^B9Jm!89DyW_Av`O?6j0f~$?(j6@*`#34F`mr|_9EkfVL@x6gToU) z5=%w}yaHgAOWO=49i~r#%FU-_k*v@i5`-{t23sKhih)~0tQ?EPgP1bHg#$5oBwX69 zBw}Vm?ZJ4PzzMK>6Rm7$HC%jQA;pD*VvtpONWc=NGI6kmMJllhJq<54E*43r@v01l z!?2WTHWo~Es0$kmuVzKKy%HG_{UscVg{SIm;OD@fiHhkdn$RtTrYh(=EV(F4Dl~s- zoBS(V@paqPw`^Aq*e+*nmp-&z{K9tOqHSDHpRc0N&7sHU)1!^_+3(ZeB` zshCx@o1tr~_Ark6s<#;TlB)eoS$ow1#w=F7!|3m+$})xrtNI!1=Bh)Ct*>f;37AZi z{vq0P!ai@DmhY;TZ>^C6c&3yw}nQ1Qev4-foQXSCwPtasA=9vvQRl@axpZ=U4nVaDIm=UeLjo%K%ZYXz<(hgs6_raH#Dt;5TLqiWU zqTkI_5o;y+rfR;IA*}#5BeoO4dIUd4@G}4b3I;%UryC!_#x2-rg2rRR^C$VOkTI@j zxaSsLp>+)ZDASgJ>duYR9c%^>)Ua)5;_Zp|s}1ej_K&?^4NPTael0U}L;`Q1Pt*Kk z3^QdJjIM6P$^`VP2~PfD?D;3m$aWaaHXJ3`ptSbY$de9<|0&~#qZ$tWaX9&p@}qbG z47_ucm;3DllSg^_9*z7jc0&B%C_nJjQC@A%AQq_%kRC_e=&8-xOogfau^- zf0`M2xA<=MrJBKJTOoIo-SaukpP;+0Y2J~~))e2(AFi>T$~D;gjyBgqW zQ(cC6*we|t5i_OnZ1HgZ+nVBz{Bk?yQ~yzuyVV}B|8t(T4>tGK&mKmRp;|dGnY+y% zC?dFu;0l7v2);q^HG%?yGXTJ5eu##&{5?CLVT#%bC_B;km0nA6hu2kn*Xypm7g@|+ z3v%cter&I`1}^0e+5;C6TmZm#F$3GPuh<7RW?#1t{BiaT`#@LrP5VG1yVpL@mOWt4 zy=M=MBlmd(=Man`7)5Xv0H%QbCeBtoD8YE0TlQpO;*Zg692Ve+l>1>Vya5*0Y#?t4 zn*2{|A&34|E#%Pe*Fp~cX)O%kQ#?_x;W~|6a~;67(g9rE4&dr`AeWA*(ePSk9ll6t z^3#04Jd+PnW-tq$BghhrdLkbxE7wJlkNi(>#csBp1wYH177iw`O z(E6>lxkntp|0j+L!1;^x3SefBfLuWGFVj>uU+x)PIpQZ^sHa%ti;e(?$nOOYSiTdPRk|tZ4D-<+U~b3AzxvOc&Bu>3Ng1 zG~Rz~7@jIjvpu_LTCa)k&+l_MY?tuucY_n35qg}tLk_6c!(%j(;EAEfIdtUUs3JN< zn{1vZt7s#Np8Gw~2?vpbS51`QA7}PveRa?uycQ8>RcjaXYwL;^5L^O~TU&==o$P>z z4cLxwV90`-ehb4paBaGi!RoVfp*py1L<>fOLiu@zbbSDTV}ppqb4ML4|K#A(efcNr zdfV#Dai+Fm7xWfXLf=uh88i|Lk!VuiRFqae%|H+I4&*F!T&6cc4WDl5Clt!nY0A$P z%H$M9+N5|Hyp1DffPUct9mnn1FUiD z+xZpF3ieBo$eEqecz}f#nE1c~wdB=ug<4jqr9~~*sO4I<^s1##EzP9V!b_5TpEIBx zhgYRhiRJpohmZMpIq6-_N(z3KIx;kRP}&B@KB^cj!L#)9?!9@*S**xcyNc%gsI$0m z0;>Fk!Bq?*)&^Kka&AU0`5AoW23T=3klHpEbz_oq6Lj5MUXMJm^Xpx(!Rt{%>X(~c z17*s;Ho$irl=|w6D;MfVtkQ_}eM+h;a`{!R-ukMX;F6Rek7dnfPCKb7q*Ja!NOaBX zbm1(+1KDrLVg{UrH7W3AH`r0=5MAKNxQ=qG@(SNW?CWzjbh^lzJn2-Q)Vfi|^A~gF z55P)I{)7umm0YhP4u()=yO8@44vT)3q(5J2`McdC`yZ>%C*{Eb8iHpOgs5H%)gms0g zBtPyh{%GP=cX8{)%kJE(?vdl_lnxIK)4SYS6TAvH>~h0h2TR`Y8f<}ofLm`hZ1#`b za8Be7xYZ4g#g;w!)9%y2oBK!ikfbEpBvEZ_Y=qQP2xUlmlz_)JB~em;Lc^qGDp{J5 zv5>@;BqxB0@N|~qlBq-+=08f_1W6J6bT}hoW zP(iTi2RYaLI>W_yICJDqhB93iAKKNM{w2@x1`Un1|(ysqC@}ChF B%eMdk diff --git a/Source/RomDsk/n8vem_diskio3/FDTST.COM b/Source/RomDsk/n8vem_diskio3/FDTST.COM deleted file mode 100644 index 39fd0a0a91a4204e0eaa4d635bc88c5410319acc..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7974 zcmdTpZEzD;lKQqr*p_CDEz6Q%geR=z1P6-`lUdLrOJiGSeIbo(6PA$8*Htb7Hrb8M zR}5^v>NZtLE_avQN7Ys?376dNrHT!80dC1ANO8i*H+v95Qg^-zF~Lp(D8U8;F(6;} zn~`l;a&;g3=LX!bU%&2t{od>MUiZ_v!cR`lZJN)@FFI+jR_<}j>&iS&XysqID>brF z1LVTilXIn>*07is*`7s>i&$^EV?ooBg^QXNiA@Wentbei8y{xl%Q}S^8;+zqA_=y0 z5tlxoYuBf;x`e*#1Kl0^R#~@R-}#YlyFN0g`!jvGp!-xG`c`*J->uVYG-dj3t&v)B z!*BU=R_QwyjKtZP5YMoIzzsPoEZ($F5Hm@h&BP<(itcU}_`{JPVE92T5f;>nLJ(8I z5K<~E3;vHEbe{4F!7xR6yL_pLC;-yxOQd2!kySr$r%y;lT2}*W#0LhlEt%F4u9yACX`*a=W1F=EBqcaM%ydCMR@9L=M&&Jz!AFpQ7YycVW#qf{P!e?CWYY z9+Sm!M}6mM`16b*oi^zBuaK2~8ofr6&+EZ+q=3f%4J8W(`9*`=Y?1=nYpc5H>X^cy zpQeaL6p;f?nlYgxKJP9j^S{&=Tl4SfbAO|!8%)rK4c|9-G%IP1j{lNslPBsV+E4hQ zv8mMZ1+<*4lL+6+*|TM%Q0~qo)9d^50U#Qi*=S=sAOgi4x&&jh@pKe}!t} zuTnTXiGIWA`I<6m`O8Y(v&UjG!DfHaxmg}@$#Ex)X1K5ZzK!+uef6E|z?z}@`f}TG z34Fk$|8Ftk>Lj%qU17J>8i_{P&R{enaLJ%33aL1o7K15KrQt^9$S!1~LZ=WVcn8;x zKAjdqVj{(nEzIH81&;;=Q6bnVlp0aAgTrHoO9kWMM2t)0A%KFnuwK!J&47e`zyW2- zN0`(dbX|Lin)E4#0)MLy%~$rDYCeY}QuhmZ`#B2yN?EOSCRm?)O|ZBRm|)!=GUa+r z@>T-(5_p!t^8|t$f^>oMpP~43RBa!1k0A-&rr*OxA|S0=gLjH_JEp9c2Rz}|1l5h_51Qvw#r#3}-d%KA~ce2;r%`~I;> z6ZC+%7CS{XSed(j%wAU1K^5Rf=BE zXeotr8v}<>(U5<$44i%&BQLFy@2`>MM`|RKv0vUh`=A^$7cabPJ11#1HbUT2O!3m8 zqUO-7O~1|_E>jP;f*ZGGdyV{d8A@EtHk#$bvjIiq7bQf-#{9DDDZrBhBAk&s=imkn zOu`7jzT9QS6b7|AcDa%PIoQqTlL zJx75IeF$s0b~F7uf~c=lYf3tXhIXLpBU?UB0^?Tr3!L(&7%7Mz2)7`( z9~U9McY{M@SfkNsH5wfh8qFkuGeNnf-m=_cvp6luL^K+Sx53@ZsVMh7i{An#k9vzM zhfpe$6uFg_4s2M^8ide@Y$gV9^qctT{m5~&Wb%*VZBVP@SsYyYf@@;l29TRyQQbrftB zT|@G);iR_Nzp$f)hU(z%+E?yjKQB*28yMS$4_FpS)kF>Q8bYrlPZ{5i2nCCI5q=KUBV{JXTV9*nzXz)C9A+Y#ys%-=(m*`MVYs`6{=stc8utWm91XKSyrmfJ$}tu?l|-#XWp zY_ZncI{(P}JzKiV+GtDs(7MEyxyO2&Ex6vg(iVHj+Ge}G*P60*@3d+(&s+DD8>@dm z)}9KuZhgrHL-LG!s@kn3zQ;bb^kzt5i8!wLR6ut5%UxS31-=_SMWtE zEDAH+GC)8-4%t2U)3ZhU7{na^BX@o(E zjR+bEtGR*VQ=BqMt1`i;f<_ZvY$C-9(-g9Qr${Lw1c^jTDhNqN8qNtaM?#96g6Slg zCJrX3Q<C zn47=9Cie(lsc^B9Jm!89DyW_Av`O?6j0f~$?(j6@*`#34F`mr|_9EkfVL@x6gToU) z5=%w}yaHgAOWO=49i~r#%FU-_k*v@i5`-{t23sKhih)~0tQ?EPgP1bHg#$5oBwX69 zBw}Vm?ZJ4PzzMK>6Rm7$HC%jQA;pD*VvtpONWc=NGI6kmMJllhJq<54E*43r@v01l z!?2WTHWo~Es0$kmuVzKKy%HG_{UscVg{SIm;OD@fiHhkdn$RtTrYh(=EV(F4Dl~s- zoBS(V@paqPw`^Aq*e+*nmp-&z{K9tOqHSDHpRc0N&7sHU)1!^_+3(ZeB` zshCx@o1tr~_Ark6s<#;TlB)eoS$ow1#w=F7!|3m+$})xrtNI!1=Bh)Ct*>f;37AZi z{vq0P!ai@DmhY;TZ>^C6c&3yw}nQ1Qev4-foQXSCwPtasA=9vvQRl@axpZ=U4nVaDIm=UeLjo%K%ZYXz<(hgs6_raH#Dt;5TLqiWU zqTkI_5o;y+rfR;IA*}#5BeoO4dIUd4@G}4b3I;%UryC!_#x2-rg2rRR^C$VOkTI@j zxaSsLp>+)ZDASgJ>duYR9c%^>)Ua)5;_Zp|s}1ej_K&?^4NPTael0U}L;`Q1Pt*Kk z3^QdJjIM6P$^`VP2~PfD?D;3m$aWaaHXJ3`ptSbY$de9<|0&~#qZ$tWaX9&p@}qbG z47_ucm;3DllSg^_9*z7jc0&B%C_nJjQC@A%AQq_%kRC_e=&8-xOogfau^- zf0`M2xA<=MrJBKJTOoIo-SaukpP;+0Y2J~~))e2(AFi>T$~D;gjyBgqW zQ(cC6*we|t5i_OnZ1HgZ+nVBz{Bk?yQ~yzuyVV}B|8t(T4>tGK&mKmRp;|dGnY+y% zC?dFu;0l7v2);q^HG%?yGXTJ5eu##&{5?CLVT#%bC_B;km0nA6hu2kn*Xypm7g@|+ z3v%cter&I`1}^0e+5;C6TmZm#F$3GPuh<7RW?#1t{BiaT`#@LrP5VG1yVpL@mOWt4 zy=M=MBlmd(=Man`7)5Xv0H%QbCeBtoD8YE0TlQpO;*Zg692Ve+l>1>Vya5*0Y#?t4 zn*2{|A&34|E#%Pe*Fp~cX)O%kQ#?_x;W~|6a~;67(g9rE4&dr`AeWA*(ePSk9ll6t z^3#04Jd+PnW-tq$BghhrdLkbxE7wJlkNi(>#csBp1wYH177iw`O z(E6>lxkntp|0j+L!1;^x3SefBfLuWGFVj>uU+x)PIpQZ^sHa%ti;e(?$nOOYSiTdPRk|tZ4D-<+U~b3AzxvOc&Bu>3Ng1 zG~Rz~7@jIjvpu_LTCa)k&+l_MY?tuucY_n35qg}tLk_6c!(%j(;EAEfIdtUUs3JN< zn{1vZt7s#Np8Gw~2?vpbS51`QA7}PveRa?uycQ8>RcjaXYwL;^5L^O~TU&==o$P>z z4cLxwV90`-ehb4paBaGi!RoVfp*py1L<>fOLiu@zbbSDTV}ppqb4ML4|K#A(efcNr zdfV#Dai+Fm7xWfXLf=uh88i|Lk!VuiRFqae%|H+I4&*F!T&6cc4WDl5Clt!nY0A$P z%H$M9+N5|Hyp1DffPUct9mnn1FUiD z+xZpF3ieBo$eEqecz}f#nE1c~wdB=ug<4jqr9~~*sO4I<^s1##EzP9V!b_5TpEIBx zhgYRhiRJpohmZMpIq6-_N(z3KIx;kRP}&B@KB^cj!L#)9?!9@*S**xcyNc%gsI$0m z0;>Fk!Bq?*)&^Kka&AU0`5AoW23T=3klHpEbz_oq6Lj5MUXMJm^Xpx(!Rt{%>X(~c z17*s;Ho$irl=|w6D;MfVtkQ_}eM+h;a`{!R-ukMX;F6Rek7dnfPCKb7q*Ja!NOaBX zbm1(+1KDrLVg{UrH7W3AH`r0=5MAKNxQ=qG@(SNW?CWzjbh^lzJn2-Q)Vfi|^A~gF z55P)I{)7umm0YhP4u()=yO8@44vT)3q(5J2`McdC`yZ>%C*{Eb8iHpOgs5H%)gms0g zBtPyh{%GP=cX8{)%kJE(?vdl_lnxIK)4SYS6TAvH>~h0h2TR`Y8f<}ofLm`hZ1#`b za8Be7xYZ4g#g;w!)9%y2oBK!ikfbEpBvEZ_Y=qQP2xUlmlz_)JB~em;Lc^qGDp{J5 zv5>@;BqxB0@N|~qlBq-+=08f_1W6J6bT}hoW zP(iTi2RYaLI>W_yICJDqhB93iAKKNM{w2@x1`Un1|(ysqC@}ChF B%eMdk diff --git a/Source/RomDsk/n8vem_ci/1200.COM b/Source/RomDsk/sbc_ci/1200.COM similarity index 100% rename from Source/RomDsk/n8vem_ci/1200.COM rename to Source/RomDsk/sbc_ci/1200.COM diff --git a/Source/RomDsk/n8vem_ci/38400.COM b/Source/RomDsk/sbc_ci/38400.COM similarity index 100% rename from Source/RomDsk/n8vem_ci/38400.COM rename to Source/RomDsk/sbc_ci/38400.COM diff --git a/Source/RomDsk/n8vem_ci/9600.COM b/Source/RomDsk/sbc_ci/9600.COM similarity index 100% rename from Source/RomDsk/n8vem_ci/9600.COM rename to Source/RomDsk/sbc_ci/9600.COM diff --git a/Source/RomDsk/n8vem_ci/RTC.COM b/Source/RomDsk/sbc_ci/RTC.COM similarity index 100% rename from Source/RomDsk/n8vem_ci/RTC.COM rename to Source/RomDsk/sbc_ci/RTC.COM diff --git a/Source/RomDsk/n8vem_ci/T5.COM b/Source/RomDsk/sbc_ci/T5.COM similarity index 100% rename from Source/RomDsk/n8vem_ci/T5.COM rename to Source/RomDsk/sbc_ci/T5.COM diff --git a/Source/RomDsk/n8vem_ci/VT3.COM b/Source/RomDsk/sbc_ci/VT3.COM similarity index 100% rename from Source/RomDsk/n8vem_ci/VT3.COM rename to Source/RomDsk/sbc_ci/VT3.COM diff --git a/Source/RomDsk/n8vem_ci/XM.COM b/Source/RomDsk/sbc_ci/XM.COM similarity index 100% rename from Source/RomDsk/n8vem_ci/XM.COM rename to Source/RomDsk/sbc_ci/XM.COM diff --git a/Source/RomDsk/n8vem_ci/XM5.COM b/Source/RomDsk/sbc_ci/XM5.COM similarity index 100% rename from Source/RomDsk/n8vem_ci/XM5.COM rename to Source/RomDsk/sbc_ci/XM5.COM diff --git a/Source/RomDsk/n8vem_cvdu/1200.COM b/Source/RomDsk/sbc_cvdu/1200.COM similarity index 100% rename from Source/RomDsk/n8vem_cvdu/1200.COM rename to Source/RomDsk/sbc_cvdu/1200.COM diff --git a/Source/RomDsk/n8vem_cvdu/38400.COM b/Source/RomDsk/sbc_cvdu/38400.COM similarity index 100% rename from Source/RomDsk/n8vem_cvdu/38400.COM rename to Source/RomDsk/sbc_cvdu/38400.COM diff --git a/Source/RomDsk/n8vem_cvdu/9600.COM b/Source/RomDsk/sbc_cvdu/9600.COM similarity index 100% rename from Source/RomDsk/n8vem_cvdu/9600.COM rename to Source/RomDsk/sbc_cvdu/9600.COM diff --git a/Source/RomDsk/n8vem_cvdu/RTC.COM b/Source/RomDsk/sbc_cvdu/RTC.COM similarity index 100% rename from Source/RomDsk/n8vem_cvdu/RTC.COM rename to Source/RomDsk/sbc_cvdu/RTC.COM diff --git a/Source/RomDsk/n8vem_cvdu/T5.COM b/Source/RomDsk/sbc_cvdu/T5.COM similarity index 100% rename from Source/RomDsk/n8vem_cvdu/T5.COM rename to Source/RomDsk/sbc_cvdu/T5.COM diff --git a/Source/RomDsk/n8vem_cvdu/XM.COM b/Source/RomDsk/sbc_cvdu/XM.COM similarity index 100% rename from Source/RomDsk/n8vem_cvdu/XM.COM rename to Source/RomDsk/sbc_cvdu/XM.COM diff --git a/Source/RomDsk/n8vem_cvdu/XM5.COM b/Source/RomDsk/sbc_cvdu/XM5.COM similarity index 100% rename from Source/RomDsk/n8vem_cvdu/XM5.COM rename to Source/RomDsk/sbc_cvdu/XM5.COM diff --git a/Source/RomDsk/n8vem_dide/1200.COM b/Source/RomDsk/sbc_dide/1200.COM similarity index 100% rename from Source/RomDsk/n8vem_dide/1200.COM rename to Source/RomDsk/sbc_dide/1200.COM diff --git a/Source/RomDsk/n8vem_dide/38400.COM b/Source/RomDsk/sbc_dide/38400.COM similarity index 100% rename from Source/RomDsk/n8vem_dide/38400.COM rename to Source/RomDsk/sbc_dide/38400.COM diff --git a/Source/RomDsk/n8vem_dide/9600.COM b/Source/RomDsk/sbc_dide/9600.COM similarity index 100% rename from Source/RomDsk/n8vem_dide/9600.COM rename to Source/RomDsk/sbc_dide/9600.COM diff --git a/Source/RomDsk/sbc_dide/FD.COM b/Source/RomDsk/sbc_dide/FD.COM new file mode 100644 index 0000000000000000000000000000000000000000..409cf1f8caf10ed76a4e69543e335aefc9b99621 GIT binary patch literal 7961 zcmdTpeRNZGmica8Xq)$5KhiXbyx4cfq)?^}pqPaWA@4QKG+!hyZIM-m^$T#MqYh9+ z5qH+{=-EBX?w(y)cRpM_9-T8Y42;eQiY_Fgyl~zg8H5=`g^I0EjZkWZMNRkK-+O5b zgM0R4{@Dk;zx%tt`@6q;f1mf>jFs;D{mc$0r#$Xre0pWIN6A%rH|dq1cxrWuSqJ3O zrr*z$*LMos`gwEOIbUyYTgUwNxq7TU2B7W&NU*O9#1JGA1qR>*Jt@5DNo_AJkHUs8v*glnFeZC&Qn2B{R1J;-y6y%oVIy=P-f*W|(g#mciq%tE{xRh}u2&YggC9|j6^%OYmz49CmY$E{&wCo_ z%q4yB1hO&@<6e=K5hLsuIiw2=QOcj0l)o`4Z5BDCzr1Rgs-9LEj8l|vo3V@1;bN>7 z+M=Rh7BDiuWm7;GX&qKqDrY*W_*Mn8n3Igyaz3(nq|Vb zxV~Pw*eomeRw)B^8EX2}-X=ewpbpd*7p!G+-;u-uDRxdIg6l=DfLVD8^090kf*UMPhzqE=$EnOcsH8 z#atE;%QD-|m=_I`kba}~nhnZ1Kl@H`a_j!|fy%sgZEen?sL z!BMsDeb#2Nz!87kwNW|dR>Cf@W@vNE9sMmWn_GHTfHs3IE!Ff18TNoh|KDQ7)k*7h zhSCnXGZv3?J>hsx3lT*mW#U3$E@NT{f_jFc_NU01@jxdi$ z7j`rVh>PJKxL?#p?Apx>v1~V=2`7bAg3sb5fE{OZKFN>GfCzrzfHLDJOxg*$qP;>* z`&C7OztfNEtLIHqpGS+d^8&m53v2#N zgO!=P&(~Cyb;X)05D1<3(FHk@N=mV0PW%?<3;UO(G7_0tQOYa>B<7DMQyEd4wBRuH z=r?rz%(FHpZYkztO3&y@JHW8hV8kjm3ir*f;v-doRV<;wof25jddDbc1*@l2&b2ID zLS<9&`6}4-YgxtDs3aO?Wo@HuG4EG?R=-cV(OUj|FFhvfbu=La1-5+gKv{QS#=y?} z8&%rncG82#GT5lRP=!4%q zYlV=Nd7U70!Su&mFBKycNCAP5xs;_YWGV1s_!{s{5I7x_DTA%XmQKavv1An9U0y?Zr;WG4t)so*>IIa^r6oRKTZ9d5 zo#8CB@}wZw6Si``TrwlZW8o!n(a+y(TZOFO>M-iQ)Xv#0WJ%k86XSVIdX3TDx`9tBPWQ-Y)o3lH_UL)NE=u^t24O1 z`6KGT*rd{T4+}++BGS1)r|fbK7&b~fF$XJP`uzWa z>9vVr*f417(a1~Emb;r?rjHD6?cuueI%DLr< zYzAEFoACvxc*WZJfdai%e2>MrO4GdMNe1G`a)M9v$7^gVGrZ#6YP(vG`2~&rN)J05 z2`4$xx6}{5F`~Y>KlM#U27FG zF?8P1b0Jp&x)`FS6S9EAosIcY{v_NXzMMY}a-@jbHx5sv6zK|L_<^4<;ZK2c0(F&u z6PXdgljnRlf!bf|?I%;3r%&cU5aXgGR@{DV&NLcfQ2io;#sn=cQ1=wCPSR2c)KoN{ z>g7@yPMo5U^E*k(h!F@PmSn;ZU}WK*Aaf*U$Ss&nlWF2%f_l{H$z_2_?8X=*3$Y5H z&Z)D(3+T$B=_K+XCaa+bJnHb`*VaIwDZ?!f|AU?E@HytiYx3Ld%&u#^YilvyNYor} z#c<=6T4+Y3z6M?cS;^7x;*sKAwK%61rg}nbf?_qT%!XnGjo9LPxzJ5xH)#@EHHke? zk8as&7W@GjTniZ-1k(Sg+J6L!GW>y>-v$@tL0Snk%0%5_qOq_RpHp~LNeuJn#7)o! zy^ofe4XhXBV%+c`>s_N_f6039QnANaFPH_bscs%`{8%C#7x4*zRjwQ~m~@yv6{@eE z8bNYmUqloI;0!MT-zx#z8vNu$EE&dd5gr`yzhgq>yb^Dji*$vPQIQwn{H8j&$TE2N z1Tn)4VJXb1BcxynGr1&a!y%Pug*y!&H9ir`X7Q;E3j!=<7Q*vPx3;ihVHqdE>y^q$ zxL<@wLYS;aVV?tkE-qy!X=0xknXKU6;mAW-5utmOo_L%tKS_V}JpJW%`imFoi?7oc zj?tf=p~uJR&&_4&8yX-%+h7tBhtZkhADO>Xu`!vhg>Yint4Rz16p6lv<&Q=BM zwzJmGx}B`Cr|w18bW7b!to^RKms$FIb+57^i)A8knDM^rxb`DPks1_lqa3PMY3ZhE zG_&Od@)@SnD3x{@pTY7F@?A!=SymwJ7#YK%j!~o1d_>+BmBvgT_moO=UWMkl3a!dA z6UWFAd7n0f41u>9VvKcqgQEd1P_4l@y}{T>m`&4Znx^*Yv`Jy(1dD2Z|j~-b+dceBmAYo?`2QYp@*}RKiptcS)DicmQcn2GRs~Rr;ak%*p&mM&rPGPmiJHyrZuMKWCGn}@$l zVT8LgWeQmx^jAAKKp*8TNAOPea2qm&s*!^4O%#J)fwkzAe{&pf4T$XU-tyl3la0q` z(WSynhxZ5*e4FXLta(duPh)v+vDiqD6nMwx!?Ri%^8eb{3OhdMfplGzz1Q2t!c{XV z@m%?>;#gyOOYwRK##Bce3w}q)@p7@*aeUT>mii&=GT5YqCJJ*Mp)!K65PXT?3j}8o ze2Soi;1d9#bMP<&q4{f$V3aNEFG1Ob$}jfW%3FNy@?M{(>2_qX`fSKyxU|O6WDi{| zyy6I5K=3($V2nNZQ2xh`gZ=rZ9S85sKj%2uoBxI5U@E`UaWIGD1q>~-D$LLOG(2*V{|H4e#zo+iixmX?2qT?2DpA)%0V;XhAF=hp3C3M9pK46~C2Vpa) z1t|%#1j8p`wbnUd>bbLp+nsXA95}<&>MXkBt>tsYA2iVy3R|0SB~bfyO@(z%;9ujc z0X%qySp>}7A?O#90}FJuv%Xk=y!Bu|w3nWCZTfZo7sx-^RC+r9X44nzq4;;C*DeGm z5c&>bnl|hXpNYQMRD*j5+dr8alsi!w^X;pR`3#Q9IYIXHM{a8TXYx@ejQ>nNi99g= zGbsNitiZPEcfzLXcf#Zpe&EEtQRAyB+k8gwr~;obrAUb>WzRC#jxzH2{v$(>w6N5B zpI{iHF1fq7%ju*qVitI%3lj>fU4;WqsJ1{_8cC3BSnV1-v~N`HdYG}$-hn#Cj9th6 zsOu#s=?D2u>=9hgzLfVj!+4N4B3o9gT_~oT%bz2-2%wN|Mkh~kLW%u zboO9_GhHlHL5A}8PI>y|AdcpMOX6MH4C_8|ymeP`WAlb+OEpeTKT2ipo(W=@rOg{b z2vG`&|3T7LVXZYNvS2xLA99wuOUwY&FmKBYsFbr)lm}JH=p;oRP`4K(#t}2YxR57mUyr7)Q_+&C1q^x)>~7TaAl+-c}h_@Y@J4{^`} za~*2a%Ai&*(#jgGv}xsXt-M()eOl?)N-HV#kVaCLxkCDJNGXlV9KU~j=ty9ji`nL? zrQnySLxZFHLsz-|5>$hiF1X5J#G-%|_P918 zm+~;CxB=G80#bBi*>HZ3YXFAcP~Cz&aO4}^aIzcSP?Ps7t?q+W>c1%9TlUGDTgr>u zjl*_%*!~73H<$UM;NH+uS6JYdRWFa@tX5t>p(|xYcPSEeUmJ7dEJJo|JIRi9xJt`K z*uL;nhO5*ab;I7pbyRLtQ}C;ae)qUqV{Wo08(msHtsDDzADyYZ3|i`nN8F(59(Q4- z8)*(VirV$gO84&KA@}cAx}p09xv!5OKf)Y!L&Ox~SwtX(25VN?H=}ZUM_}%}`PbjD z;KuNhh#+?E9~y^uVCoU1v(2NoKuWlE8~ikh3Cq?e;RyT)p1WmmzTfn~)lm4AM?2G4-2X!H zeb2|hTllGGP*$UC5~>w}zFbRLz2!Loh4p6|VgiKipnX(cxL6``T{J6?mGmLMPeCJWNYs960If0J?7{~GyEXO*h8 literal 0 HcmV?d00001 diff --git a/Source/RomDsk/n8vem_dide/RTC.COM b/Source/RomDsk/sbc_dide/RTC.COM similarity index 100% rename from Source/RomDsk/n8vem_dide/RTC.COM rename to Source/RomDsk/sbc_dide/RTC.COM diff --git a/Source/RomDsk/n8vem_dide/T5.COM b/Source/RomDsk/sbc_dide/T5.COM similarity index 100% rename from Source/RomDsk/n8vem_dide/T5.COM rename to Source/RomDsk/sbc_dide/T5.COM diff --git a/Source/RomDsk/n8vem_dide/XM.COM b/Source/RomDsk/sbc_dide/XM.COM similarity index 100% rename from Source/RomDsk/n8vem_dide/XM.COM rename to Source/RomDsk/sbc_dide/XM.COM diff --git a/Source/RomDsk/n8vem_dide/XM5.COM b/Source/RomDsk/sbc_dide/XM5.COM similarity index 100% rename from Source/RomDsk/n8vem_dide/XM5.COM rename to Source/RomDsk/sbc_dide/XM5.COM diff --git a/Source/RomDsk/n8vem_diskio/1200.COM b/Source/RomDsk/sbc_diskio/1200.COM similarity index 100% rename from Source/RomDsk/n8vem_diskio/1200.COM rename to Source/RomDsk/sbc_diskio/1200.COM diff --git a/Source/RomDsk/n8vem_diskio/38400.COM b/Source/RomDsk/sbc_diskio/38400.COM similarity index 100% rename from Source/RomDsk/n8vem_diskio/38400.COM rename to Source/RomDsk/sbc_diskio/38400.COM diff --git a/Source/RomDsk/n8vem_diskio/9600.COM b/Source/RomDsk/sbc_diskio/9600.COM similarity index 100% rename from Source/RomDsk/n8vem_diskio/9600.COM rename to Source/RomDsk/sbc_diskio/9600.COM diff --git a/Source/RomDsk/n8vem_diskio/ECIDETST.COM b/Source/RomDsk/sbc_diskio/ECIDETST.COM similarity index 100% rename from Source/RomDsk/n8vem_diskio/ECIDETST.COM rename to Source/RomDsk/sbc_diskio/ECIDETST.COM diff --git a/Source/RomDsk/sbc_diskio/FD.COM b/Source/RomDsk/sbc_diskio/FD.COM new file mode 100644 index 0000000000000000000000000000000000000000..d411a1fbc5f540a5deef0588a61be9f06cf6e44a GIT binary patch literal 7919 zcmdTpYj_h^c6yFAvMtSwjb&Lhkc%5$ zYLp-8jPQ@lZfWIx{r$7r=Cs}vn3HXV&(Ghr`T;%?&GbZ*LS~1d!Hy8`|If7VZeAOn&9J7qL&W_ zugy2V+Um>rrEG6XRG}Y-6gtUxLLV7Mh{71rP%L_@q{$W{ zm&Xxs9Gp)<8i-~ESX*56{d)0ZTKU*rT>1&^{a3wWbBm+2V|ksXBG{CUTa z&YstcA0aEd33rODoG`*}k%PLxZ)xRblky{zaswp?^;cF6m#bqcgYhz@+l*b53KvUJ zxcQcPN~ywg#!_ctr!l|T$X-W58#df%^6D0{I)nHj-KFFkWOfGOhsJM}TMj|Xt_GR# zEv&6o_BF`LnhNDUyYfql+&Y9Ssn!U$pN*AQ&Cy~-xvUo)4og(po^ zgxzH>MG(ud+s&m+VS|ZEvu~M8X~6Pv6Lg2ZanriM5O$WuA!Offg7)nu(E zFMh7pz1yr51qXbEYrXQaTXDF+n$e9-cdc$}+St^$9JCo}YN}!m%diJ1^M8vGS0|;{ z8HzjP&S)&g_l07;l8_2zvr;<2XR@JmR-@rT704;%V^W_KBY2O{je9yHg|o@DK#s70 zM;CT92#86cKB?S@U3&z)bA)s#5lO~{3|<1*aVGD}`mq_1h#xqhO#2Cwc7m>IFH=)~ zRZ-yY^rQOfdDGMv&?4=;z-~WI!@g2iD?`EhETLd=ms7BAcT)L#DP=W*+Xy^H;0Xd@ z8$$09I&g#*kJF`z!rxHJHVT$4DITFafVwNUmI4lFE&^=?Xd`9X2raAo<)0~7Sl9=u zgpVkt!-A_^B_0O$!@$0a$`dL;l~V>5nc~$B*H;XoaAlTfY}2l@Ur;at;(8nu#bBjz z*V)R7lCDr$0Ro}(Ad{EF$wW4q=#>`mzL0-WGMyzeD`nG50Ezm$63MirO`3R&etL#( zHM`B~#4W{sLhD&waR(SS21cyly5PRqS$MJ{u!18rxKjeFIPV#n?dSBg%6S(Dmr%)6 zc(DRD{au{G*C|q+tSqjRDf5u>eC?ppZYiDH%X}g0bqpbh9bD=BJ0;yamFr%~{ZoZ@ zxxMbeV;QJZUa7zyU*)D-l-;#}BJzVWGKh_ZnO9SQCl5rpBX7A54`^@#EC7{HfEgX! z8?rctiPbR}AV4D57*#?{spUbB?+gw%5yU z^~T1#qv5UG&*+*aT){u4<%6hbEs8$y=xoxp9VTOIfOe9UP0J?LX_;iYg{6u zI-O3h(}Ax6-vohEfywH!&bBVMuC-dMHP%!z7KPSnl3rY< zPoh3)AO$ZuJkr@vY$l&bX8HbPx(77#3vXDhmCGt$sWev&RJ~)}Z%r9!I4*|f)Vrn^ z_3eSyo<+QHQ_Gy`yo%4_Z|2qOG&7SA@R?{t0%Tq*Pwr1ZBgtOSk&j4;OfA&i__lffwb1TpSNEjIRh17{`V1DmrL5&ms+MzF z0-&Z^nZ;jA;_Po!Ggm2t%qf=NG?!Se$t0C)oBqu*>#96eDT7^a2h+1#i0Oei%%&={ ztpzJ!`keoP>EEqdQxz|ZeAkJy+13WLId3|zV&5dNz5SaODE(90c6;P!w%6?aKez3+ zOMhn@v}gC&-mypDw(Ylf?zjEMzW77i5qs>o?NfXAzuUgFhpX%*d!pW6!K8flN~W*X zZf7#{?R89Yk=?`e-eUJMp^V+f#QW_xGPf?XcQ6BY+jY8i_H9+>Y1i<$Rks|y$Z#?q zhiCOF@0?#6&!oY%UWPA0**n(G4;1LN;=3%xRGQ{BPcjgPmXG)(f2`W7GQ(@$qqeK{ zs6V2yU+rmU!l48&`4;=ZM@G~a^CxeV79+P>@AgNvdRhW!JESRr?UFCy&qzF+PU!4Q zfiD3ryEaZF9YrS|Js5HopsOKiIw1=<-kGQ`=}%N!Q@&n*4CG|PYTp<J1Sz8quNwbq5LRlq~KI#Z)ww z?B|ndUb;*nr*)E)mckG^EJ}wUtjNHvKxRZrlRGbyB9kJ(bo8l{(VGD#sRtvE3`8hG zs#mpLh@b<9hLU(AEkVel1|0B|!#iJF4Z)=hcRTzSgWQ>vEgz?B?sd57{uz z$W$Mii($qcHef)cp&DKRS&1|7(vji=wK$;`m(+r(m6er@B0$m4AU3a7&W9Q77MsLY zOkxk!qC2*d13y3pmqG@|fb`#|_CE^6IrsxbZwA-nVMb}LlQo44QeA#AKBVxRlISHs z90YCHdl{Ks&3QpGMhp*g-rH2{QO;do@S-X&$>%x8LI*~}zO8j!-172H2Oc^b^T!AT0rw}I;VAcKoVCdPIafW-{T0U=YM$ks)iql< zPh-tit|CzLB4-KK{DLzkYPNHxzM7Xg`|UNaa?Cw7|G)()Y9cVqdf#$PKg=qzX^OK> z4pynOK>ZY&nL3Po$ENbpD(wnB1GNeHuAo_|7QmbifzdF}Q`R5pTnGXjs9G8Fz3sL|a+0PZL*iq!qyJ zh~0~zAHl5%?gJ2{!2rU0xp65r-hqu2G#(tCF(KXwabiCw{G{~~dx{nB=DLzlePZ?H z0oFqolGqA2<%+3XknhGxQ z+c@$vZfp}6a~E0(I;gF;)+q;_viKb?09Q3!{o`==zb~GV**kQ~&mH&@48Q%pIQ;bc zq70Y$@MhpqUUd+BAM(T7vH%0z4vx|(&pQsy4b11p_LlbM9;-Xl&J^={hgV_6U$gyJ zG(TQ=uCBDVu)U7?G*3A;zTe(7E%#(yGwkgfJdl!Gz&+qy$ibyDDe-ja-NM1T(&L4C z2gXf1>++S3pksI85{$C8sdf~*jMOW^iTpH2u!P`i1eXw8MDRI+&kz(5oB{wki^D90 z-&-8w01YaOHi{K1`(*Q8k8=?fJ zGzbs0!}aKEIhgo^ET4b{I3VZe)kChYxO9Nz3Uq~3J;cgS*F&uQLOsOFyX(P#-FSgs z!SyzBT|}-rCvdemfvd%dT&LJNop_R6j+qBt;W8gEPvwKq7}SEa16hKxBd}UMPMCWB z^Zf5Q<)Aq*!rF9{?$F%Q>B61$%vbpb>TxAd`~LcTj}!P8I;#N}N7(tm%pZV$K{+r_ zXKTOs$f3EztD(L4f@{O8xy{Hw*;ITX_lx?Ak3g{l>9!7F0-<{d)0AO%_)N_C`fA)e z*uL-bp#0(Tm>*ng%&j=4!Fk1)TXP;KjJY)@ARWfsiZWXX)2Y1VgpDLQVM6jtoVXvV zeHA6E&j=n<;22vBkFv$gad!GAtUNw+a1@deRIT^NENj#yb`>@|oy>X6?zX!yQLw<3 zf6fWjCP+6U36cm4Tq6et&!}C8S&H$lsbS67RsK(1-*u9HkhjDh;wtWq+=LUxgM1L# zrdsW*!i6uk z)G!~*CREDt%an{t`DBtJuT!@aB)kzb!MKnWM{}NX*_hFdIHfR|)%-XVHfChw*ouw3 zA=sj4^CzH3{y>8~9^|0~<~le_D@CoGua(tWY1PW5TDeRseOl?) zN((9VkRDQQbOrU}kSaPO^TN>h=)u4$7rV-3qv7|Z10!b!<;OtT@2LvQkZWG*d86=* zt5jY1*j2I=cDqWg7oaL$P+X-DVqJjcpK+~6E~Ot+*8r<;08-cblHu$#u5~c<+Nvhx zfn$Ek1*iEG_K=4ZoqM=K{nrKfw|JLr_Rrp)?d+l!MzE&O>5XKL( z+uaZm1qBWfNR7domG{jVxwS2D)9g8O+vnXJS`>~*okOGJ@K!X!H)c#4hH~+9_L?%HcPh!!QmKKOErEo8aev*(q zQ{y1*cQK4fCS#!~0SSp+N$dew7II-}A(c*cVR)m4MG*7A?|9*E9>RW%b;yu7SaWkT z$;(ZN*?6E4x*8p0Ld1)-3VSx6xQ(iKV}HH&>RC_fQKm?999J_5f8`QW!!kVZzu O>hJiQjH>?E$bSIH0%WBC literal 0 HcmV?d00001 diff --git a/Source/RomDsk/n8vem_diskio/RTC.COM b/Source/RomDsk/sbc_diskio/RTC.COM similarity index 100% rename from Source/RomDsk/n8vem_diskio/RTC.COM rename to Source/RomDsk/sbc_diskio/RTC.COM diff --git a/Source/RomDsk/n8vem_diskio/T5.COM b/Source/RomDsk/sbc_diskio/T5.COM similarity index 100% rename from Source/RomDsk/n8vem_diskio/T5.COM rename to Source/RomDsk/sbc_diskio/T5.COM diff --git a/Source/RomDsk/n8vem_diskio/TP-IDE.COM b/Source/RomDsk/sbc_diskio/TP-IDE.COM similarity index 100% rename from Source/RomDsk/n8vem_diskio/TP-IDE.COM rename to Source/RomDsk/sbc_diskio/TP-IDE.COM diff --git a/Source/RomDsk/n8vem_diskio/XM.COM b/Source/RomDsk/sbc_diskio/XM.COM similarity index 100% rename from Source/RomDsk/n8vem_diskio/XM.COM rename to Source/RomDsk/sbc_diskio/XM.COM diff --git a/Source/RomDsk/n8vem_diskio/XM5.COM b/Source/RomDsk/sbc_diskio/XM5.COM similarity index 100% rename from Source/RomDsk/n8vem_diskio/XM5.COM rename to Source/RomDsk/sbc_diskio/XM5.COM diff --git a/Source/RomDsk/n8vem_diskio3+cvdu/1200.COM b/Source/RomDsk/sbc_diskio3+cvdu/1200.COM similarity index 100% rename from Source/RomDsk/n8vem_diskio3+cvdu/1200.COM rename to Source/RomDsk/sbc_diskio3+cvdu/1200.COM diff --git a/Source/RomDsk/n8vem_diskio3+cvdu/38400.COM b/Source/RomDsk/sbc_diskio3+cvdu/38400.COM similarity index 100% rename from Source/RomDsk/n8vem_diskio3+cvdu/38400.COM rename to Source/RomDsk/sbc_diskio3+cvdu/38400.COM diff --git a/Source/RomDsk/n8vem_diskio3+cvdu/9600.COM b/Source/RomDsk/sbc_diskio3+cvdu/9600.COM similarity index 100% rename from Source/RomDsk/n8vem_diskio3+cvdu/9600.COM rename to Source/RomDsk/sbc_diskio3+cvdu/9600.COM diff --git a/Source/RomDsk/sbc_diskio3+cvdu/FD.COM b/Source/RomDsk/sbc_diskio3+cvdu/FD.COM new file mode 100644 index 0000000000000000000000000000000000000000..dcea26ca44b975b9d92b0bc60620a845ea841419 GIT binary patch literal 7974 zcmdTpYjhN4mip5S0`@98<>lX$VOZD*ixjVYnbCGDKC7R^g7V?=rh84zikDh#2eo8G)G8`LN{7NoDYMP{KYq}8+AoG8 z6yp`+RMFF&%AM4XjZ=7|1oYHZ_T9$`|ps##6;wQzXp!!v1(9 zql$^X4u4cCv%#RbWJ-!A6C9vHjxV!iaIkzDdga@(OTLNp$G4Gg_$c%d4aK52h?;Ib zGSv@{{os7^Vn=k-_Z*Llv3pxS@Q+u{dc`0x`odu$IaC`@3)lmrn(|Vnz`q=wc`f z?!U)8g;f4m#zIqmuQB(RM#gJ_Hf#u(yt?Zdok2KCH7nz_GUF%w(C90+d;~40Yh}WB zePyL$cFD?y66Joovb#iPy3O7JN^jIDx44zBOw8Yyy`NGRUC^>TiImx9=1H^nGo%;^ zh1qKMeoX20$S*VPX75LoawA~3n!QH}26hR<6m!;GFy!MVMmDSFTO{UXb3w{KVzNY- zeda<0u?+K)xsb_kH(An5uep#0ESEBYILM|SQZW<`%5Nhf61i$i%I#t2}u&x z-ZSNXYl4|QM#;=hvv&{-6;4ycQknUQ+4~6+MvH{U%-&;^aF%Ko&QUl#nb~Fb4pA1p za7L|rU$9v$aK;~ZZB~ZeO2P%B8QNZVM^|0l_PVy4!J2`(x>EY6412(0{BJSh>ZJ5K z!^m#ADH@A$ZJ}7J$frV*B&HKwMhc}RjfMx6C#R5$iEUzx;4S=0+|wB`EG5%CIl??1 zUD(l}ASQ;|#9||gw(xlE@aa$@l8o~iyaZ5iF6Wc{*bGR-4;)aY{e($7L6@`_sVTo| zDDXG=(R}s1Y3B1dBJI4uZvUKueWk8en+4YAyB1j7TP?6|cUf|s7G*twFB14EfhP!r zZ3xnXRNxaz_?#+C8z)qq6(&52}M)Fw^%l-hZ< zu8VoW=EN<L*qFceQVQ_ofCzWwgER4f1}9(yVDbqV zMwER;7LMa0rmaeU2|=?bt;%8wMh7EP2L)>w=wxAa16?dEP~cux7@`8}S>Xhn%|V!j zUs{z@#0n54R)7u^Izi!T>+&yK3;O&%E8G)VYr&X5Xw5C66s02fmQ@)eP^?6pP|&7= z4i$i?F$;`4sYx2hk;%rnfB{`og7X5mZ75$!!N#3U6{7iTsN95=>7k$rhWa@LGR*5( z%dN07`w6lLhW-oJEBOcoT0r41T*^%@rV*z{y+xRRLq4U=1*5>L1#b3tij+@^l=q4h z*j~eK^~T1#qxN^%C#Z@#T*04F@)0z&1yvu~@@@(kx58iW^FWl9L%0Ls6@=}_N6Fs1 z%q23U)9Lg&9rzmXO%OO87;Uw-g|-qKYfB|#v1p_gZGB3&VE&>-@kUjpigWY01xx>Hr7NS&D<@U1oAJXLK7&!O-t2?JA8IRle=S*<7#yW^?ImPQ|XIu%Y2f3zUAYe6Kz7>+-C=G>ZiCJk=&jra-_J!9?sK!F}BzR6-trD-1XBm;3~xrk5n$I5IfGrZ(2YP(vG z`Xd_qrCxR>97=GaZ_WfmHwz!PmADahcqLwUGydV8Ign23BtY< z_z~c)YyCvhQFP$Zdm&c=x*4Ko6S9EQor(IA{zREA2=1ijz2GutrXf&e52I`*T z)k#{_8j7iCEZNQ_)0{X(A?J6JlorDfNHnHH5M*TFo*;81rpYasNs(#dVS?J!>1oXX zlh}fBNCx5+KGmwu1|LCp4u?*n4>Dvm{D6lYUj2$Ph&E-o>EXZ7!VVjl-kI6Iw=?@^ zdN-6~%#kkZUxFdWZROC6h_eh{1X;O(hF6ai18Om*7E~o6dZ6f}l?70&r4bV=`~SW!-Cdi3y(K`G@goy_yoWz7Y`at zI!vDm)t66=A~~@mEQ%4}3^juP6^CsNzH&U82w}(w4-WX?(Ma*U5|5b+uM8!cMP7vS zn{493tKs2`h-p3&l0ux?LlTxS-I@SvIHVG*aHrv;#>by>PkaKA*t@yKMo8TL8wx5lK*Bu(rP!;=-T)8nK`+d8M&MJ;(q4Dj~RIGFZrfF z{OAq*kw2You-L<;nu~OFMf5`kD8SK~(CgHbIz8yYlafo<D9@jJ@Io)>&Ke z8`d+oVmDi|qGAtgZK-&fHLj`XVNJJH>|^csR=m#A_f=%spv5u~c%Sip;F$ddqpYq{ zuCA7Yr7A66GmU1p97Vo~>3oz*yNJ(Vc>wt?qS-7rBkf%x>sI?HQ)yR`J|0$S%=CUg zQ)$l2&^(u+l~`tBA8DfRY*o+@_<$jUu}*JrSHT6UH5jKiSgQ%MX*x}_)IObdR<(+r zPMfB5Kl33oJS!>O#}4Zq%|bU6yP@1jN(X$Q-Mvq-6+#!bL&G|D*tnamAlAx?yGrO} zNh^SR5!-}dErL4{Yz7ddU;u=7s_`yt{1a@nK;x02t0#o@5HYT0`JdH)!+gaEKV+Me zP<^m#s)NlSf*Q6xn0#&gwJOufZ9QjRs{*EylE4LK;E)WvfjPzqTUd6|G8kR$u$>JW zH4|LI-PrT@+2IFZFdJ}`V1wFvU$rvfl!YI#0l2E+;va*X|FAHM4?y4RhXrMyqi^D{ zz^v6NIR_ygI4tz-JS@m?wfDUR5{lv=_@gKd?@SB>-zaO*foT7dz<1c;HwtfLAFu9j zpht3UhxbE9_<(7@sCh@er@HV){y;VTdCu$Dez>8oD*HtB9N6i%dLUI7W7m7*EL<^@ z8c!GA&Y!L>?8q;4U_5oWI(M}r==j&X!_nWcv959mMFwh=;6$$85iB717Qr_NzD95g z!AS%o2)+OSHVf}F5SH(C2r;&xABQrI#$WHV6?XXCg*SYjn%j}Z>a!t-Vf;=ea+cDj@({Ha16Q6AvlZR z41!SvrvYFHxZlFlg)Ns>3lo2Y;S#U_hvZzQ26BKSYi=hw1YQ0IH4sBTT>~-n zYc&u9Kq}KBCcb|RqX_>>z%;W;RLP@CvttoRO^Hb%*~jQ(B-H2fO$F}gv?+T zq$9`@41Wx(b)OTao;#Jh-6;pnfs;(R&Z6sIQaGL8QA2;3`$-M11X{noCU>6`_`mNg z16(-CEC*)p5Xc4Pz*1d#!`I#YOZvK?edKA^)_=}EkNlHOBTr}Ftogbdiaw;5F9Rk} z`W|7L*6nVeiM~)%hINmwK|glDn|WCIhP z!7gsV3hbONC+w>(C(KXoM^4-xWxkSv&1Y1k>cA*75WX>_O&olDa{v$(>v#?Zp zf5|XLU7{!ds?$kdz$9>|3-bxxuG~Qo5bh`!)^^U5d?=u$Kdw&IEM$xnX zNp##vPu~FJ#hjY7Pe0~)B`>=QW%(+1!I~d+73#;KDvX=lg%D!R zfaPS@X5>;H#dJ5ovTK0Uyt!aFBfB<1*BeXgkO!`SIyap3I+T$2D-G_x67^p*;5&Nd z?RACg>y5*9dD#AYO0F&N`Bm!>uT>G*D9-*(rWHaA(5M_gKNtpjDee>F=v09L|PUj4As-IM>w{Z6MF#5c+v9sJl4<`XwWPC=eU1k!1+X2pFoD%URvEL^mB zNyF0XLXF{w*tCCW4BnAh@D1COUbBbV&Q^>fX-f{2+%C`XQEf_x28NhtJ$ehIhvz)&fkzLPe9m)l1fGZIZ#5kDKX~At$nEoJ2ONtn zd-5kdCxAEiYtMkJM%yG}oj-p*#GqohmBdL&$hxT!llEI0MlX|5)3nfqM7ShM0Zf7% zTAEL#lg$_isR0y3NATNUcqIqv0*s1Cm)O~yIde!pZ(4N60gcer7#d?gU{56z5sa^} zahaHm1OdiV(rPHRz$nOb^X3I1fP+wvhaU#{WK$EbWdOCT-L!n>RBDos#6xN-g5$Yx zxPCdp1q22FCg3j<2GE>}0gPZ(LZ*y_Oc@E8AY24UerV;nm4rt`nM7+GASM%`5R($5 r9sy|%rI0G2Oa}EQ!U$6YVzP+m8j%lvp9O8CSFHY#zsdOPe~tVH;^4p5S0`@98<>lX$VOZD*ixjVYnbCGDKC7R^g7V?=rh84zikDh#2eo8G)G8`LN{7NoDYMP{KYq}8+AoG8 z6yp`+RMFF&%AM4XjZ=7|1oYHZ_T9$`|ps##6;wQzXp!!v1(9 zql$^X4u4cCv%#RbWJ-!A6C9vHjxV!iaIkzDdga@(OTLNp$G4Gg_$c%d4aK52h?;Ib zGSv@{{os7^Vn=k-_Z*Llv3pxS@Q+u{dc`0x`odu$IaC`@3)lmrn(|Vnz`q=wc`f z?!U)8g;f4m#zIqmuQB(RM#gJ_Hf#u(yt?Zdok2KCH7nz_GUF%w(C90+d;~40Yh}WB zePyL$cFD?y66Joovb#iPy3O7JN^jIDx44zBOw8Yyy`NGRUC^>TiImx9=1H^nGo%;^ zh1qKMeoX20$S*VPX75LoawA~3n!QH}26hR<6m!;GFy!MVMmDSFTO{UXb3w{KVzNY- zeda<0u?+K)xsb_kH(An5uep#0ESEBYILM|SQZW<`%5Nhf61i$i%I#t2}u&x z-ZSNXYl4|QM#;=hvv&{-6;4ycQknUQ+4~6+MvH{U%-&;^aF%Ko&QUl#nb~Fb4pA1p za7L|rU$9v$aK;~ZZB~ZeO2P%B8QNZVM^|0l_PVy4!J2`(x>EY6412(0{BJSh>ZJ5K z!^m#ADH@A$ZJ}7J$frV*B&HKwMhc}RjfMx6C#R5$iEUzx;4S=0+|wB`EG5%CIl??1 zUD(l}ASQ;|#9||gw(xlE@aa$@l8o~iyaZ5iF6Wc{*bGR-4;)aY{e($7L6@`_sVTo| zDDXG=(R}s1Y3B1dBJI4uZvUKueWk8en+4YAyB1j7TP?6|cUf|s7G*twFB14EfhP!r zZ3xnXRNxaz_?#+C8z)qq6(&52}M)Fw^%l-hZ< zu8VoW=EN<L*qFceQVQ_ofCzWwgER4f1}9(yVDbqV zMwER;7LMa0rmaeU2|=?bt;%8wMh7EP2L)>w=wxAa16?dEP~cux7@`8}S>Xhn%|V!j zUs{z@#0n54R)7u^Izi!T>+&yK3;O&%E8G)VYr&X5Xw5C66s02fmQ@)eP^?6pP|&7= z4i$i?F$;`4sYx2hk;%rnfB{`og7X5mZ75$!!N#3U6{7iTsN95=>7k$rhWa@LGR*5( z%dN07`w6lLhW-oJEBOcoT0r41T*^%@rV*z{y+xRRLq4U=1*5>L1#b3tij+@^l=q4h z*j~eK^~T1#qxN^%C#Z@#T*04F@)0z&1yvu~@@@(kx58iW^FWl9L%0Ls6@=}_N6Fs1 z%q23U)9Lg&9rzmXO%OO87;Uw-g|-qKYfB|#v1p_gZGB3&VE&>-@kUjpigWY01xx>Hr7NS&D<@U1oAJXLK7&!O-t2?JA8IRle=S*<7#yW^?ImPQ|XIu%Y2f3zUAYe6Kz7>+-C=G>ZiCJk=&jra-_J!9?sK!F}BzR6-trD-1XBm;3~xrk5n$I5IfGrZ(2YP(vG z`Xd_qrCxR>97=GaZ_WfmHwz!PmADahcqLwUGydV8Ign23BtY< z_z~c)YyCvhQFP$Zdm&c=x*4Ko6S9EQor(IA{zREA2=1ijz2GutrXf&e52I`*T z)k#{_8j7iCEZNQ_)0{X(A?J6JlorDfNHnHH5M*TFo*;81rpYasNs(#dVS?J!>1oXX zlh}fBNCx5+KGmwu1|LCp4u?*n4>Dvm{D6lYUj2$Ph&E-o>EXZ7!VVjl-kI6Iw=?@^ zdN-6~%#kkZUxFdWZROC6h_eh{1X;O(hF6ai18Om*7E~o6dZ6f}l?70&r4bV=`~SW!-Cdi3y(K`G@goy_yoWz7Y`at zI!vDm)t66=A~~@mEQ%4}3^juP6^CsNzH&U82w}(w4-WX?(Ma*U5|5b+uM8!cMP7vS zn{493tKs2`h-p3&l0ux?LlTxS-I@SvIHVG*aHrv;#>by>PkaKA*t@yKMo8TL8wx5lK*Bu(rP!;=-T)8nK`+d8M&MJ;(q4Dj~RIGFZrfF z{OAq*kw2You-L<;nu~OFMf5`kD8SK~(CgHbIz8yYlafo<D9@jJ@Io)>&Ke z8`d+oVmDi|qGAtgZK-&fHLj`XVNJJH>|^csR=m#A_f=%spv5u~c%Sip;F$ddqpYq{ zuCA7Yr7A66GmU1p97Vo~>3oz*yNJ(Vc>wt?qS-7rBkf%x>sI?HQ)yR`J|0$S%=CUg zQ)$l2&^(u+l~`tBA8DfRY*o+@_<$jUu}*JrSHT6UH5jKiSgQ%MX*x}_)IObdR<(+r zPMfB5Kl33oJS!>O#}4Zq%|bU6yP@1jN(X$Q-Mvq-6+#!bL&G|D*tnamAlAx?yGrO} zNh^SR5!-}dErL4{Yz7ddU;u=7s_`yt{1a@nK;x02t0#o@5HYT0`JdH)!+gaEKV+Me zP<^m#s)NlSf*Q6xn0#&gwJOufZ9QjRs{*EylE4LK;E)WvfjPzqTUd6|G8kR$u$>JW zH4|LI-PrT@+2IFZFdJ}`V1wFvU$rvfl!YI#0l2E+;va*X|FAHM4?y4RhXrMyqi^D{ zz^v6NIR_ygI4tz-JS@m?wfDUR5{lv=_@gKd?@SB>-zaO*foT7dz<1c;HwtfLAFu9j zpht3UhxbE9_<(7@sCh@er@HV){y;VTdCu$Dez>8oD*HtB9N6i%dLUI7W7m7*EL<^@ z8c!GA&Y!L>?8q;4U_5oWI(M}r==j&X!_nWcv959mMFwh=;6$$85iB717Qr_NzD95g z!AS%o2)+OSHVf}F5SH(C2r;&xABQrI#$WHV6?XXCg*SYjn%j}Z>a!t-Vf;=ea+cDj@({Ha16Q6AvlZR z41!SvrvYFHxZlFlg)Ns>3lo2Y;S#U_hvZzQ26BKSYi=hw1YQ0IH4sBTT>~-n zYc&u9Kq}KBCcb|RqX_>>z%;W;RLP@CvttoRO^Hb%*~jQ(B-H2fO$F}gv?+T zq$9`@41Wx(b)OTao;#Jh-6;pnfs;(R&Z6sIQaGL8QA2;3`$-M11X{noCU>6`_`mNg z16(-CEC*)p5Xc4Pz*1d#!`I#YOZvK?edKA^)_=}EkNlHOBTr}Ftogbdiaw;5F9Rk} z`W|7L*6nVeiM~)%hINmwK|glDn|WCIhP z!7gsV3hbONC+w>(C(KXoM^4-xWxkSv&1Y1k>cA*75WX>_O&olDa{v$(>v#?Zp zf5|XLU7{!ds?$kdz$9>|3-bxxuG~Qo5bh`!)^^U5d?=u$Kdw&IEM$xnX zNp##vPu~FJ#hjY7Pe0~)B`>=QW%(+1!I~d+73#;KDvX=lg%D!R zfaPS@X5>;H#dJ5ovTK0Uyt!aFBfB<1*BeXgkO!`SIyap3I+T$2D-G_x67^p*;5&Nd z?RACg>y5*9dD#AYO0F&N`Bm!>uT>G*D9-*(rWHaA(5M_gKNtpjDee>F=v09L|PUj4As-IM>w{Z6MF#5c+v9sJl4<`XwWPC=eU1k!1+X2pFoD%URvEL^mB zNyF0XLXF{w*tCCW4BnAh@D1COUbBbV&Q^>fX-f{2+%C`XQEf_x28NhtJ$ehIhvz)&fkzLPe9m)l1fGZIZ#5kDKX~At$nEoJ2ONtn zd-5kdCxAEiYtMkJM%yG}oj-p*#GqohmBdL&$hxT!llEI0MlX|5)3nfqM7ShM0Zf7% zTAEL#lg$_isR0y3NATNUcqIqv0*s1Cm)O~yIde!pZ(4N60gcer7#d?gU{56z5sa^} zahaHm1OdiV(rPHRz$nOb^X3I1fP+wvhaU#{WK$EbWdOCT-L!n>RBDos#6xN-g5$Yx zxPCdp1q22FCg3j<2GE>}0gPZ(LZ*y_Oc@E8AY24UerV;nm4rt`nM7+GASM%`5R($5 r9sy|%rI0G2Oa}EQ!U$6YVzP+m8j%lvp9O8CSFHY#zsdOPe~tVH;^4f7}(SZ&PR+yS2tLSR4LL;3~G0MXR1~k3*epTsi z7~HeFGk>O_?{~lZ-S2+)e$RVvPL*zbXI8tDQyz3NKE1NWqx4sKH|mw2dg^qFSqJ3O zhIeMkcXUO#JLb-A<9vO6t?eCca{?Vw8+?9l_1aswWug?~vP;5TZ-CFfWC$5EuNbcQoWg4bm?#5LJmevgkni9 zAtrNNFnDRcMYT3x)-OuAw7}((F=%J<=rd>0vy?>JfBxbw0EEVoI zSt879=5hqFEVI>I&KB-9Su#xCT+RTN&zPV)^v#$C0|o3X3k77~YJ&EyCS{vRdEJC0 z32X0~^1n2}%pRp=<^i*}2#N|PDWa*&{Jq&bhJ;fU!atb3M=4>PiVCMGG*4#!#q9kp zWzh>?sCDl%Hj4#L`Gc@lc|iTO`7mA zb>BC1Ynf+kPTW$=XOy1Nm9~Ik$H0gIHVXI6_QL&DfdQ7#;7$qL$a+sxOq$hGD(4Co zE}^oi@LUya`W39=Y*2y?va+HTz)mF!S6f%uZY}EzuUX-q*kdgl3k7R_9;NK4&%a?+MhR@6fjFU{ zPGubmfUd?NV0?g@q(MJ2**F(qP%GSvK|Uqs0xR%pft&rU3T3Q9dACA= z?e(r(y|MA`XnJkv397ysSMXsfv$R5=M15j^ z8eVXCoTX6wDlVClxV}`T2Q>5ZzpzzRFROmO+EA0L8Mgh}mNrmuObjjQH%vA9`GK~c zB^*CzcE{zMinnqLIQ1IMUd08tY%C%I(%Ht5dlS$|DhE1p5iyyKNdtUi^{nc&fz`7* zgX^!~u-53>XV0CRSfYwlajunX@BE*IcE_UKlOn%eeM_~^VAWeITFz0m?3f(@HPuQh zcPWW;zgEp(Rqq9v(=4Aek65nBB$Z2>{`E5JYnp1(2D{!4rb|x{(*p^ZO;u+5Y^;Fk z9sdW@SJ&KBlc{I6S}%p-L_vqv`9J#X)Oy6z>r_*~si zyR@S&Z;$P%E7-e!U3b8~^xe7S(|=~S(7mm88=V#G z44t~#-bm-7b~hbL+necxWN)FDEwgvf{j2Oc-R<^gYRoe);c2VxIC_uaR3ZV-=|x^S zw>*)}fJ=QXz5o@kSUW#Zptp+eu^3lrnzua3Kpa^v;uHPxTARuYuXvBzuGVAzh{k@g zhn)?FlAP#U>IdH#QD5Aj`lh%Pxz&2NKc>|)A~@M0O$lrleMx^-s!RE86$ zDCD$Gk}_f#LWU)o5QGz1xE08Zh#7L{Wz%F*c$kh}buw~UU=n*U;>bc|!l!ep?R*3s zH#C&Q85t2m6*bU+Cmh~)rWPVg8SZrWFU)6)$C+PTHuQj<*?yV#<~ocn(zPRP7+kEZ zgJwh=wQ%>#N*4|98z~gE7*&gLwV-Cm$}(EIc49)M>qB4+qV z2m*F>gcK}cCYJlzSP`Kcq$f7eER8YlzdlXUUB3@jrmgq0#b0~osCFQ{{zE?|Nm5P2+K?C zCbs5f_Is>(AA285DeQx+VTAo#)>dR6VrxHRA7PpE>P%$7sQ zcWOExrP40oGg$6Hz6)qJ%L=3wNMEZuMy*P7k}+;pY0UI--%@GLOVB)*pjBCB;TT;+ z-l3U6LtvO8##pB}SZBfosx=s=H+-RvW|~gZG__Bs9a8z|>9lD=hnc-haaKxL$rkmF zsPGq1Y=QDGN$G$uv}N}bY`w4?+o55AEgHA5^+a1)vCb5hv7{BiHHfW3kVcS2a07rK z1qKk_sYVGKuf;|SG#(uL#)NPk#D-~>f2i$CW{eT8XQL^oZdyAvzlP?Z@yAj588e!~c>S$0x0u&$|SXM;vf1(%S+k$c(VJz&fVv=Ves zTh}xw6HZy^V*_wi!^J-iH~*WRC*Z|+vy-6ADxI>;A&+#*aG7r`ewo5}c5BKMv^wao zwyuLd%5I0y&%WtHhF}d+@V)88P`87%=#(vvk+#4*wz#XjYv>0JBkgo4PdmJO8DW^| zyP)~r!oN3^cNJb~pg+mabZmUHy?N%)!woI4<8vNJ&ULc4co(p6)l5n}UVfu+w4r=& z;R**vQ2QG4O^%@Bg*8*&)VEq659gJ<*q<_Mlaa2kLh zu>0>B`a8$|wL_0M_TM z^bK2hy1ZKkdtG?I3{2e20``1Ey=}FgypAY>6`6ru7PY!KwJbwoize0N5LSO=+`w7#uVYm29 z^x4K*+&kF*{?wq{p~{$VU24pya7@MtvM+w*rq!p^d1@%?1a+PoN@5pK=P4X+8CGBy zt#!g4TkC|m%7531Tcy@lRkrzz;9v#bXG-A@m{RsIbNLZQ9v?n91{n*>4DbC6W7H*g z6t+8^^jS;+uXJHHVT~*Qx)Z9+kdsCdWE$4EMi1;hp?2NFSZME>dd7@hPyJrkb57C^ zlAG8=xRKp9*FBRC5npKd~*PjNzi1I{SiCQ7G=c@}*?*ze2& z7OEgadDtmWn;U|nIpCpqmo~vRm>6l>URd9>F4|m!ld~43GB?cvG0f7Y^&o^Og~Z>H zoK;9`73Q&EIddy=mU=#52BC&YTV_zD9G;@wtx}FmQshB(w?S4MF%ygnsdF^vc~>1h zwh^ZkCbO0shoX)i-B`SSBWDQCRvvRT-?@`BZ+NxP=BnjBf*$$vP4ak?k zYp(=SbbZ-ya;Iw$hF(|Gj684yG`QiQH@KlD4=XM1{Z;C}DB$<*mNzz+7q=OUcDZQZ zOUX@Tz7TP*Yp&0Cx@Fbr<2b98*H7q5S78aQb`o?#F(89YskU`U`#f)&6dNStN(bS4$Wcu0+- zAV`8A`@-EEA2^;1huan*Y$q@PFbRLz zFo0+}4lsgM37N7IGG!%Xf~XN7`DK;ox(SbneUiBZK+GUQA*LkAHv$q3rI9LOpDfBx fh7qO-#0(M7EkQo`K^CNuQL*|*{wBk)|2OjAdN`w6 literal 0 HcmV?d00001 diff --git a/Source/RomDsk/zeta2_ppide/FDTST.COM b/Source/RomDsk/zeta2_ppide/FDTST.COM deleted file mode 100644 index 9bcf5ba8f13a51e75d0986fbb1dc3e7f1893b087..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7961 zcmdTpYjhjsm3mtv+mdGNSe7M`Q9K7EFE+N45NAjPvSus`>lJBaJ1^3tKsGFGN_iw9 z5a5(9r$BqU?cvduZCTjvp`}X`V3z~}8%qtzC`_9yO><~?8L*Q8PU56aOak)W`_0I4 z($KSy{@F=a`e^%GdtX@@}P$f=#@1-WoecFKE3i&pIxVzbwD27 zcwnY{N4Fs5B=(NkZL`@xuD7*gZu{(x*-}S)M@NvoaqTzRC888zb6rukFT~}x8U$nZ zHAAnlzi3!u?3N8{jD33z8;$V;hVL4MBZfa3qvM7V<3QP<(;1DD-b^jL=(k`2tB#wD z#8YfiOy${d_@bP(wm>c@O8E@W=2LNL;lKb3{6ahe7=BPo3!+w02~su^MM|x$_5b+6 z;Mt%U5hyCqAI!!j5s>a+I-870to8-^f?_t_y%<>IK~RwG%6E5*St=j|^T|x5)-6QY zKs1;Xa%wj*Fc6GOwKg!BO=qNdI>iDSX1Q8h4vpoqFe=xNLvr0@Jg$!n!^L5Ycq9>D zB5JZZ;oLYJj)Swwi34$ogEhw0KcMGFD8=d7 zCVbb_*DDiEva-HPx!IxoTa`?2H2X&=y-}y+yh_K+3X)h zik?vDd(Hk~O0P$LnOE3jEzcR9`)Bn))1Cq@5So?Z+tCSL$jlwZQtUw7}x7w!pf5%~HJ8qO2qE1p+@M z@Hm064WaiDDs-6Qk5T2x(!W}i7c8)BY5p*^0I1sv_gH`fn#X~51ZYPpv?G+P?w9v0 zu&}TXR0+ctMX=&3*YJmc{SdGZT8e}UQ00_?MYgbNhbyXfqHv|(H*(Lm6K5?j0^)ic z6vbd==C%`cRb^eNt_lP~=Rs#tj;2#mJe3!(W&@F6S2`<^nH8n%VnE`-SSp9ecpH>RgRHD-kS*q&%0Jc*Dpy;}r*=3`%6grX5cp1}Jh8j1+g-hW zOW}y6kf(JA_2^N6L z$H9zF<|Uawii_B9Ro<^6XyK$);VG~VEK`kwH4H6hV0A;+F|a_P6%79|6|Y8!5Rd*tnNb<#?%`Dw-(zH42)*)MFI% zp?`z5qF|*<1ep(}f5-DuDNcbD5cnOBvdBZv#pzLR5qcl;DRB>2fmaLM><228!xhTg z6$)&xx4i0&jdw@WYlWw&x@KI#M<{teDjG)7`|kWh1{gQOU-;utCnHC22f`}|+mDNr zy?2pIWLT%u>2*5rHQ<{ha5^yAthPE^CY?ycQ!#jVISu7z+FERI>u4{ydI4qg8Hww( zMX{l^I|42d%aMXyPuR)^@~Nzth)22-Vvzf)?d!;TMSld|d=_O8l-p?gdz+A5RH09y z0dXJ$FE~8TQY3LXn@US;e>&R>ngzL+Y_{s<)my5~H3K!fZNIZ+3=|v_LrZ3_sYX99 z)ZW|0aWqQW zGdhFk=DpS$T}RuTIms?nq>8hxY)9u`7TOb!^-PKUdiCwq0fSX0d6hp~hE}F*x)NFkO0*m>x>PY^pLl+OPtq z&;1{mzNY3IHOY#|y>6V%jt-d3&RMLAeVM>{^S*3>vX9z-=@5Qm-{R?a)28pr33RHMV}%mf^iv#;Gz>&z{5 z)H~B%4v#Z`tz)J$l5TaxDqgX6exN{a72jhqq0%&Od5VEJvaApggNa(3$_%e~uiCEG<3T}V zztF?ZMI$Lz3@i$QZ;WUl5lmkpE<$d#-V=;#^{fa^c0^MG+r>aCm=jqzozOXu0UrWf zb!{9W8%O6IJr{Bnpo<}DIw1=<+_`ul9Zc2QGJ$+B0dl0M+BX4Dq!jJpG5o+UkPN25 zIe|I^9bf9(r_!2VPb?P1geZv>CtsT(jYb$$FNmOVL5l*^9mJ_qvM3)(sAwYH&!)4i zc#c9&>l7&~Mj>SA%0?iZ$ib~ZW<<=AJ1>_ZlfuDt^r@4P&jFLzixEc-A`>o?S8eA6 zbllKT5@%#Z2vyWT1DSblQQ(>XVIT4#vFBh+NVz-_tY}pj{je2y# zmNW4B%iu`J;0}=fCAI&%P@I52P%{h;$1P6f(gvBRTZ%LkSK;FcPbi64mJz2w8+5f( zrvHxdgItUfZeje_sn{Kie}#(O&G^AAXifKWc)!P!nS_WJKCE)(P{E|b^r=vN;z}t=sm9t5FV>a3oNyS7?gtMCNW}}PYnG?h; zCqy7%S4T+05@z!$(1t}S(F%7OK4Dxkp3C9G7!d?m${d@FWP7!RjR=cb3Erx7Uc&t% zM3cf)Jtj(U-gEhcl$)Z717dWlf_sN0&tgS{ZliN@le7Fi=NC^nKYz-3_8I5IR_AHO zdFmbK_z~xyK69Ql(I;x?v3mNrpFVaaeYA%j9iTtGnf_!04G;ST-}EOQ-~GSxr_0Bu^B_a*WxmT8-etbe*p4tiWNOElM;W@z{D^T=bx$xpPu65!D(yTzgXJFNJCA0wtU#JV`c|uB)T%Tu8RIsUMo%C2fJ$>;gyy>lt;#YJ z$A}YoAIu0FLc3{VjCFcL^$fT`wFcw#hSTb3rs*_IQ^$1L2P&U)I>JowQ7k%uMsw zGb4IejK2Yj%~0M*N*8>Q&4W)eb^LYM4h_qg5#wg2j%X_@)ie0z3~2?h0cFJ&>ZyNbLjq&W3 zv?*+LIltJl4*Dp+aq&x;Hv`BJu0aaEH& z6+VsN6aao9v*(_|Ke+a+Ej;Slv%2sT*Pi~ulde7K!p~iMVufG2iqE^kJ$JrPfK}K}vng1OeRA>IM#%b&E|o~uKv!DT2vPHo8X;86 zza>o5hTR-6IVT!xaqnRJ`{xE_->Z!I`-_eFG>%#C2H6)ra+UfyU7jw)+@QGiFORxf4XssJI*jhJCRPkGG+$XhxsirMVv{9GZR@&-zJ0~#zyV8THgf*VxZZ}k$At8+El&Ti)b6Qe4?~aQ*(P~B z%t8yyb+}b4d97Tim9<)F)5@htX11HOAf;@wlF{)+*A@1VS? zxqMB#al|2yI9{jZrZQI&yz83lik)6r_4ruUYUT8ky3w5I9gW7kv*KQyWyp&?NAhAF zp3$WuY+oPfG1?pR!rsMoROYM6_ccVnTRbgsFIkff9xapBi+%hL%v4?mEp?^+UQl(r zx46=aG?y1eZT;g)@3zuD?|-iJLics@zyLSCpZedX{76?+5W9B{kHZ@>6TT5g+CSl?HZgT$NSan18kEG%Li9O@z*}>Ok;89 z3#E5`p8#+1XTBksgr6*lTHD&%APyCyc@it7AfTXb%es0*s8vkT_UNOAE>1O^fhYpb7pk`s~f7}(SZ&PR+yS2tLSR4LL;3~G0MXR1~k3*epTsi z7~HeFGk>O_?{~lZ-S2+)e$RVvPL*zbXI8tDQyz3NKE1NWqx4sKH|mw2dg^qFSqJ3O zhIeMkcXUO#JLb-A<9vO6t?eCca{?Vw8+?9l_1aswWug?~vP;5TZ-CFfWC$5EuNbcQoWg4bm?#5LJmevgkni9 zAtrNNFnDRcMYT3x)-OuAw7}((F=%J<=rd>0vy?>JfBxbw0EEVoI zSt879=5hqFEVI>I&KB-9Su#xCT+RTN&zPV)^v#$C0|o3X3k77~YJ&EyCS{vRdEJC0 z32X0~^1n2}%pRp=<^i*}2#N|PDWa*&{Jq&bhJ;fU!atb3M=4>PiVCMGG*4#!#q9kp zWzh>?sCDl%Hj4#L`Gc@lc|iTO`7mA zb>BC1Ynf+kPTW$=XOy1Nm9~Ik$H0gIHVXI6_QL&DfdQ7#;7$qL$a+sxOq$hGD(4Co zE}^oi@LUya`W39=Y*2y?va+HTz)mF!S6f%uZY}EzuUX-q*kdgl3k7R_9;NK4&%a?+MhR@6fjFU{ zPGubmfUd?NV0?g@q(MJ2**F(qP%GSvK|Uqs0xR%pft&rU3T3Q9dACA= z?e(r(y|MA`XnJkv397ysSMXsfv$R5=M15j^ z8eVXCoTX6wDlVClxV}`T2Q>5ZzpzzRFROmO+EA0L8Mgh}mNrmuObjjQH%vA9`GK~c zB^*CzcE{zMinnqLIQ1IMUd08tY%C%I(%Ht5dlS$|DhE1p5iyyKNdtUi^{nc&fz`7* zgX^!~u-53>XV0CRSfYwlajunX@BE*IcE_UKlOn%eeM_~^VAWeITFz0m?3f(@HPuQh zcPWW;zgEp(Rqq9v(=4Aek65nBB$Z2>{`E5JYnp1(2D{!4rb|x{(*p^ZO;u+5Y^;Fk z9sdW@SJ&KBlc{I6S}%p-L_vqv`9J#X)Oy6z>r_*~si zyR@S&Z;$P%E7-e!U3b8~^xe7S(|=~S(7mm88=V#G z44t~#-bm-7b~hbL+necxWN)FDEwgvf{j2Oc-R<^gYRoe);c2VxIC_uaR3ZV-=|x^S zw>*)}fJ=QXz5o@kSUW#Zptp+eu^3lrnzua3Kpa^v;uHPxTARuYuXvBzuGVAzh{k@g zhn)?FlAP#U>IdH#QD5Aj`lh%Pxz&2NKc>|)A~@M0O$lrleMx^-s!RE86$ zDCD$Gk}_f#LWU)o5QGz1xE08Zh#7L{Wz%F*c$kh}buw~UU=n*U;>bc|!l!ep?R*3s zH#C&Q85t2m6*bU+Cmh~)rWPVg8SZrWFU)6)$C+PTHuQj<*?yV#<~ocn(zPRP7+kEZ zgJwh=wQ%>#N*4|98z~gE7*&gLwV-Cm$}(EIc49)M>qB4+qV z2m*F>gcK}cCYJlzSP`Kcq$f7eER8YlzdlXUUB3@jrmgq0#b0~osCFQ{{zE?|Nm5P2+K?C zCbs5f_Is>(AA285DeQx+VTAo#)>dR6VrxHRA7PpE>P%$7sQ zcWOExrP40oGg$6Hz6)qJ%L=3wNMEZuMy*P7k}+;pY0UI--%@GLOVB)*pjBCB;TT;+ z-l3U6LtvO8##pB}SZBfosx=s=H+-RvW|~gZG__Bs9a8z|>9lD=hnc-haaKxL$rkmF zsPGq1Y=QDGN$G$uv}N}bY`w4?+o55AEgHA5^+a1)vCb5hv7{BiHHfW3kVcS2a07rK z1qKk_sYVGKuf;|SG#(uL#)NPk#D-~>f2i$CW{eT8XQL^oZdyAvzlP?Z@yAj588e!~c>S$0x0u&$|SXM;vf1(%S+k$c(VJz&fVv=Ves zTh}xw6HZy^V*_wi!^J-iH~*WRC*Z|+vy-6ADxI>;A&+#*aG7r`ewo5}c5BKMv^wao zwyuLd%5I0y&%WtHhF}d+@V)88P`87%=#(vvk+#4*wz#XjYv>0JBkgo4PdmJO8DW^| zyP)~r!oN3^cNJb~pg+mabZmUHy?N%)!woI4<8vNJ&ULc4co(p6)l5n}UVfu+w4r=& z;R**vQ2QG4O^%@Bg*8*&)VEq659gJ<*q<_Mlaa2kLh zu>0>B`a8$|wL_0M_TM z^bK2hy1ZKkdtG?I3{2e20``1Ey=}FgypAY>6`6ru7PY!KwJbwoize0N5LSO=+`w7#uVYm29 z^x4K*+&kF*{?wq{p~{$VU24pya7@MtvM+w*rq!p^d1@%?1a+PoN@5pK=P4X+8CGBy zt#!g4TkC|m%7531Tcy@lRkrzz;9v#bXG-A@m{RsIbNLZQ9v?n91{n*>4DbC6W7H*g z6t+8^^jS;+uXJHHVT~*Qx)Z9+kdsCdWE$4EMi1;hp?2NFSZME>dd7@hPyJrkb57C^ zlAG8=xRKp9*FBRC5npKd~*PjNzi1I{SiCQ7G=c@}*?*ze2& z7OEgadDtmWn;U|nIpCpqmo~vRm>6l>URd9>F4|m!ld~43GB?cvG0f7Y^&o^Og~Z>H zoK;9`73Q&EIddy=mU=#52BC&YTV_zD9G;@wtx}FmQshB(w?S4MF%ygnsdF^vc~>1h zwh^ZkCbO0shoX)i-B`SSBWDQCRvvRT-?@`BZ+NxP=BnjBf*$$vP4ak?k zYp(=SbbZ-ya;Iw$hF(|Gj684yG`QiQH@KlD4=XM1{Z;C}DB$<*mNzz+7q=OUcDZQZ zOUX@Tz7TP*Yp&0Cx@Fbr<2b98*H7q5S78aQb`o?#F(89YskU`U`#f)&6dNStN(bS4$Wcu0+- zAV`8A`@-EEA2^;1huan*Y$q@PFbRLz zFo0+}4lsgM37N7IGG!%Xf~XN7`DK;ox(SbneUiBZK+GUQA*LkAHv$q3rI9LOpDfBx fh7qO-#0(M7EkQo`K^CNuQL*|*{wBk)|2OjAdN`w6 literal 0 HcmV?d00001 diff --git a/Source/RomDsk/zeta2_ppisd/FDTST.COM b/Source/RomDsk/zeta2_ppisd/FDTST.COM deleted file mode 100644 index 9bcf5ba8f13a51e75d0986fbb1dc3e7f1893b087..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7961 zcmdTpYjhjsm3mtv+mdGNSe7M`Q9K7EFE+N45NAjPvSus`>lJBaJ1^3tKsGFGN_iw9 z5a5(9r$BqU?cvduZCTjvp`}X`V3z~}8%qtzC`_9yO><~?8L*Q8PU56aOak)W`_0I4 z($KSy{@F=a`e^%GdtX@@}P$f=#@1-WoecFKE3i&pIxVzbwD27 zcwnY{N4Fs5B=(NkZL`@xuD7*gZu{(x*-}S)M@NvoaqTzRC888zb6rukFT~}x8U$nZ zHAAnlzi3!u?3N8{jD33z8;$V;hVL4MBZfa3qvM7V<3QP<(;1DD-b^jL=(k`2tB#wD z#8YfiOy${d_@bP(wm>c@O8E@W=2LNL;lKb3{6ahe7=BPo3!+w02~su^MM|x$_5b+6 z;Mt%U5hyCqAI!!j5s>a+I-870to8-^f?_t_y%<>IK~RwG%6E5*St=j|^T|x5)-6QY zKs1;Xa%wj*Fc6GOwKg!BO=qNdI>iDSX1Q8h4vpoqFe=xNLvr0@Jg$!n!^L5Ycq9>D zB5JZZ;oLYJj)Swwi34$ogEhw0KcMGFD8=d7 zCVbb_*DDiEva-HPx!IxoTa`?2H2X&=y-}y+yh_K+3X)h zik?vDd(Hk~O0P$LnOE3jEzcR9`)Bn))1Cq@5So?Z+tCSL$jlwZQtUw7}x7w!pf5%~HJ8qO2qE1p+@M z@Hm064WaiDDs-6Qk5T2x(!W}i7c8)BY5p*^0I1sv_gH`fn#X~51ZYPpv?G+P?w9v0 zu&}TXR0+ctMX=&3*YJmc{SdGZT8e}UQ00_?MYgbNhbyXfqHv|(H*(Lm6K5?j0^)ic z6vbd==C%`cRb^eNt_lP~=Rs#tj;2#mJe3!(W&@F6S2`<^nH8n%VnE`-SSp9ecpH>RgRHD-kS*q&%0Jc*Dpy;}r*=3`%6grX5cp1}Jh8j1+g-hW zOW}y6kf(JA_2^N6L z$H9zF<|Uawii_B9Ro<^6XyK$);VG~VEK`kwH4H6hV0A;+F|a_P6%79|6|Y8!5Rd*tnNb<#?%`Dw-(zH42)*)MFI% zp?`z5qF|*<1ep(}f5-DuDNcbD5cnOBvdBZv#pzLR5qcl;DRB>2fmaLM><228!xhTg z6$)&xx4i0&jdw@WYlWw&x@KI#M<{teDjG)7`|kWh1{gQOU-;utCnHC22f`}|+mDNr zy?2pIWLT%u>2*5rHQ<{ha5^yAthPE^CY?ycQ!#jVISu7z+FERI>u4{ydI4qg8Hww( zMX{l^I|42d%aMXyPuR)^@~Nzth)22-Vvzf)?d!;TMSld|d=_O8l-p?gdz+A5RH09y z0dXJ$FE~8TQY3LXn@US;e>&R>ngzL+Y_{s<)my5~H3K!fZNIZ+3=|v_LrZ3_sYX99 z)ZW|0aWqQW zGdhFk=DpS$T}RuTIms?nq>8hxY)9u`7TOb!^-PKUdiCwq0fSX0d6hp~hE}F*x)NFkO0*m>x>PY^pLl+OPtq z&;1{mzNY3IHOY#|y>6V%jt-d3&RMLAeVM>{^S*3>vX9z-=@5Qm-{R?a)28pr33RHMV}%mf^iv#;Gz>&z{5 z)H~B%4v#Z`tz)J$l5TaxDqgX6exN{a72jhqq0%&Od5VEJvaApggNa(3$_%e~uiCEG<3T}V zztF?ZMI$Lz3@i$QZ;WUl5lmkpE<$d#-V=;#^{fa^c0^MG+r>aCm=jqzozOXu0UrWf zb!{9W8%O6IJr{Bnpo<}DIw1=<+_`ul9Zc2QGJ$+B0dl0M+BX4Dq!jJpG5o+UkPN25 zIe|I^9bf9(r_!2VPb?P1geZv>CtsT(jYb$$FNmOVL5l*^9mJ_qvM3)(sAwYH&!)4i zc#c9&>l7&~Mj>SA%0?iZ$ib~ZW<<=AJ1>_ZlfuDt^r@4P&jFLzixEc-A`>o?S8eA6 zbllKT5@%#Z2vyWT1DSblQQ(>XVIT4#vFBh+NVz-_tY}pj{je2y# zmNW4B%iu`J;0}=fCAI&%P@I52P%{h;$1P6f(gvBRTZ%LkSK;FcPbi64mJz2w8+5f( zrvHxdgItUfZeje_sn{Kie}#(O&G^AAXifKWc)!P!nS_WJKCE)(P{E|b^r=vN;z}t=sm9t5FV>a3oNyS7?gtMCNW}}PYnG?h; zCqy7%S4T+05@z!$(1t}S(F%7OK4Dxkp3C9G7!d?m${d@FWP7!RjR=cb3Erx7Uc&t% zM3cf)Jtj(U-gEhcl$)Z717dWlf_sN0&tgS{ZliN@le7Fi=NC^nKYz-3_8I5IR_AHO zdFmbK_z~xyK69Ql(I;x?v3mNrpFVaaeYA%j9iTtGnf_!04G;ST-}EOQ-~GSxr_0Bu^B_a*WxmT8-etbe*p4tiWNOElM;W@z{D^T=bx$xpPu65!D(yTzgXJFNJCA0wtU#JV`c|uB)T%Tu8RIsUMo%C2fJ$>;gyy>lt;#YJ z$A}YoAIu0FLc3{VjCFcL^$fT`wFcw#hSTb3rs*_IQ^$1L2P&U)I>JowQ7k%uMsw zGb4IejK2Yj%~0M*N*8>Q&4W)eb^LYM4h_qg5#wg2j%X_@)ie0z3~2?h0cFJ&>ZyNbLjq&W3 zv?*+LIltJl4*Dp+aq&x;Hv`BJu0aaEH& z6+VsN6aao9v*(_|Ke+a+Ej;Slv%2sT*Pi~ulde7K!p~iMVufG2iqE^kJ$JrPfK}K}vng1OeRA>IM#%b&E|o~uKv!DT2vPHo8X;86 zza>o5hTR-6IVT!xaqnRJ`{xE_->Z!I`-_eFG>%#C2H6)ra+UfyU7jw)+@QGiFORxf4XssJI*jhJCRPkGG+$XhxsirMVv{9GZR@&-zJ0~#zyV8THgf*VxZZ}k$At8+El&Ti)b6Qe4?~aQ*(P~B z%t8yyb+}b4d97Tim9<)F)5@htX11HOAf;@wlF{)+*A@1VS? zxqMB#al|2yI9{jZrZQI&yz83lik)6r_4ruUYUT8ky3w5I9gW7kv*KQyWyp&?NAhAF zp3$WuY+oPfG1?pR!rsMoROYM6_ccVnTRbgsFIkff9xapBi+%hL%v4?mEp?^+UQl(r zx46=aG?y1eZT;g)@3zuD?|-iJLics@zyLSCpZedX{76?+5W9B{kHZ@>6TT5g+CSl?HZgT$NSan18kEG%Li9O@z*}>Ok;89 z3#E5`p8#+1XTBksgr6*lTHD&%APyCyc@it7AfTXb%es0*s8vkT_UNOAE>1O^fhYpb7pk`s~f7}(SZ&PR+yS2tLSR4LL;3~G0MXR1~k3*epTsi z7~HeFGk>O_?{~lZ-S2+)e$RVvPL*zbXI8tDQyz3NKE1NWqx4sKH|mw2dg^qFSqJ3O zhIeMkcXUO#JLb-A<9vO6t?eCca{?Vw8+?9l_1aswWug?~vP;5TZ-CFfWC$5EuNbcQoWg4bm?#5LJmevgkni9 zAtrNNFnDRcMYT3x)-OuAw7}((F=%J<=rd>0vy?>JfBxbw0EEVoI zSt879=5hqFEVI>I&KB-9Su#xCT+RTN&zPV)^v#$C0|o3X3k77~YJ&EyCS{vRdEJC0 z32X0~^1n2}%pRp=<^i*}2#N|PDWa*&{Jq&bhJ;fU!atb3M=4>PiVCMGG*4#!#q9kp zWzh>?sCDl%Hj4#L`Gc@lc|iTO`7mA zb>BC1Ynf+kPTW$=XOy1Nm9~Ik$H0gIHVXI6_QL&DfdQ7#;7$qL$a+sxOq$hGD(4Co zE}^oi@LUya`W39=Y*2y?va+HTz)mF!S6f%uZY}EzuUX-q*kdgl3k7R_9;NK4&%a?+MhR@6fjFU{ zPGubmfUd?NV0?g@q(MJ2**F(qP%GSvK|Uqs0xR%pft&rU3T3Q9dACA= z?e(r(y|MA`XnJkv397ysSMXsfv$R5=M15j^ z8eVXCoTX6wDlVClxV}`T2Q>5ZzpzzRFROmO+EA0L8Mgh}mNrmuObjjQH%vA9`GK~c zB^*CzcE{zMinnqLIQ1IMUd08tY%C%I(%Ht5dlS$|DhE1p5iyyKNdtUi^{nc&fz`7* zgX^!~u-53>XV0CRSfYwlajunX@BE*IcE_UKlOn%eeM_~^VAWeITFz0m?3f(@HPuQh zcPWW;zgEp(Rqq9v(=4Aek65nBB$Z2>{`E5JYnp1(2D{!4rb|x{(*p^ZO;u+5Y^;Fk z9sdW@SJ&KBlc{I6S}%p-L_vqv`9J#X)Oy6z>r_*~si zyR@S&Z;$P%E7-e!U3b8~^xe7S(|=~S(7mm88=V#G z44t~#-bm-7b~hbL+necxWN)FDEwgvf{j2Oc-R<^gYRoe);c2VxIC_uaR3ZV-=|x^S zw>*)}fJ=QXz5o@kSUW#Zptp+eu^3lrnzua3Kpa^v;uHPxTARuYuXvBzuGVAzh{k@g zhn)?FlAP#U>IdH#QD5Aj`lh%Pxz&2NKc>|)A~@M0O$lrleMx^-s!RE86$ zDCD$Gk}_f#LWU)o5QGz1xE08Zh#7L{Wz%F*c$kh}buw~UU=n*U;>bc|!l!ep?R*3s zH#C&Q85t2m6*bU+Cmh~)rWPVg8SZrWFU)6)$C+PTHuQj<*?yV#<~ocn(zPRP7+kEZ zgJwh=wQ%>#N*4|98z~gE7*&gLwV-Cm$}(EIc49)M>qB4+qV z2m*F>gcK}cCYJlzSP`Kcq$f7eER8YlzdlXUUB3@jrmgq0#b0~osCFQ{{zE?|Nm5P2+K?C zCbs5f_Is>(AA285DeQx+VTAo#)>dR6VrxHRA7PpE>P%$7sQ zcWOExrP40oGg$6Hz6)qJ%L=3wNMEZuMy*P7k}+;pY0UI--%@GLOVB)*pjBCB;TT;+ z-l3U6LtvO8##pB}SZBfosx=s=H+-RvW|~gZG__Bs9a8z|>9lD=hnc-haaKxL$rkmF zsPGq1Y=QDGN$G$uv}N}bY`w4?+o55AEgHA5^+a1)vCb5hv7{BiHHfW3kVcS2a07rK z1qKk_sYVGKuf;|SG#(uL#)NPk#D-~>f2i$CW{eT8XQL^oZdyAvzlP?Z@yAj588e!~c>S$0x0u&$|SXM;vf1(%S+k$c(VJz&fVv=Ves zTh}xw6HZy^V*_wi!^J-iH~*WRC*Z|+vy-6ADxI>;A&+#*aG7r`ewo5}c5BKMv^wao zwyuLd%5I0y&%WtHhF}d+@V)88P`87%=#(vvk+#4*wz#XjYv>0JBkgo4PdmJO8DW^| zyP)~r!oN3^cNJb~pg+mabZmUHy?N%)!woI4<8vNJ&ULc4co(p6)l5n}UVfu+w4r=& z;R**vQ2QG4O^%@Bg*8*&)VEq659gJ<*q<_Mlaa2kLh zu>0>B`a8$|wL_0M_TM z^bK2hy1ZKkdtG?I3{2e20``1Ey=}FgypAY>6`6ru7PY!KwJbwoize0N5LSO=+`w7#uVYm29 z^x4K*+&kF*{?wq{p~{$VU24pya7@MtvM+w*rq!p^d1@%?1a+PoN@5pK=P4X+8CGBy zt#!g4TkC|m%7531Tcy@lRkrzz;9v#bXG-A@m{RsIbNLZQ9v?n91{n*>4DbC6W7H*g z6t+8^^jS;+uXJHHVT~*Qx)Z9+kdsCdWE$4EMi1;hp?2NFSZME>dd7@hPyJrkb57C^ zlAG8=xRKp9*FBRC5npKd~*PjNzi1I{SiCQ7G=c@}*?*ze2& z7OEgadDtmWn;U|nIpCpqmo~vRm>6l>URd9>F4|m!ld~43GB?cvG0f7Y^&o^Og~Z>H zoK;9`73Q&EIddy=mU=#52BC&YTV_zD9G;@wtx}FmQshB(w?S4MF%ygnsdF^vc~>1h zwh^ZkCbO0shoX)i-B`SSBWDQCRvvRT-?@`BZ+NxP=BnjBf*$$vP4ak?k zYp(=SbbZ-ya;Iw$hF(|Gj684yG`QiQH@KlD4=XM1{Z;C}DB$<*mNzz+7q=OUcDZQZ zOUX@Tz7TP*Yp&0Cx@Fbr<2b98*H7q5S78aQb`o?#F(89YskU`U`#f)&6dNStN(bS4$Wcu0+- zAV`8A`@-EEA2^;1huan*Y$q@PFbRLz zFo0+}4lsgM37N7IGG!%Xf~XN7`DK;ox(SbneUiBZK+GUQA*LkAHv$q3rI9LOpDfBx fh7qO-#0(M7EkQo`K^CNuQL*|*{wBk)|2OjAdN`w6 literal 0 HcmV?d00001 diff --git a/Source/RomDsk/zeta2_ppp/FDTST.COM b/Source/RomDsk/zeta2_ppp/FDTST.COM deleted file mode 100644 index 9bcf5ba8f13a51e75d0986fbb1dc3e7f1893b087..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7961 zcmdTpYjhjsm3mtv+mdGNSe7M`Q9K7EFE+N45NAjPvSus`>lJBaJ1^3tKsGFGN_iw9 z5a5(9r$BqU?cvduZCTjvp`}X`V3z~}8%qtzC`_9yO><~?8L*Q8PU56aOak)W`_0I4 z($KSy{@F=a`e^%GdtX@@}P$f=#@1-WoecFKE3i&pIxVzbwD27 zcwnY{N4Fs5B=(NkZL`@xuD7*gZu{(x*-}S)M@NvoaqTzRC888zb6rukFT~}x8U$nZ zHAAnlzi3!u?3N8{jD33z8;$V;hVL4MBZfa3qvM7V<3QP<(;1DD-b^jL=(k`2tB#wD z#8YfiOy${d_@bP(wm>c@O8E@W=2LNL;lKb3{6ahe7=BPo3!+w02~su^MM|x$_5b+6 z;Mt%U5hyCqAI!!j5s>a+I-870to8-^f?_t_y%<>IK~RwG%6E5*St=j|^T|x5)-6QY zKs1;Xa%wj*Fc6GOwKg!BO=qNdI>iDSX1Q8h4vpoqFe=xNLvr0@Jg$!n!^L5Ycq9>D zB5JZZ;oLYJj)Swwi34$ogEhw0KcMGFD8=d7 zCVbb_*DDiEva-HPx!IxoTa`?2H2X&=y-}y+yh_K+3X)h zik?vDd(Hk~O0P$LnOE3jEzcR9`)Bn))1Cq@5So?Z+tCSL$jlwZQtUw7}x7w!pf5%~HJ8qO2qE1p+@M z@Hm064WaiDDs-6Qk5T2x(!W}i7c8)BY5p*^0I1sv_gH`fn#X~51ZYPpv?G+P?w9v0 zu&}TXR0+ctMX=&3*YJmc{SdGZT8e}UQ00_?MYgbNhbyXfqHv|(H*(Lm6K5?j0^)ic z6vbd==C%`cRb^eNt_lP~=Rs#tj;2#mJe3!(W&@F6S2`<^nH8n%VnE`-SSp9ecpH>RgRHD-kS*q&%0Jc*Dpy;}r*=3`%6grX5cp1}Jh8j1+g-hW zOW}y6kf(JA_2^N6L z$H9zF<|Uawii_B9Ro<^6XyK$);VG~VEK`kwH4H6hV0A;+F|a_P6%79|6|Y8!5Rd*tnNb<#?%`Dw-(zH42)*)MFI% zp?`z5qF|*<1ep(}f5-DuDNcbD5cnOBvdBZv#pzLR5qcl;DRB>2fmaLM><228!xhTg z6$)&xx4i0&jdw@WYlWw&x@KI#M<{teDjG)7`|kWh1{gQOU-;utCnHC22f`}|+mDNr zy?2pIWLT%u>2*5rHQ<{ha5^yAthPE^CY?ycQ!#jVISu7z+FERI>u4{ydI4qg8Hww( zMX{l^I|42d%aMXyPuR)^@~Nzth)22-Vvzf)?d!;TMSld|d=_O8l-p?gdz+A5RH09y z0dXJ$FE~8TQY3LXn@US;e>&R>ngzL+Y_{s<)my5~H3K!fZNIZ+3=|v_LrZ3_sYX99 z)ZW|0aWqQW zGdhFk=DpS$T}RuTIms?nq>8hxY)9u`7TOb!^-PKUdiCwq0fSX0d6hp~hE}F*x)NFkO0*m>x>PY^pLl+OPtq z&;1{mzNY3IHOY#|y>6V%jt-d3&RMLAeVM>{^S*3>vX9z-=@5Qm-{R?a)28pr33RHMV}%mf^iv#;Gz>&z{5 z)H~B%4v#Z`tz)J$l5TaxDqgX6exN{a72jhqq0%&Od5VEJvaApggNa(3$_%e~uiCEG<3T}V zztF?ZMI$Lz3@i$QZ;WUl5lmkpE<$d#-V=;#^{fa^c0^MG+r>aCm=jqzozOXu0UrWf zb!{9W8%O6IJr{Bnpo<}DIw1=<+_`ul9Zc2QGJ$+B0dl0M+BX4Dq!jJpG5o+UkPN25 zIe|I^9bf9(r_!2VPb?P1geZv>CtsT(jYb$$FNmOVL5l*^9mJ_qvM3)(sAwYH&!)4i zc#c9&>l7&~Mj>SA%0?iZ$ib~ZW<<=AJ1>_ZlfuDt^r@4P&jFLzixEc-A`>o?S8eA6 zbllKT5@%#Z2vyWT1DSblQQ(>XVIT4#vFBh+NVz-_tY}pj{je2y# zmNW4B%iu`J;0}=fCAI&%P@I52P%{h;$1P6f(gvBRTZ%LkSK;FcPbi64mJz2w8+5f( zrvHxdgItUfZeje_sn{Kie}#(O&G^AAXifKWc)!P!nS_WJKCE)(P{E|b^r=vN;z}t=sm9t5FV>a3oNyS7?gtMCNW}}PYnG?h; zCqy7%S4T+05@z!$(1t}S(F%7OK4Dxkp3C9G7!d?m${d@FWP7!RjR=cb3Erx7Uc&t% zM3cf)Jtj(U-gEhcl$)Z717dWlf_sN0&tgS{ZliN@le7Fi=NC^nKYz-3_8I5IR_AHO zdFmbK_z~xyK69Ql(I;x?v3mNrpFVaaeYA%j9iTtGnf_!04G;ST-}EOQ-~GSxr_0Bu^B_a*WxmT8-etbe*p4tiWNOElM;W@z{D^T=bx$xpPu65!D(yTzgXJFNJCA0wtU#JV`c|uB)T%Tu8RIsUMo%C2fJ$>;gyy>lt;#YJ z$A}YoAIu0FLc3{VjCFcL^$fT`wFcw#hSTb3rs*_IQ^$1L2P&U)I>JowQ7k%uMsw zGb4IejK2Yj%~0M*N*8>Q&4W)eb^LYM4h_qg5#wg2j%X_@)ie0z3~2?h0cFJ&>ZyNbLjq&W3 zv?*+LIltJl4*Dp+aq&x;Hv`BJu0aaEH& z6+VsN6aao9v*(_|Ke+a+Ej;Slv%2sT*Pi~ulde7K!p~iMVufG2iqE^kJ$JrPfK}K}vng1OeRA>IM#%b&E|o~uKv!DT2vPHo8X;86 zza>o5hTR-6IVT!xaqnRJ`{xE_->Z!I`-_eFG>%#C2H6)ra+UfyU7jw)+@QGiFORxf4XssJI*jhJCRPkGG+$XhxsirMVv{9GZR@&-zJ0~#zyV8THgf*VxZZ}k$At8+El&Ti)b6Qe4?~aQ*(P~B z%t8yyb+}b4d97Tim9<)F)5@htX11HOAf;@wlF{)+*A@1VS? zxqMB#al|2yI9{jZrZQI&yz83lik)6r_4ruUYUT8ky3w5I9gW7kv*KQyWyp&?NAhAF zp3$WuY+oPfG1?pR!rsMoROYM6_ccVnTRbgsFIkff9xapBi+%hL%v4?mEp?^+UQl(r zx46=aG?y1eZT;g)@3zuD?|-iJLics@zyLSCpZedX{76?+5W9B{kHZ@>6TT5g+CSl?HZgT$NSan18kEG%Li9O@z*}>Ok;89 z3#E5`p8#+1XTBksgr6*lTHD&%APyCyc@it7AfTXb%es0*s8vkT_UNOAE>1O^fhYpb7pk`s~f7}(SZ&PR+yS2tLSR4LL;3~G0MXR1~k3*epTsi z7~HeFGk>O_?{~lZ-S2+)e$RVvPL*zbXI8tDQyz3NKE1NWqx4sKH|mw2dg^qFSqJ3O zhIeMkcXUO#JLb-A<9vO6t?eCca{?Vw8+?9l_1aswWug?~vP;5TZ-CFfWC$5EuNbcQoWg4bm?#5LJmevgkni9 zAtrNNFnDRcMYT3x)-OuAw7}((F=%J<=rd>0vy?>JfBxbw0EEVoI zSt879=5hqFEVI>I&KB-9Su#xCT+RTN&zPV)^v#$C0|o3X3k77~YJ&EyCS{vRdEJC0 z32X0~^1n2}%pRp=<^i*}2#N|PDWa*&{Jq&bhJ;fU!atb3M=4>PiVCMGG*4#!#q9kp zWzh>?sCDl%Hj4#L`Gc@lc|iTO`7mA zb>BC1Ynf+kPTW$=XOy1Nm9~Ik$H0gIHVXI6_QL&DfdQ7#;7$qL$a+sxOq$hGD(4Co zE}^oi@LUya`W39=Y*2y?va+HTz)mF!S6f%uZY}EzuUX-q*kdgl3k7R_9;NK4&%a?+MhR@6fjFU{ zPGubmfUd?NV0?g@q(MJ2**F(qP%GSvK|Uqs0xR%pft&rU3T3Q9dACA= z?e(r(y|MA`XnJkv397ysSMXsfv$R5=M15j^ z8eVXCoTX6wDlVClxV}`T2Q>5ZzpzzRFROmO+EA0L8Mgh}mNrmuObjjQH%vA9`GK~c zB^*CzcE{zMinnqLIQ1IMUd08tY%C%I(%Ht5dlS$|DhE1p5iyyKNdtUi^{nc&fz`7* zgX^!~u-53>XV0CRSfYwlajunX@BE*IcE_UKlOn%eeM_~^VAWeITFz0m?3f(@HPuQh zcPWW;zgEp(Rqq9v(=4Aek65nBB$Z2>{`E5JYnp1(2D{!4rb|x{(*p^ZO;u+5Y^;Fk z9sdW@SJ&KBlc{I6S}%p-L_vqv`9J#X)Oy6z>r_*~si zyR@S&Z;$P%E7-e!U3b8~^xe7S(|=~S(7mm88=V#G z44t~#-bm-7b~hbL+necxWN)FDEwgvf{j2Oc-R<^gYRoe);c2VxIC_uaR3ZV-=|x^S zw>*)}fJ=QXz5o@kSUW#Zptp+eu^3lrnzua3Kpa^v;uHPxTARuYuXvBzuGVAzh{k@g zhn)?FlAP#U>IdH#QD5Aj`lh%Pxz&2NKc>|)A~@M0O$lrleMx^-s!RE86$ zDCD$Gk}_f#LWU)o5QGz1xE08Zh#7L{Wz%F*c$kh}buw~UU=n*U;>bc|!l!ep?R*3s zH#C&Q85t2m6*bU+Cmh~)rWPVg8SZrWFU)6)$C+PTHuQj<*?yV#<~ocn(zPRP7+kEZ zgJwh=wQ%>#N*4|98z~gE7*&gLwV-Cm$}(EIc49)M>qB4+qV z2m*F>gcK}cCYJlzSP`Kcq$f7eER8YlzdlXUUB3@jrmgq0#b0~osCFQ{{zE?|Nm5P2+K?C zCbs5f_Is>(AA285DeQx+VTAo#)>dR6VrxHRA7PpE>P%$7sQ zcWOExrP40oGg$6Hz6)qJ%L=3wNMEZuMy*P7k}+;pY0UI--%@GLOVB)*pjBCB;TT;+ z-l3U6LtvO8##pB}SZBfosx=s=H+-RvW|~gZG__Bs9a8z|>9lD=hnc-haaKxL$rkmF zsPGq1Y=QDGN$G$uv}N}bY`w4?+o55AEgHA5^+a1)vCb5hv7{BiHHfW3kVcS2a07rK z1qKk_sYVGKuf;|SG#(uL#)NPk#D-~>f2i$CW{eT8XQL^oZdyAvzlP?Z@yAj588e!~c>S$0x0u&$|SXM;vf1(%S+k$c(VJz&fVv=Ves zTh}xw6HZy^V*_wi!^J-iH~*WRC*Z|+vy-6ADxI>;A&+#*aG7r`ewo5}c5BKMv^wao zwyuLd%5I0y&%WtHhF}d+@V)88P`87%=#(vvk+#4*wz#XjYv>0JBkgo4PdmJO8DW^| zyP)~r!oN3^cNJb~pg+mabZmUHy?N%)!woI4<8vNJ&ULc4co(p6)l5n}UVfu+w4r=& z;R**vQ2QG4O^%@Bg*8*&)VEq659gJ<*q<_Mlaa2kLh zu>0>B`a8$|wL_0M_TM z^bK2hy1ZKkdtG?I3{2e20``1Ey=}FgypAY>6`6ru7PY!KwJbwoize0N5LSO=+`w7#uVYm29 z^x4K*+&kF*{?wq{p~{$VU24pya7@MtvM+w*rq!p^d1@%?1a+PoN@5pK=P4X+8CGBy zt#!g4TkC|m%7531Tcy@lRkrzz;9v#bXG-A@m{RsIbNLZQ9v?n91{n*>4DbC6W7H*g z6t+8^^jS;+uXJHHVT~*Qx)Z9+kdsCdWE$4EMi1;hp?2NFSZME>dd7@hPyJrkb57C^ zlAG8=xRKp9*FBRC5npKd~*PjNzi1I{SiCQ7G=c@}*?*ze2& z7OEgadDtmWn;U|nIpCpqmo~vRm>6l>URd9>F4|m!ld~43GB?cvG0f7Y^&o^Og~Z>H zoK;9`73Q&EIddy=mU=#52BC&YTV_zD9G;@wtx}FmQshB(w?S4MF%ygnsdF^vc~>1h zwh^ZkCbO0shoX)i-B`SSBWDQCRvvRT-?@`BZ+NxP=BnjBf*$$vP4ak?k zYp(=SbbZ-ya;Iw$hF(|Gj684yG`QiQH@KlD4=XM1{Z;C}DB$<*mNzz+7q=OUcDZQZ zOUX@Tz7TP*Yp&0Cx@Fbr<2b98*H7q5S78aQb`o?#F(89YskU`U`#f)&6dNStN(bS4$Wcu0+- zAV`8A`@-EEA2^;1huan*Y$q@PFbRLz zFo0+}4lsgM37N7IGG!%Xf~XN7`DK;ox(SbneUiBZK+GUQA*LkAHv$q3rI9LOpDfBx fh7qO-#0(M7EkQo`K^CNuQL*|*{wBk)|2OjAdN`w6 literal 0 HcmV?d00001 diff --git a/Source/RomDsk/zeta2_std/FDTST.COM b/Source/RomDsk/zeta2_std/FDTST.COM deleted file mode 100644 index 9bcf5ba8f13a51e75d0986fbb1dc3e7f1893b087..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7961 zcmdTpYjhjsm3mtv+mdGNSe7M`Q9K7EFE+N45NAjPvSus`>lJBaJ1^3tKsGFGN_iw9 z5a5(9r$BqU?cvduZCTjvp`}X`V3z~}8%qtzC`_9yO><~?8L*Q8PU56aOak)W`_0I4 z($KSy{@F=a`e^%GdtX@@}P$f=#@1-WoecFKE3i&pIxVzbwD27 zcwnY{N4Fs5B=(NkZL`@xuD7*gZu{(x*-}S)M@NvoaqTzRC888zb6rukFT~}x8U$nZ zHAAnlzi3!u?3N8{jD33z8;$V;hVL4MBZfa3qvM7V<3QP<(;1DD-b^jL=(k`2tB#wD z#8YfiOy${d_@bP(wm>c@O8E@W=2LNL;lKb3{6ahe7=BPo3!+w02~su^MM|x$_5b+6 z;Mt%U5hyCqAI!!j5s>a+I-870to8-^f?_t_y%<>IK~RwG%6E5*St=j|^T|x5)-6QY zKs1;Xa%wj*Fc6GOwKg!BO=qNdI>iDSX1Q8h4vpoqFe=xNLvr0@Jg$!n!^L5Ycq9>D zB5JZZ;oLYJj)Swwi34$ogEhw0KcMGFD8=d7 zCVbb_*DDiEva-HPx!IxoTa`?2H2X&=y-}y+yh_K+3X)h zik?vDd(Hk~O0P$LnOE3jEzcR9`)Bn))1Cq@5So?Z+tCSL$jlwZQtUw7}x7w!pf5%~HJ8qO2qE1p+@M z@Hm064WaiDDs-6Qk5T2x(!W}i7c8)BY5p*^0I1sv_gH`fn#X~51ZYPpv?G+P?w9v0 zu&}TXR0+ctMX=&3*YJmc{SdGZT8e}UQ00_?MYgbNhbyXfqHv|(H*(Lm6K5?j0^)ic z6vbd==C%`cRb^eNt_lP~=Rs#tj;2#mJe3!(W&@F6S2`<^nH8n%VnE`-SSp9ecpH>RgRHD-kS*q&%0Jc*Dpy;}r*=3`%6grX5cp1}Jh8j1+g-hW zOW}y6kf(JA_2^N6L z$H9zF<|Uawii_B9Ro<^6XyK$);VG~VEK`kwH4H6hV0A;+F|a_P6%79|6|Y8!5Rd*tnNb<#?%`Dw-(zH42)*)MFI% zp?`z5qF|*<1ep(}f5-DuDNcbD5cnOBvdBZv#pzLR5qcl;DRB>2fmaLM><228!xhTg z6$)&xx4i0&jdw@WYlWw&x@KI#M<{teDjG)7`|kWh1{gQOU-;utCnHC22f`}|+mDNr zy?2pIWLT%u>2*5rHQ<{ha5^yAthPE^CY?ycQ!#jVISu7z+FERI>u4{ydI4qg8Hww( zMX{l^I|42d%aMXyPuR)^@~Nzth)22-Vvzf)?d!;TMSld|d=_O8l-p?gdz+A5RH09y z0dXJ$FE~8TQY3LXn@US;e>&R>ngzL+Y_{s<)my5~H3K!fZNIZ+3=|v_LrZ3_sYX99 z)ZW|0aWqQW zGdhFk=DpS$T}RuTIms?nq>8hxY)9u`7TOb!^-PKUdiCwq0fSX0d6hp~hE}F*x)NFkO0*m>x>PY^pLl+OPtq z&;1{mzNY3IHOY#|y>6V%jt-d3&RMLAeVM>{^S*3>vX9z-=@5Qm-{R?a)28pr33RHMV}%mf^iv#;Gz>&z{5 z)H~B%4v#Z`tz)J$l5TaxDqgX6exN{a72jhqq0%&Od5VEJvaApggNa(3$_%e~uiCEG<3T}V zztF?ZMI$Lz3@i$QZ;WUl5lmkpE<$d#-V=;#^{fa^c0^MG+r>aCm=jqzozOXu0UrWf zb!{9W8%O6IJr{Bnpo<}DIw1=<+_`ul9Zc2QGJ$+B0dl0M+BX4Dq!jJpG5o+UkPN25 zIe|I^9bf9(r_!2VPb?P1geZv>CtsT(jYb$$FNmOVL5l*^9mJ_qvM3)(sAwYH&!)4i zc#c9&>l7&~Mj>SA%0?iZ$ib~ZW<<=AJ1>_ZlfuDt^r@4P&jFLzixEc-A`>o?S8eA6 zbllKT5@%#Z2vyWT1DSblQQ(>XVIT4#vFBh+NVz-_tY}pj{je2y# zmNW4B%iu`J;0}=fCAI&%P@I52P%{h;$1P6f(gvBRTZ%LkSK;FcPbi64mJz2w8+5f( zrvHxdgItUfZeje_sn{Kie}#(O&G^AAXifKWc)!P!nS_WJKCE)(P{E|b^r=vN;z}t=sm9t5FV>a3oNyS7?gtMCNW}}PYnG?h; zCqy7%S4T+05@z!$(1t}S(F%7OK4Dxkp3C9G7!d?m${d@FWP7!RjR=cb3Erx7Uc&t% zM3cf)Jtj(U-gEhcl$)Z717dWlf_sN0&tgS{ZliN@le7Fi=NC^nKYz-3_8I5IR_AHO zdFmbK_z~xyK69Ql(I;x?v3mNrpFVaaeYA%j9iTtGnf_!04G;ST-}EOQ-~GSxr_0Bu^B_a*WxmT8-etbe*p4tiWNOElM;W@z{D^T=bx$xpPu65!D(yTzgXJFNJCA0wtU#JV`c|uB)T%Tu8RIsUMo%C2fJ$>;gyy>lt;#YJ z$A}YoAIu0FLc3{VjCFcL^$fT`wFcw#hSTb3rs*_IQ^$1L2P&U)I>JowQ7k%uMsw zGb4IejK2Yj%~0M*N*8>Q&4W)eb^LYM4h_qg5#wg2j%X_@)ie0z3~2?h0cFJ&>ZyNbLjq&W3 zv?*+LIltJl4*Dp+aq&x;Hv`BJu0aaEH& z6+VsN6aao9v*(_|Ke+a+Ej;Slv%2sT*Pi~ulde7K!p~iMVufG2iqE^kJ$JrPfK}K}vng1OeRA>IM#%b&E|o~uKv!DT2vPHo8X;86 zza>o5hTR-6IVT!xaqnRJ`{xE_->Z!I`-_eFG>%#C2H6)ra+UfyU7jw)+@QGiFORxf4XssJI*jhJCRPkGG+$XhxsirMVv{9GZR@&-zJ0~#zyV8THgf*VxZZ}k$At8+El&Ti)b6Qe4?~aQ*(P~B z%t8yyb+}b4d97Tim9<)F)5@htX11HOAf;@wlF{)+*A@1VS? zxqMB#al|2yI9{jZrZQI&yz83lik)6r_4ruUYUT8ky3w5I9gW7kv*KQyWyp&?NAhAF zp3$WuY+oPfG1?pR!rsMoROYM6_ccVnTRbgsFIkff9xapBi+%hL%v4?mEp?^+UQl(r zx46=aG?y1eZT;g)@3zuD?|-iJLics@zyLSCpZedX{76?+5W9B{kHZ@>6TT5g+CSl?HZgT$NSan18kEG%Li9O@z*}>Ok;89 z3#E5`p8#+1XTBksgr6*lTHD&%APyCyc@it7AfTXb%es0*s8vkT_UNOAE>1O^fhYpb7pk`s~TyL!J>!Gbbp=tEbT2}6tX&zz7e^sLB7zMBjAYR1?7d%ACxOL1 z`5e)rz*e(!s4pDW&VY--C@obs59@#&S-9wl4h-Jn-~>#5c$W*v}=8;(tt zSGPsD)w5`Vi$y8KWm?00<`qNGnBHy>jooh z^Ubfa`7(Y{%BBP^n}|yDdwMvKh(tqx;Rm&3MARxOK}v_hNU5?-|37}vdD<_AA{6E8 z_NSwg2uPbhnU04fPWyaaelZ|$pi;zkmIXt85}I1hFOI{qbF-8$JqsL_@LYVo}r0M<)8= zu^*gIUhIiVJghFR`#!yJm{RII#U&>x??JsHx`odv$I^P8_gl(&Q&ZPT`12k|I&(oU z970xR3+@$JIbnqTA_sMWK}z{klky9bGTkBv^%qwS6V>A?gK>g#gBeAXpo_6uaQi*% zDWwWe8cS`3H;nmT85zz3ZP?Ia^6C~aI)m^T)vjDCG+_Cp3B*A*X<8fDgTk_~2iadTLHkQ4<)2K-ZWEFutbJh0 zziNV+9iU|90kiig7%H5mh@~>~bF=pd63&zfe{J>-P{LWNT{uVK@MLDI*?Ww#=!Idm z?tR{7vA_|3%(YG#aw`cJjAn3C(`~&?O`Dp!mVz|{O-+^bAsP07#rWT1#MMdZb%x?L zxh)!tab2NUR^(G5NfOfuE+d7~l19UW%9B&b#l$W#M(|F)1NU@B3`@y0PmVB;M;CT9 zD2R!nF0tH*qMdvsn(5@zp+qDZ=QDT-px`x}Px50kAQ3-sK$-RvChY`W(q5*f{HmeA z-{wd2)$^vA&*O-+^8&m53kvp?x>{Katj`h)Ebh$~Shw3P`4txBP6A&faEQPY1j051 z>7!KO2qk<$mBtFsT9g+puxv@;2z5PBcjVStfCHLO1MMi#j+SXhDOuewA6sByVIQa( z4#D}b;wo1P1He82>^m)aLItRD!tt`o7ETrLSL{aR%B`NEdv}~2u|N-q>#8aDPQ$IZJ48rv%os-g6YQjMY;r=PDL1p^~Za zTm@|URjhJNy|T1kR(?`1Tg#U`(chTo$y^baXp@S`r?k(x|PFeepxpykG z%dP0aV;QVhUadfh^EuwCyi*G(B9D}jJT?|)TuK3+JP_fI+;RmT(BK%108Bms!{}gN zmxbfFhzqUCClv(E6|KrF3PuMbQwIfW7+Ar=>IPP_ut0%cRyall?qr1%a5j&^Ed1K4 zoFZ0$D6s-`pwI~lS6f$j&05kIc3R<{=(CoLg+12%OiFpTCa+kPuLz9PB2Fl1Q%Q#k zK-8E6#s{cz8px5!#<_q2O{>6pf!j7zsG(rvdZ|*hFpbKWtju-_nqa73P$0v+jkSEx z%KR%qX2Q@Pb-i8)Q=kPDKI&3#axtwqJ?bsO^dq0r<$_V*)dDyBzB1)VnesuI0^4iI zt=`ypcQn48dz`9i!WH}_B_BXTJ5lw%^&g~waRdAXPXszxIfOe9UP0J?e3b0H%UmLZ zI-O3h(}Ax6-xz_Dfx+gq1#A`@V@oAtv1pkBlW1^qG*|r>6uk8-OyU(Exg7WKZ_t_%pg=P9U>JxiX z@QT9&Ernv&aEYYEbtluEV40tP&1RjlWXj7^jFnxL@7NSu%0R(UF-%LnXF8^z8))uq z<@lL1W?#vv_;l_%PQ6Mq*Kh$Y6OD*~%xmVz-3e$UnFSlUh?vMkrA54R3O6NXVD+rd z;9CBk^+{dJj9Ihdt*S~D=caQl^Zsk49ntoVah1!b+%?5#u^r1Tis{x-d?@eF1}s; z?{?|k>JRME534`5w;ifJW?%Sa^(lMoeD$ckgR&dwu-jfqCw%rgIyKMkq`MZ_J#;2+ z=jmkHel?w4Y`>NcEwj&|n`JMt1dZukl|!J4o~VO zo;kN9o=JmSeIvdCWzSeUKTx2@if^(QQ)!yVJkCIzSuWxe{jn;W$_y`gr`oR8qyC7- zeyNw835OD#=v(Lq{}@qU%%8kgT!`Fiy~7{X>S+-i?T}^!wu`=mKO=H*IziZ%0zU%W zb*-OBI*JZFdN1TEKsQ6wY(f@rx-(H<(x0fZrF>a`4D?80RW=6Cq!jKDFa*KR7xyQ@ zL4mqTz==$Y;LUTs#bEY#di;r`=IxU?h=?&!63ec?HfI`*FsQx}L8B2ZHcDvm{D6lYUVXL-f=wB2diXEgzz!LhzAJKnZ)bL2;aydY zF~`EHgL5$CxTPAJ5oxG`7eQ7Q(eUb#;;>qLr54s&LUcp1f>xTLSVkijsg?6d8pV3X zvE}2~=2~>kRzE8%{LgyWI%dOPfM;LpaS%s5T#5yRsZ+&dh3D9b8ze?^ZyM3W|Z|9V4M_Og$#l?wY9YyO1&JC-`kKF%6Wu}`wL-?LlUDt*mwSf;w>dDiKyd4cs@ zUGp+q5v+NIwcb$k8f#o!vz;~FQnQn__tw14(s$SNu|bPvEbt-Y{m60UNk-|ZQ@&R( z2P;)ttYH$(Y&nE{rOAAhO1p^9V7V9hE~42iOObYf$hy=%s#F?J`nXS}F_ZiKT%|cL zL-SmQR$-ZneJmvU&ejDDfsYt680+K)R~=lST7z+NLq$DdHch5!mf9!N&Z<_?lWCKb z?q)t_hNdQkyV)VVqg}WMifvG?CZz+u(6+uO*&1ObwnM{mcF4Gmts&ORimOgo!ID-0 zy@;(runfU%2-X4!QZN9*JJEPMHvSnlTA=a3;8kP7oe(iDWBFe-f6I(A!d+~85~^Ez zCpuUMBB){GmgHL(-mEiqY}|47%{pMJs0f^A2KLFY8<+t`SjV#Cmci&6hwN<7sF~mr zeuO>$m>s$o2D1uB2{x#$ch@UpPFc8v4Zu|m7yk&{{QHGrd;t3YWxt^8bo7ty7noah zO3p!ud-e!-m^zr_Qox=wbLH^#yhGp_MW z>Ak|~`qJh?z=849@9Oj4a|9i46zUxZ=dNk09Ym3V1|>L_zt#~fA@~D=ZxMWh;533$ z2#N^41OPS*A2JY@zu^!%*^>SOlrc1ZfzMXj>~oiP`8*9jL>8;hh8%_qw>cW@!O{Hd zj^KF&Ujq>0Z2!HvzjgHY=ALl$-=5p*=tD^m#2;X|1T4TlIiGHT9AI(Dtt5w_E8NilG4ww)Kn(q6 z1H{npH^2bi$LsVWt^wq#a{|`_Cvf#Rfvd-fT%%0APB_mj#f*fmFu@1RlldTI2D2a? zL6%_XFs#-+PMCV`bpD4~=Rv(JT%r`(}(pYLC;&#l;}+X=caecUE&*qUp1f(=`93FHGCwqhTP zu>xDC*9jY|*9jAp|Ctl_N0qOlWb+x7Onu-CQw$F?#mqV8$`M8$*?nLTk`|U)@2?rg zs7vf9YDAvi;M*44EBP0qaGt-^d)6?YsY@>Z8T z66Bx-CO$Y_D+R5bua#9=Y17IjT6v>Z`n1xol~z*fA*ZC=<_hXZAip#$bNud+!2^M3 zT+B1BY6^aq+BY!VCvOB}f2tZRLxTEY&+7%*RjMk~xl7i{^Fh%0rm%23U19klNRk3}4quzuP@@{3WyT3yH*ADpRK6z79 zX+g7b$Sx1r-=XBj5?@&8Uei>Q7u~Yz?s1&e%In8;#Z1~=3`_1SyWBX-kSg0r7BlE7 zE=j{)hSa31*eSVTBjY+MZE8M#HL-7#Yg(6^tjPl|ExFc%GTuj~Dto|6UEzouOqJdF zm2RZ*ZdA4Xla=lrh0ol-Tj>VzHF8f6KXQOM>W0uM$g_w*J`L8ayl;l(=9a+BS+nQN zop)WRH5?J!b`OrgLoyY;kq9#1=rq!ETtLw}vW z8HdF@O#-1W^ujXF(Du1UR(ieRp7x9fUOiayY0ttDcpl!rMR3^P_rN`of77EKa4gop zS~%%B3B36iJOi>CZj+F8#*7&dgo@!T36zqMc2h$p?Z-3>U&h0xNwEtFaY>j0m;_0* zG@nW*+c6SSBPa-u;K#pk2M75A42wvY*x9sc(?~*ZQh3J!jnLH~8iPMzPbCu(46v~A zdNCOZ0*t4mMNn#yQIO}RPY*%_2eBRxzYOxpwl-c%0cvTxNeRt~+$0}~htymI$8+Iu z^L&IY1O@;m;4c#f(4L9`j9^tlri_G483~ynUIa*fY2~>N!Xu(gA{z&Y*+eMBqy)J~ qK-xnoq)I50LH&s^!W4m+E#kRWU04d+v+1_G zK&=1T$H&xB3$udbI4NIX%1WZpENJEq@FRSEPX#U4_MMKns2ux51RK_5=YF6 zWnjciQNK2Knr!rn%YMt3bGp!MJe}jRVy?u+VwdHtcZQ1*Q7+{Lu9Qp5D+UHQ;7_LG zfZ+!bH*3$i-?7EY89}i zBVZucRZ6AA0v%39O4 zfL6XARq`pKkMARD_%!H9$1~~Gq9L14UeLp%9-K{H97xMNEFdoJizY##wT}W5Yu=(m zubH&wfKZ{m>zb(02ej{|*1qHL7aB%7^B*RmjI7MfxE)kYv%r>6V^s7FTAORtzHQY! zb~R?YxN5#o9o88v7btBu?4mJ#=C}=a*e$_ozVdxbHC1`cqI}oFSnSY-4UN_ibv;9w zh5dB5rnRU{tsTkG=$vlZ2Q5mAO8BmCY}DRsQMFQyw$80RRHHHjwva-bER=RlKpU|# zTWlefwo@_t3JEDz8?(a}svyNeD9l=0s7#wo$geWj+Cuwitpl*6EwrCtpjvo?W{%ma z=E_1V^SoicU1lD!RprVzt@b4IxUHH*tjIiQs}?I?v)T*HE?cz#m=d)@cjz0nZj3&M zomJsEWPi{K?GIYDf3Rx*WJQvUwLz=$Lo3Ye0a|5lvxN?Vp~4ZGSgJDXZJ{9~9Gxco zwJmgj7LL)~!aFn$Pi5}1gj23}_)gjAm?W>z}W0ZQa`1 zw+^fsZEdade4xS}uv`9HjJP^^6J?&*t)|kM4A&RWltexsmu0b#;AR9D1s607^ zTt@5@GX(GDdvH$|#e^&scyfe!Ji4%>K|n@~_leVu*tM5Wri;CNA)ZT0S-yyu0Cv2Z z3(FB~1|%5)4k!x|!epGFOWLQY`G{^P@TVeZzJA^e^LZSRab94zze&Ts(pPJl9o8pi zhs90WVcl-9D|x#n6ZimuDuEh-unnR2K{`4_3vbfZsmkBkwFm65Y?3fUF9+&i`9?c% zK=Tox9R%9JY1%02fBo^T?;vImFt89zj~^9E0yuve+d2|Eac&ig%znvimGI#&|E%7x>RE~y}s znHA;2DnQba?wnK*jY$(!`Uh81>zR9w&9kt&(UmML zP_)1buhUVP6*M@T2VoYrI<&*Y3g}9#02$axqj9yV$|H`dsq(l3?un-zRZHbLhtfoA zFEl8-9ooADUe$;=p`cAw3I#w{OBon%qi1N)k4!es1q`UZ2ImEC+j!-)12(ReuBI#X zv@+^ocGA!ULw%EmKFm{CQ$h~rCj@DNq2K1;Q@N4`DIoARzt-tz=HT?`w+Qpk$frg8 zFbcd{;AVeunldy^8JwoT_8JW6H#XiKEw7cg(+#b-g5ROlV`%7H6n%K}J9%K-0)MfO zqYGFyjyn)uLD+tLn(V#HTq0u>MVTlHd=2=f2%HVZ==1a(=WpoG>AaN5q;uWy_VNbG zQ_fl^+&soBu3tihQeNhLP97WDQgQHkIGz;bio#YdT*?*1Ogi3`5hHxkDIx2^{y4n* z9LgXlf1~qOXR@$znm&Vu#eqD$;_yJr@yyj+PLjEPsn83SMfgXY$DOg-hib=budRF5 zx!ajH({NPG^Ye$SADWg%J9@h~{+jm1S8zJs#$C(lS84HTF3J_tNfD4`9UQqk0ZmFJ zu#roOxnf#g#h-UtYV&5+#8PJew+=a;q&nLdEy{N3B6XZ=<2sl9aiKlw?w%QuQf*&t z*z7Plrmeh2w{mfN6wK5sZQSJ~F8We4chx=zGG~qank8i9hD=hq{LsH#=9$_m4Bc&V z!_eg?$Fvs^MP zMl$tIof%&8UcFtfrz1&&{ZcQxn26^%F}yMY{xPEAOhj5Ju0(FV-V;e1^@0eFcHA%m z+r@A$QWQBjozOX)2R{Pbbwf|GkVXd{y%%y7pqn8YHX#c*-NkfRisb5@`EV(c0XcF) z@0)>VQcm;;7=qvz&PF6~P@t|8a2g9Dc=KF%HJJUS9)C_UynQkUNiieJ;4fH+5>yxyy6wl~rM(XFJ0w-Rekn=l3Du@XPB)ST52r`OrPmnnh3*;6o z=E*eiFhPC#^puLgB=%w)QiOPg&zJPs;FIXi;m}F+L58e{AMmilt3O!>@uUhjJ^UBi z*l{!S_jAkJ+{`0$LnRl+9E<8lmSD&sx}X`6FY4e$P_^YAc=br3=*7Ewaa=E^pvZf) zhDKFOc@Vp*QB|TI>~`G@Ce2`f)`+fIo&}#k1@}S)CxP^TRquZoiZS>DGnarHa`JT!zUFURuac7C$55_bhSriZel|q7h{K;+0aTIyNwMMbnM$~2!;i%QZJ7; zema}ai1-A+Do-CXm~@yv9qKQi9z}BEKtdFgz!~oX|0@gI8hqt!Iv2-~5gr`y!PCj< z(@H#MF3}Uub&I?Rr&mgGiB<6MCB*`tjLUIO*C4?X7D_p=hC?c`3U?YlYJ4_bEaFoc zPbOh0i(EEd=rtBLo?OMr@Onul8TU&vkxkCjyJ4RLe<>puXK3Ppn3$>H-r>kYIW2(h9qsH6Lcb&pLm_ z-o@5`$llE|C)s;h-+A_aHt1@2h^+}VJj^=U8XjRSD;jpPRl-xb#pXFlNzhjX$zZY(QNh)kZ*K0AFb0a;xpT~A>Tzbr+ppL_L9EU zMxvu$r_~T0x9WPC*?KEF&374E@G`U-`#jXKh{!uOCuWYm%n(J6*$vf3xIm2t%j|}a zb#2z!G{aK&Y}zrM&oi4gOXv{u3Nt=W68hP3leb$KfMPe4t4QgEFTQ*KlWc>q65F9c zV#h7J*#=^*s#P0>JWE;u6cAgDAcY`}U=4s64Fe#&7aDKC#v(S_q4C(*l~aNY5o3zw zALuyGj4(nU+buzL$NCEjHbEDZaOV!`)pJkGvG&|Kc;2>Gwm4oE@15xbRAg| zy_y~0SKU|M)HJfxGoe(QLa#8w%S``8&D$$Go2vUN&o+5JRxIAFN0+wFDQ|C@4?BHv z5K?vR>~}&7S-4_mB%Y`qsvK#mZm-PoVm$TBCdJ{6d0(ph4zz4&Z5+ccqs>}uN@2aR zDuUl5IFH~91fL@KErJOIp8x=xg_jrz%OCR!?QGR_4$6gS{PkgHb$d8a-4_lv--0ZT zuoF4V=hEJ0ckHb4BX8^sg3|zm4t983`A+Zf`tlC%@U7*$yuh8*C;nr@Oq zpeosBh@t2k!$P$eI8dj^v2UE{|sx0%VF?n0eY7wgc*4UHs7E~NdVhxeb4TI897MP(wB{gl zH#&B(shNc=R=+V1sw2zBO<*Jl)Nb*qmp=VCHt17WvxzmZ-%07)b|%; z#SycDUPzte*zWVYJY!oy49;vlHwlHyGrD#BYg;*UtX#pAE%K7t;~ zNQ*idEw8%6g-88s!?JTx*nJql_4(gOn!7A!*n8W2Q;SC!JI|erR&+ zSahSG+30uC@JrL-(UbetJHgoR=?1HikiI3jr}C)3T3`9dUv*Rt_^Tb~pemeu*I$hz z)(x2QsDBf3X+_MtzO?@8F#DWZpg#7RQU=Y*wEUbGzV1Oz2i8CgEvi46UDCtCK6W#u80J1mLWBE zA4!cd{)shTfxV1BSWNU@6@ZP5>!|tk{Ck?%x6(g95+G}`3Ze-lF$=Iy=+=4KkHAW* z^2-32`e;Cj2atA#h}!#pJTO@KS>Q-K0NppJ0|WfzG3H+a5GuuZ77@sw!J19)o0Dos zXY`syiXkrY!yW0UZ3%!6;-Ers3-&|BGtlSrCX9o?^P1c{sAPX$931iQh! z78pW<=d`j2hsA6lfzNMD!jj zOJYEUjmt$T83UNj%d4O?BB2=1wY9|{VuRR@hhGADDV5@ll%J8No0Y)4kc;G#*|?s2 z;CL>P=vaZUlfWpz9Q+j%0J`%TfJv;%$W)Y(sVE~8#D@UMFRMJ)LwH2&lPhHbV)hUU vQIa9o2uOE4k5n1^6j6RIfiO=XW`}sL3;Ey&S&&AwV)ak_%>-QkYvjKG#pPda diff --git a/Source/RomDsk/zeta_ppisd/FD.COM b/Source/RomDsk/zeta_ppisd/FD.COM new file mode 100644 index 0000000000000000000000000000000000000000..ef602c05a205fa5d48dcd62b1d82dbfbc7979356 GIT binary patch literal 7974 zcmdTpYjhN4miTyL!J>!Gbbp=tEbT2}6tX&zz7e^sLB7zMBjAYR1?7d%ACxOL1 z`5e)rz*e(!s4pDW&VY--C@obs59@#&S-9wl4h-Jn-~>#5c$W*v}=8;(tt zSGPsD)w5`Vi$y8KWm?00<`qNGnBHy>jooh z^Ubfa`7(Y{%BBP^n}|yDdwMvKh(tqx;Rm&3MARxOK}v_hNU5?-|37}vdD<_AA{6E8 z_NSwg2uPbhnU04fPWyaaelZ|$pi;zkmIXt85}I1hFOI{qbF-8$JqsL_@LYVo}r0M<)8= zu^*gIUhIiVJghFR`#!yJm{RII#U&>x??JsHx`odv$I^P8_gl(&Q&ZPT`12k|I&(oU z970xR3+@$JIbnqTA_sMWK}z{klky9bGTkBv^%qwS6V>A?gK>g#gBeAXpo_6uaQi*% zDWwWe8cS`3H;nmT85zz3ZP?Ia^6C~aI)m^T)vjDCG+_Cp3B*A*X<8fDgTk_~2iadTLHkQ4<)2K-ZWEFutbJh0 zziNV+9iU|90kiig7%H5mh@~>~bF=pd63&zfe{J>-P{LWNT{uVK@MLDI*?Ww#=!Idm z?tR{7vA_|3%(YG#aw`cJjAn3C(`~&?O`Dp!mVz|{O-+^bAsP07#rWT1#MMdZb%x?L zxh)!tab2NUR^(G5NfOfuE+d7~l19UW%9B&b#l$W#M(|F)1NU@B3`@y0PmVB;M;CT9 zD2R!nF0tH*qMdvsn(5@zp+qDZ=QDT-px`x}Px50kAQ3-sK$-RvChY`W(q5*f{HmeA z-{wd2)$^vA&*O-+^8&m53kvp?x>{Katj`h)Ebh$~Shw3P`4txBP6A&faEQPY1j051 z>7!KO2qk<$mBtFsT9g+puxv@;2z5PBcjVStfCHLO1MMi#j+SXhDOuewA6sByVIQa( z4#D}b;wo1P1He82>^m)aLItRD!tt`o7ETrLSL{aR%B`NEdv}~2u|N-q>#8aDPQ$IZJ48rv%os-g6YQjMY;r=PDL1p^~Za zTm@|URjhJNy|T1kR(?`1Tg#U`(chTo$y^baXp@S`r?k(x|PFeepxpykG z%dP0aV;QVhUadfh^EuwCyi*G(B9D}jJT?|)TuK3+JP_fI+;RmT(BK%108Bms!{}gN zmxbfFhzqUCClv(E6|KrF3PuMbQwIfW7+Ar=>IPP_ut0%cRyall?qr1%a5j&^Ed1K4 zoFZ0$D6s-`pwI~lS6f$j&05kIc3R<{=(CoLg+12%OiFpTCa+kPuLz9PB2Fl1Q%Q#k zK-8E6#s{cz8px5!#<_q2O{>6pf!j7zsG(rvdZ|*hFpbKWtju-_nqa73P$0v+jkSEx z%KR%qX2Q@Pb-i8)Q=kPDKI&3#axtwqJ?bsO^dq0r<$_V*)dDyBzB1)VnesuI0^4iI zt=`ypcQn48dz`9i!WH}_B_BXTJ5lw%^&g~waRdAXPXszxIfOe9UP0J?e3b0H%UmLZ zI-O3h(}Ax6-xz_Dfx+gq1#A`@V@oAtv1pkBlW1^qG*|r>6uk8-OyU(Exg7WKZ_t_%pg=P9U>JxiX z@QT9&Ernv&aEYYEbtluEV40tP&1RjlWXj7^jFnxL@7NSu%0R(UF-%LnXF8^z8))uq z<@lL1W?#vv_;l_%PQ6Mq*Kh$Y6OD*~%xmVz-3e$UnFSlUh?vMkrA54R3O6NXVD+rd z;9CBk^+{dJj9Ihdt*S~D=caQl^Zsk49ntoVah1!b+%?5#u^r1Tis{x-d?@eF1}s; z?{?|k>JRME534`5w;ifJW?%Sa^(lMoeD$ckgR&dwu-jfqCw%rgIyKMkq`MZ_J#;2+ z=jmkHel?w4Y`>NcEwj&|n`JMt1dZukl|!J4o~VO zo;kN9o=JmSeIvdCWzSeUKTx2@if^(QQ)!yVJkCIzSuWxe{jn;W$_y`gr`oR8qyC7- zeyNw835OD#=v(Lq{}@qU%%8kgT!`Fiy~7{X>S+-i?T}^!wu`=mKO=H*IziZ%0zU%W zb*-OBI*JZFdN1TEKsQ6wY(f@rx-(H<(x0fZrF>a`4D?80RW=6Cq!jKDFa*KR7xyQ@ zL4mqTz==$Y;LUTs#bEY#di;r`=IxU?h=?&!63ec?HfI`*FsQx}L8B2ZHcDvm{D6lYUVXL-f=wB2diXEgzz!LhzAJKnZ)bL2;aydY zF~`EHgL5$CxTPAJ5oxG`7eQ7Q(eUb#;;>qLr54s&LUcp1f>xTLSVkijsg?6d8pV3X zvE}2~=2~>kRzE8%{LgyWI%dOPfM;LpaS%s5T#5yRsZ+&dh3D9b8ze?^ZyM3W|Z|9V4M_Og$#l?wY9YyO1&JC-`kKF%6Wu}`wL-?LlUDt*mwSf;w>dDiKyd4cs@ zUGp+q5v+NIwcb$k8f#o!vz;~FQnQn__tw14(s$SNu|bPvEbt-Y{m60UNk-|ZQ@&R( z2P;)ttYH$(Y&nE{rOAAhO1p^9V7V9hE~42iOObYf$hy=%s#F?J`nXS}F_ZiKT%|cL zL-SmQR$-ZneJmvU&ejDDfsYt680+K)R~=lST7z+NLq$DdHch5!mf9!N&Z<_?lWCKb z?q)t_hNdQkyV)VVqg}WMifvG?CZz+u(6+uO*&1ObwnM{mcF4Gmts&ORimOgo!ID-0 zy@;(runfU%2-X4!QZN9*JJEPMHvSnlTA=a3;8kP7oe(iDWBFe-f6I(A!d+~85~^Ez zCpuUMBB){GmgHL(-mEiqY}|47%{pMJs0f^A2KLFY8<+t`SjV#Cmci&6hwN<7sF~mr zeuO>$m>s$o2D1uB2{x#$ch@UpPFc8v4Zu|m7yk&{{QHGrd;t3YWxt^8bo7ty7noah zO3p!ud-e!-m^zr_Qox=wbLH^#yhGp_MW z>Ak|~`qJh?z=849@9Oj4a|9i46zUxZ=dNk09Ym3V1|>L_zt#~fA@~D=ZxMWh;533$ z2#N^41OPS*A2JY@zu^!%*^>SOlrc1ZfzMXj>~oiP`8*9jL>8;hh8%_qw>cW@!O{Hd zj^KF&Ujq>0Z2!HvzjgHY=ALl$-=5p*=tD^m#2;X|1T4TlIiGHT9AI(Dtt5w_E8NilG4ww)Kn(q6 z1H{npH^2bi$LsVWt^wq#a{|`_Cvf#Rfvd-fT%%0APB_mj#f*fmFu@1RlldTI2D2a? zL6%_XFs#-+PMCV`bpD4~=Rv(JT%r`(}(pYLC;&#l;}+X=caecUE&*qUp1f(=`93FHGCwqhTP zu>xDC*9jY|*9jAp|Ctl_N0qOlWb+x7Onu-CQw$F?#mqV8$`M8$*?nLTk`|U)@2?rg zs7vf9YDAvi;M*44EBP0qaGt-^d)6?YsY@>Z8T z66Bx-CO$Y_D+R5bua#9=Y17IjT6v>Z`n1xol~z*fA*ZC=<_hXZAip#$bNud+!2^M3 zT+B1BY6^aq+BY!VCvOB}f2tZRLxTEY&+7%*RjMk~xl7i{^Fh%0rm%23U19klNRk3}4quzuP@@{3WyT3yH*ADpRK6z79 zX+g7b$Sx1r-=XBj5?@&8Uei>Q7u~Yz?s1&e%In8;#Z1~=3`_1SyWBX-kSg0r7BlE7 zE=j{)hSa31*eSVTBjY+MZE8M#HL-7#Yg(6^tjPl|ExFc%GTuj~Dto|6UEzouOqJdF zm2RZ*ZdA4Xla=lrh0ol-Tj>VzHF8f6KXQOM>W0uM$g_w*J`L8ayl;l(=9a+BS+nQN zop)WRH5?J!b`OrgLoyY;kq9#1=rq!ETtLw}vW z8HdF@O#-1W^ujXF(Du1UR(ieRp7x9fUOiayY0ttDcpl!rMR3^P_rN`of77EKa4gop zS~%%B3B36iJOi>CZj+F8#*7&dgo@!T36zqMc2h$p?Z-3>U&h0xNwEtFaY>j0m;_0* zG@nW*+c6SSBPa-u;K#pk2M75A42wvY*x9sc(?~*ZQh3J!jnLH~8iPMzPbCu(46v~A zdNCOZ0*t4mMNn#yQIO}RPY*%_2eBRxzYOxpwl-c%0cvTxNeRt~+$0}~htymI$8+Iu z^L&IY1O@;m;4c#f(4L9`j9^tlri_G483~ynUIa*fY2~>N!Xu(gA{z&Y*+eMBqy)J~ qK-xnoq)I50LH&s^!W4m+E#kRWcSYMIGjzcz~rH~$I8;6v9 z2PfUKrF8cI%l4GBU)?}}9v03v&;uk*6Jm=1BcCZrLzaS};3O6wK@cZ6$#Fp5d*6&~ zhlV}-(LXzh@4N55d+)pNz5Cv~_vw7$2d5ibujQ0ST#QezZ1O05W!?e3^0cQ)r zE^I&DC~xYBNEwOSG{0p&=gV|Aw=SGFzjeOUIz}+lLAuiJ%<}=S5LdNs~ zLzi*IVZ#bz$18@l#$Ls+#Tb3V@Ka+XZ+O!fK4&;(?7M8x>2${BdNZ~3s^5|&oZ4wT z6isk(G10>XgIDFOwD~fAQR+zvTu&k@E$!>$fIkuq0fryck`Ym>s01k;3L~Y`*8G3` zp!2j}3`Ho)x5A%}N+KW~{$x5Hk~r=2_4>thv|}Z(M*UzQ*WT07A*Lx`#NQK7m1-T4 zFy{;V2bn}s!et7H$XOkEEq7n}aj7$H9UN}W5wVuMNPbu#o^@`{gKBgSE)akralygl} z?-}^>oXdJ~mCGjPpUmEmD2py=S(-!&Z)P4f zdp|~skx-a>%-)lfUXT1Tv(oH+pHfx>cAMEdN-(fX_>f{I%tb>kX<~-Ws`(a)*=H_F zxu2LU5$2G&7(pzJw~}zdXvPMb*7i3w4K(%M0@jQ+HC52>$>0MP<9~}0 zS0|;{847#lj%X~#^@d_SBA*ILl9*0#87Y*OG#YMHp6o&{CiaRkf_L*>=+hZ7EG5%C z*}^<-UGQj75EDbaVyO{DyZJ~o)6J(tiAXZeXYdd}!5cWAn+ON1nwp9 zBLWKqf*XQ#o(han!Y5R5D)(;|Wv>O6Eh&sqOMtq6Xom$jp!poo@<7X%Xn9Ij{pB4C zEG+nes^O$X30ZNKD}>X)ej3;hS+ax*Q00_?MYeFNzztFqRe&!jQ6J3h=l+rW0!d@8I85l%A+X?5*zT8jB0{twZ!I=`chxJ~dn6<2)QaLxW za0nGmxu?s(={K^n5fBJxNHc?BDDtzV@8PZo(T=7)1|g9fKy1YmLj zhSANwC<|wB5hbhgZW%#`&RUf=3PuMbQwIfW7+BB3>IUv&VSxf0Sm6UIa5pOyU~lGO z7Jgw>#)%amN~{1KC{&L_qro+?Ij%~V!TF$XAUf}wswfebT< zwQR`Byh@NoF!Z0hUd(k+pam5E+@-8>G3_`#>M6qf4*8T`7mNar7C718C{e~rl($M0 zaId^uJ+blZXgD;qo2qWY6?~YIPoSaQsQTEp|40GjcK8c^9O!1{5PBfog5Z99l=$9N z4v{ekGW0qf#u_@^6oIpW+2*z_v{AMiTPhigMH8KH_wpLbbGGYkaPnxkxOxbsdr}gA zlP!V`%^e|#i8!7V~7SH3z*$HSQ*#kCm5iya8N-KGHc~g1H z!0K6@!S%hP*4?_+mIVvq?W#%@=bE|J#s9U^u4rf1w95YSP31m=Rc|d>IbXGMVM_qa zR4dKg)if^nS~IidInX(4OS{R?196y5RcC7p zR$%B0{|7_Av*NCbcuD0^C(dSTE6nENYd97AI)!a*U$;Q%r>YLxBmZ9YvVFyYs$si0 zSoM3m^m^4>_UPMH@7p_0R()V!{#n(yJvLc&+1^!QH`C!pyPZy4Z?C6Qe_?miy}yCJkZrYP~Lz)rTF8UJwjL5<61Yuta z;s^-WwSFS$Cko`MNN{eAgB-+ywa zN$kcvBm?;hpXyO(gO6Z1heIdX2N|-Oe!#^Jw|;FUNAS-`K!>vb(Q)+QhEy`;Mu@Q>(v@#!xwKQU#HF7ph zqu8oxtbZE&Q4NM>>sg2iWC$;02oi|=yQ=&+6y{oDW-o*x_tMHubuuwGcWYgC9bTz$ zv64LI4iYM8oo=ILW`OmAUd$ctWxaQ)*!`?`gNi-GdSO`5n(XHB#E-^PF%ho-Smn|- zgGq9%y|cMu8|qPjyb!4`7FwOx{4`$m-%ETbLMXuxbDC5 z&A#|C8u&ARI^F3~4`0<>qGKqcA2UD!fzFg(r|#6*Ne}LntW=*Jab%PAS$#c1`2Pn- z_PP=dRbaUC|Nqw$!ZOT0!d4t*|B*Gn%l->Xonm*hhH-WeYx{zIlC3mVKgBXk^)sx~ zUHvQ8(^CB$TNbK*p0&oS_p!#+)dyJ9?bU}^`-bX4mfl?bG8?p5rUGv>-Vw(&pEAm- zTE$l<2P;%svVIoLY{%MUWMkl3a!l2hv(!GDHlbQY z&!){%dW3n0$u}m2&1_!p=oGd+LtrqUWc4+8l^TxewHL+G!=F|%7 zS<(t%17h0{tVM7Kg6#l;6byjy&NSYMjX%If3pAb>yLL*r8#2bVEdS8FFPO`Wu!-$V zLiLCJGaYON5!A5bhslGJFV&j5cI-d*QY|o*l?5i5(PJ`r19O@YcChTUWiYyiyqygi zH4|LIcd_U1vH6`an2k6}ut9CzT&GMqW#Rj50FG)n_$T1xKQ4^p1u*>5aX~rc7@j&V zFt_QHBMw4*^|&y6-*G{PqkZ^yAfdeOAov3)4fjj}6W?yuq65*9MS&QbKU_RK^bd6- zZFC_!$Kid45k{C5S2XX+9jGfF&dGK3$Jr*w!11=G+M(TbbHUSZ^}thIg5BUvvT(#q zYdl*#nmbol+?8ACz~%7MkYsjLMQLils0kh#EIbBU2Bj+_{S7Yj>` z_ZJLf)Ft-k_BoyOC42&2=fc;7O|I-~PN+7)n>3Q(rD2n6^w{9ID*85Kp}jk+88eEW z{}a(kCy|54O_UJsVP72bH$Z>zXheKgt6j{kZYW+ra0x(mbpu9siWA;9U{}Jqp@<&l z1&s2*!O5(Q#}CTvhbg0I0#4t>h-4sG>&)^4}cb48a!Vm#(I5zvax^59XG-D!C6q zB5QTY6G0AIVB&+#S}ADdQmw4iN}E=$(#q9Z>C;NTR$57^hX*BPtt+UXfXAhAnd6U4 zjGYKP;bNX}RZ;M>)Una=L3sxldyi_c46oA%?DHm+kdG*B?%^`^Unk(Z z2IYaK;<9v5db%Il|eg-qIA2utp3dfhn7@J@Ds zEN0MESd|7}_JAFQZpjUfjO(a$sE_fRhv*FKc}$0omiD6k0WVTb#zeP0vfl%pA3fdc{*Vv4KRdi z`a(ECM7yv+`UQ;So_L(Gv%VPl-^7 uNeLbv0qG2-kSd`}2K6Vx2vY>&QxVU#BOm-a3))DpSp749)7jVm8u?EEm&l|5 diff --git a/Source/RomDsk/zeta_ppp/FD.COM b/Source/RomDsk/zeta_ppp/FD.COM new file mode 100644 index 0000000000000000000000000000000000000000..ef602c05a205fa5d48dcd62b1d82dbfbc7979356 GIT binary patch literal 7974 zcmdTpYjhN4miTyL!J>!Gbbp=tEbT2}6tX&zz7e^sLB7zMBjAYR1?7d%ACxOL1 z`5e)rz*e(!s4pDW&VY--C@obs59@#&S-9wl4h-Jn-~>#5c$W*v}=8;(tt zSGPsD)w5`Vi$y8KWm?00<`qNGnBHy>jooh z^Ubfa`7(Y{%BBP^n}|yDdwMvKh(tqx;Rm&3MARxOK}v_hNU5?-|37}vdD<_AA{6E8 z_NSwg2uPbhnU04fPWyaaelZ|$pi;zkmIXt85}I1hFOI{qbF-8$JqsL_@LYVo}r0M<)8= zu^*gIUhIiVJghFR`#!yJm{RII#U&>x??JsHx`odv$I^P8_gl(&Q&ZPT`12k|I&(oU z970xR3+@$JIbnqTA_sMWK}z{klky9bGTkBv^%qwS6V>A?gK>g#gBeAXpo_6uaQi*% zDWwWe8cS`3H;nmT85zz3ZP?Ia^6C~aI)m^T)vjDCG+_Cp3B*A*X<8fDgTk_~2iadTLHkQ4<)2K-ZWEFutbJh0 zziNV+9iU|90kiig7%H5mh@~>~bF=pd63&zfe{J>-P{LWNT{uVK@MLDI*?Ww#=!Idm z?tR{7vA_|3%(YG#aw`cJjAn3C(`~&?O`Dp!mVz|{O-+^bAsP07#rWT1#MMdZb%x?L zxh)!tab2NUR^(G5NfOfuE+d7~l19UW%9B&b#l$W#M(|F)1NU@B3`@y0PmVB;M;CT9 zD2R!nF0tH*qMdvsn(5@zp+qDZ=QDT-px`x}Px50kAQ3-sK$-RvChY`W(q5*f{HmeA z-{wd2)$^vA&*O-+^8&m53kvp?x>{Katj`h)Ebh$~Shw3P`4txBP6A&faEQPY1j051 z>7!KO2qk<$mBtFsT9g+puxv@;2z5PBcjVStfCHLO1MMi#j+SXhDOuewA6sByVIQa( z4#D}b;wo1P1He82>^m)aLItRD!tt`o7ETrLSL{aR%B`NEdv}~2u|N-q>#8aDPQ$IZJ48rv%os-g6YQjMY;r=PDL1p^~Za zTm@|URjhJNy|T1kR(?`1Tg#U`(chTo$y^baXp@S`r?k(x|PFeepxpykG z%dP0aV;QVhUadfh^EuwCyi*G(B9D}jJT?|)TuK3+JP_fI+;RmT(BK%108Bms!{}gN zmxbfFhzqUCClv(E6|KrF3PuMbQwIfW7+Ar=>IPP_ut0%cRyall?qr1%a5j&^Ed1K4 zoFZ0$D6s-`pwI~lS6f$j&05kIc3R<{=(CoLg+12%OiFpTCa+kPuLz9PB2Fl1Q%Q#k zK-8E6#s{cz8px5!#<_q2O{>6pf!j7zsG(rvdZ|*hFpbKWtju-_nqa73P$0v+jkSEx z%KR%qX2Q@Pb-i8)Q=kPDKI&3#axtwqJ?bsO^dq0r<$_V*)dDyBzB1)VnesuI0^4iI zt=`ypcQn48dz`9i!WH}_B_BXTJ5lw%^&g~waRdAXPXszxIfOe9UP0J?e3b0H%UmLZ zI-O3h(}Ax6-xz_Dfx+gq1#A`@V@oAtv1pkBlW1^qG*|r>6uk8-OyU(Exg7WKZ_t_%pg=P9U>JxiX z@QT9&Ernv&aEYYEbtluEV40tP&1RjlWXj7^jFnxL@7NSu%0R(UF-%LnXF8^z8))uq z<@lL1W?#vv_;l_%PQ6Mq*Kh$Y6OD*~%xmVz-3e$UnFSlUh?vMkrA54R3O6NXVD+rd z;9CBk^+{dJj9Ihdt*S~D=caQl^Zsk49ntoVah1!b+%?5#u^r1Tis{x-d?@eF1}s; z?{?|k>JRME534`5w;ifJW?%Sa^(lMoeD$ckgR&dwu-jfqCw%rgIyKMkq`MZ_J#;2+ z=jmkHel?w4Y`>NcEwj&|n`JMt1dZukl|!J4o~VO zo;kN9o=JmSeIvdCWzSeUKTx2@if^(QQ)!yVJkCIzSuWxe{jn;W$_y`gr`oR8qyC7- zeyNw835OD#=v(Lq{}@qU%%8kgT!`Fiy~7{X>S+-i?T}^!wu`=mKO=H*IziZ%0zU%W zb*-OBI*JZFdN1TEKsQ6wY(f@rx-(H<(x0fZrF>a`4D?80RW=6Cq!jKDFa*KR7xyQ@ zL4mqTz==$Y;LUTs#bEY#di;r`=IxU?h=?&!63ec?HfI`*FsQx}L8B2ZHcDvm{D6lYUVXL-f=wB2diXEgzz!LhzAJKnZ)bL2;aydY zF~`EHgL5$CxTPAJ5oxG`7eQ7Q(eUb#;;>qLr54s&LUcp1f>xTLSVkijsg?6d8pV3X zvE}2~=2~>kRzE8%{LgyWI%dOPfM;LpaS%s5T#5yRsZ+&dh3D9b8ze?^ZyM3W|Z|9V4M_Og$#l?wY9YyO1&JC-`kKF%6Wu}`wL-?LlUDt*mwSf;w>dDiKyd4cs@ zUGp+q5v+NIwcb$k8f#o!vz;~FQnQn__tw14(s$SNu|bPvEbt-Y{m60UNk-|ZQ@&R( z2P;)ttYH$(Y&nE{rOAAhO1p^9V7V9hE~42iOObYf$hy=%s#F?J`nXS}F_ZiKT%|cL zL-SmQR$-ZneJmvU&ejDDfsYt680+K)R~=lST7z+NLq$DdHch5!mf9!N&Z<_?lWCKb z?q)t_hNdQkyV)VVqg}WMifvG?CZz+u(6+uO*&1ObwnM{mcF4Gmts&ORimOgo!ID-0 zy@;(runfU%2-X4!QZN9*JJEPMHvSnlTA=a3;8kP7oe(iDWBFe-f6I(A!d+~85~^Ez zCpuUMBB){GmgHL(-mEiqY}|47%{pMJs0f^A2KLFY8<+t`SjV#Cmci&6hwN<7sF~mr zeuO>$m>s$o2D1uB2{x#$ch@UpPFc8v4Zu|m7yk&{{QHGrd;t3YWxt^8bo7ty7noah zO3p!ud-e!-m^zr_Qox=wbLH^#yhGp_MW z>Ak|~`qJh?z=849@9Oj4a|9i46zUxZ=dNk09Ym3V1|>L_zt#~fA@~D=ZxMWh;533$ z2#N^41OPS*A2JY@zu^!%*^>SOlrc1ZfzMXj>~oiP`8*9jL>8;hh8%_qw>cW@!O{Hd zj^KF&Ujq>0Z2!HvzjgHY=ALl$-=5p*=tD^m#2;X|1T4TlIiGHT9AI(Dtt5w_E8NilG4ww)Kn(q6 z1H{npH^2bi$LsVWt^wq#a{|`_Cvf#Rfvd-fT%%0APB_mj#f*fmFu@1RlldTI2D2a? zL6%_XFs#-+PMCV`bpD4~=Rv(JT%r`(}(pYLC;&#l;}+X=caecUE&*qUp1f(=`93FHGCwqhTP zu>xDC*9jY|*9jAp|Ctl_N0qOlWb+x7Onu-CQw$F?#mqV8$`M8$*?nLTk`|U)@2?rg zs7vf9YDAvi;M*44EBP0qaGt-^d)6?YsY@>Z8T z66Bx-CO$Y_D+R5bua#9=Y17IjT6v>Z`n1xol~z*fA*ZC=<_hXZAip#$bNud+!2^M3 zT+B1BY6^aq+BY!VCvOB}f2tZRLxTEY&+7%*RjMk~xl7i{^Fh%0rm%23U19klNRk3}4quzuP@@{3WyT3yH*ADpRK6z79 zX+g7b$Sx1r-=XBj5?@&8Uei>Q7u~Yz?s1&e%In8;#Z1~=3`_1SyWBX-kSg0r7BlE7 zE=j{)hSa31*eSVTBjY+MZE8M#HL-7#Yg(6^tjPl|ExFc%GTuj~Dto|6UEzouOqJdF zm2RZ*ZdA4Xla=lrh0ol-Tj>VzHF8f6KXQOM>W0uM$g_w*J`L8ayl;l(=9a+BS+nQN zop)WRH5?J!b`OrgLoyY;kq9#1=rq!ETtLw}vW z8HdF@O#-1W^ujXF(Du1UR(ieRp7x9fUOiayY0ttDcpl!rMR3^P_rN`of77EKa4gop zS~%%B3B36iJOi>CZj+F8#*7&dgo@!T36zqMc2h$p?Z-3>U&h0xNwEtFaY>j0m;_0* zG@nW*+c6SSBPa-u;K#pk2M75A42wvY*x9sc(?~*ZQh3J!jnLH~8iPMzPbCu(46v~A zdNCOZ0*t4mMNn#yQIO}RPY*%_2eBRxzYOxpwl-c%0cvTxNeRt~+$0}~htymI$8+Iu z^L&IY1O@;m;4c#f(4L9`j9^tlri_G483~ynUIa*fY2~>N!Xu(gA{z&Y*+eMBqy)J~ qK-xnoq)I50LH&s^!W4m+E#kRWcSYMIGjzcz~rH~$I8;6v9 z2PfUKrF8cI%l4GBU)?}}9v03v&;uk*6Jm=1BcCZrLzaS};3O6wK@cZ6$#Fp5d*6&~ zhlV}-(LXzh@4N55d+)pNz5Cv~_vw7$2d5ibujQ0ST#QezZ1O05W!?e3^0cQ)r zE^I&DC~xYBNEwOSG{0p&=gV|Aw=SGFzjeOUIz}+lLAuiJ%<}=S5LdNs~ zLzi*IVZ#bz$18@l#$Ls+#Tb3V@Ka+XZ+O!fK4&;(?7M8x>2${BdNZ~3s^5|&oZ4wT z6isk(G10>XgIDFOwD~fAQR+zvTu&k@E$!>$fIkuq0fryck`Ym>s01k;3L~Y`*8G3` zp!2j}3`Ho)x5A%}N+KW~{$x5Hk~r=2_4>thv|}Z(M*UzQ*WT07A*Lx`#NQK7m1-T4 zFy{;V2bn}s!et7H$XOkEEq7n}aj7$H9UN}W5wVuMNPbu#o^@`{gKBgSE)akralygl} z?-}^>oXdJ~mCGjPpUmEmD2py=S(-!&Z)P4f zdp|~skx-a>%-)lfUXT1Tv(oH+pHfx>cAMEdN-(fX_>f{I%tb>kX<~-Ws`(a)*=H_F zxu2LU5$2G&7(pzJw~}zdXvPMb*7i3w4K(%M0@jQ+HC52>$>0MP<9~}0 zS0|;{847#lj%X~#^@d_SBA*ILl9*0#87Y*OG#YMHp6o&{CiaRkf_L*>=+hZ7EG5%C z*}^<-UGQj75EDbaVyO{DyZJ~o)6J(tiAXZeXYdd}!5cWAn+ON1nwp9 zBLWKqf*XQ#o(han!Y5R5D)(;|Wv>O6Eh&sqOMtq6Xom$jp!poo@<7X%Xn9Ij{pB4C zEG+nes^O$X30ZNKD}>X)ej3;hS+ax*Q00_?MYeFNzztFqRe&!jQ6J3h=l+rW0!d@8I85l%A+X?5*zT8jB0{twZ!I=`chxJ~dn6<2)QaLxW za0nGmxu?s(={K^n5fBJxNHc?BDDtzV@8PZo(T=7)1|g9fKy1YmLj zhSANwC<|wB5hbhgZW%#`&RUf=3PuMbQwIfW7+BB3>IUv&VSxf0Sm6UIa5pOyU~lGO z7Jgw>#)%amN~{1KC{&L_qro+?Ij%~V!TF$XAUf}wswfebT< zwQR`Byh@NoF!Z0hUd(k+pam5E+@-8>G3_`#>M6qf4*8T`7mNar7C718C{e~rl($M0 zaId^uJ+blZXgD;qo2qWY6?~YIPoSaQsQTEp|40GjcK8c^9O!1{5PBfog5Z99l=$9N z4v{ekGW0qf#u_@^6oIpW+2*z_v{AMiTPhigMH8KH_wpLbbGGYkaPnxkxOxbsdr}gA zlP!V`%^e|#i8!7V~7SH3z*$HSQ*#kCm5iya8N-KGHc~g1H z!0K6@!S%hP*4?_+mIVvq?W#%@=bE|J#s9U^u4rf1w95YSP31m=Rc|d>IbXGMVM_qa zR4dKg)if^nS~IidInX(4OS{R?196y5RcC7p zR$%B0{|7_Av*NCbcuD0^C(dSTE6nENYd97AI)!a*U$;Q%r>YLxBmZ9YvVFyYs$si0 zSoM3m^m^4>_UPMH@7p_0R()V!{#n(yJvLc&+1^!QH`C!pyPZy4Z?C6Qe_?miy}yCJkZrYP~Lz)rTF8UJwjL5<61Yuta z;s^-WwSFS$Cko`MNN{eAgB-+ywa zN$kcvBm?;hpXyO(gO6Z1heIdX2N|-Oe!#^Jw|;FUNAS-`K!>vb(Q)+QhEy`;Mu@Q>(v@#!xwKQU#HF7ph zqu8oxtbZE&Q4NM>>sg2iWC$;02oi|=yQ=&+6y{oDW-o*x_tMHubuuwGcWYgC9bTz$ zv64LI4iYM8oo=ILW`OmAUd$ctWxaQ)*!`?`gNi-GdSO`5n(XHB#E-^PF%ho-Smn|- zgGq9%y|cMu8|qPjyb!4`7FwOx{4`$m-%ETbLMXuxbDC5 z&A#|C8u&ARI^F3~4`0<>qGKqcA2UD!fzFg(r|#6*Ne}LntW=*Jab%PAS$#c1`2Pn- z_PP=dRbaUC|Nqw$!ZOT0!d4t*|B*Gn%l->Xonm*hhH-WeYx{zIlC3mVKgBXk^)sx~ zUHvQ8(^CB$TNbK*p0&oS_p!#+)dyJ9?bU}^`-bX4mfl?bG8?p5rUGv>-Vw(&pEAm- zTE$l<2P;%svVIoLY{%MUWMkl3a!l2hv(!GDHlbQY z&!){%dW3n0$u}m2&1_!p=oGd+LtrqUWc4+8l^TxewHL+G!=F|%7 zS<(t%17h0{tVM7Kg6#l;6byjy&NSYMjX%If3pAb>yLL*r8#2bVEdS8FFPO`Wu!-$V zLiLCJGaYON5!A5bhslGJFV&j5cI-d*QY|o*l?5i5(PJ`r19O@YcChTUWiYyiyqygi zH4|LIcd_U1vH6`an2k6}ut9CzT&GMqW#Rj50FG)n_$T1xKQ4^p1u*>5aX~rc7@j&V zFt_QHBMw4*^|&y6-*G{PqkZ^yAfdeOAov3)4fjj}6W?yuq65*9MS&QbKU_RK^bd6- zZFC_!$Kid45k{C5S2XX+9jGfF&dGK3$Jr*w!11=G+M(TbbHUSZ^}thIg5BUvvT(#q zYdl*#nmbol+?8ACz~%7MkYsjLMQLils0kh#EIbBU2Bj+_{S7Yj>` z_ZJLf)Ft-k_BoyOC42&2=fc;7O|I-~PN+7)n>3Q(rD2n6^w{9ID*85Kp}jk+88eEW z{}a(kCy|54O_UJsVP72bH$Z>zXheKgt6j{kZYW+ra0x(mbpu9siWA;9U{}Jqp@<&l z1&s2*!O5(Q#}CTvhbg0I0#4t>h-4sG>&)^4}cb48a!Vm#(I5zvax^59XG-D!C6q zB5QTY6G0AIVB&+#S}ADdQmw4iN}E=$(#q9Z>C;NTR$57^hX*BPtt+UXfXAhAnd6U4 zjGYKP;bNX}RZ;M>)Una=L3sxldyi_c46oA%?DHm+kdG*B?%^`^Unk(Z z2IYaK;<9v5db%Il|eg-qIA2utp3dfhn7@J@Ds zEN0MESd|7}_JAFQZpjUfjO(a$sE_fRhv*FKc}$0omiD6k0WVTb#zeP0vfl%pA3fdc{*Vv4KRdi z`a(ECM7yv+`UQ;So_L(Gv%VPl-^7 uNeLbv0qG2-kSd`}2K6Vx2vY>&QxVU#BOm-a3))DpSp749)7jVm8u?EEm&l|5 diff --git a/Source/RomDsk/zeta_std/FD.COM b/Source/RomDsk/zeta_std/FD.COM new file mode 100644 index 0000000000000000000000000000000000000000..ef602c05a205fa5d48dcd62b1d82dbfbc7979356 GIT binary patch literal 7974 zcmdTpYjhN4miTyL!J>!Gbbp=tEbT2}6tX&zz7e^sLB7zMBjAYR1?7d%ACxOL1 z`5e)rz*e(!s4pDW&VY--C@obs59@#&S-9wl4h-Jn-~>#5c$W*v}=8;(tt zSGPsD)w5`Vi$y8KWm?00<`qNGnBHy>jooh z^Ubfa`7(Y{%BBP^n}|yDdwMvKh(tqx;Rm&3MARxOK}v_hNU5?-|37}vdD<_AA{6E8 z_NSwg2uPbhnU04fPWyaaelZ|$pi;zkmIXt85}I1hFOI{qbF-8$JqsL_@LYVo}r0M<)8= zu^*gIUhIiVJghFR`#!yJm{RII#U&>x??JsHx`odv$I^P8_gl(&Q&ZPT`12k|I&(oU z970xR3+@$JIbnqTA_sMWK}z{klky9bGTkBv^%qwS6V>A?gK>g#gBeAXpo_6uaQi*% zDWwWe8cS`3H;nmT85zz3ZP?Ia^6C~aI)m^T)vjDCG+_Cp3B*A*X<8fDgTk_~2iadTLHkQ4<)2K-ZWEFutbJh0 zziNV+9iU|90kiig7%H5mh@~>~bF=pd63&zfe{J>-P{LWNT{uVK@MLDI*?Ww#=!Idm z?tR{7vA_|3%(YG#aw`cJjAn3C(`~&?O`Dp!mVz|{O-+^bAsP07#rWT1#MMdZb%x?L zxh)!tab2NUR^(G5NfOfuE+d7~l19UW%9B&b#l$W#M(|F)1NU@B3`@y0PmVB;M;CT9 zD2R!nF0tH*qMdvsn(5@zp+qDZ=QDT-px`x}Px50kAQ3-sK$-RvChY`W(q5*f{HmeA z-{wd2)$^vA&*O-+^8&m53kvp?x>{Katj`h)Ebh$~Shw3P`4txBP6A&faEQPY1j051 z>7!KO2qk<$mBtFsT9g+puxv@;2z5PBcjVStfCHLO1MMi#j+SXhDOuewA6sByVIQa( z4#D}b;wo1P1He82>^m)aLItRD!tt`o7ETrLSL{aR%B`NEdv}~2u|N-q>#8aDPQ$IZJ48rv%os-g6YQjMY;r=PDL1p^~Za zTm@|URjhJNy|T1kR(?`1Tg#U`(chTo$y^baXp@S`r?k(x|PFeepxpykG z%dP0aV;QVhUadfh^EuwCyi*G(B9D}jJT?|)TuK3+JP_fI+;RmT(BK%108Bms!{}gN zmxbfFhzqUCClv(E6|KrF3PuMbQwIfW7+Ar=>IPP_ut0%cRyall?qr1%a5j&^Ed1K4 zoFZ0$D6s-`pwI~lS6f$j&05kIc3R<{=(CoLg+12%OiFpTCa+kPuLz9PB2Fl1Q%Q#k zK-8E6#s{cz8px5!#<_q2O{>6pf!j7zsG(rvdZ|*hFpbKWtju-_nqa73P$0v+jkSEx z%KR%qX2Q@Pb-i8)Q=kPDKI&3#axtwqJ?bsO^dq0r<$_V*)dDyBzB1)VnesuI0^4iI zt=`ypcQn48dz`9i!WH}_B_BXTJ5lw%^&g~waRdAXPXszxIfOe9UP0J?e3b0H%UmLZ zI-O3h(}Ax6-xz_Dfx+gq1#A`@V@oAtv1pkBlW1^qG*|r>6uk8-OyU(Exg7WKZ_t_%pg=P9U>JxiX z@QT9&Ernv&aEYYEbtluEV40tP&1RjlWXj7^jFnxL@7NSu%0R(UF-%LnXF8^z8))uq z<@lL1W?#vv_;l_%PQ6Mq*Kh$Y6OD*~%xmVz-3e$UnFSlUh?vMkrA54R3O6NXVD+rd z;9CBk^+{dJj9Ihdt*S~D=caQl^Zsk49ntoVah1!b+%?5#u^r1Tis{x-d?@eF1}s; z?{?|k>JRME534`5w;ifJW?%Sa^(lMoeD$ckgR&dwu-jfqCw%rgIyKMkq`MZ_J#;2+ z=jmkHel?w4Y`>NcEwj&|n`JMt1dZukl|!J4o~VO zo;kN9o=JmSeIvdCWzSeUKTx2@if^(QQ)!yVJkCIzSuWxe{jn;W$_y`gr`oR8qyC7- zeyNw835OD#=v(Lq{}@qU%%8kgT!`Fiy~7{X>S+-i?T}^!wu`=mKO=H*IziZ%0zU%W zb*-OBI*JZFdN1TEKsQ6wY(f@rx-(H<(x0fZrF>a`4D?80RW=6Cq!jKDFa*KR7xyQ@ zL4mqTz==$Y;LUTs#bEY#di;r`=IxU?h=?&!63ec?HfI`*FsQx}L8B2ZHcDvm{D6lYUVXL-f=wB2diXEgzz!LhzAJKnZ)bL2;aydY zF~`EHgL5$CxTPAJ5oxG`7eQ7Q(eUb#;;>qLr54s&LUcp1f>xTLSVkijsg?6d8pV3X zvE}2~=2~>kRzE8%{LgyWI%dOPfM;LpaS%s5T#5yRsZ+&dh3D9b8ze?^ZyM3W|Z|9V4M_Og$#l?wY9YyO1&JC-`kKF%6Wu}`wL-?LlUDt*mwSf;w>dDiKyd4cs@ zUGp+q5v+NIwcb$k8f#o!vz;~FQnQn__tw14(s$SNu|bPvEbt-Y{m60UNk-|ZQ@&R( z2P;)ttYH$(Y&nE{rOAAhO1p^9V7V9hE~42iOObYf$hy=%s#F?J`nXS}F_ZiKT%|cL zL-SmQR$-ZneJmvU&ejDDfsYt680+K)R~=lST7z+NLq$DdHch5!mf9!N&Z<_?lWCKb z?q)t_hNdQkyV)VVqg}WMifvG?CZz+u(6+uO*&1ObwnM{mcF4Gmts&ORimOgo!ID-0 zy@;(runfU%2-X4!QZN9*JJEPMHvSnlTA=a3;8kP7oe(iDWBFe-f6I(A!d+~85~^Ez zCpuUMBB){GmgHL(-mEiqY}|47%{pMJs0f^A2KLFY8<+t`SjV#Cmci&6hwN<7sF~mr zeuO>$m>s$o2D1uB2{x#$ch@UpPFc8v4Zu|m7yk&{{QHGrd;t3YWxt^8bo7ty7noah zO3p!ud-e!-m^zr_Qox=wbLH^#yhGp_MW z>Ak|~`qJh?z=849@9Oj4a|9i46zUxZ=dNk09Ym3V1|>L_zt#~fA@~D=ZxMWh;533$ z2#N^41OPS*A2JY@zu^!%*^>SOlrc1ZfzMXj>~oiP`8*9jL>8;hh8%_qw>cW@!O{Hd zj^KF&Ujq>0Z2!HvzjgHY=ALl$-=5p*=tD^m#2;X|1T4TlIiGHT9AI(Dtt5w_E8NilG4ww)Kn(q6 z1H{npH^2bi$LsVWt^wq#a{|`_Cvf#Rfvd-fT%%0APB_mj#f*fmFu@1RlldTI2D2a? zL6%_XFs#-+PMCV`bpD4~=Rv(JT%r`(}(pYLC;&#l;}+X=caecUE&*qUp1f(=`93FHGCwqhTP zu>xDC*9jY|*9jAp|Ctl_N0qOlWb+x7Onu-CQw$F?#mqV8$`M8$*?nLTk`|U)@2?rg zs7vf9YDAvi;M*44EBP0qaGt-^d)6?YsY@>Z8T z66Bx-CO$Y_D+R5bua#9=Y17IjT6v>Z`n1xol~z*fA*ZC=<_hXZAip#$bNud+!2^M3 zT+B1BY6^aq+BY!VCvOB}f2tZRLxTEY&+7%*RjMk~xl7i{^Fh%0rm%23U19klNRk3}4quzuP@@{3WyT3yH*ADpRK6z79 zX+g7b$Sx1r-=XBj5?@&8Uei>Q7u~Yz?s1&e%In8;#Z1~=3`_1SyWBX-kSg0r7BlE7 zE=j{)hSa31*eSVTBjY+MZE8M#HL-7#Yg(6^tjPl|ExFc%GTuj~Dto|6UEzouOqJdF zm2RZ*ZdA4Xla=lrh0ol-Tj>VzHF8f6KXQOM>W0uM$g_w*J`L8ayl;l(=9a+BS+nQN zop)WRH5?J!b`OrgLoyY;kq9#1=rq!ETtLw}vW z8HdF@O#-1W^ujXF(Du1UR(ieRp7x9fUOiayY0ttDcpl!rMR3^P_rN`of77EKa4gop zS~%%B3B36iJOi>CZj+F8#*7&dgo@!T36zqMc2h$p?Z-3>U&h0xNwEtFaY>j0m;_0* zG@nW*+c6SSBPa-u;K#pk2M75A42wvY*x9sc(?~*ZQh3J!jnLH~8iPMzPbCu(46v~A zdNCOZ0*t4mMNn#yQIO}RPY*%_2eBRxzYOxpwl-c%0cvTxNeRt~+$0}~htymI$8+Iu z^L&IY1O@;m;4c#f(4L9`j9^tlri_G483~ynUIa*fY2~>N!Xu(gA{z&Y*+eMBqy)J~ qK-xnoq)I50LH&s^!W4m+E#kRWU04d+v+1_G zK&=1T$H&xB3$udbI4NIX%1WZpENJEq@FRSEPX#U4_MMKns2ux51RK_5=YF6 zWnjciQNK2Knr!rn%YMt3bGp!MJe}jRVy?u+VwdHtcZQ1*Q7+{Lu9Qp5D+UHQ;7_LG zfZ+!bH*3$i-?7EY89}i zBVZucRZ6AA0v%39O4 zfL6XARq`pKkMARD_%!H9$1~~Gq9L14UeLp%9-K{H97xMNEFdoJizY##wT}W5Yu=(m zubH&wfKZ{m>zb(02ej{|*1qHL7aB%7^B*RmjI7MfxE)kYv%r>6V^s7FTAORtzHQY! zb~R?YxN5#o9o88v7btBu?4mJ#=C}=a*e$_ozVdxbHC1`cqI}oFSnSY-4UN_ibv;9w zh5dB5rnRU{tsTkG=$vlZ2Q5mAO8BmCY}DRsQMFQyw$80RRHHHjwva-bER=RlKpU|# zTWlefwo@_t3JEDz8?(a}svyNeD9l=0s7#wo$geWj+Cuwitpl*6EwrCtpjvo?W{%ma z=E_1V^SoicU1lD!RprVzt@b4IxUHH*tjIiQs}?I?v)T*HE?cz#m=d)@cjz0nZj3&M zomJsEWPi{K?GIYDf3Rx*WJQvUwLz=$Lo3Ye0a|5lvxN?Vp~4ZGSgJDXZJ{9~9Gxco zwJmgj7LL)~!aFn$Pi5}1gj23}_)gjAm?W>z}W0ZQa`1 zw+^fsZEdade4xS}uv`9HjJP^^6J?&*t)|kM4A&RWltexsmu0b#;AR9D1s607^ zTt@5@GX(GDdvH$|#e^&scyfe!Ji4%>K|n@~_leVu*tM5Wri;CNA)ZT0S-yyu0Cv2Z z3(FB~1|%5)4k!x|!epGFOWLQY`G{^P@TVeZzJA^e^LZSRab94zze&Ts(pPJl9o8pi zhs90WVcl-9D|x#n6ZimuDuEh-unnR2K{`4_3vbfZsmkBkwFm65Y?3fUF9+&i`9?c% zK=Tox9R%9JY1%02fBo^T?;vImFt89zj~^9E0yuve+d2|Eac&ig%znvimGI#&|E%7x>RE~y}s znHA;2DnQba?wnK*jY$(!`Uh81>zR9w&9kt&(UmML zP_)1buhUVP6*M@T2VoYrI<&*Y3g}9#02$axqj9yV$|H`dsq(l3?un-zRZHbLhtfoA zFEl8-9ooADUe$;=p`cAw3I#w{OBon%qi1N)k4!es1q`UZ2ImEC+j!-)12(ReuBI#X zv@+^ocGA!ULw%EmKFm{CQ$h~rCj@DNq2K1;Q@N4`DIoARzt-tz=HT?`w+Qpk$frg8 zFbcd{;AVeunldy^8JwoT_8JW6H#XiKEw7cg(+#b-g5ROlV`%7H6n%K}J9%K-0)MfO zqYGFyjyn)uLD+tLn(V#HTq0u>MVTlHd=2=f2%HVZ==1a(=WpoG>AaN5q;uWy_VNbG zQ_fl^+&soBu3tihQeNhLP97WDQgQHkIGz;bio#YdT*?*1Ogi3`5hHxkDIx2^{y4n* z9LgXlf1~qOXR@$znm&Vu#eqD$;_yJr@yyj+PLjEPsn83SMfgXY$DOg-hib=budRF5 zx!ajH({NPG^Ye$SADWg%J9@h~{+jm1S8zJs#$C(lS84HTF3J_tNfD4`9UQqk0ZmFJ zu#roOxnf#g#h-UtYV&5+#8PJew+=a;q&nLdEy{N3B6XZ=<2sl9aiKlw?w%QuQf*&t z*z7Plrmeh2w{mfN6wK5sZQSJ~F8We4chx=zGG~qank8i9hD=hq{LsH#=9$_m4Bc&V z!_eg?$Fvs^MP zMl$tIof%&8UcFtfrz1&&{ZcQxn26^%F}yMY{xPEAOhj5Ju0(FV-V;e1^@0eFcHA%m z+r@A$QWQBjozOX)2R{Pbbwf|GkVXd{y%%y7pqn8YHX#c*-NkfRisb5@`EV(c0XcF) z@0)>VQcm;;7=qvz&PF6~P@t|8a2g9Dc=KF%HJJUS9)C_UynQkUNiieJ;4fH+5>yxyy6wl~rM(XFJ0w-Rekn=l3Du@XPB)ST52r`OrPmnnh3*;6o z=E*eiFhPC#^puLgB=%w)QiOPg&zJPs;FIXi;m}F+L58e{AMmilt3O!>@uUhjJ^UBi z*l{!S_jAkJ+{`0$LnRl+9E<8lmSD&sx}X`6FY4e$P_^YAc=br3=*7Ewaa=E^pvZf) zhDKFOc@Vp*QB|TI>~`G@Ce2`f)`+fIo&}#k1@}S)CxP^TRquZoiZS>DGnarHa`JT!zUFURuac7C$55_bhSriZel|q7h{K;+0aTIyNwMMbnM$~2!;i%QZJ7; zema}ai1-A+Do-CXm~@yv9qKQi9z}BEKtdFgz!~oX|0@gI8hqt!Iv2-~5gr`y!PCj< z(@H#MF3}Uub&I?Rr&mgGiB<6MCB*`tjLUIO*C4?X7D_p=hC?c`3U?YlYJ4_bEaFoc zPbOh0i(EEd=rtBLo?OMr@Onul8TU&vkxkCjyJ4RLe<>puXK3Ppn3$>H-r>kYIW2(h9qsH6Lcb&pLm_ z-o@5`$llE|C)s;h-+A_aHt1@2h^+}VJj^=U8XjRSD;jpPRl-xb#pXFlNzhjX$zZY(QNh)kZ*K0AFb0a;xpT~A>Tzbr+ppL_L9EU zMxvu$r_~T0x9WPC*?KEF&374E@G`U-`#jXKh{!uOCuWYm%n(J6*$vf3xIm2t%j|}a zb#2z!G{aK&Y}zrM&oi4gOXv{u3Nt=W68hP3leb$KfMPe4t4QgEFTQ*KlWc>q65F9c zV#h7J*#=^*s#P0>JWE;u6cAgDAcY`}U=4s64Fe#&7aDKC#v(S_q4C(*l~aNY5o3zw zALuyGj4(nU+buzL$NCEjHbEDZaOV!`)pJkGvG&|Kc;2>Gwm4oE@15xbRAg| zy_y~0SKU|M)HJfxGoe(QLa#8w%S``8&D$$Go2vUN&o+5JRxIAFN0+wFDQ|C@4?BHv z5K?vR>~}&7S-4_mB%Y`qsvK#mZm-PoVm$TBCdJ{6d0(ph4zz4&Z5+ccqs>}uN@2aR zDuUl5IFH~91fL@KErJOIp8x=xg_jrz%OCR!?QGR_4$6gS{PkgHb$d8a-4_lv--0ZT zuoF4V=hEJ0ckHb4BX8^sg3|zm4t983`A+Zf`tlC%@U7*$yuh8*C;nr@Oq zpeosBh@t2k!$P$eI8dj^v2UE{|sx0%VF?n0eY7wgc*4UHs7E~NdVhxeb4TI897MP(wB{gl zH#&B(shNc=R=+V1sw2zBO<*Jl)Nb*qmp=VCHt17WvxzmZ-%07)b|%; z#SycDUPzte*zWVYJY!oy49;vlHwlHyGrD#BYg;*UtX#pAE%K7t;~ zNQ*idEw8%6g-88s!?JTx*nJql_4(gOn!7A!*n8W2Q;SC!JI|erR&+ zSahSG+30uC@JrL-(UbetJHgoR=?1HikiI3jr}C)3T3`9dUv*Rt_^Tb~pemeu*I$hz z)(x2QsDBf3X+_MtzO?@8F#DWZpg#7RQU=Y*wEUbGzV1Oz2i8CgEvi46UDCtCK6W#u80J1mLWBE zA4!cd{)shTfxV1BSWNU@6@ZP5>!|tk{Ck?%x6(g95+G}`3Ze-lF$=Iy=+=4KkHAW* z^2-32`e;Cj2atA#h}!#pJTO@KS>Q-K0NppJ0|WfzG3H+a5GuuZ77@sw!J19)o0Dos zXY`syiXkrY!yW0UZ3%!6;-Ers3-&|BGtlSrCX9o?^P1c{sAPX$931iQh! z78pW<=d`j2hsA6lfzNMD!jj zOJYEUjmt$T83UNj%d4O?BB2=1wY9|{VuRR@hhGADDV5@ll%J8No0Y)4kc;G#*|?s2 z;CL>P=vaZUlfWpz9Q+j%0J`%TfJv;%$W)Y(sVE~8#D@UMFRMJ)LwH2&lPhHbV)hUU vQIa9o2uOE4k5n1^6j6RIfiO=XW`}sL3;Ey&S&&AwV)ak_%>-QkYvjKG#pPda diff --git a/Source/BIOS/UNA/FSFAT.BIN b/Source/UBIOS/FSFAT.BIN similarity index 60% rename from Source/BIOS/UNA/FSFAT.BIN rename to Source/UBIOS/FSFAT.BIN index 5320cbec2e37c6766e962d2a637b6428cdf64151..06aebd5f1f28cdff168a5d985228c9619647659d 100644 GIT binary patch delta 5754 zcmaJ_4OCP|mVW){ZlL)G!RD`hMGG|lNH;B@K6ONhGQdP5#@VCz6IvaU27d^kp&KWg zn4Obk zIdM2mRlT}j-MV$_*1fl?tBdXGV!M?J(~*^8!2&HiGSc~J)7@uB#-JLzMLYyC3@Ilz z<*r^#JSbpSa+u@h=ZNST_Bo>v&g`&GW;+;O= z;dOwxM@gHK*i^)32?`UApM{1;`B_McUM@4Azz)@&Z$G5Q*`L(3xg!#^E; z9doKh1^*2llNVL|56Ma2=y{5~t0FevaPg>{QamcYoKi+53VvEu9@eTNrhw3@!oOFo zNq$-lBcehj-tEv1@_t^8kxEzi@6a>Zqn4R>Q|M=Enfae6MO4eoFUS=9jH)bbtD17( zs>UbOToxZr6)$N#s17l-6x2=*1js?yE+1$gt;5&VnTpleuWsB5yJ=J1R8;fEqxHPw zrD{zxc|b-6XY2%h6M!wZDM{NmfFo@WhN0(_tyPMhA++;O_T z{q5a*$pidVC@#CK@rXrvUN2HHV`7BDOKjhea}UV5Npf!L!k;yy?rTzYKOzD>MJE75 za+cGDp-uR|!dA(h#CGolu}%Ejm3KAs2EVI8t8r@h>uH{FVww=3w0=!2_dViQpf%|&QK69 z?uf;n*i|f4*>TA3j3u@JIT_mTjO9bYrzb0ne3)Fz=O|Bh+X4Wk12|v(^tdBeyku+C z4cAthr}bt9QZnJ@fZiO~yIrq0vwAawK9)d$9iyj+Vm%&lWmE|qC~yXatVi5z#8>0; zq9$cvVFCr>$apS1pWBqrH6P#_@RIl?kqtRb2liSz3O3Z&YVgkZO;qFm8J}Zks3?*M zh*5ZWX2R$a)yu$_1?3X9{2+m6;-O6774ayH2_JVMUqBJU-0r3#WGOsIjv4cp*hl$Z zPm`Cp)M;kLV+plrrE@>ZWy(qG06FwAd~MsB#JEvtn0C(me2EQBt%VHB@m!C|O_X_tWWGZR6!e1mL+5My{K%L~9;3T!LUu-u- zqn6-gDn<~~_HNICKi>NSX*KB}N8` zva4u7Yn{Qs2(VyZ#Y!jj=g4S>g~%}-X{h4PlS6|%3oGP-Kx6ATv7RTEL10e-odYb$ z@!TZ_3!4wCdIU@}2cz=a zAN$TZBj!+a0qY*YENVWi<`J-%`LNoDVD^V~8#jl8Ob*otao?+%+XTADvW^qygE#&| zaOxbGu6j!l+(}kQyBplLv^f-=|A&uYIcFdE4@pV(7lY=iq~wB!-4TJl0nVdK*=sAs&$$fa8vRR?Q&Xq#fjoPU>Y>z4)WsUp89t3 z>Qwa+^6GTsVe+bPGgT2y0|9SlD|R_o96L6!u9O#&@EvGx;-;1RQfDI#j5YU>!DXulCt90PeA zgqa;q8f9X%QS_4ueg@)<4sa?8jyiTxmgjQ16n4b-qk=tN@ymF$3IqJKqddoL8wYwh%}yil0x|DK`Nzs8X3uQY7;KW5nF z-(<-2Hy8^1I}N4&U50r7Q-;UJs3$)P<1oIQ|od26AOmr>-fL%n|{zD-6` zm313bad*?TA#q=)(~FrTAi62*7p`SM-+u;{caHlJu?-A_H4@v$mzd2d!)v%g+7Uk6 zQO~8*4$W*wEf*QbC|qvQoiOBp2^hw;$Bias)=D5oDY{p!Jf@v#W11LEWwW)ZP@`e+`kZd|RxzH=;WY4|GIT_GPr+Ha z`w}Db;c~DppD)Ke^UKi``3wIhcTeKK(DuL#<>&Gj*5_@boSx5XV*88nmw72kbwx*p zTRG+7UPI=Q;r9N|ix2lgfm8B}mgqy+PEH=WCEPC% zbcMp&LP1v~yizEsiAKa zK@J)y!g+;xaYMB2EuwEc_vIz-E^Nu)Pz=2<7I(s%lEyvrs5C^ZgjjCW5fh;o`5W#I zc|b@}UhHq_fG6@?Zl04n`J%6h(^J1!56{$fh!CyGC0KPkZ*mvlz2Gm76giuFcugHhaM#5b1E%f;>Pks-&}pt#={KQc5n z?#aCu7#qL6@m@fj4BQf!fYB)251@&_MOzc*al8BW zKivxmlL3(l08EFNRr6s%juLbbK!X)2rki%CVWxO zt1b&psr<-9+a@zD?@Hx)spqWJ7Nv5zRK6qie=fCuA(ib?c}pr!OXV@CbV%h{2_ITY zITs?SS{5wf4X1oto>g399v}3M47oiMV%2O@xMsqJazj#;+51WL&rdYJ@w46SgA2z$ zk(>AhY}pDo2b6;D$~ zhnDe@4_WpMtv*>czY``8fe&AIzE{y$@Zp=sFC%wN6X z+|65FsOOz8S9c6RDtReTjVv?~+PhuKR?!~3+LW90(Q=r30PZjJd5+$hRB$)6;G-rh z`@wSTHRaJtSNgo>Ps^wFZkK{tPno%wO^hpW0KYT0H&oW{+}D;6al2bwvaDxdMN9Ed zTh=U+OcjDF7_Y8NWcqZmP@qkl#F)NjFl4;5rC9ec<~1OT(S3!CZ6e<`B0;)aR>1q| U-&+<)Ok*D0@3vp6JT4%@i>!qLzJKH-dpcA zAbVms^sQU>es!zr)~%{rud9pg>SB8$Wd*065U$4=*wN9>KP>*=?~RT_F@Br)2x1sw zBhJWSHK(#`CM?3Q(=AXHnbXBGn~Xhd!3Wq(_LE%v7W;%$B;W~FuVsR^N#ckkPWf<9IV+P=r#nJZmV`D}+{=On5XB|kUHp}hXNq1mu6NPrji8C;qJN7))?2+4T zRP$X)g9SygDiBEuLVO?+rz+MNzM_ib3eh^Fn6n;@yA;c^GeI!5QXv^HhRVI23d#7B zRI^1P8GlC9;NK~1DxaL%_Q|nE$r(vyBv~)lGmJfI!ZPF)4qL!8WPgYp2$F*V(maDU z;LXZZSt)K)*1AL=-;_1jEr+V??pMmyO=OacUYuRMl3ku&la|y(l4^NlU3y|gnL#Uc za2Z{W6@SH-6TM#HR|>!T`2;2cIs|rbcMj9>VQu>dThT6$BaMMo|9KNE=DQ7@ADCh< zmt0N?|Kddk?eI8_^-Uc=uWf&~p%LFu;o|WqpYWgQem{~k<3hB|Pn-|PnMrbHikz9g zbTx`peofZjkB&w=sd)&1L6~J(1$q|$BC1pp66aUPiF4v7SI>f1)8Gj@O zZ;M{WLeU<*H2!BX(rDcghW|!yixvFKXp2IU=2@!^V^jpbrt7fBY6OPg? ze;GpxW<(kgX^{Ui2Jh1@VT-N!2ihFPAE+4xc5BO}&eJEfkM8{H zgqBz*8DgDcU=&rl!lggaLUW=OM^P+|BD{Bnf6?H#byG3hW>9IDwogv*pAU_L@{gL*tMlUq$@Swhwg(5x*Nn>bMjZ zirTnD#dSRmDC~?|X1pP?=(>KKZU}n7`Fz4Bxv(`D#+SqTgfH@NUtFd}8%LWUdmP2# z2XUO7Yue9k!6-ft*Tiq3j`=V?z4~m(Hi_O&65|yWd91APuW=P-ehZDv_0M65Fq2mv@5W`^OIr;GA_JUA$F5pm3r`T&kzoa&-XI{exF zhidKpuWVh?%SB#pH7Q8t3|Sw5z~J73xG=l{GA*)&dzUl(Ye_He2)83GJhUV&9^&K& zRIt}Pu-9sg)kfGLsMG@oz7Y<7s*DLM!#f9+d0gQu0dQeq$!ZThQ^lD{R}PAyUgOC@ zkDY}n+hNM|Qn^DMJgKMVDWG$Jg>k%eg@JL{WdJJ;!#X8civ)_82T@yVT#qm&pT|*S z>%P&LVje_|l|90iY9Va>!!XxF6Hw3NXrCLtvCrsv5bg7C9ya!nEzLsM#z(+(u7$XY zN8t4Hut?~&Dhyk@aefi#8cRN2yb!$k+rX}Yqku$8%g6=1iRLRO~J*s!4nQfQ8VjVP&`K!WZwg_cak2g#5&E0 zAvPBk`E?%jl*h^#Xa7;1$6=Qp&&>p*;ka%ihaXh6l2<3oJIJe3we959>8-|n)lx~{=Xv7gmj^a9+35!QmS$+vf|1U~U0H=)E~X=pe}xQ5E-5Q%en1XRk^@s@|1`Aw z7OQjtX?C`7_vG)CcHL~$l85X)eCKnCcDgdNiw!W>e7|KLCu#ZE2;@8^7bxi?&W}m= z1I|F4=SlY@2Uoxa(mlngh_jD$Pn&XxV~W&IL!$YB)K5ZjfzgMV9V?cr`7r^%G!ENa{akvLxlc9vUez~LMJ7c`u*;< zo=dGskjvcaZ%raj_kgOFIQy?KTbB&4&9&WcZvoWFXE*!5r>!555W6J=|_W7jD$sE z!!Pp0B*MVK#1=^lrtu2NH&epCFsNWg8Ho_L;+tS3c|7^_wd8UcPD@FPl@jlv`NaFV zl%3T#QfR1`lz5Kz$ERczd&H!gu41uAT15zA*yRBybCin-IAupT1qy}u(G(F;$pqHR zzA2|)yll(ju-&We5L#liv@eAu(zWb0HZuh$az_=7CNX8|;VPFO7FpO=gN=1YqtkfC zq(Vw2(b>!C&gmlWc58`F{?qRM~!W=*t*pJ*Z#Yy>uLMnq=wijBVM4euJ#B>s3D!PdgR~4Z=)c8@4mAkG&(+@Y1Xo7RP0RrYbY6;iMXVJ*$S@Z^lzuyV;Fq{GIG2 z37=fTVke?3^V0F!%9T_!`2Kbjf>^!?$xUX-|dk1AFiHtL(YhowtJREyRD$J-Ij+h<#%eY<_SZ2!nHi%MxHQ|hqqYLb2CDBdqxM{;}?agytvW9@jJeZ6QS`t zcQ>C12~(lld`8G(;qQmge}pbO`v8OAw$1di>B7L6U z3ExFN1NNRTA0H}wIxfos;ukCs3u8qRi~m&k6jl~)#2(w@SiACZ)2`v&P4>@5JPr2U z@Lj_5N_pGBR8{MhP&wL7@5vW;h{+6Uz}r`5B>bWfzAp?w!b`sw(Ii_Ax z7E}I~$Tx{pCDKWe{!XO75^03k>YB)ZB+?nN?IN3jnm8G7MM+Acnj@fPD?Ec)*|-01uKerRZ{fwi_1j9qZlI+;tb<4zHgfCYRt|?st)0Ywp1Z~+O==z%O{{0DDw>LNC qVayRw3);RM#yOGY92Frwd!LYK zI<|IEYZp|kw4IKU#yBE&cYO^F;)VvXhxsq0>%cybN#xmm)AEv%6Vs9sQd8(Pm2^^iLjKaagyf{LX^B3b zQ`fAmTVJ*6(I;u$)L0sjDLiH0rzdIpsg>(DRIRC|Q{w5R^m1SXaUai`N2``UN>^>5 z(H1htcudnk#f>Fgsu@yyX&@bGm~79SWcb;hS!*Edxy(|E3~&X>|MpBzp)Mg%t=Ef* zUcI=r#Xg4)G8nFHns9A%)3w?O*XpiqA*HS$vD$+qTtNhLh}vYi$G%N5gi%GfNP@JV zawOk&b*bKWktu}z6hja;h9qp>Y-$PA&fchGvjb2pwOR5NQ^tP9pp(>mDy9^XqR|vx ziu9r=&2PJac0u0-IAT&cWuqCXU8$7V!@1d?}jc zQ9|7=MaMl7$E!+GOk4XJaxIn=!;*U`tgOUg^5*KrogzAltM}-n=rD_+90AE#A_i^R%#EQYMe4Q*_&O+%PQ1JVV&9 zo+=4#yt>@sNO3YmqqCmqlqUJ8Ml~|mM5G8jucim_a+=4pB2t3!GG;6&D5V@sRAYV5 z_P(N;`o4x5Caw`G=(34Vzt@&v-Ph1D3iT(USU}{^lCiCCUe`I$z(O)}B_t zO=?cBVSU8;Ogu*V_I%e<0od1?Yp|u#uXE(gXs964$w(TVHAGxoeUB(v-pHO?j0{q3 zU?|@SIr)5qtRQSw3k$A(N*XWQE92^&yDq(jX3N5mMOqv1gOsc9@AS&>NEDm(o&XEP z`2V6~zbqplObk7olV8ke8`o*qGM+WE}YxCKRBRQAp((L;9i& z&r!;c7)OUGE2^PJ0IV#5YQ%QgAI0e8hl>AOp~!J)if(%)#Y&Tc84n_J>m^a)mM@5f#Y26aHWJOES>BHr_mwyt zS+Yh5#u$SN3?6Q~BxP%h&V!9IsB@SUAsp0MPDaKD5=oEYyD&-4rC%deF^y^|02BaL zzzdpk^11qJ_fjluK{kY76L+p(=cNj5WGo_522sXUyO7c+HI}y_4&tg)dhxS2kmZZ{Rse=km9C@^o~0`$I5+|={YDeM@} zd`8;1E(sx}XT8rlz7!1)Y7xuU8!?^n;Z7$}c}h?ZJExkK!UL^R8Qs0VhASj*p=) z_3p6=;xUsCsSICw^w$ZvvJbhM0j}P4maB0wQg94}7+`xyohL84HwqbjBaMJHiPZlv z5Q0|TI9kPr_Z@eGww~4b;(-}l3pNWbj|Z3DOJThIZS3i>jubwzdwe0Me{Qbfg%f~+ zy|ERd-nXZrrvXL_+kTF21EoT2B68xvvKaxoEScu|9?(*%`(+0(!XTdyeafk$;7fXOV_Uu zN>uH)da)4PV#QiDrP#xSG_Grc5%e6L$s}di*k=|wnm*L|8))#|Ulyh`eMn1znl4g@ zW`*ELg%N#g&tx5sB%v#TMzNHF@d(Bdfx7)-jZy$FBs(1WIdv20F|`xuI5*V+!JL^+ zY10Y5Yi%q}5A4}Q%EpQTHh&pd*E#STGNRv*fq}{`(_Z`8mw^@w%Y-^i+(z`QzlKl# zL?Wia#wZ#DKCXIzt904i4@S$|i|4`mfliWEKvcERGG@Gh#z<-iSu7xNyfE7U=40Tj zPRAT~6L7Oem}qpj%WWehnvMBdum`~N-LM4U`e8gr1=xXSISElW;hw62aHz%Y+IGK*^nI8cEN%t| zp7MT^qu0&BC_}qN5DU$*f$xf_NE&sjY0r|-l#b01J|&_1Lskc7hrv*23^QaR1M$ku zBH;}+gghE}0mJ=+6jpdc&X97fs4R44@-LB_J6F)+O)a{D&7Es_AZ~N#2HIm&%at9P z&7B*0)Tqs!wVwsjn_8eicSFaFo2M~IxPt=*f;-~6DUEBFvki)R@f?=ITyH++AA2ZMeg&zYBF8yoW37yJ^+jYPg*ii990WRMJR*M@L$$T>ZazhoC7DYvXrg z?5B}iJ3VPntHFmSq;zoA99MaxfJ^0Q5tn+yS|e37d-M-Q*6FTg@;n7ciS_gchC+n~JN!wLZ;g&I@eAwIPlU_5v>o%Te&Ei%u_S zj!H49?J$^=1W|X24q$sJoB^Faw4=6#wv(QO`unUOqgr$^b)9tW4dUiREyUL%ZC$4k zzs-WT+l#bSmaWix%~5DO6O-S7am~>dR;7gzYhY{eYcQkXL5GHM2xMNz8rrlNV-zrF zutb}-xJU%HZC?Vb>^%#C>}P%<8uc-YjMzw^Y{Qh@3k`%{RfYM(Xalj&KpeW69Sy=S zL|d3oqHU}_%3<J{gcHY<;@3IP_we@xPy|< zHfU?PgHm_^&0ioIWNs!e^9C*YE-ESv@?tBuQ(V|?)KLneF8H-vW=f->cVCSm3Potu z6zqYanIl9YI+TM@LFilqv9B5#S-9n za8hUR!W9cVdh>_-S)!TJ-HU4wtlYCiM5~!x|oRy*h}!so=6S+ z3PpH>eusXyey{#T{Q>Cfsv(toON)nC+K)_<-?uj&3EUbF^0 zR2~~?9G!r>pHUE*_qlWz0ZGtFUx`fMLnDu;!4wPB{2biD7QTapcj#paEGo=V2^Pbc z5&irL?q_#5a~mIWPxf0ehn0_n4p^?7(!FdTC=qnM0zv^I!O1;2fWrcL>cfo71d}|m zN%apQ(61DylyTK>bCt(7z?N+Y@g`UK)&{|o_qoakf{$_X13$OXHJpMS=BDIx)yKKY z6YIEYUWluH$W``3H#xb=0ULXBv|~K@e)9yb`c`z@p_}+y7#yz-*;0#;3}IiRY*75lS@BAaOv+5 zYIovs)dGh*{Z4XEz6%-X!)GAwg%jM9?-+u)gYV%qc>n9AiH7mq!ISvqUH8ig{PGUG zSh#95Cte-yoy3O^?kf|w?hS73n_Tq?egwW!j1DJg{Gl(v@{5ylBcCeiW?{Gmhq-Vi78}z5OKVbC0?#QyrlcSW9$zJC zrCrI8)ITO8(b(v+m{fNIxOQnh)SDr^tCd`}gsYUo?$FJED+bGrgXsnbEQB-DSxq=A z$%4Ahr8gI(+-i{akhjR(7M+)2)4rRlQqYdE6Xz{Xc9@z@(=tJ!dQDyD9NGg;oYX7p zI+Jc*1gQs9sv&dV%|8p^aK$#Zrrc2m%e3IedZev?<>npC6Of7mleJWTGRjIGKk2*& z9>ZXfdIT(;G#0udC*NXaX7Q&g{831UX-m72{=BX;zV-&W`3AA+29a?dPmZ4*GLYzO z@+`lDX?QkyC9M|(%hRw&kSZlu@+yFn#-hX&o#c`LmZtnk5}3|oV^cFEiv)00>NLrB z0D{<=)HKOI1kj$EtW1aDYaFaJVGe=$uhSciNgHkaU|dBc`C%?Wke_0xaXLXzf8ucf ziLPQOe0q|v_*)DW0wnusTtg(eH*fMJxkpBWFL?o=pr8z;FRw+V%Qzt-D-8spPS2nt zN$*(%5i(^E3Z0iBBgrANUc5Um)OsN%P6(;KT{qbQAmJ#;C0b6hMw8~kEi6@Fx9>>RaW zJRemtRCfwP!WPVsnZg*ykGvja z$x5I?OVQmdJ$}&RV38C2Y3noMvbGd3USLso`wNsUmZt#C8W9-&TKNVVwAu$dZ@b*P5 zR%_JZa4ZDpYH+aDN$KQSNsTSEs1SDfWR-d2q(lM=u0YH^;!#zhg>^7QdhI0MAQ&_7 zy5qAAld39k6<=?d1a&|;Sc!_lBQ2B= z7Um=15spcC6tJDHsmCXz0{PE88Lgc7&fF!F1c zK+7k)Y}m!UhLDNJGjN2>Y)mKMlp!t-CR0BCrwQ?oX+n?%&xh8{v@kzT5qhzP=!Vdr zGATv!kjJ1+lR|O$ADlEMg2@&f>k#_-A@1w`n^&hmU)!djo0DFGBhA{$*%X-Y>EvYG z%Rf)fCgmt)N~(5g2CPEo=T#VpzVFspthUFN+E{F3hv_kk6|WXnWuiS((#!M%lrCmK zq>CC5>ofy$UBEz)ju{BnsRz_LMP~>d2qO>0r4LMjp*(#cTkV-hn%~di3z$;41yXJ! ztgW1|wsLX@U02`D;nMrzrN5K9`uiLdl5N1&6=$c<6Kr(@@tqPH`dX?6}Th>4DHJR6P<*Zslh6_PR$iKd2Ee?U3y>UZT^(wgADk{Q= zr7M=MeRAb`Pb8Z5oa6_-)#%`~JR@8W(P9IsCY#o%RglkkU53XD8~fpOM+$6T2fGH= z7ZO^k+@sD>JpF{2rRRd@ihG6!b}y`NRo2#0WKY+p1J(`Yl0 z5agXjjuamFeo~5o0t7q-(Q;-~qb-QEvS)G}4)x=3$5F3+q;RDO|5zBfuduMqu&(aK z(}9&uDaU&jtANKZur^>$yX%c1yNA5AZ8B5{6%Bd~zbB3Ya|RLnr#c*H(?l921ai6g5)-Uuts<}H%H>)!RD@9e=^~NSwh=P!jWUS#lkIc3P!`0+uzE5KEshn zs^zfE-9HsEGv>_B&vSbttC}c{*d=2+>`Ci zpNbbB9r=Z}>A1Nt zvpqEzZ7+IMViRN?McX9(gJ3v1FngXPcmY3%-6H77Bah1^h^}pB8IK^_)$e z%CF<#e9U=CvIb7c;EHU4w!nffgxniy=JEoVSATG%%r})ZHPeiM7Q+0(LL(pNFpqUJ zmlg^URt9HIX@mDv!xiJqz~j`QVtS#issa?72CttmvnN;M+Dy* zi1Ox#8VBbBSPy!8ds`$87XB`tdqgZ2^M116%leqNVR+Sc6LVYx@q9 z#VXm)O9>osG1Ot&+W9su+XBaI{5;e{F0@$jX|$VGGDI_yO>Y1VDiKI$-4bssv`Sv( zm3BOa4_qgcRTW-a&tA5$cZyBwJA+oku{t=s-UC#FVQk%^ArstRHGri<70=HD&%;L! za4~RNCzcRuNXK?-3uXq>5vUlu_usU#lu(#-=JS{ZLgzT2Xyt;Oio`CAoz#q9lJw!fHl6|+lww@Mw;_PfTNqhfzL@rCAD=+? z<%72sm^K~$+pH?0ft|N_X$KT_pSIq5yAZIJJRVKBI%-WH-@|;4HfUC94opK|G4tVn z>nFPV^S9Uw@rNxJ7mkYhk}|05nMDubBaS-`0Q6*|eX*#~)Rsk*_88A36Q#&&QIzpv znK`!H(bZwK-D5@N0GrcSm`7EZA5@shWoFkhgU6rE-F(?whT)WQT>4eu@-B}dOELW8 z5?qewsmFQD0FUY5%Ts(QJx@%DL1B z=Du?D#^MRdF6>FLcOEu)tMs*1fEn0@ zGqcQqXN^5&PvFP>vP+a}88Vgs9@8q8MB&GdB}=G?<;}JwWg^W-`QJ)94nUOq~-j%V7% zmv2JZ*6dh5F?hdG8ojA~Qv0Os+xd^P+InL%d}3o`+kNb@b#`WVZyUf)^=;%>J|8t0 zrK1{LR+Uc!But0-9AU+of?@mSV=iY`T}zt_;JJ5!dwLi_xXdS9=J#FZ1{eDr0m%j* zNHw@zL{t(|HAJGs20vr4cK9zDMUuf<88IA(VdZ~d{+&ZH)qDV-*pV77w(b?8jqM-< zEjFvIy}!fOi-!VirpbP)4Km+m<-a!41feSpRa6p*#}J=)NcKIFZ6et-B>N${uuaeW zI)rqPzd3{;&&KiNA}CAUONF(Eb3e_H(Tci1W>B=u-=4DuE{#^1+G?p6sY6r~b&a|~ z1&Ds6R*OCseJh$H-j233jtP)N)sm4!i;e^fbJZDECqqV|3ys-IeN>Y@yU9K$!@Hs? zBuWpT1Z~%lKcl4W`IHns(AXYRDT#tzy<>@CSs zAg>)`RWrp+ex{BtbW}yiXy4SDb=NiELrb#m zxds|8D{>srEsCkN15{F&f&f#plup)*0cc! zy0An2zxElUl>dy8?La;|BaFThI2&M8E*m+SurI#tf&sa!t6QaVSp^IPH;mO?T_)vU z+t`uJJZS_oFFu?Z6!&7qr+!o8w{2|de^n{SnUvqP{Veg6jgn={=E_#c8f4pLI}x{Y z75PUrZC7#RAsKAW)`(1XruMA%u=eowh!&j;l3CpzqPDY{=#RV7jP_dlinW)W1tNQG z&%f+-&H``sj}{35Pqt5LU(rB&K+LP}I17C3i%e<{3p+*z@dG{bD-Wgn#aW=V7q@}j zB03xW+2dmVd>gg*l{ z2s!H|JtAj~gw^lgTS)FeMSEk&W2k0t29&4vPMZFNn9cL~=BW4A2V4f)UT3jROC;E_ zJ{h8T!ul4ck!WeVyHb#yuCae7LftL1nM~ z-<37nn|WpbX~{SLE{s~A3#a)?Gvr⁢4BC<{0I#ni~667B#Tk_^P%KX zH17H3s_Tjiz7F5j%J-B#%FU|1s+ZBb&qo_SRe7@fS<1fs!L^AqL)N@o)+)i|la z*UDN|n|pG`~tgFKp@O zo_-e-{aSiWU2Rs}_;J41vFQfSGLUwbOATK9Q)ckypK^l_e%5uc zHukv6Ue`C-UgzUuU*v5s^1cOd&p$Bb6zbX+YCNuz5C$20U9~~GUaP#<1bD!}p_mr1 zw^cl57?1K_L+r|b4e|<{Kq+?%0cA*r{g71lf!dJ>w-z=CQ`?&SSiie|O8QoIhI<%>D(P+MgDS`@+`CcBp9>S|TFodtF=6nhr-U1T^1IKy&dlq(H6G zH6oHOfU(<(5+1$iZ_k+7N82-JvY-3gWwUHCOjSWw8ygkC0!cm#QxG{_S;_m3QkDJKJoV-eGn( z*B=;78FvRM@3)%;0i$zmAh3F0R^E4}1=4p<1FPgRbdmBQ^SnR1Ab_13P}e#@Li9s+ zs9Z+OtP^?bq+#uwbhi~d;bS58tDsgDK|qhv-td)9z&b6vF~Fq$2|xgZQn73EnKp}J z0IY+r{|S@84AufeEM}ewk6G|9RN-6~;7!ZiRkZmSB99JufCadXV30%!O=eF7wX&w5 zR^|XUv$d{g0MZd^9Qp%3!ZO&F_uOsKQ4V8U&w%1-`WNPm8)s5H-J+9DY*k)`#xoyb z?8T{25%0lt`-;iVbO{_6LrDS7xo#X^X7FVun8TcRD{5tq4MDFAs$pUXr_CfMl?3Yu z0`686bx0#iBCVuh2AhPOhZ*(jL%cyFc+s{)f#hM7_j|))h%9I@9l^e=rqznsY@-^i zyifad;i=3KM0>z~n(V3r{T-&lHg;@C>qv=3BPBwEf0aNj>Tn*(@;%ewD7Kkn* z#U4ffd^Oex=0oK$FnK_G*u1b-c4b&AlZ%aVX8>p(`oo+<8L-4{Ib^_K0<3hSMkc^& zjJ>D<-Mn|k_52$DQ^Af<=ei8O%;d`~u!mXaR@BNA4?+2ZYM9YOLH!cA4p|S=Bf>v% z?ht422+pup*tz6%*UhplfyFy~H*Ax5us9v&81up)74jnZR2UZl_70}POJPHStqJ2( zp)Z0@gA#gs2Z=X5TAugDshtP@`O6pItaxhjoOpvQ^ls0WpMCnl zp*;(7)>mk}vvimKa`Wfs51;(#^4C8OH0*!t+@hIVs+Ck~%!BW5e17KjgF7CpEhvpj zk_5bWe)lVX?`yp}AyMu5WMxtIk-eXs=)8FQJ4LuYVdYFaP}J3p!aG^ysF%@}9e&efhzsdk#IdV$Nhke5mX%mwvu^`1y}c<}9dK z@2$~g&0JKyg;K_(etmi1$NdfG-l~19v>+)eK=S>A&u_ebX2-$A37+c8C$o#rzxT@S zzQ12>4Oe97=RLA^+1?{3KDpRw{O&f{=LV43_o1@&4f?4^iz%5pGCc~?55xT zIaiayS)XirAldoIrI=%tJwXQ-bf%wss!#EJ!54`iRNvAZ zDZgPbp06Juw@ooIN0)Y~_Ra1XdwQKi{>+TF*mtUa2>D&{SD7Ez-S>EUnq}16D{X-< z&9|m~xbdFPbNOt-`%l;-eqY8-{Nq-qX!}&N_RZzp{%G#Cl;#b0yq=xa9{29*-mq5} z|84vqHb0c^%Kg*m4MP}w}>JM0**qW zrV}nWm-tembZLlTKPr<<<&q9V5YqSMel8I~1R6XiyMO>ECj5`U6LJ(CJrWZ0ks{kA o`c5>G=E{1(Z>o#-*0a;oQ&p zyw2x*&gXMp_uA2+=;%-c*&U>R-NB$@a?iop3)81&W@Tkeoz65jFj-SGW^Uh*k)1U) zH#0nBR`cezyBjxb+{Tz@r7{?K(Dq97WM(b14k(zvWn<&IjZEX#@DTJMS!N*<2vR$h z@N4HOJ$FoC7_P*VU(9{$$#3NdPdS?u&( zO~w)yE#W5#(sR8PcNRc2bTY*-|lMFxKVd9=!WW5w^m&_uNUXdufD+u{zQ?a&YMKrEq-SbzVmlS0f`Hf;CuIYmAll84Y zPX^V>qF178L7A3mH959j*E`A`jvTIjD2Jb1u1&VGN93fO@SLQX5j@3+_(O7% z!gv)s6%?e)ylj%SePGXZx~2VkM+=*7g$4$cRqX>myw<`uR9CP;)-Ax&HXyHWAGm$G zg%4d`0bFen5d&QVU4Sb-ZEoS`0dg`%MhsjWSOeI@r(3Y4iqF1Rv6G;IL?268eJw>X1@s zzug;}7nG^63&8+O#L2&);|o<@-iLCCpt6dUtkJr~xS0*HZnYl>_OX#xUnSw2Lyn@& z1mFuMSqBocDJy?`IjRaanxyzEt8h6))6&Q^A#Ck<)U(-@)xLd@<-+ z@Z2P^_gM<{W?H5`z{ZMBbn_<0Tj5~itZx2M233TlkV>>IBw6E5^!C^alB@&ra)%4N zj*f*S%0ic;4?Xj-V13`cK-mXli^4a*=EC^IZer^t$7 zgNXcH=jB!Ren>1|$sR$Q!=lMUXkXZznXlJ)y#*>O1ZfJV1tZ7WOXck9GzIaKX3%A9 zjuaGhfsa**;Y2c1#I7K9cx*gKl~oAspA6+V_*EqkbSH$fw@sniI4k=YniXD@DmIf2 z0o1GLTNZw~bDG0Jc^M69e!jtvD&7KSI4^RQEs>xwxV8L@s z(bwVWvj&rL_`cu@R%zW*fR*k$pViE1J|s3&8s|9J5{;PmaDT3j|Dhcis)x=YuxNL_&XawdeNWN36(0Xo1c|AGTqP`XtOSwaIr?fgYjOW zeONf_XH+MEaP|X6!xl;evCd4wt|b|!fWn=-GaJQ5Fr{~B2k8lt&z0;ZZABR!#O{E{ z%0(`=D4>?Z`3~I_L*j}lFxx@A<%2_?fx@Di=S13hah4AJ3yL3 zMA5%6UfPHeGE+RnAx9nLh$r*3KnreK>8N&Lew&>BiX)`raq@e{&@8!!vT=?uCIU5TzncZY7B?$^3z-Tk_!b+76|;Ai>zyVf=TW<9g5 znOWM{wBfGx3_7fNHZm}u6JzG{)7y0$N#u?EbqIexoXwtqhY6jHO10zycp=N{tte}o z!AxnL!K4SMUI?vxv&?8FME|;Z9IUtxnKDRBfbG7>w%*~Nk&*w549o@rneNtie31?Z zUrBpy!gf?Q!C=9fGl`TAH>>WD_=Kimp~3GCJlI8|y?A+RABMnD!_amzDt4oU#z@&H za<7EML&N?VU>v3}Rwnj;0tDQxaVA;<{R-H~MuFswQRaTu5G@8ZXzXWaj)CtS1MdmI zGT?b>4D1}kb9oG`i}_KfB|lJ+gK%vC4g%O3fN>rkAH(yZ1bgw~LJ@5i9Ae@0?daoj*+K(47RQ9_qjP$8LgeqG(I;`6 zCN#&w%=Bt3mybB&slHuO4K3AgobU~XQ{w`Zn^FyZtgpkGvf|fgCmVM5{)$oT=rmRC z>}?i-^qsw1nV=n=AG{X7vv<3QO5WMq`cA1~M<*2Mz4$59cgJ&-@c1xC2+#Waa`n*2 z?s%6_Hyll{v-PpDu{~egYxVZsdizl*7ID3tugstBRcVB~c9v{MuUGI}6T<*AfX9D`vkgmoK5Gw!~tradMhd zo;La#rQ!}B+1DMK$RAJSO87I0nk!Dgy?rD)3o3-CHL+VS;Rl_tNjQ?opGt)JJipyI zP`vMYM?L?S#5(u`f~{vf1E%lBbe_lLO(_I$z%mLd43dsIW6hw!4;)mY1DLiNZ9&X+ zprgd3)Qw_Gmkh%axy}gB0J+B&P%}o$+n7x?PK(HfO~uXNR!=1w{wA@F)rL+c#YBJ? zr9B`9E;$jaoqz_D5-Kk;IX2n@7?L2`PBKyaIT=oa-f+g-+R1px5Q6@9K`h&8N@?q5 zS}zcNzh)uE?q}P2Ex6VSwX65DjgDO~U>6xwV@#>|6UJRka_}4r)7J2=n8UEP;F*Vk z$p~b4tl>I~F%}8)1(vwZu3RJs8~4=1p7+3VAnWXJB_XGAMLsqXD7!J`f#n>bYg}XR zOX3K;7WFkJf$&>N4)&`gHy_7(ZJ~6LLku9Wr*>j|Q2^hgr>{6TrD!MgS+=0GO?aGo z=Q*}jcw7mOQ5vTT@Pyi*W6|k}NqWeGUBX^PRky_?Qxk15hs)WSR*pW{!m;SviL?yP z6(Pw-mK{hIm*R)v;c}$Sw7S{#$r#{}~$1VFtiM#=U_QlG#> z*z&Tl`RIw$CW?J8d5~7H-N}!p=&6IE7R08+Ec~Bv@?2>BM4`rSP~mkP zO__ABviVo*8B^9|)HSJ4mc0V`CNT*mDd6Ddl%2xfAB2|w><}KgA+!u~o1j|7nNWd= z{Z%_~+;paJ5yImtZj$h9aNqAFjL=T?l0v%@M*T>DCk&j9ClF=dnGqfZ<_Q9x^MJYf zQ3|_`us4`o&_!6*ZVC;z+&q}_wkZo+SMHi?Q zWq7n5;%G~C7;*}>8TOg!4sOc0K|hBFJuv3N_FKZX+b+!E62qbgHZUhmPjG}x4soD{ zxPY+m3EPHojG)1Ey=Av#QV2Gw{T5`y7J~10&JdcO78(w< za7uA4eKQS0%#j8|)ytT4F3~$r2fX98Ka@I{%C*2I-GsU(FIK<(qf3EwIx&MHsS6p{ z%_u#Sp}v>E#hKCh6EdX)wPBBr%O|1fh|ustd%(s2FT=qV4CP2jH@Fc!mzidfT=%N5 z?N0&fpM{1Km@4HS6C#+8LYy5V=s*?a+?|OGQ|HFMBQlBRKxmE$T4b3TFMGNcJu|g5 zw=ql71c$s6aL#C!s&s@{C;6zbptDbm62h8dE@o8^0I(79}*l9&ov9y%3$nLTm!?Cd~~gl=U! z7_wZd(;A_P5*n0l_KpApwgmFeGLnCA^+EXZeNBX~fvjxnUE8-Ev?>S4%Vc?{DU{oB zuy5~Fv_7Y3*^Vr)?Zj)0N>WHSxAiVzf>^(wUfEL98bwVL!4J*Z znrfKgrorwM)*M(zdqa_C`Xq~e+L}bNaW+AaJsA2JAlc^_lFuOs`BxG(D%4##rN9E+E83aKWnwdoMfw=?`J7)xnTWMC2CUYkDHOGX3Ege73T&3$4)c7Iv=HeBI&3M>&M@X3F5vo3~E}+x+_c zOs#mnn`>=4@w!Qw0%zuQ^lW}AzRh#yH{wTb!QSLne9)%7DYE_?mW1$|H9d#DFCQO% zQ-S~`7g6Yog38=|BB!(fj2z~~#fCj8>A+?|3>-AJKiRh~AHsKYK3ZFNNIVRJq1cR| z6vBSE5Yo=gMuFx5vzMjeD3mF|a2QkwEmsBecZAS%RcQFm&Hk}aGS39Im;>gWEELU) z0u)w)Eq+5nsQ`s_&6@7bVZ%D$8bsJ~9o;*FquvqqpspDiGHwOBG9wK?^hGIidZY#* zBH48v?GbRH5W}`&Nn@R{VG~5tjS&Vmd4^~U?xXPdRb#vG?00?p3!$Hf3emoz=h6aK zN;L)@Tw$5L73@5?^nwA>u=A~E0*=rQs7YhBm`k$E6Pgr4Lr~MMUTt0;7y0|VoL%Ry zRJm3{CjDUsJ`vFhnxPGF@uP&F0eP>?6v}2<+l^-#c@M2nG>5C22+W^kWM8(Ci zRIdcq6(6G-IT0IP5|f_~cc1Op9FwUX-*%Gqcq-f>GI+hS=K{GEoBP9n3NA^$Kixtr zvBbdlsJ3L)vtm z80gH|Fj1*BlNlDL+6xBifJp z$`{I&y(F4CH^w5L#1L&n8>l(WHxi zvlOxOVwV3C_M3xvK6LTR#l5_Xg==+(SSf>>@{EAy6tW+7b$GsT^AB>M8dQ$0XC_0# zBZ$K@(QoG^p(m=M&};LiQmf~>`6qJGzvpF8O#s5usGna(?G(Y&>*q(38ENwZ_Dk1u zbq>Eh>>doxKo7&d^Q`^5!IXlFp8V45{B1$+q@2&jmKG1PSloV<`$ zXlHtJ(7|~O+PH8sdT*iLqJ+0TBTnvG2y>QrSM69R86eGAh6UhW@NPI9@g3~N08P9< zuY&7y@cx(CFuf-K_)yWW=ZLE`8*nUO)EFt?>SrfQERR-Blr67CZ&apPuyCLW z@#r|(geX4-CCZnJ@?NhLL*g~;m>Bx8o|z`bkc2oq6W*7M^c=^UgvR5^MhAR1f)w9` zWD@Au0tSNaIJpJQS~LqUun#Os$B)++nPuxLkY`aMexs;fTn`*gi!)>piO(!fl6@#g zw#DhxCE-~gZ1t`#E|>kW5*04VmJKGM<|V~u<cOWh(3`E?`eSDBh0xhn6JY@=X;o6ulEMQB_JH; zJAnP_+lx@a(v4K6*brGWBZmlw1N#_gRziNs-LM_uug1 zQYpU5F~x|r&)!@nR(r`l%`)g9RPj3?kYW@Dl3oaF#CfV2mJN6xRAa1k;8z=gXtS`h zmci2WwKu2QR(s+!!%BE5*A`ccxdwaXes%@GIGR_(WzKxuswPVfYcoJ2uRup$(2Q*j zr!1b^0`?m=dLCMI*#nP-4oh4j2JCb-3}Ha3_G3-h#&IgXrAyI5gCe zBYVCYrS0COj;rAlYIvrGH`eeeHR$!-sk77ko|Bh)Z2eBYv_^NSr+?6$cGTZL=vjKy z&)@WaZBO&({)fxZ@=lcr=iWYt+LV@^q<=F$TYuJ zMetB6aM_6UBGanGmDc4VYg+HfDOLXw9%h&cm(e_r?sTnF z)BHWHw!aKvKCcso?v65;hbX2R{&t-+-Kf6TQ-wbpcy3j4(qS2=_2e(Q1@Fwi^8%1Y zT0N`eR-3b6;)(&wsqBd>&{wOHEQz)Didyfb9+!KFpM+t1?Hc>MJM4zl_T)Odv7QV1 z$gUL2h*}IU7fbUU7^X!yc?E_wBBox%bc>iI5i_(3Q~yUSCyN+TEc-=FcCN_!PqFM1 z%iCfZy%LK>uf#{$y7VT#p?1(2u(Gihy>&;EZplhWhBYg9!NGJjfLEJVq8Y0f>t4rb z?@D-c(bpw`=LvPre*+G>*wWDRvz-TSq`)LV;XKLPOSm$m3r-O|Y!s{nmu6+YnR zNuVPzw~d52{)husX?OvSrq<6^#jO%@Z`$Klq4xS2*+%R=uy+|Yc$f0<2Fag+9>9sm zIF4!ulfJ2+E{mu~$!iYE46D%_Ywp5()0DLwo*x_5{suo>YtPG!_2`*9pTV>l>yq$e z&ANKo%=*)|b*tr;6r*`AyVPpVhNsb7B$fcc?-H@ZCk}SC)f~juSMAYCZ&1 z_D-w$C6Vj6Se_8eGh!(U-4)<#8qX)vw!u+`-EK9@(K8z+XwQj4AB*KTP&!ZdY?u;r z`r?NF$RD*Rjf1Iq;i;*q-Qk|pHV^y2pc7ypebw*p2_%*CYt*x$26X`MMZZfM-T`UV zV>kmRTB=!PIN>Qh z;aQRwwx%&QX_Wy{dko|)l)R@xmS;fQ_M|jSH^6aCS5SZ-sv?t${8&lL$!jF9k=fLQ zQ~Q`7{GA7H>zIh0!%S9)$XT?fo|YN>1z31FaKX18?0H4&u$&2I!#nW!&}qX8Mx91c zo>eNUAmq{erdp~MCv>)+OY}gIdKN>K^VJIaTQAf+;A(s@-&nS0jXy|uBqi5dAO>i_(mm{R;s z42EC3H^CB0!6}d}^t;It!n5kCA13Ham-@AZewT!SFowDN(j}YbpH6-}vq&1pEQ*h1 z2E~I|@yVan_=S_t{Y90MoK17l`3-ed8KO#7O;gQL-Kkoy+K4Xg-9WyN=IvXVxI+ae zj~#Mbo2|Q`Ti+euozQ7gbr*Nj-LbTXFGIF{(<}~(@KuI+TKDAzL2T34eU%ZO6*fA^ z!AGeee!%|$2Ke~mrms@tS?QESR(M)%`?7?1`m-PF!1MQb8r~ba)n(l~K6uPOxU}7P z&P3INGI|J>U;0n>2MGA})dl%#sDf$&{q})utzBgd&I?`^To?SC;Qhf51#d+EcwjNP z15MmN$pAJD`6}g}6||f$2^I~)CbkYR3>b_W_fIpF1WUS4NxDx2cLu)~d?EO9@NjTk zNCJ9me;WA_`fC4N=A!`PNr|x}WKYN|A!MjIbVlg1(2b#6QPlyKI<0_~-a_{rs0(w2 zFf>WX_*9BNfG!?bss=N%<#|mgnjmypJP024%h5Vf{zT(lTX(C&|{Od^UsHUibn%<$&^ap zUU}7^=alEvpsmx1jVKQLly5-Q52vJzRhBiPZ1+!fe7$bPT;%ph-I2XnqJK&?Y-K4 z$oa@b%P}plj^GE?xGaqT=ZR1L&IoXxf#Rb1FSL^D46-qm5$`!&5LuiWn0lNdZkS{Y zzHX|9p+VcHE-u(W0+EX_T){j*={*5kGeOBkxOj(l=fK2&UoPn}g+UVu%r_I5uhn~} zouR>8G*+s!oc8W#Gz7X zMutl4i`y~C?}^9@#m4>pruJQfu5-|K$qDbmBKX*dPqDRJ$ZC-G)hW49@u}j%#Ah%U zj-TxzzOzB~VrM&hEKdICEHGq&;a9ud&O zM`Nnc zF4WxPEr(DRM+<23SWH7be=wq%=o#e>ImuMQ%O^ z{s}K^Uo{chS>XJkH@|j+aLRN zY;2q&EpA#Idj3&bC5z{E@qBnZvOStRk{nMZ{Bm-^4M*}aJx-Vh;-rM>jS~~*#kg?^Ba+43crk8VZdgVFYIYnyRnI5s$0rAH z|1>#v>&GO=i*cjL@nRf~eX$%(j^4PR=0a!u3wR*2(!SB zINz2$vCJ3C0>bI0Kj=pzI!Q0)z|90P2Y!@T!H<)8=f5Oyfc_*63bG9NN+!$j$z%KS z!gj_fmEBXir+o7G30koe&M}_+HYbt34*r)3KKmxkCH!#u{5z%b8;CJK+80z>zj6$M zQ2sVp=a&=21SX^e&dmfIk;Na0Cw33od?c2BN?q!gUzCrh`3o%Q`6C77oYS8lnRo{r W