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Merge pull request #172 from wwarthen/dev

Dev
patch
b1ackmai1er 5 years ago
committed by GitHub
parent
commit
e565011a1c
No known key found for this signature in database GPG Key ID: 4AEE18F83AFDEB23
  1. 8
      .github/workflows/commit.yml
  2. 2
      Source/Doc/GettingStarted.md
  3. 90
      Source/HBIOS/Config/EZZ80_tz80.asm
  4. 592
      Source/HBIOS/acia.asm
  5. 2
      Source/ver.inc
  6. 2
      Source/ver.lib

8
.github/workflows/commit.yml

@ -17,7 +17,7 @@ jobs:
- uses: rlespinasse/github-slug-action@v3.x
- uses: actions/checkout@v2
- name: Build
run: |
export TZ='America/Los_Angeles'
@ -25,13 +25,13 @@ jobs:
make
make clean
rm -rf .git*
- name: List Output
run: |
cd Binary
ls -l
find -type f -exec md5sum '{}' \;
- name: Upload Artifact
uses: actions/upload-artifact@v1
with:
@ -56,7 +56,7 @@ jobs:
cd Binary
ls -l
find . -type f -exec md5 -r -- '{}' +;
- name: Upload Artifact
uses: actions/upload-artifact@v1
with:

2
Source/Doc/GettingStarted.md

@ -1328,4 +1328,4 @@ RetroBrew Computers projects is via the community forums:
Submission of issues and bugs are welcome at the
[RomWBW GitHub Repository](https://github.com/wwarthen/RomWBW).
Also feel free to email !author at [!authmail](mailto:!authmail).
Also feel free to email !author at [!authmail](mailto:!authmail).

90
Source/HBIOS/Config/EZZ80_tz80.asm

@ -1,45 +1,45 @@
;
;==================================================================================================
; EASY Z80 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "TINYZ80"
;
#include "cfg_ezz80.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 16000000 ; CPU OSC FREQ IN MHZ
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
EIPCENABLE .SET TRUE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
CTCBASE .SET $10 ; CTC BASE I/O ADDRESS
LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .SET $6E ; STATUS LED PORT ADDRESS
SIO0BASE .SET $18 ; SIO 0: REGISTERS BASE ADR
IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
;
;==================================================================================================
; EASY Z80 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "TINYZ80"
;
#include "cfg_ezz80.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 16000000 ; CPU OSC FREQ IN MHZ
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
EIPCENABLE .SET TRUE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
CTCBASE .SET $10 ; CTC BASE I/O ADDRESS
LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .SET $6E ; STATUS LED PORT ADDRESS
SIO0BASE .SET $18 ; SIO 0: REGISTERS BASE ADR
IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

592
Source/HBIOS/acia.asm

@ -25,37 +25,37 @@
; | RIE | TC2 | TC1 | WS3 | WS2 | WS1 | CDS2 | CDS1 |
; +-------+-------+-------+-------+-------+-------+-------+-------+
;
; RIE: RECEIVE INTERRUPT ENABLE (RECEIVE DATA REGISTER FULL)
;
; TC: TRANSMIT CONTROL (TRANSMIT DATA REGISTER EMPTY)
; 0 0 - /RTS=LOW, TDRE INT DISABLED
; 0 1 - /RTS=LOW, TDRE INT ENABLED
; 1 0 - /RTS=HIGH, TDRE INT DISABLED
; 1 1 - /RTS=LOW, TRANSMIT BREAK, TDRE INT DISABLED
;
; WS: WORD SELECT (DATA BITS, PARITY, STOP BITS)
; 0 0 0 - 7,E,2
; 0 0 1 - 7,O,2
; 0 1 0 - 7,E,1
; 0 1 1 - 7,O,1
; 1 0 0 - 8,N,2
; 1 0 1 - 8,N,1
; 1 1 0 - 8,E,1
; 1 1 1 - 8,O,1
;
; CDS: COUNTER DIVIDE SELECT
; 0 0 - DIVIDE BY 1
; 0 1 - DIVIDE BY 16
; 1 0 - DIVIDE BY 64
; 1 1 - MASTER RESET
;
ACIA_BUFSZ .EQU 32 ; RECEIVE RING BUFFER SIZE
; RIE: RECEIVE INTERRUPT ENABLE (RECEIVE DATA REGISTER FULL)
;
; TC: TRANSMIT CONTROL (TRANSMIT DATA REGISTER EMPTY)
; 0 0 - /RTS=LOW, TDRE INT DISABLED
; 0 1 - /RTS=LOW, TDRE INT ENABLED
; 1 0 - /RTS=HIGH, TDRE INT DISABLED
; 1 1 - /RTS=LOW, TRANSMIT BREAK, TDRE INT DISABLED
;
; WS: WORD SELECT (DATA BITS, PARITY, STOP BITS)
; 0 0 0 - 7,E,2
; 0 0 1 - 7,O,2
; 0 1 0 - 7,E,1
; 0 1 1 - 7,O,1
; 1 0 0 - 8,N,2
; 1 0 1 - 8,N,1
; 1 1 0 - 8,E,1
; 1 1 1 - 8,O,1
;
; CDS: COUNTER DIVIDE SELECT
; 0 0 - DIVIDE BY 1
; 0 1 - DIVIDE BY 16
; 1 0 - DIVIDE BY 64
; 1 1 - MASTER RESET
;
ACIA_BUFSZ .EQU 32 ; RECEIVE RING BUFFER SIZE
;
ACIA_NONE .EQU 0
ACIA_ACIA .EQU 1
;
ACIA_RTSON .EQU %00000000 ; BIT MASK TO ASSERT RTS
ACIA_RTSOFF .EQU %01000000 ; BIT MASK TO DEASSERT RTS
ACIA_RTSON .EQU %10111111 ; BIT MASK TO ASSERT RTS
ACIA_RTSOFF .EQU %01000000 ; BIT MASK TO DEASSERT RTS
;
;
;
@ -65,34 +65,34 @@ ACIA_PREINIT:
; NOTE: INTS WILL BE DISABLED WHEN PREINIT IS CALLED AND THEY MUST REMIAIN
; DISABLED.
;
LD B,ACIA_CFGCNT ; LOOP CONTROL
LD B,ACIA_CFGCNT ; LOOP CONTROL
XOR A ; ZERO TO ACCUM
LD (ACIA_DEV),A ; CURRENT DEVICE NUMBER
LD IY,ACIA_CFG ; POINT TO START OF CFG TABLE
LD IY,ACIA_CFG ; POINT TO START OF CFG TABLE
ACIA_PREINIT0:
PUSH BC ; SAVE LOOP CONTROL
CALL ACIA_INITUNIT ; HAND OFF TO GENERIC INIT CODE
POP BC ; RESTORE LOOP CONTROL
;
LD A,(IY+1) ; GET THE ACIA TYPE DETECTED
OR A ; SET FLAGS
JR Z,ACIA_PREINIT2 ; SKIP IT IF NOTHING FOUND
;
PUSH BC ; SAVE LOOP CONTROL
PUSH IY ; CFG ENTRY ADDRESS
POP DE ; ... TO DE
LD BC,ACIA_FNTBL ; BC := FUNCTION TABLE ADDRESS
CALL NZ,CIO_ADDENT ; ADD ENTRY IF ACIA FOUND, BC:DE
POP BC ; RESTORE LOOP CONTROL
;
ACIA_PREINIT2:
LD DE,ACIA_CFGSIZ ; SIZE OF CFG ENTRY
ADD IY,DE ; BUMP IY TO NEXT ENTRY
DJNZ ACIA_PREINIT0 ; LOOP UNTIL DONE
PUSH BC ; SAVE LOOP CONTROL
CALL ACIA_INITUNIT ; HAND OFF TO GENERIC INIT CODE
POP BC ; RESTORE LOOP CONTROL
;
LD A,(IY+1) ; GET THE ACIA TYPE DETECTED
OR A ; SET FLAGS
JR Z,ACIA_PREINIT2 ; SKIP IT IF NOTHING FOUND
;
PUSH BC ; SAVE LOOP CONTROL
PUSH IY ; CFG ENTRY ADDRESS
POP DE ; ... TO DE
LD BC,ACIA_FNTBL ; BC := FUNCTION TABLE ADDRESS
CALL NZ,CIO_ADDENT ; ADD ENTRY IF ACIA FOUND, BC:DE
POP BC ; RESTORE LOOP CONTROL
;
ACIA_PREINIT2:
LD DE,ACIA_CFGSIZ ; SIZE OF CFG ENTRY
ADD IY,DE ; BUMP IY TO NEXT ENTRY
DJNZ ACIA_PREINIT0 ; LOOP UNTIL DONE
;
ACIA_PREINIT3:
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
;
; ACIA INITIALIZATION ROUTINE
;
@ -110,17 +110,17 @@ ACIA_INITUNIT:
;
#IF (INTMODE == 1)
; ADD IM1 INT CALL LIST ENTRY
LD L,(IY+8) ; GET INT HANDLER PTR
LD H,(IY+9) ; ... INTO HL
LD L,(IY+8) ; GET INT HANDLER PTR
LD H,(IY+9) ; ... INTO HL
CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
#ENDIF
;
; IT IS EASY TO SPECIFY A SERIAL CONFIG THAT CANNOT BE IMPLEMENTED
; DUE TO THE CONSTRAINTS OF THE ACIA. HERE WE FORCE A GENERIC
; FAILSAFE CONFIG ONTO THE CHANNEL. IF THE SUBSEQUENT "REAL"
; CONFIG FAILS, AT LEAST THE CHIP WILL BE ABLE TO SPIT DATA OUT
; AT A RATIONAL BAUD/DATA/PARITY/STOP CONFIG.
CALL ACIA_INITSAFE
; IT IS EASY TO SPECIFY A SERIAL CONFIG THAT CANNOT BE IMPLEMENTED
; DUE TO THE CONSTRAINTS OF THE ACIA. HERE WE FORCE A GENERIC
; FAILSAFE CONFIG ONTO THE CHANNEL. IF THE SUBSEQUENT "REAL"
; CONFIG FAILS, AT LEAST THE CHIP WILL BE ABLE TO SPIT DATA OUT
; AT A RATIONAL BAUD/DATA/PARITY/STOP CONFIG.
CALL ACIA_INITSAFE
;
; SET DEFAULT CONFIG
LD DE,-1 ; LEAVE CONFIG ALONE
@ -131,20 +131,20 @@ ACIA_INITUNIT:
;
;
ACIA_INIT:
LD B,ACIA_CFGCNT ; COUNT OF POSSIBLE ACIA UNITS
LD IY,ACIA_CFG ; POINT TO START OF CFG TABLE
LD B,ACIA_CFGCNT ; COUNT OF POSSIBLE ACIA UNITS
LD IY,ACIA_CFG ; POINT TO START OF CFG TABLE
ACIA_INIT1:
PUSH BC ; SAVE LOOP CONTROL
LD A,(IY+1) ; GET ACIA TYPE
OR A ; SET FLAGS
CALL NZ,ACIA_PRTCFG ; PRINT IF NOT ZERO
POP BC ; RESTORE LOOP CONTROL
LD DE,ACIA_CFGSIZ ; SIZE OF CFG ENTRY
ADD IY,DE ; BUMP IY TO NEXT ENTRY
DJNZ ACIA_INIT1 ; LOOP TILL DONE
;
XOR A ; SIGNAL SUCCESS
RET ; DONE
PUSH BC ; SAVE LOOP CONTROL
LD A,(IY+1) ; GET ACIA TYPE
OR A ; SET FLAGS
CALL NZ,ACIA_PRTCFG ; PRINT IF NOT ZERO
POP BC ; RESTORE LOOP CONTROL
LD DE,ACIA_CFGSIZ ; SIZE OF CFG ENTRY
ADD IY,DE ; BUMP IY TO NEXT ENTRY
DJNZ ACIA_INIT1 ; LOOP TILL DONE
;
XOR A ; SIGNAL SUCCESS
RET ; DONE
;
; INTERRUPT HANDLERS
;
@ -155,21 +155,21 @@ ACIA_INIT1:
;
ACIA0_INT:
ACIA1_INT:
CALL PANIC ; NO RETURN
CALL PANIC ; NO RETURN
;
#ENDIF
;
#IF (INTMODE == 1)
;
ACIA0_INT:
LD IY,ACIA0_CFG ; POINT TO ACIA0 CFG
JR ACIA_INTRCV ; TRY TO RECEIVE FROM IT AND RETURN
LD IY,ACIA0_CFG ; POINT TO ACIA0 CFG
JR ACIA_INTRCV ; TRY TO RECEIVE FROM IT AND RETURN
;
#IF (ACIACNT >= 2)
;
ACIA1_INT:
LD IY,ACIA1_CFG ; POINT TO ACIA1 CFG
JR ACIA_INTRCV ; TRY TO RECEIVE FROM IT AND RETURN
LD IY,ACIA1_CFG ; POINT TO ACIA1 CFG
JR ACIA_INTRCV ; TRY TO RECEIVE FROM IT AND RETURN
;
#ENDIF
;
@ -177,62 +177,62 @@ ACIA1_INT:
; BASED ON UNIT CFG POINTED TO BY IY
;
ACIA_INTRCV:
; CHECK TO SEE IF SOMETHING IS ACTUALLY THERE
LD C,(IY+3) ; CMD/STAT PORT TO C
IN A,(C) ; GET STATUS
AND $01 ; ISOLATE RECEIVE READY BIT
RET Z ; NOTHING AVAILABLE ON CURRENT CHANNEL
; CHECK TO SEE IF SOMETHING IS ACTUALLY THERE
LD C,(IY+3) ; CMD/STAT PORT TO C
IN A,(C) ; GET STATUS
RRA ; READY BIT TO CF
RET NC ; NOTHING AVAILABLE ON CURRENT CHANNEL
;
ACIA_INTRCV1:
; RECEIVE CHARACTER INTO BUFFER
; RECEIVE CHARACTER INTO BUFFER
INC C ; DATA PORT
IN A,(C) ; READ PORT
IN A,(C) ; READ PORT
DEC C ; BACK TO CONTROL PORT
LD B,A ; SAVE BYTE READ
LD L,(IY+6) ; SET HL TO
LD H,(IY+7) ; ... START OF BUFFER STRUCT
LD A,(HL) ; GET COUNT
CP ACIA_BUFSZ ; COMPARE TO BUFFER SIZE
JR Z,ACIA_INTRCV4 ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED
INC A ; INCREMENT THE COUNT
LD (HL),A ; AND SAVE IT
CP ACIA_BUFSZ / 2 ; BUFFER GETTING FULL?
JR NZ,ACIA_INTRCV2 ; IF NOT, BYPASS CLEARING RTS
LD A,(ACIA_CMD) ; CONFIG BYTE W/O RTS BIT
OR ACIA_RTSOFF ; CLEAR RTS
OUT (C),A ; DO IT
LD B,A ; SAVE BYTE READ
LD L,(IY+6) ; SET HL TO
LD H,(IY+7) ; ... START OF BUFFER STRUCT
LD A,(HL) ; GET COUNT
CP ACIA_BUFSZ ; COMPARE TO BUFFER SIZE
JR Z,ACIA_INTRCV4 ; BAIL OUT IF BUFFER FULL, RCV BYTE DISCARDED
INC A ; INCREMENT THE COUNT
LD (HL),A ; AND SAVE IT
CP ACIA_BUFSZ / 2 ; BUFFER GETTING FULL?
JR NZ,ACIA_INTRCV2 ; IF NOT, BYPASS CLEARING RTS
LD A,(ACIA_CMD) ; CONFIG BYTE W/O RTS BIT
OR ACIA_RTSOFF ; DEASSERT RTS
OUT (C),A ; DO IT
ACIA_INTRCV2:
INC HL ; HL NOW HAS ADR OF HEAD PTR
PUSH HL ; SAVE ADR OF HEAD PTR
LD A,(HL) ; DEREFERENCE HL
INC HL
LD H,(HL)
LD L,A ; HL IS NOW ACTUAL HEAD PTR
LD (HL),B ; SAVE CHARACTER RECEIVED IN BUFFER AT HEAD
INC HL ; BUMP HEAD POINTER
POP DE ; RECOVER ADR OF HEAD PTR
LD A,L ; GET LOW BYTE OF HEAD PTR
SUB ACIA_BUFSZ+4 ; SUBTRACT SIZE OF BUFFER AND POINTER
CP E ; IF EQUAL TO START, HEAD PTR IS PAST BUF END
JR NZ,ACIA_INTRCV3 ; IF NOT, BYPASS
LD H,D ; SET HL TO
LD L,E ; ... HEAD PTR ADR
INC HL ; BUMP PAST HEAD PTR
INC HL
INC HL
INC HL ; ... SO HL NOW HAS ADR OF ACTUAL BUFFER START
INC HL ; HL NOW HAS ADR OF HEAD PTR
PUSH HL ; SAVE ADR OF HEAD PTR
LD A,(HL) ; DEREFERENCE HL
INC HL
LD H,(HL)
LD L,A ; HL IS NOW ACTUAL HEAD PTR
LD (HL),B ; SAVE CHARACTER RECEIVED IN BUFFER AT HEAD
INC HL ; BUMP HEAD POINTER
POP DE ; RECOVER ADR OF HEAD PTR
LD A,L ; GET LOW BYTE OF HEAD PTR
SUB ACIA_BUFSZ+4 ; SUBTRACT SIZE OF BUFFER AND POINTER
CP E ; IF EQUAL TO START, HEAD PTR IS PAST BUF END
JR NZ,ACIA_INTRCV3 ; IF NOT, BYPASS
LD H,D ; SET HL TO
LD L,E ; ... HEAD PTR ADR
INC HL ; BUMP PAST HEAD PTR
INC HL
INC HL
INC HL ; ... SO HL NOW HAS ADR OF ACTUAL BUFFER START
ACIA_INTRCV3:
EX DE,HL ; DE := HEAD PTR VAL, HL := ADR OF HEAD PTR
LD (HL),E ; SAVE UPDATED HEAD PTR
INC HL
LD (HL),D
; CHECK FOR MORE PENDING...
IN A,(C) ; GET STATUS
RRA ; READY BIT TO CF
JR C,ACIA_INTRCV1 ; IF SET, DO SOME MORE
EX DE,HL ; DE := HEAD PTR VAL, HL := ADR OF HEAD PTR
LD (HL),E ; SAVE UPDATED HEAD PTR
INC HL
LD (HL),D
; CHECK FOR MORE PENDING...
IN A,(C) ; GET STATUS
RRA ; READY BIT TO CF
JR C,ACIA_INTRCV1 ; IF SET, DO SOME MORE
ACIA_INTRCV4:
OR $FF ; NZ SET TO INDICATE INT HANDLED
RET ; AND RETURN
OR $FF ; NZ SET TO INDICATE INT HANDLED
RET ; AND RETURN
;
#ENDIF
;
@ -267,49 +267,49 @@ ACIA_IN:
#ELSE
;
ACIA_IN:
CALL ACIA_IST ; SEE IF CHAR AVAILABLE
JR Z,ACIA_IN ; LOOP UNTIL SO
HB_DI ; AVOID COLLISION WITH INT HANDLER
LD L,(IY+6) ; SET HL TO
LD H,(IY+7) ; ... START OF BUFFER STRUCT
LD A,(HL) ; GET COUNT
DEC A ; DECREMENT COUNT
LD (HL),A ; SAVE UPDATED COUNT
CP ACIA_BUFSZ / 4 ; BUFFER LOW THRESHOLD
JR NZ,ACIA_IN1 ; IF NOT, BYPASS SETTING RTS
LD C,(IY+3) ; C IS CMD/STATUS PORT ADR
LD A,(ACIA_CMD) ; CONFIG BYTE W/O RTS BIT
OR ACIA_RTSON ; SET RTS
OUT (C),A ; DO IT
CALL ACIA_IST ; SEE IF CHAR AVAILABLE
JR Z,ACIA_IN ; LOOP UNTIL SO
HB_DI ; AVOID COLLISION WITH INT HANDLER
LD L,(IY+6) ; SET HL TO
LD H,(IY+7) ; ... START OF BUFFER STRUCT
LD A,(HL) ; GET COUNT
DEC A ; DECREMENT COUNT
LD (HL),A ; SAVE UPDATED COUNT
CP ACIA_BUFSZ / 4 ; BUFFER LOW THRESHOLD
JR NZ,ACIA_IN1 ; IF NOT, BYPASS SETTING RTS
LD C,(IY+3) ; C IS CMD/STATUS PORT ADR
LD A,(ACIA_CMD) ; CONFIG BYTE W/O RTS BIT
AND ACIA_RTSON ; ASSERT RTS
OUT (C),A ; DO IT
ACIA_IN1:
INC HL
INC HL
INC HL ; HL NOW HAS ADR OF TAIL PTR
PUSH HL ; SAVE ADR OF TAIL PTR
LD A,(HL) ; DEREFERENCE HL
INC HL
LD H,(HL)
LD L,A ; HL IS NOW ACTUAL TAIL PTR
LD C,(HL) ; C := CHAR TO BE RETURNED
INC HL ; BUMP TAIL PTR
POP DE ; RECOVER ADR OF TAIL PTR
LD A,L ; GET LOW BYTE OF TAIL PTR
SUB ACIA_BUFSZ+2 ; SUBTRACT SIZE OF BUFFER AND POINTER
CP E ; IF EQUAL TO START, TAIL PTR IS PAST BUF END
JR NZ,ACIA_IN2 ; IF NOT, BYPASS
LD H,D ; SET HL TO
LD L,E ; ... TAIL PTR ADR
INC HL ; BUMP PAST TAIL PTR
INC HL ; ... SO HL NOW HAS ADR OF ACTUAL BUFFER START
INC HL
INC HL
INC HL ; HL NOW HAS ADR OF TAIL PTR
PUSH HL ; SAVE ADR OF TAIL PTR
LD A,(HL) ; DEREFERENCE HL
INC HL
LD H,(HL)
LD L,A ; HL IS NOW ACTUAL TAIL PTR
LD C,(HL) ; C := CHAR TO BE RETURNED
INC HL ; BUMP TAIL PTR
POP DE ; RECOVER ADR OF TAIL PTR
LD A,L ; GET LOW BYTE OF TAIL PTR
SUB ACIA_BUFSZ+2 ; SUBTRACT SIZE OF BUFFER AND POINTER
CP E ; IF EQUAL TO START, TAIL PTR IS PAST BUF END
JR NZ,ACIA_IN2 ; IF NOT, BYPASS
LD H,D ; SET HL TO
LD L,E ; ... TAIL PTR ADR
INC HL ; BUMP PAST TAIL PTR
INC HL ; ... SO HL NOW HAS ADR OF ACTUAL BUFFER START
ACIA_IN2:
EX DE,HL ; DE := TAIL PTR VAL, HL := ADR OF TAIL PTR
LD (HL),E ; SAVE UPDATED TAIL PTR
INC HL
LD (HL),D
LD E,C ; MOVE CHAR TO RETURN TO E
HB_EI ; INTERRUPTS OK AGAIN
XOR A ; SIGNAL SUCCESS
RET ; AND DONE
EX DE,HL ; DE := TAIL PTR VAL, HL := ADR OF TAIL PTR
LD (HL),E ; SAVE UPDATED TAIL PTR
INC HL
LD (HL),D
LD E,C ; MOVE CHAR TO RETURN TO E
HB_EI ; INTERRUPTS OK AGAIN
XOR A ; SIGNAL SUCCESS
RET ; AND DONE
;
#ENDIF
;
@ -340,12 +340,12 @@ ACIA_IST:
#ELSE
;
ACIA_IST:
LD L,(IY+6) ; GET ADDRESS
LD H,(IY+7) ; ... OF RECEIVE BUFFER
LD A,(HL) ; BUFFER UTILIZATION COUNT
OR A ; SET FLAGS
JP Z,CIO_IDLE ; NOT READY, RETURN VIA IDLE PROCESSING
RET
LD L,(IY+6) ; GET ADDRESS
LD H,(IY+7) ; ... OF RECEIVE BUFFER
LD A,(HL) ; BUFFER UTILIZATION COUNT
OR A ; SET FLAGS
JP Z,CIO_IDLE ; NOT READY, RETURN VIA IDLE PROCESSING
RET
;
#ENDIF
;
@ -374,157 +374,157 @@ ACIA_INITDEV:
ACIA_INITDEVX:
;
#IF (ACIADEBUG)
CALL NEWLINE
PRTS("ACIA$")
LD A,(IY+2)
CALL PRTDECB
CALL COUT
CALL PC_COLON
CALL NEWLINE
PRTS("ACIA$")
LD A,(IY+2)
CALL PRTDECB
CALL COUT
CALL PC_COLON
#ENDIF
;
; TEST FOR -1 WHICH MEANS USE CURRENT CONFIG (JUST REINIT)
LD A,D ; TEST DE FOR
AND E ; ... VALUE OF -1
INC A ; ... SO Z SET IF -1
JR NZ,ACIA_INITDEV1 ; IF DE == -1, REINIT CURRENT CONFIG
; TEST FOR -1 WHICH MEANS USE CURRENT CONFIG (JUST REINIT)
LD A,D ; TEST DE FOR
AND E ; ... VALUE OF -1
INC A ; ... SO Z SET IF -1
JR NZ,ACIA_INITDEV1 ; IF DE == -1, REINIT CURRENT CONFIG
;
; LOAD EXISTING CONFIG TO REINIT
LD E,(IY+4) ; LOW BYTE
LD D,(IY+5) ; HIGH BYTE
; LOAD EXISTING CONFIG TO REINIT
LD E,(IY+4) ; LOW BYTE
LD D,(IY+5) ; HIGH BYTE
;
ACIA_INITDEV1:
LD (ACIA_NEWCFG),DE ; SAVE NEW CONFIG
LD (ACIA_NEWCFG),DE ; SAVE NEW CONFIG
;
#IF (ACIADEBUG)
PUSH DE
POP BC
PRTS(" CFG=$")
CALL PRTHEXWORD
PUSH DE
POP BC
PRTS(" CFG=$")
CALL PRTHEXWORD
#ENDIF
;
LD A,E ; GET CONFIG LSB
AND $E0 ; CHECK FOR DTR, XON, PARITY=MARK/SPACE
JR NZ,ACIA_INITFAIL ; IF ANY BIT SET, FAIL, NOT SUPPORTED
LD A,E ; GET CONFIG LSB
AND $E0 ; CHECK FOR DTR, XON, PARITY=MARK/SPACE
JR NZ,ACIA_INITFAIL ; IF ANY BIT SET, FAIL, NOT SUPPORTED
;
LD A,D ; GET CONFIG MSB
AND $1F ; ISOLATE ENCODED BAUD RATE
LD A,D ; GET CONFIG MSB
AND $1F ; ISOLATE ENCODED BAUD RATE
;
#IF (ACIADEBUG)
PRTS(" ENC=$")
CALL PRTHEXBYTE
PRTS(" ENC=$")
CALL PRTHEXBYTE
#ENDIF
;
; BAUD RATE
PUSH DE ; SAVE REQUESTED CONFIG
LD L,(IY+10) ; LOAD CLK FREQ
LD H,(IY+11) ; ... INTO DE:HL
LD E,(IY+12) ; ... "
LD D,(IY+13) ; ... "
LD C,75 ; BAUD RATE ENCODING CONSTANT
CALL ENCODE ; C = TEST BAUD RATE (ENCODED) = BAUDTST
POP DE ; GET REQ CONFIG BACK, D = BAUDREQ
;
; BIT 4 (DIV 3) OF BAUDREQ AND BAUDTST MUST MATCH!
LD A,C ; A = BAUDTST
XOR D ; XOR WITH BAUDREQ
BIT 4,A ; DO BIT 4 VALS MATCH?
JR NZ,ACIA_INITFAIL ; IF NOT, BAIL OUT
;
LD A,C ; BAUDTST TO A
AND $0F ; ISOLATE DIV 2 BAUD BITS
LD C,A ; C = BAUDTST
;
LD A,D ; MSB W/ BAUD RATE TO A
AND $0F ; ISOLATE DIV 2 BAUD BITS
LD L,A ; L = BAUDREQ
;
LD A,C ; A = BAUDTST
LD B,%00000000 ; ACIA VAL FOR DIV 1
CP L ; BAUDTST = BAUDREQ?
JR Z,ACIA_INITBROK ; IF MATCH, WE ARE DONE
;
SUB 4 ; DIVIDE BY 16 (NOW DIV 16 TOT)
JR C,ACIA_INITFAIL ; FAIL IF UNDERFLOW
LD B,%00000001 ; ACIA VAL FOR DIV 16
CP L ; BAUDTST = BAUDREQ?
JR Z,ACIA_INITBROK ; IF MATCH, WE ARE DONE
;
SUB 2 ; DIVIDE BY 4 (NOW DIV 64 TOT)
JR C,ACIA_INITFAIL ; FAIL IF UNDERFLOW
LD B,%00000010 ; ACIA R4 VAL FOR DIV 32
CP L ; BAUDTST = BAUDREQ?
JR Z,ACIA_INITBROK ; IF MATCH, WE ARE DONE
; BAUD RATE
PUSH DE ; SAVE REQUESTED CONFIG
LD L,(IY+10) ; LOAD CLK FREQ
LD H,(IY+11) ; ... INTO DE:HL
LD E,(IY+12) ; ... "
LD D,(IY+13) ; ... "
LD C,75 ; BAUD RATE ENCODING CONSTANT
CALL ENCODE ; C = TEST BAUD RATE (ENCODED) = BAUDTST
POP DE ; GET REQ CONFIG BACK, D = BAUDREQ
;
; BIT 4 (DIV 3) OF BAUDREQ AND BAUDTST MUST MATCH!
LD A,C ; A = BAUDTST
XOR D ; XOR WITH BAUDREQ
BIT 4,A ; DO BIT 4 VALS MATCH?
JR NZ,ACIA_INITFAIL ; IF NOT, BAIL OUT
;
LD A,C ; BAUDTST TO A
AND $0F ; ISOLATE DIV 2 BAUD BITS
LD C,A ; C = BAUDTST
;
LD A,D ; MSB W/ BAUD RATE TO A
AND $0F ; ISOLATE DIV 2 BAUD BITS
LD L,A ; L = BAUDREQ
;
LD A,C ; A = BAUDTST
LD B,%00000000 ; ACIA VAL FOR DIV 1
CP L ; BAUDTST = BAUDREQ?
JR Z,ACIA_INITBROK ; IF MATCH, WE ARE DONE
;
SUB 4 ; DIVIDE BY 16 (NOW DIV 16 TOT)
JR C,ACIA_INITFAIL ; FAIL IF UNDERFLOW
LD B,%00000001 ; ACIA VAL FOR DIV 16
CP L ; BAUDTST = BAUDREQ?
JR Z,ACIA_INITBROK ; IF MATCH, WE ARE DONE
;
SUB 2 ; DIVIDE BY 4 (NOW DIV 64 TOT)
JR C,ACIA_INITFAIL ; FAIL IF UNDERFLOW
LD B,%00000010 ; ACIA R4 VAL FOR DIV 32
CP L ; BAUDTST = BAUDREQ?
JR Z,ACIA_INITBROK ; IF MATCH, WE ARE DONE
;
ACIA_INITFAIL:
;
#IF (ACIADEBUG)
PRTS(" BAD CFG$")
PRTS(" BAD CFG$")
#ENDIF
;
OR $FF
RET ; INVALID CONFIG
;
OR $FF
RET ; INVALID CONFIG
;
ACIA_INITBROK:
; REG B HAS WORKING CONFIG VALUE W/ BAUD RATE BITS
LD C,B ; WORKING VAL TO C
LD A,E ; LSB OF INCOMING CONFIG
AND %00111111 ; ISOLATE LOW 6 BITS TO COMPARE
LD B,8 ; WORD SELECT TABLE SIZE
LD HL,ACIA_WSTBL ; POINT TO TABLE
; REG B HAS WORKING CONFIG VALUE W/ BAUD RATE BITS
LD C,B ; WORKING VAL TO C
LD A,E ; LSB OF INCOMING CONFIG
AND %00111111 ; ISOLATE LOW 6 BITS TO COMPARE
LD B,8 ; WORD SELECT TABLE SIZE
LD HL,ACIA_WSTBL ; POINT TO TABLE
ACIA_INITWS:
CP (HL) ; MATCH?
JR Z,ACIA_INITWS2 ; IF SO, REG B HAS ACIA VAL + 1
INC HL ; NEXT ENTRY
DJNZ ACIA_INITWS ; KEEP CHECKING TILL DONE
JR ACIA_INITFAIL ; FAIL IF NO MATCH
CP (HL) ; MATCH?
JR Z,ACIA_INITWS2 ; IF SO, REG B HAS ACIA VAL + 1
INC HL ; NEXT ENTRY
DJNZ ACIA_INITWS ; KEEP CHECKING TILL DONE
JR ACIA_INITFAIL ; FAIL IF NO MATCH
ACIA_WSTBL:
.DB %00001011 ; 8/O/1
.DB %00011011 ; 8/E/1
.DB %00000011 ; 8/N/1
.DB %00000111 ; 8/N/2
.DB %00001010 ; 7/O/1
.DB %00011010 ; 7/E/1
.DB %00001110 ; 7/O/2
.DB %00011110 ; 7/E/2
.DB %00001011 ; 8/O/1
.DB %00011011 ; 8/E/1
.DB %00000011 ; 8/N/1
.DB %00000111 ; 8/N/2
.DB %00001010 ; 7/O/1
.DB %00011010 ; 7/E/1
.DB %00001110 ; 7/O/2
.DB %00011110 ; 7/E/2
ACIA_INITWS2:
LD A,B ; PUT FANAL VALUE IN A
DEC A ; ZERO INDEX ADJUSTMENT
RLA ; MOVE BITS TO
RLA ; ... PROPER LOCATION
OR C ; COMBINE WITH WORKING VALUE
LD A,B ; PUT FANAL VALUE IN A
DEC A ; ZERO INDEX ADJUSTMENT
RLA ; MOVE BITS TO
RLA ; ... PROPER LOCATION
OR C ; COMBINE WITH WORKING VALUE
;
; SAVE CONFIG PERMANENTLY NOW
LD DE,(ACIA_NEWCFG) ; GET NEW CONFIG BACK
LD (IY+4),E ; SAVE LOW WORD
LD (IY+5),D ; SAVE HI WORD
; SAVE CONFIG PERMANENTLY NOW
LD DE,(ACIA_NEWCFG) ; GET NEW CONFIG BACK
LD (IY+4),E ; SAVE LOW WORD
LD (IY+5),D ; SAVE HI WORD
;
JR ACIA_INITGO
JR ACIA_INITGO
;
ACIA_INITSAFE:
LD A,%00010110 ; DEFAULT CONFIG
LD A,%00010110 ; DEFAULT CONFIG
;
ACIA_INITGO:
;
#IF (INTMODE == 1)
OR %10000000 ; ENABLE RCV INT
OR %10000000 ; ENABLE RCV INT
#ENDIF
;
LD (ACIA_CMD),A ; SAVE SHADOW REGISTER
LD (ACIA_CMD),A ; SAVE SHADOW REGISTER
;
#IF (ACIADEBUG)
PRTS(" CMD=$")
CALL PRTHEXBYTE
LD DE,65
CALL VDELAY ; WAIT FOR FINAL CHAR TO SEND
PRTS(" CMD=$")
CALL PRTHEXBYTE
LD DE,65
CALL VDELAY ; WAIT FOR FINAL CHAR TO SEND
#ENDIF
;
; PROGRAM THE ACIA CHIP
LD C,(IY+3) ; COMMAND PORT
LD A,$FF ; MASTER RESET
LD A,$03 ; MASTER RESET
OUT (C),A ; DO IT
LD A,(ACIA_CMD) ; RESTORE CONFIG VALUE
LD A,(ACIA_CMD) ; RESTORE CONFIG VALUE
OUT (C),A ; DO IT
;
#IF (INTMODE == 1)
@ -568,16 +568,16 @@ ACIA_DEVICE:
LD D,CIODEV_ACIA ; D := DEVICE TYPE
LD E,(IY) ; E := PHYSICAL UNIT
LD C,$00 ; C := DEVICE TYPE, 0x00 IS RS-232
LD H,0 ; H := 0, DRIVER HAS NO MODES
LD L,(IY+3) ; L := BASE I/O ADDRESS
LD H,0 ; H := 0, DRIVER HAS NO MODES
LD L,(IY+3) ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS
RET
;
; ACIA DETECTION ROUTINE
;
ACIA_DETECT:
LD A,(IY+3) ; BASE PORT ADDRESS
LD C,A ; PUT IN C FOR I/O
LD A,(IY+3) ; BASE PORT ADDRESS
LD C,A ; PUT IN C FOR I/O
CALL ACIA_DETECT2 ; CHECK IT
JR Z,ACIA_DETECT1 ; FOUND IT, RECORD IT
LD A,ACIA_NONE ; NOTHING FOUND
@ -597,7 +597,7 @@ ACIA_DETECT2:
RET NZ ; RETURN IF NOT ZERO
LD A,$02 ; CLEAR MASTER RESET
OUT (C),A ; DO IT
IN A,(C) ; GET STATUS AGAIN
IN A,(C) ; GET STATUS AGAIN
; CHECK FOR EXPECTED BITS:
; TDRE=1, DCD & CTS = 0
AND %00001110 ; BIT MASK FOR "STABLE" BITS
@ -652,8 +652,8 @@ ACIA_STR_ACIA .DB "ACIA$"
; WORKING VARIABLES
;
ACIA_DEV .DB 0 ; DEVICE NUM USED DURING INIT
ACIA_CMD .DB 0 ; COMMAND PORT SHADOW REGISTER
ACIA_NEWCFG .DW 0 ; TEMP STORE FOR NEW CFG
ACIA_CMD .DB 0 ; COMMAND PORT SHADOW REGISTER
ACIA_NEWCFG .DW 0 ; TEMP STORE FOR NEW CFG
;
#IF (INTMODE != 1)
;
@ -698,11 +698,11 @@ ACIA0_CFG:
.DB ACIA0BASE ; BASE PORT
.DW ACIA0CFG ; LINE CONFIGURATION
.DW ACIA0_RCVBUF ; POINTER TO RCV BUFFER STRUCT
.DW ACIA0_INT ; INT HANDLER POINTER
.DW (ACIA0CLK / ACIA0DIV) & $FFFF ; CLOCK FREQ AS
.DW (ACIA0CLK / ACIA0DIV) >> 16 ; ... DWORD VALUE
.DW ACIA0_INT ; INT HANDLER POINTER
.DW (ACIA0CLK / ACIA0DIV) & $FFFF ; CLOCK FREQ AS
.DW (ACIA0CLK / ACIA0DIV) >> 16 ; ... DWORD VALUE
;
ACIA_CFGSIZ .EQU $ - ACIA_CFG ; SIZE OF ONE CFG TABLE ENTRY
ACIA_CFGSIZ .EQU $ - ACIA_CFG ; SIZE OF ONE CFG TABLE ENTRY
;
#IF (ACIACNT >= 2)
;
@ -714,10 +714,10 @@ ACIA1_CFG:
.DB ACIA1BASE ; BASE PORT
.DW ACIA1CFG ; LINE CONFIGURATION
.DW ACIA1_RCVBUF ; POINTER TO RCV BUFFER STRUCT
.DW ACIA1_INT ; INT HANDLER POINTER
.DW (ACIA1CLK / ACIA1DIV) & $FFFF ; CLOCK FREQ AS
.DW (ACIA1CLK / ACIA1DIV) >> 16 ; ... DWORD VALUE
.DW ACIA1_INT ; INT HANDLER POINTER
.DW (ACIA1CLK / ACIA1DIV) & $FFFF ; CLOCK FREQ AS
.DW (ACIA1CLK / ACIA1DIV) >> 16 ; ... DWORD VALUE
;
#ENDIF
;
ACIA_CFGCNT .EQU ($ - ACIA_CFG) / ACIA_CFGSIZ
ACIA_CFGCNT .EQU ($ - ACIA_CFG) / ACIA_CFGSIZ

2
Source/ver.inc

@ -2,4 +2,4 @@
#DEFINE RMN 1
#DEFINE RUP 1
#DEFINE RTP 0
#DEFINE BIOSVER "3.1.1-pre.42"
#DEFINE BIOSVER "3.1.1-pre.43"

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 1
rup equ 1
rtp equ 0
biosver macro
db "3.1.1-pre.42"
db "3.1.1-pre.43"
endm

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