forked from MirrorRepos/RomWBW
185 lines
6.8 KiB
Plaintext
185 lines
6.8 KiB
Plaintext
TITLE "Clock module name - (REL clock name here)"
|
||
SUBTTL "Description of Clock Module"
|
||
;================================================================
|
||
; Place brief description and machine clock I/O parameters here
|
||
; along with any version and date data
|
||
;================================================================
|
||
|
||
VERS EQU 01
|
||
.Z80
|
||
NAME CCLOK ; Change this to no more than 6-char
|
||
; name for the REL driver module
|
||
|
||
MACLIB CLOCK.LIB ; Some useful equates are here
|
||
|
||
; This first section contains identification information for the driver
|
||
; The information is not placed in the clock driver code section, but are
|
||
; located in a different area located by the _CLKID Named Common directive.
|
||
|
||
COMMON /_CLKID/
|
||
|
||
DESCST: DEFW 0000 ; Add label here if a static year byte
|
||
; is used by your clock driver. The
|
||
; label should point to the year byte
|
||
|
||
CLKNAM: DEFB 'Myclock ' ; Exactly 24 chars in name
|
||
DEFB VERS/10+'0','.',VERS MOD 10 +'0',0
|
||
|
||
DESCR: DEFB ' This description may be longer than the brief',CR,LF
|
||
DEFB ' name string above, and must be null-terminated',0
|
||
|
||
IF [$-DESCST] > 256
|
||
OVER2 ; This must be less than or equal to 256 bytes
|
||
ENDIF
|
||
|
||
PAGE
|
||
SUBTTL "Configurable Clock Hardware Parameters"
|
||
;---------------------------------------------------------------------
|
||
; This section contains any configurable parameters needed for the
|
||
; clock driver. They must be structured in the manner shown in order
|
||
; for the loader to properly match and set the values.
|
||
; The values in this section are not loaded in the same code section
|
||
; as the actual driver code, but are located in another base referenced
|
||
; by the _PARM_ Named Common directive.
|
||
|
||
COMMON /_PARM_/
|
||
|
||
PARBAS: DEFW NPARAMS ; # of parameters (Set to 00 if none)
|
||
DEFW STRS ; Pointer to STRS (Set to 00 if none)
|
||
NP0:
|
||
XYR EQU $+1
|
||
DEFB BYTE ; EXAMPLE! - This shows a byte value
|
||
DEFW 88H ; " - ..and default value in Set
|
||
|
||
XPORT EQU $+1
|
||
DEFB WORD ; EXAMPLE! - This shows a 16-bit value
|
||
DEFW 0F013H ; " - ..and default value in Set
|
||
|
||
NPARAMS EQU ($-NP0)/3
|
||
|
||
STRS: DEFB 'Default Year',0 ; EXAMPLE! - Text prompt for XYR
|
||
DEFB 'Default Port',0 ; EXAMPLE! - Text prompt for XPORT
|
||
|
||
PAGE
|
||
SUBTTL "Clock Code - SB180 HeartBeat"
|
||
;------------------------------------------------------------------
|
||
; This section should contain the actual Clock Driver code, and all
|
||
; entries here are located in the CSEG, or Code Segment.
|
||
|
||
CSEG
|
||
|
||
; Add any needed equates here if they are not included in CLOCK.LIB
|
||
|
||
TIMOFF EQU 36H ; EXAMPLE! - Bios offset for clock ptr
|
||
|
||
;-----------------------------------------------------------
|
||
; Z S D O S C L O C K H E A D E R
|
||
;-----------------------------------------------------------
|
||
; Enter: HL points to a 6-byte buffer to Get/Set time
|
||
; Exit : A=1 on Success, A=FFH if error
|
||
; HL points to last char in buffer
|
||
; NOTE: If clock Set is not included, comment these two jumps
|
||
; out to save a few bytes. The loader, SETUPZST, uses
|
||
; these two jumps to recognize a full ZSDOS clock and
|
||
; modify the interface code.
|
||
|
||
PRGBAS: JP GETTIM ; Jump to Read Clock
|
||
JP WRCLK ; Jump to Set Clock
|
||
|
||
;- - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
||
; R e a d T h e C l o c k
|
||
;- - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
||
; Clock READ code starts here.
|
||
|
||
GETTIM: ; The work of reading the clock
|
||
; goes here. Values needing to be set
|
||
; during installation are referenced as:
|
||
;YPORT1 EQU $+1
|
||
; LD BC,0000 ; EXAMPLE! - this will set a 16-bit value
|
||
; ; in the configuration process
|
||
;YYR EQU $+1 ; EXAMPLE! - This will set an 8-bit value
|
||
; LD A,00 ; in the configuration process
|
||
|
||
; ... Place the meat of the driver in this section ...
|
||
|
||
OKRET: LD A,01 ; Set OK status return
|
||
RET
|
||
|
||
ERRET: OR 0FFH ; Set Error code if needed
|
||
RET
|
||
|
||
;- - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
||
; S e t T h e C l o c k
|
||
;- - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
||
; Clock Set code placed here if needed. If Clock Setting
|
||
; is not being added, comment out this section to save a
|
||
; byte of code.
|
||
|
||
WRCLK:
|
||
RET
|
||
|
||
PAGE
|
||
SUBTTL "Run-Time Configuration of Ports and Masks"
|
||
;-------------------------------------------------------------
|
||
; This code installs configurable items into the clock module
|
||
; Enter with DE pointing to the physical base address of the
|
||
; relocatable module. DE MUST BE USED TO SET VALUES IN
|
||
; THE CSEG PORTION OF CODE!
|
||
; NOTE: Code in this section is not added to the actual clock
|
||
; driver, but placed in a different area referenced to
|
||
; the common base _POST_.
|
||
|
||
COMMON /_POST_/
|
||
|
||
; Values in the _PARM_, _POST_ and _PRE_ sections may be loaded
|
||
; and saved directly, since their addresses are constant from
|
||
; linkage through execution. Setting or reading values in the
|
||
; CSEG must be indirect based on the value in the DE register
|
||
; pair. The following examples show how to access the various
|
||
; sections.
|
||
;
|
||
; LD A,(XYR) ; EXAMPLE - Get byte from _PARM_ directly
|
||
; LD HL,YYR ; " - Begin offset into CSEG indirectly
|
||
; ADD HL,DE ; " - HL now addresses relocated loc'n
|
||
; LD (HL),A ; " - ..so value can be stored
|
||
;
|
||
; Likewise, 16-bit values must be accessed indirectly, and may use
|
||
; the BC register pair as transfer storage.
|
||
;
|
||
; LD BC,(XPORT) ; EXAMPLE - Get word from _PARM_ directly
|
||
; LD HL,YPORT1 ; " - Begin offset into CSEG indirectly
|
||
; ADD HL,DE ; " - HL now addresses relocated loc'n
|
||
; LD (HL),C ; " - ..so value can be saved..
|
||
; INC HL ; " - ...a byte..
|
||
; LD (HL),B ; " - ....at a time..
|
||
;
|
||
; LD (YPORT2),BC ; EXAMPLE - Values can be stored directly into
|
||
; " - other sections such as _PRE_
|
||
|
||
RET ; This RETURN MUST be present even if no other
|
||
; code is included in this section
|
||
|
||
|
||
PAGE
|
||
SUBTTL "Pre-Execution Clock Checks (Check for ticking)"
|
||
;----------------------------------------------------------------
|
||
; This module is executed just prior to installing the module to
|
||
; insure that a valid clock is present
|
||
; Enter with DE pointing to base of relocated clock code segment
|
||
|
||
COMMON /_PRE_/
|
||
|
||
; Optional final setup of the clock module may go here. Examples of such
|
||
; code would be installation-dependant items such as physical RAM location
|
||
; for the driver module. If any code is added here, the DE register pair
|
||
; MUST be preserved to properly inter PRECLOCK code (If included).
|
||
|
||
;YPORT2 EQU $+1 ; EXAMPLE - just to show accessing method
|
||
; LD BC,0000 ; " - ..from _POST_ code.
|
||
|
||
INCLUDE PRECLOCK.LIB ; This section of code merely calls the
|
||
; clock and waits an arbitrary period of
|
||
; time (>> 1 second) to see if the time
|
||
; changes. It returns an error if not.
|
||
END
|
||
|