mirror of https://github.com/wwarthen/RomWBW.git
b1ackmai1er
4 years ago
9 changed files with 164 additions and 1339 deletions
@ -1,41 +0,0 @@ |
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; |
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;================================================================================================== |
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; MBC CONFIGURATION |
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;================================================================================================== |
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; |
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; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE |
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; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS |
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; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE |
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; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS. |
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; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY |
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; YOUR FILE IN THE BUILD PROCESS. |
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; |
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; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM. |
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; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO |
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; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON |
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; SETTINGS. |
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; |
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; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE, |
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; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING |
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; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS! |
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; |
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; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO |
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; DIRECTORIES ABOVE THIS ONE). |
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; |
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#DEFINE PLATFORM_NAME "Multi Board Computer" |
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#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT |
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; |
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#include "cfg_mbc.asm" |
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; |
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BATCOND .SET FALSE |
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; |
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FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) |
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; |
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PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) |
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; |
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DSKYENABLE .SET FALSE ; ENABLES DSKY |
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DSKYMODE .SET DSKYMODE_NG ; DSKY VERTSION: DSKYMODE_[V1|NG] |
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; |
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DMAENABLE .SET TRUE ; DMA: ENABLE DMA DRIVER (DMA.ASM) |
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DMABASE .SET $E0 ; DMA: DMA BASE ADDRESS |
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DMAMODE .SET DMAMODE_MBC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC) |
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@ -1,8 +0,0 @@ |
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; RomWBW Configured for MBC std, 2021-09-03T14:52:50 |
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; |
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#DEFINE TIMESTAMP "2021-09-03" |
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; |
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ROMSIZE .EQU 512 |
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; |
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#INCLUDE "MBC_std.asm" |
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; |
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@ -1,235 +0,0 @@ |
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; |
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;================================================================================================== |
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; ROMWBW 2.X CONFIGURATION DEFAULTS FOR MBC |
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;================================================================================================== |
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; |
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; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM |
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; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. INSTEAD, YOU SHOULD |
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; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY |
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; UNDER THIS DIRECTORY. |
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; |
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; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS |
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; FOR THE PLATFORM. |
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; |
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#DEFINE PLATFORM_NAME "Multi Board Computer" |
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; |
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PLATFORM .EQU PLT_MBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC] |
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CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280] |
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BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA] |
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BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE |
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HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD) |
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USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION |
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TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ) |
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; |
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BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE |
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; |
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CPUOSC .EQU 8000000 ; CPU OSC FREQ IN MHZ |
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INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) |
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DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) |
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; |
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RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) |
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RAM_RESERVE .EQU 0 ; RESERVE FIRST N KB OF RAM (USUALLY 0) |
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ROM_RESERVE .EQU 0 ; RESERVE FIRST N KB OR ROM (USUALLY 0) |
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MEMMGR .EQU MM_MBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC] |
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MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY) |
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MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY) |
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; |
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RTCIO .EQU $70 ; RTC LATCH REGISTER ADR |
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; |
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KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT |
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KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS |
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; |
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CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT |
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CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT |
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CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS |
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CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER |
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CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256] |
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CTCPRE .EQU 256 ; PRESCALE CONSTANT (1-256) |
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CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3) |
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CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3) |
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CTCOSC .EQU 614400 ; CTC CLOCK FREQUENCY |
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; |
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EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION |
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; |
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SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES |
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; |
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WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ] |
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; |
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DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT |
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DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS |
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DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS |
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; |
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LEDENABLE .EQU TRUE ; ENABLES STATUS LED |
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LEDMODE .EQU LEDMODE_RTC ; LEDMODE_[STD|RTC] |
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LEDPORT .EQU RTCIO ; STATUS LED PORT ADDRESS |
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LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED |
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; |
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DSKYENABLE .EQU FALSE ; ENABLES DSKY |
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DSKYMODE .EQU DSKYMODE_V1 ; DSKY VERSION: DSKYMODE_[V1|NG] |
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DSKYPPIBASE .EQU $60 ; BASE I/O ADDRESS OF DSKY PPI |
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DSKYOSC .EQU 3000000 ; OSCILLATOR FREQ FOR DSKYNG (IN HZ) |
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; |
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BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE |
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CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP |
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VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI] |
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ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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PPKTRACE .EQU 1 ; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE] |
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KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] |
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MKYENABLE .EQU FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER) |
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MKYKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE] |
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; |
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DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM) |
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DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC] |
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DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!) |
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; |
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BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM) |
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BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS |
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; |
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INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM) |
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; |
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RP5RTCENABLE .EQU FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) |
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; |
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HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT |
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SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM) |
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; |
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DS7RTCENABLE .EQU FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM) |
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DS7RTCMODE .EQU DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTC_[PCF] |
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; |
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DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM) |
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; |
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UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM) |
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UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ |
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UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS |
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UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED |
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UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART |
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UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART |
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UARTMFP .EQU TRUE ; UART: AUTO-DETECT MF/PIC UART |
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UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART |
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UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART |
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; |
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) |
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; |
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Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM) |
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; |
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ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) |
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; |
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SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) |
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SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT |
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SIOBOOT .EQU 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) |
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SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP |
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SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP] |
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SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR |
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SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
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SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG |
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SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE |
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SIO0BCLK .EQU (4915200/8) ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
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SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG |
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SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE |
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; |
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XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG |
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; |
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VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM) |
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VDUSIZ .EQU V80X25 ; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30] |
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CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM) |
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NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM) |
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TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM) |
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TMSMODE .EQU TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG/N8/RC/RCV9958] |
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TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1) |
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VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM) |
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VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43] |
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; |
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MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM) |
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MDROM .EQU TRUE ; MD: ENABLE ROM DISK |
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MDRAM .EQU TRUE ; MD: ENABLE RAM DISK |
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MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM |
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; |
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; |
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FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM) |
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FDMODE .EQU FDMODE_MBC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC] |
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FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2) |
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FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL) |
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FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111] |
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FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111] |
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FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS |
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; |
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RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER |
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RFCNT .EQU 1 ; RF: NUMBER OF RAM FLOPPY UNITS (1-4) |
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; |
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IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) |
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IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH |
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IDE0MODE .EQU IDEMODE_DIO ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] |
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IDE0BASE .EQU $20 ; IDE 0: IO BASE ADDRESS |
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IDE0DATLO .EQU $20 ; IDE 0: DATA LO PORT FOR 16-BIT I/O |
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IDE0DATHI .EQU $28 ; IDE 0: DATA HI PORT FOR 16-BIT I/O |
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IDE0A8BIT .EQU FALSE ; IDE 0A (MASTER): 8 BIT XFER |
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IDE0B8BIT .EQU FALSE ; IDE 0B (MASTER): 8 BIT XFER |
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IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] |
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IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS |
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IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O |
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IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O |
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IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER |
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IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER |
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IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC] |
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IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS |
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IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O |
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IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O |
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IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER |
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IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER |
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; |
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PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM) |
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PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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PPIDECNT .EQU 1 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP |
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PPIDE0BASE .EQU $60 ; PPIDE 0: PPI REGISTERS BASE ADR |
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PPIDE0A8BIT .EQU FALSE ; PPIDE 0A (MASTER): 8 BIT XFER |
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PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER |
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PPIDE1BASE .EQU $20 ; PPIDE 1: PPI REGISTERS BASE ADR |
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PPIDE1A8BIT .EQU FALSE ; PPIDE 1A (MASTER): 8 BIT XFER |
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PPIDE1B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER |
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PPIDE2BASE .EQU $44 ; PPIDE 2: PPI REGISTERS BASE ADR |
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PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER |
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PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER |
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; |
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SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) |
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SDMODE .EQU SDMODE_JUHA ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT] |
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SDPPIBASE .EQU $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE |
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SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY |
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SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE |
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; |
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PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM) |
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PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT |
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PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT |
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; |
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PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM) |
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; |
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HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM) |
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HDSKTRACE .EQU 1 ; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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; |
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PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD |
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PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD |
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PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM) |
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PIOZBASE .EQU $88 ; PIO: PIO REGISTERS BASE ADR FOR ECB ZP BOARD |
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PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP |
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PIOSBASE .EQU $60 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI |
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; |
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UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM) |
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UFBASE .EQU $0C ; UF: REGISTERS BASE ADR |
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; |
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SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER |
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AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER |
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SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4 |
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; |
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AY38910ENABLE .EQU FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER |
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AY_CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4 |
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AYMODE .EQU AYMODE_NONE ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC] |
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; |
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SPKENABLE .EQU TRUE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM) |
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; |
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DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM) |
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DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS |
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DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC) |
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@ -1,2 +0,0 @@ |
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tasm -t80 -b dmamon.asm dmamon.com |
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|
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@ -1,267 +0,0 @@ |
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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; |
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; HBIOS FUNCTIONS |
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; |
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BF_CIO .EQU $00 |
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BF_CIOIN .EQU BF_CIO + 0 ; CHARACTER INPUT |
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BF_CIOOUT .EQU BF_CIO + 1 ; CHARACTER OUTPUT |
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BF_CIOIST .EQU BF_CIO + 2 ; CHARACTER INPUT STATUS |
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BF_CIOOST .EQU BF_CIO + 3 ; CHARACTER OUTPUT STATUS |
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BF_CIOINIT .EQU BF_CIO + 4 ; INIT/RESET DEVICE/LINE CONFIG |
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BF_CIOQUERY .EQU BF_CIO + 5 ; REPORT DEVICE/LINE CONFIG |
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BF_CIODEVICE .EQU BF_CIO + 6 ; REPORT DEVICE INFO |
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; |
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BF_DIO .EQU $10 |
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BF_DIOSTATUS .EQU BF_DIO + 0 ; DISK STATUS |
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BF_DIORESET .EQU BF_DIO + 1 ; DISK RESET |
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BF_DIOSEEK .EQU BF_DIO + 2 ; DISK SEEK |
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BF_DIOREAD .EQU BF_DIO + 3 ; DISK READ SECTORS |
|||
BF_DIOWRITE .EQU BF_DIO + 4 ; DISK WRITE SECTORS |
|||
BF_DIOVERIFY .EQU BF_DIO + 5 ; DISK VERIFY SECTORS |
|||
BF_DIOFORMAT .EQU BF_DIO + 6 ; DISK FORMAT TRACK |
|||
BF_DIODEVICE .EQU BF_DIO + 7 ; DISK DEVICE INFO REPORT |
|||
BF_DIOMEDIA .EQU BF_DIO + 8 ; DISK MEDIA REPORT |
|||
BF_DIODEFMED .EQU BF_DIO + 9 ; DEFINE DISK MEDIA |
|||
BF_DIOCAP .EQU BF_DIO + 10 ; DISK CAPACITY REPORT |
|||
BF_DIOGEOM .EQU BF_DIO + 11 ; DISK GEOMETRY REPORT |
|||
; |
|||
BF_RTC .EQU $20 |
|||
BF_RTCGETTIM .EQU BF_RTC + 0 ; GET TIME |
|||
BF_RTCSETTIM .EQU BF_RTC + 1 ; SET TIME |
|||
BF_RTCGETBYT .EQU BF_RTC + 2 ; GET NVRAM BYTE BY INDEX |
|||
BF_RTCSETBYT .EQU BF_RTC + 3 ; SET NVRAM BYTE BY INDEX |
|||
BF_RTCGETBLK .EQU BF_RTC + 4 ; GET NVRAM DATA BLOCK |
|||
BF_RTCSETBLK .EQU BF_RTC + 5 ; SET NVRAM DATA BLOCK |
|||
BF_RTCGETALM .EQU BF_RTC + 6 ; GET ALARM |
|||
BF_RTCSETALM .EQU BF_RTC + 7 ; SET ALARM |
|||
BF_RTCDEVICE .EQU BF_RTC + 8 ; RTC DEVICE INFO REPORT |
|||
; |
|||
BF_EMU .EQU $30 ; DEPRECATED |
|||
; |
|||
BF_VDA .EQU $40 |
|||
BF_VDAINI .EQU BF_VDA + 0 ; INITIALIZE VDU |
|||
BF_VDAQRY .EQU BF_VDA + 1 ; QUERY VDU STATUS |
|||
BF_VDARES .EQU BF_VDA + 2 ; SOFT RESET VDU |
|||
BF_VDADEV .EQU BF_VDA + 3 ; DEVICE INFO |
|||
BF_VDASCS .EQU BF_VDA + 4 ; SET CURSOR STYLE |
|||
BF_VDASCP .EQU BF_VDA + 5 ; SET CURSOR POSITION |
|||
BF_VDASAT .EQU BF_VDA + 6 ; SET CHARACTER ATTRIBUTE |
|||
BF_VDASCO .EQU BF_VDA + 7 ; SET CHARACTER COLOR |
|||
BF_VDAWRC .EQU BF_VDA + 8 ; WRITE CHARACTER |
|||
BF_VDAFIL .EQU BF_VDA + 9 ; FILL |
|||
BF_VDACPY .EQU BF_VDA + 10 ; COPY |
|||
BF_VDASCR .EQU BF_VDA + 11 ; SCROLL |
|||
BF_VDAKST .EQU BF_VDA + 12 ; GET KEYBOARD STATUS |
|||
BF_VDAKFL .EQU BF_VDA + 13 ; FLUSH KEYBOARD BUFFER |
|||
BF_VDAKRD .EQU BF_VDA + 14 ; READ KEYBOARD |
|||
; |
|||
BF_SND .EQU $50 |
|||
BF_SNDRESET .EQU BF_SND + 0 ; RESET SOUND SYSTEM |
|||
BF_SNDVOL .EQU BF_SND + 1 ; REQUEST SOUND VOL - L CONTAINS VOLUME (255 MAX, 0 SILENT) - SCALED AS REQUIRED BY DRIVER (EG: MAPS TO JUST 4 BIT RESOLUTION FOR SN76489) |
|||
BF_SNDPRD .EQU BF_SND + 2 ; REQUEST SOUND PERIOD - HL CONTAINS DRIVER SPECIFIC VALUE |
|||
BF_SNDNOTE .EQU BF_SND + 3 ; REQUEST NOTE - L CONTAINS NOTE - EACH VALUE IS QUARTER NOTE |
|||
BF_SNDPLAY .EQU BF_SND + 4 ; INITIATE THE REQUESTED SOUND COMMAND |
|||
BF_SNDQUERY .EQU BF_SND + 5 ; E IS SUBFUNCTION |
|||
BF_SNDDURATION .EQU BF_SND + 6 ; REQUEST DURATION HL MILLISECONDS |
|||
BF_SNDDEVICE .EQU BF_SND + 7 ; SOUND DEVICE INFO REQUEST |
|||
; |
|||
; BF_SNDQUERY SUBCOMMANDS |
|||
BF_SNDQ_STATUS .EQU 0 |
|||
BF_SNDQ_CHCNT .EQU BF_SNDQ_STATUS + 1 ; RETURN COUNT OF CHANNELS |
|||
BF_SNDQ_VOLUME .EQU BF_SNDQ_STATUS + 2 ; 8 BIT NUMBER |
|||
BF_SNDQ_PERIOD .EQU BF_SNDQ_STATUS + 3 ; 16 BIT NUMBER |
|||
BF_SNDQ_DEV .EQU BF_SNDQ_STATUS + 4 ; RETURN DEVICE TYPE CODE AND IO PORTS - TYPE IN B, PORTS IN DE, HL |
|||
; |
|||
BF_SYS .EQU $F0 |
|||
BF_SYSRESET .EQU BF_SYS + 0 ; SOFT RESET HBIOS |
|||
BF_SYSVER .EQU BF_SYS + 1 ; GET HBIOS VERSION |
|||
BF_SYSSETBNK .EQU BF_SYS + 2 ; SET CURRENT BANK |
|||
BF_SYSGETBNK .EQU BF_SYS + 3 ; GET CURRENT BANK |
|||
BF_SYSSETCPY .EQU BF_SYS + 4 ; BANK MEMORY COPY SETUP |
|||
BF_SYSBNKCPY .EQU BF_SYS + 5 ; BANK MEMORY COPY |
|||
BF_SYSALLOC .EQU BF_SYS + 6 ; ALLOC HBIOS HEAP MEMORY |
|||
BF_SYSFREE .EQU BF_SYS + 7 ; FREE HBIOS HEAP MEMORY |
|||
BF_SYSGET .EQU BF_SYS + 8 ; GET HBIOS INFO |
|||
BF_SYSSET .EQU BF_SYS + 9 ; SET HBIOS PARAMETERS |
|||
BF_SYSPEEK .EQU BF_SYS + 10 ; GET A BYTE VALUE FROM ALT BANK |
|||
BF_SYSPOKE .EQU BF_SYS + 11 ; SET A BYTE VALUE IN ALT BANK |
|||
BF_SYSINT .EQU BF_SYS + 12 ; MANAGE INTERRUPT VECTORS |
|||
; |
|||
BF_SYSRES_INT .EQU $00 ; RESET HBIOS INTERNAL |
|||
BF_SYSRES_WARM .EQU $01 ; WARM START (RESTART BOOT LOADER) |
|||
BF_SYSRES_COLD .EQU $02 ; COLD START |
|||
BF_SYSRES_USER .EQU $03 ; USER RESET REQUEST |
|||
; |
|||
BF_SYSGET_CIOCNT .EQU $00 ; GET CHAR UNIT COUNT |
|||
BF_SYSGET_CIOFN .EQU $01 ; GET CIO UNIT FN/DATA ADR |
|||
BF_SYSGET_DIOCNT .EQU $10 ; GET DISK UNIT COUNT |
|||
BF_SYSGET_DIOFN .EQU $11 ; GET DIO UNIT FN/DATA ADR |
|||
BF_SYSGET_RTCCNT .EQU $20 ; GET RTC UNIT COUNT |
|||
BF_SYSGET_VDACNT .EQU $40 ; GET VDA UNIT COUNT |
|||
BF_SYSGET_VDAFN .EQU $41 ; GET VDA UNIT FN/DATA ADR |
|||
BF_SYSGET_SNDCNT .EQU $50 ; GET VDA UNIT COUNT |
|||
BF_SYSGET_SNDFN .EQU $51 ; GET SND UNIT FN/DATA ADR |
|||
BF_SYSGET_TIMER .EQU $D0 ; GET CURRENT TIMER VALUE |
|||
BF_SYSGET_SECS .EQU $D1 ; GET CURRENT SECONDS VALUE |
|||
BF_SYSGET_BOOTINFO .EQU $E0 ; GET BOOT INFORMATION |
|||
BF_SYSGET_CPUINFO .EQU $F0 ; GET CPU INFORMATION |
|||
BF_SYSGET_MEMINFO .EQU $F1 ; GET MEMORY CAPACTITY INFO |
|||
BF_SYSGET_BNKINFO .EQU $F2 ; GET BANK ASSIGNMENT INFO |
|||
; |
|||
BF_SYSSET_TIMER .EQU $D0 ; SET TIMER VALUE |
|||
BF_SYSSET_SECS .EQU $D1 ; SET SECONDS VALUE |
|||
BF_SYSSET_BOOTINFO .EQU $E0 ; SET BOOT INFORMATION |
|||
; |
|||
BF_SYSINT_INFO .EQU $00 ; GET INTERRUPT SYSTEM INFO |
|||
BF_SYSINT_GET .EQU $10 ; GET INT VECTOR ADDRESS |
|||
BF_SYSINT_SET .EQU $20 ; SET INT VECTOR ADDRESS |
|||
; |
|||
CIO_CONSOLE .EQU $80 ; CIO UNIT NUM FOR CUR CON |
|||
; |
|||
; HBIOS GLOBAL ERROR RETURN VALUES |
|||
; |
|||
ERR_NONE .EQU 0 ; SUCCESS |
|||
; |
|||
ERR_UNDEF .EQU -1 ; UNDEFINED ERROR |
|||
ERR_NOTIMPL .EQU -2 ; FUNCTION NOT IMPLEMENTED |
|||
ERR_NOFUNC .EQU -3 ; INVALID FUNCTION |
|||
ERR_NOUNIT .EQU -4 ; INVALID UNIT NUMBER |
|||
ERR_NOMEM .EQU -5 ; OUT OF MEMORY |
|||
ERR_RANGE .EQU -6 ; PARAMETER OUT OF RANGE |
|||
ERR_NOMEDIA .EQU -7 ; MEDIA NOT PRESENT |
|||
ERR_NOHW .EQU -8 ; HARDWARE NOT PRESENT |
|||
ERR_IO .EQU -9 ; I/O ERROR |
|||
ERR_READONLY .EQU -10 ; WRITE REQUEST TO READ-ONLY MEDIA |
|||
ERR_TIMEOUT .EQU -11 ; DEVICE TIMEOUT |
|||
ERR_BADCFG .EQU -12 ; INVALID CONFIGURATION |
|||
ERR_INTERNAL .EQU -13 ; INTERNAL ERROR |
|||
; |
|||
; MEDIA ID VALUES |
|||
; |
|||
MID_NONE .EQU 0 |
|||
MID_MDROM .EQU 1 |
|||
MID_MDRAM .EQU 2 |
|||
MID_RF .EQU 3 |
|||
MID_HD .EQU 4 |
|||
MID_FD720 .EQU 5 |
|||
MID_FD144 .EQU 6 |
|||
MID_FD360 .EQU 7 |
|||
MID_FD120 .EQU 8 |
|||
MID_FD111 .EQU 9 |
|||
MID_HDNEW .EQU 10 |
|||
; |
|||
; CHAR DEVICE IDS |
|||
; |
|||
CIODEV_UART .EQU $00 |
|||
CIODEV_ASCI .EQU $10 |
|||
CIODEV_TERM .EQU $20 |
|||
CIODEV_PRPCON .EQU $30 |
|||
CIODEV_PPPCON .EQU $40 |
|||
CIODEV_SIO .EQU $50 |
|||
CIODEV_ACIA .EQU $60 |
|||
CIODEV_PIO .EQU $70 |
|||
CIODEV_UF .EQU $80 |
|||
CIODEV_DUART .EQU $90 |
|||
CIODEV_Z2U .EQU $A0 |
|||
; |
|||
; SUB TYPES OF CHAR DEVICES |
|||
; |
|||
;00 RS-232 |
|||
;01 TERMINAL |
|||
;02 PARALLEL PORT |
|||
;03 UNUSED |
|||
; |
|||
; DISK DEVICE IDS |
|||
; |
|||
DIODEV_MD .EQU $00 |
|||
DIODEV_FD .EQU $10 |
|||
DIODEV_RF .EQU $20 |
|||
DIODEV_IDE .EQU $30 |
|||
DIODEV_ATAPI .EQU $40 |
|||
DIODEV_PPIDE .EQU $50 |
|||
DIODEV_SD .EQU $60 |
|||
DIODEV_PRPSD .EQU $70 |
|||
DIODEV_PPPSD .EQU $80 |
|||
DIODEV_HDSK .EQU $90 |
|||
; |
|||
; RTC DEVICE IDS |
|||
; |
|||
RTCDEV_DS .EQU $00 ; DS1302 |
|||
RTCDEV_BQ .EQU $10 ; BQ4845P |
|||
RTCDEV_SIMH .EQU $20 ; SIMH |
|||
RTCDEV_INT .EQU $30 ; PERIODIC INT TIMER |
|||
RTCDEV_DS7 .EQU $40 ; DS1302 (I2C) |
|||
RTCDEV_RP5 .EQU $50 ; RP5C01 |
|||
; |
|||
; VIDEO DEVICE IDS |
|||
; |
|||
VDADEV_VDU .EQU $00 ; ECB VDU - MOTOROLA 6545 |
|||
VDADEV_CVDU .EQU $10 ; ECB COLOR VDU - MOS 8563 |
|||
VDADEV_NEC .EQU $20 ; ECB UPD7220 - NEC UPD7220 |
|||
VDADEV_TMS .EQU $30 ; N8 ONBOARD VDA SUBSYSTEM - TMS 9918 |
|||
VDADEV_VGA .EQU $40 ; ECB VGA3 - HITACHI HD6445 |
|||
;VDADEV_V9958 .EQU $50 ; V9958 VDU |
|||
; |
|||
; SOUND DEVICE IDS |
|||
; |
|||
SNDDEV_SN76489 .EQU $00 |
|||
SNDDEV_AY38910 .EQU $10 |
|||
SNDDEV_BITMODE .EQU $20 |
|||
; |
|||
; HBIOS CONTROL BLOCK OFFSETS |
|||
; WARNING: THESE OFFSETS WILL CHANGE SIGNIFICANTLY BETWEEN RELEASES |
|||
; IT IS STRONGLY RECOMMENDED THAT YOU DO NOT USE THEM! |
|||
; |
|||
HCB_LOC .EQU $100 ; LOCATION OF HCB IN HBIOS BANK |
|||
HCB_SIZ .EQU $100 ; SIZE OF HCB DATA BLOCK |
|||
; |
|||
HCB_MARKER .EQU $03 ; MARKER ('W',~'W') (WORD) |
|||
HCB_VERSION .EQU $05 ; HBIOS VERSION NUM |
|||
HCB_PLATFORM .EQU $07 ; PLATFORM ID |
|||
HCB_CPUMHZ .EQU $08 ; CPU SPEED IN MHZ (BYTE) |
|||
HCB_CPUKHZ .EQU $09 ; CPU SPEED IN KHZ (WORD) |
|||
HCB_RAMBANKS .EQU $0B ; TOTAL SIZE OF RAM IN 32K BANKS (BYTE) |
|||
HCB_ROMBANKS .EQU $0C ; TOTAL SIZE OF ROM IN 32K BANKS (BYTE) |
|||
HCB_BOOTVOL .EQU $0D ; BOOT VOLUME, MSB=DEV/UNIT, LSB=LU (WORD) |
|||
HCB_BOOTBID .EQU $0F ; BANK ID OF ROM PAGE BOOTED (BYTE) |
|||
HCB_SERDEV .EQU $10 ; PRIMARY SERIAL DEVICE/UNIT (BYTE) |
|||
HCB_CRTDEV .EQU $11 ; CRT DISPLAY DEVICE/UNIT (BYTE) |
|||
HCB_CONDEV .EQU $12 ; ACTIVE CONSOLE DEVICE/UNIT (BYTE) |
|||
HCB_DIAGLVL .EQU $13 ; HBIOS DIAGNOSTIC LEVEL (BYTE) |
|||
; |
|||
HCB_HEAP .EQU $20 ; DWORD ADDRESS OF START OF HEAP |
|||
HCB_HEAPTOP .EQU $22 ; DWORD ADDRESS OF TOP OF HEAP |
|||
; |
|||
; MEMORY BANK IDS (ONE BYTE EACH) |
|||
HCB_BIDCOM .EQU $D8 ; COMMON BANK (UPPER 32K) |
|||
HCB_BIDUSR .EQU $D9 ; USER BANK (TPA) |
|||
HCB_BIDBIOS .EQU $DA ; BIOS BANK (HBIOS, UBIOS) |
|||
HCB_BIDAUX .EQU $DB ; AUX BANK (BPBIOS) |
|||
HCB_BIDRAMD0 .EQU $DC ; FIRST BANK OF RAM DRIVE |
|||
HCB_BIDRAMDN .EQU $DD ; LAST BANK OF RAM DRIVE |
|||
HCB_BIDROMD0 .EQU $DE ; FIRST BANK OF ROM DRIVE |
|||
HCB_BIDROMDN .EQU $DF ; LAST BANK OF ROM DRIVE |
|||
; |
|||
; HBIOS PROXY COMMON DATA BLOCK |
|||
; EXACTLY 32 BYTES AT $FFE0-$FFFF |
|||
; |
|||
HBX_XFC .EQU $10000 - $20 ; HBIOS PROXY INTERFACE AREA, 32 BYTES FIXED |
|||
; |
|||
HBX_XFCDAT .EQU HBX_XFC ; DATA PORTION OF HBIOS PROXY INTERFACE AREA |
|||
HB_CURBNK .EQU HBX_XFCDAT + 0 ; CURRENTLY ACTIVE LOW MEMORY BANK ID |
|||
HB_INVBNK .EQU HBX_XFCDAT + 1 ; BANK ACTIVE AT TIME OF HBIOS CALL INVOCATION |
|||
HB_SRCADR .EQU HBX_XFCDAT + 2 ; BNKCPY: DESTINATION BANK ID |
|||
HB_SRCBNK .EQU HBX_XFCDAT + 4 ; BNKCPY: SOURCE BANK ID |
|||
HB_DSTADR .EQU HBX_XFCDAT + 5 ; BNKCPY: DESTINATION ADDRESS |
|||
HB_DSTBNK .EQU HBX_XFCDAT + 7 ; BNKCPY: SOURCE ADDRESS |
|||
HB_CPYLEN .EQU HBX_XFCDAT + 8 ; BNKCPY: COPY LENGTH |
|||
HB_RTCVAL .EQU HBX_XFCDAT + 14 ; RTC LATCH SHADOW VALUE |
|||
HB_LOCK .EQU HBX_XFCDAT + 15 ; INVOKE: HBIOS MUTEX LOCK |
|||
; |
|||
HBX_XFCFNS .EQU HBX_XFC + $10 ; JUMP TABLE PORTION OF HBIOS PROXY INTERFACE AREA |
|||
HB_INVOKE .EQU HBX_XFCFNS + (0 * 3) ; INVOKE HBIOS FUNCTION |
|||
HB_BNKSEL .EQU HBX_XFCFNS + (1 * 3) ; SELECT LOW MEMORY BANK ID |
|||
HB_BNKCPY .EQU HBX_XFCFNS + (2 * 3) ; INTERBANK MEMORY COPY |
|||
HB_BNKCALL .EQU HBX_XFCFNS + (3 * 3) ; INTERBANK FUNCTION CALL |
|||
;HB_LOC .EQU HBX_XFCFNS + 12 ; ADDRESS OF HBIOS PROXY START (DEPRECATED) |
|||
HB_IDENT .EQU HBX_XFCFNS + 14 ; POINTER TO HBIOS IDENT DATA BLOCK |
|||
@ -1,693 +0,0 @@ |
|||
; The purpose of this file is to define generic symbols and to include |
|||
; the requested build configuraton file to bring in platform specifics. |
|||
|
|||
; There are several hardware platforms supported by SBC. |
|||
; 1. SBC Z80 SBC (v1 or v2) w/ ECB interface |
|||
; 2. ZETA Standalone Z80 SBC w/ SBC compatibility |
|||
; 3. ZETA2 Second version of ZETA with enhanced memory bank switching |
|||
; 4. N8 MSX-ish Z180 SBC w/ onboard video and sound |
|||
; 5. MK4 Mark IV Z180 based SBC w/ ECB interface |
|||
; 6. UNA Any Z80/Z180 computer with UNA BIOS |
|||
; 7. RCZ80 RC2014 based system with 512K banked RAM/ROM card |
|||
; 8. RCZ180 RC2014 based system with Z180 CPU |
|||
; 9. EZZ80 Easy Z80, Z80 SBC w/ RC2014 bus and CTC |
|||
; 10. SCZ180 Steve Cousins Z180 based system |
|||
; 11. DYNO Steve Garcia's Dyno Micro-ATX Motherboard |
|||
; 12. RCZ280 Z280 CPU on RC2014 or ZZ80MB |
|||
; 13. MBC Andrew Lynch's Multi Board Computer |
|||
|
|||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
|||
; |
|||
; INCLUDE VERSION |
|||
; |
|||
#INCLUDE "ver.inc" ; ADD BIOSVER |
|||
; |
|||
FALSE .EQU 0 |
|||
TRUE .EQU ~FALSE |
|||
; |
|||
; DEBUGGING OPTIONS |
|||
; |
|||
USENONE .EQU 0 ; NO DEBUG |
|||
USEXIO .EQU 1 ; BASIC SERIAL DRIVER |
|||
USEMIO .EQU 2 ; MEMORY BUFFER DRIVER |
|||
WBWDEBUG .EQU USENONE |
|||
; |
|||
; DIAGNOSTIC LEVEL OPTIONS |
|||
; |
|||
DL_NONE .EQU 0 ; HBIOS DISPLAY NO MESSAGES |
|||
DL_CRITICAL .EQU 4 ; HBIOS DISPLAY CRITICAL ERROR MESSAGES |
|||
DL_ERROR .EQU 8 ; HBIOS DISPLAYS ALL ERROR MESSAGES |
|||
DL_WARNING .EQU 12 ; HBIOS DISPLAYS WARNING MESSAGES |
|||
DL_INFO .EQU 16 ; HBIOS DISPLAYS INFORMATIONAL MESSAGES |
|||
DL_DETAIL .EQU 20 ; HBIOS DISPLAYS DETAILED DIAGNOSTIC MESSAGES |
|||
DL_VERBOSE .EQU 24 ; HBIOS DISPLAYS ANYTHING IT KNOWS HOW TO |
|||
; |
|||
; PRIMARY HARDWARE PLATFORMS |
|||
; |
|||
PLT_SBC .EQU 1 ; SBC ECB Z80 SBC |
|||
PLT_ZETA .EQU 2 ; ZETA Z80 SBC |
|||
PLT_ZETA2 .EQU 3 ; ZETA Z80 V2 SBC |
|||
PLT_N8 .EQU 4 ; N8 (HOME COMPUTER) Z180 SBC |
|||
PLT_MK4 .EQU 5 ; MARK IV |
|||
PLT_UNA .EQU 6 ; UNA BIOS |
|||
PLT_RCZ80 .EQU 7 ; RC2014 W/ Z80 |
|||
PLT_RCZ180 .EQU 8 ; RC2014 W/ Z180 |
|||
PLT_EZZ80 .EQU 9 ; EASY Z80 |
|||
PLT_SCZ180 .EQU 10 ; SCZ180 |
|||
PLT_DYNO .EQU 11 ; DYNO MICRO-ATX MOTHERBOARD |
|||
PLT_RCZ280 .EQU 12 ; RC2014 W/ Z280 |
|||
PLT_MBC .EQU 13 ; MULTI BOARD COMPUTER |
|||
; |
|||
; CPU TYPES |
|||
; |
|||
CPU_NONE .EQU 0 ; NO CPU TYPE DEFINED |
|||
CPU_Z80 .EQU 1 ; Z80 FAMILY |
|||
CPU_Z180 .EQU 2 ; Z180 FAMILY |
|||
CPU_Z280 .EQU 3 ; Z280 FAMILY |
|||
; |
|||
; BIOS MODE |
|||
; |
|||
BIOS_NONE .EQU 0 ; NO BIOS TYPE DEFINED |
|||
BIOS_WBW .EQU 1 ; ROMWBW HBIOS |
|||
BIOS_UNA .EQU 2 ; UNA UBIOS |
|||
; |
|||
; DEFAULT HBIOS DIAGNOSTIC LEVEL |
|||
; WILL ULTIMATELY BE MOVED TO CONFIG FILE |
|||
; |
|||
DIAGLVL .EQU DL_CRITICAL |
|||
; |
|||
; MEMORY MANAGERS |
|||
; |
|||
MM_NONE .EQU 0 |
|||
MM_SBC .EQU 1 ; ORIGINAL N8VEM/RBC Z80 SBC BANKED MEMORY |
|||
MM_Z2 .EQU 2 ; 16K X 4 BANKED MEMORY INTRODUCED ON ZETA2 |
|||
MM_N8 .EQU 3 ; Z180 CUSTOMIZED FOR N8 MEMORY EXTENSIONS |
|||
MM_Z180 .EQU 4 ; Z180 NATIVE MEMORY MANAGER |
|||
MM_Z280 .EQU 5 ; Z280 NATIVE MEMORY MANAGER |
|||
MM_ZRC .EQU 6 ; ZRC BANK SWITCHING |
|||
MM_MBC .EQU 7 ; MBC MEMORY MANAGER |
|||
; |
|||
; BOOT STYLE |
|||
; |
|||
BT_MENU .EQU 1 ; WAIT FOR MENU SELECTION AT LOADER PROMPT |
|||
BT_AUTO .EQU 2 ; AUTO SELECT BOOT_DEFAULT AFTER BOOT_TIMEOUT |
|||
; |
|||
; BOOT RECOVERY METHODS |
|||
; |
|||
BT_REC_NONE .EQU 0 ; NO RECOVERY MODE |
|||
BT_REC_FORCE .EQU 1 ; FORCE BOOT RECOVERY MODE |
|||
BT_REC_SBC01 .EQU 2 ; ECB-SBCV2 - BIT 1 RTC HIGH |
|||
BT_REC_SBC1B .EQU 3 ; ECB-SBCV2 - 1-BIT IO PORT |
|||
BT_REC_SBCRI .EQU 4 ; ECB-SBCV2 - 16550 UART RING INDICATOR LINE |
|||
; |
|||
BT_REC_TYPE .EQU BT_REC_NONE ; BOOT RECOVERY METHOD TO USE |
|||
; |
|||
; FLOPPY DISK MEDIA SELECTIONS (ID'S MUST BE INDEX OF ENTRY IN FCD_TBL) |
|||
; |
|||
FDM720 .EQU 0 ; 3.5" FLOPPY, 720KB, 2 SIDES, 80 TRKS, 9 SECTORS |
|||
FDM144 .EQU 1 ; 3.5" FLOPPY, 1.44MB, 2 SIDES, 80 TRKS, 18 SECTORS |
|||
FDM360 .EQU 2 ; 5.25" FLOPPY, 360KB, 2 SIDES, 40 TRKS, 9 SECTORS |
|||
FDM120 .EQU 3 ; 5.25" FLOPPY, 1.2MB, 2 SIDES, 80 TRKS, 15 SECTORS |
|||
FDM111 .EQU 4 ; 8" FLOPPY, 1.11MB, 2 SIDES, 74 TRKS, 15 SECTORS |
|||
; |
|||
; ZILOG CTC MODE SELECTIONS |
|||
; |
|||
CTCMODE_NONE .EQU 0 ; NO CTC |
|||
CTCMODE_CTR .EQU 1 ; CTC COUNTER |
|||
CTCMODE_TIM16 .EQU 2 ; CTC TIMER W/ DIV 16 |
|||
CTCMODE_TIM256 .EQU 3 ; CTC TIMER W/ DIV 256 |
|||
; |
|||
; DS1302 RTC MODE SELECTIONS |
|||
; |
|||
DSRTCMODE_NONE .EQU 0 ; NO DSRTC |
|||
DSRTCMODE_STD .EQU 1 ; ORIGINAL DSRTC CIRCUIT (SBC, ZETA, MK4) |
|||
DSRTCMODE_MFPIC .EQU 2 ; MF/PIC VARIANT |
|||
; |
|||
; DS1307 RTC MODE SELECTIONS |
|||
; |
|||
DS7RTCMODE_NONE .EQU 0 ; NO DSRTC |
|||
DS7RTCMODE_PCF .EQU 1 ; PCF8584 I2C |
|||
; |
|||
; SIO MODE SELECTIONS |
|||
; |
|||
SIOMODE_NONE .EQU 0 |
|||
SIOMODE_STD .EQU 1 ; STD SIO REG CFG (EZZ80, KIO) |
|||
SIOMODE_RC .EQU 2 ; RC2014 SIO MODULE (SPENCER OWEN) |
|||
SIOMODE_SMB .EQU 3 ; RC2014 SIO MODULE (SCOTT BAKER) |
|||
SIOMODE_ZP .EQU 4 ; ECB-ZILOG PERIPHERALS BOARD |
|||
; |
|||
; TYPE OF CONSOLE BELL TO USE |
|||
; |
|||
CONBELL_NONE .EQU 0 |
|||
CONBELL_PSG .EQU 1 |
|||
CONBELL_IOBIT .EQU 2 |
|||
; |
|||
; LED MODE SELECTIONS |
|||
; |
|||
LEDMODE_NONE .EQU 0 |
|||
LEDMODE_STD .EQU 1 |
|||
LEDMODE_RTC .EQU 2 |
|||
; |
|||
; DSKY MODE SELECTIONS |
|||
; |
|||
DSKYMODE_NONE .EQU 0 |
|||
DSKYMODE_V1 .EQU 1 |
|||
DSKYMODE_NG .EQU 2 |
|||
; |
|||
; FD MODE SELECTIONS |
|||
; |
|||
FDMODE_NONE .EQU 0 |
|||
FDMODE_DIO .EQU 1 ; DISKIO V1 |
|||
FDMODE_ZETA .EQU 2 ; ZETA |
|||
FDMODE_ZETA2 .EQU 3 ; ZETA V2 |
|||
FDMODE_DIDE .EQU 4 ; DUAL IDE |
|||
FDMODE_N8 .EQU 5 ; N8 |
|||
FDMODE_DIO3 .EQU 6 ; DISKIO V3 |
|||
FDMODE_RCSMC .EQU 7 ; RC2014 SMC 9266 @ $40 (SCOTT BAKER) |
|||
FDMODE_RCWDC .EQU 8 ; RC2014 WDC 37C65 @ $40 (SCOTT BAKER) |
|||
FDMODE_DYNO .EQU 9 ; DYNO WDC 37C65 @ $84 |
|||
FDMODE_EPFDC .EQU 10 ; RC2014 ETCHED PIXELS FDC |
|||
FDMODE_MBC .EQU 11 ; MULTI-BOARD COMPUTER FDC |
|||
; |
|||
; IDE MODE SELECTIONS |
|||
; |
|||
IDEMODE_NONE .EQU 0 |
|||
IDEMODE_DIO .EQU 1 ; DISKIO V1 |
|||
IDEMODE_DIDE .EQU 2 ; DUAL IDE |
|||
IDEMODE_MK4 .EQU 3 ; MARK IV ONBOARD IDE (8 BIT ONLY) |
|||
IDEMODE_RC .EQU 4 ; RC2014 CF MODULE (8 BIT ONLY) |
|||
; |
|||
; PPIDE MODE SELECTIONS |
|||
; |
|||
PPIDEMODE_NONE .EQU 0 |
|||
PPIDEMODE_SBC .EQU 1 ; STANDARD SBC PARALLEL PORT |
|||
PPIDEMODE_DIO3 .EQU 2 ; DISKIO V3 PARALLEL PORT |
|||
PPIDEMODE_MFP .EQU 3 ; MULTIFUNCTION / PIC |
|||
PPIDEMODE_N8 .EQU 4 ; MULTIFUNCTION / PIC |
|||
PPIDEMODE_RC .EQU 5 ; RC2014 PPIDE MODULE @ $20 (ED BRINDLEY) |
|||
PPIDEMODE_DYNO .EQU 6 ; DYNO PPIDE @ $4C |
|||
; |
|||
; SD MODE SELECTIONS |
|||
; |
|||
SDMODE_NONE .EQU 0 |
|||
SDMODE_JUHA .EQU 1 ; JUHA MINI BOARD |
|||
SDMODE_N8 .EQU 2 ; N8-2511, UNMODIFIED |
|||
SDMODE_CSIO .EQU 3 ; N8-2312 OR N8-2511 MODIFIED |
|||
SDMODE_PPI .EQU 4 ; PPISD MINI BOARD |
|||
SDMODE_UART .EQU 5 ; SD INTERFACE VIA UART |
|||
SDMODE_DSD .EQU 6 ; DUAL SD |
|||
SDMODE_MK4 .EQU 7 ; MARK IV |
|||
SDMODE_SC .EQU 8 ; SC (Steve Cousins) |
|||
SDMODE_MT .EQU 9 ; MT (Shift register SPI WIZNET for RC2014) |
|||
; |
|||
; SOUND CHIP MODE SELECTIONS |
|||
; |
|||
AYMODE_NONE .EQU 0 |
|||
AYMODE_N8 .EQU 1 ; N8 BUILT-IN SOUND |
|||
AYMODE_SCG .EQU 2 ; SCG ECB BOARD |
|||
AYMODE_RCZ80 .EQU 3 ; RC2014 SOUND MODULE BY ED BRINDLEY ON Z80 |
|||
AYMODE_RCZ180 .EQU 4 ; RC2014 SOUND MODULE BY ED BRINDLEY ON Z180 |
|||
AYMODE_MSX .EQU 5 ; RC2014 SOUND MODULE REV6 BY ED BRINDLEY ON Z80/Z180 AT MSX PORTS |
|||
AYMODE_LINC .EQU 6 ; LINC Z50 AY SOUND CARD |
|||
; |
|||
; TMS VIDEO MODE SELECTIONS |
|||
; |
|||
TMSMODE_NONE .EQU 0 |
|||
TMSMODE_SCG .EQU 1 ; SCG ECB BOARD |
|||
TMSMODE_N8 .EQU 2 ; N8 BUILT-IN VIDEO |
|||
TMSMODE_RC .EQU 3 ; RC2014 TMS9918 VIDEO BOARD |
|||
TMSMODE_RCV9958 .EQU 4 ; RC2014 V9958 VIDEO BOARD |
|||
; |
|||
; DMA MODE SELECTIONS |
|||
; |
|||
DMAMODE_NONE .EQU 0 |
|||
DMAMODE_ECB .EQU 1 ; ECB-DMA WOLFGANG KABATZKE'S Z80 DMA ECB BOARD |
|||
DMAMODE_Z180 .EQU 2 ; Z180 INTEGRATED DMA |
|||
DMAMODE_Z280 .EQU 3 ; Z280 INTEGRATED DMA |
|||
DMAMODE_RC .EQU 4 ; RC2014 Z80 DMA |
|||
DMAMODE_MBC .EQU 5 ; MBC |
|||
; |
|||
; SERIAL DEVICE CONFIGURATION CONSTANTS |
|||
; |
|||
SER_DATA5 .EQU 0 << 0 |
|||
SER_DATA6 .EQU 1 << 0 |
|||
SER_DATA7 .EQU 2 << 0 |
|||
SER_DATA8 .EQU 3 << 0 |
|||
; |
|||
SER_PARNONE .EQU 0 << 3 |
|||
SER_PARODD .EQU 1 << 3 |
|||
SER_PAREVEN .EQU 3 << 3 |
|||
SER_PARMARK .EQU 5 << 3 |
|||
SER_PARSPACE .EQU 7 << 3 |
|||
; |
|||
SER_STOP1 .EQU 0 << 2 |
|||
SER_STOP2 .EQU 1 << 2 |
|||
; |
|||
; SERIAL BAUD RATES ENCODED AS V = 75 * 2^X * 3^Y |
|||
; AND STORED AS 5 BITS: YXXXX |
|||
; |
|||
SER_BAUD75 .EQU $00 << 8 |
|||
SER_BAUD150 .EQU $01 << 8 |
|||
SER_BAUD300 .EQU $02 << 8 |
|||
SER_BAUD600 .EQU $03 << 8 |
|||
SER_BAUD1200 .EQU $04 << 8 |
|||
SER_BAUD2400 .EQU $05 << 8 |
|||
SER_BAUD4800 .EQU $06 << 8 |
|||
SER_BAUD9600 .EQU $07 << 8 |
|||
SER_BAUD19200 .EQU $08 << 8 |
|||
SER_BAUD38400 .EQU $09 << 8 |
|||
SER_BAUD76800 .EQU $0A << 8 |
|||
SER_BAUD153600 .EQU $0B << 8 |
|||
SER_BAUD307200 .EQU $0C << 8 |
|||
SER_BAUD614400 .EQU $0D << 8 |
|||
SER_BAUD1228800 .EQU $0E << 8 |
|||
SER_BAUD2457600 .EQU $0F << 8 |
|||
SER_BAUD225 .EQU $10 << 8 |
|||
SER_BAUD450 .EQU $11 << 8 |
|||
SER_BAUD900 .EQU $12 << 8 |
|||
SER_BAUD1800 .EQU $13 << 8 |
|||
SER_BAUD3600 .EQU $14 << 8 |
|||
SER_BAUD7200 .EQU $15 << 8 |
|||
SER_BAUD14400 .EQU $16 << 8 |
|||
SER_BAUD28800 .EQU $17 << 8 |
|||
SER_BAUD57600 .EQU $18 << 8 |
|||
SER_BAUD115200 .EQU $19 << 8 |
|||
SER_BAUD230400 .EQU $1A << 8 |
|||
SER_BAUD460800 .EQU $1B << 8 |
|||
SER_BAUD921600 .EQU $1C << 8 |
|||
SER_BAUD1843200 .EQU $1D << 8 |
|||
SER_BAUD3686400 .EQU $1E << 8 |
|||
SER_BAUD7372800 .EQU $1F << 8 |
|||
; |
|||
; UART DIVIDER VALUES |
|||
; STORED AS 5 BITS: YXXXX |
|||
; |
|||
DIV_1 .EQU $00 |
|||
DIV_2 .EQU $01 |
|||
DIV_4 .EQU $02 |
|||
DIV_8 .EQU $03 |
|||
DIV_16 .EQU $04 |
|||
DIV_32 .EQU $05 |
|||
DIV_64 .EQU $06 |
|||
DIV_128 .EQU $07 |
|||
DIV_256 .EQU $08 |
|||
DIV_512 .EQU $09 |
|||
DIV_1024 .EQU $0A |
|||
DIV_2048 .EQU $0B |
|||
DIV_4096 .EQU $0C |
|||
DIV_8192 .EQU $0D |
|||
DIV_16384 .EQU $0E |
|||
DIV_32768 .EQU $0F |
|||
DIV_3 .EQU $10 |
|||
DIV_6 .EQU $11 |
|||
DIV_12 .EQU $12 |
|||
DIV_24 .EQU $13 |
|||
DIV_48 .EQU $14 |
|||
DIV_96 .EQU $15 |
|||
DIV_192 .EQU $16 |
|||
DIV_384 .EQU $17 |
|||
DIV_768 .EQU $18 |
|||
DIV_1536 .EQU $19 |
|||
DIV_3072 .EQU $1A |
|||
DIV_6144 .EQU $1B |
|||
DIV_12288 .EQU $1C |
|||
DIV_24576 .EQU $1D |
|||
DIV_49152 .EQU $1E |
|||
DIV_98304 .EQU $1F |
|||
; |
|||
SER_XON .EQU 1 << 6 |
|||
SER_DTR .EQU 1 << 7 |
|||
SER_RTS .EQU 1 << 13 |
|||
; |
|||
SER_75_8N1 .EQU SER_BAUD75 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_150_8N1 .EQU SER_BAUD150 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_300_8N1 .EQU SER_BAUD300 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_600_8N1 .EQU SER_BAUD600 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_1200_8N1 .EQU SER_BAUD1200 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_2400_8N1 .EQU SER_BAUD2400 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_4800_8N1 .EQU SER_BAUD4800 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_9600_8N1 .EQU SER_BAUD9600 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_19200_8N1 .EQU SER_BAUD19200 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_38400_8N1 .EQU SER_BAUD38400 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_76800_8N1 .EQU SER_BAUD76800 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_153600_8N1 .EQU SER_BAUD153600 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_307200_8N1 .EQU SER_BAUD307200 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_614400_8N1 .EQU SER_BAUD614400 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_1228800_8N1 .EQU SER_BAUD1228800 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_2457600_8N1 .EQU SER_BAUD2457600 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_225_8N1 .EQU SER_BAUD225 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_450_8N1 .EQU SER_BAUD450 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_900_8N1 .EQU SER_BAUD900 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_1800_8N1 .EQU SER_BAUD1800 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_3600_8N1 .EQU SER_BAUD3600 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_7200_8N1 .EQU SER_BAUD7200 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_14400_8N1 .EQU SER_BAUD14400 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_28800_8N1 .EQU SER_BAUD28800 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_57600_8N1 .EQU SER_BAUD57600 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_115200_8N1 .EQU SER_BAUD115200 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_230400_8N1 .EQU SER_BAUD230400 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_460800_8N1 .EQU SER_BAUD460800 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_921600_8N1 .EQU SER_BAUD921600 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_1843200_8N1 .EQU SER_BAUD1843200 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_3686400_8N1 .EQU SER_BAUD3686400 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
SER_7372800_8N1 .EQU SER_BAUD7372800 | SER_DATA8 | SER_PARNONE | SER_STOP1 |
|||
; |
|||
; TERMENABLE CONTROLS INCLUSION OF TERMINAL PSEUDO-DEVICE DRIVER |
|||
; IT IS SET TO TRUE BY THE INCLUSION OF ANY VDA DRIVER. |
|||
; |
|||
TERMENABLE .EQU FALSE ; TERM PSEUDO DEVICE, WILL AUTO-ENABLE IF A VDA IS ENABLED |
|||
; |
|||
; VIDEO MODES |
|||
; |
|||
V80X24 .EQU 0 ; ECB-VDU |
|||
V80X25 .EQU 1 ; ECB-VDU, ECB-VGA3 |
|||
V80X30 .EQU 2 ; ECB-VDU, ECB-VGA3 |
|||
V80X25B .EQU 3 ; ECB-VDU |
|||
V80X24B .EQU 4 ; ECB-VDU |
|||
V80X43 .EQU 5 ; ECB-VGA3 |
|||
V80X60 .EQU 6 ; ECB-VGA3 |
|||
; |
|||
; KEYBOARD LAYOUTS |
|||
; |
|||
KBD_US .EQU 0 ; US ENGLISH |
|||
KBD_DE .EQU 1 ; GERMAN |
|||
; |
|||
; EMULATION TYPES |
|||
; |
|||
EMUTYP_NONE .EQU 0 ; NONE |
|||
EMUTYP_TTY .EQU 1 ; TTY |
|||
EMUTYP_ANSI .EQU 2 ; ANSI |
|||
; |
|||
; WATCHDOG TYPES |
|||
; |
|||
WDOG_NONE .EQU 0 ; NONE |
|||
WDOG_EZZ80 .EQU 1 ; EASY Z80 WATCHDOG |
|||
WDOG_SKZ .EQU 2 ; SK Z80 CPU W/ 512K |
|||
; |
|||
; SYSTEM SPEED CAPABILITIES |
|||
; |
|||
SPD_FIXED .EQU 0 ; PLATFORM SPEED FIXED AND CANNOT CHANGE SPEEDS |
|||
SPD_HILO .EQU 1 ; PLATFORM CAN CHANGE BETWEEN TWO SPEEDS |
|||
; |
|||
; SYSTEM SPEED CHARACTERISTICS |
|||
; |
|||
SPD_UNSUP .EQU 0 ; PLATFORM CAN CHANGE SPEEDS BUT IS UNSUPPORTED |
|||
SPD_HIGH .EQU 1 ; PLATFORM CAN CHANGE SPEED, STARTS HIGH |
|||
SPD_LOW .EQU 2 ; PLATFORM CAN CHANGE SPEED, STARTS LOW |
|||
; |
|||
#INCLUDE "build.inc" ; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE |
|||
; |
|||
#IF (BIOS == BIOS_WBW) |
|||
#INCLUDE "hbios.inc" |
|||
#ENDIF |
|||
; |
|||
#IF (BIOS == BIOS_UNA) |
|||
#INCLUDE "../UBIOS/ubios.inc" |
|||
#ENDIF |
|||
; |
|||
; |
|||
; INCLUDE Z180 REGISTER DEFINITIONS |
|||
; |
|||
#IF (BIOS == BIOS_WBW) |
|||
#IF (CPUFAM == CPU_Z180) |
|||
#INCLUDE "z180.inc" |
|||
#ENDIF |
|||
#IF (CPUFAM == CPU_Z280) |
|||
#INCLUDE "z280.inc" |
|||
#ENDIF |
|||
#IF (EIPCENABLE) |
|||
#INCLUDE "eipc.inc" |
|||
#ENDIF |
|||
#ENDIF |
|||
; |
|||
; SETUP DEFAULT CPU SPEED VALUES |
|||
; |
|||
CPUKHZ .EQU CPUOSC / 1000 ; CPU FREQ IN KHZ |
|||
; |
|||
#IF (BIOS == BIOS_WBW) |
|||
#IF (CPUFAM == CPU_Z180) |
|||
#IF (Z180_CLKDIV == 0) |
|||
CPUKHZ .SET CPUKHZ / 2 ; ADJUST FOR HALF SPEED OPERATION |
|||
#ENDIF |
|||
#IF (Z180_CLKDIV == 2) |
|||
CPUKHZ .SET CPUKHZ * 2 ; ADJUST FOR DOUBLE SPEED OPERATION |
|||
#ENDIF |
|||
#ENDIF |
|||
#IF (CPUFAM == CPU_Z280) |
|||
CPUKHZ .SET CPUKHZ / 2 ; Z180 PHI IS ALWAYS 1/2 OSC |
|||
#ENDIF |
|||
#ENDIF |
|||
; |
|||
CPUMHZ .EQU CPUKHZ / 1000 ; CPU FREQ IN MHZ |
|||
; |
|||
; SYSTEM PERIODIC TIMER MODE |
|||
; |
|||
#IF (BIOS == BIOS_WBW) |
|||
; |
|||
TM_NONE .EQU 0 |
|||
TM_CTC .EQU 1 |
|||
TM_TMS .EQU 2 |
|||
TM_SIMH .EQU 3 |
|||
TM_Z180 .EQU 4 |
|||
TM_Z280 .EQU 5 |
|||
; |
|||
.ECHO "SYSTEM TIMER:" |
|||
SYSTIM .EQU TM_NONE |
|||
; |
|||
#IF (CTCENABLE & (INTMODE == 2)) |
|||
#IF (CTCTIMER) |
|||
SYSTIM .SET TM_CTC |
|||
.ECHO " CTC" |
|||
#ENDIF |
|||
#ENDIF |
|||
; |
|||
#IF (TMSENABLE & (INTMODE == 1)) |
|||
#IF (TMSTIMENABLE) |
|||
SYSTIM .SET TM_TMS |
|||
.ECHO " TMS9918/V9958" |
|||
#ENDIF |
|||
#ENDIF |
|||
; |
|||
#IF ((PLATFORM == PLT_SBC) & (INTMODE == 1)) |
|||
#IF (HTIMENABLE) |
|||
SYSTIM .SET TM_SIMH |
|||
.ECHO " SIMH" |
|||
#ENDIF |
|||
#ENDIF |
|||
; |
|||
#IF ((CPUFAM == CPU_Z180) & (INTMODE == 2)) |
|||
#IF (Z180_TIMER) |
|||
SYSTIM .SET TM_Z180 |
|||
.ECHO " Z180" |
|||
#ENDIF |
|||
#ENDIF |
|||
; |
|||
#IF ((CPUFAM == CPU_Z280) & (MEMMGR == MM_Z280)) |
|||
#IF (Z280_TIMER) |
|||
SYSTIM .SET TM_Z280 |
|||
.ECHO " Z280" |
|||
#ENDIF |
|||
#ENDIF |
|||
; |
|||
#IF SYSTIM == TM_NONE |
|||
.ECHO " NONE" |
|||
#ENDIF |
|||
; |
|||
.ECHO "\n" |
|||
; |
|||
#ENDIF |
|||
; |
|||
; MEMORY BANK CONFIGURATION |
|||
; |
|||
WBW_ROM_R .EQU 128 ; 128K ; RESERVED ROM REQUIRED FOR ROMWBW |
|||
WBW_RAM_R .EQU 256 ; 256K ; RESERVED RAM REQUIRED FOR ROMWBW |
|||
TOT_ROM_RB .EQU (PLT_ROM_R + WBW_ROM_R)/32 ; TOTAL ROM BANKS RESERVED |
|||
TOT_RAM_RB .EQU (PLT_RAM_R + WBW_RAM_R)/32 ; TOTAL RAM BANKS RESERVED |
|||
; |
|||
#IF (BIOS == BIOS_UNA) |
|||
BID_ROM0 .EQU $0000 + (PLT_ROM_R / 32) |
|||
BID_RAM0 .EQU $8000 + (PLT_RAM_R / 32) |
|||
#ENDIF |
|||
; |
|||
#IF (BIOS == BIOS_WBW) |
|||
BID_ROM0 .EQU $00 + (PLT_ROM_R / 32) |
|||
BID_RAM0 .EQU $80 + (PLT_RAM_R / 32) |
|||
#ENDIF |
|||
|
|||
BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1)) |
|||
BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1)) |
|||
; |
|||
BID_RAMD0 .EQU BID_RAM0 ; FIRST RAM DRIVE BANK ^ RAM |
|||
BID_RAMDN .EQU BID_RAMN - TOT_RAM_RB ; LAST RAM DRIVE BANK | DRIVE |
|||
; ; OS BUFFERS CP/M3? -+ THESE |
|||
; ; OS BUFFERS CP/M3? | MAKE |
|||
; ; OS BUFFERS CP/M3? | UP |
|||
; ; OS BUFFERS CP/M3? | THE |
|||
BID_AUX .EQU BID_RAMN - 3 ; AUX BANK (BPBIOS, ETC.) | 256KB |
|||
BID_BIOS .EQU BID_RAMN - 2 ; BIOS BANK | RESERVED |
|||
BID_USR .EQU BID_RAMN - 1 ; USER BANK (CP/M TPA, ETC.) | RAM |
|||
BID_COM .EQU BID_RAMN - 0 ; COMMON BANK, UPPER 32K -+ BANKS |
|||
BID_BOOT .EQU BID_ROM0 + 0 ; BOOT BANK -+ THESE MAKE |
|||
BID_IMG0 .EQU BID_ROM0 + 1 ; ROM LOADER AND FIRST IMAGES BANK | UP THE 128KB |
|||
BID_IMG1 .EQU BID_ROM0 + 2 ; SECOND IMAGES BANK | RESERVED |
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BID_IMG2 .EQU BID_ROM0 + 3 ; NETWORK BOOT -+ ROM BANKS |
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BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK | ROM |
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BID_ROMDN .EQU BID_ROMN ; LAST ROM DRIVE BANK V DRIVE |
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; |
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; MEMORY LAYOUT |
|||
; |
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SYS_SIZ .EQU $3000 ; COMBINED SIZE OF SYSTEM AREA (OS + HBIOS PROXY) |
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HBBUF_SIZ .EQU 1024 ; INVARIANT HBIOS PHYSICAL DISK BUFFER, 1K |
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HBX_SIZ .EQU $200 ; HBIOS PROXY SIZE (SUBJECT TO CHANGE) |
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CPM_SIZ .EQU SYS_SIZ - HBX_SIZ ; NET SIZE OF ALL OS COMPONENTS (EXCLUDING HBIOS PROXY) |
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CCP_SIZ .EQU $800 ; INVARIANT SIZE OF CCP |
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BDOS_SIZ .EQU $E00 ; INVARIANT SIZE OF BDOS |
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CBIOS_SIZ .EQU CPM_SIZ - CCP_SIZ - BDOS_SIZ ; CBIOS IS THE REMAINDER |
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|
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MEMTOP .EQU $10000 ; INVARIANT TOP OF Z80 ADDRESSABLE MEMORY |
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BNKTOP .EQU $8000 ; BANK MEMORY BARRIER |
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|
|||
HBX_IMG .EQU $200 ; LOC OF HBX IMAGE IN HBIOS IMAGE BANK |
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|
|||
HBBUF_END .EQU BNKTOP ; END OF PHYSICAL DISK BUFFER IN HBIOS |
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HBBUF_LOC .EQU HBBUF_END - HBBUF_SIZ ; START OF PHYSICAL DISK BUFFER |
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HBX_END .EQU MEMTOP ; END OF HBIOS PROXY |
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HBX_LOC .EQU HBX_END - HBX_SIZ ; START OF HBIOS PROXY |
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CPM_END .EQU HBX_LOC ; END OF CPM COMPONENTS (INCLUDING CBIOS) |
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CPM_LOC .EQU CPM_END - CPM_SIZ ; START OF CPM COMPONENTS |
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CBIOS_END .EQU HBX_LOC ; END OF CBIOS |
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CBIOS_LOC .EQU CBIOS_END - CBIOS_SIZ ; START OF CBIOS |
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|
|||
CPM_ENT .EQU CBIOS_LOC ; CPM ENTRY POINT (IN CBIOS) |
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|
|||
CPM_IMGSIZ .EQU $3000 |
|||
|
|||
; ROM BANK 1 |
|||
|
|||
LDR_LOC .EQU $0000 |
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LDR_SIZ .EQU $1000 |
|||
LDR_END .EQU LDR_LOC +LDR_SIZ |
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LDR_IMGLOC .EQU $0000 |
|||
|
|||
MON_LOC .EQU $EE00 ; LOCATION OF MONITOR FOR RUNNING SYSTEM |
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MON_SIZ .EQU $1000 ; SIZE OF MONITOR BINARY IMAGE |
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MON_END .EQU MON_LOC + MON_SIZ ; END OF MONITOR |
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MON_IMGLOC .EQU LDR_IMGLOC + LDR_SIZ |
|||
|
|||
ZSYS_IMGLOC .EQU MON_IMGLOC + MON_SIZ |
|||
|
|||
CPM_IMGLOC .EQU ZSYS_IMGLOC + CPM_IMGSIZ |
|||
|
|||
; ROM BANK 2 |
|||
|
|||
FTH_LOC .EQU $0200 ; CAMEL FORTH |
|||
FTH_SIZ .EQU $1700 |
|||
FTH_END .EQU FTH_LOC + FTH_SIZ |
|||
FTH_IMGLOC .EQU $0000 |
|||
|
|||
BAS_LOC .EQU $0200 ; NASCOM BASIC |
|||
BAS_SIZ .EQU $2000 |
|||
BAS_END .EQU BAS_LOC + BAS_SIZ |
|||
BAS_IMGLOC .EQU FTH_IMGLOC + FTH_SIZ |
|||
|
|||
TBC_LOC .EQU $0A00 ; TASTYBASIC |
|||
TBC_SIZ .EQU $0900 |
|||
TBC_END .EQU TBC_LOC + TBC_SIZ |
|||
TBC_IMGLOC .EQU BAS_IMGLOC + BAS_SIZ |
|||
|
|||
GAM_LOC .EQU $0200 ; GAME 2048 |
|||
GAM_SIZ .EQU $0900 |
|||
GAM_END .EQU GAM_LOC + GAM_SIZ |
|||
GAM_IMGLOC .EQU TBC_IMGLOC + TBC_SIZ |
|||
|
|||
EGG_LOC .EQU $F000 ; EASTER EGG |
|||
EGG_SIZ .EQU $0200 |
|||
EGG_END .EQU EGG_LOC + EGG_SIZ |
|||
EGG_IMGLOC .EQU GAM_IMGLOC + GAM_SIZ |
|||
|
|||
NET_LOC .EQU $0100 ; NETWORK BOOT |
|||
NET_SIZ .EQU $1000 |
|||
NET_END .EQU NET_LOC + NET_SIZ |
|||
NET_IMGLOC .EQU EGG_IMGLOC + EGG_SIZ |
|||
|
|||
UPD_LOC .EQU $0200 ; ROM UPDATER |
|||
UPD_SIZ .EQU $0D00 |
|||
UPD_END .EQU UPD_LOC + UPD_SIZ |
|||
UPD_IMGLOC .EQU NET_IMGLOC + NET_SIZ |
|||
|
|||
USR_LOC .EQU $0200 ; USER |
|||
USR_SIZ .EQU BNKTOP - UPD_IMGLOC - UPD_SIZ |
|||
USR_END .EQU USR_LOC + USR_SIZ |
|||
USR_IMGLOC .EQU UPD_IMGLOC + UPD_SIZ |
|||
|
|||
MON_DSKY .EQU MON_LOC + (0 * 3) ; MONITOR ENTRY (DSKY) |
|||
MON_SERIAL .EQU MON_LOC + (1 * 3) ; MONITOR ENTRY (SERIAL PORT) |
|||
; |
|||
; INTERRUPT MODE 2 SLOT ASSIGNMENTS |
|||
; |
|||
#IF ((INTMODE == 2) | (INTMODE == 3)) |
|||
|
|||
#IF ((CPUFAM == CPU_Z180) | (CPUFAM == CPU_Z280)) |
|||
|
|||
; Z180-BASED SYSTEMS |
|||
|
|||
INT_INT1 .EQU 0 ; Z180 INT 1 |
|||
INT_INT2 .EQU 1 ; Z180 INT 2 |
|||
INT_TIM0 .EQU 2 ; Z180 TIMER 0 |
|||
INT_TIM1 .EQU 3 ; Z180 TIMER 1 |
|||
INT_DMA0 .EQU 4 ; Z180 DMA 0 |
|||
INT_DMA1 .EQU 5 ; Z180 DMA 1 |
|||
INT_CSIO .EQU 6 ; Z180 CSIO |
|||
INT_SER0 .EQU 7 ; Z180 SERIAL 0 |
|||
INT_SER1 .EQU 8 ; Z180 SERIAL 0 |
|||
INT_PIO0A .EQU 9 ; ZILOG PIO 0, CHANNEL A |
|||
INT_PIO0B .EQU 10 ; ZILOG PIO 0, CHANNEL B |
|||
INT_PIO1A .EQU 11 ; ZILOG PIO 1, CHANNEL A |
|||
INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B |
|||
INT_SIO0 .EQU 13 ; ZILOG SIO 0, CHANNEL A & B |
|||
INT_SIO1 .EQU 14 ; ZILOG SIO 1, CHANNEL A & B |
|||
|
|||
#ELSE |
|||
|
|||
; Z80-BASED SYSTEMS |
|||
|
|||
INT_CTC0A .EQU 0 ; ZILOG CTC 0, CHANNEL A |
|||
INT_CTC0B .EQU 1 ; ZILOG CTC 0, CHANNEL B |
|||
INT_CTC0C .EQU 2 ; ZILOG CTC 0, CHANNEL C |
|||
INT_CTC0D .EQU 3 ; ZILOG CTC 0, CHANNEL D |
|||
INT_UART0 .EQU 4 ; MBC UART 0 |
|||
INT_UART1 .EQU 5 ; MBC UART 1 |
|||
INT_SIO0 .EQU 7 ; ZILOG SIO 0, CHANNEL A & B |
|||
INT_SIO1 .EQU 8 ; ZILOG SIO 1, CHANNEL A & B |
|||
INT_PIO0A .EQU 9 ; ZILOG PIO 0, CHANNEL A |
|||
INT_PIO0B .EQU 10 ; ZILOG PIO 0, CHANNEL B |
|||
INT_PIO1A .EQU 11 ; ZILOG PIO 1, CHANNEL A |
|||
INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B |
|||
|
|||
#ENDIF |
|||
|
|||
#DEFINE IVT(INTX) HB_IVT+(INTX * 4)+1 |
|||
#DEFINE VEC(INTX) INTX*2 |
|||
|
|||
#ENDIF |
|||
|
|||
; SET DEFAULT CSIO SPEED (INTERNAL CLOCK, SLOW AS POSSIBLE) |
|||
; DIV 1280, 14KHZ @ 18MHZ CLK |
|||
|
|||
#IF (BIOS == BIOS_WBW) |
|||
#IF (CPUFAM == CPU_Z180) |
|||
Z180_CNTR_DEF .EQU $06 ; DEFAULT VALUE FOR Z180 CSIO CONFIG |
|||
#ENDIF |
|||
#ENDIF |
|||
|
|||
; |
|||
; HELPER MACROS |
|||
; |
|||
#DEFINE PRTC(C) CALL PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X') |
|||
#DEFINE PRTS(S) CALL PRTSTRD \ .TEXT S ; PRINT STRING S TO CONSOLE - PRTD("HELLO") |
|||
#DEFINE PRTX(X) CALL PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO) |
|||
#DEFINE DEBUG(S) CALL PRTSTRD \ .TEXT S \ .TEXT "$" ; $$$$$$ PRINT STRING S TO CONSOLE - PRTD("HELLO") - NO TRAILING $ REQUIRED |
|||
; |
|||
#DEFINE XIO_PRTC(C) CALL XIO_PRTCH \ .DB C ; PRINT CHARACTER C TO CONSOLE - PRTC('X') |
|||
#DEFINE XIO_PRTS(S) CALL XIO_PRTSTRD \ .DB S ; PRINT STRING S TO CONSOLE - PRTD("HELLO") |
|||
#DEFINE XIO_PRTX(X) CALL XIO_PRTSTRI \ .DW X ; PRINT STRING AT ADDRESS X TO CONSOLE - PRTI(STR_HELLO) |
|||
@ -1,5 +0,0 @@ |
|||
#DEFINE RMJ 3 |
|||
#DEFINE RMN 1 |
|||
#DEFINE RUP 1 |
|||
#DEFINE RTP 0 |
|||
#DEFINE BIOSVER "3.1.1-pre.128" |
|||
Loading…
Reference in new issue