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updates to dev

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This commit is contained in:
Phillip Stevens
2021-02-09 17:30:49 +11:00
parent 7ceaa06800 2ac9f33be7
commit 0d26818e81
256 changed files with 20800 additions and 5537 deletions
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47
Source/Apps/Assign.asm
View File

@@ -22,7 +22,11 @@
; 2016-04-08 [WBW] Determine key memory addresses dynamically
; 2019-08-07 [WBW] Fixed DPB selection error
; 2019-11-17 [WBW] Added preliminary CP/M 3 support
; 2019-12-24 [WBW] Fixed location of BIOS save area
; 2019-12-24 [WBW] Fixed location of BIOS save area\
; 2020-04-29 [WBW] Updated for larger DPH (16 -> 20 bytes)
; 2020-05-06 [WBW] Add patch level to version compare
; 2020-05-10 [WBW] Set media change flag in XDPH for CP/M 3
; 2020-05-12 [WBW] Back out media change flag
;_______________________________________________________________________________
;
; ToDo:
@@ -41,8 +45,7 @@ bdos .equ $0005 ; BDOS invocation vector
;
stamp .equ $40 ; loc of RomWBW CBIOS zero page stamp
;
rmj .equ 3 ; CBIOS version - major
rmn .equ 1 ; CBIOS version - minor
#include "../ver.inc"
;
;===============================================================================
; Code Section
@@ -118,10 +121,14 @@ init:
jp nz,errinv ; abort with invalid config block
inc hl ; next byte (major/minor version)
ld a,(hl) ; load it
cp rmj << 4 | rmn ; match?
cp RMJ << 4 | RMN ; match?
jp nz,errver ; abort with invalid os version
inc hl ; bump past
inc hl ; ... version info
inc hl ; next byte (update/patch)
ld a,(hl) ; load it
and $F0 ; eliminate patch num
cp RUP << 4 ; match?
jp nz,errver ; abort with invalid os version
inc hl ; bump past version info
;
; dereference HL to point to CBIOS extension data
ld a,(hl) ; dereference HL
@@ -546,7 +553,8 @@ dph_init2:
ld a,(hl) ; unit to A
push bc ; save loop control
push hl ; save drive map pointer
ld hl,16 ; size of a DPH structure
;ld hl,16 ; size of a DPH structure
ld hl,20 ; size of a DPH structure
call alloc ; allocate space for dph
jp c,instovf ; handle overflow error
push hl ; save DPH location
@@ -771,6 +779,10 @@ instc2:
inc hl ; bump to slice field of DPH field
ld a,(de) ; get slice from mapwrk
ld (hl),a ; put slice into DPH field
; ld a,11 ; media byte is 11 bytes ahead
; call addhl ; bump HL to media byte adr
; or $FF ; use $FF to signify media change
; ld (hl),a ; set media flag byte
inc de ; bump to next mapwrk entry
inc de ; ...
inc de ; ...
@@ -781,7 +793,7 @@ instc3:
push hl ; save drvtbl entry adr
push de ; save mapwrk entry adr
ld hl,(dphadr) ; get cur dph address
ld de,$23 ; size of xdph
ld de,$27 ; size of xdph
add hl,de ; bump to next dph
ld (dphadr),hl ; save it
pop de ; recover mapwrk entry adr
@@ -794,6 +806,16 @@ instc3:
add hl,de ; HL := SELMEM func
ld a,1 ; bank 1 is tpa bank
call jphl
;
; set SCB drive door open flag
ld a,$54 ; SCB drive door opened flag
ld (scboff),a ; set offset parm
or $FF ; SCB operation, $FF = set
ld (scbop),a ; set operation parm
ld (scbval),a ; set value parm to $FF
ld c,$31 ; get/set system control block
ld de,scbpb ; scb parameter block adr
call bdos
;
call drvrst ; perform BDOS drive reset
;
@@ -1822,6 +1844,11 @@ heaplim .dw 0 ; heap limit address
;
dirbuf .dw 0 ; directory buffer location
;
scbpb: ; BDOS SCB get/set parm block
scboff .db $54 ; media open door flag
scbop .db $FF ; set a byte
scbval .dw $FF ; value to set
;
mapwrk .fill (4 * 16),$FF ; working copy of drive map
;
devtbl: ; device table
@@ -1866,10 +1893,10 @@ stack .equ $ ; stack top
; Messages
;
indent .db " ",0
msgban1 .db "ASSIGN v1.1a for RomWBW CP/M, 24-Dec-2019",0
msgban1 .db "ASSIGN v1.4 for RomWBW CP/M, 12-May-2020",0
msghb .db " (HBIOS Mode)",0
msgub .db " (UBIOS Mode)",0
msgban2 .db "Copyright 2019, Wayne Warthen, GNU GPL v3",0
msgban2 .db "Copyright 2020, Wayne Warthen, GNU GPL v3",0
msguse .db "Usage: ASSIGN D:[=[{D:|<device>[<unitnum>]:[<slicenum>]}]][,...]",13,10
.db " ex. ASSIGN (display all active assignments)",13,10
.db " ASSIGN /? (display version and usage)",13,10

44
Source/Apps/FDU/FDU.asm
View File

@@ -45,6 +45,8 @@
; - USE EOT=R TO END R/W AFTER ONE SECTOR INSTEAD
; OF USING PULSE TC
; 2020-01-05: V5.4 ADDED SUPPORT FOR DYNO FDC
; 2020-04-29: v5.5 ADDED SUPPORT FOR ETCHED PIXELS FDC
; 2020-12-12: v5.6 UPDATED SMALLZ80 TO NEW I/O ADDRESSES
;
;_______________________________________________________________________________
;
@@ -79,6 +81,7 @@ FDC_RCSMC .EQU 6
FDC_RCWDC .EQU 7
FDC_SMZ80 .EQU 8
FDC_DYNO .EQU 9
FDC_EPFDC .EQU 10
;
; FDC MODE
;
@@ -213,7 +216,7 @@ INIT5:
XOR A
RET
STR_BANNER .DB "Floppy Disk Utility (FDU) v5.4, 05-jAN-2020$"
STR_BANNER .DB "Floppy Disk Utility (FDU) v5.6, 12-Dec-2020$"
STR_BANNER2 .DB "Copyright (C) 2020, Wayne Warthen, GNU GPL v3","$"
STR_HBIOS .DB " [HBIOS]$"
STR_UBIOS .DB " [UBIOS]$"
@@ -284,6 +287,7 @@ FDCTBL: ; LABEL CONFIG DATA
.DW STR_RCWDC, CFG_RCWDC
.DW STR_SMZ80, CFG_SMZ80
.DW STR_DYNO, CFG_DYNO
.DW STR_EPFDC, CFG_EPFDC
FDCCNT .EQU ($-FDCTBL)/4 ; FD CONTROLLER COUNT
;
; FDC LABEL STRINGS
@@ -298,6 +302,7 @@ STR_RCSMC .TEXT "RC-SMC$"
STR_RCWDC .TEXT "RC-WDC$"
STR_SMZ80 .TEXT "SMZ80$"
STR_DYNO .TEXT "DYNO$"
STR_EPFDC .TEXT "EPFDC$"
;
; FDC CONFIGURATION BLOCKS
;
@@ -398,11 +403,11 @@ CFG_RCWDC:
.DB _PCAT ; MODE=
;
CFG_SMZ80:
.DB 044H ; FDC MAIN STATUS REGISTER
.DB 045H ; FDC DATA PORT
.DB 074H ; FDC MAIN STATUS REGISTER
.DB 075H ; FDC DATA PORT
.DB 0FFH ; DATA INPUT REGISTER
.DB 042H ; DIGITAL OUTPUT REGISTER (LATCH)
.DB 047H ; DCR
.DB 072H ; DIGITAL OUTPUT REGISTER (LATCH)
.DB 077H ; DCR
.DB 0FFH ; DACK
.DB 0FFH ; TERMINAL COUNT (W/ DACK)
.DB 0FFH ; PSEUDO DMA DATA PORT
@@ -419,6 +424,17 @@ CFG_DYNO:
.DB 0FFH ; PSEUDO DMA DATA PORT
.DB _PCAT ; MODE=
;
CFG_EPFDC:
.DB 048H ; FDC MAIN STATUS REGISTER
.DB 049H ; FDC DATA PORT
.DB 0FFH ; DATA INPUT REGISTER
.DB 04AH ; DIGITAL OUTPUT REGISTER (LATCH)
.DB 04BH ; DCR
.DB 0FFH ; DACK
.DB 04CH ; TERMINAL COUNT (W/ DACK)
.DB 0FFH ; PSEUDO DMA DATA PORT
.DB _PCAT ; MODE=
;
FDCID .DB 0 ; FDC IDENTIFIER (0 INDEXED)
FDCBM .DB 0 ; FDC ID BITMAP
FDCLBL .DW 0 ; POINTER TO ACTIVE FDC LABEL STRING
@@ -437,6 +453,7 @@ FSS_MENU:
.TEXT " (H) RC2014 WDC (SMB)\r\n"
.TEXT " (I) SmallZ80 Expansion\r\n"
.TEXT " (J) Dyno-Card FDC, D1030\r\n"
.TEXT " (K) RC2014 EPFDC\r\n"
.TEXT " (X) Exit\r\n"
.TEXT "=== OPTION ===> $\r\n"
;
@@ -1517,6 +1534,7 @@ MD_MAP:
.DB %00000001 ; RCWDC POLL
.DB %00000001 ; SMZ80 POLL
.DB %00000001 ; DYNO POLL
.DB %00000001 ; EPFDC POLL
;
; MEDIA DESCRIPTION BLOCK
;
@@ -1877,7 +1895,7 @@ FM_DRAW0B: ; ZETA, DIO3
LD A,(FST_DOR)
AND 00000010B
JR FM_DRAW1
FM_DRAW0C: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO
FM_DRAW0C: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO, EPFDC
LD A,(FST_DOR)
AND 11110000B
JR FM_DRAW1
@@ -2030,7 +2048,7 @@ FM_MOTOR0B: ; ZETA, DIO3
LD A,(FST_DOR)
AND 00000010B
JR FM_MOTOR1
FM_MOTOR0C: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO
FM_MOTOR0C: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO, EPFDC
LD A,(FST_DOR)
AND 11110000B
JR FM_MOTOR1
@@ -2769,7 +2787,7 @@ FC_INIT1: ; DIO
FC_INIT2: ; ZETA, DIO3
LD A,(FCD_DORB)
JR FC_INIT5
FC_INIT3: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO
FC_INIT3: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO, EPFDC
LD A,(FCD_DORC)
JR FC_INIT5
FC_INIT4: ; WDSMC
@@ -2813,7 +2831,7 @@ FC_RESETFDC1: ; ZETA, DIO3, RCSMC
POP AF
OUT (C),A
JR FC_RESETFDC3
FC_RESETFDC2: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO
FC_RESETFDC2: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO, EPFDC
LD A,0
OUT (C),A
LD A,(FST_DOR)
@@ -2840,7 +2858,7 @@ FC_PULSETC:
;RES 0,A
;OUT (C),A
;JR FC_PULSETC2
;FC_PULSETC1: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO
;FC_PULSETC1: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO, EPFDC
;LD C,(IY+CFG_TC)
;IN A,(C)
;JR FC_PULSETC2
@@ -2872,7 +2890,7 @@ FC_MOTORON2: ; ZETA, DIO3
LD HL,FST_DOR ; POINT TO FDC_DOR
SET 1,(HL)
JR FC_MOTORON5
FC_MOTORON3: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO
FC_MOTORON3: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO, EPFDC
LD HL,FST_DOR ; POINT TO FDC_DOR
LD A,(HL) ; START WITH CURRENT DOR
AND 11111100B ; GET RID OF ANY ACTIVE DS BITS
@@ -2936,7 +2954,7 @@ FC_MOTOROFF2: ; ZETA, DIO3
LD HL,FST_DOR ; POINT TO FDC_DOR
RES 1,(HL)
JR FC_MOTOROFF5
FC_MOTOROFF3: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO
FC_MOTOROFF3: ; DIDE, N8, ZETA2, RCWDC, SMZ80, DYNO, EPFDC
LD HL,FST_DOR ; POINT TO FDC_DOR
LD A,DORC_INIT
LD (HL),A
@@ -3806,7 +3824,7 @@ DORB_BR500 .EQU 10100000B ; 500KBPS
;
DORB_INIT .EQU DORB_BR250
;
; *** DIDE/N8/ZETA2/RCWDC/SMZ80/DYNO ***
; *** DIDE/N8/ZETA2/RCWDC/SMZ80/DYNO/EPFDC ***
;
DORC_INIT .EQU 00001100B ; SOFT RESET INACTIVE, DMA ENABLED
;

8
Source/Apps/FDU/FDU.txt
View File

@@ -510,5 +510,11 @@ WW 9/5/2018: v5.3
operation.
- Added support for SmallZ80
WW 5/1/2020: v5.4
WW 1/5/2020: v5.4
- Added support for Dyno (based on work by Steve Garcia)
WW 4/29/2020: v5.5
- Added support for Etched Pixels FDC
WW 12/12/2020: v5.6
- Updated SmallZ80 support for new I/O map

29
Source/Apps/RTC.asm
View File

@@ -25,6 +25,8 @@
;
;[2020/02/02] v1.5 PMS Basic command line support
;
;[2020/05/15] v1.6 Added Warm Start option
;
; Constants
;
mask_data .EQU %10000000 ; RTC data line
@@ -43,8 +45,14 @@ PORT_EZZ80 .EQU $C0 ; RTC port for EZZ80 (actually does not have one!!!)
BDOS .EQU 5 ; BDOS invocation vector
FCB .EQU 05CH ; Start of command line
BID_BOOT .EQU $00
HB_BNKCALL .EQU $FFF9
;BID_BOOT .EQU $00
;HB_BNKCALL .EQU $FFF9
BF_SYSRESET .EQU $F0 ; RESTART SYSTEM
BF_SYSRES_INT .EQU $00 ; RESET HBIOS INTERNAL
BF_SYSRES_WARM .EQU $01 ; WARM START (RESTART BOOT LOADER)
BF_SYSRES_COLD .EQU $02 ; COLD START
;
; Program
@@ -1273,6 +1281,9 @@ RTC_UCL:
CP 'B'
JP Z,RTC_TOP_LOOP_BOOT
CP 'W'
JP Z,RTC_TOP_LOOP_WARMSTART
CP 'C'
JP Z,RTC_TOP_LOOP_CHARGE
@@ -1320,9 +1331,15 @@ DELAY_LOOP: ; LOOP IS 26TS
OR L ; 4TS
JR NZ,DELAY_LOOP ; 12TS
; RESTART SYSTEM FROM ROM BANK 0, ADDRESS $0000
LD A,BID_BOOT ; BOOT BANK
LD HL,0 ; ADDRESS ZERO
CALL HB_BNKCALL ; DOES NOT RETURN
LD B,BF_SYSRESET ; SYSTEM RESTART
LD C,BF_SYSRES_COLD ; COLD START
CALL $FFF0 ; CALL HBIOS
RTC_TOP_LOOP_WARMSTART:
LD B,BF_SYSRESET ; SYSTEM RESTART
LD C,BF_SYSRES_WARM ; WARM START
CALL $FFF0 ; CALL HBIOS
RTC_TOP_LOOP_CHARGE:
LD DE,RTC_TOP_LOOP1_CHARGE
@@ -1580,7 +1597,7 @@ RTC_HELP_MSG:
.DB 0Ah, 0Dh ; line feed and carriage return
.TEXT "RTC: Version 1.5"
.DB 0Ah, 0Dh ; line feed and carriage return
.TEXT "Commands: E)xit T)ime st(A)rt S)et R)aw L)oop C)harge N)ocharge D)elay I)nit G)et P)ut B)oot H)elp"
.TEXT "Commands: E)xit T)ime st(A)rt S)et R)aw L)oop C)harge N)ocharge D)elay I)nit G)et P)ut B)oot W)arm-start H)elp"
.DB 0Ah, 0Dh ; line feed and carriage return
.DB "$" ; Line terminator

8
Source/Apps/Survey.asm
View File

@@ -600,9 +600,11 @@ PORTLP:
mov c,a ; port number to reg c
mvi b,0 ; for 16 bit port addressing
db 0edh,078h ; z80: in a,(c)
; inactive port could return 0xFF or 0x78
CPI 0FFH
JZ NEXTPT
; inactive port could return 0xFF or 0x78 or the port address
cmp c
jz nextpt
cpi 0FFh
jz nextpt
cpi 078h
jz nextpt
ISPORT:

13
Source/Apps/SysCopy.asm
View File

@@ -17,6 +17,7 @@
; Change Log:
; 2016-04-24 [WBW] Updated to preserve MBR partition table
; 2020-02-17 [WBW] Updated for CP/M 3
; 2020-05-16 [WBW] Fixed SPT for CP/M 3
;_______________________________________________________________________________
;
; ToDo:
@@ -441,6 +442,16 @@ setdsk:
ld c,(hl)
inc hl
ld b,(hl) ; BC := sectors per track
; handle CP/M 3 physical sector size
ld a,(v3os) ; CP/M 3 or greater?
or a ; set flags
jr z,setdsk1 ; if not, continue
; adjust SPT for CP/M 3 physical sector size
srl b ; divide SPT by 4
rr c
srl b
rr c
setdsk1:
ld (actspt),bc ; save it
; ensure there are system tracks (verify that offset field in DPB is not zero)
ld de,12 ; offset field is 12 bytes into DPB
@@ -952,7 +963,7 @@ bpb_hl .dw 0 ; reg HL
;
; Messages
;
msgban1 .db "SYSCOPY v2.0 for RomWBW CP/M, 17-Feb-2020$"
msgban1 .db "SYSCOPY v2.1 for RomWBW CP/M, 15-May-2020$"
msgv2 .db " (CP/M 2 Mode)$"
msgv3 .db " (CP/M 3 Mode)$"
msgban2 .db "Copyright 2020, Wayne Warthen, GNU GPL v3$"

12
Source/Apps/Timer.asm
View File

@@ -41,8 +41,11 @@ rmn .equ 1 ; intended CBIOS version - minor
;
bf_sysver .equ $F1 ; BIOS: VER function
bf_sysget .equ $F8 ; HBIOS: SYSGET function
bf_sysset .equ $F9 ; HBIOS: SYSGET function
bf_sysgettimer .equ $D0 ; TIMER subfunction
bf_syssettimer .equ $D0 ; TIMER subfunction
bf_sysgetsecs .equ $D1 ; SECONDS subfunction
bf_syssetsecs .equ $D1 ; SECONDS subfunction
;
;===============================================================================
; Code Section
@@ -106,6 +109,15 @@ process00:
jr process00 ; continue looking for options
;
process0:
;
; Test of API function to set seconds value
;ld b,bf_sysset ; HBIOS SYSGET function
;ld c,bf_syssetsecs ; SECONDS subfunction
;ld de,0 ; set seconds value
;ld hl,1000 ; ... to 1000
;rst 08 ; call HBIOS, DE:HL := seconds value
;
; get and print seconds value
call crlf2 ; formatting
;
process1:

6
Source/Apps/Tune/Build.cmd
View File

@@ -5,9 +5,11 @@ set TOOLS=../../../Tools
set PATH=%TOOLS%\tasm32;%PATH%
set TASMTABS=%TOOLS%\tasm32
tasm -t180 -g3 -fFF Tune.asm Tune.com Tune.lst
tasm -t180 -g3 -fFF -dWBW Tune.asm Tune.com Tune.lst
tasm -t180 -g3 -fFF -dZX Tune.asm Tunezx.com Tunezx.lst
tasm -t180 -g3 -fFF -dMSX Tune.asm Tunemsx.com Tunemsx.lst
if errorlevel 1 goto :eof
copy /Y Tune.com ..\..\..\Binary\Apps\
copy /Y Tune*.com ..\..\..\Binary\Apps\
copy /Y Tunes\*.* ..\..\..\Binary\Apps\Tunes\

14
Source/Apps/Tune/Makefile
View File

@@ -1,11 +1,19 @@
OBJECTS = Tune.com
OBJECTS = Tune.com Tunezx.com Tunemsx.com
DEST = ../../../Binary/Apps
TOOLS = ../../../Tools
include $(TOOLS)/Makefile.inc
Tune.com: Tune.asm
$(TASM) Tune.asm Tune.com
DEPS := Tune.asm $(shell find . -name '*.inc')
Tune.com: $(DEPS)
$(TASM) -dWBW Tune.asm Tune.com Tune.lst
Tunezx.com: $(DEPS)
$(TASM) -dZX Tune.asm Tunezx.com Tunezx.lst
Tunemsx.com: $(DEPS)
$(TASM) -dMSX Tune.asm Tunemsx.com Tunemsx.lst
all::
mkdir -p $(DEST)/Tunes

711
Source/Apps/Tune/Tune.asm
View File

@@ -39,6 +39,9 @@
; 2019-11-21 [WBW] Added table-driven configuration
; 2020-02-11 [WBW] Made hardware config & detection more flexible
; 2020-03-29 [WBW] Fix error in Z180 I/O W/S bracketing
; 2020-04-25 [DEN] Added support to use HBIOS Sound driver
; 2020-05-02 [PMS] Add support for SBC-V2 slow-io hack
; 2020-09-03 [E?B] Add support for Ed Brindley YM/AY Sound Card v6
;_______________________________________________________________________________
;
; ToDo:
@@ -49,18 +52,9 @@
; Main program
;===============================================================================
;
RESTART .EQU $0000 ; CP/M restart vector
BDOS .EQU $0005 ; BDOS invocation vector
;
IDENT .EQU $FFFE ; loc of RomWBW HBIOS ident ptr
;
RMJ .EQU 3 ; intended CBIOS version - major
RMN .EQU 1 ; intended CBIOS version - minor
;
BF_SYSVER .EQU $F1 ; BIOS: VER function
BF_SYSGET .EQU $F8 ; HBIOS: SYSGET function
;
FCB .EQU $5C ; Location of default FCB
#include "hbios.inc"
#include "cpm.inc"
#include "tune.inc"
;
HEAPEND .EQU $C000 ; End of heap storage
;
@@ -68,24 +62,58 @@ TYPPT2 .EQU 1 ; FILTYP value for PT2 sound file
TYPPT3 .EQU 2 ; FILTYP value for PT3 sound file
TYPMYM .EQU 3 ; FILTYP value for MYM sound file
;
; HIGH SPEED CPU CONTROL
;
SBCV2004 .EQU 0 ; USE SBC-V2-004 HALF CLOCK DIVIDER
CPUFAMZ180 .EQU 1 ; USE Z180 WAIT STATE MANAGEMENT
;
;Conditional assembly - use -D switch on TASM or uz80as assembler to control
_ZX .EQU 0 ; 1) Version of ROUT (ZX or MSX standards)
_MSX .EQU 0
_WBW .EQU 0
HBIOS .EQU 0
#IFDEF ZX
_ZX .SET 1
#ELSE
#IFDEF MSX
_MSX .SET 1
#ELSE
_WBW .SET 1
#ENDIF
#ENDIF
CurPosCounter .EQU 0 ; 2) Current position counter at (START+11)
ACBBAC .EQU 0 ; 3) Allow channels allocation bits at (START+10)
LoopChecker .EQU 1 ; 4) Allow loop checking and disabling
Id .EQU 1 ; 5) Insert official identificator
#DEFINE Release "1" ; Release number
.ORG $0100
;
CALL CRLF
LD DE,MSGBAN ; Point to banner message
CALL PRTSTR ; Print message
;
; Check BIOS and version
PRTCRLF
PRTSTRDE(MSGBAN) ; Print to banner message
CALL CLI_ABRT_IF_OPT_FIRST
CALL CLI_HAVE_HBIOS_SWITCH
CALL CLI_OCTAVE_ADJST
JP CONTINUE
CONTINUE:
; Check BIOS and version
CALL IDBIO ; Identify hardware BIOS
CP 1 ; RomWBW HBIOS?
JP NZ,ERRBIO ; If not, handle BIOS error
LD A,RMJ << 4 | RMN ; Expected HBIOS ver
JP NZ, ERRBIO ; If not, handle BIOS error
LD A, RMJ << 4 | RMN ; Expected HBIOS ver
CP D ; Compare with result above
JP NZ,ERRBIO ; Handle BIOS error
LD A,L ; Platform id to A
JP NZ, ERRBIO ; Handle BIOS error
LD A, L ; Platform id to A
LD (CURPLT),A ; Save as current platform id
;
LD A, (HBIOSMD)
OR A
JR NZ, TSTTIMER ; skip hardware check if using hbios
LD HL,CFGTBL ; Point to start of config table
CFGSEL:
LD A,$FF ; End of table marker
@@ -111,7 +139,7 @@ CFGSEL:
LD C,A ; Put in C for I/O
LD A,$FF ; Value to activate card
OUT (C),A ; Write value to ACR
;
;
PROBE:
; Test for hardware (sound chip detection)
LD DE,(PORTS) ; D := RDAT, E := RSEL
@@ -137,21 +165,9 @@ MAT:
LD DE,(DESC) ; Load hardware description pointer
CALL PRTSTR ; Print description
;
; Test for timer running to determine if it can be used for delay
LD B,BF_SYSGET ; HBIOS: GET function
LD C,$D0 ; TIMER subfunction
RST 08 ; DE:HL := current tick count
LD A,L ; DE:HL == 0?
OR H
OR E
OR D
LD A,0 ; Assume no timer
LD DE,MSGDLY ; Delay mode msg
JR Z,SETDLY ; If tick count is zero, no timer active
LD A,$FF ; Value for timer active
LD DE,MSGTIM ; Timer mode msg
SETDLY:
LD (WMOD),A ; Save wait mode
TSTTIMER:
CALL PROBETIMER
CALL PRTSTR ; Print it
;
; Get CPU speed & type from RomWBW HBIOS and compute quark delay factor
@@ -170,7 +186,7 @@ SETDLY:
LD DE,HEAP+1 ; Set dest to next byte
LD BC,HEAPEND-HEAP-1 ; Size of heap except first byte
LDIR ; Propagate zero to rest of heap
;
;
; Check sound filename (must be *.PT2, *.PT3, or *.MYM)
LD A,(FCB+1) ; Get first char of filename
CP ' ' ; Compare to blank
@@ -179,7 +195,7 @@ SETDLY:
CP ' ' ; is blanks
JR NZ,HASEXT ; then assume
LD A,'P' ; type PT3.
LD (FCB+9),A
LD (FCB+9),A
LD A,'T' ; Fill in
LD (FCB+10),A ; the file
LD A,'3' ; extension
@@ -214,13 +230,15 @@ CHKMYM LD A,(FCB+9) ; Extension char 1
_SET LD A,C ; Get file type value
LD (FILTYP),A ; Save file type value
;
CALL CLI_ABRT_UNSUPPFILTYP
; Load sound file
_LD0 LD C,15 ; CPM Open File function
LD DE,FCB ; FCB
CALL BDOS ; Do it
INC A ; Test for error $FF
JP Z,ERRFIL ; Handle file error
;
;
LD A,(FILTYP) ; Get file type
LD HL,MDLADDR ; Assume load address
LD (DMA),HL ; ... for PTx files
@@ -240,22 +258,22 @@ _LD LD HL,(DMA) ; Get load address
POP DE ; Restore current DMA to DE
LD C,26 ; CPM Set DMA function
CALL BDOS ; Read next 128 bytes
;
;
LD C,20 ; CPM Read Sequential function
LD DE,FCB ; FCB
CALL BDOS ; Read next 128 bytes
OR A ; Set flags to check EOF
JR NZ,_LDX ; Non-zero is EOF
JR Z,_LD ; Load loop
;
;
_LDX LD C,16 ; CPM Close File function
LD DE,FCB ; FCB
CALL BDOS ; Do it
;
; Play loop
CALL CRLF2 ; Formatting
LD DE,MSGPLY ; Playing message
CALL PRTSTR ; Print message
;
; Play loop
; CALL CRLF2 ; Formatting
; LD DE,MSGPLY ; Playing message
; CALL PRTSTR ; Print message
;CALL CRLF2 ; Formatting
;CALL SLOWCPU
LD A,(FILTYP) ; Get file type
@@ -278,7 +296,29 @@ GOPT3 LD A,0 ; SETUP value to PT3 sound files
LD DE,185 ; Avg TS / quark = 7400, so 185 delay loops
JR GOPTX ; Play PTx file
GOPTX LD HL,(QDLY) ; Get basic quark delay
GOPTX
CALL CRLF2
LD DE, MSGSONGNAME ; Print song name message
CALL PRTSTR
LD DE, MDLADDR + $1E ; Print 32 character long song name from module
LD B, $20
GOPTX1 LD A,(DE)
CALL PRTCHR
INC DE
DJNZ GOPTX1
CALL CRLF
LD DE, MSGARTIST ; Print "by" message
CALL PRTSTR
LD DE, MDLADDR + $42 ; Print 32 character long composer/artist from module
LD B, $20
GOPTX2 LD A,(DE)
CALL PRTCHR
INC DE
DJNZ GOPTX2
CALL CRLF2 ; Formatting
LD DE,MSGPLY ; Playing message
CALL PRTSTR ; Print message
LD HL,(QDLY) ; Get basic quark delay
OR A ; Clear carry
SBC HL,DE ; Adjust for file type
LD (QDLY),HL ; Save updated quark delay factor
@@ -296,7 +336,11 @@ PTXLP CALL START+5 ; Play one quark
CALL WAITQ ; Wait one quark period
JR PTXLP ; Loop for next quark
;
gomym ld hl,(QDLY) ; Get basic quark delay
gomym
CALL CRLF2 ; Formatting
LD DE,MSGPLY ; Playing message
CALL PRTSTR ; Print message
ld hl,(QDLY) ; Get basic quark delay
or a ; Clear carry
ld de,125 ; Avg TS / quark = ~5000, so 125 delay loops
sbc hl,de ; Adjust for file type
@@ -319,7 +363,7 @@ waitvb call WAITQ
ld (played),a
;call PRTDOT
jr mymlp
;
;
EXIT CALL START+8 ; Mute audio
;CALL NORMCPU
;CALL CRLF2 ; Formatting
@@ -327,43 +371,12 @@ EXIT CALL START+8 ; Mute audio
CALL PRTSTR ; Print message
CALL CRLF ; Formatting
JP 0 ; Exit the easy way
;
; Wait for quark play time. Can use hardware timer if
; supported by hardware or simple delay loop otherwise.
; Delay loop requires QDLY to be pre-set to to achieve
; optimal 20ms wait time.
;
WAITQ LD A,(WMOD) ; Get delay mode
OR A ; Set flags
JR Z,DLY ; Delay mode
;
; Timer loop
CALL TIM2 ; Read timer LSB into A
LD C,A ; Init prev value
TIM1 PUSH BC ; Save prev value
CALL TIM2 ; Read timer LSB into A
POP BC ; Recover prev value
CP C ; Compare to prev
RET NZ ; Done if changed
JR TIM1 ; Else, loop
;
TIM2 LD B,$F8 ; BIOS SYSGET function
LD C,$D0 ; TIMER sub-function
RST 08 ; Call BIOS
LD A,L ; MSB to A
RET ; Return to loop
;
; Delay spin loop (40 tstates per loop)
DLY LD BC,(QDLY) ; Load quark delay factor
DLY1 DEC BC ; [6]
NOP ; [4]
NOP ; [4]
NOP ; [4]
NOP ; [4]
LD A,B ; [4]
OR C ; [4]
JP NZ,DLY1 ; [10]
RET
#include "timing.inc"
#include "strings.inc"
#include "cli.inc"
#include "printing.inc"
;
; Get a keystroke from CPM
;
@@ -410,7 +423,7 @@ IDBIO1:
LD B,BF_SYSVER ; HBIOS: VER function
LD C,0 ; required reserved value
RST 08 ; DE := version, L := platform id
;
;
LD A,1 ; HBIOS BIOS id = 1
RET ; and done
;
@@ -421,43 +434,44 @@ IDBIO2:
;
;
;
SLOWCPU:
LD A,(Z180) ; Z180 base I/O port
CP $FF ; Check for no value
RET Z ; Bail out if no value
ADD A,$1E ; Apply offset of CMR register
LD C,A ; And put it in C
LD B,0 ; MSB for 16-bit I/O
IN A,(C) ; Get current value
LD (CMRSAV),A ; Save it to restore later
XOR A ; Go slow
OUT (C),A ; And update CMR
INC C ; Now point to CCR register
IN A,(C) ; Get current value
LD (CCRSAV),A ; Save it to restore later
XOR A ; Go slow
OUT (C),A ; And update CCR
RET
;SLOWCPU:
; LD A,(Z180) ; Z180 base I/O port
; CP $FF ; Check for no value
; RET Z ; Bail out if no value
; ADD A,$1E ; Apply offset of CMR register
; LD C,A ; And put it in C
; LD B,0 ; MSB for 16-bit I/O
; IN A,(C) ; Get current value
; LD (CMRSAV),A ; Save it to restore later
; XOR A ; Go slow
; OUT (C),A ; And update CMR
; INC C ; Now point to CCR register
; IN A,(C) ; Get current value
; LD (CCRSAV),A ; Save it to restore later
; XOR A ; Go slow
; OUT (C),A ; And update CCR
; RET
;
;
;
NORMCPU:
LD A,(Z180) ; Z180 base I/O port
CP $FF ; Check for no value
RET Z ; Bail out if no value
ADD A,$1E ; Apply offset of CMR register
LD C,A ; And put it in C
LD B,0 ; MSB for 16-bit I/O
LD A,(CMRSAV) ; Get original CMR value
OUT (C),A ; And update CMR
INC C ; Now point to CCR register
LD A,(CCRSAV) ; Get original CCR value
OUT (C),A ; And update CCR
RET
;
;NORMCPU:
; LD A,(Z180) ; Z180 base I/O port
; CP $FF ; Check for no value
; RET Z ; Bail out if no value
; ADD A,$1E ; Apply offset of CMR register
; LD C,A ; And put it in C
; LD B,0 ; MSB for 16-bit I/O
; LD A,(CMRSAV) ; Get original CMR value
; OUT (C),A ; And update CMR
; INC C ; Now point to CCR register
; LD A,(CCRSAV) ; Get original CCR value
; OUT (C),A ; And update CCR
; RET
;
; SLOW DOWN I/O FOR FAST CPU'S
;
SLOWIO:
#IF (CPUFAMZ180)
LD A,(Z180) ; Z180 base I/O port
CP $FF ; Check for no value
RET Z ; Bail out if no value
@@ -468,11 +482,17 @@ SLOWIO:
LD (DCSAV),A ; Save it to restore later
OR %00110000 ; Force slow operation (I/O W/S=3)
OUT (C),A ; And update DCNTL
#ENDIF
#IF (SBCV2004)
LD A,8 ; sbc-v2-004 change to
OUT (112),A ; half clock speed
#ENDIF
RET
;
;
; RESTORE I/O SPEED FOR FAST CPU'S
;
NORMIO:
#IF (CPUFAMZ180)
LD A,(Z180) ; Z180 base I/O port
CP $FF ; Check for no value
RET Z ; Bail out if no value
@@ -481,190 +501,11 @@ NORMIO:
LD B,0 ; MSB for 16-bit I/O
LD A,(DCSAV) ; Get saved DCNTL value
OUT (C),A ; And restore it
RET
;
; Print character in A without destroying any registers
;
PRTCHR:
PUSH BC ; save registers
PUSH DE
PUSH HL
LD E,A ; character to print in E
LD C,$02 ; BDOS function to output a character
CALL BDOS ; do it
POP HL ; restore registers
POP DE
POP BC
RET
;
PRTDOT:
;
; shortcut to print a dot preserving all regs
PUSH AF ; save af
LD A,'.' ; load dot char
CALL PRTCHR ; print it
POP AF ; restore af
RET ; done
;
PRTCR:
;
; shortcut to print a dot preserving all regs
PUSH AF ; save af
LD A,13 ; load CR value
CALL PRTCHR ; print it
POP AF ; restore af
RET ; done
;
; Print a zero terminated string at (DE) without destroying any registers
;
PRTSTR:
PUSH DE
;
PRTSTR1:
LD A,(DE) ; get next char
OR A
JR Z,PRTSTR2
CALL PRTCHR
INC DE
JR PRTSTR1
;
PRTSTR2:
POP DE ; restore registers
RET
;
; Print the value in A in hex without destroying any registers
;
PRTHEX:
PUSH AF ; save AF
PUSH DE ; save DE
CALL HEXASCII ; convert value in A to hex chars in DE
LD A,D ; get the high order hex char
CALL PRTCHR ; print it
LD A,E ; get the low order hex char
CALL PRTCHR ; print it
POP DE ; restore DE
POP AF ; restore AF
RET ; done
;
; print the hex word value in bc
;
PRTHEXWORD:
PUSH AF
LD A,B
CALL PRTHEX
LD A,C
CALL PRTHEX
POP AF
RET
;
; print the hex dword value in de:hl
;
PRTHEX32:
PUSH BC
PUSH DE
POP BC
CALL PRTHEXWORD
PUSH HL
POP BC
CALL PRTHEXWORD
POP BC
RET
;
; Convert binary value in A to ascii hex characters in DE
;
HEXASCII:
LD D,A ; save A in D
CALL HEXCONV ; convert low nibble of A to hex
LD E,A ; save it in E
LD A,D ; get original value back
RLCA ; rotate high order nibble to low bits
RLCA
RLCA
RLCA
CALL HEXCONV ; convert nibble
LD D,A ; save it in D
RET ; done
;
; Convert low nibble of A to ascii hex
;
HEXCONV:
AND $0F ; low nibble only
ADD A,$90
DAA
ADC A,$40
DAA
RET
;
; Print value of A or HL in decimal with leading zero suppression
; Use prtdecb for A or prtdecw for HL
;
PRTDECB:
PUSH HL
LD H,0
LD L,A
CALL PRTDECW ; print it
POP HL
RET
;
PRTDECW:
PUSH AF
PUSH BC
PUSH DE
PUSH HL
CALL PRTDEC0
POP HL
POP DE
POP BC
POP AF
RET
;
PRTDEC0:
LD E,'0'
LD BC,-10000
CALL PRTDEC1
LD BC,-1000
CALL PRTDEC1
LD BC,-100
CALL PRTDEC1
LD C,-10
CALL PRTDEC1
LD E,0
LD C,-1
PRTDEC1:
LD A,'0' - 1
PRTDEC2:
INC A
ADD HL,BC
JR C,PRTDEC2
SBC HL,BC
CP E
RET Z
LD E,0
CALL PRTCHR
RET
;
; Start a new line
;
CRLF2:
CALL CRLF ; two of them
CRLF:
PUSH AF ; preserve AF
LD A,13 ; <CR>
CALL PRTCHR ; print it
LD A,10 ; <LF>
CALL PRTCHR ; print it
POP AF ; restore AF
RET
;
; ADD HL,A
;
; A REGISTER IS DESTROYED!
;
ADDHLA:
ADD A,L
LD L,A
RET NC
INC H
#ENDIF
#IF (SBCV2004)
LD A,0 ; sbc-v2-004 change to
OUT (112),A ; normal clock speed
#ENDIF
RET
;
ERRBIO: ; Invalid BIOS or version
@@ -712,34 +553,46 @@ CFGSIZ .EQU 8
CFGTBL: ; PLT RSEL RDAT RIN Z180 ACR
; DESC
.DB $01, $9A, $9B, $9A, $FF, $9C ; SBC W/ SCG
.DW HWSTR_SCG
;
.DW HWSTR_SCG
;
.DB $04, $9C, $9D, $9C, $40, $FF ; N8 W/ ONBOARD PSG
.DW HWSTR_N8
;
.DW HWSTR_N8
;
.DB $05, $9A, $9B, $9A, $40, $9C ; MK4 W/ SCG
.DW HWSTR_SCG
;
.DW HWSTR_SCG
;
.DB $07, $D8, $D0, $D8, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (EB)
.DW HWSTR_RCEB
;
.DW HWSTR_RCEB
;
.DB $07, $A0, $A1, $A2, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (EB Rev 6)
.DW HWSTR_RCEB6
;
.DB $07, $D1, $D0, $D0, $FF, $FF ; RCZ80 W/ RC SOUND MODULE (MF)
.DW HWSTR_RCMF
;
;
.DB $08, $68, $60, $68, $C0, $FF ; RCZ180 W/ RC SOUND MODULE (EB)
.DW HWSTR_RCEB
;
.DW HWSTR_RCEB
;
.DB $08, $A0, $A1, $A2, $C0, $FF ; RCZ180 W/ RC SOUND MODULE (EB Rev 6)
.DW HWSTR_RCEB6
;
.DB $08, $61, $60, $60, $C0, $FF ; RCZ180 W/ RC SOUND MODULE (MF)
.DW HWSTR_RCMF
;
.DB $09, $D8, $D0, $D8, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (EB)
.DW HWSTR_RCEB
.DW HWSTR_RCEB
;
.DB $09, $D1, $D0, $D0, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (EB)
.DB $09, $A0, $A1, $A2, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (EB Rev 6)
.DW HWSTR_RCEB6
;
.DB $09, $D1, $D0, $D0, $FF, $FF ; EZZ80 W/ RC SOUND MODULE (MF)
.DW HWSTR_RCMF
;
.DB $0A, $68, $60, $68, $C0, $FF ; SCZ180 W/ RC SOUND MODULE (EB)
.DW HWSTR_RCEB
;
.DB $0A, $A0, $A1, $A2, $C0, $FF ; SCZ180 W/ RC SOUND MODULE (EB Rev 6)
.DW HWSTR_RCEB6
;
.DB $0A, $61, $60, $60, $C0, $FF ; SCZ180 W/ RC SOUND MODULE (MF)
.DW HWSTR_RCMF
@@ -765,15 +618,17 @@ CMRSAV .DB 0 ; for saving original Z180 CMR value
;
DMA .DW 0 ; Working DMA
FILTYP .DB 0 ; Sound file type (TYPPT2, TYPPT3, TYPMYM)
;
TMP .DB 0 ; work around use of undocumented Z80
;
MSGBAN .DB "Tune Player for RomWBW v2.5, 29-Mar-2020",0
TMP .DB 0 ; work around use of undocumented Z80
HBIOSMD .DB 0 ; NON-ZERO IF USING HBIOS SOUND DRIVER, ZERO OTHERWISE
OCTAVEADJ .DB 0 ; AMOUNT TO ADJUST OCTAVE UP OR DOWN
MSGBAN .DB "Tune Player for RomWBW v3.2, 03-Sep-2020",0
MSGUSE .DB "Copyright (C) 2020, Wayne Warthen, GNU GPL v3",13,10
.DB "PTxPlayer Copyright (C) 2004-2007 S.V.Bulba",13,10
.DB "MYMPlay by Marq/Lieves!Tuore",13,10,13,10
.DB "Usage: TUNE <filename>.[PT2|PT3|MYM]",0
.DB "Usage: TUNE <filename>.[PT2|PT3|MYM] [--hbios] [+tn|-tn]",0
MSGBIO .DB "Incompatible BIOS or version, "
.DB "HBIOS v", '0' + RMJ, ".", '0' + RMN, " required",0
MSGPLT .DB "Hardware error, system not supported!",0
@@ -785,11 +640,18 @@ MSGTIM .DB ", timer mode",0
MSGDLY .DB ", delay mode",0
MSGPLY .DB "Playing...",0
MSGEND .DB " Done",0
MSGERR .DB "App Error", 0
;
HWSTR_SCG .DB "SCG ECB Board",0
HWSTR_N8 .DB "N8 Onboard Sound",0
HWSTR_RCEB .DB "RC2014 Sound Module (EB)",0
HWSTR_RCEB6 .DB "RC2014 Sound Module (EBv6)",0
HWSTR_RCMF .DB "RC2014 Sound Module (MF)",0
MSGUNSUP .db "MYM files not supported yet!\r\n", 0
MSGSONGNAME .DB "Song name: ", 0
MSGARTIST .DB "by: ", 0
;
;===============================================================================
; PTx Player Routines
@@ -799,23 +661,6 @@ HWSTR_RCMF .DB "RC2014 Sound Module (MF)",0
;(c)2004-2007 S.V.Bulba <vorobey@mail.khstu.ru>
;http://bulba.untergrund.net (http://bulba.at.kz)
;Release number
;Release .EQU "1"
#DEFINE Release "1"
;Conditional assembly
;1) Version of ROUT (ZX or MSX standards)
ZX .EQU 0
MSX .EQU 0
WBW .EQU 1
;2) Current position counter at (START+11)
CurPosCounter .EQU 0
;3) Allow channels allocation bits at (START+10)
ACBBAC .EQU 0
;4) Allow loop checking and disabling
LoopChecker .EQU 1
;5) Insert official identificator
Id .EQU 1
;Features
;--------
@@ -843,7 +688,7 @@ Id .EQU 1
;into RAM or INIT subprogram was not called before.
;Call MUTE or INIT one more time to mute sound after stopping
;playing
;playing
;ORG $C000
;Test codes (commented)
@@ -932,7 +777,9 @@ CurPos .DB 0 ;for visualization only (i.e. no need for playing)
;Identifier
.IF Id
.DB "=Uni PT2 and PT3 Player r.",Release,"="
.DB "=Uni PT2 and PT3 Player r."
.DB Release
.DB "="
.ENDIF
.IF LoopChecker
@@ -1128,7 +975,7 @@ TP_2 LD A,H
#IF CurPosCounter
LD (CurPos),A
#ENDIF
#ENDIF
LD HL,VARS
@@ -1441,7 +1288,7 @@ PD_VOL RRCA
RRCA
LD (IX-12+Volume),A
JR PD_LP2
PD_EOff LD (IX-12+Env_En),A
LD (IX-12+PsInOr),A
JR PD_LP2
@@ -1660,7 +1507,7 @@ C_DELAY LD A,(BC)
INC BC
LD (Delay),A
RET
SETENV LD (IX-12+Env_En),E
LD (AYREGS+EnvTp),A
LD A,(BC)
@@ -1783,7 +1630,7 @@ CH_SMPS LD (IX+PsInSm),A
;Convert PT2 sample to PT3
;PT2 PT3
SamCnv POP HL ;BIT 2,C JR e_
POP HL
POP HL
LD H,B
JR NZ,$+8
EX DE,HL
@@ -2130,14 +1977,14 @@ RxCA2 OR E
ABC
#ENDIF
#IF ZX
#IF _ZX
XOR A
LD DE,$FFBF
LD BC,$FFFD
LD HL,AYREGS
LOUT OUT (C),A
LD B,E
OUTI
OUTI
LD B,D
INC A
CP 13
@@ -2151,14 +1998,14 @@ LOUT OUT (C),A
RET
#ENDIF
#IF MSX
#IF _MSX
;MSX version of ROUT (c)Dioniso
XOR A
LD C,$A0
LD HL,AYREGS
LOUT OUT (C),A
INC C
OUTI
OUTI
DEC C
INC A
CP 13
@@ -2172,32 +2019,104 @@ LOUT OUT (C),A
RET
#ENDIF
#IF WBW
#IF _WBW
ISHBIOS
JR NZ, PLAYVIAHBIOS
DI
CALL SLOWIO
LD DE,(PORTS) ; D := RDAT, E := RSEL
XOR A ; start with reg 0
LD C,E ; point to address port
LD HL,AYREGS ; start of value list
LOUT OUT (C),A ; select register
LD C,D ; point to data port
OUTI ; write (HL) to data port, bump HL
LD C,E ; point to address port
INC A ; next register
CP 13 ; reg 13?
JR NZ,LOUT ; if not, loop
OUT (C),A ; select register 13
LD A,(HL) ; get value for register 13
AND A ; set flags
JP M,LOUT2 ; if bit 7 set, return w/o writing value
LD C,D ; select data port
OUT (C),A ; write value to register 13
LOUT2
CALL NORMIO
CALL SLOWIO
LD DE, (PORTS) ; D := RDAT, E := RSEL
XOR A ; START WITH REG 0
LD C, E ; POINT TO ADDRESS PORT
LD HL, AYREGS ; START OF VALUE LIST
LOUT OUT (C), A ; SELECT REGISTER
LD C, D ; POINT TO DATA PORT
OUTI ; WRITE (HL) TO DATA PORT, BUMP HL
LD C, E ; POINT TO ADDRESS PORT
INC A ; NEXT REGISTER
CP 13 ; REG 13?
JR NZ, LOUT ; IF NOT, LOOP
OUT (C), A ; SELECT REGISTER 13
LD A, (HL) ; GET VALUE FOR REGISTER 13
AND A ; SET FLAGS
JP M, LOUT2 ; IF BIT 7 SET, RETURN W/O WRITING VALUE
LD C, D ; SELECT DATA PORT
OUT (C), A ; WRITE VALUE TO REGISTER 13
LOUT2 CALL NORMIO
EI
RET ; And done
RET ; AND DONE
PLAYVIAHBIOS:
; CHANNEL 0
LD HL, AYREGS + AmplA
LD DE, AYREGS + TonA
LD B, 0
CALL PLAYNOTE
;
; CHANNEL 1
LD HL, AYREGS + AmplB
LD DE, AYREGS + TonB
LD B, 1
CALL PLAYNOTE
; CHANNEL 2
LD HL, AYREGS + AmplC
LD DE, AYREGS + TonC
LD B, 2
JP PLAYNOTE
PLAYNOTE:
PUSH BC ; CHANNEL IN B
PUSH DE ; PERIOD ADDR IN DE
LD A, (HL)
ADD A,A ; GET 4-BIT
ADD A,A ; VOLUME 0-15
ADD A,A ; AND CONVERT
ADD A,A ; TO HBIOS
LD L, A ; RANGE 0-255
LD BC, (BF_SNDVOL*256)+0 ; SET VOLUME
RST 08
;
POP HL ; RESTORE PERIOD ADDR
LD A, (HL) ; DEVICE 0
INC HL
LD H, (HL)
LD L, A
LD A, H ; GET 12-BIT ONE PERIOD
AND $0F ; MASK OFF HIGH
LD H, A ; NIBBLE
LD A, (OCTAVEADJ)
OR A
JR Z, PLAYNOTE3 ; NO OCTAVE ADJUSTMENT
BIT 7, A
JR Z, PLAYNOTE2 ; OCTAVE DOWN ADJUSTMENT
PLAYNOTE1:
ADD HL, HL ; MULTIPLE BY 2 FOR EACH OCTAVE
INC A
JR NZ, PLAYNOTE1
JR PLAYNOTE3
PLAYNOTE2:
SRL H ; DIVIDE BY 2 FOR EACH OCTAVE
RR L
DEC A
JR NZ, PLAYNOTE2
PLAYNOTE3
LD BC, (BF_SNDPRD*256)+0 ; SET PERIOD
RST 08
;
POP DE ; RESTORE CHANNEL IN D (FROM B)
LD BC, (BF_SNDPLAY*256)+0 ; PLAY
RST 08
RET
#ENDIF
#IF ACBBAC
CHTABLE .EQU $-4
.DB 4,5,15,%001001,0,7,7,%100100
@@ -2518,7 +2437,7 @@ endext: ld (dest1),ix
ld bc,(rows)
or a
sbc hl,bc
; jr c,noend ; If rows>played rows then exit
; exx ; Otherwise restart
; ld e,1
@@ -2553,9 +2472,16 @@ zero: djnz onebit
ret
; *** Update PSG registers
upsg: ld a,(WMOD) ; if WMOD = 1, CPU is z180
upsg:
ISHBIOS
JR Z, upsg0
ERRWITHMSG(MSGERR)
upsg0:
ld a,(WMOD) ; if WMOD = 1, CPU is z180
or a ; set flags
jr z,upsg1 ; skip z180 stuff
di
call SLOWIO
@@ -2563,29 +2489,29 @@ upsg1: ld hl,(psource)
ld de,(PORTS) ; E := RSEL, D := RDAT
xor a
psglp: ld c,e ; C := RSEL
out (c),a ; Select register
ld c,d ; C := RDAT
psglp: ld c, e ; C := RSEL
out (c), a ; Select register
ld c, d ; C := RDAT
outi ; Set register value
inc a ; Next register
ld bc,(3*FRAG)-1 ; Bytes to skip before next reg-1
add hl,bc ; Update HL
cp REGS-1 ; Check for next to last register?
jr nz,psglp ; If not, loop
inc a ; Next register
ld a,$FF ; Prepare to check for $FF value
ld bc, (3 * FRAG) - 1 ; Bytes to skip before next reg-1
add hl, bc ; Update HL
cp REGS-1 ; Check for next to last register?
jr nz,psglp ; If not, loop
ld a, $FF ; Prepare to check for $FF value
cp (hl) ; If last reg (13) is $FF
jr z,notrig ; ... then don't output
ld a,13 ; Register 13
ld c,e ; C := RSEL
out (c),a ; Select register
ld c,d ; C := RDAT
jr z, notrig ; ... then don't output
ld a, 13 ; Register 13
ld c, e ; C := RSEL
out (c), a ; Select register
ld c, d ; C := RDAT
outi ; Set register value
notrig: ld hl,(psource)
notrig: ld hl,(psource)
inc hl
ld (psource),hl
ld a,(played)
or a
jr z,endint
@@ -2593,9 +2519,10 @@ notrig: ld hl,(psource)
ld (played),a
endint: call NORMIO
ei
ei
ret ; And done
;
; *** Program data
played .db 0 ; VBI counter
dest1 .dw 0 ; Uncompress destination 1

86
Source/Apps/Tune/cli.inc Normal file
View File

@@ -0,0 +1,86 @@
CLI_ABRT_IF_OPT_FIRST:
LD A, (FCB+1)
CP '-' ; OPTION FIRST OR - MISSING FILENAME?
JP Z, ERRCMD ; SHOW USAGE
RET
CLI_HAVE_HBIOS_SWITCH:
LD HL, CLIARGS ; TEST FOR --HBIOS ON COMMAND LINE
LD DE, HBIOSOPT
CALL STRINDEX
JR NZ, CLI_HAVE_HBIOS_SWITCH1
OR $FF ; MATCHED --HBIOS
LD (HBIOSMD), A
LD BC,(BF_SYSGET*256)+BF_SND
RST 08 ; CHECK WE HAVE
XOR A ; AT LEAST ONE
CP E ; SOUND DEVICE
RET NZ
JP ERRHW
CLI_HAVE_HBIOS_SWITCH1 ; NOT MATCHED --HBIOS
XOR A
LD (HBIOSMD), A
RET
CLI_ABRT_UNSUPPFILTYP:
PUSH AF
ISHBIOS
JR Z, CLI_ABRT_UNSUPPFILTYP1
POP AF
CP TYPMYM
RET NZ
ERRWITHMSG(MSGUNSUP) ; EXIT WITH UNSUPPORTED FILE TYPE MESSAGE
CLI_ABRT_UNSUPPFILTYP1:
POP AF
RET
CLI_OCTAVE_ADJST: ; SEARCH FOR OCTAVE ADJUSTMENT SWITCH (-n or +n)
LD HL, CLIARGS ; TEST FOR --HBIOS ON COMMAND LINE
LD DE, DOWN1
CALL STRINDEX
JR NZ, CLI_OCTAVE_ADJST1
LD A, -1
JR CLI_OCTAVE_ADJST5
CLI_OCTAVE_ADJST1:
LD HL, CLIARGS ; TEST FOR --HBIOS ON COMMAND LINE
LD DE, DOWN2
CALL STRINDEX
JR NZ, CLI_OCTAVE_ADJST2
LD A, -2
JR CLI_OCTAVE_ADJST5
CLI_OCTAVE_ADJST2:
LD HL, CLIARGS ; TEST FOR --HBIOS ON COMMAND LINE
LD DE, UP1
CALL STRINDEX
JR NZ, CLI_OCTAVE_ADJST3
LD A, 1
JR CLI_OCTAVE_ADJST5
CLI_OCTAVE_ADJST3:
LD HL, CLIARGS ; TEST FOR --HBIOS ON COMMAND LINE
LD DE, UP2
CALL STRINDEX
JR NZ, CLI_OCTAVE_ADJST4
LD A, 2
JR CLI_OCTAVE_ADJST5
CLI_OCTAVE_ADJST4:
LD A, 0
CLI_OCTAVE_ADJST5:
LD (OCTAVEADJ), A
RET
HBIOSOPT: .DB "--HBIOS", 0
DOWN1 .DB "-t1", 0 ; DOWN AN OCTAVE
DOWN2 .DB "-t2", 0 ; DOWN TWO OCTAVE
UP1 .DB "+t1", 0 ; UP AN OCTAVE
UP2 .DB "+t2", 0 ; UP TWO OCTAVE

4
Source/Apps/Tune/cpm.inc Normal file
View File

@@ -0,0 +1,4 @@
CLIARGS .EQU $81
RESTART .EQU $0000 ; CP/M restart vector
BDOS .EQU $0005 ; BDOS invocation vector
FCB .EQU $5C ; Location of default FCB

15
Source/Apps/Tune/hbios.inc Normal file
View File

@@ -0,0 +1,15 @@
IDENT .EQU $FFFE ; loc of RomWBW HBIOS ident ptr
;
RMJ .EQU 3 ; intended CBIOS version - major
RMN .EQU 1 ; intended CBIOS version - minor
;
BF_SYSVER .EQU $F1 ; BIOS: VER function
BF_SYSGET .EQU $F8 ; HBIOS: SYSGET function
;
BF_SND .EQU $50
BF_SNDRESET .EQU BF_SND + 0 ; RESET SOUND SYSTEM
BF_SNDVOL .EQU BF_SND + 1 ; REQUEST SOUND VOL - L CONTAINS VOLUME (255 MAX, 0 SILENT) - SCALED AS REQUIRED BY DRIVER (EG: MAPS TO JUST 4 BIT RESOLUTION FOR SN76489)
BF_SNDPRD .EQU BF_SND + 2 ; REQUEST SOUND PERIOD - HL CONTAINS DRIVER SPECIFIC VALUE
BF_SNDNOTE .EQU BF_SND + 3 ; REQUEST NOTE - L CONTAINS NOTE - EACH VALUE IS QUARTER NOTE
BF_SNDPLAY .EQU BF_SND + 4 ; INITIATE THE REQUESTED SOUND COMMAND
BF_SNDQUERY .EQU BF_SND + 5 ; E IS SUBFUNCTION

175
Source/Apps/Tune/printing.inc Normal file
View File

@@ -0,0 +1,175 @@
;
; Print character in A without destroying any registers
;
PRTCHR:
PUSH BC ; save registers
PUSH DE
PUSH HL
LD E,A ; character to print in E
LD C,$02 ; BDOS function to output a character
CALL BDOS ; do it
POP HL ; restore registers
POP DE
POP BC
RET
;
PRTDOT:
;
; shortcut to print a dot preserving all regs
PUSH AF ; save af
LD A,'.' ; load dot char
CALL PRTCHR ; print it
POP AF ; restore af
RET ; done
;
PRTCR:
;
; shortcut to print a carriage return preserving all regs
PUSH AF ; save af
LD A,13 ; load CR value
CALL PRTCHR ; print it
POP AF ; restore af
RET ; done
;
; Print a zero terminated string at (DE) without destroying any registers
;
PRTSTR:
PUSH DE
;
PRTSTR1:
LD A,(DE) ; get next char
OR A
JR Z,PRTSTR2
CALL PRTCHR
INC DE
JR PRTSTR1
;
PRTSTR2:
POP DE ; restore registers
RET
;
; Print the value in A in hex without destroying any registers
;
PRTHEX:
PUSH AF ; save AF
PUSH DE ; save DE
CALL HEXASCII ; convert value in A to hex chars in DE
LD A,D ; get the high order hex char
CALL PRTCHR ; print it
LD A,E ; get the low order hex char
CALL PRTCHR ; print it
POP DE ; restore DE
POP AF ; restore AF
RET ; done
;
; print the hex word value in bc
;
PRTHEXWORD:
PUSH AF
LD A,B
CALL PRTHEX
LD A,C
CALL PRTHEX
POP AF
RET
;
; print the hex dword value in de:hl
;
PRTHEX32:
PUSH BC
PUSH DE
POP BC
CALL PRTHEXWORD
PUSH HL
POP BC
CALL PRTHEXWORD
POP BC
RET
;
; Convert binary value in A to ascii hex characters in DE
;
HEXASCII:
LD D,A ; save A in D
CALL HEXCONV ; convert low nibble of A to hex
LD E,A ; save it in E
LD A,D ; get original value back
RLCA ; rotate high order nibble to low bits
RLCA
RLCA
RLCA
CALL HEXCONV ; convert nibble
LD D,A ; save it in D
RET ; done
;
; Convert low nibble of A to ascii hex
;
HEXCONV:
AND $0F ; low nibble only
ADD A,$90
DAA
ADC A,$40
DAA
RET
;
; Print value of A or HL in decimal with leading zero suppression
; Use prtdecb for A or prtdecw for HL
;
PRTDECB:
PUSH HL
LD H,0
LD L,A
CALL PRTDECW ; print it
POP HL
RET
;
PRTDECW:
PUSH AF
PUSH BC
PUSH DE
PUSH HL
CALL PRTDEC0
POP HL
POP DE
POP BC
POP AF
RET
;
PRTDEC0:
LD E,'0'
LD BC,-10000
CALL PRTDEC1
LD BC,-1000
CALL PRTDEC1
LD BC,-100
CALL PRTDEC1
LD C,-10
CALL PRTDEC1
LD E,0
LD C,-1
PRTDEC1:
LD A,'0' - 1
PRTDEC2:
INC A
ADD HL,BC
JR C,PRTDEC2
SBC HL,BC
CP E
RET Z
LD E,0
CALL PRTCHR
RET
;
; Start a new line
;
CRLF2:
CALL CRLF ; two of them
CRLF:
PUSH AF ; preserve AF
LD A,13 ; <CR>
CALL PRTCHR ; print it
LD A,10 ; <LF>
CALL PRTCHR ; print it
POP AF ; restore AF
RET

39
Source/Apps/Tune/strings.inc Normal file
View File

@@ -0,0 +1,39 @@
STRINDEX: ; SEARCH FOR STRING AT DE WITHIN STRING AT HL
LD B, 0
LD C, 0
TRYNEXT:
PUSH HL
PUSH DE
CALL STRCMP
POP DE
POP HL
RET Z
INC HL
INC BC
LD A, (HL)
OR A
JR NZ, TRYNEXT
OR $FF ; RETURN NZ
RET
STRCMP: ; COMPARE STRING AT HL WITH DE - RETURN Z IF LIKE
LD A, (DE)
OR A
RET Z
LD B, A
LD A, (HL)
OR A
JR NZ, STRCMP1
OR $FF ; END OF STRING HL - SO NOT FOUND
RET
STRCMP1
CP B
RET NZ
INC HL
INC DE
JR STRCMP

60
Source/Apps/Tune/timing.inc Normal file
View File

@@ -0,0 +1,60 @@
;
; Wait for quark play time. Can use hardware timer if
; supported by hardware or simple delay loop otherwise.
; Delay loop requires QDLY to be pre-set to to achieve
; optimal 20ms wait time.
;
WAITQ LD A,(WMOD) ; Get delay mode
OR A ; Set flags
JR Z,DLY ; Delay mode
;
; Timer loop
CALL TIM2 ; Read timer LSB into A
LD C,A ; Init prev value
TIM1 PUSH BC ; Save prev value
CALL TIM2 ; Read timer LSB into A
POP BC ; Recover prev value
CP C ; Compare to prev
RET NZ ; Done if changed
JR TIM1 ; Else, loop
;
TIM2 LD B,$F8 ; BIOS SYSGET function
LD C,$D0 ; TIMER sub-function
RST 08 ; Call BIOS
LD A,L ; MSB to A
RET ; Return to loop
;
; Delay spin loop (40 tstates per loop)
DLY LD BC,(QDLY) ; Load quark delay factor
DLY1 DEC BC ; [6]
NOP ; [4]
NOP ; [4]
NOP ; [4]
NOP ; [4]
LD A,B ; [4]
OR C ; [4]
JP NZ,DLY1 ; [10]
RET
;
; Test for timer running to determine if it can be used for delay
; Return string message in DE
; Assigned (WMOD) with 0 if no hardware time, 1 if hardware timer found
;
PROBETIMER:
LD B,BF_SYSGET ; HBIOS: GET function
LD C,$D0 ; TIMER subfunction
RST 08 ; DE:HL := current tick count
LD A,L ; DE:HL == 0?
OR H
OR E
OR D
LD A,0 ; Assume no timer
LD DE,MSGDLY ; Delay mode msg
JR Z,SETDLY ; If tick count is zero, no timer active
LD A,$FF ; Value for timer active
LD DE,MSGTIM ; Timer mode msg
SETDLY:
LD (WMOD),A ; Save wait mode
RET

4
Source/Apps/Tune/tune.inc Normal file
View File

@@ -0,0 +1,4 @@
#DEFINE ISHBIOS LD A, (HBIOSMD) \ OR A
#DEFINE PRTSTRDE(X) LD DE, X \ CALL PRTSTR
#DEFINE PRTCRLF CALL CRLF
#DEFINE ERRWITHMSG(X) LD DE, X \ JP ERR

10
Source/Apps/XM/Build.cmd
View File

@@ -10,13 +10,21 @@ set ZXLIBDIR=%TOOLS%\cpm\lib\
set ZXINCDIR=%TOOLS%\cpm\include\
zx mac xmdm125.asm $PO
zx slr180 -xmhb/HF
rem zx slr180 -xmuf/HF
zx mload25 XM=xmdm125,xmhb
rem zx slr180 -xmuf/HF
rem zx mload25 XMUF=xmdm125,xmuf
zx slr180 -xmhb_old/HF
zx mload25 XMOLD=xmdm125,xmhb_old
rem set PROMPT=[Build] %PROMPT%
rem %comspec%
copy /Y XM.com ..\..\..\Binary\Apps\
rem copy /Y XMUF.com ..\..\..\Binary\Apps\
copy /Y XMOLD.com ..\..\..\Binary\Apps\
rem pause

11
Source/Apps/XM/Makefile
View File

@@ -1,5 +1,5 @@
#OBJECTS = xm.com xmuf.com
OBJECTS = xm.com
OBJECTS = xm.com xmold.com
#OBJECTS += xmuf.com
DEST = ../../../Binary/Apps
TOOLS = ../../../Tools
OTHERS = *.hex
@@ -9,5 +9,8 @@ include $(TOOLS)/Makefile.inc
xm.com: xmdm125.hex xmhb.hex
$(ZXCC) $(CPM)/MLOAD25 XM=xmdm125,xmhb
#xmuf.com: xmdm125.hex xmuf.hex
# $(ZXCC) $(CPM)/MLOAD25 XMUF=xmdm125,xmuf
xmuf.com: xmdm125.hex xmuf.hex
$(ZXCC) $(CPM)/MLOAD25 XMUF=xmdm125,xmuf
xmold.com: xmdm125.hex xmhb_old.hex
$(ZXCC) $(CPM)/MLOAD25 XMOLD=xmdm125,xmhb_old

77
Source/Apps/XM/XModem Xfer Anomaly.txt Normal file
View File

@@ -0,0 +1,77 @@
XModem 12.5 & Tera Term Anomaly Analysis
----------------------------------------
Protocol Notes:
- During protocol startup, the receiver NAKs the sender repeatedly
to let the sender know it can start sending.
- Normally, the receiver sends a NAK character to ask the sender to
resend a packet.
- Prior to receiving the first packet, the receiver may send a "C"
or a "CK" instead of a NAK. This mechanism is used to inform the
sender that the receiver wants to use (C)RC error detection
instead of checksum error detection and optionally 1(K) packet sizes.
- After the first packet exchange, a NAK is always used to
request a packet be resent.
Anomalous Exchange Description:
XModem on RomWBW is being used to receive a file being sent
by Tera Term on a Windows PC...
- XModem is started in receive mode
- User starts process of selecting a file to send on Tera Term
- XModem begins sending "CK" sequences as described above
to wake up the sender
- Tera Term buffers incoming "CK" sequences while user is selecting
a file to send
- User completes file selection
- Tera Term receives the first "CK" which was buffered while user
was selecting a file
- Tera Term correctly receives the first "CK", sets itself to
use CRC and 1K packets, then sends the first packet
- While waiting for Tera Term to send the first packet, XModem
is repeatedly timing out and resending the "CK" sequence
- For each timeout, XModem spends 1 second flushing any incoming
characters from the sender (it assumes it is flushing line garbage).
- IFF the first packet from Tera Term starts to arrive during this
1 second flushing interval, XModem gobbles up and discards the
first packet sent by Tera Term
- XModem then sends a new "CK" because it is still waiting for the
first packet (having just flushed the actual first packet)
- Tera Term has already switched out of "first packet" mode and will
now only respond to an actual NAK character, so it ignores all of
the CKs send from XModem
- XModem continues to send CKs and Tera Term continues to ignore them
until XModem hits a retry threshold
- When XModem hits the retry threshold, it attempts to switch from
CRC to Checksum assuming the sender was not capable of using
CRCs
- XModem now sends a NAK character because that is what is used for
for first packet NAKing in Checksum mode
- Tera Term sees the NAK and resends the first packet, but appends a
CRC instead of a Checksum because Tera Term is still in CRC mode
- XModem fails the Tera Term first packet resends because it is
looking for a Checksum and Tera Term is appending CRCs.
- XModem eventually gives up.
Summary of failure:
If Tera Term happens to start sending the first packet during the
one second "flush" window of XModem, the exchange will fail during
the startup sequence.
Since the precise start timing of the first packet is dependent on
the time the user takes to select a file, the occurrence of the
failure is essentially random.
The timeout used by XModem is about 5 seconds followed by the 1
second line flush. So, there is a 1 in 6 chance that the protocol
will fail to startup successfully.
Mitigation:
- Modified the receive timeout recovery to *not* flush the incoming
buffer for one second. Flushing in this scenario makes no sense
anyway because a timeout just occurred meaning no data is being
received.

97
Source/Apps/XM/xmdm125.asm
View File

@@ -71,7 +71,7 @@ STX EQU 02H ; 'Start of header' for 1024 byte blocks
; Conditional equates - change to suit your system, then assemble
;
MHZ EQU 10 ; Clock speed, use integer (2,4,5,8, etc.)
SCL EQU 6600 ; WBW: Receive loop timeout scalar
SCL EQU 6600 ; [WBW] Receive loop timeout scalar
CPM3 EQU NO ; Yes, if operating in CP/M v3.0 environment
STOPBIT EQU NO ; No, if using 1 stop bit, yes if using 2
BYEBDOS EQU NO ; Yes, if using BYE338-up, BYE501-up, or NUBYE
@@ -758,7 +758,10 @@ RECVOPT:MVI A,'K' ; First off, default to 1K mode
CALL RCVOPC ; Check 4th (or 5th) option
ENDIF
;
JMP OPTERR ; If 5th or 6th option, whoops!
; [WBW] Added to support port number
CALL RCVOPC ; Check 5th (or 6th) option
;
JMP OPTERR ; If 7th or 8th option, whoops!
;
RCVOPC: INX H ; Increment pointer to next character
MOV A,M ; Get option character HL points to
@@ -790,7 +793,7 @@ CHK3RD: CPI 'X' ; Got an "X" for first option?
CHK4TH:
IF MBFMSG ; Allowing "RM" for message uploads?
CPI 'M' ; Got an "M" for message upload?
JNZ CHK5TH ; If not, bad option
JNZ CHK5TH ; Nope, try next
STA MSGFLG ; If "M", set MSGFLG
MVI A,'P' ; Also, set PRVTFL
STA PRVTFL
@@ -804,11 +807,21 @@ CHK4TH:
CHK5TH:
IF NDESC ; Allowing "RN" to skip upload descript?
CPI 'N' ; Got an 'N'?
JNZ BADROP ; If nope, is NG..
JNZ CHK6TH ; Nope, try next
STA NDSCFL ; else set flag to skip descript phase
RET
ENDIF
;
CHK6TH:
; [WBW] Get target serial port (0-9 supported)
CPI '0'
JC BADROP ; If < 0, out of range
CPI '9' + 1
JNC BADROP ; If > 9, out of range
SUI '0' ; Make binary
STA PORT
RET
;
BADROP: POP PSW ; Restore stack
JMP OPTERR ; is bad option
;
@@ -817,9 +830,10 @@ BADROP: POP PSW ; Restore stack
;
ALLSET: CALL GETCHR
CALL GETCHR
LDA PORT ; [WBW] Pass serial port to driver
CALL MINIT
STA CPUMHZ ; WBW: Save CPU speed from MINIT
SHLD RCVSCL ; WBW: Save rcv loop scalar from MINIT
STA CPUMHZ ; [WBW] Save CPU speed from MINIT
SHLD RCVSCL ; [WBW] Save rcv loop scalar from MINIT
;
; Jump to appropriate function
;
@@ -920,7 +934,8 @@ SKSK2: CALL ILPRT
DB 'XMODEM L CAT.LBR CAT.COM send a file from a library'
DB CR,LF
DB 'XMODEM LK CAT.LBR CAT.COM send in 1k blocks',CR,LF
DB ' The ".LBR" file extension may be omitted',CR,LF,LF
DB ' The ".LBR" file extension may be omitted',CR,LF
DB ' Add "0"-"9" to specify serial port',CR,LF,LF
DB 'XMODEM R HELLO.DOC receive a file from you'
DB CR,LF
DB 'XMODEM RP HELLO.DOC receive in a private area'
@@ -939,7 +954,8 @@ SKSK2: CALL ILPRT
;
IF NOT LUXMOD
DB ' Add "C" for forced checksum ("RC" "RPC")',CR,LF
DB ' Add "X" for forced 128 byte protocol ("RX" "RPX")'
DB ' Add "X" for forced 128 byte protocol ("RX" "RPX")',CR,LF
DB ' Add "0"-"9" to specify serial port'
DB CR,LF
DB ' "R" switches from CRC to checksum after 5 retries'
DB CR,LF,LF
@@ -2214,13 +2230,13 @@ ILLDU: CALL ERXIT
RCVRECD:XRA A ; Initialize error count to zero
STA ERRCT
;
;WBW BEGIN: Be more patient waiting for host to start sending file
LDA FRSTIM ; WBW: Get first time flag
ORA A ; WBW: Set CPU flags
JNZ RCVRPT ; WBW: If not first time, bypass
MVI A,-10 ; WBW: Else increase error limit
STA ERRCT ; WBW: Save error new limit
;WBW END
; [WBW] BEGIN: Be more patient waiting for host to start sending file
LDA FRSTIM ; Get first time flag
ORA A ; Set CPU flags
JNZ RCVRPT ; If not first time, bypass
MVI A,-10 ; Else increase error limit
STA ERRCT ; Save error new limit
; [WBW] END
;
RCVRPT: IF CONFUN ; Check for function key?
CALL FUNCHK ; Yeah, why not?
@@ -2233,7 +2249,7 @@ RCVRPT: IF CONFUN ; Check for function key?
ENDIF
;
;MVI B,10-1 ; 10-second timeout
MVI B,5-1 ; WBW: 5-second timeout
MVI B,5-1 ; [WBW] 5-second timeout
CALL RECV ; Get any character received
JC RCVSTOT ; Timeout
;
@@ -2259,7 +2275,7 @@ RCVRPTB:CPI SOH ; 'SOH' for a 128-byte block?
RCVSERR:MVI B,1 ; Wait for 1 second
CALL RECV ; After last char. received
JNC RCVSERR ; Loop until sender done
LDA FRSTIM ; Is it the first time?
RCVSER1:LDA FRSTIM ; Is it the first time?
ORA A
MVI A,NAK
JNZ RCVSER2 ; If not first time, send NAK
@@ -2320,7 +2336,9 @@ DELFILE:LXI D,FCB ; Point to file
;
; Timed out on receive
;
RCVSTOT:JMP RCVSERR ; Bump error count, etc.
;RCVSTOT:JMP RCVSERR ; Bump error count, etc.
; [WBW] Bypass line flush if error is timeout
RCVSTOT:JMP RCVSER1 ; Bump error count, etc.
;
; Got SOH or STX - get block number, block number complemented
;
@@ -3457,9 +3475,18 @@ RSDMA: LXI D,TBUF ; Reset DMA address
WRERR: CALL RSDMA ; Reset DMA to normal
MVI C,CAN ; Cancel
CALL SEND ; Sender
; [WBW] BEGIN: RCVSABT does not return, so file write error
; message was never being displayed. Swapped things around
; to fix this.
; CALL RCVSABT ; Kill receive file
; CALL ERXIT ; Exit with msg:
; DB '++ Error writing file ++$'
; [WBW] -----
CALL ILPRT ; Dispaly error msg
DB CR,LF,'++ Error writing file ++',CR,LF,0
CALL RCVSABT ; Kill receive file
CALL ERXIT ; Exit with msg:
DB '++ Error writing file ++$'
; [WBW] END
;
; Receive a character - timeout time is in 'B' in seconds. Entry via
; 'RECVDG' deletes garbage characters on the line. For example, having
@@ -3470,11 +3497,17 @@ RECVDG: CALL GETCHR
CALL GETCHR
;
RECV: PUSH D ; Save 'DE' regs.
;WBW BEGIN: Use dynamic CPU speed
;
; [WBW] BEGIN: Check immediately for char pending to avoid delay
CALL RCVRDY ; Input from modem ready
JZ MCHAR ; Got the character
; [WBW] END
;
; [WBW] BEGIN: Use dynamic CPU speed
; MVI E,MHZ ; Get the clock speed
LDA CPUMHZ ; Get the clock speed
MOV E,A ; Put speed in E
;WBW END
; [WBW] END
XRA A ; Clear the 'A' reg.
;
MSLOOP: ADD B ; Number of seconds
@@ -3483,12 +3516,12 @@ MSLOOP: ADD B ; Number of seconds
MOV B,A ; Put total value back into 'B'
;
MSEC: IF NOT BYEBDOS
;WBW BEGIN: Use scalar passed in by patch
; [WBW] BEGIN: Use scalar passed in by patch
;LXI D,6600 ; 1 second DCR count
XCHG
LHLD RCVSCL ; Use scalar value from patch
XCHG
;WBW END
; [WBW] END
ENDIF
;
IF BYEBDOS
@@ -3567,7 +3600,7 @@ CARCK2: LDA OPTSAV ; Get option
; Delay - 100 millisecond delay.
;
DELAY: PUSH B ; Save 'BC'
; WBW BEGIN: Use dynamic CPU speed
; [WBW] BEGIN: Use dynamic CPU speed
; Loop below is 105TS on Z80 and 96TS on Z180
; Approx 1024 iter per 100ms per MHz
; Loop time below extended to accommodate CPU speeds up to 64MHz
@@ -3578,7 +3611,7 @@ DELAY: PUSH B ; Save 'BC'
RLC ; * 2, A now has MHz * 4
MOV B,A ; Use as high byte
MVI C,0 ; Zero low byte, BC now has MHz * 1024
; WBW END
; [WBW] END
DELAY2: DCX B ; Update count
MOV A,B ; Get MSP byte
ORA C ; Count = zero?
@@ -3967,7 +4000,7 @@ INPUT: PUSH H ; Save current values
PUSH D
PUSH B
;
; WBW BEGIN: Use dynamic CPU speed
; [WBW] BEGIN: Use dynamic CPU speed
;INPUT1: LXI D,1200 ; Outer loop count (about 2 minutes)
;;
;INPUT2: LXI B,MHZ*100 ; Roughly 100 ms.
@@ -3976,7 +4009,7 @@ INPUT1: LXI D,468 ; Outer loop count (about 2 minutes)
INPUT2: LDA CPUMHZ ; CPU MHz to A
MOV B,A ; Put in B
MVI C,0 ; Zero C, BC is now CPU MHz * 256, ~256ms
; WBW END
; [WBW] END
;
INPUT3: PUSH D ; Save the outer delay count
PUSH B ; Save the inner delay count
@@ -5655,8 +5688,9 @@ MSGFLG: DB 0 ; Message upload flag
SAVEHL: DW 0 ; Saves TBUF command line address
TOTERR: DW 0 ; Total errors for transmission attempt
VRECNO: DW 0 ; Virtual record # in 128 byte records
CPUMHZ: DB MHZ ; WBW: CPU speed in MHz
RCVSCL: DW SCL ; WBW: Recv loop scalar
CPUMHZ: DB MHZ ; [WBW] CPU speed in MHz
RCVSCL: DW SCL ; [WBW] Recv loop scalar
PORT: DB 0FFH ; [WBW] Target serial port, FFH=not specified
;
EOFLG: DB 0 ; 'EOF' flag (1=yes)
EOFCTR: DB 0 ; EOF send counter
@@ -5685,7 +5719,8 @@ OLINE: DS 80 ; Temporary buffer to store line
ORG ($+127)/128*128
;
DBUF EQU $ ; 16-record disk buffer
STACK EQU DBUF-2 ; Save original stack address
;STACK EQU DBUF-2 ; Save original stack address
STACK EQU 0B000H ; [WBW] Above 8000h for HBIOS Fastpath
LOGBUF EQU DBUF+128 ; For use with LOGCAL
;
;-----------------------------------------------------------------------

1114
Source/Apps/XM/xmhb.180
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File diff suppressed because it is too large Load Diff

920
Source/Apps/XM/xmhb_old.180 Normal file
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@@ -0,0 +1,920 @@
;=======================================================================
;
; XMHB.Z80 - XMODEM12 PATCH FILE FOR ROMWBW HBIOS
;
; Wayne Warthen - wwarthen@gmail.com
;
; 2018-06-06 WBW Added support for RC2014 w/ Z180
; 2019-08-17 WBW Refactored and merged Phil's ECB-FIFO support
; 2019-08-28 WBW Refactored ASCI support
;
;=======================================================================
;
ASEG
;
NO EQU 0
YES EQU NOT NO
;
ERRDET EQU NO ; detect parity/framing/overrun errs
;
BASE EQU 100H ; start of cp/m normal program area
;
BDOS EQU 00005H ; BDOS function dispatch vector
;
;=======================================================================
;
; Jump table: The jump table must be in exactly the same sequence as the
; one in XMODEM. Note the ORG of 103H - This jump table has no jump to
; 'BEGIN'.
;
ORG BASE + 3 ; start after 'JMP BEGIN'
;
JP CONOUT ; must be 00000h if not used, see below
JP MINIT ; initialization routine (if needed)
JP UNINIT ; undo whatever 'MINIT' did (or return)
JPTBL:
JP SENDR ; send character (via pop psw)
JP CAROK ; test for carrier
JP MDIN ; receive data byte
JP GETCHR ; get character from modem
JP RCVRDY ; check receive ready
JP SNDRDY ; check send ready
JP SPEED ; get speed value for file transfer time
JP EXTRA1 ; extra for custom routine
JP EXTRA2 ; extra for custom routine
JP EXTRA3 ; extra for custom routine
;
;-----------------------------------------------------------------------
;
; Output character to console
;
CONOUT EQU 0 ; not used
;
;-----------------------------------------------------------------------
;
; Initialize modem
;
; This procedure has been usurped to dynamically detect the type
; of system we are running on and install the *real* jump table
; entries as appropriate.
;
MINIT:
; Announce
LD DE,RBC ; RetroBrew Computers
LD C,9 ; BDOS string display function
CALL BDOS ; Do it
;
; Identify BIOS (RomWBW HBIOS or UNA UBIOS)
CALL IDBIO ; 1=HBIOS, 2=UBIOS
LD (BIOID),A ; Save it
DEC A ; Test for HBIOS
JR Z,HINIT ; Do HBIOS setup
DEC A ; Test for UBIOS
JR Z,UINIT ; Do UBIOS setup
;
; Neither UNA nor RomWBW
LD DE,ERR_BIO ; BIOS error message
LD C,9 ; BDOS string display function
CALL BDOS ; Do it
JP 0 ; Bail out!
;
MINIT_RET:
PUSH HL ; Save HL (JP table adr)
; Display port notification string
LD C,9 ; BDOS string display function
CALL BDOS ; Do it
;
; Newline
LD C,9 ; BDOS string display function
LD DE,CRLF ; Newline
CALL BDOS ; Do it
;
; Copy real vectors into active jump table
POP HL ; Recover HL
LD DE,JPTBL ; Real jump table is destination
LD BC,7 * 3 ; Copy 7 3-byte entries
LDIR ; Do the copy
;
; Return with CPU speed in A
LD A,(CPUSPD) ; A := CPU speed in MHz
LD HL,(RCVSCL) ; HL := receive scalar
RET ; and return
;
HINIT:
; Display RomWBW notification string
LD DE,HBTAG ; BIOS notification string
LD C,9 ; BDOS string display function
CALL BDOS ; Do it
;
; Get CPU speed from RomWBW HBIOS and save it
LD B,0F8H ; HBIOS SYSGET function 0xF8
LD C,0F0H ; CPUINFO subfunction 0xF0
RST 08 ; Do it, L := CPU speed in MHz
LD A,L ; Move it to A
LD (CPUSPD),A ; Save it
;
; Get HBIOS character 0 device type
LD B,006H ; HBIOS DEVICE function 0x06
LD C,000H ; HBIOS char 0 device
RST 08 ; Do it, D=device type
LD A,D ; Put result in A
CP 000H ; UART?
JP Z,U_INIT ; If so, do UART init
CP 010H ; ASCI?
JP Z,A_INIT ; If so, do ASCI init
CP 080H ; USB-FIFO?
JP Z,UF_INIT ; If so, do USB-FIFO init
JP H_INIT ; Otherwise, use HBIOS I/O
;
UINIT:
; Display UNA notification string
LD DE,UBTAG ; BIOS notification string
LD C,9 ; BDOS string display function
CALL BDOS ; Do it
;
; Get CPU speed from UNA and save it
LD C,0F8H ; UNA BIOS Get PHI function
RST 08 ; Returns speed in Hz in DE:HL
LD B,4 ; Divide MHz in DE:HL by 100000H
UINIT1:
SRL D ; ... to get approx CPU speed in
RR E ; ...MHz. Throw away HL, and
DJNZ UINIT1 ; ...right shift DE by 4.
INC E ; Fix up for value truncation
LD A,E ; Put in A
LD (CPUSPD),A ; Save it
;
; Check CPU, Z80=UART, Z180=ASCI
LD DE,00202H ; D := 2, E := 2
MLT DE ; DE := D * E == 4
BIT 2,E ; Bit 2 wil be set if mlt happend
JP Z,U_INIT ; UART initialization
JP A_INIT ; otherwise, ASCI
;
HWERR:
; Failed to identify target comm hardware
LD DE,ERR_HW ; Hardware error message
LD C,9 ; BDOS string display function
CALL BDOS ; Do it
JP 0 ; Bail out!
;
; Identify active BIOS. RomWBW HBIOS=1, UNA UBIOS=2, else 0
;
IDBIO:
;
; Check for UNA (UBIOS)
LD A,(0FFFDH) ; fixed location of UNA API vector
CP 0C3H ; jp instruction?
JR NZ,IDBIO1 ; if not, not UNA
LD HL,(0FFFEH) ; get jp address
LD A,(HL) ; get byte at target address
CP 0FDH ; first byte of UNA push ix instruction
JR NZ,IDBIO1 ; if not, not UNA
INC HL ; point to next byte
LD A,(HL) ; get next byte
CP 0E5H ; second byte of UNA push ix instruction
JR NZ,IDBIO1 ; if not, not UNA, check others
LD A,2 ; UNA BIOS id = 2
RET ; and done
;
IDBIO1:
; Check for RomWBW (HBIOS)
LD HL,(0FFFEH) ; HL := HBIOS ident location
LD A,'W' ; First byte of ident
CP (HL) ; Compare
JR NZ,IDBIO2 ; Not HBIOS
INC HL ; Next byte of ident
LD A,~'W' ; Second byte of ident
CP (HL) ; Compare
JR NZ,IDBIO2 ; Not HBIOS
LD A,1 ; HBIOS BIOS id = 1
RET ; and done
;
IDBIO2:
; No idea what this is
XOR A ; Setup return value of 0
RET ; and done
;
;-----------------------------------------------------------------------
;
; Uninitialize modem
;
UNINIT:
LD A,(BIOID)
CP 1 ; Is HBIOS?
JR Z,H_UNINIT ; Handle HBIOS
CP 2 ; Is UBIOS?
JR Z,U_UNINIT ; Handle UBIOS
RET ; Just return
;
H_UNINIT:
; HBIOS: Reset character device 0
LD B,04H ; HBIOS CIOINIT function 0x04
LD C,0 ; Unit = 0
LD DE,-1 ; Reset w/ current settings
RST 08 ; Do it
RET ; not initialized, so no 'UN-INITIALIZE'
;
U_UNINIT:
; UBIOS: Reset character device 0
LD C,10H ; UNA INIT function 0x10
LD B,0 ; Unit = 0
LD DE,-1 ; Reset w/ current settings
RST 08 ; Do it
RET ; not initialized, so no 'UN-INITIALIZE'
;
;-----------------------------------------------------------------------
;
; The following are all dummy routines that are unused because MINIT
; dynamically installs the real jump table.
;
SENDR:
CAROK:
MDIN:
GETCHR:
RCVRDY:
SNDRDY:
SPEED:
EXTRA1:
EXTRA2:
EXTRA3:
RET
;
BIOID DB 0 ; BIOS ID, 1=HBIOS, 2=UBIOS
CPUSPD DB 10 ; CPU speed in MHz
RCVSCL DW 6600 ; RECV loop timeout scalar
;
RBC DB "RBC, 28-Aug-2019$"
;
U_LBL DB ", UART$"
A_LBL DB ", ASCI$"
S_LBL DB ", SIO$"
H_LBL DB ", COM$"
UF_LBL DB ", USB-FIFO$"
;
UBTAG DB " [UNA]$"
HBTAG DB " [WBW]$"
;
CRLF DB 13, 10, "$"
;
ERR_BIO DB 13, 10, 13, 10, "++ Unknown BIOS ++", 13, 10, "$"
ERR_HW DB 13, 10, 13, 10, "++ Unknown Hardware ++", 13, 10, "$"
;
;=======================================================================
;=======================================================================
;
; 8250-like UART @ Port 68H
;
;=======================================================================
;=======================================================================
;
; UART port constants
;
U_BASE EQU 68H ; UART base port
U_DATP EQU U_BASE + 0 ; data in port
U_DATO EQU U_BASE + 0 ; data out port
U_CTLP EQU U_BASE + 5 ; control/status port
U_SNDB EQU 20H ; bit to test for send ready
U_SNDR EQU 20H ; value when ready to send
U_RCVB EQU 01H ; bit to test for receive ready
U_RCVR EQU 01H ; value when ready to receive
U_PARE EQU 04H ; bit for parity error
U_OVRE EQU 02H ; bit for overrun error
U_FRME EQU 08H ; bit for framing error
U_ERRS EQU U_FRME | U_OVRE | U_PARE
;
; Following jump table is dynamically patched into real jump
; table at program startup. See MINIT above. Note that only a
; subset of the jump table is overlaid (SENDR to SPEED).
;
U_JPTBL:
JP U_SENDR ; send character (via pop psw)
JP U_CAROK ; test for carrier
JP U_MDIN ; receive data byte
JP U_GETCHR ; get character from modem
JP U_RCVRDY ; check receive ready
JP U_SNDRDY ; check send ready
JP U_SPEED ; get speed value for file transfer time
;
;-----------------------------------------------------------------------
;
; UART initialization
;
U_INIT:
LD HL,13000 ; Receive loop timeout scalar
LD (RCVSCL),HL ; ... for UART RCVRDY timing
;
LD HL,U_JPTBL
LD DE,U_LBL
JP MINIT_RET
;
;-----------------------------------------------------------------------
;
; Send character on top of stack
;
U_SENDR:
POP AF ; get character to send from stack
OUT (U_DATO),A ; send to port
RET
;
;-----------------------------------------------------------------------
;
; Test and report carrier status, Z set if carrier present
;
U_CAROK:
XOR A ; not used, always indicate present
RET
;
;-----------------------------------------------------------------------
;
; Get a character (assume character ready has already been tested)
;
U_MDIN:
U_GETCHR:
IN A,(U_DATP) ; read character from port
RET
;
;-----------------------------------------------------------------------
;
; Test for character ready to receive, Z = ready
; Error code returned in A register
; *** Error code does not seem to be used ***
;
U_RCVRDY:
IN A,(U_CTLP) ; get modem status
;
IF ERRDET
;
; With error detection (slower)
PUSH BC ; save scratch register
PUSH AF ; save full status on stack
AND U_ERRS ; isolate line err bits
LD B,A ; save err status in B
POP AF ; get full status back
AND U_RCVB ; isolate ready bit
CP U_RCVR ; test it (set flags)
LD A,B ; get the error code back
POP BC ; restore scratch register
;
ELSE
;
; No error detection (faster)
AND U_RCVB ; isolate ready bit
CP U_RCVR ; test it (set flags)
LD A,0 ; report no line errors
;
ENDIF
;
RET
;
;-----------------------------------------------------------------------
;
; Test for ready to send a character, Z = ready
;
U_SNDRDY:
IN A,(U_CTLP) ; get status
AND U_SNDB ; isolate transmit ready bit
CP U_SNDR ; test for ready value
RET
;
;-----------------------------------------------------------------------
;
; Report baud rate (index into SPTBL returned in register A)
;
U_SPEED:
LD A,8 ; arbitrarily return 9600 baud
RET
;
;=======================================================================
;=======================================================================
;
; Z180 Primary ASCI
;
; - Port is determined dynamically in A_INIT
;
;=======================================================================
;=======================================================================
;
; ASCI port constants
;
A_DATP EQU 08H ; Z180 TSR - ASCI receive data port
A_DATO EQU 06H ; Z180 TDR - ASCI transmit data port
A_CTLP EQU 04H ; Z180 STAT - ASCI status port
A_CTL2 EQU 00H ; Z180 CNTLA - ASCI control port
;
A_SNDB EQU 02H ; Z180 STAT:TDRE - xmit data reg empty bit
A_SNDR EQU 02H ; Z180 STAT:TDRE - xmit data reg empty value
A_RCVB EQU 80H ; Z180 STAT:RDRF - rcv data reg full bit
A_RCVR EQU 80H ; Z180 STAT:RDRF - rcv data reg full value
A_PARE EQU 20H ; Z180 STAT:PE - parity error bit
A_OVRE EQU 40H ; Z180 STAT:OVRN - overrun error bit
A_FRME EQU 10H ; Z180 STAT:FE - framing error bit
A_ERRS EQU A_FRME | A_OVRE | A_PARE
;
A_BASE DB 00H ; internal IO base address for Z180
;
; Following jump table is dynamically patched over initial jump
; table at program startup. See MINIT above. Note that only a
; subset of the jump table is overlaid (SENDR to SPEED).
;
A_JPTBL:
JP A_SENDR ; send character (via pop psw)
JP A_CAROK ; test for carrier
JP A_MDIN ; receive data byte
JP A_GETCHR ; get character from modem
JP A_RCVRDY ; check receive ready
JP A_SNDRDY ; check send ready
JP A_SPEED ; get speed value for file transfer time
;
;-----------------------------------------------------------------------
;
; ASCI initialization
;
A_INIT:
LD HL,7500 ; Receive loop timeout scalar
LD (RCVSCL),HL ; ... for ASCI RCVRDY timing
;
; Test for location of Z180 internal registers
; and use appropriate I/O address.
LD B,0 ; set MSB for 16 bit I/O
LD C,040H|3FH ; internal registers @ 40H?
IN A,(C) ; read
CP 040H|01FH ; same value except for bit 5?
JR Z,A_INIT1 ; do ASCI init (port in C)
LD C,0C0H|3FH ; internal registers @ C0H?
IN A,(C) ; read
CP 0C0H|1FH ; same value except for bit 5?
JR Z,A_INIT1 ; do ASCI init (port in C)
JP HWERR ; unknown hardware error
;
A_INIT1:
LD A,C ; test port value to A
AND 0C0H ; only top two bits relevant
LD (A_BASE),A ; save it
ADD A,A_CTLP ; status port offset
LD C,A ; put in C for I/O
LD B,0 ; MSB for 16 bit I/O
XOR A ; clear interrupt enable flags
OUT (C),A ; do it
;
LD HL,A_JPTBL
LD DE,A_LBL
JP MINIT_RET
;
;-----------------------------------------------------------------------
;
; Send character on top of stack
;
A_SENDR:
EX (SP),HL ; save HL, HL := char to send
PUSH BC ; save scratch register
LD A,(A_BASE) ; IO base address
ADD A,A_DATO ; data out port offset
LD C,A ; put in C for I/O
LD B,0 ; MSB for 16 bit I/O
OUT (C),H ; send to port
POP BC ; restore scratch reg
POP HL ; restore HL
RET ; done
;
;-----------------------------------------------------------------------
;
; Test and report carrier status, Z set if carrier present
;
A_CAROK:
XOR A ; not used, always indicate present
RET
;
;-----------------------------------------------------------------------
;
; Get a character (assume character ready has already been tested)
;
A_MDIN:
A_GETCHR:
PUSH BC ; save scratch register
LD A,(A_BASE) ; IO base address
ADD A,A_DATP ; data in port offset
LD C,A ; put in C for I/O
LD B,0 ; MSB for 16 bit I/O
IN A,(C) ; read character from port
POP BC ; restore scratch reg
RET
;
;-----------------------------------------------------------------------
;
; Test for character ready to receive, Z = ready
; Error code returned in A register
; *** Error code does not seem to be used ***
;
A_RCVRDY:
PUSH BC ; save scratch register
LD A,(A_BASE) ; IO base address
ADD A,A_CTLP ; status port offset
LD C,A ; put in C for I/O
LD B,0 ; MSB for 16 bit I/O
IN A,(C) ; get modem status
PUSH AF ; save full status on stack
AND A_ERRS ; isolate line err bits
LD B,A ; save err status in B
; Z180 ASCI ports will stall if there are errors.
; Error bits are NOT cleared by merely reading
; the status register. Below, bit 3 of ASCI
; control register is written with a zero to
; clear error(s) if needed.
JR Z,A_RCVRDY2 ; if no errs, continue
PUSH BC ; save scratch reg
LD A,(A_BASE) ; IO base address
ADD A,A_CTL2 ; status port offset
LD C,A ; put in C for I/O
LD B,0 ; MSB for 16 bit I/O
IN A,(C) ; get current control reg value
AND 0F7H ; force err reset bit to zero
OUT (C),A ; write control register
POP BC ; restore scratch reg
;
A_RCVRDY2:
POP AF ; get full status back
AND A_RCVB ; isolate ready bit
CP A_RCVR ; test it (set flags)
LD A,B ; get the error code back
POP BC ; restore scratch register
RET
;
;-----------------------------------------------------------------------
;
; Test for ready to send a character, Z = ready
;
A_SNDRDY:
PUSH BC ; save scratch register
LD A,(A_BASE) ; IO base address
ADD A,A_CTLP ; status port offset
LD C,A ; put in C for I/O
LD B,0 ; MSB for 16 bit I/O
IN A,(C) ; get modem status
AND A_SNDB ; isolate transmit ready bit
CP A_SNDR ; test for ready value
POP BC ; restore scratch register
RET
;
;-----------------------------------------------------------------------
;
; Report baud rate (index into SPTBL returned in register A)
;
A_SPEED:
LD A,8 ; arbitrarily return 9600 baud
RET
;
;=======================================================================
;=======================================================================
;
; Zilog SIO @ Port 80H
;
;=======================================================================
;=======================================================================
;
; Currently assumes the port address and ordering conventions of the
; official RC2014 SIO module. Will not work with others such as EZZ80
; or ZP.
;
; SIO port constants
;
S_BASE EQU 80H ; SIO base port
S_DATP EQU S_BASE + 1 ; data in port
S_DATO EQU S_BASE + 1 ; data out port
S_CTLP EQU S_BASE + 0 ; control/status port
S_SNDB EQU 04H ; bit to test for send ready
S_SNDR EQU 04H ; value when ready to send
S_RCVB EQU 01H ; bit to test for receive ready
S_RCVR EQU 01H ; value when ready to receive
;
; Following jump table is dynamically patched into real jump
; table at program startup. See MINIT above. Note that only a
; subset of the jump table is overlaid (SENDR to SPEED).
;
S_JPTBL:
JP S_SENDR ; send character (via pop psw)
JP S_CAROK ; test for carrier
JP S_MDIN ; receive data byte
JP S_GETCHR ; get character from modem
JP S_RCVRDY ; check receive ready
JP S_SNDRDY ; check send ready
JP S_SPEED ; get speed value for file transfer time
;
;-----------------------------------------------------------------------
;
; SIO initialization
;
S_INIT:
LD HL,12000 ; Receive loop timeout scalar
LD (RCVSCL),HL ; ... for UART RCVRDY timing
;
; Suppress interrupts
LD A,01H ; WR1
OUT (S_CTLP),A ; Select WR1
XOR A ; No interrupts
OUT (S_CTLP),A ; Do it
;
LD HL,S_JPTBL
LD DE,S_LBL
JP MINIT_RET
;
;-----------------------------------------------------------------------
;
; Send character on top of stack
;
S_SENDR:
POP AF ; get character to send from stack
OUT (S_DATO),A ; send to port
RET
;
;-----------------------------------------------------------------------
;
; Test and report carrier status, Z set if carrier present
;
S_CAROK:
XOR A ; not used, always indicate present
RET
;
;-----------------------------------------------------------------------
;
; Get a character (assume character ready has already been tested)
;
S_MDIN:
S_GETCHR:
IN A,(S_DATP) ; read character from port
RET
;
;-----------------------------------------------------------------------
;
; Test for character ready to receive, Z = ready
; Error code returned in A register
; *** Error code does not seem to be used ***
;
S_RCVRDY:
;XOR A
;OUT (S_CTLP),A ; select WR0
IN A,(S_CTLP) ; get status
AND S_RCVB ; isolate ready bit
CP S_RCVR ; test it (set flags)
LD A,0 ; report no line errors
RET
;
;-----------------------------------------------------------------------
;
; Test for ready to send a character, Z = ready
;
S_SNDRDY:
;XOR A
;OUT (S_CTLP),A ; select WR0
IN A,(S_CTLP) ; get status
AND S_SNDB ; isolate ready bit
CP S_SNDR ; test it (set flags)
LD A,0 ; report no line errors
RET
;
;-----------------------------------------------------------------------
;
; Report baud rate (index into SPTBL returned in register A)
;
S_SPEED:
LD A,8 ; arbitrarily return 9600 baud
RET
;
;=======================================================================
;=======================================================================
;
; HBIOS Console (COM0:)
;
;=======================================================================
;=======================================================================
;
; Following jump table is dynamically patched over initial jump
; table at program startup. See MINIT above. Note that only a
; subset of the jump table is overlaid (SENDR to SPEED).
;
H_JPTBL:
JP H_SENDR ; send character (via pop psw)
JP H_CAROK ; test for carrier
JP H_MDIN ; receive data byte
JP H_GETCHR ; get character from modem
JP H_RCVRDY ; check receive ready
JP H_SNDRDY ; check send ready
JP H_SPEED ; get speed value for file transfer time
;
;-----------------------------------------------------------------------
;
; HBIOS initialization
;
H_INIT:
LD HL,1250 ; Smaller receive loop timeout scalar
LD (RCVSCL),HL ; ... to compensate for BIOS overhead
;
LD HL,H_JPTBL
LD DE,H_LBL
JP MINIT_RET
;
;-----------------------------------------------------------------------
;
; Send character on top of stack
;
H_SENDR:
POP AF ; get character to send from stack
PUSH BC
PUSH DE
PUSH HL
LD B,01H ; HBIOS OUT function
LD C,0 ; console is unit 0 by fiat
LD E,A ; character to E
RST 08 ; HBIOS call
POP HL
POP DE
POP BC
RET
;
;-----------------------------------------------------------------------
;
; Test and report carrier status, Z set if carrier present
;
H_CAROK:
XOR A ; not used, always indicate present
RET
;
;-----------------------------------------------------------------------
;
; Get a character (assume character ready has already been tested)
;
; This routine must NOT block.
;
H_MDIN:
H_GETCHR:
PUSH BC
PUSH DE
PUSH HL
LD B,02H ; HBIOS IST function
LD C,0 ; console is unit 0 by fiat
RST 08 ; HBIOS call, A := bytes pending
JR NZ,H_MDIN1 ; If char(s) waiting, go get it
XOR A ; otherwise, return null
JR H_MDIN2 ; and done
H_MDIN1:
LD B,00H ; HBIOS IN function
LD C,0 ; console is unit 0 by fiat
RST 08 ; HBIOS call
LD A,E ; byte received to A
H_MDIN2:
POP HL
POP DE
POP BC
RET
;
;-----------------------------------------------------------------------
;
; Test for character ready to receive, Z = ready
; Error code returned in A register
; *** Error code does not seem to be used ***
;
H_RCVRDY:
PUSH BC
PUSH DE
PUSH HL
LD B,02H ; HBIOS IST function
LD C,0 ; console is unit 0 by fiat
RST 08 ; HBIOS call, A := bytes pending
SUB 1 ; CF set IFF zero
RL A ; CF to bit 0 of A
AND 01H ; set Z flag as needed
LD A,0 ; report no line errors
POP HL
POP DE
POP BC
RET
;
;-----------------------------------------------------------------------
;
; Test for ready to send a character, Z = ready
;
H_SNDRDY:
PUSH BC
PUSH DE
PUSH HL
LD B,03H ; HBIOS OST function
LD C,0 ; console is unit 0 by fiat
RST 08 ; HBIOS call, A := xmit buf bytes avail
SUB 1 ; CF set IFF zero
RL A ; CF to bit 0 of A
AND 01H ; set Z flag as needed
POP HL
POP DE
POP BC
RET
;
;-----------------------------------------------------------------------
;
; Report baud rate (index into SPTBL returned in register A)
;
H_SPEED:
LD A,8 ; arbitrarily return 9600 baud
RET
;
;
;=======================================================================
;=======================================================================
;
; WILL SOWERBUTTS ECB USB-FIFO
;
;=======================================================================
;=======================================================================
;
UF_BASE EQU 0CH
UF_DATA EQU (UF_BASE+0)
UF_STATUS EQU (UF_BASE+1)
UF_SEND_IMM EQU (UF_BASE+2)
;
; Following jump table is dynamically patched over initial jump
; table at program startup. See MINIT above. Note that only a
; subset of the jump table is overlaid (SENDR to SPEED).
;
UF_JPTBL:
JP UF_SENDR ; send character (via pop psw)
JP UF_CAROK ; test for carrier
JP UF_MDIN ; receive data byte
JP UF_GETCHR ; get character from modem
JP UF_RCVRDY ; check receive ready
JP UF_SNDRDY ; check send ready
JP UF_SPEED ; get speed value for file transfer time
;
;-----------------------------------------------------------------------
;
; USB-FIFO initialization
;
UF_INIT:
LD HL,12000 ; Receive loop timeout scalar
LD (RCVSCL),HL ; ... for UART RCVRDY timing
;
LD HL,UF_JPTBL
LD DE,UF_LBL
JP MINIT_RET
;
;-----------------------------------------------------------------------
;
; Send character on top of stack
;
UF_SENDR:
POP AF ; get character to send from stack
OUT (UF_DATA),A ; WRITE TO FIFO
OUT (UF_SEND_IMM),A ; SEND IMMEDIATE
RET
;
;-----------------------------------------------------------------------
;
; Test and report carrier status, Z set if carrier present
;
UF_CAROK:
XOR A ; not used, always indicate present
RET
;
;-----------------------------------------------------------------------
;
; Get a character (assume character ready has already been tested)
;
; This routine must NOT block.
;
UF_MDIN:
UF_GETCHR:
IN A,(UF_DATA) ; GET CHAR
RET
;
;-----------------------------------------------------------------------
;
; Test for character ready to receive, Z = ready
; Error code returned in A register
; *** Error code does not seem to be used ***
;
UF_RCVRDY:
IN A,(UF_STATUS) ; B7=0 IF CHAR AVAIL, =1 IF NO CHAR.
RLCA ; B0=0 IF CHAR AVAIL, =1 IF NO CHAR.
AND 00000001B ; A=0, ZF=1 IF NO CHAR, A=1, ZF=0 IF CHAR AVAIL,
LD A,0
RET
;
;-----------------------------------------------------------------------
;
; Test for ready to send a character, Z = ready
;
UF_SNDRDY:
IN A,(UF_STATUS) ; Bit 0=0 IF SPACE AVAIL, =1 IF FULL
AND 00000001B ; A=0, ZF=1 IF SPACE AVAIL, A=1, ZF=0 IF FULL.
RET
;
;-----------------------------------------------------------------------
;
; Report baud rate (index into SPTBL returned in register A)
;
UF_SPEED:
LD A,8 ; arbitrarily return 9600 baud
RET
;
END

190
Source/BPBIOS/diskdefs
View File

@@ -297,77 +297,6 @@ diskdef wbw_rom1024
os 2.2
end
# UNA 512KB ROM (128KB reserved, 384KB ROM Disk)
diskdef una_rom512
seclen 512
tracks 12
sectrk 64
blocksize 2048
maxdir 256
skew 0
boottrk 0
os 2.2
end
# UNA 512KB ROM (128KB reserved, 896KB ROM Disk)
diskdef una_rom1024
seclen 512
tracks 28
sectrk 64
blocksize 2048
maxdir 256
skew 0
boottrk 0
os 2.2
end
# RomWBW 8MB Hard Disk, LU 0-3
diskdef wbw_hd0
seclen 512
tracks 65
sectrk 256
blocksize 4096
maxdir 512
skew 0
boottrk 1
os 2.2
end
diskdef wbw_hd1
seclen 512
tracks 130
sectrk 256
blocksize 4096
maxdir 512
skew 0
boottrk 66
os 2.2
end
diskdef wbw_hd2
seclen 512
tracks 195
sectrk 256
blocksize 4096
maxdir 512
skew 0
boottrk 131
os 2.2
end
diskdef wbw_hd3
seclen 512
tracks 260
sectrk 256
blocksize 4096
maxdir 512
skew 0
boottrk 196
os 2.2
end
# RomWBW 720K floppy media
diskdef wbw_fd720
seclen 512
@@ -415,3 +344,122 @@ diskdef wbw_fd120
boottrk 2
os 2.2
end
# RomWBW 8320KB Hard Disk Slice (512 directory entry format)
# Legacy format, 512 dir entries, 16,630 sectors / slice
diskdef wbw_hd512
seclen 512
tracks 1040
sectrk 16
blocksize 4096
maxdir 512
skew 0
boottrk 16
os 2.2
end
# First 4 slices of wbw_hd512
diskdef wbw_hd512_0
seclen 512
tracks 1040
sectrk 16
blocksize 4096
maxdir 512
skew 0
boottrk 16
os 2.2
end
diskdef wbw_hd512_1
seclen 512
tracks 2080
sectrk 16
blocksize 4096
maxdir 512
skew 0
boottrk 1056
os 2.2
end
diskdef wbw_hd512_2
seclen 512
tracks 3120
sectrk 16
blocksize 4096
maxdir 512
skew 0
boottrk 2096
os 2.2
end
diskdef wbw_hd512_3
seclen 512
tracks 4160
sectrk 16
blocksize 4096
maxdir 512
skew 0
boottrk 3136
os 2.2
end
# RomWBW 8MB Hard Disk (1024 directory entry format)
# New format, 1024 dir entries, 16,384 sectors / slice
# Pure filesystem image, no MBR prefix
diskdef wbw_hd1024
seclen 512
tracks 1024
sectrk 16
blocksize 4096
maxdir 1024
skew 0
boottrk 2
os 2.2
end
# First 4 slices of wbw_hd1024
# Assumes 128KB prefix (256 sectors)
diskdef wbw_hd1024_0
seclen 512
tracks 1040
sectrk 16
blocksize 4096
maxdir 1024
skew 0
boottrk 18
os 2.2
end
diskdef wbw_hd1024_1
seclen 512
tracks 2064
sectrk 16
blocksize 4096
maxdir 1024
skew 0
boottrk 1042
os 2.2
end
diskdef wbw_hd1024_2
seclen 512
tracks 3112
sectrk 16
blocksize 4096
maxdir 1024
skew 0
boottrk 2066
os 2.2
end
diskdef wbw_hd1024_3
seclen 512
tracks 4136
sectrk 16
blocksize 4096
maxdir 1024
skew 0
boottrk 3114
os 2.2
end

4
Source/BuildZRC.cmd Normal file
View File

@@ -0,0 +1,4 @@
@echo off
setlocal
setlocal & cd ZRC && call Build || exit /b 1 & endlocal

965
Source/CBIOS/cbios.asm
View File

File diff suppressed because it is too large Load Diff

2
Source/CBIOS/config.asm
View File

@@ -8,7 +8,7 @@ DSKTRACE .EQU FALSE ; ENABLE TRACING OF CBIOS DISK FUNCTION CALLS
CPM_LOC .EQU $D000 ; LOCATION OF START OF CCP
;
#IFDEF PLTWBW
CPM_END .EQU $FE00 ; ROMWBW HBIOS PROXY OCCUPIES TOP 2 PAGES OF MEMORY
CPM_END .EQU $FE00 ; ROMWBW HBIOS PROXY OCCUPIES TOP $280 BYTES OF MEMORY
#ENDIF
;
#IFDEF PLTUNA

12
Source/CBIOS/util.asm
View File

@@ -430,3 +430,15 @@ PRTHEXBUF1:
INC DE
DJNZ PRTHEXBUF1
RET
;
; LEFT SHIFT DE:HL BY B BITS (B > 0)
;
RL32:
OR A ; CLEAR CARRY
RL L
RL H
RL E
RL D
DJNZ RL32
RET

25
Source/CPM3/Build.cmd
View File

@@ -17,15 +17,16 @@ echo.
echo *** CPM Loader ***
echo.
zx RMAC -CPMLDR
zx Z80ASM -UTIL/MF
copy optdsk.lib ldropts.lib
zx Z80ASM -BIOSLDR/MF
move /Y biosldr.rel biosldrd.rel
zx LINK -CPMLDRD[L100]=CPMLDR,BIOSLDRD
zx LINK -CPMLDRD[L100]=CPMLDR,BIOSLDRD,UTIL
move /Y cpmldrd.com cpmldr.bin
copy optcmd.lib ldropts.lib
zx Z80ASM -BIOSLDR/MF
move /Y biosldr.rel biosldrc.rel
zx LINK -CPMLDRC[L100]=CPMLDR,BIOSLDRC
zx LINK -CPMLDRC[L100]=CPMLDR,BIOSLDRC,UTIL
move /Y cpmldrc.com cpmldr.com
rem pause
@@ -101,3 +102,23 @@ rem Loader
tasm -t80 -g3 -fFF loader.asm loader.bin loader.lst
copy /b loader.bin + cpmldr.bin cpmldr.sys
rem Copy OS files to Binary directory
copy cpmldr.com ..\..\Binary\CPM3
copy cpmldr.sys ..\..\Binary\CPM3
copy ccp.com ..\..\Binary\CPM3
copy gencpm.com ..\..\Binary\CPM3
copy genres.dat ..\..\Binary\CPM3
copy genbnk.dat ..\..\Binary\CPM3
copy bios3.spr ..\..\Binary\CPM3
copy bnkbios3.spr ..\..\Binary\CPM3
copy bdos3.spr ..\..\Binary\CPM3
copy bnkbdos3.spr ..\..\Binary\CPM3
copy resbdos3.spr ..\..\Binary\CPM3
copy cpm3res.sys ..\..\Binary\CPM3
copy cpm3bnk.sys ..\..\Binary\CPM3
copy gencpm.dat ..\..\Binary\CPM3
copy cpm3.sys ..\..\Binary\CPM3
copy readme.1st ..\..\Binary\CPM3
copy cpm3fix.pat ..\..\Binary\CPM3

31
Source/CPM3/Makefile
View File

@@ -4,11 +4,19 @@
#
# it does this by overriding OBJECTS in an invoked sub-make
#
OBJECTS = cpmldr.com cpmldr.sys cpm3res cpm3bnk zpmbios3 cpm3.sys gencpm.dat
OTHERS = cpmldr.rel biosldr.rel cpm3res.sys cpm3bnk.sys zpmbios3.spr loader.bin cpmldr.bin
OBJECTS = cpmldr.com cpmldr.sys cpm3res.sys cpm3bnk.sys zpmbios3
OBJECTS += ccp.com gencpm.com genres.dat genbnk.dat
OBJECTS += bdos3.spr bnkbdos3.spr resbdos3.spr
OBJECTS += readme.1st cpm3fix.pat cpm3.sys gencpm.dat
NOCOPY = zpmbios3
OTHERS = cpmldr.rel biosldr.rel cpm3res.sys cpm3bnk.sys loader.bin cpmldr.bin
OTHERS += biosldrc.rel biosldrd.rel
NODELETE = ccp.com gencpm.com genres.dat genbnk.dat bdos3.spr bnkbdos3.spr resbdos3.spr
NODELETE += readme.1st cpm3fix.pat
DEST = ../../Binary/CPM3
TOOLS = ../../Tools
include $(TOOLS)/Makefile.inc
export ZXINCDIR = ../
@@ -25,11 +33,11 @@ DEFCPM3 = bnk
clean:: biosclean
@rm -f bios3.spr bnkbios3.spr zpmbios3.spr cpmldr.com gencpm.dat options.lib ldropts.lib
biosclean:
@rm -f $(BIOSOBJS)
cpm3res:
cpm3res.sys:
make biosclean
cp optres.lib options.lib
cp genres.dat gencpm.dat
@@ -38,7 +46,7 @@ cpm3res:
mv cpm3.sys cpm3res.sys
rm gencpm.dat
cpm3bnk:
cpm3bnk.sys:
make biosclean
cp optbnk.lib options.lib
cp genbnk.dat gencpm.dat
@@ -50,16 +58,14 @@ cpm3bnk:
zpmbios3:
make biosclean
cp optzpm.lib options.lib
cp genbnk.dat gencpm.dat
make OBJECTS=zpmbios3.spr
rm gencpm.dat
make OBJECTS=zpmbios3.spr DEST=
cpmldr.bin: biosldrd.rel cpmldr.rel
$(ZXCC) $(TOOLS)/cpm/bin/LINK -CPMLDRD[L100]=CPMLDR,BIOSLDRD
cpmldr.bin: biosldrd.rel cpmldr.rel util.rel
$(ZXCC) $(TOOLS)/cpm/bin/LINK -CPMLDRD[L100]=CPMLDR,BIOSLDRD,UTIL
mv cpmldrd.com cpmldr.bin
cpmldr.com: biosldrc.rel cpmldr.rel
$(ZXCC) $(TOOLS)/cpm/bin/LINK -CPMLDRC[L100]=CPMLDR,BIOSLDRC
cpmldr.com: biosldrc.rel cpmldr.rel util.rel
$(ZXCC) $(TOOLS)/cpm/bin/LINK -CPMLDRC[L100]=CPMLDR,BIOSLDRC,UTIL
mv cpmldrc.com cpmldr.com
biosldrc.rel: biosldr.z80 optcmd.lib
@@ -89,3 +95,4 @@ gencpm.dat: gen$(DEFCPM3).dat
cpmldr.sys: loader.bin cpmldr.bin
cat loader.bin cpmldr.bin > $@

5
Source/CPM3/bioskrnl.asm
View File

@@ -507,6 +507,11 @@ seldsk:
mov a,m ! inx h ! mov h,m ! mov l,a ; get address of LOGIN routine
call ipchl ; call LOGIN
pop h ; recover DPH pointer
; WBW Start
ora a
rz ; successful return
lxi h,0 ; error occurred, clear HL
; WBW End
not$first$select:
ret

784
Source/CPM3/biosldr.z80
View File

@@ -4,6 +4,12 @@
maclib cpm3.lib
cseg
extrn phex16, phex8
extrn cin, cout
extrn crlf, crlf2
debug equ false
; BIOS Jump vector.
@@ -51,109 +57,211 @@
jp 0 ; reserved for future expansion
jp 0 ; reserved for future expansion
mbrsec equ dtabuf
boot:
; The main module (cpmldr.asm) does not expect the
; boot call to use much stack. We use our own during
; this routine to avoid issues.
ld (stksav),sp
ld sp,stack
; Do the real work
call boot0
; Restore original stack and return
ld sp,(stksav)
ret
boot0:
if cmdline
ld (stksav),sp
ld sp,stack
boot1:
ld de,msgunit
call writestr
call cin
push af
call cout
pop af
sub '0'
ld (unit),a
jr c,selerr
ld bc,0F810h ; HBIOS, get disk unit count
call 0FFF0h ; do it, E := disk unit count
ld a,(unit) ; get unit num back
cp e ; compare to entry
jr nc,selerr ; loop if too high
; Get disk unit from user
ld de,msgunit ; disk unit prompt
call writestr ; display on console
call cin ; get a character
push af ; save it
call cout ; echo character
pop af ; restore it
sub '0' ; convert to binary
ld (unit),a ; save it
jr c,selerr ; loop if below 0 entered
ld bc,0F810h ; HBIOS, get disk unit count
call 0FFF0h ; do it, E := disk unit count
ld a,(unit) ; get unit num back
cp e ; compare to entry
jr nc,selerr ; loop if too high
ld de,msgslc
call writestr
call cin
push af
call cout
pop af
sub '0'
ld (slice),a
jr c,selerr
cp 10
jr nc,selerr
jr boot2
; Get disk slice from user
ld de,msgslc ; slice prompt
call writestr ; display on console
call cin ; get a character
push af ; save it
call cout ; echo it
pop af ; restore it
sub '0' ; convert to binary
ld (slice),a ; save it
jr c,selerr ; loop if below 0 entered
cp 10 ; check for over 9
jr nc,selerr ; loop if over 9
ld de,msgcrlf ; linefeed
call writestr ; ... to console
jr boot2 ; boot w/ unit & slice
selerr:
ld de,msginv
call writestr
jr boot1
; Display invalid entry message and restart
ld de,msginv ; error message
call writestr ; display on console
jr boot1 ; loop
boot2:
ld de,crlf
call writestr
; Record unit & slice w/ HBIOS
ld bc,0F9E0h ; HBIOS func: set boot info
ld a,(unit) ; get unit
ld d,a ; put in D
ld a,(slice) ; get slice
ld e,a ; put in E
ld l,0 ; Bank is always zero
call 0FFF0h ; do it
ld sp,(stksav)
ld bc,0F9E0h ; HBIOS func: set boot info
ld a,(unit) ; get unit
ld d,a ; put in D
ld a,(slice) ; get slice
ld e,a ; put in E
ld l,0 ; Bank is always zero
call 0FFF0h ; do it
else
ld bc,0F8E0h ; HBIOS func: get boot info
call 0FFF0h ; do it, D := boot unit, E: := slice
ld a,d ; move unit to A
ld (unit),a ; save it
ld a,e ; move slice to A
ld (slice),a ; save it
; Get unit & slice from HBIOS
ld bc,0F8E0h ; HBIOS func: get boot info
call 0FFF0h ; do it, D := boot unit, E: := slice
ld a,d ; move unit to A
ld (unit),a ; save it
ld a,e ; move slice to A
ld (slice),a ; save it
endif
ld a,(unit) ; Get boot unit
ld c,a ; put in C
ld b,18h ; HBIOS Media function
ld e,1 ; Enable media check/discovery
call 0FFF0H ; HBIOS call
ld a,e ; Resultant media id to accum
or a ; Set flags
;halt
;
; !!! Need to do something on error !!!
;
ret z ; Bail out on error
; Check that drive actually exists
ld bc,0F810h ; HBIOS func: get disk count
call 0FFF0h ; do it, E=disk count
ld a,(unit) ; get boot disk unit
cp e ; compare to count
jp nc,err_nodisk ; handle no disk err
; Sense media to determine media format
ld a,(unit) ; Get boot unit
ld c,a ; put in C
ld b,18h ; HBIOS Media function
ld e,1 ; Enable media check/discovery
call 0FFF0H ; HBIOS call
jp nz,err_diskio ; handle error
ld a,e ; resultant media id to accum
ld (medid),a ; save media id
or a ; set flags, 0 is no media
jp z,err_diskio ; handle no media error
; Initialize slice start LBA & sectors per slice
ld hl,0 ; assume slice starts
ld (lba),hl ; ... at LBA offset
ld (lba+2),hl ; ... of zero
ld hl,16640 ; assume legacy value for
ld (sps),hl ; ... sectors per slice
; If not hard disk, skip partition & slice stuff
ld a,(medid) ; get media id
cp 4 ; hard disk?
jr nz,boot9 ; if not, jump ahead
; Read MBR
ld de,8000h ; LBA address zero
ld hl,0 ; ... to read first sector
ld bc,mbrsec ; read into MBR buffer
ld (dma),bc ; save
ld b,1 ; one sector
ld a,(unit) ; get bootunit
ld c,a ; put in C
call diskread ; do it, no return on err
; Check signature
ld hl,(mbrsec+1FEh) ; get signature
ld a,l ; first byte
cp 055h ; should be $55
jr nz,boot5 ; if not, no part table
ld a,h ; second byte
cp 0AAh ; should be $AA
jr nz,boot5 ; if not, no part table
; Search part table for CP/M entry (type 0x2E)
ld b,4 ; four entries in part table
ld hl,mbrsec+1BEh+4 ; offset of first part type
boot3:
ld a,(hl) ; get part type
cp 2Eh ; CP/M partition?
jr z,boot4 ; cool, grab the LBA offset
ld de,16 ; part table entry size
add hl,de ; bump to next part type
djnz boot3 ; loop thru table
jr boot5 ; too bad, no CP/M partition
boot4:
; Capture the starting LBA of the CP/M partition we found
ld de,4 ; LBA is 4 bytes after part type
add hl,de ; point to it
ld de,lba ; loc to store lba offset
ld bc,4 ; 4 bytes (32 bits)
ldir ; copy it
; For now, it is implied that a slice within a partition
; table will be in the "new" disk format. So, we now
; adjust the sectors per slice and media id.
; Use new slice format sectors per slice value
ld hl,16384 ; new sectors per slice
ld (sps),hl ; save it
; Update media id for new hard disk format
ld a,10 ; new media id
ld (medid),a ; save it
boot5:
; Adjust LBA offset based on target slice
ld a,(slice) ; get boot slice, A is loop cnt
ld hl,(lba) ; set DE:HL
ld de,(lba+2) ; ... to starting LBA
ld bc,(sps) ; sectors per slice
boot6:
or a ; set flags to check loop cntr
jr z,boot8 ; done if counter exhausted
add hl,bc ; add one slice to low word
jr nc,boot7 ; check for carry
inc de ; if so, bump high word
boot7:
dec a ; dec loop downcounter
jr boot6 ; and loop
boot8:
ld (lba),hl ; save new lba, low word
ld (lba+2),de ; save new lba, high word
boot9:
; Locate DPB corresponding to media id
ld hl,dpb$start - dpb$sz
ld de,dpb$sz
ld b,a ; loop count
dsk$login1:
add hl,de ; next dpb
djnz dsk$login1 ; loop as needed
; hl is ptr to desired dpb
ld de,dph0 ; load DPH pointer
ex de,hl ; de = DPB adr, hl = DPH adr
push de ; save DPB adr
ld de,12 ; offset of DPB in DPH
add hl,de ; hl = adr of DPB field in DPH
pop de ; recover DPB adr
ld (hl),e ; update LSB
inc hl
ld (hl),d ; udpate MSB
ld a,(medid) ; get media id
ld b,a ; to loop count
boot10:
add hl,de ; next dpb
djnz boot10 ; loop as needed
; Stuff DPB ptr (HL) into DPH
ld de,dph0 ; load DPH pointer
ex de,hl ; de = DPB adr, hl = DPH adr
push de ; save DPB adr
ld de,12 ; offset of DPB in DPH
add hl,de ; hl = adr of DPB field in DPH
pop de ; recover DPB adr
ld (hl),e ; update LSB
inc hl ; point to MSB
ld (hl),d ; update MSB
ret ; done
ret
wboot:
ld a,81H
halt
@@ -162,15 +270,14 @@ const:
ld a,82H
halt
conin:
ld bc,0080H ; unit 80h (console), func 0 = CIN
call 0FFF0H
ld bc,0080h ; unit 80h (console), func 0 = CIN
call 0FFF0h ; do it
ld a,e ; put in C
ret ; done
conout:
ld e,c ; output character in E
ld bc,0180H ; unit 80h (console), func 1 = COUT
;rst 08 ; do it
call 0FFF0H
ret ; return
ld e,c ; output character in E
ld bc,0180h ; unit 80h (console), func 1 = COUT
jp 0FFF0h
list:
ld a,85H
halt
@@ -195,63 +302,122 @@ setsec:
ld (sect),bc
ret
setdma:
if debug
push hl
push bc
pop hl
call crlf
call phex16
pop hl
endif
ld (dma),bc
ret
read:
ld a,(unit) ; get unit
ld c,a ; BIOS Disk Unit in C
ld b,12H ; HBIOS SEEK function
push bc ; save it
;push de ; save XDPH pointer
ld b,17h ; HBIOS DEVICE function
rst 08 ; Do it, D=device type
ld a,d ; put in accum
and 0F0h ; isolate high bits
ld b,1 ; assume it is floppy, 1 head bit
ld c,01h ; 1 bit head mask
cp 10h ; floppy?
jr z,seek0 ; yup, skip ahead
ld b,4 ; must be hard disk, 4 head bits
ld c,0Fh ; 4 bit head mask
seek0:
;pop de ; recover XDPH pointer
push bc ; save bc
ld a,(slice) ; get slice
ld e,a ; slice to E
ld h,65 ; number of tracks per slice
call mult8 ; HL now has track offset for slice
pop bc ; recover bc
push hl ; save track offset for now
ld hl,(trk) ; get track value
ld a,l ; lsb of track to a
and c ; apply mask
ld d,a ; save in d
seek1:
srl h ; shift one bit out
rr l ; ... of hl
djnz seek1 ; do all bits
ld a,(sect) ; get sector
ld e,a ; stuff it in e
ex de,hl ; de=track, hl=head/sect
ex (sp),hl ; save head/sect, hl = offset
add hl,de ; hl has final track value
pop de ; recover head/sect to de
pop bc ; recover function & unit
;rst 08 ; perform seek
call 0FFF0H
; Read Sector
ld b,13h ; HBIOS read
ld a,(unit) ; get boot unit
ld c,a ; put in C
ld hl,(dma) ; dma address
ld a,(0FFE0H) ; current bank
ld d,a ; ... to D
ld e,1 ; 1 sector
;rst 08
call 0FFF0H
read:
if debug
call crlf
ld a,(unit)
call phex8
ld a,' '
call cout
ld hl,(trk)
call phex16
ld a,' '
call cout
ld hl,(sect)
call phex16
ld a,' '
call cout
ld hl,(lba+2)
call phex16
ld hl,(lba+0)
call phex16
ret
endif
; Check device type
ld a,(unit) ; get unit
ld c,a ; BIOS Disk Unit in C
ld b,17h ; HBIOS DEVICE function
rst 08 ; Do it, D=device type
ld a,d ; put in accum
and 0F0h ; isolate high bits
cp 10h ; floppy?
jr nz,read2 ; if not, do LBA i/o
; Floppy I/O
ld de,(sect) ; sector -> de, head(d) becomes zero
ld hl,(trk) ; track -> hl (low bit has head)
srl h ; shift head bit out of hl
rr l ; ... and into carry
rl d ; carry bit (head) into d
jr read3 ; do the disk i/o
; LBA I/O
read2:
ld hl,(trk) ; get track
ld de,0 ; clear hiword
ld b,4 ; x16 (16 spt assumed)
call rl32 ; do it
; combine with sector
ld a,(sect) ; get sector
or l ; combine
ld l,a ; and back to L
; add in lba offset
ld bc,(lba) ; lba offset loword
add hl,bc ; add to cur loword
ex de,hl ; swap
ld bc,(lba+2) ; lba offset hiword
adc hl,bc ; add w/ carry to cur hiword
ex de,hl ; swap back
set 7,d ; set lba access bit
read3:
if debug
ld a,' '
call cout
ex de,hl
call phex16
ex de,hl
call phex16
endif
; DE:HL has sector address to read (LBA or CHS)
ld a,(unit) ; get disk unit
ld c,a ; put in C
ld b,1 ; read 1 sector
jr diskread ; read sector and return
diskread:
; Read disk sector(s)
; DE:HL is LBA, B is sector count, C is disk unit
; Seek to requested sector in DE:HL
push bc ; save unit & count
ld b,012h ; HBIOS func: seek
call 0FFF0h ; do it
pop bc ; recover unit & count
jp nz,err_diskio ; handle error
; Read sector(s) into buffer
ld e,b ; transfer count
ld b,013h ; HBIOS func: disk read
ld hl,(dma) ; read into info sec buffer
ld a,(0FFE0h) ; get current bank
ld d,a ; put in D
call 0FFF0h ; do it
jp nz,err_diskio ; handle error
xor a ; signal success
ret ; and done
write:
ld a,8EH
halt
@@ -291,10 +457,11 @@ flush:
halt
move:
ex de,hl ; we are passed source in DE and dest in HL
ldir ; use Z80 block move instruction
ex de,hl ; need next addresses in same regs
ret
; On input, DE=src, HL=dest
ex de,hl ; swap HL/DE for LDIR
ldir ; Z80 block move
ex de,hl ; swap back (required!)
ret ; done
time:
ld a,9AH
halt
@@ -307,22 +474,21 @@ setbnk:
xmove:
ld a,9DH
halt
cin:
; input character from console via hbios
ld c,080H ; console unit to c
ld b,00H ; hbios func: input char
call 0FFF0H ; hbios reads character
ld a,e ; move character to a for return
ret
cout:
; output character to console via hbios
ld e,a ; output char to e
ld c,080H ; console unit to c
ld b,01H ; hbios func: output char
call 0FFF0H ; hbios outputs character
ret
;cin:
; ; Input character from console via HBIOS
; ld c,080H ; console unit to C
; ld b,00H ; HBIOS func: input char
; call 0FFF0H ; HBIOS reads character
; ld a,e ; To A for return
; ret ; done
;cout:
; ; Output character to console via HBIOS
; ld e,a ; output char to E
; ld c,080H ; console unit to C
; ld b,01H ; HBIOS func: output char
; jp 0FFF0H ; output & return
writestr:
push af
@@ -339,153 +505,190 @@ writestr2:
pop af
ret
;
; multiply 8-bit values
; in: multiply h by e
; out: hl = result, e = 0, b = 0
;
mult8:
ld d,0
ld l,d
ld b,8
mult8_loop:
add hl,hl
jr nc,mult8_noadd
add hl,de
mult8_noadd:
djnz mult8_loop
ret
rl32:
; Left shift DE:HL by B bits (B > 0)
or a ; clear carry
rl l ; rotate L thru carry
rl h ; rotate H thru carry
rl e ; rotate E thru carry
rl d ; rotate D thru carry
djnz rl32 ; loop B times
ret ; done
err_nodisk:
ld hl,str_err_nodisk
jr err
err_noslice:
ld hl,str_err_noslice
jr err
err_diskio:
ld hl,str_err_diskio
jr err
err_sig:
ld hl,str_err_sig
jr err
err_api:
ld hl,str_err_api
jr err
err:
push hl
ld de,str_err_prefix
call writestr
pop de
call writestr
halt
str_err_prefix db "\r\n\r\n*** ","$"
str_err_nodisk db "Disk unit not available","$"
str_err_noslice db "Disk unit does not support slices","$"
str_err_diskio db "Disk I/O failure","$"
str_err_sig db "No system image on disk","$"
str_err_api db "HBIOS API failure","$"
msgunit db 13,10,13,10,'Boot CP/M 3 from Disk Unit: $'
msgslc db ' Slice: $'
msginv db 13,10,13,10,'*** Invalid Selection ***$'
crlf db 13,10,'$'
msgcrlf db 13,10,'$'
dpb$start:
dpb$rom: ; 384K ROM Drive
dw 64 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 1 ; exm: extent mask
dw 192 - 1 ; dsm: total storage in blocks - 1 = (384kb / 2k bls) - 1 = 191
dw 256 - 1 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8000h ; cks: directory check vector size - permanent storage = 8000H
dw 0 ; off: reserved tracks = 16 trks * (16 trks * 16 heads * 16 secs * 512 bytes) = 128k
dw 64 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 1 ; exm: extent mask
dw 192 - 1 ; dsm: total storage in blocks - 1 = (384kb / 2k bls) - 1 = 191
dw 256 - 1 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8000h ; cks: directory check vector size - permanent storage = 8000H
dw 0 ; off: reserved tracks = 16 trks * (16 trks * 16 heads * 16 secs * 512 bytes) = 128k
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
dpb$sz equ $ - dpb$start
dpb$ram: ; 256K RAM Drive
dw 64 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 1 ; exm: extent mask
dw 128 - 1 ; dsm: total storage in blocks - 1 = (256kb / 2k bls) - 1 = 127
dw 256 - 1 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8000h ; cks: directory check vector size - permanent storage = 8000H
dw 0 ; off: reserved tracks = 16 trks * (16 trks * 16 heads * 16 secs * 512 bytes) = 128k
dw 64 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 1 ; exm: extent mask
dw 128 - 1 ; dsm: total storage in blocks - 1 = (256kb / 2k bls) - 1 = 127
dw 256 - 1 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8000h ; cks: directory check vector size - permanent storage = 8000H
dw 0 ; off: reserved tracks = 16 trks * (16 trks * 16 heads * 16 secs * 512 bytes) = 128k
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
dpb$rf: ; 4MB RAM Floppy Drive
dw 64 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 2047 ; dsm: total storage in blocks - 1 = (4mb / 2k bls) - 1 = 2047
dw 255 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8000h ; cks: directory check vector size - permanent storage = 8000H
dw 0 ; off: reserved tracks = 0 trks
dw 64 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 2047 ; dsm: total storage in blocks - 1 = (4mb / 2k bls) - 1 = 2047
dw 255 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8000h ; cks: directory check vector size - permanent storage = 8000H
dw 0 ; off: reserved tracks = 0 trks
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
dpb$hd: ; 8MB Hard Disk Drive
dw 64 ; spt: sectors per track
db 5 ; bsh: block shift factor
db 31 ; blm: block mask
db 1 ; exm: extent mask
dw 2047 ; dsm: total storage in blocks - 1 = (8mb / 4k bls) - 1 = 2047
dw 511 ; drm: dir entries - 1 = 512 - 1 = 511
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8000h ; cks: directory check vector size - permanent storage = 8000H
dw 16 ; off: reserved tracks = 16 trks * (16 trks * 16 heads * 16 secs * 512 bytes) = 128k
dw 64 ; spt: sectors per track
db 5 ; bsh: block shift factor
db 31 ; blm: block mask
db 1 ; exm: extent mask
dw 2047 ; dsm: total storage in blocks - 1 = (8mb / 4k bls) - 1 = 2047
dw 512-1 ; drm: dir entries - 1 = 512 - 1 = 511
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8000h ; cks: directory check vector size - permanent storage = 8000H
dw 16 ; off: reserved tracks = 16 trks * (16 trks * 16 heads * 16 secs * 512 bytes) = 128k
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
dpb$fd720: ; 3.5" DS/DD Floppy Drive (720K)
dw 36 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 350 ; dsm: total storage in blocks - 1 blk = ((720k - 18k off) / 2k bls) - 1 = 350
dw 127 ; drm: dir entries - 1 = 128 - 1 = 127
db 11000000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 32 ; cks: directory check vector size = 128 / 4
dw 4 ; off: reserved tracks = 4 trks * (512 b/sec * 36 sec/trk) = 18k
dw 36 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 350 ; dsm: total storage in blocks - 1 blk = ((720k - 18k off) / 2k bls) - 1 = 350
dw 127 ; drm: dir entries - 1 = 128 - 1 = 127
db 11000000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 32 ; cks: directory check vector size = 128 / 4
dw 4 ; off: reserved tracks = 4 trks * (512 b/sec * 36 sec/trk) = 18k
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
dpb_fd144: ; 3.5" DS/HD Floppy Drive (1.44M)
dw 72 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 710 ; dsm: total storage in blocks - 1 blk = ((1,440k - 18k off) / 2k bls) - 1 = 710
dw 255 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 64 ; cks: directory check vector size = 256 / 4
dw 2 ; off: reserved tracks = 2 trks * (512 b/sec * 72 sec/trk) = 18k
dw 72 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 710 ; dsm: total storage in blocks - 1 blk = ((1,440k - 18k off) / 2k bls) - 1 = 710
dw 255 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 64 ; cks: directory check vector size = 256 / 4
dw 2 ; off: reserved tracks = 2 trks * (512 b/sec * 72 sec/trk) = 18k
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
dpb_fd360: ; 5.25" DS/DD Floppy Drive (360K)
dw 36 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 1 ; exm: extent mask
dw 170 ; dsm: total storage in blocks - 1 blk = ((360k - 18k off) / 2k bls) - 1 = 170
dw 127 ; drm: dir entries - 1 = 128 - 1 = 127
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 32 ; cks: directory check vector size = 128 / 4
dw 4 ; off: reserved tracks = 4 trks * (512 b/sec * 36 sec/trk) = 18k
dpb_fd360: ; 5.25" DS/DD Floppy Drive (360K)
dw 36 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 1 ; exm: extent mask
dw 170 ; dsm: total storage in blocks - 1 blk = ((360k - 18k off) / 2k bls) - 1 = 170
dw 127 ; drm: dir entries - 1 = 128 - 1 = 127
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 32 ; cks: directory check vector size = 128 / 4
dw 4 ; off: reserved tracks = 4 trks * (512 b/sec * 36 sec/trk) = 18k
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
dpb_fd120: ; 5.25" DS/HD Floppy Drive (1.2M)
dw 60 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 591 ; dsm: total storage in blocks - 1 blk = ((1,200k - 15k off) / 2k bls) - 1 = 591
dw 255 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 64 ; cks: directory check vector size = 256 / 4
dw 2 ; off: reserved tracks = 2 trks * (512 b/sec * 60 sec/trk) = 15k
dw 60 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 591 ; dsm: total storage in blocks - 1 blk = ((1,200k - 15k off) / 2k bls) - 1 = 591
dw 255 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 64 ; cks: directory check vector size = 256 / 4
dw 2 ; off: reserved tracks = 2 trks * (512 b/sec * 60 sec/trk) = 15k
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
dpb_fd111: ; 8" DS/DD Floppy Drive (1.11M)
dw 60 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 569 ; dsm: total storage in blocks - 1 blk = ((1,155k - 15k off) / 2k bls) - 1 = 569
dw 255 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 64 ; cks: directory check vector size = 256 / 4
dw 2 ; off: reserved tracks = 2 trks * (512 b/sec * 60 sec/trk) = 15k
dw 60 ; spt: sectors per track
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 569 ; dsm: total storage in blocks - 1 blk = ((1,155k - 15k off) / 2k bls) - 1 = 569
dw 255 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 64 ; cks: directory check vector size = 256 / 4
dw 2 ; off: reserved tracks = 2 trks * (512 b/sec * 60 sec/trk) = 15k
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
dpb$hdnew: ; 8MB Hard Disk Drive (new format)
dw 64 ; spt: sectors per track
db 5 ; bsh: block shift factor
db 31 ; blm: block mask
db 1 ; exm: extent mask
dw 2048 - 1 - 4 ; dsm: total storage in blocks - 1 = 2048 - 1 - resvd tracks
dw 1024 - 1 ; drm: dir entries
db 11111111b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8000h ; cks: directory check vector size - permanent storage = 8000H
dw 2 ; off: reserved tracks
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
@@ -493,13 +696,13 @@ dph0: dw 0 ; xlt, 0 means no translation
db 0,0,0,0,0,0,0,0,0 ; scratch (9 bytes)
db 0 ; mf: media flag
dw dpb$hd ; dpb
dw csvbuf ; csv:
dw alvbuf ; alv:
dw csvbuf ; csv:
dw alvbuf ; alv:
dw dirbcb ; dirbcb
dw dtabcb ; dtabcb
dw 0ffffh ; hash (disabled)
db 0 ; hbank
dtbl: dtbl dph0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
dirbcb: db 0ffh ; drv
@@ -524,13 +727,32 @@ trk ds 2 ; current track
sect ds 2 ; current sector
dma ds 2 ; current DMA address
csvbuf ds 128 ; length (CSV) = ((DRM+1)/4)
alvbuf ds 512 ; length (ALV) = ((DSM+1)/4)
dirbuf ds 512 ; sector buffer
dtabuf ds 512 ; sector buffer
medid ds 1 ; media id
lba ds 4 ; current lba
sps ds 2 ; sectors per slice
ds 64
stack equ $
stksav dw 0
stksav ds 2
csvbufs equ 256
alvbufs equ 512
dirbufs equ 512
dtabufs equ 512
;csvbuf ds 256 ; length (CSV) = ((DRM+1)/4)
;alvbuf ds 512 ; length (ALV) = ((DSM+1)/4)
;dirbuf ds 512 ; sector buffer
;dtabuf ds 512 ; sector buffer
; Trying to save space. The loader must fit underneath
; the start of BNKBDOS3 and we have a big BNKBDOS because
; of all the disk allocations. Putting these buffers
; in upper memory actually helps quite a bit.
csvbuf equ 8000h
alvbuf equ csvbuf + csvbufs
dirbuf equ alvbuf + alvbufs
dtabuf equ dirbuf + dirbufs
end

98
Source/CPM3/boot.z80
View File

@@ -14,9 +14,12 @@
extrn @date,@hour,@min,@sec
extrn @srch1
extrn @hbbio
extrn addhla, bcd2bin, bin2bcd
extrn cout, phex8, phex16, crlf, crlf2
extrn addhla
;extrn phex16, phex8
;extrn cin, cout
;extrn crlf, crlf2
extrn bcd2bin, bin2bcd
include c:ver.lib
bdos equ 5
@@ -41,7 +44,7 @@ tpa$bank equ 0
if banked
; Clone page zero from bank 0 to additional banks
ld b,3 ; last bank
ld b,4 ; last bank
ld c,0 ; src bank
init$2:
push bc ; save bank id's
@@ -59,6 +62,23 @@ init$2:
ld hl,signon$msg ; signon message
call ?pmsg ; print it
; Check for HBIOS/CBIOS mismatch
ld b,0F1h ; hbios version
rst 08 ; do it, de=maj/min/up/pat
ld a,d ; a := maj/min
cp ((rmj << 4) | rmn) ; match?
jr nz,init$3 ; handle ver mismatch
ld a,e ; a := os up/pat
and 0F0h ; pat not included in match
cp (rup << 4) ; match?
jr nz,init$3 ; handle ver mismatch
jr init$4 ; all good, continue
init$3:
; display version mismatch
ld hl,vermis$msg ; version mismatch
call ?pmsg ; display it
init$4:
; Get boot disk unit and save it
ld bc,0F8E0h ; HBIOS func: get boot info
rst 08 ; do it, D := boot unit, E: := boot slice
@@ -228,25 +248,26 @@ dinit6:
pop de ; restore drive list ptr
inc de ; increment active drive list ptr
djnz dinit6 ; loop as needed
ret
; zero out remaining dph table entries
ld a,16 ; dph table entries
sub l ; subtract entries used
ret z ; return if all entries used
ld b,a ; save as loop counter
ld a,l ; current dph to accum
rlca ; *2 for word entry
ld hl,@dtbl ; start of dtbl
call addhla ; hl now points to entry
dinit6a:
xor a ; zero accum
ld (hl),a ; zero lsb
inc hl ; next byte
ld (hl),a ; zero msb
inc hl ; next byte
djnz dinit6a
ret ; finished
; ; zero out remaining dph table entries
; ld a,16 ; dph table entries
; sub l ; subtract entries used
; ret z ; return if all entries used
; ld b,a ; save as loop counter
; ld a,l ; current dph to accum
; rlca ; *2 for word entry
; ld hl,@dtbl ; start of dtbl
; call addhla ; hl now points to entry
;
;dinit6a:
; xor a ; zero accum
; ld (hl),a ; zero lsb
; inc hl ; next byte
; ld (hl),a ; zero msb
; inc hl ; next byte
; djnz dinit6a
; ret ; finished
dinit7: ; process a unit (all slices)
ld e,0 ; initialize slice index
@@ -380,18 +401,18 @@ fill:
?ldccp:
; Force CCP to use system boot drive as initial default
ld a,(@sysdr) ; get system boot drive
ld (@ccpdr),a ; set CCP current drive
;ld a,(@sysdr) ; get system boot drive
;ld (@ccpdr),a ; set CCP current drive
; First time, load the CCP.COM file into TPA
ld a,(@sysdr) ; get system boot drive
;ld (4),a ; save in page zero???
inc a ; drive + 1 for FCB
ld (ccp$fcb),a ; stuff into FCB
add 'A' - 1 ; drive letter
ld (ccp$msg$drv),a ; save for load msg
xor a
ld (ccp$fcb+15),a
;ld a,(@sysdr) ; get system boot drive
;;ld (4),a ; save in page zero???
;inc a ; drive + 1 for FCB
;ld (ccp$fcb),a ; stuff into FCB
;add 'A' - 1 ; drive letter
;ld (ccp$msg$drv),a ; save for load msg
;xor a
;ld (ccp$fcb+15),a
ld hl,0
ld (fcb$nr),hl
ld de,ccp$fcb
@@ -670,6 +691,7 @@ read:
clrflg db 0 ; RAM disk cleared flag
clr$msg db 'RAM Disk Initialized',13,10,13,10,0
vermis$msg db 7,'*** WARNING: HBIOS/CBIOS Version Mismatch ***',13,10,13,10,0
if zpm
@@ -677,16 +699,16 @@ signon$msg db 13,10,'ZPM3'
if banked
db ' [BANKED]'
endif
db ' on HBIOS v'
db ' for HBIOS v'
biosver
db 13,10,13,10,0
ccp$msg db 13,10,'BIOS Err on '
ccp$msg$drv db '?'
ccp$msg$drv db 'A'
db ': No ZCCP.COM file',0
ccp$fcb db 0,'ZCCP ','COM',0,0,0,0
ccp$fcb db 1,'ZCCP ','COM',0,0,0,0
ds 16
fcb$nr db 0,0,0
@@ -696,16 +718,16 @@ signon$msg db 13,10,'CP/M v3.0'
if banked
db ' [BANKED]'
endif
db ' on HBIOS v'
db ' for HBIOS v'
biosver
db 13,10,13,10,0
ccp$msg db 13,10,'BIOS Err on '
ccp$msg$drv db '?'
ccp$msg$drv db 'A'
db ': No CCP.COM file',0
ccp$fcb db 0,'CCP ','COM',0,0,0,0
ccp$fcb db 1,'CCP ','COM',0,0,0,0
ds 16
fcb$nr db 0,0,0

626
Source/CPM3/diskio.z80
View File

@@ -37,7 +37,7 @@
extrn ?bnkxlt
;extrn phex8, cout
extrn phex8, cout
; CP/M 3 Disk definition macros
@@ -60,113 +60,129 @@ bell equ 7
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph0: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph1: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph2: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph3: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph4: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph5: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph6: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph7: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph8: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph9: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph10: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph11: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph12: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph13: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph14: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
dw dsk$write
dw dsk$read
dw dsk$login
dw dsk$init
db 0,0 ; HBIOS Disk Unit/Slice (filled in at boot)
db 0FFh,0FFh ; HBIOS Disk Unit/Slice (filled in at boot)
dph15: dph 0,dpb$max ; Real DPB filled in at disk login
dw 0, 0 ; LBA Offset
cseg ; DPB must be resident
@@ -175,11 +191,12 @@ dpb$max:
db 5 ; bsh: block shift factor
db 31 ; blm: block mask
db 1 ; exm: extent mask
dw 2047 ; dsm: total storage in blocks - 1 = (8mb / 4k bls) - 1 = 2047
dw 511 ; drm: dir entries - 1 = 512 - 1 = 511
db 11110000b ; al0: dir blk bit map, first byte
dw 2048 - 1 ; dsm: total storage in blocks - 1 = (8mb / 4k bls) - 1 = 2047
dw 1024 - 1 ; drm: dir entries - 1
db 11111111b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 64 ; cks: directory check vector size - 256 / 4
;dw 64 ; cks: directory check vector size - 256 / 4
dw 256 ; cks: directory check vector size - 1024 / 4
dw 0 ; off: reserved tracks = 16 trks * (16 trks * 16 heads * 16 secs * 512 bytes) = 128k
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
@@ -194,7 +211,7 @@ dpb$rom: ; 384K ROM Drive
dw 256 - 1 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8000h ; cks: directory check vector size - permanent storage = 8000H
dw 8040h ; cks: directory check vector size - permanent storage = 8000H
dw 0 ; off: reserved tracks = 16 trks * (16 trks * 16 heads * 16 secs * 512 bytes) = 128k
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
@@ -209,7 +226,7 @@ dpb$ram: ; 256K RAM Drive
dw 256 - 1 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8000h ; cks: directory check vector size - permanent storage = 8000H
dw 8040h ; cks: directory check vector size - permanent storage = 8000H
dw 0 ; off: reserved tracks = 16 trks * (16 trks * 16 heads * 16 secs * 512 bytes) = 128k
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
@@ -219,25 +236,25 @@ dpb$rf: ; 4MB RAM Floppy Drive
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 2047 ; dsm: total storage in blocks - 1 = (4mb / 2k bls) - 1 = 2047
dw 255 ; drm: dir entries - 1 = 256 - 1 = 255
dw 2048 - 1 ; dsm: total storage in blocks - 1 = (4mb / 2k bls) - 1 = 2047
dw 256 - 1 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8000h ; cks: directory check vector size - permanent storage = 8000H
dw 8040h ; cks: directory check vector size - permanent storage = 8000H
dw 0 ; off: reserved tracks = 0 trks
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
dpb$hd: ; 8MB Hard Disk Drive
dpb$hd: ; 8MB Hard Disk Drive w/ 512 dir entries
dw 64 ; spt: sectors per track
db 5 ; bsh: block shift factor
db 31 ; blm: block mask
db 1 ; exm: extent mask
dw 2047 ; dsm: total storage in blocks - 1 = (8mb / 4k bls) - 1 = 2047
dw 511 ; drm: dir entries - 1 = 512 - 1 = 511
dw 2048 - 1 ; dsm: total storage in blocks - 1 = (8mb / 4k bls) - 1 = 2047
dw 512 - 1 ; drm: dir entries - 1 = 512 - 1 = 511
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8000h ; cks: directory check vector size - permanent storage = 8000H
dw 8080h ; cks: directory check vector size - permanent storage = 8000H
dw 16 ; off: reserved tracks = 16 trks * (16 trks * 16 heads * 16 secs * 512 bytes) = 128k
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
@@ -247,8 +264,8 @@ dpb$fd720: ; 3.5" DS/DD Floppy Drive (720K)
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 350 ; dsm: total storage in blocks - 1 blk = ((720k - 18k off) / 2k bls) - 1 = 350
dw 127 ; drm: dir entries - 1 = 128 - 1 = 127
dw 351 - 1 ; dsm: total storage in blocks - 1 blk = ((720k - 18k off) / 2k bls) - 1 = 350
dw 128 - 1 ; drm: dir entries - 1 = 128 - 1 = 127
db 11000000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 32 ; cks: directory check vector size = 128 / 4
@@ -261,8 +278,8 @@ dpb_fd144: ; 3.5" DS/HD Floppy Drive (1.44M)
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 710 ; dsm: total storage in blocks - 1 blk = ((1,440k - 18k off) / 2k bls) - 1 = 710
dw 255 ; drm: dir entries - 1 = 256 - 1 = 255
dw 711 - 1 ; dsm: total storage in blocks - 1 blk = ((1,440k - 18k off) / 2k bls) - 1 = 710
dw 256 - 1 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 64 ; cks: directory check vector size = 256 / 4
@@ -275,8 +292,8 @@ dpb_fd360: ; 5.25" DS/DD Floppy Drive (360K)
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 1 ; exm: extent mask
dw 170 ; dsm: total storage in blocks - 1 blk = ((360k - 18k off) / 2k bls) - 1 = 170
dw 127 ; drm: dir entries - 1 = 128 - 1 = 127
dw 171 - 1 ; dsm: total storage in blocks - 1 blk = ((360k - 18k off) / 2k bls) - 1 = 170
dw 128 - 1 ; drm: dir entries - 1 = 128 - 1 = 127
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 32 ; cks: directory check vector size = 128 / 4
@@ -289,8 +306,8 @@ dpb_fd120: ; 5.25" DS/HD Floppy Drive (1.2M)
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 591 ; dsm: total storage in blocks - 1 blk = ((1,200k - 15k off) / 2k bls) - 1 = 591
dw 255 ; drm: dir entries - 1 = 256 - 1 = 255
dw 592 - 1 ; dsm: total storage in blocks - 1 blk = ((1,200k - 15k off) / 2k bls) - 1 = 591
dw 256 - 1 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 64 ; cks: directory check vector size = 256 / 4
@@ -303,8 +320,8 @@ dpb_fd111: ; 8" DS/DD Floppy Drive (1.11M)
db 4 ; bsh: block shift factor
db 15 ; blm: block mask
db 0 ; exm: extent mask
dw 569 ; dsm: total storage in blocks - 1 blk = ((1,155k - 15k off) / 2k bls) - 1 = 569
dw 255 ; drm: dir entries - 1 = 256 - 1 = 255
dw 570 - 1 ; dsm: total storage in blocks - 1 blk = ((1,155k - 15k off) / 2k bls) - 1 = 569
dw 256 - 1 ; drm: dir entries - 1 = 256 - 1 = 255
db 11110000b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 64 ; cks: directory check vector size = 256 / 4
@@ -312,6 +329,20 @@ dpb_fd111: ; 8" DS/DD Floppy Drive (1.11M)
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
dpb$hdnew: ; 8MB Hard Disk Drive (new format)
dw 64 ; spt: sectors per track
db 5 ; bsh: block shift factor
db 31 ; blm: block mask
db 1 ; exm: extent mask
dw 2048 - 1 - 4 ; dsm: total storage in blocks - 1 = 2048 - 1 - resvd tracks
dw 1024 - 1 ; drm: dir entries
db 11111111b ; al0: dir blk bit map, first byte
db 00000000b ; al1: dir blk bit map, second byte
dw 8100h ; cks: directory check vector size - permanent storage = 8000H
dw 2 ; off: reserved tracks
db 2 ; psh: 2 for 512 byte sectors
db 3 ; phm: (512 / 128) - 1
dseg ; rest is banked
@@ -370,48 +401,191 @@ dsk$login:
;ld a,'L'
;call cout
ld (curdph),de ; save working DPH
ex de,hl ; DPH adr to HL
dec hl ; point to slice
ld a,(hl) ; get slice
ld (slice),a ; save it
dec hl ; point to disk unit
ld a,(hl) ; get unit
ld (unit),a ; save it
inc a ; 0FFh -> 000h
jp z,err_ret ; bail out on no disk mapped here
;call media ; update DPH for media
;ret
push de ; save DPH ptr
media:
; Set retry address
ld hl,media
ld (retry$adr),hl
; check media
ld a,(@rdrv) ; get disk unit
;halt
; Sense media to determine media format
ld a,(unit) ; get disk unit
ld c,a ; put in C
ld b,18h ; HBIOS Media function
ld e,1 ; Enable media check/discovery
call 0FFF0H ; HBIOS call
jp nz,err_diskio ; handle error
ld a,e ; resultant media id to accum
ld (medid),a ; save media id
or a ; set flags, 0 is no media
jp z,err_nodisk ; handle no media error
; Initialize slice start LBA & sectors per slice
ld hl,0 ; assume slice starts
ld (lba),hl ; ... at LBA offset
set 7,h ; ... of zero
ld (lba+2),hl ; ... w/ LBA access
; Check device type
ld a,(unit) ; get disk unit
ld c,a ; put in C
ld b,17h ; HBIOS func: report device info
call 0FFF0h ; get unit info, device type in D
ld a,d ; device type -> A
and 0F0h ; isolate high bits
cp 10h ; floppy?
jr nz,media1 ; if not, do LBA I/O
ld hl,lba+3 ; point to high order byte
res 7,(hl) ; switch from LBA -> CHS
media1:
ld hl,16640 ; assume legacy value for
ld (sps),hl ; ... sectors per slice
; If not hard disk, skip partition & slice stuff
ld a,(medid) ; get media id
cp 4 ; hard disk?
jp nz,media9 ; if not, jump ahead
; Read MBR
ld de,8000h ; LBA address zero
ld hl,0 ; ... to read first sector
ld bc,mbrsec ; read into MBR buffer
ld (dma),bc ; save
ld a,(0FFE0h) ; get current HBIOS bank
ld (bank),a ; set DMA bank
ld a,(unit) ; get bootunit
ld c,a ; put in C
ld b,013h ; HBIOS func: disk read
call dsk$io ; do it
ret nz ; abort on error
; Check signature
ld hl,(mbrsec+1FEh) ; get signature
ld a,l ; first byte
cp 055h ; should be $55
jr nz,media5 ; if not, no part table
ld a,h ; second byte
cp 0AAh ; should be $AA
jr nz,media5 ; if not, no part table
; Search part table for CP/M entry (type 0x2E)
ld b,4 ; four entries in part table
ld hl,mbrsec+1BEh+4 ; offset of first part type
media3:
ld a,(hl) ; get part type
cp 2Eh ; CP/M partition?
jr z,media4 ; cool, grab the LBA offset
ld de,16 ; part table entry size
add hl,de ; bump to next part type
djnz media3 ; loop thru table
jr media5 ; too bad, no CP/M partition
media4:
; Capture the starting LBA of the CP/M partition we found
ld de,4 ; LBA is 4 bytes after part type
add hl,de ; point to it
ld de,lba ; loc to store lba offset
ld bc,4 ; 4 bytes (32 bits)
ldir ; copy it
; Check that requested slice is "inside" partition.
; Slice size is exactly 16,384 sectors (8mb), so we can just
; right shift partition sector count by 14 bits
ld e,(hl) ; HL points to first byte
inc hl ; ... of 32 bit partition
ld d,(hl) ; ... sector count,
inc hl ; ... load sector count
push de ; ... into DE:HL
ld e,(hl) ; ...
inc hl ; ...
ld d,(hl) ; ...
pop hl ; ... DE:HL = part size in sectors
ld b,2 ; DE = DE:HL >> 2 (tricky!)
call rl32 ; DE = slicecnt
ex de,hl ; HL = slicecnt
ld a,(slice) ; get target slice
ld c,a ; put in C
ld b,18h ; HBIOS Media function
ld e,1 ; Enable media check/discovery
;rst 08
call 0FFF0H ; HBIOS call
ld a,e ; Resultant media id to accum
or a ; Set flags
;halt
;
; !!! Need to do something on error !!!
;
jr nz,dsk$login0 ; continue if OK
pop de ; else error
ret ; return
dsk$login0:
ld b,0 ; BC := requested slice #
scf ; set carry!
sbc hl,bc ; max slices - slice - 1
jp c,err_noslice ; slice too high, error exit
; For now, it is implied that a slice within a partition
; table will be in the "new" disk format. So, we now
; adjust the sectors per slice and media id.
; Use new slice format sectors per slice value
ld hl,16384 ; new sectors per slice
ld (sps),hl ; save it
; Update media id for new hard disk format
ld a,10 ; new media id
ld (medid),a ; save it
media5:
; Adjust LBA offset based on target slice
ld a,(slice) ; get slice, A is loop cnt
ld hl,(lba) ; set DE:HL
ld de,(lba+2) ; ... to starting LBA
ld bc,(sps) ; sectors per slice
boot6:
or a ; set flags to check loop cntr
jr z,boot8 ; done if counter exhausted
add hl,bc ; add one slice to low word
jr nc,boot7 ; check for carry
inc de ; if so, bump high word
boot7:
dec a ; dec loop downcounter
jr boot6 ; and loop
boot8:
set 7,d ; set LBA access flag
ld (lba),hl ; save new lba, low word
ld (lba+2),de ; save new lba, high word
media9:
; Locate DPB corresponding to media id
ld hl,dpb$start - dpb$sz
ld de,dpb$sz
ld b,a ; loop count
dsk$login1:
add hl,de ; next dpb
djnz dsk$login1 ; loop as needed
; hl is ptr to desired dpb
pop de ; restore DPH ptr
;halt
ex de,hl ; de = DPB adr, hl = DPH adr
push de ; save DPB adr
ld de,12 ; offset of DPB in DPH
add hl,de ; hl = adr of DPB field in DPH
pop de ; recover DPB adr
ld (hl),e ; update LSB
inc hl
ld (hl),d ; udpate MSB
ret ; done
ld a,(medid) ; get media id
ld b,a ; to loop count
media10:
add hl,de ; next dpb
djnz media10 ; loop as needed
; Stuff DPB ptr (HL) and LBA offset into DPH
; DPH: DPB @ +12, LBA @ +25
ld de,(curdph) ; load DPH pointer
ex de,hl ; de = DPB adr, hl = DPH adr
push de ; save DPB adr
ld de,12 ; offset of DPB in DPH
add hl,de ; hl = adr of DPB field in DPH
pop de ; recover DPB adr
ld (hl),e ; update LSB
inc hl ; point to MSB
ld (hl),d ; update MSB
ld de,12 ; 12 more bytes to LBA
add hl,de ; HL points to LBA offset field
ld de,lba ; DE points to LBA offset
ex de,hl ; swap for copy
ld bc,4 ; 4 bytes
ldir ; do it
xor a ; signal success
ret ; done
; disk READ and WRITE entry points.
@@ -429,116 +603,115 @@ dsk$login1:
; if necessary, then return an error code in <A>
dsk$read:
; ld ix,30H
; halt
;ld a,'R'
;call cout
push de ; save XDPH pointer
call dsk$seek ; disk seek
pop hl ; restore pointer to HL
ret nz ; abort on seek error
;
dec hl ; point to unit field of XDPH
dec hl
ld c,(hl) ; BIOS Disk Unit in C
ld b,13H ; HBIOS READ function
ld hl,(@dma) ; Dest buffer adr
if banked
ld a,(@dbnk) ; destination bank
call ?bnkxlt
else
ld a,(0FFE0H) ; get current bank
endif
ld d,a ; set desk bank
ld e,1 ; 1 sector
rst 08 ; do it
;call 0FFF0H
;call phex8
ret ; return
; lxi h,read$msg ; point at " Read "
; mvi a,88h ! mvi b,01h ; 1797 read + Z80DMA direction
; jmp rw$common
ld a,13h ; HBIOS disk read function
ld (func),a ; save it
jr dsk$rw ; common disk read/write code
dsk$write:
;ld ix,32H
;halt
ld a,14h ; HBIOS disk write function
ld (func),a ; save it
jr dsk$rw ; common disk read/write code
dsk$rw:
; Common disk read/write routine
; Assumes func is set to HBIOS read or write
push de ; save XDPH pointer
call dsk$seek ; disk seek
pop hl ; restore pointer to XDPH
ret nz ; abort on seek error
;
dec hl ; point to unit field of XDPH
dec hl
ld c,(hl) ; BIOS Disk Unit in C
ld b,14H ; HBIOS WRITE function
ld hl,(@dma) ; Dest buffer adr
; Set retry address
ld hl,dsk$rw$retry
ld (retry$adr),hl
; Save XDPH address
ld (curdph),de ; save to curdph
dsk$rw$retry:
; Get LBA offset from DPH to DE:HL
ld hl,(curdph) ; HL := DPH adr
ld de,25 ; LBA value adr
add hl,de ; HL := LBA offset
ld e,(hl) ; lobyte of loword
inc hl ; bump
ld d,(hl) ; hibyte of loword
inc hl ; bump
push de ; save loword
ld e,(hl) ; lobyte of hiword
inc hl ; bump
ld d,(hl) ; hibyte of hiword
pop hl ; recover loword
bit 7,d ; LBA access bit set?
jr nz,dsk$rw2 ; if so, go to LBA I/O
; Floppy I/O
ld de,(@sect) ; sector -> de, head(d) becomes zero
ld hl,(@trk) ; track -> hl (low bit has head)
srl h ; shift head bit out of hl
rr l ; ... and into carry
rl d ; carry bit (head) into d
jr dsk$rw9 ; do the disk I/O
dsk$rw2:
; LBA I/O
push de ; save hiword of LBA
push hl ; save loword of LBA
; Get track and shift into correct bits
ld hl,(@trk) ; get track
ld de,0 ; clear hiword
ld b,4 ; x16 (16 spt assumed)
call rl32 ; do it
; Combine with sector
ld a,(@sect) ; get sector
or l ; combine
ld l,a ; and back to L
; Add in LBA offset
pop bc ; lba offset loword
add hl,bc ; add to cur loword
ex de,hl ; swap
pop bc ; lba offset hiword
adc hl,bc ; add w/ carry to cur hiword
ex de,hl ; swap back
dsk$rw9:
; DE:HL has sector address to read (LBA or CHS)
ld bc,(@dma) ; get dma address
ld (dma),bc ; save for dsk$io
if banked
ld a,(@dbnk) ; destination bank
call ?bnkxlt
ld a,(@dbnk) ; destination bank
call ?bnkxlt ; xlat to HBIOS
else
ld a,(0FFE0H) ; get current bank
ld a,(0FFE0H) ; get current bank
endif
ld d,a ; set desk bank
ld e,1 ; 1 sector
rst 08 ; do it
;call 0FFF0H
ret ; return
ld (bank),a
ld a,(func) ; get HBIOS func code
ld b,a ; put in B
ld a,(@rdrv) ; get disk unit
ld c,a ; put in C
;jr dsk$io ; fall thru to dsk$io!
dsk$io:
; Read/write a disk sector
; DE:HL is CHS/LBA, B is HBIOS func, C is disk unit
; Seek to requested sector in DE:HL
push bc ; save func & unit
ld b,012h ; HBIOS func: seek
call 0FFF0h ; do it
pop bc ; recover func & unit
jp nz,err_diskio ; handle error
; Read sector(s) into buffer
ld e,1 ; transfer count
ld hl,(dma) ; read into info sec buffer
ld a,(bank) ; HBIOS DMA bank
ld d,a ; put in D
call 0FFF0h ; do it
jp nz,err_diskio ; handle error
xor a ; signal success
ret ; and done
; lxi h,write$msg ; point at " Write "
; mvi a,0A8h ! mvi b,05h ; 1797 write + Z80DMA direction
; ; jmp wr$common
dsk$seek:
dec de ; point to unit field of XDPH
dec de
ld a,(de) ; get it
ld c,a ; BIOS Disk Unit in C
ld b,12H ; HBIOS SEEK function
push bc ; save it
push de ; save XDPH pointer
ld b,17h ; HBIOS DEVICE function
rst 08 ; Do it, D=device type
ld a,d ; put in accum
and 0F0h ; isolate high bits
ld b,1 ; assume it is floppy, 1 head bit
ld c,01h ; 1 bit head mask
cp 10h ; floppy?
jr z,seek0 ; yup, skip ahead
ld b,4 ; must be hard disk, 4 head bits
ld c,0Fh ; 4 bit head mask
seek0:
pop de ; recover XDPH pointer
push bc ; save bc
inc de ; point to slice field of XDPH
ld a,(de) ; get it
ld e,a ; slice to E
ld h,65 ; number of tracks per slice
call mult8 ; HL now has track offset for slice
pop bc ; recover bc
push hl ; save track offset for now
ld hl,(@trk) ; get track value
ld a,l ; lsb of track to a
and c ; apply mask
ld d,a ; save in d
seek1:
srl h ; shift one bit out
rr l ; ... of hl
djnz seek1 ; do all bits
ld a,(@sect) ; get sector
ld e,a ; stuff it in e
ex de,hl ; de=track, hl=head/sect
ex (sp),hl ; save head/sect, hl = offset
add hl,de ; hl has final track value
pop de ; recover head/sect to de
pop bc ; recover function & unit
rst 08 ; perform seek
;call 0FFF0H
ret
;
; multiply 8-bit values
@@ -557,6 +730,103 @@ mult8_noadd:
djnz mult8_loop
ret
rl32:
; Left shift DE:HL by B bits (B > 0)
or a ; clear carry
rl l ; rotate L thru carry
rl h ; rotate H thru carry
rl e ; rotate E thru carry
rl d ; rotate D thru carry
djnz rl32 ; loop B times
ret ; done
cin$echo: ; get console input, echo it, and shift to upper case
call ?const ; check for char
or a ; set flags
jr z,cin$echo1 ; nope, continue
call ?conin ; eat extraneous char
jr cin$echo ; and loop
cin$echo1:
call ?conin ; get char
push af ; save it
ld c,a ; put in C
call ?cono ; echo
pop af ; recover it
cp 'a' ; compare
ret c ; done if carry
sub 'a' - 'A' ; make upper case
ret ; and done
; call ?const ! ora a ! jz u$c1 ; see if any char already struck
; call ?conin ! jmp u$conin$echo ; yes, eat it and try again
;u$c1:
; call ?conin ! push psw
; mov c,a ! call ?cono
; pop psw ! cpi 'a' ! rc
; sui 'a'-'A' ; make upper case
; ret
err_nodisk:
ld hl,str_err_nodisk
jr err_perm
err_noslice:
ld hl,str_err_noslice
jr err_perm
err_perm:
call prt_err
jr err_ret
err_diskio:
cp -10 ; HBIOS read only error
jr z,err_rdonly ; if so, handle special
ld a,(@ermde) ; get error mode
cp 0FFh ; FFh means suppress
jr z,err_ret ; if so, go to err return
ld hl,str_err_diskio
call prt_err
ld hl,str_err_retry
call ?pmsg
call cin$echo
cp 'Y'
jr nz,err_ret ; return error to caller
ld hl,(retry$adr) ; get retry address
jp (hl) ; and go there
err_rdonly:
ld hl,str_err_rdonly
call prt_err
ld a,2 ; signal readonly media
ret
prt_err:
ld a,(@ermde) ; get error mode
cp 0FFh ; FFh means suppress
ret z ; if so, go to err return
push hl
call ?pderr
pop hl
jp ?pmsg
err_ret:
ld a,0FFh ; signal error
ret ; and done
str_err_retry db ", Retry (Y/N)?",0
str_err_nodisk db ", No disk",0
str_err_noslice db ", No slice",0
str_err_diskio db ", Disk I/O",0
str_err_rdonly db ", Read Only",0
str_err_prefix db 13,10,"BIOS Error: ",0
retry$adr dw ?wboot ; error retry address
curdph dw 0 ; working dph value
medid db 0 ; working media id value
unit db 0 ; working disk unit num
slice db 0 ; working slice num
lba dw 0,0 ; working lba
sps dw 0 ; sectors per slice
mbrsec ds 512 ; MBR sector buffer
dma dw 0 ; current DMA address
bank db 0 ; HBIOS DMA bank
func db 0 ; HBIOS function
;rw$common: ; seek to correct track (if necessary),
; ; initialize DMA controller,
; ; and issue 1797 command.

8
Source/CPM3/genbnk.dat
View File

@@ -8,12 +8,12 @@ MEMTOP = FD
BNKSWT = Y
COMBAS = 80
LERROR = Y
NUMSEGS = 03
NUMSEGS = 04
MEMSEG00 = 01,43,00
MEMSEG01 = 0E,72,02
MEMSEG02 = 01,7F,03
MEMSEG03 = 01,7F,04
MEMSEG04 = 00,C0,05
MEMSEG04 = 01,7F,05
MEMSEG05 = 00,C0,06
MEMSEG06 = 00,C0,07
MEMSEG07 = 00,C0,08
@@ -57,7 +57,7 @@ ALTBNKSM = Y
ALTBNKSN = Y
ALTBNKSO = Y
ALTBNKSP = Y
NDIRRECA = 02
NDIRRECA = 08
NDIRRECB = 00
NDIRRECC = 00
NDIRRECD = 00
@@ -73,7 +73,7 @@ NDIRRECM = 00
NDIRRECN = 00
NDIRRECO = 00
NDIRRECP = 00
NDTARECA = 02
NDTARECA = 10
NDTARECB = 00
NDTARECC = 00
NDTARECD = 00

6
Source/CPM3/loader.asm
View File

@@ -27,9 +27,13 @@
;
#INCLUDE "../ver.inc"
;
; BELOW, SYS_END MUST BE SET TO THE SIZE OF CPMLDR.BIN + SYS_LOC. IF
; THE SIZE OF CPMLDR.BIN CHANGES, SYS_SIZ MUST BE UPDATED!!!
;
SYS_SIZ .EQU $0F00 ; SIZE OF CPMLDR.BIN
SYS_ENT .EQU $0100 ; SYSTEM (OS) ENTRY POINT ADDRESS
SYS_LOC .EQU $0100 ; STARTING ADDRESS TO LOAD SYSTEM IMAGE
SYS_END .EQU $1480 ; ENDING ADDRESS OF SYSTEM IMAGE
SYS_END .EQU SYS_SIZ + SYS_LOC ; ENDING ADDRESS OF SYSTEM IMAGE
;
SEC_SIZE .EQU 512 ; DISK SECTOR SIZE
BLK_SIZE .EQU 128 ; OS BLOCK/RECORD SIZE

3
Source/CPM3/move.z80
View File

@@ -69,7 +69,8 @@ xbnkmov:
; 1: TPA BID_AUX 8Ch
; 2: BUFS BID_AUX-1 8Bh
; 3: BUFS BID_AUX-2 8Ah
; ...
; 4: BUFS BID_AUX-3 89h
; 5: BUFS BID_AUX-4 88h
;
; N.B., Below BID_AUX is considered RAM disk bank. Need to
; make sure RAM disk is kept small enough to stay below

3
Source/CPM3/optzpm.lib
View File

@@ -1,5 +1,4 @@
; global assembler options for BANKED BIOS
; with Boot Drive swapped into Drive A
; global assembler options for ZPM BIOS
true equ -1
false equ not true

115
Source/CPM3/util.z80
View File

@@ -1,9 +1,10 @@
title 'Utility module for RomWBW'
maclib options.lib
public addhla, bcd2bin, bin2bcd
public phex16, phex8, cout, crlf, crlf2
public addhla
public phex16, phex8
public cin, cout
public crlf, crlf2
public bcd2bin, bin2bcd
cseg
@@ -14,45 +15,6 @@ addhla:
inc h
ret
bcd2bin:
; convert A from packed bcd to binary
push bc
ld c,a
and 0F0h
srl a
ld b,a
srl a
srl a
add a,b
ld b,a
ld a,c
and 0Fh
add a,b
pop bc
ret
bin2bcd:
; convert A from binary to packed bcd
push bc
ld b,10
ld c,-1
bin2bcd1:
inc c
sub b
jr nc,bin2bcd1
add a,b
ld b,a
ld a,c
add a,a
add a,a
add a,a
add a,a
or b
pop bc
ret
if 0
;
; Print the hex word value in HL
;
phex16:
@@ -104,16 +66,29 @@ hexconv:
daa
ret
;
; input character to A
;
cin:
push bc
push de
push hl
ld bc,0080h
rst 08
ld a,e
pop hl
pop de
pop bc
ret
;
; output character from A
;
cout:
; save all incoming registers
push af
push bc
push de
push hl
ld e,a
ld bc,0100h
ld bc,0180h
rst 08
pop hl
pop de
@@ -134,16 +109,44 @@ crlf:
call cout
pop af
ret
else
phex16:
phex8:
cout:
crlf2:
crlf:
halt
endif
;
; Convert A from packed BCD to binary
;
bcd2bin:
push bc
ld c,a
and 0F0h
srl a
ld b,a
srl a
srl a
add a,b
ld b,a
ld a,c
and 0Fh
add a,b
pop bc
ret
;
; Convert A from binary to packed BCD
;
bin2bcd:
push bc
ld b,10
ld c,-1
bin2bcd1:
inc c
sub b
jr nc,bin2bcd1
add a,b
ld b,a
ld a,c
add a,a
add a,a
add a,a
add a,a
or b
pop bc
ret
end

31
Source/Doc/Applications.md
View File

@@ -360,7 +360,7 @@ message.
## Etymology
The `SYSCOPY` command is an original product and the source code is
The `MODE` command is an original product and the source code is
provided in the RomWBW distribution.
`\clearpage`{=latex}
@@ -521,15 +521,20 @@ This application is provided by Will Sowerbutts.
*`<filename>`* is the filename of the ROM image file
Options: (access method is auto-detected by default)
FLASH4 will auto-detect most parameters so additional options should not
normally be required.
| `/PARTIAL`: Allow flashing a large ROM from a smaller image file
Options:
| `/V`: Enable verbose output (one line per sector)
| `/P` or `/PARTIAL`: Allow flashing a large ROM from a smaller image file
| `/ROM`: Allow read-only use of unknown chip types
| `/Z180DMA`: Force Z180 DMA engine
| `/UNABIOS`: Force UNA BIOS bank switching
| `/ROMWBW`: Force RomWBW (v2.6+) bank switching
| `/ROMWBWOLD`: Force RomWBW (v2.5 and earlier) bank switching
| `/P112`: Force P112 bank switching
| `/N8VEMSBC`: Force N8VEM SBC (v1, v2), Zeta (v1) SBC bank switching
## Usage
@@ -949,6 +954,24 @@ accurately pace the sound file output. If no system timer is
available, a delay loop is calculated instead. The delay loop will not
be as accurate as the system timer.
There are two modes of operations. A direct hardware interface for the
AY-3-8910 or YM2149 chips, or a compatibility layer thru HBIOS supporting
the SN76489 chip.
By default the application will attempt to interface directly to the sound
chip. The optional argument `--hbios` supplied after the filename, will
enable the application to use the HBIOS sound driver.
The HBIOS mode also support other switch as desribed below.
| Switch | Description |
| ----------- | ------------------------------------------------------ |
| `--hbios` | Utilise HBIOS' sound driver |
| `+t1` | Play tune an octave higher |
| `+t2` | Play tune two octaves higher |
| `-t1` | Play tune an octave lower |
| `-t2` | Play tune two octaves lower |
All RomWBW operating system boot disks include a selection of sound
files in user area 3.
@@ -960,4 +983,4 @@ software was adapted and embedded from pre-existing sources. The YM
player code is from MYMPLAY 0.4 by Lieves!Tuore and the PT player code
is (c)2004-2007 S.V.Bulba <vorobey@mail.khstu.ru>.
The source code is provided in the RomWBW distribution.
The source code is provided in the RomWBW distribution.

530
Source/Doc/Architecture.md
View File

@@ -410,6 +410,28 @@ require double-buffering if the caller’s buffer is in the lower 32K of CPU
address space. For optimal performance, such buffers should be placed in
the upper 32K of CPU address space.
Error Codes
-----------
The following error codes are defined generically for all HBIOS functions.
Most function calls will return a result in register A.
_Code_ | _Meaning_
------ | ---------
0 | function succeeded
-1 | undefined error
-2 | function not implemented
-3 | invalid function
-4 | invalid unit numberr
-5 | out of memory
-6 | parameter out of range
-7 | media not present
-8 | hardware not present
-9 | I/O error
-10 | write request to read-only media
-11 | device timeout
-12 | invalid configuration
`\clearpage`{=latex}
Character Input/Output (CIO)
@@ -536,6 +558,8 @@ unit. Register pair DE contains the line characteristics upon return.
| C: Serial Device Attributes
| D: Serial Device Type
| E: Serial Device Number
| H: Serial Device Unit Mode
| L: Serial Device Unit I/O Base Address
Reports information about the character device unit specified. Register C
indicates the device attributes: 0=RS-232 and 1=Terminal. Register D
@@ -563,7 +587,7 @@ _Id_ | _Device Type / Driver_
Disk Input/Output (DIO)
-----------------------
Character input/output functions require that a character unit be specified
Disk input/output functions require that a disk unit be specified
in the C register. This is the logical disk unit number assigned during
the boot process that identifies all disk i/o devices uniquely.
@@ -583,16 +607,18 @@ MID\_FD144 | 6 | 3.5" 1.44M Floppy
MID\_FD360 | 7 | 5.25" 360K Floppy
MID\_FD120 | 8 | 5.25" 1.2M Floppy
MID\_FD111 | 9 | 8" 1.11M Floppy
MID\_HDNEW | 10 | Hard Disk with 1024 Directory entries
### Function 0x10 -- Disk Status (DIOSTATUS)
| _Entry Parameters_
| B: 0x10
| C: Disk Device Unit ID
| _Exit Results_
| A: Status (0=OK, else error)
### Function 0x11 -- Disk Status (DIORESET)
### Function 0x11 -- Disk Reset (DIORESET)
| _Entry Parameters_
| B: 0x11
@@ -643,6 +669,7 @@ determine if the device supports LBA addressing.
| _Entry Parameters_
| B: 0x13
| C: Disk Device Unit ID
| D: Bank ID
| E: Block Count
| HL: Buffer Address
@@ -654,18 +681,18 @@ Read Block Count sectors to buffer address starting at current target
sector. Current sector must be established by prior seek function; however,
multiple read/write/verify function calls can be made after a seek
function. Current sector is incremented after each sector successfully
read. On error, current sector is sector is sector where error occurred.
read. On error, current sector is sector where error occurred.
Blocks read indicates number of sectors successfully read.
Caller must ensure: 1) buffer address is large enough to contain data for
all sectors requested, and 2) entire buffer area resides in upper 32K of
memory.
all sectors requested, and 2) does not cross a 32k memory bank boundary.
### Function 0x14 -- Disk Write (DIOWRITE)
| _Entry Parameters_
| B: 0x14
| C: Disk Device Unit ID
| D: Bank ID
| E: Block Count
| HL: Buffer Address
@@ -677,12 +704,10 @@ Write Block Count sectors to buffer address starting at current target
sector. Current sector must be established by prior seek function; however,
multiple read/write/verify function calls can be made after a seek
function. Current sector is incremented after each sector successfully
written. On error, current sector is sector is sector where error occurred.
written. On error, current sector is sector where error occurred.
Blocks written indicates number of sectors successfully written.
Caller must ensure: 1) buffer address is large enough to contain data for
all sectors being written, and 2) entire buffer area resides in upper 32K
of memory.
Caller must ensure the source buffer does not cross a 32k memory bank boundary.
### Function 0x15 -- Disk Verify (DIOVERIFY)
@@ -723,6 +748,8 @@ of memory.
| C: Attributes
| D: Device Type
| E: Device Number
| H: Disk Device Unit Mode
| L: Disk Device Unit I/O Base Address
Reports information about the character device unit specified. Register D
indicates the device type (driver) and register E indicates the physical
@@ -739,9 +766,9 @@ Bit 7: 1=Floppy, 0=Hard Disk (or similar, e.g. CF, SD, RAM)
| Bits 1-0: Reserved
| If Hard Disk:
| Bit 6: Removable\
| Bit 6: Removable
| Bits: 5-3: Type (0=Hard, 1=CF, 2=SD, 3=USB,
| 4=ROM, 5=RAM, 6=RAMF, 7=Reserved)
| 4=ROM, 5=RAM, 6=RAMF, 7=FLASH)
| Bits 2-0: Reserved
Each disk device is handled by an appropriate driver (IDE, SD,
@@ -792,7 +819,6 @@ function will return an error status.
| _Entry Parameters_
| B: 0x1A
| C: Disk Device Unit ID
| HL: Buffer Address
| _Exit Results_
| A: Status (0=OK, else error)
@@ -912,6 +938,53 @@ to by HL. HL must point to a location in the top 32K of CPU address space.
Write the entire contents of the Non-Volatile RAM from the buffer pointed
to by HL. HL must point to a location in the top 32K of CPU address space.
### Function 0x26 -- RTC Get Alarm (RTCGETALM)
| _Entry Parameters_
| B: 0x26
| _Exit Results_
| A: Status (0=OK, else error)
Documentation required...
### Function 0x27 -- RTC Set Alarm (RTCSETALM)
| _Entry Parameters_
| B: 0x27
| _Exit Results_
| A: Status (0=OK, else error)
Documentation required...
### Function 0x28 -- RTC DEVICE (RTCDEVICE)
| _Entry Parameters_
| B: 0x28
| C: RTC Device Unit ID
| _Exit Results_
| A: Status (0=OK, else error)
| D: Device Type
| E: Device Number
| H: RTC Device Unit Mode
| L: RTC Device Unit I/O Base Address
Reports information about the RTC device unit specified. Register D
indicates the device type (driver) and register E indicates the physical
device number assigned by the driver.
Each RTC device is handled by an appropriate driver (DSRTC, BQRTC,
etc.) which is identified by a device type id from the table below.
**Type ID** | **Disk Device Type**
----------- | --------------------
0x00 | DS1302
0x10 | BQ4845P
0x20 | SIMH
0x30 | System Periodic Timer
`\clearpage`{=latex}
Video Display Adapter (VDA)
@@ -1069,8 +1142,10 @@ Keyboard should be flushed.
| _Exit Results_
| A: Status (0=OK, else error)
| D=Device Type
| E=Device Number
| D: Device Type
| E: Device Number
| H: VDA Device Unit Mode
| L: VDA Device Unit I/O Base Address
Reports information about the video device unit specified.
@@ -1292,6 +1367,244 @@ codes as described at the start of this section.
`\clearpage`{=latex}
Sound (SND)
------------
### Function 0x50 -- Sound Reset (SNDRESET)
| _Entry Parameters_
| B: 0x50
| C: Audio Device Unit ID
| _Exit Results_
| A: Status (0=OK, else error)
Reset the sound chip. Turn off all sounds and set volume on all
channels to silence.
### Function 0x51 -- Sound Volume (SNDVOL)
| _Entry Parameters_
| B: 0x51
| C: Audio Device Unit ID
| L: Volume (00=Silence, FF=Maximum)
| _Exit Results_
| A: Status (0=OK, else error)
This function sets the sound chip volume parameter. The volume will
be applied when the next SNDPLAY function is invoked.
Note that not all sounds chips implement 256 volume levels. The
driver will scale the volume to the closest possible level the
chip provides.
### Function 0x52 -- Sound Period (SNDPRD)
| _Entry Parameters_
| B: 0x52
| C: Audio Device Unit ID
| HL: Period
| _Returned Values_
| A: Status (0=OK, else error)
This function sets the sound chip period parameter. The period will
be applied when the next SNDPLAY function is invoked.
The period value is a driver specific value. To play standardized
notes, use the SNDNOTE function. A higher value will generate a lower
note. The maximum value that can be used is driver specific. If value
supplied is beyond driver capabilities, register A will be set to $FF.
### Function 0x53 -- Sound Note (SNDNOTE)
| _Entry Parameters_
| B: 0x53
| C: Audio Device Unit ID
| HL: Value of note to play
| _Returned Values_
| A: Status (0=OK, else error)
This function sets the sound chip period parameter with steps of quarter
of a semitone. The value of 0 (lowest) corresponds to Bb/A# in octave 0.
Increase by steps of 4 to select the next corresponding note.
Increase by steps of 48 to select the same note in next octave.
If the driver is able to generate the requested note, a success (0) is
returned, otherwise a non-zero error state will be returned.
The sound chip resolution and its oscillator limit the range and
accuracy of the notes played. The typically range of the AY-3-8910
is six octaves, Bb2/A#2-A7, where each value is a unique tone. Values
above and below can still be played but each quarter tone step may not
result in a note change.
The following table shows the mapping of the input value in HL
to the corresponding octave and note.
| Note | Oct 0 | Oct 1 | Oct 2 | Oct 3 | Oct 4 | Oct 5 | Oct 6 | Oct 7 |
|:----- | -----:| -----:| -----:| -----:| -----:| -----:| -----:| -----:|
| Bb/A# | 0 | 48 | 96 | 144 | 192 | 240 | 288 | 336 |
| B | 4 | 52 | 100 | 148 | 196 | 244 | 292 | 340 |
| C | 8 | 56 | 104 | 152 | 200 | 248 | 296 | 344 |
| C#/Db | 12 | 60 | 108 | 156 | 204 | 252 | 300 | 348 |
| D | 16 | 64 | 112 | 160 | 208 | 256 | 304 | 352 |
| Eb/D# | 20 | 68 | 116 | 164 | 212 | 260 | 308 | 356 |
| E | 24 | 72 | 120 | 168 | 216 | 264 | 312 | 360 |
| F | 28 | 76 | 124 | 172 | 220 | 268 | 316 | 364 |
| F#/Gb | 32 | 80 | 128 | 176 | 224 | 272 | 320 | 368 |
| G | 36 | 84 | 132 | 180 | 228 | 276 | 324 | 372 |
| Ab/G# | 40 | 88 | 136 | 184 | 232 | 280 | 328 | 376 |
| A | 44 | 92 | 140 | 188 | 236 | 284 | 332 | 380 |
### Function 0x54 -- Sound Play SNDPLAY)
| _Entry Parameters_
| B: 0x54
| C: Audio Device Unit ID
| D: Channel
| _Returned Values_
| A: Status (0=OK, else error)
This function applies the previously specified volume and period by
programming the sound chip with the appropriate values. The values
are applied to the specified channel of the chip.
For example, to play a specific note on Audio Device UNit 0,
the following HBIOS calls would need to be made:
```
HBIOS B=51 C=00 L=80 ; Set volume to half level
HBIOS B=53 C=00 L=69 ; Select Middle C (C4) assuming SN76489
HBIOS B=54 C=00 D=01 ; Play note on Channel 1
```
### Function 0x55 -- Sound Query (SNDQUERY)
| _Entry Parameters_
| B: 0x55
| C: Audio Device Unit ID
| E: Subfunction
| _Returned Values_
| A: Status (0=OK, else error)
This function will return the status of the current pending command or
key aspects of the specific Audio Device.
#### SNDQUERY Subfunction 0x01 -- Get count of audio channels supported (SNDQ_CHCNT)
| _Entry Parameters_
| B: 0x55
| E: 0x01
| _Returned Values_
| A: Status (0=OK, else error)
| B: Count of standard tone channels
| C: Count of noise tone channels
#### SNDQUERY Subfunction 0x02 -- Get current volume setting (SNDQ_VOL)
| _Entry Parameters_
| B: 0x55
| E: 0x02
| _Returned Values_
| A: Status (0=OK, else error)
| H: 0
| L: Current volume setting
#### SNDQUERY Subfunction 0x03 -- Get current period setting (SNDQ_PERIOD)
| _Entry Parameters_
| B: 0x55
| E: 0x03
| _Returned Values_
| A: Status (0=OK, else error)
| HL: Current period setting
#### SNDQUERY Subfunction 0x04 -- Get device details (SNDQ_DEV)
| _Entry Parameters_
| B: 0x55
| E: 0x04
| _Returned Values_
| A: Status (0=OK, else error)
| B: Driver identity
| HL: Driver specific port settings
| DE: Driver specific port settings
Reports information about the audio device unit specified.
Register B reports the audio device type (see below).
Registers HL and DE contain relevant port addresses for the hardware
specific to each device type.
The currently defined audio device types are:
AUDIO ID | Value | Device | Returned registers
-------------- | ----- | ---------- | --------------------------------------------
SND_SN76489 | 0x01 | SN76489 | E: Left channel port, L: Right channel port
SND_AY38910 | 0x02 | AY-3-8910 | D: Address port, E: Data port
SND_BITMODE | 0x03 | I/O PORT | D: Address port, E: Bit mask
### Function 0x56 -- Sound Duration (SNDDUR)
| _Entry Parameters_
| B: 0x56
| C: Audio Device Unit ID
| HL: Duration
| _Returned Values_
| A: Status (0=OK, else error)
This function sets the duration of the note to be played in milliseconds.
If the duration is set to zero, then the play function will operate in a non-blocking
mode. i.e. a tone will start playing and the play function will return. The tone will
continue to play until the next tone is played. I/O PORT are not compatible and will
not play a note if the duration is zero.
For other values, when a tone is played, it will play for the duration defined in HL
and then return.
### Function 0x57 -- Sound Device (SNDDEVICE)
| _Entry Parameters_
| B: 0x57
| C: Sound Device Unit Number
| _Exit Results_
| A: Status (0=OK, else error)
| D: Serial Device Type
| E: Serial Device Number
| H: Serial Device Unit Mode
| L: Serial Device Unit I/O Base Address
Reports information about the sound device unit specified. Register D
indicates the device type (driver) and register E indicates the physical
device number assigned by the driver.
Each character device is handled by an appropriate driver (AY38910, SN76489,
etc.). The driver can be identified by the Device Type. The assigned Device
Types are listed below.
_Id_ | _Device Type / Driver_
---- | ----------------------
0x00 | SN76489
0x10 | AY38910
0x20 | BITMODE
`\clearpage`{=latex}
System (SYS)
------------
@@ -1299,13 +1612,47 @@ System (SYS)
| _Entry Parameters_
| B: 0xF0
| C: Subfunction (see below)
| _Exit Results_
| A: Status (0=OK, else error)
This function performs various forms of a system reset depending on
the value of the subfucntion. See subfunctions below.
#### SYSRESET Subfunction 0x00 -- Internal HBIOS Reset (RESINT)
| _Entry Parameters_
| BC: 0xF000
| _Returned Values_
| A: Status (0=OK, else error)
Perform a soft reset of HBIOS. Releases all HBIOS memory allocated by
current OS. Does not reinitialize physical devices.
#### SYSRESET Subfunction 0x01 -- Warm Start System (RESWARM)
| _Entry Parameters_
| BC: 0xF001
| _Returned Values_
| <none>
Warm start the system returning to the boot loader prompt. Does not
reinitialize physical devices.
#### SYSRESET Subfunction 0x02 -- Cold Start System (RESCOLD)
| _Entry Parameters_
| BC: 0xF002
| _Returned Values_
| <none>
Perform a system cold start (like a power on). All devices are
reinitialized.
### Function 0xF1 -- System Version (SYSVER)
| _Entry Parameters_
@@ -1462,6 +1809,32 @@ available along with the registers/information returned.
| A: Status (0=OK, else error)
| E: Count of Serial Device Units
#### SYSGET Subfunction 0x01 -- Get Serial Unit Function (CIOFN)
| _Entry Parameters_
| BC: 0xF801
| D: CIO Function
| E: Unit
| _Returned Values_
| A: Status (0=OK, else error)
| HL: Driver Function Address
| DE: Unit Data Address
This function will lookup the actual driver function address and
unit data address inside the HBIOS driver. On entry, place the
CIO function number to lookup in D and the CIO unit number in E.
On return, HL will contain the address of the requested function
in the HBIOS driver (in the HBIOS bank). DE will contain the
associated unit data address (also in the HBIOS bank). See
Appendix A for details.
This function can be used to speed up HBIOS calls by looking up the
function and data address for a specific driver function. After this,
the caller can use interbank calls directly to the function in the
driver which bypasses the overhead of the normal function invocation
lookup.
#### SYSGET Subfunction 0x10 -- Get Disk Device Unit Count (DIOCNT)
| _Entry Parameters_
@@ -1471,6 +1844,40 @@ available along with the registers/information returned.
| A: Status (0=OK, else error)
| E: Count of Disk Device Units
#### SYSGET Subfunction 0x11 -- Get Disk Unit Function (DIOFN)
| _Entry Parameters_
| BC: 0xF811
| D: DIO Function
| E: Unit
| _Returned Values_
| A: Status (0=OK, else error)
| HL: Driver Function Address
| DE: Unit Data Address
This function will lookup the actual driver function address and
unit data address inside the HBIOS driver. On entry, place the
DIO function number to lookup in D and the DIO unit number in E.
On return, HL will contain the address of the requested function
in the HBIOS driver (in the HBIOS bank). DE will contain the
associated unit data address (also in the HBIOS bank).
This function can be used to speed up HBIOS calls by looking up the
function and data address for a specific driver function. After this,
the caller can use interbank calls directly to the function in the
driver which bypasses the overhead of the normal function invocation
lookup.
#### SYSGET Subfunction 0x20 -- Get Disk Device Unit Count (RTCCNT)
| _Entry Parameters_
| BC: 0xF820
| _Returned Values_
| A: Status (0=OK, else error)
| E: Count of RTC Device Units
#### SYSGET Subfunction 0x40 -- Get Video Device Unit Count (VDACNT)
| _Entry Parameters_
@@ -1480,6 +1887,67 @@ available along with the registers/information returned.
| A: Status (0=OK, else error)
| E: Count of Video Device Units
#### SYSGET Subfunction 0x41 -- Get Video Unit Function (VDAFN)
| _Entry Parameters_
| BC: 0xF841
| D: VDA Function
| E: Unit
| _Returned Values_
| A: Status (0=OK, else error)
| HL: Driver Function Address
| DE: Unit Data Address
This function will lookup the actual driver function address and
unit data address inside the HBIOS driver. On entry, place the
VDA function number to lookup in D and the VDA unit number in E.
On return, HL will contain the address of the requested function
in the HBIOS driver (in the HBIOS bank). DE will contain the
associated unit data address (also in the HBIOS bank). See
Appendix A for details.
This function can be used to speed up HBIOS calls by looking up the
function and data address for a specific driver function. After this,
the caller can use interbank calls directly to the function in the
driver which bypasses the overhead of the normal function invocation
lookup.
#### SYSGET Subfunction 0x50 -- Get Sound Device Unit Count (SNDCNT)
| _Entry Parameters_
| BC: 0xF850
| _Returned Values_
| A: Status (0=OK, else error)
| E: Count of Sound Device Units
#### SYSGET Subfunction 0x51 -- Get Sound Unit Function (SNDFN)
| _Entry Parameters_
| BC: 0xF851
| D: SND Function
| E: Unit
| _Returned Values_
| A: Status (0=OK, else error)
| HL: Driver Function Address
| DE: Unit Data Address
This function will lookup the actual driver function address and
unit data address inside the HBIOS driver. On entry, place the
SND function number to lookup in D and the SND unit number in E.
On return, HL will contain the address of the requested function
in the HBIOS driver (in the HBIOS bank). DE will contain the
associated unit data address (also in the HBIOS bank). See
Appendix A for details.
This function can be used to speed up HBIOS calls by looking up the
function and data address for a specific driver function. After this,
the caller can use interbank calls directly to the function in the
driver which bypasses the overhead of the normal function invocation
lookup.
#### SYSGET Subfunction 0xD0 -- Get Timer Tick Count (TIMER)
| _Entry Parameters_
@@ -1488,6 +1956,7 @@ available along with the registers/information returned.
| _Returned Values_
| A: Status (0=OK, else error)
| DE:HL: Current Timer Tick Count Value
| C: Tick frequency (typically 50 or 60)
#### SYSGET Subfunction 0xD1 -- Get Seconds Count (SECONDS)
@@ -1573,7 +2042,6 @@ available along with the registers/information used as input.
| _Returned Values_
| A: Status (0=OK, else error)
#### SYSSET Subfunction 0xE0 -- Set Boot Information (BOOTINFO)
| _Entry Parameters_
@@ -1721,3 +2189,35 @@ On entry, register E must contain an index into the interrupt vector table
and register HL must contain the address of the new interrupt vector to
be inserted in the table at the index. On return, HL will contain the
previous address in the table at the index.
`\clearpage`{=latex}
### Appendix A Driver Instance Data fields
The following section outlines the read only data referenced by the
`SYSGET`, subfunctions `xxxFN` for specific drivers.
#### TMS9918 Driver:
| Name | Offset | Size (bytes)| Description |
|--------|--------|-------------|-------------|
| PPIA | 0 | 1 | PPI PORT A |
| PPIB | 1 | 1 | PPI PORT B |
| PPIC | 2 | 1 | PPI PORT C |
| PPIX | 3 | 1 | PPI CONTROL PORT |
| DATREG | 4 | 1 | IO PORT ADDRESS FOR MODE 0 |
| CMDREG | 5 | 1 | IO PORT ADDRESS FOR MODE 1 |
| The following are the register mirror values that HBIOS used for initialisation |
| REG. 0 | 6 | 1 | $00 - NO EXTERNAL VID
| REG. 1 | 7 | 1 | $50 or $70 - SET MODE 1 and interrupt if enabled |
| REG. 2 | 8 | 1 | $00 - PATTERN NAME TABLE := 0
| REG. 3 | 9 | 1 | $00 - NO COLOR TABLE
| REG. 4 | 10 | 1 | $01 - SET PATTERN GENERATOR TABLE TO $800
| REG. 5 | 11 | 1 | $00 - SPRITE ATTRIBUTE IRRELEVANT
| REG. 6 | 12 | 1 | $00 - NO SPRITE GENERATOR TABLE
| REG. 7 | 13 | 1 | $F0 - WHITE ON BLACK
| DCNTL* | 14 | 1 | Z180 DMA/WAIT CONTROL |
* ONLY PRESENT FOR Z180 BUILDS

830
Source/Doc/Catalog.md Normal file
View File

@@ -0,0 +1,830 @@
!include(Common.inc)
!def(document)(Disk Catalog)
!def(author)(Mykl Orders)
---
title: |
| !product
| Version !ver
|
| !document
author: !author (mailto:!authmail)
date: !date
institution: !orgname
documentclass: article
classoption:
- oneside
toc: true
papersize: letter
geometry:
- top=1.5in
- bottom=1.5in
- left=1.0in
- right=1.0in
# - showframe
linestretch: 1.25
colorlinks: true
fontfamily: helvet
fontsize: 12pt
header-includes:
- |
```{=latex}
\usepackage{fancyhdr}
\usepackage{xhfill}
\renewcommand*{\familydefault}{\sfdefault}
\setstretch{1.25} % for TOC
```
---
```{=latex}
\clearpage
\pagestyle{fancyplain}
\fancyhf{}
\pagenumbering{arabic}
\lhead{\fancyplain{}{\nouppercase{\footnotesize \bfseries \leftmark \hfill !product !document}}}
\lfoot{\small RetroBrew Computing Group ~~ {\xrfill[3pt]{1pt}[cyan]} ~~ \thepage}
```
`\clearpage`{=latex}
# RomWBW Distribution File Catalog
This document is a reference to the files found on the disk media
distributed with RomWBW. Specifically, RomWBW provides a set
of floppy and hard disk images in the Binary directory of the
distribution. The contents of these images is listed here.
The files on the disk images were sourced from a variety of locations.
The primary sources of these files are listed below. Note that the
primary documentation for each of these sources is listed. You are
strongly encouraged to refer to this documentation for more information
on using the applications and files listed.
## Sources
- **RomWBW**: RomWBW Custom Applications
Documentation: RomWBW Applications.pdf*
These files are custom applications built exclusively to enhance the
functionality of RomWBW. In some cases they are built from scratch
while others are customized versions of well known CP/M tools.
- **CPM22**: Digital Research CP/M-80 2.2 Distribution Files
Documentation: CPM Manual.pdf
These files are from the official Digital Research distribution
of CP/M 2.2. Applications have been patched according to the
DRI patch list.
- **ZSDOS**: ZSDOS 1.1 Disk Operating System Distribution Files
Documentation: *ZSDOS Manual.pdf*
These files are from the official ZSDOS 1.1 distribution. Some of
the files are redistributions of applications from other sources.
- **ZCPR**: ZCPR 1.0 Command Processor Distribution Files
Documentation: *ZCPR Manual.pdf*
These files are from the ZCPR 1.0 distribution.
- **NZCOM**: NZCOM Automatic Z-System Distribution Files
Documentation: *NZCOM Users Manual.pdf*
These files are from the last official release of NZCOM.
- **CPM3**: Digital Research CP/M 3 Distribution Files
Documentation: *CPM3 Users Guide.pdf*, *CPM3 System Guide.pdf*,
*CPM3 Programmers Guide.pdf*, *CPM3 Command Summary.pdf*
These files are from the official Digital Research distribution of
CP/M 3. Applications have been patched according to the DRI
patch list.
- **ZPM3**: Digital Research CP/M-80 2.2 Distribution Files
Documentation: *CPM Manual.pdf*
These files are from Simeon Cran's ZPM3 operating system distribution.
`\clearpage`{=latex}
# CPM 2.2 Boot Disk
| Floppy Disk Image: **fd_cpm22.img**
| Hard Disk Image: **hd_cpm22.img**
| Combo Disk Image: **Slice 0**
| **User 0** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `ASM.COM` | CPM22 | DRI 8080 Assembler |
| `CR.COM` | -- | Crunch archiver |
| `DDT.COM` | CPM22 | DRI Dynamic Debugger |
| `DDTZ.DOC` | -- | Z80 replacement for DDT |
| `DIRX.COM` | -- | Directory lister with file sizes |
| `DUMP.COM` | CPM22 | DRI type contents of disk file in hex |
| `ED.COM` | CPM22 | DRI context editor |
| `KERMIT.COM` | -- | Generic CP/M 2.2 Kermit communication application |
| `LBREXT.COM` | -- | Extract library files |
| `LIB.COM` | -- | DRI Library manager |
| `LINK.COM` | -- | DRI CPM relocatable linker |
| `LOAD.COM` | -- | DRI hex file loader into memory |
| `MAC.COM` | -- | DRI CPM macro assembler |
| `MBASIC.COM` | -- | Microsoft Basic |
| `PIP.COM` | CPM22 | DRI Periperal Interchange Program |
| `PMARC.COM` | -- | LHA file compressor |
| `PMEXT.COM` | -- | Extractor for PMARC archives |
| `RMAC.COM` | -- | DRI Relocatable Macro Assembler |
| `STAT.COM` | CPM22 | DRI statistices about file storage and device assignment |
| `SUBMIT.COM` | CPM22 | DRI batch processor |
| `UNCR.COM` | -- | NZCOM Uncrunch decompression |
| `UNZIP.COM` | -- | Extractor for ZIP archives |
| `XSUB.COM` | CPM22 | DRI eXtended submit |
| `ZSID.COM` | -- | DRI Z80 symbolic instruction debugger |
| `ASSIGN.COM` | RomWBW | RomWBW Drive/Slice mapper |
| `FAT.COM` | RomWBW | RomWBW FAT filesystem access |
| `FDU.COM` | RomWBW | RomWBW Floppy Disk Utility |
| `FORMAT.COM` | RomWBW | RomWBW media formatter (placeholder) |
| `INTTEST.COM` | RomWBW | RomWBW Interrupt test |
| `MODE.COM` | RomWBW | RomWBW Modify serial port characteristics |
| `RTC.COM` | RomWBW | RomWBW Display and set RTC |
| `SURVEY.COM` | RomWBW | System survey |
| `SYSCOPY.COM` | RomWBW | RomWBW Read/write system boot image |
| `SYSGEN.COM` | RomWBW | DRI CPM SYSGEN to put CPM onto a new drive |
| `TALK.COM` | RomWBW | RomWBW Direct console I/O to a serial port |
| `TIMER.COM` | RomWBW | RomWBW Display timer tick counter |
| `TUNE.COM` | RomWBW | RomWBW Play PT or MYM sound files |
| `XM.COM` | RomWBW | RomWBW XMODEM file transfer |
| `CPM.SYS` | RomWBW | CPM2.2 system image |
| `CLRDIR.COM` | -- | Max Scane's disk directory cleaner |
| `COMPARE.COM` | -- | FoxHollow compare two files |
| `DDTZ.COM` | -- | Z80 replacement for DDT |
| `FDISK80.COM` | -- | John Coffman's Partition editor for FAT filesystem |
| `FLASH.COM` | -- | Will Sowerbutts' in-situ EEPROM programmer |
| `NULU.COM` | -- | NZCOM new library utility |
| `UNARC.COM` | -- | Extractor for ARC archives |
| `ZAP.COM` | -- | Disk editor/patcher |
| `ZDE.COM` | -- | Z-system display editor |
| `ZDENST.COM` | -- | ZDE Installer |
| **User 1** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `SAMPKEY.DOC` | -- | ZDE Distribution File |
| `SAMPKEY.ZDK` | -- | ZDE Distribution File |
| `SAMPKEY.ZDT` | -- | ZDE Distribution File |
| `ZDE10.DOC` | -- | ZDE Distribution File |
| `ZDE10.FOR` | -- | ZDE Distribution File |
| `ZDE10.NEW` | -- | ZDE Distribution File |
| `ZDE10.QRF` | -- | ZDE Distribution File |
| `ZDE10.TOC` | -- | ZDE Distribution File |
| `ZDE13.FOR` | -- | ZDE Distribution File |
| `ZDE13.NEW` | -- | ZDE Distribution File |
| `ZDE16.COM` | -- | ZDE Distribution File |
| `ZDE16.DIR` | -- | ZDE Distribution File |
| `ZDE16.FIX` | -- | ZDE Distribution File |
| `ZDE16.FOR` | -- | ZDE Distribution File |
| `ZDE16.NEW` | -- | ZDE Distribution File |
| `ZDE16A.COM` | -- | ZDE Distribution File |
| `ZDE16A.PAT` | -- | ZDE Distribution File |
| `ZDENST16.COM` | -- | ZDE Distribution File |
| `ZDEPROP.DOC` | -- | ZDE Distribution File |
| `ZDEPROP.Z80` | -- | ZDE Distribution File |
| `ZDKCOM13.COM` | -- | ZDE Distribution File |
| `ZDKCOM13.DOC` | -- | ZDE Distribution File |
| **User 3** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `ATTACK.PT3` | -- | Sound File |
| `BACKUP.PT3` | -- | Sound File |
| `BADMICE.PT3` | -- | Sound File |
| `DEMO.MYM` | -- | Sound File |
| `DEMO1.MYM` | -- | Sound File |
| `DEMO3.MYM` | -- | Sound File |
| `DEMO3MIX.MYM` | -- | Sound File |
| `DEMO4.MYM` | -- | Sound File |
| `HOWRU.PT3` | -- | Sound File |
| `ITERATN.PT3` | -- | Sound File |
| `LOOKBACK.PT3` | -- | Sound File |
| `LOUBOUTN.PT3` | -- | Sound File |
| `NAMIDA.PT3` | -- | Sound File |
| `RECOLL.PT3` | -- | Sound File |
| `SANXION.PT3` | -- | Sound File |
| `SYNCH.PT3` | -- | Sound File |
| `TOSTAR.PT3` | -- | Sound File |
| `VICTORY.PT3` | -- | Sound File |
| `WICKED.PT3` | -- | Sound File |
| `YEOLDE.PT3` | -- | Sound File |
| `YEOVIL.PT3` | -- | Sound File |
`\clearpage`{=latex}
# ZSDOS 1.1 Boot Disk
| Floppy Disk Image: **fd_zsdos.img**
| Hard Disk Image: **hd_zsdos.img**
| Combo Disk Image: **Slice 1**
| **User 0** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `ASM.COM` | CPM22 | DRI 8080 Assembler |
| `CLOCKS.DAT` | ZSDOS | ZSDOS Library of clock drivers |
| `COPY.CFG` | ZSDOS | ZSDOS Configuration file for COPY.COM |
| `COPY.COM` | ZSDOS | ZSDOS File copier with file dates and archiving |
| `COPY.UPD` | ZSDOS | ZSDOS ??? |
| `CR.COM` | -- | Crunch archiver |
| `DATSWEEP.COM` | ZSDOS | ZSDOS Comprehensive file management utility |
| `DDT.COM` | CPM22 | DRI Dynamic Debugger |
| `DDTZ.DOC` | -- | Z80 replacement for DDT |
| `DIRX.COM` | -- | Directory lister with file sizes |
| `DSCONFIG.COM` | ZSDOS | ZSDOS DATSWEEP configuration tool |
| `DUMP.COM` | CPM22 | DRI type contents of disk file in hex |
| `ED.COM` | CPM22 | DRI context editor |
| `FA16.CFG` | ZSDOS | ZSDOS FILEATTR.COM v1.6 configuration file |
| `FA16.DOC` | ZSDOS | ZSDOS FILEATTR.COM v1.6 documentation |
| `FA16A.FOR` | ZSDOS | ZSDOS FILEATTR.COM v1.6a information |
| `FA16CFG.TXT` | ZSDOS | ZSDOS FILEATTR.COM v1.6 configuration instructions |
| `FILEATTR.COM` | ZSDOS | ZSDOS Modify file attributes |
| `FILEDATE.CFG` | ZSDOS | ZSDOS Configuration file for FILEDATE.COM |
| `FILEDATE.COM` | ZSDOS | ZSDOS Disk directory that allows sorting and selecting by date and name |
| `FILEDATE.COM` | ZSDOS | ZSDOS Disk directory that allows sorting and selecting by date and name |
| `INITDIR.CFG` | ZSDOS | ZSDOS Configuration file for INITDIR.COM |
| `INITDIR.COM` | ZSDOS | ZSDOS Prepare disks for P2DOS Stamps |
| `KERMIT.COM` | -- | Generic CP/M 2.2 Kermit communication application |
| `LBREXT.COM` | -- | Extract library files |
| `LDDS.COM` | ZSDOS | Clock driver |
| `LDNZT.COM` | ZSDOS | Clock driver |
| `LDP2D.COM` | ZSDOS | Clock driver |
| `LIB.COM` | -- | DRI Library manager |
| `LINK.COM` | -- | DRI CPM relocatable linker |
| `LOAD.COM` | -- | DRI hex file loader into memory |
| `MAC.COM` | -- | DRI CPM macro assembler |
| `MBASIC.COM` | -- | Microsoft Basic |
| `PIP.COM` | CPM22 | DRI Periperal Interchange Program |
| `PMARC.COM` | -- | LHA file compressor |
| `PMEXT.COM` | -- | Extractor for PMARC archives |
| `PUTBG.COM` | ZSDOS | ZSDOS Prepare disk for backgrounder |
| `PUTDS.COM` | ZSDOS | ZSDOS Prepare disk for datestamper |
| `RELOG.COM` | ZSDOS | ZSDOS relog disks after program that bypasses BDOS |
| `RMAC.COM` | -- | DRI Relocatable Macro Assembler |
| `SETTERM.COM` | ZSDOS | ZSDOS Installs terminal control codes into DateSamper utilities |
| `SETUPZST.COM` | ZSDOS | ZSDOS Select clock driver |
| `STAMPS.DAT` | ZSDOS | ZSDOS Library of stamping routines |
| `STAT.COM` | CPM22 | DRI statistices about file storage and device assignment |
| `SUBMIT.COM` | CPM22 | DRI batch processor |
| `SUPERSUB.COM` | ZSDOS | |
| `TD.CFG` | ZSDOS | ZSDOS Configuration file for TD.COM |
| `TD.COM` | ZSDOS | ZSDOS Time/Date utility |
| `TERMBASE.DAT` | ZSDOS | ZSDOS Terminal information library for SETTERM |
| `TESTCLOK.COM` | ZSDOS | ZSDOS Test various clock drivers |
| `UNCR.COM` | -- | NZCOM Uncrunch decompression |
| `UNZIP.COM` | -- | Extractor for ZIP archives |
| `XSUB.COM` | CPM22 | DRI eXtended submit |
| `ZCAL.COM` | ZSDOS | ZSDOS Show month calendar |
| `ZCNFG.COM` | ZSDOS | ZSDOS Configure various utilities |
| `ZCNFG24.CFG` | ZSDOS | ZSDOS Configuration file for ZCNFG.COM |
| `ZPATH.COM` | ZSDOS | ZSDOS Set BDOS and/or ZCPR command path |
| `ZSCONFIG.COM` | ZSDOS | ZSDOS Dynamically regulate many of ZSDOS features |
| `ZSID.COM` | -- | DRI Z80 symbolic instruction debugger |
| `ZSVSTAMP.COM` | ZSDOS | ZSDOS Save/restore file timestamp |
| `ZSVSTAMP.DOC` | ZSDOS | ZSDOS ZSVSTAMP.COM documentation |
| `ZXD.CFG` | ZSDOS | ZSDOS Configuration file for ZXD.COM |
| `ZXD.COM` | ZSDOS | ZSDOS Extended directory utility |
| `ASSIGN.COM` | RomWBW | RomWBW Drive/Slice mapper |
| `FAT.COM` | RomWBW | RomWBW FAT filesystem access |
| `FDU.COM` | RomWBW | RomWBW Floppy Disk Utility |
| `FORMAT.COM` | RomWBW | RomWBW media formatter (placeholder) |
| `INTTEST.COM` | RomWBW | RomWBW Interrupt test |
| `MODE.COM` | RomWBW | RomWBW Modify serial port characteristics |
| `RTC.COM` | RomWBW | RomWBW Display and set RTC |
| `SURVEY.COM` | RomWBW | System survey |
| `SYSCOPY.COM` | RomWBW | RomWBW Read/write system boot image |
| `SYSGEN.COM` | RomWBW | DRI CPM SYSGEN to put CPM onto a new drive |
| `TALK.COM` | RomWBW | RomWBW Direct console I/O to a serial port |
| `TIMER.COM` | RomWBW | RomWBW Display timer tick counter |
| `TUNE.COM` | RomWBW | RomWBW Play PT or MYM sound files |
| `XM.COM` | RomWBW | RomWBW XMODEM file transfer |
| `ZSYS.SYS` | RomWBW | ZSDOS system image |
| `CLRDIR.COM` | -- | Max Scane's disk directory cleaner |
| `COMPARE.COM` | -- | FoxHollow compare two files |
| `DDTZ.COM` | -- | Z80 replacement for DDT |
| `FDISK80.COM` | -- | John Coffman's Partition editor for FAT filesystem |
| `FLASH.COM` | -- | Will Sowerbutts' in-situ EEPROM programmer |
| `NULU.COM` | -- | NZCOM new library utility |
| `UNARC.COM` | -- | Extractor for ARC archives |
| `ZAP.COM` | -- | Disk editor/patcher |
| `ZDE.COM` | -- | Z-system display editor |
| `ZDENST.COM` | -- | ZDE Installer |
| **User 1** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `SAMPKEY.DOC` | -- | ZDE Distribution File |
| `SAMPKEY.ZDK` | -- | ZDE Distribution File |
| `SAMPKEY.ZDT` | -- | ZDE Distribution File |
| `ZDE10.DOC` | -- | ZDE Distribution File |
| `ZDE10.FOR` | -- | ZDE Distribution File |
| `ZDE10.NEW` | -- | ZDE Distribution File |
| `ZDE10.QRF` | -- | ZDE Distribution File |
| `ZDE10.TOC` | -- | ZDE Distribution File |
| `ZDE13.FOR` | -- | ZDE Distribution File |
| `ZDE13.NEW` | -- | ZDE Distribution File |
| `ZDE16.COM` | -- | ZDE Distribution File |
| `ZDE16.DIR` | -- | ZDE Distribution File |
| `ZDE16.FIX` | -- | ZDE Distribution File |
| `ZDE16.FOR` | -- | ZDE Distribution File |
| `ZDE16.NEW` | -- | ZDE Distribution File |
| `ZDE16A.COM` | -- | ZDE Distribution File |
| `ZDE16A.PAT` | -- | ZDE Distribution File |
| `ZDENST16.COM` | -- | ZDE Distribution File |
| `ZDEPROP.DOC` | -- | ZDE Distribution File |
| `ZDEPROP.Z80` | -- | ZDE Distribution File |
| `ZDKCOM13.COM` | -- | ZDE Distribution File |
| `ZDKCOM13.DOC` | -- | ZDE Distribution File |
| **User 3** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `ATTACK.PT3` | -- | Sound File |
| `BACKUP.PT3` | -- | Sound File |
| `BADMICE.PT3` | -- | Sound File |
| `DEMO.MYM` | -- | Sound File |
| `DEMO1.MYM` | -- | Sound File |
| `DEMO3.MYM` | -- | Sound File |
| `DEMO3MIX.MYM` | -- | Sound File |
| `DEMO4.MYM` | -- | Sound File |
| `HOWRU.PT3` | -- | Sound File |
| `ITERATN.PT3` | -- | Sound File |
| `LOOKBACK.PT3` | -- | Sound File |
| `LOUBOUTN.PT3` | -- | Sound File |
| `NAMIDA.PT3` | -- | Sound File |
| `RECOLL.PT3` | -- | Sound File |
| `SANXION.PT3` | -- | Sound File |
| `SYNCH.PT3` | -- | Sound File |
| `TOSTAR.PT3` | -- | Sound File |
| `VICTORY.PT3` | -- | Sound File |
| `WICKED.PT3` | -- | Sound File |
| `YEOLDE.PT3` | -- | Sound File |
| `YEOVIL.PT3` | -- | Sound File |
`\clearpage`{=latex}
# NZCOM Boot Disk
| Floppy Disk Image: **fd_nzcom.img**
| Hard Disk Image: **hd_nzcom.img**
| Combo Disk Image: **Slice 2**
| **User 0** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `!(C)1988` | NZCOM | |
| `!NZ-COM` | NZCOM | |
| `!VERS--1.2H` | NZCOM | |
| `ALIAS.CMD` | NZCOM | NZCOM Aliases file for ARUNZ.COM |
| `ARUNZ.COM` | NZCOM | NZCOM Invoke an alias in ALIAS.CMD |
| `BGZRDS19.LBR` | NZCOM | |
| `CLEDINST.COM` | NZCOM | Command line editing and history shell installer |
| `CLEDSAVE.COM` | NZCOM | Write command line history to disk |
| `CONFIG.LBR` | NZCOM | |
| `COPY.COM` | NZCOM | ZSDOS File copier with file dates and archiving |
| `CPSET.COM` | NZCOM | NZCOM Create multiple definitions for CRT and PRT |
| `CRUNCH.COM` | NZCOM | NZCOM Text compression |
| `DOCFILES.LBR` | NZCOM | |
| `EDITNDR.COM` | NZCOM | NZCOM Associate names with directories |
| `FCP.LBR` | NZCOM | NZCOM ??? Flow control |
| `FF.COM` | NZCOM | NZCOM File finder |
| `HELP.COM` | NZCOM | DRI CPM+ |
| `HLPFILES.LBR` | NZCOM | |
| `IF.COM` | NZCOM | NZCOM Flow condition tester for FCP |
| `JETLDR.COM` | NZCOM | NZCOM General-purpose module loader |
| `KERMIT.COM` | -- | Generic CP/M 2.2 Kermit communication application |
| `LBREXT.COM` | NZCOM | Extract library files |
| `LBRHELP.COM` | NZCOM | |
| `LDIR.COM` | NZCOM | NZCOM Display the directory of a library |
| `LPUT.COM` | NZCOM | NZCOM Put files into a library |
| `LSH-HELP.COM` | NZCOM | |
| `LSH.COM` | NZCOM | |
| `LSH.WZ` | NZCOM | |
| `LSHINST.COM` | NZCOM | |
| `LX.COM` | NZCOM | NZCOM Extract and execute a memeber of a library |
| `MKZCM.COM` | NZCOM | NZCOM NZCOM system defining utility |
| `NAME.COM` | NZCOM | NZCOM Name a drive/user |
| `NZ-DBASE.INF` | NZCOM | NZCOM Dbase information |
| `NZBLITZ.COM` | NZCOM | |
| `NZBLTZ14.CFG` | NZCOM | |
| `NZBLTZ14.HZP` | NZCOM | |
| `NZCOM.COM` | NZCOM | NZCOM system loader from CP/M |
| `NZCOM.LBR` | NZCOM | NZCOM Library of NZCOM system modules |
| `NZCPR.LBR` | NZCOM | NZCOM Default command processor |
| `PATH.COM` | NZCOM | NZCOM Set/display command search path |
| `PUBLIC.COM` | NZCOM | |
| `PWD.COM` | NZCOM | |
| `RCP.LBR` | NZCOM | NZCOM Resident command package |
| `RELEASE.NOT` | NZCOM | |
| `SAINST.COM` | NZCOM | |
| `SALIAS.COM` | NZCOM | NZCOM Screen alias |
| `SAVENDR.COM` | NZCOM | NZCOM Save named directory assignments to a file |
| `SDZ.COM` | NZCOM | NZCOM Super directory |
| `SHOW.COM` | NZCOM | NZCOM Show resident commands |
| `SUB.COM` | NZCOM | |
| `SUBMIT.COM` | -- | DRI batch processor |
| `TCAP.LBR` | NZCOM | NZCOM Terminal capability descriptor library |
| `TCJ.INF` | NZCOM | |
| `TCJ25.WZ` | NZCOM | |
| `TCJ26.WZ` | NZCOM | |
| `TCJ27.WZ` | NZCOM | |
| `TCJ28.WZ` | NZCOM | |
| `TCJ29.WZ` | NZCOM | |
| `TCJ30.WZ` | NZCOM | |
| `TCJ31UPD.WZ` | NZCOM | |
| `TCJ32.WZ` | NZCOM | |
| `TCJ33UPD.WZ` | NZCOM | |
| `TCSELECT.COM` | NZCOM | NZCOM Create terminal capability file |
| `TY3ERA.COM` | NZCOM | NZCOM Type-3 transient program to erase a file |
| `TY3REN.COM` | NZCOM | NZCOM Type-3 transient program to rename a file |
| `TY4ERA.COM` | NZCOM | NZCOM Type-4 transient program to erase a file |
| `TY4REN.COM` | NZCOM | NZCOM Type-4 transient program to rename a file |
| `TY4SAVE.COM` | NZCOM | NZCOM Type-4 transient program to save memory to a file |
| `TY4SP.COM` | NZCOM | NZCOM Type-4 transient program ti display disk space |
| `UNCRUNCH.COM` | NZCOM | NZCOM Text decompressor |
| `VIEW.COM` | NZCOM | |
| `XTCAP.COM` | NZCOM | |
| `Z3LOC.COM` | NZCOM | NZCOM Display the addresses of the ZCPR3 CCP, BDOS, and BIOS |
| `Z3TCAP.TCP` | NZCOM | NZCOM Database of terminal descriptors |
| `ZCNFG.COM` | NZCOM | ZSDOS Configure various utilities |
| `ZERR.COM` | NZCOM | |
| `ZEX.COM` | NZCOM | NZCOM Memory-based batch processor |
| `ZF-DIM.COM` | NZCOM | NZCOM ZFILER shell for dim-video terminals |
| `ZF-REV.COM` | NZCOM | NZCOM ZFILER shell for reverse-video terminals |
| `ZFILEB38.LZT` | NZCOM | |
| `ZFILER.CMD` | NZCOM | NZCOM Macro script file for ZFILER |
| `ZHELPERS.LZT` | NZCOM | |
| `ZLT.COM` | NZCOM | |
| `ZNODES66.LZT` | NZCOM | |
| `ZSDOS.ZRL` | NZCOM | |
| `ZSYSTEM.IZF` | NZCOM | |
| `ASSIGN.COM` | RomWBW | RomWBW Drive/Slice mapper |
| `FAT.COM` | RomWBW | RomWBW FAT filesystem access |
| `FDU.COM` | RomWBW | RomWBW Floppy Disk Utility |
| `FORMAT.COM` | RomWBW | RomWBW media formatter (placeholder) |
| `INTTEST.COM` | RomWBW | RomWBW Interrupt test |
| `MODE.COM` | RomWBW | RomWBW Modify serial port characteristics |
| `RTC.COM` | RomWBW | RomWBW Display and set RTC |
| `SURVEY.COM` | RomWBW | System survey |
| `SYSCOPY.COM` | RomWBW | RomWBW Read/write system boot image |
| `SYSGEN.COM` | RomWBW | DRI CPM SYSGEN to put CPM onto a new drive |
| `TALK.COM` | RomWBW | RomWBW Direct console I/O to a serial port |
| `TIMER.COM` | RomWBW | RomWBW Display timer tick counter |
| `TUNE.COM` | RomWBW | RomWBW Play PT or MYM sound files |
| `XM.COM` | RomWBW | RomWBW XMODEM file transfer |
| `CPM.SYS` | RomWBW | |
| `ZSYS.SYS` | RomWBW | |
| `CLRDIR.COM` | -- | Max Scane's disk directory cleaner |
| `COMPARE.COM` | -- | FoxHollow compare two files |
| `DDTZ.COM` | -- | Z80 replacement for DDT |
| `FDISK80.COM` | -- | John Coffman's Partition editor for FAT filesystem |
| `FLASH.COM` | -- | Will Sowerbutts' in-situ EEPROM programmer |
| `NULU.COM` | -- | NZCOM new library utility |
| `UNARC.COM` | -- | Extractor for ARC archives |
| `ZAP.COM` | -- | Disk editor/patcher |
| `ZDE.COM` | -- | Z-system display editor |
| `ZDENST.COM` | -- | ZDE Installer |
| **User 3** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `ATTACK.PT3` | -- | Sound File |
| `BACKUP.PT3` | -- | Sound File |
| `BADMICE.PT3` | -- | Sound File |
| `DEMO.MYM` | -- | Sound File |
| `DEMO1.MYM` | -- | Sound File |
| `DEMO3.MYM` | -- | Sound File |
| `DEMO3MIX.MYM` | -- | Sound File |
| `DEMO4.MYM` | -- | Sound File |
| `HOWRU.PT3` | -- | Sound File |
| `ITERATN.PT3` | -- | Sound File |
| `LOOKBACK.PT3` | -- | Sound File |
| `LOUBOUTN.PT3` | -- | Sound File |
| `NAMIDA.PT3` | -- | Sound File |
| `RECOLL.PT3` | -- | Sound File |
| `SANXION.PT3` | -- | Sound File |
| `SYNCH.PT3` | -- | Sound File |
| `TOSTAR.PT3` | -- | Sound File |
| `VICTORY.PT3` | -- | Sound File |
| `WICKED.PT3` | -- | Sound File |
| `YEOLDE.PT3` | -- | Sound File |
| `YEOVIL.PT3` | -- | Sound File |
`\clearpage`{=latex}
# CP/M 3 Boot Disk
| Floppy Disk Image: **fd_cpm3.img**
| Hard Disk Image: **hd_cpm3.img**
| Combo Disk Image: **Slice 3**
| **User 0** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `DATE.COM` | CPM3 | DRI CPM+ Set or display the date and time |
| `DEVICE.COM` | CPM3 | DRI CPM+ Assign logical devices with one or more physical devices |
| `DIR.COM` | CPM3 | DRI CPM+ DIR with options |
| `DUMP.COM` | CPM3 | DRI type contents of disk file in hex |
| `ED.COM` | CPM3 | DRI context editor |
| `ERASE.COM` | CPM3 | DRI file deletion |
| `GENCOM.COM` | CPM3 | DRI CPM+ Generate special COM file with attached RSX files |
| `GET.COM` | CPM3 | DRI CPM+ Temporarily get console input form a disk file |
| `HELP.COM` | CPM3 | DRI CPM+ Display information on how to use commands |
| `HELP.HLP` | CPM3 | DRI CPM+ Databse of help information for HELP.COM |
| `HEXCOM.CPM` | CPM3 | DRI CPM+ Create a COM file from a nex file output by MAC |
| `INITDIR.COM` | CPM3 | DRI CPM+ Initializes a disk to allow time and date stamping |
| `KERMIT.COM` | -- | Generic CP/M 3 Kermit communication application |
| `PATCH.COM` | CPM3 | DRI CPM+ Display or install patch to the CPM+ system or command files |
| `PIP.COM` | CPM3 | DRI Periperal Interchange Program |
| `PUT.COM` | CPM3 | DIR CPM+ Temporarily redirect printer or console output to a disk file |
| `RENAME.COM` | CPM3 | DRI CPM+ Rename a file |
| `ROMWBW.TXT` | RomWBW | |
| `SAVE.COM` | CPM3 | DRI CPM+ Copy the contents of memory to a file |
| `SET.COM` | CPM3 | DIR CPM+ Set file options |
| `SETDEF.COM` | CPM3 | DIR CPM+ Set system options including the drive search chain |
| `SHOW.COM` | CPM3 | DIR CPM+ Display disk and drive statistics |
| `SUBMIT.COM` | CPM3 | DRI batch processor |
| `TYPE.COM` | CPM3 | DIR CPM+ Display the contents of an ASCII character file |
| `ZSID.COM` | CPM3 | DRI Z80 symbolic instruction debugger |
| `CPMLDR.COM` | RomWBW | DRI CPM 3.0 loader |
| `CPMLDR.SYS` | RomWBW | DRI CPM 3.0 loader |
| `CCP.COM` | CPM3 | DRI CPM+ Console Command Processor |
| `GENCPM.COM` | CPM3 | DRI CPM+ Create a memory image of CPM3.SYS |
| `GENRES.DAT` | RomWBW | |
| `GENBNK.DAT` | RomWBW | |
| `BIOS3.SPR` | RomWBW | DRI CPM+ GENCPM input file for non-banked BIOS |
| `BNKBIOS3.SPR` | RomWBW | DRI CPM+ GENCPM input file for banked BIOS |
| `BDOS3.SPR` | CPM3 | DRI CPM+ GENCPM input file for the non-banked BDOS |
| `BNKBDOS3.SPR` | CPM3 | DRI CPM+ GENCPM input file for banked BDOS |
| `RESBDOS3.SPR` | CPM3 | DRI CPM+ GENCPM input file for resident BDOS |
| `CPM3RES.SYS` | RomWBW | DRI CPM+ (non-banked) memory image |
| `CPM3BNK.SYS` | RomWBW | DRI CPM+ (banked) memory image |
| `GENCPM.DAT` | RomWBW | DRI CPM+ System generation tool data file |
| `CPM3.SYS` | RomWBW | DRI CPM+ (non-banked) memory image |
| `README.1ST` | CPM3 | |
| `CPM3FIX.PAT` | CPM3 | |
| `ASSIGN.COM` | RomWBW | RomWBW Drive/Slice mapper |
| `FAT.COM` | RomWBW | RomWBW FAT filesystem access |
| `FDU.COM` | RomWBW | RomWBW Floppy Disk Utility |
| `FORMAT.COM` | RomWBW | RomWBW media formatter (placeholder) |
| `INTTEST.COM` | RomWBW | RomWBW Interrupt test |
| `MODE.COM` | RomWBW | RomWBW Modify serial port characteristics |
| `RTC.COM` | RomWBW | RomWBW Display and set RTC |
| `SURVEY.COM` | RomWBW | System survey |
| `SYSCOPY.COM` | RomWBW | RomWBW Read/write system boot image |
| `SYSGEN.COM` | RomWBW | DRI CPM SYSGEN to put CPM onto a new drive |
| `TALK.COM` | RomWBW | RomWBW Direct console I/O to a serial port |
| `TIMER.COM` | RomWBW | RomWBW Display timer tick counter |
| `TUNE.COM` | RomWBW | RomWBW Play PT or MYM sound files |
| `XM.COM` | RomWBW | RomWBW XMODEM file transfer |
| `CLRDIR.COM` | -- | Max Scane's disk directory cleaner |
| `COMPARE.COM` | -- | FoxHollow compare two files |
| `DDTZ.COM` | -- | Z80 replacement for DDT |
| `FDISK80.COM` | -- | John Coffman's Partition editor for FAT filesystem |
| `FLASH.COM` | -- | Will Sowerbutts' in-situ EEPROM programmer |
| `NULU.COM` | -- | NZCOM new library utility |
| `UNARC.COM` | -- | Extractor for ARC archives |
| `ZAP.COM` | -- | Disk editor/patcher |
| `ZDE.COM` | -- | Z-system display editor |
| `ZDENST.COM` | -- | ZDE Installer |
| **User 3** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `ATTACK.PT3` | -- | Sound File |
| `BACKUP.PT3` | -- | Sound File |
| `BADMICE.PT3` | -- | Sound File |
| `DEMO.MYM` | -- | Sound File |
| `DEMO1.MYM` | -- | Sound File |
| `DEMO3.MYM` | -- | Sound File |
| `DEMO3MIX.MYM` | -- | Sound File |
| `DEMO4.MYM` | -- | Sound File |
| `HOWRU.PT3` | -- | Sound File |
| `ITERATN.PT3` | -- | Sound File |
| `LOOKBACK.PT3` | -- | Sound File |
| `LOUBOUTN.PT3` | -- | Sound File |
| `NAMIDA.PT3` | -- | Sound File |
| `RECOLL.PT3` | -- | Sound File |
| `SANXION.PT3` | -- | Sound File |
| `SYNCH.PT3` | -- | Sound File |
| `TOSTAR.PT3` | -- | Sound File |
| `VICTORY.PT3` | -- | Sound File |
| `WICKED.PT3` | -- | Sound File |
| `YEOLDE.PT3` | -- | Sound File |
| `YEOVIL.PT3` | -- | Sound File |
`\clearpage`{=latex}
# ZPM3 Boot Disk
| Floppy Disk Image: **fd_zpm3.img**
| Hard Disk Image: **hd_zpm3.img**
| Combo Disk Image: **Slice 4**
| **User 0** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `HELP.HLP` | ZPM3 | |
| `ROMWBW.TXT` | RomWBW | |
| `ZPMLDR.COM` | RomWBW | |
| `ZPMLDR.SYS` | RomWBW | |
| `CPMLDR.COM` | RomWBW | |
| `CPMLDR.SYS` | RomWBW | |
| `CPM3.SYS` | RomWBW | |
| `ZCCP.COM` | ZPM3 | |
| `ZINSTAL.ZPM` | ZPM3 | |
| `STARTZPM.COM` | ZPM3 | |
| `MAKEDOS.COM` | ZPM3 | |
| `GENCPM.DAT` | RomWBW | |
| `BNKBIOS3.SPR` | RomWBW | |
| `BNKBDOS3.SPR` | ZPM3 | |
| `RESBDOS3.SPR` | ZPM3 | |
| **User 3** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `ATTACK.PT3` | -- | Sound File |
| `BACKUP.PT3` | -- | Sound File |
| `BADMICE.PT3` | -- | Sound File |
| `DEMO.MYM` | -- | Sound File |
| `DEMO1.MYM` | -- | Sound File |
| `DEMO3.MYM` | -- | Sound File |
| `DEMO3MIX.MYM` | -- | Sound File |
| `DEMO4.MYM` | -- | Sound File |
| `HOWRU.PT3` | -- | Sound File |
| `ITERATN.PT3` | -- | Sound File |
| `LOOKBACK.PT3` | -- | Sound File |
| `LOUBOUTN.PT3` | -- | Sound File |
| `NAMIDA.PT3` | -- | Sound File |
| `RECOLL.PT3` | -- | Sound File |
| `SANXION.PT3` | -- | Sound File |
| `SYNCH.PT3` | -- | Sound File |
| `TOSTAR.PT3` | -- | Sound File |
| `VICTORY.PT3` | -- | Sound File |
| `WICKED.PT3` | -- | Sound File |
| `YEOLDE.PT3` | -- | Sound File |
| `YEOVIL.PT3` | -- | Sound File |
| **User 10** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `ALIAS.HLP` | -- | |
| `HP-RPN.HLP` | -- | |
| `HP-ZP.HLP` | -- | |
| `IF.HLP` | -- | |
| `MENU.HLP` | -- | |
| `VLU.HLP` | -- | |
| `ZFHIST.HLP` | -- | |
| `ZFILER.HLP` | -- | |
| `ZFMACRO.HLP` | -- | |
| `ZP.HLP` | -- | |
| **User 14** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `COPY.CFG` | -- | |
| `ERASE.CFG` | -- | |
| `HELPC15.CFG` | -- | |
| `ZCNFG24.CFG` | -- | |
| `ZEX.CFG` | -- | |
| `ZF11.CFG` | -- | |
| `ZP17.CFG` | -- | |
| **User 15** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `ALIAS.COM` | -- | |
| `ARUNZ.COM` | -- | |
| `COPY.COM` | -- | |
| `DATE.COM` | CPM3 | |
| `DEV.COM` | -- | |
| `DEVICE.COM` | CPM3 | |
| `DIR.COM` | CPM3 | |
| `DISKINFO.COM` | -- | |
| `DU.COM` | -- | |
| `DUMP.COM` | CPM3 | |
| `ED.COM` | CPM3 | |
| `ERASE.COM` | CPM3 | |
| `GENCOM.COM` | CPM3 | |
| `GENCPM.COM` | CPM3 | |
| `GET.COM` | CPM3 | |
| `GOTO.COM` | -- | |
| `HELP.COM` | CPM3 | |
| `HEXCOM.COM` | CPM3 | |
| `IF.COM` | -- | |
| `INITDIR.COM` | CPM3 | |
| `KERMIT.COM` | CPM3 | |
| `LBREXT.COM` | -- | |
| `LIB.COM` | -- | |
| `LINK.COM` | -- | |
| `LOADSEG.COM` | -- | |
| `MAC.COM` | -- | |
| `MBASIC.COM` | -- | |
| `NAMES.NDR` | -- | |
| `PATCH.COM` | CPM3 | |
| `PIP.COM` | CPM3 | |
| `PUT.COM` | CPM3 | |
| `REMOVE.COM` | -- | |
| `RENAME.COM` | CPM3 | |
| `RMAC.COM` | -- | |
| `RSXDIR.COM` | -- | |
| `SAINST.COM` | -- | |
| `SALIAS.COM` | -- | |
| `SAVE.COM` | CPM3 | |
| `SET.COM` | CPM3 | |
| `SETDEF.COM` | CPM3 | |
| `SETPATH.COM` | -- | |
| `SHOW.COM` | CPM3 | |
| `SUBMIT.COM` | CPM3 | |
| `TCAP.Z3T` | -- | |
| `TYPE.COM` | CPM3 | |
| `VERROR.COM` | -- | |
| `VLU.COM` | -- | |
| `XREF.COM` | -- | |
| `ZCNFG.COM` | -- | |
| `ZERASE.COM` | -- | |
| `ZEX.COM` | -- | |
| `ZFILER.COM` | -- | |
| `ZHELP.COM` | -- | |
| `ZP.COM` | -- | |
| `ZSHOW.COM` | -- | |
| `ZSID.COM` | -- | |
| `ZXD.COM` | -- | |
| `AUTOTOG.COM` | ZPM3 | |
| `CLRHIST.COM` | ZPM3 | |
| `SETZ3.COM` | ZPM3 | |
| `ASSIGN.COM` | RomWBW | |
| `FAT.COM` | RomWBW | |
| `FDU.COM` | RomWBW | |
| `FORMAT.COM` | RomWBW | |
| `INTTEST.COM` | RomWBW | |
| `MODE.COM` | RomWBW | |
| `RTC.COM` | RomWBW | |
| `SURVEY.COM` | RomWBW | |
| `SYSCOPY.COM` | RomWBW | |
| `SYSGEN.COM` | RomWBW | |
| `TALK.COM` | RomWBW | |
| `TIMER.COM` | RomWBW | |
| `TUNE.COM` | RomWBW | |
| `XM.COM` | RomWBW | |
| `CLRDIR.COM` | -- | |
| `COMP.COM` | -- | |
| `DDTZ.COM` | -- | |
| `FDISK80.COM` | -- | |
| `FLASH.COM` | -- | |
| `NULU.COM` | -- | |
| `TCVIEW.COM` | -- | |
| `UNARC.COM` | -- | |
| `Z3LOC.COM` | -- | |
| `ZAP.COM` | -- | |
| `ZDE.COM` | -- | |
| `ZDENST.COM` | -- | |
`\clearpage`{=latex}
# WordStar 4 Application Disk
| Floppy Disk Image: **fd_ws4.img**
| Hard Disk Image: **hd_ws4.img**
| Combo Disk Image: **Slice 5**
| **User 0** | **Source** | **Description** |
| -------------- | ---------- | ------------------------------------------------------------ |
| `ANAGRAM.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `CHAPTER1.DOC` | WS4 | MicroPro WordStar 4 Distribution File |
| `CHAPTER2.DOC` | WS4 | MicroPro WordStar 4 Distribution File |
| `CHAPTER3.DOC` | WS4 | MicroPro WordStar 4 Distribution File |
| `DIARY.DOC` | WS4 | MicroPro WordStar 4 Distribution File |
| `DICTSORT.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `FIND.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `HOMONYMS.TXT` | WS4 | MicroPro WordStar 4 Distribution File |
| `HYEXCEPT.TXT` | WS4 | MicroPro WordStar 4 Distribution File |
| `HYPHEN.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `LOOKUP.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `MAINDICT.CMP` | WS4 | MicroPro WordStar 4 Distribution File |
| `MARKFIX.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `MOVEPRN.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `PATCH.LST` | WS4 | MicroPro WordStar 4 Distribution File |
| `PRINT.TST` | WS4 | MicroPro WordStar 4 Distribution File |
| `READ.ME` | WS4 | MicroPro WordStar 4 Distribution File |
| `README.` | WS4 | MicroPro WordStar 4 Distribution File |
| `REVIEW.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `RULER.DOC` | WS4 | MicroPro WordStar 4 Distribution File |
| `SAMPLE1.DOC` | WS4 | MicroPro WordStar 4 Distribution File |
| `SAMPLE2.DOC` | WS4 | MicroPro WordStar 4 Distribution File |
| `SAMPLE3.DOC` | WS4 | MicroPro WordStar 4 Distribution File |
| `SPELL.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `TABLE.DOC` | WS4 | MicroPro WordStar 4 Distribution File |
| `TEXT.DOC` | WS4 | MicroPro WordStar 4 Distribution File |
| `TW.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `WC.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `WINSTALL.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `WORDFREQ.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `WS.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `WS.OVR` | WS4 | MicroPro WordStar 4 Distribution File |
| `WSCHANGE.COM` | WS4 | MicroPro WordStar 4 Distribution File |
| `WSCHANGE.OVR` | WS4 | MicroPro WordStar 4 Distribution File |
| `WSCHHELP.OVR` | WS4 | MicroPro WordStar 4 Distribution File |
| `WSHELP.OVR` | WS4 | MicroPro WordStar 4 Distribution File |
| `WSINDEX.XCL` | WS4 | MicroPro WordStar 4 Distribution File |
| `WSMSGS.OVR` | WS4 | MicroPro WordStar 4 Distribution File |
| `WSPRINT.OVR` | WS4 | MicroPro WordStar 4 Distribution File |
| `WSSHORT.OVR` | WS4 | MicroPro WordStar 4 Distribution File |

152
Source/Doc/GettingStarted.md
View File

@@ -67,7 +67,7 @@ General features include:
* Disk drivers for RAM, ROM, Floppy, IDE, CF, and SD
* Serial drivers including UART (16550-like), ASCI, ACIA, SIO
* Video drivers including TMS9918, SY6545, MOS8563, HD6445
* Real time clock drivers including DS1322, BQ4845
* Real time clock drivers including DS1302, BQ4845
* Multiple OS support including CP/M 2.2, ZSDOS, CP/M 3, ZPM3
* Built-in VT-100 terminal emulation support
@@ -347,7 +347,7 @@ the first 256 8MB chunks of space on a single media.
Of course, the problem is that CP/M-like operating systems have only
16 drive letters (A:-P:) available. Under the covers, RomWBW allows
you to use any drive letter to refer to any slice of any media. The
`ASSIGN` command is allows you to view or change the drive letter
`ASSIGN` command allows you to view or change the drive letter
mappings at any time. At startup, the operating system will
automatically allocate a reasonable number of drive letters to the
available storage devices. The allocation will depend on the number of
@@ -756,13 +756,18 @@ likely to encounter problems.
### Notes
- You can change media, but it must be done while at the OS
command prompt and you **must** warm start CP/M by pressing
ctrl-c. This is a CP/M 2.2 constraint and is well documented
in the DRI manuals.
- The original versions of DDT, DDTZ, and ZSID used the RST 38
vector which conflicts with interrupt mode 1 use of this vector.
The DDT, DDTZ, and ZSID applications in RomWBW have been modified
to use RTS 30 to avoid this issue.
to use RST 30 to avoid this issue.
- Z-System applications will not run under CP/M 2.2. For example,
the `LDDS` date stamper with not run.
the `LDDS` date stamper will not run.
## ZSDOS 1.1
@@ -784,6 +789,10 @@ Manual.pdf").
may not work as expected. The best example is PIP which is not aware
of the ZSDOS paths and will fail in some scenarios (use `COPY` instead).
- Although ZSDOS can recognize a media change in some cases, it will not
always work. You should only change media at a command prompt and be
sure to warm start the OS with a ctrl-c.
## NZCOM Automatic Z-System
NZCOM is a much further refined version of Z-System (ZCPR 3.4). NZCOM
@@ -824,6 +833,14 @@ system tracks. `CPMLDR.SYS` chain loads `CPM3.SYS`.
used to read the current date/time for file stamping, etc. You can
use the `RTC` app to set the RTC clock.
- The `COPYSYS` command described in the DRI CP/M 3 documentation is
not provided with RomWBW. The RomWBW `SYSCOPY` command is used instead.
- Although CP/M 3 is generally able to run CP/M 2.2 programs, this is
not universally true. This is especially true of the utility programs
included with the operating system. For example, the `SUBMIT` program
of CP/M 3 is completely different from the `SUBMIT` program of CP/M 2.2.
## Simeon Cran's ZPM3
ZPM3 is an interesting combination of the features of both CP/M 3 and
@@ -838,7 +855,9 @@ tracks of the disk.
- `ZPMLDR` is included with ZPM3, but it is not working correctly.
- The ZPM operating system is contained in the file called CPM3.SYS
which is confusing, but it is the author's intended way of using ZPM3.
which is confusing, but this is as intended by the ZPM3 distribution.
I believe it was done this way to make it easier for users to transition
from CP/M 3 to ZPM3.
## FreeRTOS
@@ -1072,7 +1091,7 @@ update your ROM. The following is a typical example of transferring
ROM image using XModem and flashing the chip in-situ.
```
E>xm r rom.img
E>xm r rom.rom
XMODEM v12.5 - 07/13/86
RBC, 28-Aug-2019 [WBW], ASCI
@@ -1084,7 +1103,7 @@ To cancel: Ctrl-X, pause, Ctrl-X
Thanks for the upload
E>flash write rom.img
E>flash write rom.rom
FLASH4 by Will Sowerbutts <will@sowerbutts.com> version 1.2.3
Using RomWBW (v2.6+) bank switching.
@@ -1115,12 +1134,81 @@ your choice. This process is described below in the Disk Images
section. If you wish to update existing disk media in your system, you
need to perform the following steps.
If the disk is bootable, you need to update the system tracks of the
disk. This is done using a SYSCOPY command such as `SYSCOPY
C:=B:ZSYS.SYS`. For a ZSDOS boot disk, use ZSYS.SYS. For a CP/M 2.2
disk, use CPM.SYS. For a CP/M 3 or ZPM3 disk, use CPMLDR.SYS.
CPMLDR.SYS is not provided on the ROM disk, so you will need to
upload it from the distribution.
If the disk is bootable, you need to update the system image on the
disk using the procedure described below corresponsing to the
operating system on your disk.
* **CP/M 2.2**
Boot to CP/M 2.2 from ROM, then use `SYSCOPY` to update the system
image on **all** CP/M 2.2 boot disks/slices. The CP/M 2.2 system image
is called CPM.SYS and is found on the ROM disk. For example:
`B>SYSCOPY C:=CPM.SYS`
* **ZSDOS**
Boot to Z-System from ROM, then use `SYSCOPY` to update the system
image on **all** ZSDOS boot disks/slices. The ZSDOS system image
is called ZSYS.SYS and is found on the ROM disk. For example:
`B>SYSCOPY C:=ZSYS.SYS`
* **NZCOM**
NZCOM runs on top of either CP/M 2.2 or ZSDOS. By default, the
RomWBW disk image for NZCOM uses ZSDOS. Follow the corresponding
procedure above to update the system image on the NZCOM boot
disks/slices.
* **CP/M 3**
CP/M 3 uses a multi-step boot process involving multiple files.
The CP/M 3 boot files are not included on the ROM disk due to
space constraints. You will need to transfer the files to your
system from the RomWBW distribution directory Binary\\CPM3.
After this is done, you will need to use `SYSCOPY` to place
the CP/M 3 loader image on the boot tracks of all CP/M 3
boot disks/slices. The loader image is called `CPMLDR.SYS`.
You must then copy (at a minimum) `CPM3.SYS` and `CCP.COM`
onto the disk/slice. Assuming you copied the CP/M 3 boot files
onto your RAM disk at A:, you would use:
```
A>B:SYSCOPY C:=CPMLDR.SYS
A>B:COPY CPM3.SYS C:
A>B:COPY CCP.COM C:
```
* **ZPM3**
ZPM3 uses a multi-step boot process involving multiple files.
The ZPM3 boot files are not included on the ROM disk due to
space constraints. You will need to transfer the files to your
system from the RomWBW distribution directory Binary\\ZPM3.
After this is done, you will need to use `SYSCOPY` to place
the ZPM3 loader image on the boot tracks of all ZPM3
boot disks/slices. The loader image is called `CPMLDR.SYS`.
You must then copy (at a minimum) `CPM3.SYS`, `ZCCP.COM`,
`ZINSTAL.ZPM`, and `STARTZPM.COM` onto the disk/slice.
Assuming you copied the ZPM3 boot files onto your RAM disk
at A:, you would use:
```
A>B:SYSCOPY C:=CPMLDR.SYS
A>B:COPY CPM3.SYS C:
A>B:COPY ZCCP.COM C:
A>B:COPY ZINSTAL.ZPM C:
A>B:COPY STARTZPM.COM C:
```
You may be wondering if the references to `CPMLDR.SYS` and
`CPM3.SYS` are typos. They are not. ZPM3 uses the same loader
image as CPM3. The ZPM3 main system code file is called `CPM3.SYS`
which is the same name as CP/M 3 uses, but the file contents are
not the same.
Finally, if you have copies of any of the RomWBW custom applications
on your hard disk, you need to update them with the latest copies. The
@@ -1151,6 +1239,30 @@ images.
* FAT.COM
* TUNE.COM
# System Update
If the system running ROMWBW utilizes the SST39SF040 Flash chip then it is possible to do a System Update in place of
a System Upgrade in some cases.
A System Update would involve only updating the BIOS, ROM applications and CP/M system.
A System Update may be more favorable than a System Upgrade in cases such as:
- Overwriting of the ROM drive is not desired.
- Space is unavailable to hold a full ROMWBW ROM.
- To mimimize time taken to transfer and flash a full ROM.
- Configuration changes are only minor and do not impact disk applications.
The ROMWBW build process generates a system upgrade file along with the normal ROM image and can be identified by the
extension ".upd". It will be 128Kb in size. In comparison the normal ROM image will have the extension ".rom" and be
512Kb or 1024Kb in size.
Transferring and flashing the System Update is accomplished in the same manner as described above in *Upgrading* with
the required difference being that the flash application needs to be directed to complete a partial flash using the
/p command line switch.
`E>flash write rom.upd /p`
# RomWBW Distribution
All source code and distributions are maintained on GitHub. Code
@@ -1191,12 +1303,17 @@ these applications are no longer provided.
driver.
* Ed Brindley contributed some of the code that supports the RC2014
platform.
* Phil Summers contributed Forth and BASIC in ROM as well as a long
list of general code enhancements.
* Phil Summers contributed Forth and BASIC in ROM, the AY-3-8910 sound
driver as well as a long list of general code enhancements.
* Phillip Stevens contributed support for FreeRTOS.
* Curt Mayer contributed the Linux / MacOS build process.
* UNA BIOS and FDISK80 is a product of John Coffman.
* UNA BIOS and FDISK80 are the products of John Coffman.
* FLASH4 is a product of Will Sowerbutts.
* CLRDIR is a product of Max Scane.
* Tasty Basic is a product of Dimitri Theulings.
* Dean Netherton contributed the sound driver interface and
the SN76489 sound driver.
* The RomWBW Disk Catalog document was produced by Mykl Orders.
Contributions of all kinds to RomWBW are very welcome.
@@ -1209,6 +1326,7 @@ RetroBrew Computers projects is via the community forums:
* [RC2014 Google Group](https://groups.google.com/forum/#!forum/rc2014-z80)
* [retro-comp Google Group](https://groups.google.com/forum/#!forum/retro-comp)
Submission of issues and bugs are welcome at the [RomWBW GitHub Repository](https://github.com/wwarthen/RomWBW).
Submission of issues and bugs are welcome at the
[RomWBW GitHub Repository](https://github.com/wwarthen/RomWBW).
Also feel free to email !author at [!authmail](mailto:!authmail).

BIN
Source/Doc/Graphics/Hard Disk Anatomy.vsd
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BIN
Source/Doc/SIO+CTC Baud Rate Options.xlsx Normal file
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4
Source/Forth/Build.cmd
View File

@@ -11,7 +11,7 @@ set ZXBINDIR=%TOOLS%/cpm/bin/
set ZXLIBDIR=%TOOLS%/cpm/lib/
set ZXINCDIR=%TOOLS%/cpm/include/
zx zsm =camel80.azm
zx link -CAMEL80.BIN=CAMEL80
zx zsm =camel80.azm -/l
zx link -CAMEL80.BIN[L200]=CAMEL80

38
Source/Forth/camel80.azm
View File

@@ -1,15 +1,17 @@
CIODEV_CONSOLE EQU 0D0h
CIOIN EQU 00h ; CHARACTER INPUT
CIOOUT EQU 01h ; CHARACTER OUTPUT
CIOIST EQU 02h ; CHARACTER INPUT STATUS
BID_BOOT EQU 00h
HB_BNKCALL EQU 0fff9h
CIODEV_CONSOLE EQU 0D0h
CIOIN EQU 00h ; CHARACTER INPUT
CIOOUT EQU 01h ; CHARACTER OUTPUT
CIOIST EQU 02h ; CHARACTER INPUT STATUS
BF_SYSRESET EQU 0F0h ; RESTART SYSTEM
BF_SYSRES_WARM EQU 01h ; WARM START (RESTART BOOT LOADER)
; THE FOLLOWING NEED TO BE SYNCED WITH STD.ASM SO ROMLDR
; KNOWS WHERE THIS EXECUTES AT
FTH_SIZ EQU 1700h
FTH_LOC EQU 0200h
HB_LOC EQU 0FD80h
; Listing 2.
; ===============================================
@@ -66,6 +68,14 @@ FTH_LOC EQU 0200h
; keywords are being passed in a
; macro.
; b1ackmai1er difficultylevelhigh@gmail.com
; 03-Dec 20 v1.02 Add James Bowmans double
; precision words as per RC2014
; version. Increase terminal
; input buffer (TIB) size.
; b1ackmai1er difficultylevelhigh@gmail.com
; 22-Jan 21 v1.02 Adjust for revised HBIOS
; proxy size.
; b1ackmai1er difficultylevelhigh@gmail.com
; ===============================================
; Macros to define Forth headers
; HEAD label,length,name,action
@@ -131,9 +141,10 @@ nexthl MACRO
; RELOCATED ENTRY POINT
CSEG
.PHASE FTH_LOC
reset: ld hl,0FDFFh ; HBIOS address, rounded down
reset: ld hl,HB_LOC ; HBIOS address, rounded down
ld l,0 ; = end of avail.mem (EM)
dec h ; EM-100h
ld sp,hl ; = top of param stack
@@ -148,15 +159,17 @@ reset: ld hl,0FDFFh ; HBIOS address, rounded down
jp COLD ; enter top-level Forth word
; Memory map:
; Terminal Input Buffer, 128 bytes
; FTH_LOC Forth kernel = starts after ROMLDR
; ? h Forth dictionary (user RAM)
; EM-400h Terminal Input Buffer, 512 bytes
; Below user area
; EM-200h User area, 128 bytes
; EM-180h Parameter stack, 128B, grows down
; EM-100h HOLD area, 40 bytes, grows down
; EM-0D8h PAD buffer, 88 bytes
; EM-80h Return stack, 128 B, grows down
; EM End of RAM = start of HBIOS
; EM=HB_LOC End of RAM = start of HBIOS
; See also the definitions of U0, S0, and R0
; in the "system variables & constants" area.
; A task w/o terminal input requires 200h bytes.
@@ -332,10 +345,9 @@ KEY2: DW SAVEKEY,CFETCH,LIT,0,SAVEKEY,CSTORE
;X BYE i*x -- return to CP/M
head bye,3,bye,docode
LD A,BID_BOOT ; BOOT BANK
LD HL,0 ; ADDRESS ZERO
CALL HB_BNKCALL ; DOES NOT RETURN
HALT
LD B,BF_SYSRESET ; SYSTEM RESTART
LD C,BF_SYSRES_WARM ; WARM START
JP 0FFF0h ; CALL HBIOS
; STACK OPERATIONS ==============================

73
Source/Forth/camel80h.azm
View File

@@ -39,7 +39,7 @@
;Z tibsize -- n size of TIB
head TIBSIZE,7,TIBSIZE,docon
dw 124 ; 2 chars safety zone
dw 512-2 ; 2 chars safety zone
;X tib -- a-addr Terminal Input Buffer
; HEX 82 CONSTANT TIB CP/M systems: 126 bytes
@@ -47,7 +47,7 @@
; head TIB,3,TIB,docon
; dw 82h
head TIB,3,TIB,douser
dw -80h
dw -512
;Z u0 -- a-addr current user area adrs
; 0 USER U0
@@ -1011,6 +1011,75 @@ WDS1: DW DUP,COUNT,TYPE,SPACE,NFATOLFA,FETCH
DOTS1: DW II,FETCH,UDOT,LIT,-2,XPLUSLOOP,DOTS1
DOTS2: DW EXIT
;C D. d -- display d signed
head DDOT,2,D.,docolon
DW LESSNUM,DUP,TOR,DABS,NUMS
DW RFROM,SIGN,NUMGREATER,TYPE,SPACE,EXIT
;X D+ d1 d2 -- d1+d2 Add double numbers
head DPLUS,2,D+,docode
exx
pop bc ; BC'=d2lo
exx
pop hl ; HL=d1hi,BC=d2hi
exx
pop hl ; HL'=d1lo
add hl,bc
push hl ; 2OS=d1lo+d2lo
exx
adc hl,bc ; HL=d1hi+d2hi+cy
ld b,h
ld c,l
next
;C 2>R d -- 2 to R
head TWOTOR,3,2!>R,docolon
DW SWOP,RFROM,SWOP,TOR,SWOP,TOR,TOR,EXIT
;C 2R> d -- fetch 2 from R
head TWORFROM,3,2R!>,docolon
DW RFROM,RFROM,RFROM,SWOP,ROT,TOR,EXIT
TNEGATE:
call docolon
DW TOR,TWODUP,OR,DUP,qbranch,TNEG1,DROP,DNEGATE,lit,1
TNEG1:
DW RFROM,PLUS,NEGATE,EXIT
qtneg:
call docolon
DW ZEROLESS,qbranch,qtneg1,TNEGATE
qtneg1:
DW EXIT
TSTAR:
call docolon
DW TWODUP,XOR,TOR
DW TOR,DABS,RFROM,ABS
DW TWOTOR
DW RFETCH,UMSTAR,lit,0
DW TWORFROM,UMSTAR
DW DPLUS
DW RFROM
DW qtneg
DW EXIT
TDIV:
call docolon
DW OVER,TOR,TOR
DW DUP,qtneg
DW RFETCH,UMSLASHMOD
DW ROT,ROT
DW RFROM,UMSLASHMOD
DW NIP,SWOP
DW RFROM,ZEROLESS,qbranch,tdiv1,DNEGATE
tdiv1:
DW EXIT
;C M*/ d1 n2 u3 -- d=(d1*n2)/u3 double precision mult. div
head MSTARSLASH,3,M*/,docolon
DW TOR,TSTAR,RFROM,TDIV,EXIT
;Z COLD -- cold start Forth system
; UINIT U0 #INIT CMOVE init user area
; 80 COUNT INTERPRET interpret CP/M cmd

32
Source/HBIOS/API.txt
View File

@@ -45,14 +45,42 @@ GET ($F8):
BC=Function/Subfunction A=Result
E=Serial Unit Count
CIOFN ($01):
BC=Function/Subfunction A=Result
HL=Function Address
DE=Unit Data Address
DIOCNT ($10):
BC=Function/Subfunction A=Result
E=Disk Unit Count
DIOFN ($11):
BC=Function/Subfunction A=Result
HL=Function Address
DE=Unit Data Address
RTCCNT ($20):
BC=Function/Subfunction A=Result
E=RTC Unit Count
VDACNT ($40):
BC=Function/Subfunction A=Result
E=Video Unit Count
VDAFN ($41):
BC=Function/Subfunction A=Result
HL=Function Address
DE=Unit Data Address
SNDCNT ($50):
BC=Function/Subfunction A=Result
E=Sound Unit Count
SNDFN ($51):
BC=Function/Subfunction A=Result
HL=Function Address
DE=Unit Data Address
TIMER ($D0):
BC=Function/Subfunction A=Result
DE:HL=Timer Value (32 bit)
@@ -239,6 +267,8 @@ DEVICE ($06):
D=Device Type
E=Device Number
C=Device Attributes
H=Device Mode
L=Base I/O Adr
Serial Device Attributes Byte:
7: 0=RS-232, 1=Terminal
@@ -303,6 +333,8 @@ DEVICE ($17)
D=Device Type (MD, FD, IDE, etc.)
E=Device Number (0..n)
C=Device Attributes
H=Device Mode
L=Base I/O Adr
Report the Device Type (Floppy, IDE, SD, etc.) and Device Number. Call
does not perform any I/O and succeeds even if the device is in an error state.

9
Source/HBIOS/Build.ps1
View File

@@ -19,7 +19,7 @@ param([string]$Platform = "", [string]$Config = "", [string]$RomSize = "512", [s
# setup mechanism so that multiple configuration are not needed. When building for UNA, the pre-built
# UNA BIOS is simply imbedded, it is not built here.
#
$PlatformListZ80 = "SBC", "ZETA", "ZETA2", "RCZ80", "EZZ80", "UNA"
$PlatformListZ80 = "SBC", "ZETA", "ZETA2", "RCZ80", "RCZ280", "EZZ80", "UNA"
$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO"
#
@@ -100,11 +100,12 @@ $env:PATH = $TasmPath + ';' + $CpmToolsPath + ';' + $env:PATH
# Initialize working variables
$OutDir = "../../Binary" # Output directory for final image file
$RomFmt = "wbw_rom${RomSize}" # Location of files to imbed in ROM disk
$BlankROM = "Blank${RomSize}KB.dat" # An initial "empty" image for the ROM disk of propoer size
$BlankROM = "Blank${RomSize}KB.dat" # An initial "empty" image for the ROM disk of proper size
$RomDiskFile = "RomDisk.tmp" # Temporary filename used to create ROM disk image
$RomFile = "${OutDir}/${RomName}.rom" # Final name of ROM image
$ComFile = "${OutDir}/${RomName}.com" # Final name of COM image (command line loadable HBIOS/CBIOS)
$ImgFile = "${OutDir}/${RomName}.img" # Final name of IMG image (memory loadable HBIOS/CBIOS image)
$UpdFile = "${OutDir}/${RomName}.upd" # Final name of System ROM image
# Select the proper CBIOS to include in the ROM. UNA is special.
if ($Platform -eq "UNA") {$Bios = 'una'} else {$Bios = 'wbw'}
@@ -226,6 +227,9 @@ foreach ($App in $RomApps)
cpmcp -f $RomFmt $RomDiskFile ..\cpm22\cpm_${Bios}.sys 0:cpm.sys
cpmcp -f $RomFmt $RomDiskFile ..\zsdos\zsys_${Bios}.sys 0:zsys.sys
# Set all the files in the ROM disk image to read only for extra protection under flash file system.
cpmchattr -f $RomFmt $RomDiskFile r 0:*.*
#
# Finally, the individual binary components are concatenated together to produce
# the final images.
@@ -240,6 +244,7 @@ if ($Platform -eq "UNA")
else
{
Concat 'hbios_rom.bin','osimg.bin','osimg1.bin','osimg.bin',$RomDiskFile $RomFile
Concat 'hbios_rom.bin','osimg.bin','osimg1.bin','osimg.bin' $UpdFile
Concat 'hbios_app.bin','osimg_small.bin' $ComFile
# Concat 'hbios_img.bin','osimg_small.bin' $ImgFile
}

14
Source/HBIOS/Build.sh
View File

@@ -4,6 +4,7 @@
set -e
CPMCP=../../Tools/`uname`/cpmcp
CPMCH=../../Tools/`uname`/cpmchattr
timestamp=$(date +%Y-%m-%d)
#timestamp="2020-02-24"
@@ -13,9 +14,9 @@ if [ $1 == '-d' ] ; then
diffdir=$1
shift
if [ -f $diffdir/build.inc ] ; then
timestamp=$(grep TIMESTAMP $diffdir/build.inc | awk '{print $3}' | tr -d '\015"')
timestamp=$(grep TIMESTAMP $diffdir/build.inc | awk '{print $3}' | tr -d '\015"')
echo diff build using $timestamp
fi
fi
fi
# positional arguments
@@ -65,7 +66,10 @@ romfmt=wbw_rom${romsize}
outdir=../../Binary
echo "creating empty rom disk of size $romsize in $blankfile"
LANG=en_US.US-ASCII tr '\000' '\345' </dev/zero | dd of=$blankfile bs=1024 count=`expr $romsize - 128`
#LANG=en_US.US-ASCII tr '\000' '\345' </dev/zero | dd of=$blankfile bs=1024 count=`expr $romsize - 128` 2>/dev/null
#LC_CTYPE=en_US.US-ASCII tr '\000' '\345' </dev/zero | dd of=$blankfile bs=1024 count=`expr $romsize - 128` 2>/dev/null
LC_ALL=en_US.US-ASCII tr '\000' '\345' </dev/zero | dd of=$blankfile bs=1024 count=`expr $romsize - 128`
hexdump $blankfile
cat <<- EOF > build.inc
; RomWBW Configured for $platform $config $timestamp
@@ -141,12 +145,16 @@ echo "copying systems to $romdiskfile"
$CPMCP -f $romfmt $romdiskfile ../CPM22/cpm_$BIOS.sys 0:cpm.sys
$CPMCP -f $romfmt $romdiskfile ../ZSDOS/zsys_$BIOS.sys 0:zsys.sys
echo "setting files in the ROM disk image to read only"
$CPMCH -f $romfmt $romdiskfile r 0:*.*
if [ $platform = UNA ] ; then
cp osimg.bin $outdir/UNA_WBW_SYS.bin
cp $romdiskfile $outdir/UNA_WBW_ROM$romsize.bin
cat ../UBIOS/UNA-BIOS.BIN osimg.bin ../UBIOS/FSFAT.BIN $romdiskfile >$romname.rom
else
cat hbios_rom.bin osimg.bin osimg1.bin osimg.bin $romdiskfile >$romname.rom
cat hbios_rom.bin osimg.bin osimg1.bin osimg.bin >$romname.upd
cat hbios_app.bin osimg_small.bin > $romname.com
# cat hbios_img.bin osimg_small.bin > $romname.img
fi

2
Source/HBIOS/Config/DYNO_std.asm
View File

@@ -22,7 +22,7 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_dyno.asm"
;

6
Source/HBIOS/Config/EZZ80_std.asm
View File

@@ -22,12 +22,16 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_ezz80.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 10000000 ; CPU OSC FREQ IN MHZ
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

86
Source/HBIOS/Config/EZZ80_tz80.asm
View File

@@ -1,41 +1,45 @@
;
;==================================================================================================
; EASY Z80 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "TINYZ80"
;
#include "cfg_ezz80.asm"
;
CPUOSC .SET 16000000 ; CPU OSC FREQ IN MHZ
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
EIPCENABLE .SET TRUE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
CTCBASE .SET $10 ; CTC BASE I/O ADDRESS
LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .SET $6E ; STATUS LED PORT ADDRESS
SIO0BASE .SET $18 ; SIO 0: REGISTERS BASE ADR
IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS
;
;==================================================================================================
; EASY Z80 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "TINYZ80"
;
#include "cfg_ezz80.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 16000000 ; CPU OSC FREQ IN MHZ
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
EIPCENABLE .SET TRUE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
CTCBASE .SET $10 ; CTC BASE I/O ADDRESS
LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .SET $6E ; STATUS LED PORT ADDRESS
SIO0BASE .SET $18 ; SIO 0: REGISTERS BASE ADR
IDE0BASE .SET $90 ; IDE 0: IO BASE ADDRESS
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

4
Source/HBIOS/Config/MK4_std.asm
View File

@@ -22,7 +22,7 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_mk4.asm"
;
@@ -37,7 +37,7 @@ CVDUENABLE .SET TRUE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
VGAENABLE .SET TRUE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_DIDE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
FDMODE .SET FDMODE_DIDE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;

2
Source/HBIOS/Config/N8_std.asm
View File

@@ -22,7 +22,7 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_n8.asm"
;

13
Source/HBIOS/Config/RCZ180_ext.asm
View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z180 STANDARD CONFIGURATION (EXTERNAL 512K RAM/ROM BANKED MEMORY MODULE)
; RC2014 Z180 STANDARD CONFIGURATION (EXTERNAL MMU ON 512K RAM/ROM BANKED MEMORY MODULE)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -22,10 +22,13 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE PLATFORM_NAME "RC2014 (EXT MMU)"
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz180.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
;
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
@@ -39,9 +42,13 @@ ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
;
FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

13
Source/HBIOS/Config/RCZ180_nat.asm
View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; RC2014 Z180 STANDARD CONFIGURATION (NATIVE Z180 LINEAR MEMORY)
; RC2014 Z180 STANDARD CONFIGURATION (NATIVE Z180 MMU W/ LINEAR MEMORY)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -22,10 +22,13 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE PLATFORM_NAME "RC2014 (NATIVE MMU)"
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz180.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
;
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
@@ -39,9 +42,13 @@ ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
;
FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

48
Source/HBIOS/Config/RCZ280_ext.asm Normal file
View File

@@ -0,0 +1,48 @@
;
;==================================================================================================
; RC2014 Z280 STANDARD CONFIGURATION (EXTERNAL MMU ON 512K RAM/ROM BANKED MEMORY MODULE)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz280.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 24000000 ; CPU OSC FREQ IN MHZ
;
INTMODE .SET 1
;
Z280_MEMWAIT .SET 0 ; Z280: MEMORY WAIT STATES (0-3)
Z280_IOWAIT .SET 1 ; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
Z280_INTWAIT .SET 0 ; Z280: INT ACK WAIT STATUS (0-3)
;
Z2UENABLE .SET TRUE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

52
Source/HBIOS/Config/RCZ280_nat.asm Normal file
View File

@@ -0,0 +1,52 @@
;
;==================================================================================================
; RC2014 Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY)
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz280.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 24000000 ; CPU OSC FREQ IN MHZ
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
INTMODE .SET 3
;
Z280_MEMWAIT .SET 0 ; Z280: MEMORY WAIT STATES (0-3)
Z280_IOWAIT .SET 1 ; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
Z280_INTWAIT .SET 0 ; Z280: INT ACK WAIT STATUS (0-3)
;
Z2UENABLE .SET TRUE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
;
Z2UOSCEXT .SET TRUE ; Z2U: USE EXTERNAL OSCILLATOR

36
Source/HBIOS/Config/RCZ80_duart.asm Normal file
View File

@@ -0,0 +1,36 @@
;
;==================================================================================================
; RC2014 Z80 CONFIGURATION W/ DUART
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#DEFINE PLATFORM_NAME "RC2014 (DUART)"
;
#include "Config/RCZ80_std.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
DUARTENABLE .SET TRUE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .SET 1 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

14
Source/HBIOS/Config/RCZ80_kio.asm
View File

@@ -22,25 +22,31 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define PLATFORM_NAME "RC2014 (KIO)"
#DEFINE PLATFORM_NAME "RC2014 (KIO)"
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "Config/RCZ80_std.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
;
KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT
;
CTCENABLE .SET TRUE ; ENABLE ZILOG CTC SUPPORT
CTCTIMER .SET TRUE ; ENABLE CTC PERIODIC TIMER
CTCBASE .SET KIOBASE+$04 ; CTC BASE I/O ADDRESS
;
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIOCNT .SET 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .SET SIOMODE_EZZ80 ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
SIO0MODE .SET SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0BASE .SET KIOBASE+$08 ; SIO 0: REGISTERS BASE ADR
SIO0CTCC .SET 0 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE
SIO0ACLK .SET 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACTCC .SET 0 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .SET 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCTCC .SET 1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

10
Source/HBIOS/Config/RCZ80_mt.asm
View File

@@ -22,11 +22,15 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#define PLATFORM_NAME "RC2014 (MT)"
#DEFINE PLATFORM_NAME "RC2014 (MT)"
;
#include "Config/RCZ80_std.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]

11
Source/HBIOS/Config/RCZ80_std.asm
View File

@@ -22,19 +22,26 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz80.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
;
FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

49
Source/HBIOS/Config/RCZ80_zrc.asm Normal file
View File

@@ -0,0 +1,49 @@
;
;==================================================================================================
; RC2014 Z80 ZRC CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_rcz80.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
;
MEMMGR .SET MM_ZRC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
;
FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

65
Source/HBIOS/Config/SBC_max.asm Normal file
View File

@@ -0,0 +1,65 @@
;
;==================================================================================================
; SBC MAXIMUM CONFIGURATION
;==================================================================================================
;
; THIS CONFIGURATION FILE IS *NOT* MEANT TO GENERATE A FUNCTIONAL ROM.
; IT IS USED TO HELP TEST BUILDS WITH MOST FEATURES ENABLED.
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .SET OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .SET BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_sbc.asm"
;
BATCOND .SET TRUE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .SET TRUE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .SET TRUE ; ENABLE FONT COMPRESSION
;
KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT
;
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSKYENABLE .SET TRUE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
;
SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
VDUENABLE .SET TRUE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .SET TRUE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
VGAENABLE .SET TRUE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
FDENABLE .SET TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
;
RFENABLE .SET TRUE ; RF: ENABLE RAM FLOPPY DRIVER
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
;
PRPENABLE .SET TRUE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
;
AY38910ENABLE .SET TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

2
Source/HBIOS/Config/SBC_simh.asm
View File

@@ -22,7 +22,7 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#DEFINE PLATFORM_NAME "SBC (simh)"
;

4
Source/HBIOS/Config/SBC_std.asm
View File

@@ -22,7 +22,7 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_sbc.asm"
;
@@ -33,7 +33,7 @@ CVDUENABLE .SET TRUE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
VGAENABLE .SET TRUE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_DIO3 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
FDMODE .SET FDMODE_DIO3 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;

12
Source/HBIOS/Config/SCZ180_126.asm
View File

@@ -22,12 +22,14 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define PLATFORM_NAME "SC126"
#DEFINE PLATFORM_NAME "SC126"
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_scz180.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -41,8 +43,10 @@ ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
;
FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
@@ -50,3 +54,5 @@ PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDCNT .SET 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

14
Source/HBIOS/Config/SCZ180_130.asm
View File

@@ -22,12 +22,14 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define PLATFORM_NAME "SC130"
#DEFINE PLATFORM_NAME "SC130"
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_scz180.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -43,12 +45,14 @@ DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
;
FDENABLE .SET FALSE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
@@ -56,3 +60,5 @@ IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

10
Source/HBIOS/Config/SCZ180_131.asm
View File

@@ -22,12 +22,14 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define PLATFORM_NAME "SC131"
#DEFINE PLATFORM_NAME "SC131"
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_scz180.asm"
;
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -49,10 +51,12 @@ ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
;
IDEENABLE .SET FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

56
Source/HBIOS/Config/SCZ180_140.asm Normal file
View File

@@ -0,0 +1,56 @@
;
;==================================================================================================
; SC140 STANDARD CONFIGURATION
;==================================================================================================
;
; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY. THIS FILE CONTAINS
; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS. IT IS INTENDED THAT YOU MAKE
; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
; YOUR FILE IN THE BUILD PROCESS.
;
; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
; ANYTHING AS IS. THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
; SETTINGS.
;
; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#DEFINE PLATFORM_NAME "SC140"
;
#include "cfg_scz180.asm"
;
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
;
Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
HBIOS_MUTEX .SET FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
;
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
;
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3]
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
;
SDENABLE .SET TRUE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

2
Source/HBIOS/Config/UNA_std.asm
View File

@@ -22,6 +22,6 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_una.asm"

2
Source/HBIOS/Config/ZETA2_std.asm
View File

@@ -22,7 +22,7 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_zeta2.asm"
;

2
Source/HBIOS/Config/ZETA_std.asm
View File

@@ -22,7 +22,7 @@
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
; DIRECTORIES ABOVE THIS ONE).
;
#define BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
;
#include "cfg_zeta.asm"
;

51
Source/HBIOS/Makefile
View File

@@ -1,26 +1,33 @@
OBJECTS =
ifndef ROM_CONFIG
ROM_CONFIG=std
endif
ifeq (1,1)
OBJECTS += DYNO_std.rom DYNO_std.com
OBJECTS += EZZ80_std.rom EZZ80_std.com
OBJECTS += EZZ80_tz80.rom EZZ80_tz80.com
OBJECTS += MK4_std.rom MK4_std.com
OBJECTS += N8_std.rom N8_std.com
OBJECTS += RCZ180_ext.rom RCZ180_ext.com
OBJECTS += RCZ180_nat.rom RCZ180_nat.com
OBJECTS += RCZ80_kio.rom RCZ80_kio.com
OBJECTS += RCZ80_mt.rom RCZ80_mt.com
OBJECTS += RCZ80_std.rom RCZ80_std.com
OBJECTS += SBC_simh.rom SBC_simh.com
OBJECTS += SBC_std.rom SBC_std.com
OBJECTS += SCZ180_126.rom SCZ180_126.com
OBJECTS += SCZ180_130.rom SCZ180_130.com
OBJECTS += SCZ180_131.rom SCZ180_131.com
OBJECTS += UNA_std.rom
OBJECTS += ZETA_std.rom ZETA_std.com
OBJECTS += ZETA2_std.rom ZETA2_std.com
ifdef ROM_PLATFORM
OBJECTS = ${ROM_PLATFORM}_${ROM_CONFIG}.rom ${ROM_PLATFORM}_${ROM_CONFIG}.com ${ROM_PLATFORM}_${ROM_CONFIG}.upd
else
OBJECTS += ZETA2_std.rom ZETA2_std.com
OBJECTS += DYNO_std.rom DYNO_std.com DYNO_std.upd
OBJECTS += EZZ80_std.rom EZZ80_std.com EZZ80_std.upd
OBJECTS += EZZ80_tz80.rom EZZ80_tz80.com EZZ80_tz80.upd
OBJECTS += MK4_std.rom MK4_std.com MK4_std.upd
OBJECTS += N8_std.rom N8_std.com N8_std.upd
OBJECTS += RCZ180_ext.rom RCZ180_ext.com RCZ180_ext.upd
OBJECTS += RCZ180_nat.rom RCZ180_nat.com RCZ180_nat.upd
OBJECTS += RCZ280_ext.rom RCZ280_ext.com RCZ280_ext.upd
OBJECTS += RCZ280_nat.rom RCZ280_nat.com RCZ280_nat.upd
OBJECTS += RCZ80_kio.rom RCZ80_kio.com RCZ80_kio.upd
OBJECTS += RCZ80_mt.rom RCZ80_mt.com RCZ80_mt.upd
OBJECTS += RCZ80_duart.rom RCZ80_duart.com RCZ80_duart.upd
OBJECTS += RCZ80_std.rom RCZ80_std.com RCZ80_std.upd
OBJECTS += RCZ80_zrc.rom RCZ80_zrc.com RCZ80_zrc.upd
OBJECTS += SBC_simh.rom SBC_simh.com SBC_simh.upd
OBJECTS += SBC_std.rom SBC_std.com SBC_std.upd
OBJECTS += SCZ180_126.rom SCZ180_126.com SCZ180_126.upd
OBJECTS += SCZ180_130.rom SCZ180_130.com SCZ180_130.upd
OBJECTS += SCZ180_131.rom SCZ180_131.com SCZ180_131.upd
OBJECTS += SCZ180_140.rom SCZ180_140.com SCZ180_140.upd
OBJECTS += UNA_std.rom
OBJECTS += ZETA_std.rom ZETA_std.com ZETA_std.upd
OBJECTS += ZETA2_std.rom ZETA2_std.com ZETA2_std.upd
endif
MOREDIFF = camel80.bin game.bin hbios_rom.bin nascom.bin prefix.bin usrrom.bin \
@@ -28,7 +35,7 @@ MOREDIFF = camel80.bin game.bin hbios_rom.bin nascom.bin prefix.bin usrrom.bin \
eastaegg.bin hbios_img.bin imgpad.bin osimg.bin tastybasic.bin \
game.bin usrrom.bin
SUBDIRS =
SUBDIRS =
DEST = ../../Binary
TOOLS =../../Tools
OTHERS = *.img *.rom *.com *.bin *.z80 cpm.sys zsys.sys Build.inc RomDisk.tmp font*.asm *.dat

80
Source/HBIOS/acia.asm
View File

@@ -57,11 +57,6 @@ ACIA_ACIA .EQU 1
ACIA_RTSON .EQU %00000000 ; BIT MASK TO ASSERT RTS
ACIA_RTSOFF .EQU %01000000 ; BIT MASK TO DEASSERT RTS
;
#IF (INTMODE > 1)
.ECHO "*** ERROR: UNSUPPORTED INTMODE FOR ACIA DRIVER!!!\n"
!!! ; FORCE AN ASSEMBLY ERROR
#ENDIF
;
;
;
ACIA_PREINIT:
@@ -120,17 +115,12 @@ ACIA_INITUNIT:
CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
#ENDIF
;
#IF (INTMODE > 1)
.ECHO "*** ERROR: ACIA DEVICE DOES NOT SUPPORT INTMODE 2!!!\n"
!!! ; FORCE AN ASSEMBLY ERROR
#ENDIF
;
; IT IS EASY TO SPECIFY A SERIAL CONFIG THAT CANNOT BE IMPLEMENTED
; DUE TO THE CONSTRAINTS OF THE ACIA. HERE WE FORCE A GENERIC
; FAILSAFE CONFIG ONTO THE CHANNEL. IF THE SUBSEQUENT "REAL"
; CONFIG FAILS, AT LEAST THE CHIP WILL BE ABLE TO SPIT DATA OUT
; AT A RATIONAL BAUD/DATA/PARITY/STOP CONFIG.
CALL ACIA_INITSAFE
; IT IS EASY TO SPECIFY A SERIAL CONFIG THAT CANNOT BE IMPLEMENTED
; DUE TO THE CONSTRAINTS OF THE ACIA. HERE WE FORCE A GENERIC
; FAILSAFE CONFIG ONTO THE CHANNEL. IF THE SUBSEQUENT "REAL"
; CONFIG FAILS, AT LEAST THE CHIP WILL BE ABLE TO SPIT DATA OUT
; AT A RATIONAL BAUD/DATA/PARITY/STOP CONFIG.
CALL ACIA_INITSAFE
;
; SET DEFAULT CONFIG
LD DE,-1 ; LEAVE CONFIG ALONE
@@ -158,18 +148,18 @@ ACIA_INIT1:
;
; INTERRUPT HANDLERS
;
#IF (INTMODE == 0)
#IF (INTMODE != 1)
;
; NO INTERRUPT HANDLERS UNDER INTMODE 0. GENERATE A PANIC
; IF SOMETHING TRIES TO CALL THEM.
;
ACIA0_INT:
ACIA1_INT:
CALL PANIC
CALL PANIC ; NO RETURN
;
#ENDIF
;
#IF (INTMODE > 0)
#IF (INTMODE == 1)
;
ACIA0_INT:
LD IY,ACIA0_CFG ; POINT TO ACIA0 CFG
@@ -263,7 +253,7 @@ ACIA_FNTBL:
;
;
;
#IF (INTMODE == 0)
#IF (INTMODE != 1)
;
ACIA_IN:
CALL ACIA_IST ; CHAR WAITING?
@@ -336,7 +326,7 @@ ACIA_OUT:
;
;
;
#IF (INTMODE == 0)
#IF (INTMODE != 1)
;
ACIA_IST:
LD C,(IY+3) ; STATUS PORT
@@ -403,6 +393,7 @@ ACIA_INITDEVX:
LD D,(IY+5) ; HIGH BYTE
;
ACIA_INITDEV1:
LD (ACIA_NEWCFG),DE ; SAVE NEW CONFIG
;
#IF (ACIADEBUG)
PUSH DE
@@ -498,20 +489,26 @@ ACIA_WSTBL:
.DB %00011110 ; 7/E/2
ACIA_INITWS2:
LD A,B ; PUT FANAL VALUE IN A
DEC A ; ZERO INDEX ADJUSTMENT
RLA ; MOVE BITS TO
RLA ; ... PROPER LOCATION
OR C ; COMBINE WITH WORKING VALUE
JR ACIA_INITGO
LD A,B ; PUT FANAL VALUE IN A
DEC A ; ZERO INDEX ADJUSTMENT
RLA ; MOVE BITS TO
RLA ; ... PROPER LOCATION
OR C ; COMBINE WITH WORKING VALUE
;
; SAVE CONFIG PERMANENTLY NOW
LD DE,(ACIA_NEWCFG) ; GET NEW CONFIG BACK
LD (IY+4),E ; SAVE LOW WORD
LD (IY+5),D ; SAVE HI WORD
;
JR ACIA_INITGO
;
ACIA_INITSAFE:
LD A,%00010110 ; DEFAULT CONFIG
;
ACIA_INITGO:
;
#IF (INTMODE > 0)
OR %10000000 ; ENABLE RCV INT
#IF (INTMODE == 1)
OR %10000000 ; ENABLE RCV INT
#ENDIF
;
LD (ACIA_CMD),A ; SAVE SHADOW REGISTER
@@ -530,7 +527,7 @@ ACIA_INITGO:
LD A,(ACIA_CMD) ; RESTORE CONFIG VALUE
OUT (C),A ; DO IT
;
#IF (INTMODE > 0)
#IF (INTMODE == 1)
;
; RESET THE RECEIVE BUFFER
LD E,(IY+6)
@@ -571,21 +568,16 @@ ACIA_DEVICE:
LD D,CIODEV_ACIA ; D := DEVICE TYPE
LD E,(IY) ; E := PHYSICAL UNIT
LD C,$00 ; C := DEVICE TYPE, 0x00 IS RS-232
LD H,0 ; H := 0, DRIVER HAS NO MODES
LD L,(IY+3) ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS
RET
;
; ACIA DETECTION ROUTINE
;
; NOTE THAT THE ACIA MODULES ONLY QUALIFY ADDRESS BITS 7 & 6, SO
; THE ACIA'S TWO PORTS APPEAR REPEATEDLY OVER AN ADDRESS RANGE
; OF $40 STARTING FROM THE REAL BASE PORT.
; WE TAKE ADVANTAGE OF THIS TO AVOID CONFLICTING WITH SIO
; AND COMPACT FLASH MODULES DURING DETECTION PROBES.
;
ACIA_DETECT:
LD A,(IY+3) ; BASE PORT ADDRESS
ADD A,$20 ; OFFSET (SEE ABOVE)
LD C,A ; PUT IN C FOR I/O
LD A,(IY+3) ; BASE PORT ADDRESS
LD C,A ; PUT IN C FOR I/O
CALL ACIA_DETECT2 ; CHECK IT
JR Z,ACIA_DETECT1 ; FOUND IT, RECORD IT
LD A,ACIA_NONE ; NOTHING FOUND
@@ -605,6 +597,7 @@ ACIA_DETECT2:
RET NZ ; RETURN IF NOT ZERO
LD A,$02 ; CLEAR MASTER RESET
OUT (C),A ; DO IT
IN A,(C) ; GET STATUS AGAIN
; CHECK FOR EXPECTED BITS:
; TDRE=1, DCD & CTS = 0
AND %00001110 ; BIT MASK FOR "STABLE" BITS
@@ -659,9 +652,10 @@ ACIA_STR_ACIA .DB "ACIA$"
; WORKING VARIABLES
;
ACIA_DEV .DB 0 ; DEVICE NUM USED DURING INIT
ACIA_CMD .DB 0 ; COMMAND PORT SHADOW REGISTER
ACIA_CMD .DB 0 ; COMMAND PORT SHADOW REGISTER
ACIA_NEWCFG .DW 0 ; TEMP STORE FOR NEW CFG
;
#IF (INTMODE == 0)
#IF (INTMODE != 1)
;
ACIA0_RCVBUF .EQU 0
ACIA1_RCVBUF .EQU 0
@@ -674,7 +668,7 @@ ACIA0_RCVBUF:
ACIA0_BUFCNT .DB 0 ; CHARACTERS IN RING BUFFER
ACIA0_HD .DW ACIA0_BUF ; BUFFER HEAD POINTER
ACIA0_TL .DW ACIA0_BUF ; BUFFER TAIL POINTER
ACIA0_BUF .FILL 32,0 ; RECEIVE RING BUFFER
ACIA0_BUF .FILL ACIA_BUFSZ,0 ; RECEIVE RING BUFFER
ACIA0_BUFEND .EQU $ ; END OF BUFFER
ACIA0_BUFSZ .EQU $ - ACIA0_BUF ; SIZE OF RING BUFFER
;
@@ -684,7 +678,7 @@ ACIA1_RCVBUF:
ACIA1_BUFCNT .DB 0 ; CHARACTERS IN RING BUFFER
ACIA1_HD .DW ACIA1_BUF ; BUFFER HEAD POINTER
ACIA1_TL .DW ACIA1_BUF ; BUFFER TAIL POINTER
ACIA1_BUF .FILL 32,0 ; RECEIVE RING BUFFER
ACIA1_BUF .FILL ACIA_BUFSZ,0 ; RECEIVE RING BUFFER
ACIA1_BUFEND .EQU $ ; END OF BUFFER
ACIA1_BUFSZ .EQU $ - ACIA1_BUF ; SIZE OF RING BUFFER
;

39
Source/HBIOS/asci.asm
View File

@@ -87,7 +87,7 @@ ASCI1_IVT .EQU IVT(INT_SER1)
ASCI_PREINIT:
;
; SETUP THE DISPATCH TABLE ENTRIES
; NOTE: INTS WILL BE DISABLED WHEN PREINIT IS CALLED AND THEY MUST REMIAIN
; NOTE: INTS WILL BE DISABLED WHEN PREINIT IS CALLED AND THEY MUST REMAIN
; DISABLED.
;
LD B,ASCI_CFGCNT ; LOOP CONTROL
@@ -575,6 +575,8 @@ ASCI_DEVICE:
LD D,CIODEV_ASCI ; D := DEVICE TYPE
LD E,(IY) ; E := PHYSICAL UNIT
LD C,$00 ; C := DEVICE TYPE, 0x00 IS RS-232
LD H,0 ; H := 0, DRIVER HAS NO MODES
LD L,(IY+3) ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS
RET
;
@@ -776,7 +778,7 @@ ASCI0_RCVBUF:
ASCI0_BUFCNT .DB 0 ; CHARACTERS IN RING BUFFER
ASCI0_HD .DW ASCI0_BUF ; BUFFER HEAD POINTER
ASCI0_TL .DW ASCI0_BUF ; BUFFER TAIL POINTER
ASCI0_BUF .FILL 32,0 ; RECEIVE RING BUFFER
ASCI0_BUF .FILL ASCI_BUFSZ,0 ; RECEIVE RING BUFFER
ASCI0_BUFEND .EQU $ ; END OF BUFFER
ASCI0_BUFSZ .EQU $ - ASCI0_BUF ; SIZE OF RING BUFFER
;
@@ -784,7 +786,7 @@ ASCI1_RCVBUF:
ASCI1_BUFCNT .DB 0 ; CHARACTERS IN RING BUFFER
ASCI1_HD .DW ASCI1_BUF ; BUFFER HEAD POINTER
ASCI1_TL .DW ASCI1_BUF ; BUFFER TAIL POINTER
ASCI1_BUF .FILL 32,0 ; RECEIVE RING BUFFER
ASCI1_BUF .FILL ASCI_BUFSZ,0 ; RECEIVE RING BUFFER
ASCI1_BUFEND .EQU $ ; END OF BUFFER
ASCI1_BUFSZ .EQU $ - ASCI1_BUF ; SIZE OF RING BUFFER
;
@@ -794,8 +796,32 @@ ASCI1_BUFSZ .EQU $ - ASCI1_BUF ; SIZE OF RING BUFFER
;
ASCI_CFG:
;
#IF (ASCISWAP)
;
ASCI1_CFG:
; ASCI CHANNEL B CONFIG
.DB 0 ; DEVICE NUMBER (SET DURING INIT)
.DB 0 ; ASCI TYPE (SET DURING INIT)
.DB 1 ; MODULE ID
.DB ASCI1_BASE ; BASE PORT
.DW ASCI1CFG ; LINE CONFIGURATION
.DW ASCI1_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
ASCI_CFGSIZ .EQU $ - ASCI_CFG ; SIZE OF ONE CFG TABLE ENTRY
;
ASCI0_CFG:
; ASCI MODULE A CONFIG
; ASCI CHANNEL A CONFIG
.DB 0 ; DEVICE NUMBER (SET DURING INIT)
.DB 0 ; ASCI TYPE (SET DURING INIT)
.DB 0 ; MODULE ID
.DB ASCI0_BASE ; BASE PORT
.DW ASCI0CFG ; LINE CONFIGURATION
.DW ASCI0_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
#ELSE
;
ASCI0_CFG:
; ASCI CHANNEL A CONFIG
.DB 0 ; DEVICE NUMBER (SET DURING INIT)
.DB 0 ; ASCI TYPE (SET DURING INIT)
.DB 0 ; MODULE ID
@@ -806,7 +832,7 @@ ASCI0_CFG:
ASCI_CFGSIZ .EQU $ - ASCI_CFG ; SIZE OF ONE CFG TABLE ENTRY
;
ASCI1_CFG:
; ASCI MODULE B CONFIG
; ASCI CHANNEL B CONFIG
.DB 0 ; DEVICE NUMBER (SET DURING INIT)
.DB 0 ; ASCI TYPE (SET DURING INIT)
.DB 1 ; MODULE ID
@@ -814,4 +840,7 @@ ASCI1_CFG:
.DW ASCI1CFG ; LINE CONFIGURATION
.DW ASCI1_RCVBUF ; POINTER TO RCV BUFFER STRUCT
;
#ENDIF
;
;
ASCI_CFGCNT .EQU ($ - ASCI_CFG) / ASCI_CFGSIZ

75
Source/HBIOS/audio.inc Normal file
View File

@@ -0,0 +1,75 @@
#IF AUDIOTRACE
#DEFINE AUDTRACE(STR) PUSH DE \ LD DE, STR \ CALL WRITESTR \ POP DE
#DEFINE AUDTRACE_A CALL PRTHEXBYTE
#DEFINE AUDTRACE_B PUSH AF \ LD A, B \ CALL PRTHEXBYTE \ POP AF
#DEFINE AUDTRACE_D PUSH AF \ LD A, D \ CALL PRTHEXBYTE \ POP AF
#DEFINE AUDTRACE_E PUSH AF \ LD A, E \ CALL PRTHEXBYTE \ POP AF
#DEFINE AUDTRACE_L PUSH AF \ LD A, L \ CALL PRTHEXBYTE \ POP AF
#DEFINE AUDTRACE_HL CALL PRTHEXWORDHL
#DEFINE AUDTRACE_BC PUSH HL \ PUSH BC \ POP HL \ CALL PRTHEXWORDHL \ POP HL
#DEFINE AUDTRACE_DE PUSH HL \ PUSH DE \ POP HL \ CALL PRTHEXWORDHL \ POP HL
#DEFINE AUDTRACE_IY PUSH HL \ PUSH IY \ POP HL \ CALL PRTHEXWORDHL \ POP HL
#DEFINE AUDDEBUG(S) push hl \ CALL PRTSTRD \ .TEXT S \ .TEXT "$" \ pop hl ; $$$$$$ PRINT STRING S TO CONSOLE - PRTD("HELLO") - NO TRAILING $ REQUIRED
#DEFINE AUDTRACE_CR AUDDEBUG("\r\n$")
#ELSE
#DEFINE AUDTRACE(S)
#DEFINE AUDTRACE_A
#DEFINE AUDTRACE_B
#DEFINE AUDTRACE_D
#DEFINE AUDTRACE_E
#DEFINE AUDTRACE_L
#DEFINE AUDTRACE_BC
#DEFINE AUDTRACE_HL
#DEFINE AUDTRACE_DE
#DEFINE AUDTRACE_IY
#DEFINE AUDDEBUG(STR)
#DEFINE AUDTRACE_CR
#ENDIF
#IFNDEF AUDIOUTILS
#DEFINE AUDIOUTILS
AUD_NOTE:
AUDDEBUG("AUDNOTE ")
AUDTRACE_HL
AUDTRACE_CR
AUDTRACE_DE
AUDTRACE_CR
push de
LD DE, 48
CALL DIV16
; BC IS OCTAVE COUNT
; HL is NOTE WITIN OCTAVE
ADD HL, HL
pop de
ADD HL, DE
LD A, (HL) ; RETRIEVE PERIOD COUNT FROM SN7NOTETBL
INC HL
LD H, (HL)
LD L, A
INC C
AUD_NOTE1:
DEC C
JR Z, AUD_NOTE2
SRL H
RR L
JR AUD_NOTE1
AUD_NOTE2:
LD A, L ; IF NOT ZERO
OR H
RET NZ ; RETURN THE CALCULATED PERIOD
LD H, $FF ; OTHERWISE RETURN -1 PERIOD (ERROR)
LD L, $FF
RET
#ENDIF

122
Source/HBIOS/ay.asm
View File

@@ -1,122 +0,0 @@
;
;======================================================================
; PSG AY-3-8910 DRIVER FOR CONSOLE BELL
; WILL ALSO WORK WITH YM2149
;======================================================================
;
#IF (AYMODE == AYMODE_SCG)
AY_RSEL .EQU $9A
AY_RDAT .EQU $9B
AY_ACR .EQU $9C
#ENDIF
;
#IF (AYMODE == AYMODE_N8)
AY_RSEL .EQU $9C
AY_RDAT .EQU $9D
AY_ACR .EQU N8_DEFACR
#ENDIF
;
#IF (AYMODE == AYMODE_RCZ80)
AY_RSEL .EQU $D8
AY_RDAT .EQU $D0
#ENDIF
;
#IF (AYMODE == AYMODE_RCZ180)
AY_RSEL .EQU $68
AY_RDAT .EQU $60
#ENDIF
;
AY_R0CHAP .EQU $00
AY_R1CHAP .EQU $01
AY_R2CHBP .EQU $02
AY_R3CHBP .EQU $03
AY_R7ENAB .EQU $07
AY_R8AVOL .EQU $08
AY_R9BVOL .EQU $09
;
;======================================================================
; PSG AY-3-8910 DRIVER - INITIALIZATION
;======================================================================
;
AY_INIT:
CALL NEWLINE ; FORMATTING
PRTS("AY: IO=0x$")
LD A,AY_RSEL
CALL PRTHEXBYTE
CALL AY_PROBE ; CHECK FOR HW EXISTENCE
JR Z,AY_INIT1 ; CONTINUE IF PRESENT
;
; HARDWARE NOT PRESENT
;
PRTS(" NOT PRESENT$")
OR $FF ; SIGNAL FAILURE
RET
;
AY_INIT1:
CALL AY_INIT2
CALL AY_BEEP
AY_INIT2:
LD D,AY_R7ENAB ; SET MIXER CONTROL / IO ENABLE
LD E,$FF ; $FF - 11 111 111
CALL AY_WRTPSG ; I/O PORTS DISABLED, NOISE CHANNEL C, B, A DISABLE, TONE CHANNEL C, B, A DISABLE
;
LD B,2
LD D,AY_R8AVOL ; SET VOLUME TO 0
LD E,$00
AY_QUIET:
CALL AY_WRTPSG ; CYCLING THROUGH ALL CHANNELS
INC A
DJNZ AY_QUIET
RET
;
; PLAY A BEEP TONE ON CENTER CHANNEL (LEFT AND RIGHT SPEAKERS)
;
AY_BEEP:
LD D,AY_R2CHBP ; SET TONE PERIOD
LD E,$55 ; CHANNEL B - R00 & R01
CALL AY_WRTPSG ; $0055 = XXXX0000 01010101
LD D,AY_R3CHBP
LD E,0
CALL AY_WRTPSG
;
LD D,AY_R7ENAB ; $FD = 11 111 101
LD E,$FD ; SET MIXER CONTROL / IO ENABLE
CALL AY_WRTPSG ; I/O PORTS DISABLED, NOISE CHANNEL C, B, A DISABLE, TONE CHANNEL B ENABLE
;
LD D,AY_R9BVOL
LD E,$07 ; SET CHANNEL B VOLUME TO 50% (7/16)
CALL AY_WRTPSG
;
CALL LDELAY ; HALF SECOND
RET
;
; WRITE DATA E TO PSG REG A
;
AY_WRTPSG:
HB_DI
#IF (CPUFAM == CPU_Z180)
IN0 A,(Z180_DCNTL) ; GET WAIT STATES
PUSH AF ; SAVE VALUE
OR %00110000 ; FORCE SLOW OPERATION (I/O W/S=3)
OUT0 (Z180_DCNTL),A ; AND UPDATE DCNTL
#ENDIF
LD A,D
OUT (AY_RSEL),A
LD A,E
OUT (AY_RDAT),A
#IF (CPUFAM == CPU_Z180)
POP AF ; GET SAVED DCNTL VALUE
OUT0 (Z180_DCNTL),A ; AND RESTORE IT
#ENDIF
HB_EI
RET
;
; CHECK THERE IS A DEVICE PRESENT
;
AY_PROBE:
#IF ((AYMODE == AYMODE_SCG) | (AYMODE == AYMODE_N8))
LD A,$FF
OUT (AY_ACR),A ; INIT AUX CONTROL REG
#ENDIF
XOR A
RET

621
Source/HBIOS/ay38910.asm Normal file
View File

@@ -0,0 +1,621 @@
;======================================================================
;
; AY-3-8910 / YM2149 SOUND DRIVER
;
;======================================================================
;
; @3.579545 OCTAVE RANGE IS 2 - 7 (Bb2/A#2 .. A7)
; @4.000000 OCTAVE RANGE IS 2 - 7 (B2 .. A7)
;
AY_RCSND .EQU 0 ; 0 = EB MODULE, 1=MF MODULE
;
#IF (AYMODE == AYMODE_SCG)
AY_RSEL .EQU $9A
AY_RDAT .EQU $9B
AY_RIN .EQU AY_RSEL
AY_ACR .EQU $9C
AY_CLK .SET 3579545 ; MSX NTSC COLOUR BURST FREQ = 315/88
#ENDIF
;
#IF (AYMODE == AYMODE_N8)
AY_RSEL .EQU $9C
AY_RDAT .EQU $9D
AY_RIN .EQU AY_RSEL
AY_ACR .EQU N8_DEFACR
#ENDIF
;
#IF (AYMODE == AYMODE_RCZ80)
AY_RSEL .EQU $D8
AY_RDAT .EQU $D0
AY_RIN .EQU AY_RSEL+AY_RCSND
#ENDIF
;
#IF (AYMODE == AYMODE_RCZ180)
AY_RSEL .EQU $68
AY_RDAT .EQU $60
AY_RIN .EQU AY_RSEL+AY_RCSND
#ENDIF
;
#IF (AYMODE == AYMODE_MSX)
AY_RSEL .EQU $A0
AY_RDAT .EQU $A1
AY_RIN .EQU $A2
#ENDIF
;
;======================================================================
;
; REGISTERS
;
AY_R2CHBP .EQU $02
AY_R3CHBP .EQU $03
AY_R7ENAB .EQU $07
AY_R8AVOL .EQU $08
;
;======================================================================
;
; DRIVER FUNCTION TABLE AND INSTANCE DATA
;
AY_FNTBL:
.DW AY_RESET
.DW AY_VOLUME
.DW AY_PERIOD
.DW AY_NOTE
.DW AY_PLAY
.DW AY_QUERY
.DW AY_DURATION
.DW AY_DEVICE
;
#IF (($ - AY_FNTBL) != (SND_FNCNT * 2))
.ECHO "*** INVALID SND FUNCTION TABLE ***\n"
!!!!!
#ENDIF
;
AY_IDAT .EQU 0 ; NO INSTANCE DATA ASSOCIATED WITH THIS DEVICE
;
;======================================================================
;
; DEVICE CAPABILITIES AND CONFIGURATION
;
AY_TONECNT .EQU 3 ; COUNT NUMBER OF TONE CHANNELS
AY_NOISECNT .EQU 1 ; COUNT NUMBER OF NOISE CHANNELS
;
#IF (AY_CLK > 3579545) ; DEPENDING ON THE
AY_SCALE .EQU 2 ; INPUT CLOCK FREQUENCY
#ELSE ; PRESCALE THE TONE PERIOD
AY_SCALE .EQU 3 ; DATA TO MAINTAIN MAXIMUM
#ENDIF ; RANGE AND ACCURACY
;
AY_RATIO .EQU (AY_CLK * 100) / (16 >> AY_SCALE)
;
#INCLUDE "audio.inc"
;
;======================================================================
;
; DRIVER INITIALIZATION (THERE IS NO PRE-INITIALIZATION)
;
; ANNOUNCE DEVICE ON CONSOLE. ACTIVATE DEVICE IF REQUIRED.
; SETUP FUNCTION TABLES. SETUP THE DEVICE.
; ANNOUNCE DEVICE WITH BEEP. SET VOLUME OFF.
; RETURN INITIALIZATION STATUS
;
AY38910_INIT:
CALL NEWLINE ; ANNOUNCE
PRTS("AY: IO=0x$")
LD A,AY_RSEL
CALL PRTHEXBYTE
;
#IF ((AYMODE == AYMODE_SCG) | (AYMODE == AYMODE_N8))
LD A,$FF ; ACTIVATE DEVICE BIT 4 IS AY RESET CONTROL, BIT 3 IS ACTIVE LED
OUT (AY_ACR),A ; SET INIT AUX CONTROL REG
#ENDIF
;
LD DE,(AY_R2CHBP*256)+$55 ; SIMPLE HARDWARE PROBE
CALL AY_WRTPSG ; WRITE AND
CALL AY_RDPSG ; READ TO A
LD A,$55 ; SOUND CHANNEL
CP E ; REGISTER
JR Z,AY_FND
;
CALL PRTSTRD \ .TEXT " NOT PRESENT$"
;
LD A,$FF ; UNSUCCESSFULL INIT
RET
;
AY_FND: LD IY, AY_IDAT ; SETUP FUNCTION TABLE
LD BC, AY_FNTBL ; POINTER TO INSTANCE DATA
LD DE, AY_IDAT ; BC := FUNCTION TABLE ADDRESS
CALL SND_ADDENT ; DE := INSTANCE DATA PTR
;
CALL AY_INIT ; SET DEFAULT CHIP CONFIGURATION
;
LD E,$07 ; SET VOLUME TO 50%
CALL AY_SETV ; ON ALL CHANNELS
;
; LD DE,(AY_R2CHBP*256)+$55 ; BEEP ON CHANNEL B (CENTER)
; CALL AY_WRTPSG ; R02 = $55 = 01010101
LD DE,(AY_R3CHBP*256)+$00
CALL AY_WRTPSG ; R03 = $00 = XXXX0000
;
#IF (SYSTIM != TM_NONE)
LD A, TICKFREQ / 3 ; SCHEDULE IN 1/3 SECOND TO TURN OFF SOUND
LD (AY_TIMTIK), A
;
LD HL, (VEC_TICK + 1) ; GET CUR TICKS VECTOR
LD (AY_TIMHOOK), HL ; SAVE IT INTERNALLY
LD HL, AY_TIMER ; INSTALL TIMER HOOK HANDLER
LD (VEC_TICK + 1), HL
;
LD A, $02 ; NOT READY & IN INTERUPT HANDLER
LD (AY_READY), A
#ELSE
CALL LDELAY ; HALF SECOND DELAY
LD E,$00 ; SET VOLUME OFF
CALL AY_SETV ; ON ALL CHANNELS
LD A, $01 ; READY & NOT IN INTERUPT HANDLER
LD (AY_READY), A
#ENDIF
;
XOR A ; SUCCESSFULL INIT
RET
;
#IF (SYSTIM != TM_NONE)
AY_TIMER:
LD A, (AY_TIMTIK)
DEC A
LD (AY_TIMTIK), A
JR NZ, AY_TIMER1
;
LD E,$00 ; SET VOLUME OFF
CALL AY_SETV ; ON ALL CHANNELS
LD A, $01 ; READY & NOT IN INTERUPT HANDLER
LD (AY_READY), A
;
LD DE, AY_TIMER ; MAKE AY_TIMER A NO_OP HANDLER
LD HL, AY_TIMER1
LD BC, 3
LDIR
;
AY_TIMER1:
JP 0 ; OVERWRITTEN WITH NEXT HANDLER
AY_TIMHOOK: .EQU $ - 2
AY_TIMTIK .DB 0 ; COUNT DOWN TO FINISH BOOT BEEP
#ENDIF
;
;======================================================================
; INITIALIZE DEVICE
;======================================================================
;
AY_INIT:
LD DE,(AY_R7ENAB*256)+$F8 ; SET MIXER CONTROL / IO ENABLE. $F8 - 11 111 000
JP AY_WRTPSG ; I/O PORTS = OUTPUT, NOISE CHANNEL C, B, A DISABLE, TONE CHANNEL C, B, A ENABLE
;
AY_CHKREDY:
LD A, (AY_READY)
BIT 0, A
RET NZ
POP HL ; REMOVE LAST RETURN ADDRESS
OR $FF
RET ; RETURN NZ
;
;======================================================================
; SET VOLUME ALL CHANNELS
;======================================================================
;
AY_SETV:
PUSH BC
LD B,AY_TONECNT ; NUMBER OF CHANNELS
LD D,AY_R8AVOL ; BASE REGISTER FOR VOLUME
AY_SV: CALL AY_WRTPSG ; CYCLING THROUGH ALL CHANNELS
INC D
DJNZ AY_SV
POP BC
RET
;
;======================================================================
; SOUND DRIVER FUNCTION - RESET
;
; INITIALIZE DEVICE. SET VOLUME OFF. RESET VOLUME AND TONE VARIABLES.
;
;======================================================================
;
AY_RESET:
AUDTRACE(AYT_INIT)
CALL AY_CHKREDY ; RETURNS TO OUR CALLER IF NOT READY
;
PUSH DE
PUSH HL
CALL AY_INIT ; SET DEFAULT CHIP CONFIGURATION
;
AUDTRACE(AYT_VOLOFF)
LD E,0 ; SET VOLUME OFF
CALL AY_SETV ; ON ALL CHANNELS
;
XOR A ; SIGNAL SUCCESS
LD (AY_PENDING_VOLUME),A ; SET VOLUME TO ZERO
LD H,A
LD L,A
LD (AY_PENDING_PERIOD),HL ; SET TONE PERIOD TO ZERO
;
POP HL
POP DE
RET
;
;======================================================================
; SOUND DRIVER FUNCTION - VOLUME
;======================================================================
;
AY_VOLUME:
AUDTRACE(AYT_VOL)
AUDTRACE_L
AUDTRACE_CR
LD A,L ; SAVE VOLUME
LD (AY_PENDING_VOLUME), A
;
XOR A ; SIGNAL SUCCESS
RET
;
;======================================================================
; SOUND DRIVER FUNCTION - NOTE
;======================================================================
;
AY_NOTE:
AUDTRACE(AYT_NOTE)
AUDTRACE_HL
AUDTRACE_CR
;
; CALL PRTHEXWORDHL
; CALL PC_COLON
;
LD DE, AY3NOTETBL ; ON ENTRY HL IS THE NOTE TO PLAY
PUSH DE ; AND DE IS THE START OF NOTE TABLE
LD DE, 48 ; LOAD DE WITH NOTE TABLE SIZE
CALL DIV16 ; AND CALCULATE OCTAVE COUNT IN BC
;
ADD HL, HL ; HL IS THE REMAINDER FROM ABOVE DIVISION (0-47) AND THE NOTE
POP DE ; TO PLAY IN THE OCTAVE. ADD IT TO THE START OF THE NOTE TABLE
ADD HL, DE ; TO POINT TO THE PERIOD FOR THE NOTE WE WANT TO PLAY.
;
LD A, (HL) ; HL POINT TO CURRENT PERIOD COUNT WE WANT TO PLAY
INC HL ; SO LOAD PERIOD COUNT FROM NOTE TABLE INTO HL
LD H, (HL) ; SO WE CAN UPDATE IT FOR THE REQUIRED OCTAVE
LD L, A
;
LD A,AY_SCALE-1 ; THE NOTE TABLE PERIOD DATA HAS BEEN
ADD A,C ; PRESCALED TO MAINTAIN RANGE SO ALLOW
LD B,A ; FOR THIS WHEN CHANGING OCTAVE
AY_NOTE1:
SRL H ; ADJUST THE PERIOD DATA
RR L ; FOR THE DESIRED OCTAVE
DJNZ AY_NOTE1 ; FALL THROUGH TO SET PERIOD AND RANGE CHECK
;
; CALL PRTHEXWORDHL
; CALL NEWLINE
;
;======================================================================
; SOUND DRIVER FUNCTION - PERIOD
;======================================================================
;
AY_PERIOD:
AUDTRACE(AYT_PERIOD)
AUDTRACE_HL
AUDTRACE_CR
LD A, H ; IF ZERO - ERROR
OR L
JR Z, AY_PERIOD1
;
LD A, H ; MAXIMUM TONE PERIOD IS 12-BITS
AND 11110000B ; ALLOWED RANGE IS 0001-0FFF (4095)
JR NZ, AY_PERIOD1 ; RETURN NZ IF NUMBER TOO LARGE
LD (AY_PENDING_PERIOD), HL ; SAVE AND RETURN SUCCESSFUL
RET
;
AY_PERIOD1:
LD A, $FF ; REQUESTED PERIOD IS LARGER
LD (AY_PENDING_PERIOD), A ; THAN THE DEVICE CAN SUPPORT
LD (AY_PENDING_PERIOD+1), A; SO SET PERIOD TO FFFF
RET ; AND RETURN FAILURE
;
;======================================================================
; SOUND DRIVER FUNCTION - PLAY
; B = FUNCTION
; C = AUDIO DEVICE
; D = CHANNEL
; A = EXIT STATUS
;======================================================================
;
AY_PLAY:
AUDTRACE(AYT_PLAY)
AUDTRACE_D
AUDTRACE_CR
CALL AY_CHKREDY ; RETURNS TO OUR CALLER IF NOT READY
;
LD A, (AY_PENDING_PERIOD + 1) ; CHECK THE HIGH BYTE OF THE PERIOD
INC A
JR Z, AY_PLAY1 ; PERIOD IS TOO LARGE, UNABLE TO PLAY
;
PUSH HL
PUSH DE
LD A,D ; LIMIT CHANNEL 0-2
AND $3 ; AND INDEX TO THE
ADD A,A ; CHANNEL REGISTER
LD D,A ; FOR THE TONE PERIOD
;
AUDTRACE(AYT_REGWR)
AUDTRACE_A
AUDTRACE_CR
;
LD HL,AY_PENDING_PERIOD ; WRITE THE LOWER
ld E,(HL) ; 8-BITS OF THE TONE PERIOD
CALL AY_WRTPSG
INC D ; NEXT REGISTER
INC HL ; NEXT BYTE
LD E,(HL) ; WRITE THE UPPER
CALL AY_WRTPSG ; 8-BITS OF THE TONE PERIOD
;
POP DE ; RECALL CHANNEL
PUSH DE ; SAVE CHANNEL
;
LD A,D ; LIMIT CHANNEL 0-2
AND $3 ; AND INDEX TO THE
ADD A,AY_R8AVOL ; CHANNEL VOLUME
LD D,A ; REGISTER
;
AUDTRACE(AYT_REGWR)
AUDTRACE_A
AUDTRACE_CR
;
INC HL ; NEXT BYTE
LD A,(HL) ; PENDING VOLUME
RRCA ; MAP THE VOLUME
RRCA ; FROM 00-FF
RRCA ; TO 00-0F
RRCA
AND $0F
LD E,A
CALL AY_WRTPSG ; SET VOL (E) IN CHANNEL REG (D)
;
POP DE ; RECALL CHANNEL
POP HL
;
XOR A ; SIGNAL SUCCESS
RET
;
AY_PLAY1:
PUSH DE ; TURN VOLUME OFF TO STOP PLAYING
LD A,D ; LIMIT CHANNEL 0-2
AND $3 ; AND INDEX TO THE
ADD A,AY_R8AVOL ; CHANNEL VOLUME
LD D,A ; REGISTER
LD E,0
CALL AY_WRTPSG ; SET VOL (E) IN CHANNEL REG (D)
POP DE
OR $FF ; SIGNAL FAILURE
RET
;
;======================================================================
; SOUND DRIVER FUNCTION - QUERY AND SUBFUNCTIONS
;======================================================================
;
AY_QUERY:
LD A, E
CP BF_SNDQ_CHCNT ; SUB FUNCTION 01
JR Z, AY_QUERY_CHCNT
;
CP BF_SNDQ_VOLUME ; SUB FUNCTION 02
JR Z, AY_QUERY_VOLUME
;
CP BF_SNDQ_PERIOD ; SUB FUNCTION 03
JR Z, AY_QUERY_PERIOD
;
CP BF_SNDQ_DEV ; SUB FUNCTION 04
JR Z, AY_QUERY_DEV
;
OR $FF ; SIGNAL FAILURE
RET
;
AY_QUERY_CHCNT:
LD BC,(AY_TONECNT*256)+AY_NOISECNT ; RETURN NUMBER OF
XOR A ; TONE AND NOISE
RET ; CHANNELS IN BC
;
AY_QUERY_PERIOD:
LD HL, (AY_PENDING_PERIOD) ; RETURN 16-BIT PERIOD
XOR A ; IN HL REGISTER
RET
;
AY_QUERY_VOLUME:
LD A, (AY_PENDING_VOLUME) ; RETURN 8-BIT VOLUME
LD L, A ; IN L REGISTER
XOR A
; LD H, A
RET
;
AY_QUERY_DEV:
LD B, SNDDEV_AY38910 ; RETURN DEVICE IDENTIFIER
LD DE, (AY_RSEL*256)+AY_RDAT ; AND ADDRESS AND DATA PORT
XOR A
RET
;
;======================================================================
; SOUND DRIVER FUNCTION - DURATION
;======================================================================
;
AY_DURATION:
LD (AY_PENDING_DURATION),HL ; SET TONE DURATION
XOR A
RET
;
;======================================================================
; SOUND DRIVER FUNCTION - DEVICE
;======================================================================
;
AY_DEVICE:
LD D,SNDDEV_AY38910 ; D := DEVICE TYPE
LD E,0 ; E := PHYSICAL UNIT
LD C,$00 ; C := DEVICE TYPE
LD H,AYMODE ; H := MODE
LD L,AY_RSEL ; L := BASE I/O ADDRESS
XOR A
RET
;
;======================================================================
; NON-BLOCKING INTERRUPT CODE
;======================================================================
;
AY_DI:
LD A, (AY_READY)
BIT 1, A
RET NZ
HB_DI
RET
;
AY_EI:
LD A, (AY_READY)
BIT 1, A
RET NZ
HB_EI
RET
;
;======================================================================
;
; WRITE DATA IN E REGISTER TO DEVICE REGISTER D
; INTERRUPTS DISABLE DURING WRITE. WRITE IN SLOW MODE IF Z180 CPU.
;
;======================================================================
;
AY_WRTPSG:
CALL AY_DI
#IFDEF SBCV2004
LD A,8 ; SBC-V2-004 CHANGE
OUT (RTCIO),A ; TO HALF CLOCK SPEED
#ENDIF
#IF (CPUFAM == CPU_Z180)
IN0 A,(Z180_DCNTL) ; GET WAIT STATES
PUSH AF ; SAVE VALUE
OR %00110000 ; FORCE SLOW OPERATION (I/O W/S=3)
OUT0 (Z180_DCNTL),A ; AND UPDATE DCNTL
#ENDIF
LD A,D ; SELECT THE REGISTER WE
OUT (AY_RSEL),A ; WANT TO WRITE TO
LD A,E ; WRITE THE VALUE TO
OUT (AY_RDAT),A ; THE SELECTED REGISTER
#IF (CPUFAM == CPU_Z180)
POP AF ; GET SAVED DCNTL VALUE
OUT0 (Z180_DCNTL),A ; AND RESTORE IT
#ENDIF
#IFDEF SBCV2004
LD A,0 ; SBC-V2-004 CHANGE TO
OUT (RTCIO),A ; NORMAL CLOCK SPEED
#ENDIF
JP AY_EI
;
;======================================================================
;
; READ FROM REGISTER D AND RETURN WITH RESULT IN E
;
AY_RDPSG:
CALL AY_DI
#IFDEF SBCV2004
LD A,8 ; SBC-V2-004 CHANGE
OUT (RTCIO),A ; TO HALF CLOCK SPEED
#ENDIF
#IF (CPUFAM == CPU_Z180)
IN0 A,(Z180_DCNTL) ; GET WAIT STATES
PUSH AF ; SAVE VALUE
OR %00110000 ; FORCE SLOW OPERATION (I/O W/S=3)
OUT0 (Z180_DCNTL),A ; AND UPDATE DCNTL
#ENDIF
LD A,D ; SELECT THE REGISTER WE
OUT (AY_RSEL),A ; WANT TO READ
IN A,(AY_RIN) ; READ SELECTED REGISTER
LD E,A
#IF (CPUFAM == CPU_Z180)
POP AF ; GET SAVED DCNTL VALUE
OUT0 (Z180_DCNTL),A ; AND RESTORE IT
#ENDIF
#IFDEF SBCV2004
LD A,0 ; SBC-V2-004 CHANGE TO
OUT (RTCIO),A ; NORMAL CLOCK SPEED
#ENDIF
JP AY_EI
;
;======================================================================
;
AY_PENDING_PERIOD .DW 0 ; PENDING PERIOD (12 BITS) ; ORDER
AY_PENDING_VOLUME .DB 0 ; PENDING VOL (8 BITS) ; SIGNIFICANT
AY_PENDING_DURATION .DW 0 ; PENDING DURATION (16 BITS)
AY_READY .DB 0 ; BIT 0 -> NZ DRIVER IS READY TO RECEIVE PLAY COMMAND
; BIT 1 -> NZ EXECUTING WITHIN TIMER HANDLER = DO NOT DIS/ENABLE INT
;
#IF AUDIOTRACE
AYT_INIT .DB "\r\nAY_INIT\r\n$"
AYT_VOLOFF .DB "\r\nAY_VOLUME OFF\r\n$"
AYT_VOL .DB "\r\nAY_VOLUME: $"
AYT_NOTE .DB "\r\nAY_NOTE: $"
AYT_PERIOD .DB "\r\nAY_PERIOD $"
AYT_PLAY .DB "\r\nAY_PLAY CH: $"
AYT_REGWR .DB "\r\nOUT AY-3-8910 $"
#ENDIF
;
;======================================================================
; QUARTER TONE FREQUENCY TABLE
;======================================================================
;
; THE FREQUENCY BY QUARTER TONE STARTING AT A0# OCTAVE 0
; USED TO MAP EACH OCTAVE (DIV BY 2 TO JUMP AN OCTAVE UP)
; FIRST PLAYABLE NOTE WILL BE 0
; ASSUMING A CLOCK OF 1843200 THIS MAPS TO A0#
;
AY3NOTETBL:
.DW AY_RATIO / 2913
.DW AY_RATIO / 2956
.DW AY_RATIO / 2999
.DW AY_RATIO / 3042
.DW AY_RATIO / 3086
.DW AY_RATIO / 3131
.DW AY_RATIO / 3177
.DW AY_RATIO / 3223
.DW AY_RATIO / 3270
.DW AY_RATIO / 3318
.DW AY_RATIO / 3366
.DW AY_RATIO / 3415
.DW AY_RATIO / 3464
.DW AY_RATIO / 3515
.DW AY_RATIO / 3566
.DW AY_RATIO / 3618
.DW AY_RATIO / 3670
.DW AY_RATIO / 3724
.DW AY_RATIO / 3778
.DW AY_RATIO / 3833
.DW AY_RATIO / 3889
.DW AY_RATIO / 3945
.DW AY_RATIO / 4003
.DW AY_RATIO / 4061
.DW AY_RATIO / 4120
.DW AY_RATIO / 4180
.DW AY_RATIO / 4241
.DW AY_RATIO / 4302
.DW AY_RATIO / 4365
.DW AY_RATIO / 4428
.DW AY_RATIO / 4493
.DW AY_RATIO / 4558
.DW AY_RATIO / 4624
.DW AY_RATIO / 4692
.DW AY_RATIO / 4760
.DW AY_RATIO / 4829
.DW AY_RATIO / 4899
.DW AY_RATIO / 4971
.DW AY_RATIO / 5043
.DW AY_RATIO / 5116
.DW AY_RATIO / 5191
.DW AY_RATIO / 5266
.DW AY_RATIO / 5343
.DW AY_RATIO / 5421
.DW AY_RATIO / 5499
.DW AY_RATIO / 5579
.DW AY_RATIO / 5661
.DW AY_RATIO / 5743

22
Source/HBIOS/bqrtc.asm
View File

@@ -159,6 +159,13 @@ BQRTC_DISPATCH:
JP Z, BQRTC_GETALM ; Get Alarm
DEC A
JP Z, BQRTC_SETALM ; Set Alarm
DEC A
JP Z, BQRTC_DEVICE ; Report RTC device info
CALL SYSCHK
LD A,ERR_NOFUNC
OR A
RET
;
; NVRAM FUNCTIONS ARE NOT AVAILABLE
;
@@ -166,7 +173,10 @@ BQRTC_GETBYT:
BQRTC_SETBYT:
BQRTC_GETBLK:
BQRTC_SETBLK:
CALL PANIC
CALL SYSCHK
LD A,ERR_NOTIMPL
OR A
RET
; RTC Get Time
; A: Result (OUT), 0=OK, Z=OK, NZ=Error
@@ -328,6 +338,16 @@ BQRTC_SETALM:
; clean up and return
XOR A ; Signal success
RET ; And return
;
; REPORT RTC DEVICE INFO
;
BQRTC_DEVICE:
LD D,RTCDEV_BQ ; D := DEVICE TYPE
LD E,0 ; E := PHYSICAL DEVICE NUMBER
LD H,0 ; H := 0, DRIVER HAS NO MODES
LD L,BQRTC_BASE ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS
RET
BQRTC_SUSPEND:
IN0 A, (BQRTC_CONTROL) ; Suspend Clock

31
Source/HBIOS/cfg_dyno.asm
View File

@@ -14,13 +14,14 @@
#DEFINE PLATFORM_NAME "DYNO"
;
PLATFORM .EQU PLT_DYNO ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU 0 ; AUTO BOOT TIMEOUT IN SECONDS, 0 TO DISABLE
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUOSC .EQU 18432000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
@@ -47,6 +48,8 @@ KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
@@ -73,12 +76,17 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG
ASCI1CFG .EQU DEFSERCFG ; ASCI 1: SERIAL LINE CONFIG
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
@@ -89,18 +97,16 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
AYENABLE .EQU FALSE ; AY: ENABLE AY PSG SOUND DRIVER
AYMODE .EQU AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_DYNO ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3|DYNO]
FDMODE .EQU FDMODE_DYNO ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
@@ -155,4 +161,11 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
;
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER
SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AY38910ENABLE .EQU FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AYMODE .EQU AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

66
Source/HBIOS/cfg_ezz80.asm
View File

@@ -14,20 +14,21 @@
#DEFINE PLATFORM_NAME "EASYZ80"
;
PLATFORM .EQU PLT_EZZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU 0 ; AUTO BOOT TIMEOUT IN SECONDS, 0 TO DISABLE
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUOSC .EQU 10000000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
MEMMGR .EQU MM_Z2 ; MM_[SBC|Z2|N8|Z180|Z280|ZRC]: MEMORY MANAGER
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .EQU $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@@ -41,8 +42,16 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU TRUE ; ENABLE ZILOG CTC SUPPORT
CTCMODE .EQU CTCMODE_EZ ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC]
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER
CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCPRE .EQU 256 ; PRESCALE CONSTANT (1-256)
CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3)
CTCOSC .EQU 921600 ; CTC CLOCK FREQUENCY
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
@@ -70,9 +79,18 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
@@ -81,29 +99,29 @@ UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_EZZ80 ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
SIO0CTCC .EQU -1 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE
SIO0MODE .EQU SIOMODE_STD ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 1843200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ADIV .EQU 1 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 1843200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BDIV .EQU 1 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
SIO1CTCC .EQU -1 ; SIO 1: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ADIV .EQU 1 ; SIO 1A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BDIV .EQU 1 ; SIO 1B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG
SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
@@ -111,18 +129,16 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
AYENABLE .EQU FALSE ; AY: ENABLE AY PSG SOUND DRIVER
AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3|DYNO]
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
@@ -166,6 +182,9 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
@@ -177,4 +196,11 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
;
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER
SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AY38910ENABLE .EQU FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

72
Source/HBIOS/cfg_master.asm
View File

@@ -11,20 +11,21 @@
#DEFINE PLATFORM_NAME "ROMWBW"
;
PLATFORM .EQU PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU 0 ; AUTO BOOT TIMEOUT IN SECONDS, 0 TO DISABLE
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .EQU MM_NONE ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
MEMMGR .EQU MM_NONE ; MM_[SBC|Z2|N8|Z180|Z280|ZRC]: MEMORY MANAGER
RAMBIAS .EQU 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -39,6 +40,10 @@ Z180_CLKDIV .EQU 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .EQU 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .EQU 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
Z280_MEMWAIT .EQU 0 ; Z280: MEMORY WAIT STATES (0-3)
Z280_IOWAIT .EQU 1 ; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
Z280_INTWAIT .EQU 0 ; Z280: INT ACK WAIT STATUS (0-3)
;
N8_PPI0 .EQU $80 ; N8: FIRST PARALLEL PORT REGISTERS BASE ADR
N8_PPI1 .EQU $84 ; N8: SECOND PARALLEL PORT REGISTERS BASE ADR
N8_RTC .EQU $88 ; N8: RTC LATCH REGISTER ADR
@@ -59,8 +64,16 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
CTCMODE .EQU CTCMODE_ZP ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC]
CTCBASE .EQU $20 ; CTC BASE I/O ADDRESS
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCPRE .EQU 256 ; PRESCALE CONSTANT (1-256)
CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3)
CTCOSC .EQU 614400 ; CTC CLOCK FREQUENCY
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
@@ -92,6 +105,15 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
@@ -103,9 +125,16 @@ UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG
ASCI1CFG .EQU DEFSERCFG ; ASCI 1: SERIAL LINE CONFIG
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
Z2UOSC .EQU 1843200 ; Z2U: OSC FREQUENCY IN MHZ
Z2UOSCEXT .EQU TRUE ; Z2U: USE EXTERNAL OSCILLATOR
Z2U0BASE .EQU $10 ; Z2U 0: BASE I/O ADDRESS
Z2U0CFG .EQU DEFSERCFG ; Z2U 0: SERIAL LINE CONFIG
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
ACIADEBUG .EQU FALSE ; ACIA: ENABLE DEBUG OUTPUT
ACIACNT .EQU 1 ; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
@@ -121,24 +150,22 @@ ACIA1CFG .EQU DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM)
SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
SIO0CTCC .EQU -1 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ADIV .EQU 1 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BDIV .EQU 1 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
SIO1CTCC .EQU -1 ; SIO 1: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ADIV .EQU 1 ; SIO 1A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1BCLK .EQU CPUOSC ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BDIV .EQU 1 ; SIO 1B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG
SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
@@ -148,19 +175,17 @@ CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_NONE ; TMS: DRIVER MODE: TMSMODE_[SCG/N8]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
;
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
AYENABLE .EQU FALSE ; AY: ENABLE AY PSG SOUND DRIVER
AYMODE .EQU AYMODE_NONE ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_NONE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3|DYNO]
FDMODE .EQU FDMODE_NONE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
@@ -232,4 +257,11 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
UFBASE .EQU $0C ; UF: REGISTERS BASE ADR
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER
SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AY38910ENABLE .EQU FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AYMODE .EQU AYMODE_NONE ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

36
Source/HBIOS/cfg_mk4.asm
View File

@@ -14,20 +14,21 @@
#DEFINE PLATFORM_NAME "MARK IV"
;
PLATFORM .EQU PLT_MK4 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU 0 ; AUTO BOOT TIMEOUT IN SECONDS, 0 TO DISABLE
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUOSC .EQU 18432000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
MEMMGR .EQU MM_Z180 ; MM_[SBC|Z2|N8|Z180|Z280|ZRC]: MEMORY MANAGER
RAMBIAS .EQU 512 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z180_BASE .EQU $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
@@ -46,6 +47,11 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
@@ -77,6 +83,8 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
@@ -88,9 +96,12 @@ UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG
ASCI1CFG .EQU DEFSERCFG ; ASCI 1: SERIAL LINE CONFIG
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
@@ -103,19 +114,17 @@ CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG/N8]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
;
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
AYENABLE .EQU FALSE ; AY: ENABLE AY PSG SOUND DRIVER
AYMODE .EQU AYMODE_SCG ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_N8 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3|DYNO]
FDMODE .EQU FDMODE_DIDE ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
@@ -186,4 +195,11 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
UFBASE .EQU $0C ; UF: REGISTERS BASE ADR
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER
SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AY38910ENABLE .EQU FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AYMODE .EQU AYMODE_SCG ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

36
Source/HBIOS/cfg_n8.asm
View File

@@ -14,20 +14,21 @@
#DEFINE PLATFORM_NAME "N8"
;
PLATFORM .EQU PLT_N8 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU 0 ; AUTO BOOT TIMEOUT IN SECONDS, 0 TO DISABLE
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUOSC .EQU 18432000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .EQU MM_N8 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
MEMMGR .EQU MM_N8 ; MM_[SBC|Z2|N8|Z180|Z280|ZRC]: MEMORY MANAGER
RAMBIAS .EQU 0 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z180_BASE .EQU $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
@@ -49,6 +50,11 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
@@ -80,6 +86,8 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
@@ -91,9 +99,12 @@ UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG
ASCI1CFG .EQU DEFSERCFG ; ASCI 1: SERIAL LINE CONFIG
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
@@ -106,19 +117,17 @@ CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
TMSENABLE .EQU TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_N8 ; TMS: DRIVER MODE: TMSMODE_[SCG/N8]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
;
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
AYENABLE .EQU TRUE ; AY: ENABLE AY PSG SOUND DRIVER
AYMODE .EQU AYMODE_N8 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_N8 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3|DYNO]
FDMODE .EQU FDMODE_N8 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
@@ -186,4 +195,11 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
FIFO_BASE .EQU $0C ; UF: REGISTERS BASE ADR
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER
SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AY38910ENABLE .EQU TRUE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AYMODE .EQU AYMODE_N8 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

74
Source/HBIOS/cfg_rcz180.asm
View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RC2014
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RC2014 Z180 CPU
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -14,20 +14,21 @@
#DEFINE PLATFORM_NAME "RC2014"
;
PLATFORM .EQU PLT_RCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU 0 ; AUTO BOOT TIMEOUT IN SECONDS, 0 TO DISABLE
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUOSC .EQU 18432000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
MEMMGR .EQU MM_Z180 ; MM_[SBC|Z2|N8|Z180|Z280|ZRC]: MEMORY MANAGER
RAMBIAS .EQU 512 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -46,6 +47,11 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
@@ -73,9 +79,18 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
@@ -83,32 +98,33 @@ UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG
ASCI1CFG .EQU DEFSERCFG ; ASCI 1: SERIAL LINE CONFIG
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
SIO0CTCC .EQU -1 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ADIV .EQU 1 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO0ACFG .EQU SER_115200_8N1 ; SER_115200_8N1 0A: SERIAL LINE CONFIG
SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BDIV .EQU 1 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
SIO1CTCC .EQU -1 ; SIO 1: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ADIV .EQU 1 ; SIO 1A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO1ACFG .EQU SER_115200_8N1 ; SER_115200_8N1 1A: SERIAL LINE CONFIG
SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG
SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BDIV .EQU 1 ; SIO 1B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO1BCFG .EQU SER_115200_8N1 ; SIO 1B: SERIAL LINE CONFIG
SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
@@ -116,18 +132,17 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_RC ; TMS: DRIVER MODE: TMSMODE_[SCG/N8]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
AYENABLE .EQU FALSE ; AY: ENABLE AY PSG SOUND DRIVER
AYMODE .EQU AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3|DYNO]
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
@@ -168,14 +183,18 @@ PPIDE1A8BIT .EQU FALSE ; PPIDE 1A (MASTER): 8 BIT XFER
PPIDE1B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
PPIDE2BASE .EQU $00 ; PPIDE 2: PPI REGISTERS BASE ADR
PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER;
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
@@ -187,4 +206,11 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
;
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER
SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AY38910ENABLE .EQU FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AYMODE .EQU AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

230
Source/HBIOS/cfg_rcz280.asm Normal file
View File

@@ -0,0 +1,230 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RC2014 Z280 CPU
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. INSTEAD, YOU SHOULD
; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
; UNDER THIS DIRECTORY.
;
; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
; FOR THE PLATFORM.
;
#DEFINE PLATFORM_NAME "RC2014"
;
PLATFORM .EQU PLT_RCZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
CPUFAM .EQU CPU_Z280 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUOSC .EQU 24000000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .EQU MM_Z2 ; MM_[SBC|Z2|N8|Z180|Z280|ZRC]: MEMORY MANAGER
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .EQU $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
MPGSEL_3 .EQU $7B ; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
MPGENA .EQU $7C ; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
;
Z280_MEMWAIT .EQU 0 ; Z280: MEMORY WAIT STATES (0-3)
Z280_IOWAIT .EQU 1 ; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
Z280_INTWAIT .EQU 0 ; Z280: INT ACK WAIT STATUS (0-3)
;
RTCIO .EQU $C0 ; RTC LATCH REGISTER ADR
;
KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
CTCMODE .EQU CTCMODE_TIM16 ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCPRE .EQU 256 ; PRESCALE CONSTANT (1-256)
CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3)
CTCOSC .EQU 7372800 ; CTC CLOCK FREQUENCY
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .EQU $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;
CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
;
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
Z2UOSC .EQU 1843200 ; Z2U: OSC FREQUENCY IN MHZ
Z2UOSCEXT .EQU TRUE ; Z2U: USE EXTERNAL OSCILLATOR
Z2U0BASE .EQU $10 ; Z2U 0: BASE I/O ADDRESS
Z2U0CFG .EQU DEFSERCFG ; Z2U 0: SERIAL LINE CONFIG
;
ACIAENABLE .EQU TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
ACIADEBUG .EQU FALSE ; ACIA: ENABLE DEBUG OUTPUT
ACIACNT .EQU 1 ; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
ACIA0BASE .EQU $80 ; ACIA 0: REGISTERS BASE ADR
ACIA0CLK .EQU 7372800 ; ACIA 0: OSC FREQ IN HZ
ACIA0DIV .EQU 1 ; ACIA 0: SERIAL CLOCK DIVIDER
ACIA0CFG .EQU DEFSERCFG ; ACIA 0: SERIAL LINE CONFIG (SEE STD.ASM)
ACIA1BASE .EQU $40 ; ACIA 1: REGISTERS BASE ADR
ACIA1CLK .EQU 7372800 ; ACIA 1: OSC FREQ IN HZ
ACIA1DIV .EQU 1 ; ACIA 1: SERIAL CLOCK DIVIDER
ACIA1CFG .EQU DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM)
;
SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG
SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_RC ; TMS: DRIVER MODE: TMSMODE_[SCG/N8]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
FDMAUTO .EQU TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
;
RFENABLE .EQU FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
IDEENABLE .EQU FALSE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDETRACE .EQU 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDECNT .EQU 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .EQU IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE0BASE .EQU $10 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .EQU $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .EQU $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .EQU TRUE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .EQU TRUE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .EQU IDEMODE_NONE ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE1BASE .EQU $00 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .EQU $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .EQU $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .EQU TRUE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .EQU TRUE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .EQU IDEMODE_NONE ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
IDE2BASE .EQU $00 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .EQU $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .EQU $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .EQU TRUE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .EQU TRUE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .EQU FALSE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .EQU 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPIDECNT .EQU 1 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
PPIDE0BASE .EQU $20 ; PPIDE 0: PPI REGISTERS BASE ADR
PPIDE0A8BIT .EQU FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
PPIDE1BASE .EQU $00 ; PPIDE 1: PPI REGISTERS BASE ADR
PPIDE1A8BIT .EQU FALSE ; PPIDE 1A (MASTER): 8 BIT XFER
PPIDE1B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
PPIDE2BASE .EQU $00 ; PPIDE 2: PPI REGISTERS BASE ADR
PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
HDSKENABLE .EQU FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIO_4P .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
;
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
;
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER
SN7CLK .EQU 7372800 / 4 ; DEFAULT TO CPUOSC / 4
AY38910ENABLE .EQU FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU 7372800 / 4 ; DEFAULT TO CPUOSC / 4
AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

69
Source/HBIOS/cfg_rcz80.asm
View File

@@ -14,20 +14,21 @@
#DEFINE PLATFORM_NAME "RC2014"
;
PLATFORM .EQU PLT_RCZ80 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU 0 ; AUTO BOOT TIMEOUT IN SECONDS, 0 TO DISABLE
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUOSC .EQU 7372800 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .EQU MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
MEMMGR .EQU MM_Z2 ; MM_[SBC|Z2|N8|Z180|Z280|ZRC]: MEMORY MANAGER
MPGSEL_0 .EQU $78 ; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
MPGSEL_1 .EQU $79 ; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
MPGSEL_2 .EQU $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@@ -40,8 +41,16 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
CTCMODE .EQU CTCMODE_RC ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC]
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
CTCMODE .EQU CTCMODE_TIM16 ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCPRE .EQU 256 ; PRESCALE CONSTANT (1-256)
CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3)
CTCOSC .EQU CPUOSC ; CTC CLOCK FREQUENCY
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
@@ -69,9 +78,18 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
@@ -80,6 +98,8 @@ UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU TRUE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
ACIADEBUG .EQU FALSE ; ACIA: ENABLE DEBUG OUTPUT
ACIACNT .EQU 1 ; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
@@ -95,24 +115,22 @@ ACIA1CFG .EQU DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM)
SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
SIO0CTCC .EQU -1 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ADIV .EQU 1 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BDIV .EQU 1 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
SIO1CTCC .EQU -1 ; SIO 1: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ADIV .EQU 1 ; SIO 1A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO1ACFG .EQU DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1BCLK .EQU CPUOSC ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BDIV .EQU 1 ; SIO 1B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO1BCFG .EQU DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG
SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
@@ -120,18 +138,17 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_RC ; TMS: DRIVER MODE: TMSMODE_[SCG/N8]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
AYENABLE .EQU FALSE ; AY: ENABLE AY PSG SOUND DRIVER
AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3|DYNO]
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
@@ -175,12 +192,15 @@ PPIDE2A8BIT .EQU FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .EQU FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
;
SDENABLE .EQU FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .EQU SDMODE_PPI ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
SDMODE .EQU SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
SDCNT .EQU 1 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
@@ -192,4 +212,11 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
;
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER
SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AY38910ENABLE .EQU FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AYMODE .EQU AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

54
Source/HBIOS/cfg_sbc.asm
View File

@@ -14,20 +14,21 @@
#DEFINE PLATFORM_NAME "SBC"
;
PLATFORM .EQU PLT_SBC ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU 0 ; AUTO BOOT TIMEOUT IN SECONDS, 0 TO DISABLE
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUOSC .EQU 8000000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .EQU MM_SBC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
MEMMGR .EQU MM_SBC ; MM_[SBC|Z2|N8|Z180|Z280|ZRC]: MEMORY MANAGER
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
;
@@ -38,8 +39,16 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
CTCMODE .EQU CTCMODE_ZP ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC]
CTCBASE .EQU $80 ; CTC BASE I/O ADDRESS
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $B0 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER
CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCPRE .EQU 256 ; PRESCALE CONSTANT (1-256)
CTCPRECH .EQU 2 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 3 ; TIMER CHANNEL (0-3)
CTCOSC .EQU 614400 ; CTC CLOCK FREQUENCY
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
@@ -71,6 +80,8 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
@@ -83,20 +94,21 @@ UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOCNT .EQU 1 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
SIO0CTCC .EQU -1 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE
SIO0MODE .EQU SIOMODE_ZP ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0BASE .EQU $B0 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 4915200 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ADIV .EQU 8 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO0ACLK .EQU (4915200/8) ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .EQU DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
SIO0BCLK .EQU 4915200 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BDIV .EQU 8 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU (4915200/8) ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .EQU DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
@@ -106,19 +118,18 @@ CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_SCG ; TMS: DRIVER MODE: TMSMODE_[SCG/N8]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VGASIZ .EQU V80X25 ; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
;
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
AYENABLE .EQU FALSE ; AY: ENABLE AY PSG SOUND DRIVER
AYMODE .EQU AYMODE_SCG ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_DIO3 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3|DYNO]
FDMODE .EQU FDMODE_DIO3 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
@@ -187,4 +198,11 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
UFBASE .EQU $0C ; UF: REGISTERS BASE ADR
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER
SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
;
AY38910ENABLE .EQU FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AYMODE .EQU AYMODE_SCG ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

63
Source/HBIOS/cfg_scz180.asm
View File

@@ -14,20 +14,21 @@
#DEFINE PLATFORM_NAME "SCZ180"
;
PLATFORM .EQU PLT_SCZ180 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU 0 ; AUTO BOOT TIMEOUT IN SECONDS, 0 TO DISABLE
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUOSC .EQU 18432000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .EQU MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
MEMMGR .EQU MM_Z180 ; MM_[SBC|Z2|N8|Z180|Z280|ZRC]: MEMORY MANAGER
RAMBIAS .EQU 512 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
;
Z180_BASE .EQU $C0 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
@@ -41,6 +42,11 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $88 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU FALSE ; ENABLE CTC PERIODIC TIMER
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $0D ; DIAGNOSTIC PORT ADDRESS
@@ -68,9 +74,18 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
@@ -78,32 +93,33 @@ UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG
ASCI1CFG .EQU DEFSERCFG ; ASCI 1: SERIAL LINE CONFIG
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .EQU FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOCNT .EQU 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
SIO0CTCC .EQU -1 ; SIO 0: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE
SIO0MODE .EQU SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO0BASE .EQU $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .EQU 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ADIV .EQU 1 ; SIO 0A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO0ACFG .EQU SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .EQU -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .EQU 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BDIV .EQU 1 ; SIO 0B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO0BCFG .EQU SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[RC|SMB|ZP|EZZ80]
SIO1CTCC .EQU -1 ; SIO 1: CTC CHANNEL CLOCK SCALER, (0-3), -1 FOR NONE
SIO0BCTCC .EQU -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .EQU SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
SIO1BASE .EQU $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .EQU 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ADIV .EQU 1 ; SIO 1A: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO1ACFG .EQU SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG
SIO1ACTCC .EQU -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1BCLK .EQU 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BDIV .EQU 1 ; SIO 1B: SERIAL CLOCK DIVIDER, RC2014/SMB=1, ZP=2/4/8/16/32/64/128/256 (X5)
SIO1BCFG .EQU SER_115200_8N1 ; SIO 1B: SERIAL LINE CONFIG
SIO1BCTCC .EQU -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .EQU DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
@@ -111,18 +127,17 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .EQU TMSMODE_RC ; TMS: DRIVER MODE: TMSMODE_[SCG/N8]
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
AYENABLE .EQU FALSE ; AY: ENABLE AY PSG SOUND DRIVER
AYMODE .EQU AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3|DYNO]
FDMODE .EQU FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDCNT .EQU 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
@@ -172,6 +187,9 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
;
PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
PRPSDENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
PRPSDTRACE .EQU 1 ; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PRPCONENABLE .EQU TRUE ; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
;
PPPENABLE .EQU FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
@@ -183,4 +201,11 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
;
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER
SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AY38910ENABLE .EQU FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AYMODE .EQU AYMODE_RCZ180 ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

2
Source/HBIOS/cfg_una.asm
View File

@@ -16,7 +16,7 @@
PLATFORM .EQU PLT_UNA ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
BIOS .EQU BIOS_UNA ; HARDWARE BIOS: BIOS_[WBW|UNA]
;
BOOT_TIMEOUT .EQU 0 ; AUTO BOOT TIMEOUT IN SECONDS, 0 TO DISABLE
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUOSC .EQU 18432000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2

33
Source/HBIOS/cfg_zeta.asm
View File

@@ -14,20 +14,21 @@
#DEFINE PLATFORM_NAME "ZETA"
;
PLATFORM .EQU PLT_ZETA ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
CPUFAM .EQU CPU_Z80 ; CPU_[Z80|Z180]: CPU FAMILY
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; BIOS_[WBW|UNA]: HARDWARE BIOS
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU 0 ; AUTO BOOT TIMEOUT IN SECONDS, 0 TO DISABLE
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUOSC .EQU 20000000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 0 ; INTERRUPT MODE: 0=NONE, 1=MODE 1, 2=MODE 2
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
;
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .EQU MM_SBC ; MM_[SBC|Z2|N8|Z180]: MEMORY MANAGER
MEMMGR .EQU MM_SBC ; MM_[SBC|Z2|N8|Z180|Z280|ZRC]: MEMORY MANAGER
MPCL_RAM .EQU $78 ; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
MPCL_ROM .EQU $7C ; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
;
@@ -39,6 +40,8 @@ KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU FALSE ; ENABLE ZILOG CTC SUPPORT
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
@@ -60,10 +63,12 @@ DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
@@ -77,6 +82,8 @@ UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
@@ -87,17 +94,16 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
AYENABLE .EQU FALSE ; AY: ENABLE AY PSG SOUND DRIVER
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_ZETA ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3|DYNO]
FDMODE .EQU FDMODE_ZETA ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDCNT .EQU 1 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
@@ -135,4 +141,11 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
;
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER
SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AY38910ENABLE .EQU FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AYMODE .EQU AYMODE_NONE ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

37
Source/HBIOS/cfg_zeta2.asm
View File

@@ -14,13 +14,14 @@
#DEFINE PLATFORM_NAME "ZETA V2"
;
PLATFORM .EQU PLT_ZETA2 ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180]
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .EQU 0 ; AUTO BOOT TIMEOUT IN SECONDS, 0 TO DISABLE
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
CPUOSC .EQU 20000000 ; CPU OSC FREQ IN MHZ
INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
@@ -41,8 +42,16 @@ KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .EQU $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .EQU TRUE ; ENABLE ZILOG CTC SUPPORT
CTCMODE .EQU CTCMODE_Z2 ; CTC MODE: CTCMODE_[ZP|Z2|EZ|RC]
CTCDEBUG .EQU FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .EQU $20 ; CTC BASE I/O ADDRESS
CTCTIMER .EQU TRUE ; ENABLE CTC PERIODIC TIMER
CTCMODE .EQU CTCMODE_CTR ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCPRE .EQU 256 ; PRESCALE CONSTANT (1-256)
CTCPRECH .EQU 0 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .EQU 1 ; TIMER CHANNEL (0-3)
CTCOSC .EQU 921600 ; CTC CLOCK FREQUENCY
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
@@ -70,6 +79,8 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
@@ -82,6 +93,8 @@ UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .EQU FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
;
SIOENABLE .EQU FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
@@ -92,17 +105,16 @@ VDUENABLE .EQU FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .EQU FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
NECENABLE .EQU FALSE ; NEC: ENABLE NEC UPD7220 VIDEO/KBD DRIVER (NEC.ASM)
TMSENABLE .EQU FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .EQU FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .EQU FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
;
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
AYENABLE .EQU FALSE ; AY: ENABLE AY PSG SOUND DRIVER
;
MDENABLE .EQU TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDTRACE .EQU 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .EQU FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .EQU TRUE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .EQU FDMODE_ZETA2 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|DIDE|N8|DIO3|DYNO]
FDMODE .EQU FDMODE_ZETA2 ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
FDCNT .EQU 1 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .EQU 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMEDIA .EQU FDM144 ; FD: DEFAULT MEDIA FORMAT FDM[720|144|360|120|111]
FDMEDIAALT .EQU FDM720 ; FD: ALTERNATE MEDIA FORMAT FDM[720|144|360|120|111]
@@ -140,4 +152,11 @@ PPI_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
;
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
;
EIPCENABLE .EQU FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
AUDIOTRACE .EQU FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN76489ENABLE .EQU FALSE ; SN76489 SOUND DRIVER
SN7CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AY38910ENABLE .EQU FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .EQU CPUOSC / 4 ; DEFAULT TO CPUOSC / 4
AYMODE .EQU AYMODE_NONE ; AY: DRIVER MODE: AYMODE_[SCG/N8/RCZ80/RCZ180]
SPKENABLE .EQU FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)

193
Source/HBIOS/ctc.asm
View File

@@ -5,53 +5,94 @@
; DISPLAY CONFIGURATION DETAILS
;______________________________________________________________________________________________________________________
;
CTC_DEFCFG .EQU %01010011 ; CTC DEFAULT CONFIG
CTC_CTRCFG .EQU %01010111 ; CTC COUNTER MODE CONFIG
CTC_TIM16CFG .EQU %00010111 ; CTC TIMER/16 MODE CONFIG
CTC_TIM256CFG .EQU %00110111 ; CTC TIMER/256 MODE CONFIG
CTC_TIMCFG .EQU %11010111 ; CTC TIMER CHANNEL CONFIG
; |||||||+-- CONTROL WORD FLAG
; ||||||+--- SOFTWARE RESET
; |||||+---- TIME CONSTANT FOLLOWS
; ||||+----- AUTO TRIGGER WHEN TIME CONST LOADED
; |||+------ RISING EDGE TRIGGER
; ||+------- TIMER MODE PRESCALER (0=16, 1=256)
; |+-------- COUNTER MODE
; +--------- INTERRUPT ENABLE
;
#IF (CTCTIMER)
;
; ONLY IM2 IMPLEMENTED BELOW. I DON'T SEE ANY REASONABLE WAY TO
; IMPLEMENT AN IM1 TIMER BECAUSE THE CTC PROVIDES NO WAY TO
; DETERMINE IF IT WAS THE CAUSE OF AN INTERRUPT OR A WAY TO
; DETERMINE WHICH CHANNEL CAUSED AN INTERRUPT.
;
#IF (INTMODE != 2)
#IF (INTMODE != 2)
.ECHO "*** ERROR: CTC REQUIRES INTMODE 2!!!\n"
!!! ; FORCE AN ASSEMBLY ERROR
#ENDIF
#ENDIF
;
CTC_PREIO .EQU CTCBASE + CTCPRECH
CTC_SCLIO .EQU CTCBASE + CTCTIMCH
;
; CONFIGURATION
#IF (CTCMODE == CTCMODE_CTR)
CTC_PRECFG .EQU CTC_CTRCFG
CTC_PRESCL .EQU 1
#ENDIF
#IF (CTCMODE == CTCMODE_TIM16)
CTC_PRECFG .EQU CTC_TIM16CFG
CTC_PRESCL .EQU 16
#ENDIF
#IF (CTCMODE == CTCMODE_TIM256)
CTC_PRECFG .EQU CTC_TIM256CFG
CTC_PRESCL .EQU 256
#ENDIF
;
#IF (CTCMODE == CTCMODE_ZP)
CTCPC .EQU CTCC ; PRESCALE CHANNEL
CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT
CTCTC .EQU CTCD ; TIMER CHANNEL
CTCTCC .EQU 48 ; TIMER CHANNEL CONSTANT
CTCTIVT .EQU INT_CTC0D ; TIMER CHANNEL IVT ENTRY
#ENDIF
CTC_DIV .EQU CTCOSC / CTC_PRESCL / TICKFREQ
;
#IF (CTCMODE == CTCMODE_Z2)
CTCPC .EQU CTCA ; PRESCALE CHANNEL
CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT
CTCTC .EQU CTCB ; TIMER CHANNEL
CTCTCC .EQU 72 ; TIMER CHANNEL CONSTANT
CTCTIVT .EQU INT_CTC0B ; TIMER CHANNEL IVT ENTRY
#ENDIF
CTC_DIVHI .EQU CTCPRE
CTC_DIVLO .EQU (CTC_DIV / CTC_DIVHI)
;
#IF (CTCMODE == CTCMODE_EZ)
CTCPC .EQU CTCC ; PRESCALE CHANNEL
CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT
CTCTC .EQU CTCD ; TIMER CHANNEL
CTCTCC .EQU 72 ; TIMER CHANNEL CONSTANT
CTCTIVT .EQU INT_CTC0D ; TIMER CHANNEL IVT ENTRY
#ENDIF
.ECHO "CTC DIVISOR: "
.ECHO CTC_DIV
.ECHO ", HI: "
.ECHO CTC_DIVHI
.ECHO ", LO: "
.ECHO CTC_DIVLO
.ECHO "\n"
;
#IF ((CTC_DIV == 0) | (CTC_DIV > $FFFF))
.ECHO "COMPUTED CTC DIVISOR IS UNUSABLE!\n"
!!!
#ENDIF
;
#IF ((CTC_DIVHI > $100) | (CTC_DIVLO > $100))
.ECHO "COMPUTED CTC DIVISOR IS UNUSABLE!\n"
!!!
#ENDIF
;
#IF ((CTC_DIVHI * CTC_DIVLO * CTC_PRESCL * TICKFREQ) != CTCOSC)
.ECHO "COMPUTED CTC DIVISOR IS UNUSABLE!\n"
!!!
#ENDIF
;
CTCTIVT .EQU INT_CTC0A + CTCTIMCH
;
#IF (CTCMODE == CTCMODE_RC)
CTCPC .EQU CTCC ; PRESCALE CHANNEL
CTCPCC .EQU 0 ; PRESCALE CHANNEL CONSTANT
CTCTC .EQU CTCD ; TIMER CHANNEL
CTCTCC .EQU 144 ; TIMER CHANNEL CONSTANT
CTCTIVT .EQU INT_CTC0D ; TIMER CHANNEL IVT ENTRY
#ENDIF
;
;
;
CTC_PREINIT:
;
; RESET ALL CTC CHANNELS
LD B,4 ; 4 CHANNELS
LD C,CTCBASE ; FIRST CHANNEL PORT
CTC_PREINIT1:
LD A,CTC_DEFCFG ; CTC DEFAULT CONFIG
OUT (C),A ; CTC COMMAND
INC C ; NEXT CHANNEL PORT
DJNZ CTC_PREINIT1
;
#IF (CTCTIMER)
; SETUP TIMER INTERRUPT IVT SLOT
LD HL,HB_TIMINT ; TIMER INT HANDLER ADR
LD (IVT(CTCTIVT)),HL ; IVT ENTRY FOR TIMER CHANNEL
@@ -59,40 +100,26 @@ CTC_PREINIT:
; CTC USES 4 CONSECUTIVE VECTOR POSITIONS, ONE FOR
; EACH CHANNEL. BELOW WE SET THE BASE VECTOR TO THE
; START OF THE IVT, SO THE FIRST FOUR ENTIRES OF THE
; IVT CORRESPOND TO CTC CHANNELS A-D
; IVT CORRESPOND TO CTC CHANNELS A-D.
LD A,0
OUT (CTCBASE),A ; SETUP CTC BASE INT VECTOR
;
; IN ORDER TO DIVIDE THE CTC INPUT CLOCK DOWN TO THE
; DESIRED 50 HZ PERIODIC INTERRUPT, WE NEED TO CONFIGURE ONE
; DESIRED PERIODIC INTERRUPT, WE NEED TO CONFIGURE ONE
; CTC CHANNEL AS A PRESCALER AND ANOTHER AS THE ACTUAL
; TIMER INTERRUPT. THE PRESCALE CHANNEL OUTPUT MUST BE WIRED
; TO THE TIMER CHANNEL TRIGGER INPUT VIA HARDWARE.
LD A,%01010111 ; PRESCALE CHANNEL CONTROL WORD VALUE
; |||||||+-- 1=CONTROL WORD FLAG
; ||||||+--- 1=SOFTWARE RESET
; |||||+---- 1=TIME CONSTANT FOLLOWS
; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED
; |||+------ 1=RISING EDGE TRIGGER
; ||+------- 0=PRESCALER OF 16 (NOT USED)
; |+-------- 1=COUNTER MODE
; +--------- 0=NO INTERRUPTS
OUT (CTCPC),A ; SETUP PRESCALE CHANNEL
LD A,CTCPCC ; PRESCALE CHANNEL CONSTANT
OUT (CTCPC),A ; SET PRESCALE CONSTANT
;
LD A,%11010111 ; TIMER CHANNEL CONTROL WORD VALUE
; |||||||+-- 1=CONTROL WORD FLAG
; ||||||+--- 1=SOFTWARE RESET
; |||||+---- 1=TIME CONSTANT FOLLOWS
; ||||+----- 0=AUTO TRIGGER WHEN TIME CONST LOADED
; |||+------ 1=RISING EDGE TRIGGER
; ||+------- 0=PRESCALER OF 16 (NOT USED)
; |+-------- 1=COUNTER MODE
; +--------- 1=ENABLE INTERRUPTS
OUT (CTCTC),A ; SETUP TIMER CHANNEL
LD A,CTCTCC ; TIMER CHANNEL CONSTANT
OUT (CTCTC),A ; SET TIMER CONSTANT
LD A,CTC_PRECFG ; PRESCALE CHANNEL CONFIGURATION
OUT (CTC_PREIO),A ; SETUP PRESCALE CHANNEL
LD A,CTC_DIVHI & $FF ; PRESCALE CHANNEL CONSTANT
OUT (CTC_PREIO),A ; SET PRESCALE CONSTANT
;
LD A,CTC_TIMCFG ; TIMER CHANNEL CONTROL WORD VALUE
OUT (CTC_SCLIO),A ; SETUP TIMER CHANNEL
LD A,CTC_DIVLO & $FF ; TIMER CHANNEL CONSTANT
OUT (CTC_SCLIO),A ; SET TIMER CONSTANT
;
#ENDIF
;
XOR A
RET
@@ -103,22 +130,48 @@ CTC_INIT: ; MINIMAL INIT
CTC_PRTCFG:
; ANNOUNCE PORT
CALL NEWLINE ; FORMATTING
PRTS("CTC: MODE=$") ; FORMATTING
#IF (CTCMODE == CTCMODE_ZP)
PRTS("ZP$")
#ENDIF
#IF (CTCMODE == CTCMODE_Z2)
PRTS("Z2$")
#ENDIF
#IF (CTCMODE == CTCMODE_EZ)
PRTS("EZ$")
#ENDIF
#IF (CTCMODE == CTCMODE_RC)
PRTS("RC$")
#ENDIF
PRTS("CTC:$") ; FORMATTING
;
PRTS(" IO=0x$") ; FORMATTING
LD A,CTCBASE ; GET BASE PORT
CALL PRTHEXBYTE ; PRINT BASE PORT
;
#IF (CTCTIMER)
;
PRTS(" MODE=$") ; FORMATTING
#IF (CTCMODE == CTCMODE_CTR)
PRTS("CTR$")
#ENDIF
#IF (CTCMODE == CTCMODE_TIM16)
PRTS("TIM16$")
#ENDIF
#IF (CTCMODE == CTCMODE_TIM256)
PRTS("TIM256$")
#ENDIF
;
PRTS(" DIVHI=$")
LD A,CTC_DIVHI & $FF
CALL PRTHEXBYTE
;
PRTS(" DIVLO=$")
LD A,CTC_DIVLO & $FF
CALL PRTHEXBYTE
;
#IF (CTCDEBUG)
PRTS(" PREIO=$")
LD A,CTC_PREIO
CALL PRTHEXBYTE
;
PRTS(" SCLIO=$")
LD A,CTC_SCLIO
CALL PRTHEXBYTE
;
PRTS(" DIV=$")
LD BC,CTC_DIV
CALL PRTHEXWORD
#ENDIF
;
#ENDIF
;
XOR A
RET

68
Source/HBIOS/cvdu.asm
View File

@@ -96,6 +96,7 @@ CVDU_FNTBL:
.DW KBD_READ
#IF (($ - CVDU_FNTBL) != (VDA_FNCNT * 2))
.ECHO "*** INVALID CVDU FUNCTION TABLE ***\n"
!!!!!
#ENDIF
CVDU_VDAINI:
@@ -112,11 +113,11 @@ CVDU_VDAQRY:
LD HL,0 ; EXTRACTION OF CURRENT BITMAP DATA NOT SUPPORTED YET
XOR A ; SIGNAL SUCCESS
RET
CVDU_VDARES:
LD A,$0E ; ATTRIBUTE IS STANDARD WHITE ON BLACK
LD (CVDU_ATTR),A ; SAVE IT
LD DE,0 ; ROW = 0, COL = 0
CALL CVDU_XY ; SEND CURSOR TO TOP LEFT
LD A,' ' ; BLANK THE SCREEN
@@ -124,24 +125,29 @@ CVDU_VDARES:
CALL CVDU_FILL ; DO IT
LD DE,0 ; ROW = 0, COL = 0
CALL CVDU_XY ; SEND CURSOR TO TOP LEFT
XOR A
RET
CVDU_VDADEV:
LD D,VDADEV_CVDU ; D := DEVICE TYPE
LD E,0 ; E := PHYSICAL UNIT IS ALWAYS ZERO
LD H,0 ; H := 0, DRIVER HAS NO MODES
LD L,CVDU_BASE ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS
RET
CVDU_VDASCS:
CALL PANIC ; NOT IMPLEMENTED (YET)
CALL SYSCHK ; NOT IMPLEMENTED (YET)
LD A,ERR_NOTIMPL
OR A
RET
CVDU_VDASCP:
CALL CVDU_XY ; SET CURSOR POSITION
XOR A ; SIGNAL SUCCESS
RET
CVDU_VDASAT:
; INCOMING IS: -----RUB (R=REVERSE, U=UNDERLINE, B=BLINK)
; TRANSFORM TO: -RUB----
@@ -158,7 +164,7 @@ CVDU_VDASAT:
LD (CVDU_ATTR),A ; AND SAVE THE RESULT
XOR A ; SIGNAL SUCCESS
RET
CVDU_VDASCO:
; INCOMING IS: IBGRIBGR (I=INTENSITY, B=BLUE, G=GREEN, R=RED)
; TRANSFORM TO: ----RGBI (DISCARD BACKGROUND COLOR IN HIGH NIBBLE)
@@ -175,13 +181,13 @@ CVDU_VDASCO1:
LD (CVDU_ATTR),A ; AND SAVE THE RESULT
XOR A ; SIGNAL SUCCESS
RET
CVDU_VDAWRC:
LD A,E ; CHARACTER TO WRITE GOES IN A
CALL CVDU_PUTCHAR ; PUT IT ON THE SCREEN
XOR A ; SIGNAL SUCCESS
RET
CVDU_VDAFIL:
LD A,E ; FILL CHARACTER GOES IN A
EX DE,HL ; FILL LENGTH GOES IN DE
@@ -197,7 +203,7 @@ CVDU_VDACPY:
POP BC ; RECOVER LENGTH IN BC
LD DE,(CVDU_POS) ; PUT DEST IN DE
JP CVDU_BLKCPY ; DO A BLOCK COPY
CVDU_VDASCR:
LD A,E ; LOAD E INTO A
OR A ; SET FLAGS
@@ -246,7 +252,7 @@ CVDU_WRX:
;----------------------------------------------------------------------
; READ M8563 REGISTERS
; CVDU_RD READS VDU REGISTER SPECIFIED IN C AND RETURNS VALUE IN A
; CVDU_RDX READS VDU REGISTER PAIR SPECIFIED BY C, C+1
; CVDU_RDX READS VDU REGISTER PAIR SPECIFIED BY C, C+1
; AND RETURNS VALUE IN HL
;----------------------------------------------------------------------
;
@@ -317,7 +323,7 @@ CVDU_CRTINIT1:
; ASSUMES THAT VDU RAM SIZE IS SET FOR 64KB ABOVE
; A. WRITE ZERO TO ADDRESS $0000
; B. WRITE NON-ZERO TO ADDRESS $0100
; C. CHECK THE VALUE IN ADDRESS $0000; IF IT CHANGED,
; C. CHECK THE VALUE IN ADDRESS $0000; IF IT CHANGED,
; 16K DRAM CHIPS INSTALLED; IF NOT, 64K DRAM CHIPS INSTALLED
; IF 16KB RAM DETECTED, ADJUST VDU REGISTERS APPROPRIATELY
;
@@ -367,7 +373,7 @@ CVDU_LOADFONT:
LD (CVDU_STACK),SP ; SAVE STACK
LD HL,(CVDU_STACK) ; AND SHIFT IT
LD DE,$2000 ; DOWN 4KB TO
CCF ; CREATE A
OR A ; CREATE A
SBC HL,DE ; DECOMPRESSION BUFFER
LD SP,HL ; HL POINTS TO BUFFER
EX DE,HL ; START OF STACK BUFFER
@@ -424,7 +430,7 @@ CVDU_XY2IDX:
RET ; RETURN
;
;----------------------------------------------------------------------
; WRITE VALUE IN A TO CURRENT VDU BUFFER POSTION, ADVANCE CURSOR
; WRITE VALUE IN A TO CURRENT VDU BUFFER POSITION, ADVANCE CURSOR
;----------------------------------------------------------------------
;
CVDU_PUTCHAR:
@@ -436,7 +442,7 @@ CVDU_PUTCHAR:
CALL CVDU_WRX ; DO IT
; PUT THE CHARACTER THERE
POP AF ; RECOVER CHARACTER VALLUE TO WRITE
POP AF ; RECOVER CHARACTER VALUE TO WRITE
LD C,31 ; DATA REGISTER
CALL CVDU_WR ; DO IT
@@ -475,19 +481,19 @@ CVDU_FILL:
POP DE ; RECOVER FILL COUNT
LD A,(CVDU_ATTR) ; SET ATTRIBUTE VALUE FOR ATTRIBUTE FILL
JR CVDU_FILL1 ; DO ATTRIBUTE FILL AND RETURN
CVDU_FILL1:
LD B,A ; SAVE REQUESTED FILL VALUE
; CHECK FOR VALID FILL LENGTH
LD A,D ; LOAD D
OR E ; OR WITH E
RET Z ; BAIL OUT IF LENGTH OF ZERO SPECIFIED
; POINT TO BUFFER LOCATION TO START FILL
LD C,18 ; UPDATE ADDRESS REGISTER PAIR
CALL CVDU_WRX ; DO IT
; SET MODE TO BLOCK WRITE
LD C,24 ; BLOCK MODE CONTROL REGISTER
CALL CVDU_RD ; GET CURRENT VALUE
@@ -499,7 +505,7 @@ CVDU_FILL1:
LD C,31 ; DATA REGISTER
CALL CVDU_WR ; DO IT
DEC DE ; REFLECT ONE CHARACTER WRITTEN
; LOOP TO DO BULK WRITE (UP TO 255 BYTES PER LOOP)
EX DE,HL ; NOW USE HL FOR COUNT
LD C,30 ; BYTE COUNT REGISTER
@@ -527,7 +533,7 @@ CVDU_SCROLL:
LD A,' ' ; CHAR VALUE TO FILL NEW EXPOSED LINE
LD HL,0 ; SOURCE ADDRESS OF CHARACER BUFFER
CALL CVDU_SCROLL1 ; SCROLL CHARACTER BUFFER
; SCROLL THE ATTRIBUTE BUFFER
LD A,(CVDU_ATTR) ; ATTRIBUTE VALUE TO FILL NEW EXPOSED LINE
LD HL,$800 ; SOURCE ADDRESS OF ATTRIBUTE BUFFER
@@ -535,7 +541,7 @@ CVDU_SCROLL:
CVDU_SCROLL1:
PUSH AF ; SAVE FILL VALUE FOR NOW
; SET MODE TO BLOCK COPY
LD C,24 ; BLOCK MODE CONTROL REGISTER
CALL CVDU_RD ; GET CURRENT VALUE
@@ -563,13 +569,13 @@ CVDU_SCROLL2:
; LOOP TILL DONE WITH ALL LINES
DJNZ CVDU_SCROLL2 ; REPEAT FOR ALL LINES
; SET MODE TO BLOCK WRITE TO CLEAR NEW LINE EXPOSED BY SCROLL
LD C,24 ; BLOCK MODE CONTROL REGISTER
CALL CVDU_RD ; GET CURRENT VALUE
AND $7F ; CLEAR BIT 7 FOR FILL MODE
CALL CVDU_WR ; DO IT
; SET VALUE TO WRITE
POP AF ; RESTORE THE FILL VALUE PASSED IN
LD C,31 ; DATA REGISTER
@@ -579,7 +585,7 @@ CVDU_SCROLL2:
LD A,CVDU_COLS - 1 ; SET WRITE COUNT TO LINE LENGTH - 1 (1 CHAR ALREADY WRITTEN)
LD C,30 ; WORD COUNT REGISTER
CALL CVDU_WR ; DO IT
RET
;
;----------------------------------------------------------------------
@@ -591,7 +597,7 @@ CVDU_RSCROLL:
LD A,' ' ; CHAR VALUE TO FILL NEW EXPOSED LINE
LD HL,$0 + ((CVDU_ROWS - 1) * CVDU_COLS) ; SOURCE ADDRESS OF CHARACER BUFFER
CALL CVDU_RSCROLL1 ; SCROLL CHARACTER BUFFER
; SCROLL THE ATTRIBUTE BUFFER
LD A,(CVDU_ATTR) ; ATTRIBUTE VALUE TO FILL NEW EXPOSED LINE
LD HL,$800 + ((CVDU_ROWS - 1) * CVDU_COLS) ; SOURCE ADDRESS OF ATTRIBUTE BUFFER
@@ -599,7 +605,7 @@ CVDU_RSCROLL:
CVDU_RSCROLL1:
PUSH AF ; SAVE FILL VALUE FOR NOW
; SET MODE TO BLOCK COPY
LD C,24 ; BLOCK MODE CONTROL REGISTER
CALL CVDU_RD ; GET CURRENT VALUE
@@ -629,7 +635,7 @@ CVDU_RSCROLL2:
CALL CVDU_WR ; DO IT
DJNZ CVDU_RSCROLL2 ; REPEAT FOR ALL LINES
; SET FILL DESTINATION (USING HL PASSED IN)
LD C,18 ; UPDATE ADDRESS (DESTINATION) REGISTER
CALL CVDU_WRX ; DO IT
@@ -639,7 +645,7 @@ CVDU_RSCROLL2:
CALL CVDU_RD ; GET CURRENT VALUE
AND $7F ; CLEAR BIT 7 FOR FILL MODE
CALL CVDU_WR ; DO IT
; SET VALUE TO WRITE
POP AF ; RESTORE THE FILL VALUE PASSED IN
LD C,31 ; DATA REGISTER
@@ -649,7 +655,7 @@ CVDU_RSCROLL2:
LD A,CVDU_COLS - 1 ; SET WRITE COUNT TO LINE LENGTH - 1 (1 CHAR ALREADY WRITTEN)
LD C,30 ; WORD COUNT REGISTER
CALL CVDU_WR ; DO IT
RET
;
;----------------------------------------------------------------------

51
Source/HBIOS/dbgmon.asm
View File

@@ -104,6 +104,10 @@ SERIALCMDLOOP:
JP Z,FILLMEM ; FILL MEMORY COMMAND
CP 'H' ; IS IT A "H" (Y/N)
JP Z,HELP ; HELP COMMAND
CP 'S' ; IS IT A "H" (Y/N)
JP Z,STOP ; STOP COMMAND
CP 'X' ; IS IT A "X" (Y/N)
JP Z,EXIT ; EXIT COMMAND
LD HL,TXT_COMMAND ; POINT AT ERROR TEXT
CALL PRTSTRH ; PRINT COMMAND LABEL
@@ -146,10 +150,37 @@ BOOT:
CALL $FFFD ; DO IT (RST 08 NOT SAFE HERE)
JP 0 ; JUMP TO RESTART ADDRESS
#ELSE
LD A,BID_BOOT ; BOOT BANK
LD HL,0 ; ADDRESS ZERO
CALL HB_BNKCALL ; DOES NOT RETURN
;LD A,BID_BOOT ; BOOT BANK
;LD HL,0 ; ADDRESS ZERO
;CALL HB_BNKCALL ; DOES NOT RETURN
LD B,BF_SYSRESET ; SYSTEM RESTART
LD C,BF_SYSRES_COLD ; COLD START
CALL $FFF0 ; CALL HBIOS
#ENDIF
;
;__EXIT_______________________________________________________________________
;
; PERFORM EXIT ACTION
;_____________________________________________________________________________
;
EXIT:
#IF (BIOS == BIOS_UNA)
JR BOOT
#ELSE
LD B,BF_SYSRESET ; SYSTEM RESTART
LD C,BF_SYSRES_WARM ; WARM START
CALL $FFF0 ; CALL HBIOS
#ENDIF
;
;__STOP_______________________________________________________________________
;
; PERFORM STOP ACTION (HALT SYSTEM)
;_____________________________________________________________________________
;
STOP:
DI
HALT
;
;__RUN________________________________________________________________________
;
; TRANSFER OUT OF MONITOR, USER OPTION "R"
@@ -912,6 +943,8 @@ TXT_HELP .TEXT "\r\nMonitor Commands (all values in hex):"
.TEXT "\r\nO xx yy - Output to port xx value yy"
.TEXT "\r\nP xxxx - Program RAM at xxxx"
.TEXT "\r\nR xxxx - Run code at xxxx"
.TEXT "\r\nS - Stop system (HALT)"
.TEXT "\r\nX - Exit monitor"
.TEXT "$"
;
#IF DSKYENABLE
@@ -966,8 +999,6 @@ FRONTPANELLOOP1:
JP Z,DOBOOT ; YES, JUMP
JR FRONTPANELLOOP ; LOOP
EXIT:
RET
;
;__DOBOOT_____________________________________________________________________
;
@@ -1367,7 +1398,7 @@ DISPLAYBUF: .FILL 8,0
#ELSE
;
DSKY_ENTRY:
CALL PANIC
JP EXIT
;
#ENDIF
;
@@ -1381,12 +1412,12 @@ MON_STACK .EQU $
.ECHO SLACK
.ECHO " bytes.\n"
;
; DBGMON CURRENTLY OCCUPIES $F000-$FDFF BECAUSE THE
; HBIOS PROXY OCCUPIES $FE00-$FFFF. HOWEVER THE DBGMON
; DBGMON CURRENTLY OCCUPIES $F000 TO START OF HBX PROXY BECAUSE THE
; HBIOS PROXY OCCUPIES THE TOP OF COMMON RAM. HOWEVER THE DBGMON
; IMAGE MUST OCCUPY A FULL $1000 BYTES IN THE ROM.
; BELOW WE JUST PAD OUT THE IMAGE BY $200 SO IT
; BELOW WE JUST PAD OUT THE IMAGE SO IT
; OCCUPIES THE FULL $1000 BYTES IN ROM.
;
.FILL $200,$00
.FILL HBX_SIZ ; PAD FOR HBX SIZE
;
.END

190
Source/HBIOS/diskdefs
View File

@@ -297,77 +297,6 @@ diskdef wbw_rom1024
os 2.2
end
# UNA 512KB ROM (128KB reserved, 384KB ROM Disk)
diskdef una_rom512
seclen 512
tracks 12
sectrk 64
blocksize 2048
maxdir 256
skew 0
boottrk 0
os 2.2
end
# UNA 512KB ROM (128KB reserved, 896KB ROM Disk)
diskdef una_rom1024
seclen 512
tracks 28
sectrk 64
blocksize 2048
maxdir 256
skew 0
boottrk 0
os 2.2
end
# RomWBW 8MB Hard Disk, LU 0-3
diskdef wbw_hd0
seclen 512
tracks 65
sectrk 256
blocksize 4096
maxdir 512
skew 0
boottrk 1
os 2.2
end
diskdef wbw_hd1
seclen 512
tracks 130
sectrk 256
blocksize 4096
maxdir 512
skew 0
boottrk 66
os 2.2
end
diskdef wbw_hd2
seclen 512
tracks 195
sectrk 256
blocksize 4096
maxdir 512
skew 0
boottrk 131
os 2.2
end
diskdef wbw_hd3
seclen 512
tracks 260
sectrk 256
blocksize 4096
maxdir 512
skew 0
boottrk 196
os 2.2
end
# RomWBW 720K floppy media
diskdef wbw_fd720
seclen 512
@@ -415,3 +344,122 @@ diskdef wbw_fd120
boottrk 2
os 2.2
end
# RomWBW 8320KB Hard Disk Slice (512 directory entry format)
# Legacy format, 512 dir entries, 16,630 sectors / slice
diskdef wbw_hd512
seclen 512
tracks 1040
sectrk 16
blocksize 4096
maxdir 512
skew 0
boottrk 16
os 2.2
end
# First 4 slices of wbw_hd512
diskdef wbw_hd512_0
seclen 512
tracks 1040
sectrk 16
blocksize 4096
maxdir 512
skew 0
boottrk 16
os 2.2
end
diskdef wbw_hd512_1
seclen 512
tracks 2080
sectrk 16
blocksize 4096
maxdir 512
skew 0
boottrk 1056
os 2.2
end
diskdef wbw_hd512_2
seclen 512
tracks 3120
sectrk 16
blocksize 4096
maxdir 512
skew 0
boottrk 2096
os 2.2
end
diskdef wbw_hd512_3
seclen 512
tracks 4160
sectrk 16
blocksize 4096
maxdir 512
skew 0
boottrk 3136
os 2.2
end
# RomWBW 8MB Hard Disk (1024 directory entry format)
# New format, 1024 dir entries, 16,384 sectors / slice
# Pure filesystem image, no MBR prefix
diskdef wbw_hd1024
seclen 512
tracks 1024
sectrk 16
blocksize 4096
maxdir 1024
skew 0
boottrk 2
os 2.2
end
# First 4 slices of wbw_hd1024
# Assumes 128KB prefix (256 sectors)
diskdef wbw_hd1024_0
seclen 512
tracks 1040
sectrk 16
blocksize 4096
maxdir 1024
skew 0
boottrk 18
os 2.2
end
diskdef wbw_hd1024_1
seclen 512
tracks 2064
sectrk 16
blocksize 4096
maxdir 1024
skew 0
boottrk 1042
os 2.2
end
diskdef wbw_hd1024_2
seclen 512
tracks 3112
sectrk 16
blocksize 4096
maxdir 1024
skew 0
boottrk 2066
os 2.2
end
diskdef wbw_hd1024_3
seclen 512
tracks 4136
sectrk 16
blocksize 4096
maxdir 1024
skew 0
boottrk 3114
os 2.2
end

28
Source/HBIOS/dsrtc.asm
View File

@@ -235,13 +235,27 @@ DSRTC_DISPATCH:
JP Z,DSRTC_GETBLK ; GET NVRAM DATA BLOCK VALUES
DEC A
JP Z,DSRTC_SETBLK ; SET NVRAM DATA BLOCK VALUES
CALL PANIC
DEC A
JP Z,DSRTC_GETALM ; GET ALARM
DEC A
JP Z,DSRTC_SETALM ; SET ALARM
DEC A
JP Z,DSRTC_DEVICE ; REPORT RTC DEVICE INFO
CALL SYSCHK
LD A,ERR_NOFUNC
OR A
RET
;
; NVRAM FUNCTIONS ARE NOT AVAILABLE IN SIMULATOR
;
DSRTC_GETBLK:
DSRTC_SETBLK:
CALL PANIC
DSRTC_GETALM:
DSRTC_SETALM:
CALL SYSCHK
LD A,ERR_NOTIMPL
OR A
RET
;
; RTC GET TIME
; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
@@ -350,6 +364,16 @@ DSRTC_SETBYT:
XOR A ; SIGNAL SUCCESS
RET ; DONE
;
; REPORT RTC DEVICE INFO
;
DSRTC_DEVICE:
LD D,RTCDEV_DS ; D := DEVICE TYPE
LD E,0 ; E := PHYSICAL DEVICE NUMBER
LD H,DSRTCMODE ; H := MODE
LD L,DSRTC_IO ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS
RET
;
; CONVERT DATA IN CLOCK BUFFER TO TIME BUFFER AT HL
;
DSRTC_CLK2TIM:

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