mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 14:11:48 -06:00
NABU Code Cleanup
This commit is contained in:
Wayne Warthen
@@ -1167,13 +1167,6 @@ HBX_RETI:
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PUSH BC ; SAVE BC
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PUSH DE ; SAVE DE
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PUSH IY ; SAVE IY
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;
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#IF (PLATFORM == PLT_NABU)
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PUSH HL
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LD HL,($FFEA) ; TICCNT COPIED TO...
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LD ($000B),HL ; ...LOW MEMORY FOR CP/M
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POP HL
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#ENDIF
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;
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LD A,BID_BIOS ; HBIOS BANK
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CALL HBX_BNKSEL_INT ; SELECT IT
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@@ -3019,6 +3012,11 @@ HB_Z280BUS1:
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LDCTL HL,(C)
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CALL PRTHEXWORDHL
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CALL PC_SPACE
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PRTS("ISR=$")
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LD C,Z280_ISR ; INTERRUPT STATUS REGISTER
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LDCTL HL,(C)
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CALL PRTHEXWORDHL
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CALL PC_SPACE
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PRTS("BTCR=$")
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LD C,Z280_BTCR ; BUS TIMING AND CONTROL REGISTER
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LDCTL HL,(C)
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@@ -1,15 +1,12 @@
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;
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;==================================================================================================
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; NABU INTERRUPT INTERCEPTOR
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; NABU HARDWARE DRIVER
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;==================================================================================================
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;
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NABU_INT1CLR .EQU $68
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NABU_TICCNT .EQU $FFEA ; TICCNT AT $FFEA IS COPIED DOWN TO $000B
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;
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; NABU INTERRUPT ENABLE PORT AND STATUS PORTS ARE MANAGED BY THE
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; PSG IO PORTS.
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;
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; INTERRUPT ENABLE (OUTPUT) - PSG PORT A
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; NABU CONTROL PORT - INTERRUPT ENABLE (OUTPUT) - PSG PORT A
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;
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; D7 - HCCA Receive
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; D6 - HCCA Send
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@@ -20,7 +17,13 @@ NABU_TICCNT .EQU $FFEA ; TICCNT AT $FFEA IS COPIED DOWN TO $000B
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; D1 - Option Card 2 (J11)
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; DO - Option Card 3 (J12)
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;
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; STATUS BYTE (INPUT) - PSG PORT B
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; THE CONTROL PORT IS WRITE ONLY AND THE BITS NEED TO BE MANAGED IN
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; MULTIPLE DRIVERS. BELOW, WE ALLOCATE NBAU_CTLVAL AS A SHADOW
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; REGISTER FOR THE CONTROL PORT. IT IS INITIALIZED TO ZERO HERE
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; (ALL INTS DISABLED). THE INDIVIDUAL BITS ARE SET AS APPROPIATE IN
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; THE DRIVERS THAT WANT THE INTERRUPTS ENABLED (NABUKB, TMS).
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;
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; NABU STATUS PORT - STATUS BYTE (INPUT) - PSG PORT B
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;
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; D7 - N.C.
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; D6 - Overrun Error (HCCA UART)
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@@ -33,91 +36,54 @@ NABU_TICCNT .EQU $FFEA ; TICCNT AT $FFEA IS COPIED DOWN TO $000B
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;
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; PORTS TO MANAGE PSG
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;
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NABU_RSEL .EQU $41 ; SELECT PSG REGISTER
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NABU_RDAT .EQU $40 ; WRITE TO SELECTED REGISTER
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NABU_RIN .EQU $40 ; READ FROM SELECTED REGISTER
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NABU_BASE .EQU $40 ; BASE PORT FOR NABU PSG
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NABU_RSEL .EQU NABU_BASE + 1 ; SELECT PSG REGISTER
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NABU_RDAT .EQU NABU_BASE + 0 ; WRITE TO SELECTED REGISTER
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NABU_RIN .EQU NABU_BASE + 0 ; READ FROM SELECTED REGISTER
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;
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DEVECHO "NABU: IO="
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DEVECHO NABU_INT1CLR
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DEVECHO NABU_BASE
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DEVECHO "\n"
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;
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;
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; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION
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;
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NABU_PREINIT:
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;
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; RESET SHADOW REGISTER IN CASE WE ARE DOING AN HBIOS
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; RESTART IN PLACE
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XOR A ; ALL INTERRUPTS DISABLED
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LD (NABU_CTLVAL),A ; SAVE IT
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;
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; INITIALIZE THE NABU PSG I/O PORTS
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; PORT A IN WRITE MODE AND SET ALL BITS TO ZERO
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; PORT B IN READ MODE
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; PORT A (CONTROL PORT) IN WRITE MODE
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; PORT B (STATUS PORT) IN READ MODE
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; INITIALIZE THE CONTROL REGISTER
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;
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CALL NABU_SETPSG
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;
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;#IF (INTMODE == 1)
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; ; ADD TO INTERRUPT CHAIN
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; LD HL,NABU_STAT
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; CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
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;#ENDIF
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;
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;#IF (INTMODE == 2)
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; LD HL,NABU_STAT
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; LD (IVT(INT_NABUKB)),HL ; IVT INDEX
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;#ENDIF
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; RET
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;
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NABU_INIT:
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CALL NEWLINE ; FORMATTING
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PRTS("NABU: INT1$")
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; XOR A
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; OUT (NABU_INT1CLR),A
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RET ; DONE
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;
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NABU_SETPSG:
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; SET I/O PORT MODES
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LD A,7 ; PSG R7 (ENABLE REG)
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OUT (NABU_RSEL),A ; SELECT IT
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LD A,%01111111 ; PORT B INPUT, PORT A OUPUT
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LD A,%01111111 ; PORT B INPUT, PORT A OUPUT, AUDIO CHANNELS DISABLED
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OUT (NABU_RDAT),A ; SET IT
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;
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; SET PORT A TO VALUE 0
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; INITIALIZE PORT A VALUE
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LD A,14 ; PSG R14 (PORT A DATA)
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OUT (NABU_RSEL),A ; SELECT IT
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#IF (INTMODE > 0)
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#IF (TMSTIMENABLE == TRUE)
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LD A,%00110000 ; ENABLE NABU KB & VDP INTS
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#ELSE
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LD A,%00100000 ; ENABLE NABU KB INTS
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#ENDIF
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#ELSE
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XOR A
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#ENDIF
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OUT (NABU_RDAT),A ; SET IT
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LD A,(NABU_CTLVAL) ; GET CTL VALUE SHADOW REG
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OUT (NABU_RDAT),A ; WRITE TO HARDWARE
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;
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LD A,15
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OUT (NABU_RSEL),A
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IN A,(NABU_RIN)
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RET
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XOR A ; SIGNAL SUCCESS
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RET ; DONE
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;
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; INTERRUPT ENTRY POINT
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; POST CONSOLE INITIALIZATION
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;
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NABU_STAT:
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; CALL NABU_SETPSG
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; XOR A
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; OUT (NABU_INT1CLR),A ; CLEAR THE INTERRUPT
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LD HL,(NABU_TICCNT) ; INCREMENT NABU TICK COUNTER
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INC HL ; ... IN HBIOS PROXY
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LD (NABU_TICCNT),HL
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; LD A,(NABU_HBTICK) ; INCREMENT INTERNAL TICK CTR
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; INC A
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; LD (NABU_HBTICK),A
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; CP $0A ; CALL HB_TICK EVERY 10 INTERRUPTS (50HZ)
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; RET NZ ; NOT TIME THEN JUST RETURN
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CALL HB_TICK ; DO NORMAL HBIOS TICK
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XOR A
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; LD (NABU_HBTICK),A ; RESET HBTICK COUNTER
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INC A ; INTERRUPT HANDLED
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RET
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NABU_INIT:
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CALL NEWLINE ; FORMATTING
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PRTS("NABU: IO=$")
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LD A,NABU_BASE
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CALL PRTHEXBYTE
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XOR A ; SIGNAL SUCCESS
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RET ; DONE
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;
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NABU_HBTICK:
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.DB 0 ; INTERNAL TICK CTR
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; DATA STORAGE
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;
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NABU_CTLVAL .DB 0 ; SHADOW VAL FOR NABU CONTROL REGISTER
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@@ -21,28 +21,6 @@
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; WILL TRANSLATE SPECIAL KEYS ($E0-$FF) TO ROMWBW EQUIVALENTS. ALL
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; OTHER KEYS WILL BE PASSED THROUGH AS IS.
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;
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; KBPORT EQU $90
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;
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; POLL FOR INPUT
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; KBLOOP:
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; IN A,(KBPORT+1)
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; BIT 1,A
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; JR Z,KBLOOP
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; IN A,(KBPORT)
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;
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; INIT:
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; XOR A
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; CALL SUB12
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; CALL SUB12
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; CALL SUB12
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; CALL SUB12
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; CALL SUB12
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; LD A,40H
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; CALL SUB12
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; LD A,4EH
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; CALL SUB12
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; LD A,04H
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; CALL SUB12
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;
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NABUKB_IODAT .EQU $90 ; KEYBOARD DATA (READ)
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NABUKB_IOSTAT .EQU $91 ; STATUS (READ), CMD (WRITE)
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@@ -51,22 +29,6 @@ NABUKB_IOSTAT .EQU $91 ; STATUS (READ), CMD (WRITE)
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DEVECHO NABUKB_IODAT
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DEVECHO "\n"
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;
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; SETUP INTERRUPT HANDLING, IF ENABLED
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;
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NABUKB_PREINIT:
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#IF (INTMODE == 1)
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; ADD TO INTERRUPT CHAIN
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LD HL,NABUKB_INT
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CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
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#ENDIF
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;
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#IF (INTMODE == 2)
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; INSTALL VECTOR
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LD HL,NABUKB_INT
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LD (IVT(INT_NABUKB)),HL ; IVT INDEX
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#ENDIF
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RET
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;
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; INITIALZIZE THE KEYBOARD CONTROLLER.
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;
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NABUKB_INIT:
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@@ -87,6 +49,26 @@ NABUKB_INIT:
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CALL NABUKB_PUT
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LD A,$04 ; ENABLE RECV
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CALL NABUKB_PUT
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;
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#IF (INTMODE == 1)
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; ADD TO INTERRUPT CHAIN
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LD HL,NABUKB_INT
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CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
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#ENDIF
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;
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#IF (INTMODE == 2)
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; INSTALL VECTOR
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LD HL,NABUKB_INT
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LD (IVT(INT_NABUKB)),HL ; IVT INDEX
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#ENDIF
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;
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; ENABLE KEYBOARD INTERRUPTS ON NABU INTERRUPT CONTROLLER
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LD A,14 ; PSG R14 (PORT A DATA)
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OUT (NABU_RSEL),A ; SELECT IT
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LD A,(NABU_CTLVAL) ; GET NABU CTL PORT SHADOW REG
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SET 5,A ; ENABLE VDP INTERRUPTS
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LD (NABU_CTLVAL),A ; UPDATE SHADOW REG
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OUT (NABU_RDAT),A ; WRITE TO HARDWARE
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;
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XOR A
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RET
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@@ -294,7 +294,7 @@ SD_CS1 .EQU %00010000 ; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present
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#ENDIF
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SD_IOBASE .EQU SD_BASE ; IOBASE
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SD_INVCS .EQU FALSE ; INVERT CS
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DEVECHO "DUO"
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DEVECHO "MT"
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#ENDIF
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;
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;
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@@ -179,10 +179,8 @@ NABUKBENABLE .SET TRUE ; INCLUDE NABU KEYBOARD SUPPORT
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;======================================================================
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;
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TMS_PREINIT:
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#IF (NABUKBENABLE == TRUE)
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CALL NABUKB_PREINIT
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#ENDIF
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; DISABLE INTERRUPT GENERATION
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; DISABLE INTERRUPT GENERATION UNTIL AFTER INTERRUPT HANDLER
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; HAS BEEN INSTALLED.
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LD A, (TMS_INITVDU_REG_1)
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RES TMSINTEN, A ; RESET INTERRUPT ENABLE BIT
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LD (TMS_INITVDU_REG_1), A
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@@ -228,10 +226,10 @@ TMS_INIT:
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PRTS("COLECO$")
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#ENDIF
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#IF (TMSMODE == TMSMODE_MSXKBD)
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PRTS("RCKBD$")
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PRTS("MSXKBD$")
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#ENDIF
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#IF (TMSMODE == TMSMODE_MSX9958)
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PRTS("RC_V9958$")
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PRTS("MSXV9958$")
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#ENDIF
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#IF (TMSMODE == TMSMODE_NABU40)
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PRTS("NABU-40$")
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@@ -255,16 +253,16 @@ TMS_INIT1:
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CALL TMS_CRTINIT ; SETUP THE TMS CHIP REGISTERS
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CALL TMS_LOADFONT ; LOAD FONT DATA FROM ROM TO TMS STRORAGE
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CALL TMS_CLEAR ; CLEAR SCREEN, HOME CURSOR
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#IF (TMSMODE == TMSMODE_N8)
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#IF (PPKENABLE)
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CALL PPK_INIT ; INITIALIZE PPI KEYBOARD DRIVER
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#ENDIF
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#IF ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO))
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#IF (KBDENABLE)
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CALL KBD_INIT ; INITIALIZE 8242 KEYBOARD DRIVER
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#ENDIF
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#IF MKYENABLE
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#IF (MKYENABLE)
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CALL MKY_INIT ; INITIALIZE MKY KEYBOARD DRIVER
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#ENDIF
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#IF ((TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80))
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#IF (NABUKBENABLE)
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CALL NABUKB_INIT ; INITIALIZE NABU KEYBOARD DRIVER
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#ENDIF
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@@ -280,14 +278,24 @@ TMS_INIT1:
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LD (IVT(INT_VDP)),HL ; IVT INDEX
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#ENDIF
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;
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; ENABLE VDP INTERRUPTS NOW
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LD A, (TMS_INITVDU_REG_1)
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SET TMSINTEN,A ; SET INTERRUPT ENABLE BIT
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LD (TMS_INITVDU_REG_1),A
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LD C, TMSCTRL1
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CALL TMS_SET
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;
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#IF ((TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80))
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; ENABLE VDP INTERRUPTS ON NABU INTERRUPT CONTROLLER
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LD A,14 ; PSG R14 (PORT A DATA)
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OUT (NABU_RSEL),A ; SELECT IT
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LD A,(NABU_CTLVAL) ; GET NABU CTL PORT SHADOW REG
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SET 4,A ; ENABLE VDP INTERRUPTS
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LD (NABU_CTLVAL),A ; UPDATE SHADOW REG
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OUT (NABU_RDAT),A ; WRITE TO HARDWARE
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#ENDIF
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;
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#ENDIF
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;
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; ADD OURSELVES TO VDA DISPATCH TABLE
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LD BC,TMS_FNTBL ; BC := FUNCTION TABLE ADDRESS
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@@ -320,38 +328,37 @@ TMS_FNTBL:
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.DW TMS_VDAFIL
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.DW TMS_VDACPY
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.DW TMS_VDASCR
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#IF (TMSMODE == TMSMODE_N8)
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#IF (PPKENABLE)
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.DW PPK_STAT
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.DW PPK_FLUSH
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.DW PPK_READ
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#ENDIF
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#IF ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO))
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#IF (KBDENABLE)
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.DW KBD_STAT
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.DW KBD_FLUSH
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.DW KBD_READ
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#ENDIF
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#IF ((TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80))
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#IF (MKYENABLE)
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.DW MKY_STAT
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.DW MKY_FLUSH
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.DW MKY_READ
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#ENDIF
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#IF (NABUKBENABLE)
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.DW NABUKB_STAT
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.DW NABUKB_FLUSH
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.DW NABUKB_READ
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#ENDIF
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#IF ((TMSMODE == TMSMODE_MSX) | (TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_SCG) | (TMSMODE == TMSMODE_COLECO))
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#IF MKYENABLE
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.DW MKY_STAT
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.DW MKY_FLUSH
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.DW MKY_READ
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#ELSE
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#IF ((!PPKENABLE) & (!KBDENABLE) & (!NABUKBENABLE) & (!MKYENABLE))
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.DW TMS_STAT
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.DW TMS_FLUSH
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.DW TMS_READ
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#ENDIF
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#ENDIF
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.DW TMS_VDARDC
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#IF (($ - TMS_FNTBL) != (VDA_FNCNT * 2))
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.ECHO "*** INVALID TMS FUNCTION TABLE ***\n"
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!!!!!
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#ENDIF
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;
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TMS_VDAINI:
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; RESET VDA
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; CURRENTLY IGNORES VIDEO MODE AND BITMAP DATA
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@@ -359,7 +366,7 @@ TMS_VDAINI:
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CALL TMS_CLEAR ; CLEAR SCREEN
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XOR A ; SIGNAL SUCCESS
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RET
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;
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TMS_VDAQRY:
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LD C,$00 ; MODE ZERO IS ALL WE KNOW
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LD D,TMS_ROWS ; ROWS
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@@ -367,7 +374,7 @@ TMS_VDAQRY:
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LD HL,0 ; EXTRACTION OF CURRENT BITMAP DATA NOT SUPPORTED YET
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XOR A ; SIGNAL SUCCESS
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RET
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;
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TMS_VDARES:
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#IF (CPUFAM == CPU_Z180)
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CALL TMS_Z180IO
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@@ -2,7 +2,7 @@
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#DEFINE RMN 5
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#DEFINE RUP 0
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#DEFINE RTP 0
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#DEFINE BIOSVER "3.5.0-dev.41"
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#DEFINE BIOSVER "3.5.0-dev.42"
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#define rmj RMJ
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#define rmn RMN
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#define rup RUP
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@@ -3,5 +3,5 @@ rmn equ 5
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rup equ 0
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rtp equ 0
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biosver macro
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db "3.5.0-dev.41"
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db "3.5.0-dev.42"
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endm
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