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Add RPH Support to PS2INFO 

- PS2INFO now provides a small startup menu to select either MBC or RHYOPHYRE (needs to be expanded to other platforms).
- Battery condition testing enabled by default in RHYOPHYRE.
- Z180 system timer enabled by default in RHYOPHYRE.
- Default ACR in RHYOPHYRE now turns on the status LED to indicate hardware is alive early in boot process.
pull/289/head v3.1.1-pre.167
Wayne Warthen 4 years ago
parent
f6d0e7fea4
commit
1e52a0b7f3
12 changed files with 141 additions and 50 deletions
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  1. 98
      Source/Apps/Test/ps2info/ps2info.asm
  2. 36
      Source/HBIOS/asci.asm
  3. 1
      Source/HBIOS/cfg_dyno.asm
  4. 1
      Source/HBIOS/cfg_master.asm
  5. 1
      Source/HBIOS/cfg_mk4.asm
  6. 1
      Source/HBIOS/cfg_n8.asm
  7. 1
      Source/HBIOS/cfg_rcz180.asm
  8. 7
      Source/HBIOS/cfg_rph.asm
  9. 1
      Source/HBIOS/cfg_scz180.asm
  10. 36
      Source/HBIOS/dsrtc.asm
  11. 2
      Source/ver.inc
  12. 2
      Source/ver.lib

98
Source/Apps/Test/ps2info/ps2info.asm
View File

@ -6,12 +6,19 @@
; Simple utility that performs simple tests of an 8242 PS/2 controller,
; keyboard, and mouse.
;
; WBW 2022-03-28: Add menu driven port selection
; Add support for RHYOPHYRE
;
;=======================================================================
;
; PS/2 Keyboard/Mouse controller port addresses (adjust as needed)
;
iocmd .equ $E3 ; PS/2 controller command port address
iodat .equ $E2 ; PS/2 controller data port address
; MBC:
iocmd_mbc .equ $E3 ; PS/2 controller command port address
iodat_mbc .equ $E2 ; PS/2 controller data port address
; RPH:
iocmd_rph .equ $8D ; PS/2 controller command port address
iodat_rph .equ $8C ; PS/2 controller data port address
;
cpumhz .equ 8 ; for time delay calculations (not critical)
;
@ -59,15 +66,54 @@ main:
;
; Display active controller port addresses
;
call crlf2
ld de,str_menu
call prtstr
main000:
ld c,$06 ; BDOS direct console I/O
ld e,$FF ; Subfunction = read
call bdos
cp 0
jr z,main000
cp '1'
jr z,setup_mbc
cp '2'
jr z,setup_rph
cp 'x'
ret z
cp 'X'
ret z
jr main
;
setup_mbc:
ld a,iocmd_mbc
ld (iocmd),a
ld a,iodat_mbc
ld (iodat),a
ld de,str_mbc
jr main00
;
setup_rph:
ld a,iocmd_rph
ld (iocmd),a
ld a,iodat_rph
ld (iodat),a
ld de,str_rph
jr main00
;
main00:
call prtstr
call crlf2
ld de,str_cmdport
call prtstr
ld a,iocmd
;ld a,iocmd
ld a,(iocmd)
call prthex
call crlf
ld de,str_dataport
call prtstr
ld a,iodat
;ld a,iodat
ld a,(iodat)
call prthex
;
call test_ctlr
@ -782,7 +828,9 @@ wait_write:
ld a,(timeout) ; setup timeout constant
ld b,a
wait_write1:
in a,(iocmd) ; get status
ld a,(iocmd) ; cmd port
ld c,a ; ... to C
in a,(c) ; get status
ld c,a ; save status
and $02 ; isolate input buf status bit
ret z ; 0 means ready, all done
@ -804,7 +852,9 @@ wait_read:
ld a,(timeout) ; setup timeout constant
ld b,a
wait_read1:
in a,(iocmd) ; get status
ld a,(iocmd) ; cmd port
ld c,a ; ... to C
in a,(c) ; get status
ld c,a ; save status
and $01 ; isolate input buf status bit
xor $01 ; invert so 0 means ready
@ -824,7 +874,9 @@ check_read:
; Check for data ready to read
; A=0 indicates data available (ZF set)
;
in a,(iocmd) ; get status
ld a,(iocmd) ; cmd port
ld c,a ; ... to C
in a,(c) ; get status
and $01 ; isolate input buf status bit
xor $01 ; invert so 0 means ready
ret
@ -834,7 +886,9 @@ check_read_kbd:
; Check for keyboard data ready to read
; A=0 indicates data available (ZF set)
;
in a,(iocmd) ; get status
ld a,(iocmd) ; cmd port
ld c,a ; ... to C
in a,(c) ; get status
and %00100001 ; isolate input buf status bit
cp %00000001 ; data ready, not mouse
ret
@ -844,7 +898,9 @@ check_read_mse:
; Check for mouse data ready to read
; A=0 indicates data available (ZF set)
;
in a,(iocmd) ; get status
ld a,(iocmd) ; cmd port
ld c,a ; ... to C
in a,(c) ; get status
and %00100001 ; isolate input buf status bit
cp %00100001 ; data ready, is mouse
ret
@ -860,8 +916,10 @@ put_cmd:
scf ; else, signal timeout error
ret ; and bail out
put_cmd1:
ld a,(iocmd) ; cmd port
ld c,a ; ... to C
ld a,e ; recover value to write
out (iocmd),a ; write it
out (c),a ; write it
or a ; clear CF for success
ret
;
@ -889,8 +947,10 @@ put_data:
scf ; else, signal timeout error
ret ; and bail out
put_data1:
ld a,(iodat) ; data port
ld c,a ; ... to C
ld a,e ; recover value to write
out (iodat),a ; write it
out (c),a ; write it
or a ; clear CF for success
ret
;
@ -947,7 +1007,9 @@ get_data:
scf ; else signal timeout error
ret ; and bail out
get_data1:
in a,(iodat) ; get data byte
ld a,(iodat) ; data port
ld c,a ; ... to C
in a,(c) ; get data byte
or a ; clear CF for success
ret
;
@ -1239,7 +1301,14 @@ delay1:
; Constants
;=======================================================================
;
str_banner .db "PS/2 Keyboard/Mouse Information v0.4, 7-Jan-2022",0
str_banner .db "PS/2 Keyboard/Mouse Information v0.5, 28-Mar-2022",0
str_menu .db "PS/2 Controller Port Options:\r\n\r\n"
.db " 1 - MBC\r\n"
.db " 2 - RHYOPHYRE\r\n"
.db " X - Exit Application\r\n"
.db "\r\nSelection? ",0
str_mbc .db "MBC",0
str_rph .db "RHYOPHYRE",0
str_exit .db "Done, Thank you for using PS/2 Keyboard/Mouse Information!",0
str_cmdport .db "Controller Command Port: ",0
str_dataport .db "Controller Data Port: ",0
@ -1321,6 +1390,9 @@ stksav .dw 0 ; stack pointer saved at start
.fill stksiz,0 ; stack
stack .equ $ ; stack top
;
iocmd .db 0
iodat .db 0
;
workbuf .fill 8
workbuf_len .db 0
;

36
Source/HBIOS/asci.asm
View File

@ -75,10 +75,14 @@ ASCI1_BASE .EQU Z180_BASE + 1 ; RELATIVE TO Z180 INTERNAL IO PORTS
;
ASCI_RTS .EQU %00010000 ; ~RTS BIT OF CNTLA REG
;
#IF (INTMODE == 2)
#IF (ASCIINTS)
;
#IF (INTMODE == 2)
;
ASCI0_IVT .EQU IVT(INT_SER0)
ASCI1_IVT .EQU IVT(INT_SER1)
;
#ENDIF
;
#ENDIF
;
@ -115,25 +119,29 @@ ASCI_PREINIT2:
ADD IY,DE ; BUMP IY TO NEXT ENTRY
DJNZ ASCI_PREINIT0 ; LOOP UNTIL DONE
;
#IF (INTMODE >= 1)
#IF (ASCIINTS)
;
#IF (INTMODE >= 1)
; SETUP INT VECTORS AS APPROPRIATE
LD A,(ASCI_DEV) ; GET DEVICE COUNT
OR A ; SET FLAGS
JR Z,ASCI_PREINIT3 ; IF ZERO, NO ASCI DEVICES, ABORT
;
#IF (INTMODE == 1)
#IF (INTMODE == 1)
; ADD IM1 INT CALL LIST ENTRY
LD HL,ASCI_INT ; GET INT VECTOR
CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
#ENDIF
#ENDIF
;
#IF (INTMODE == 2)
#IF (INTMODE == 2)
; SETUP IM2 VECTORS
LD HL,ASCI_INT0
LD (ASCI0_IVT),HL ; IVT INDEX
LD HL,ASCI_INT1
LD (ASCI1_IVT),HL ; IVT INDEX
#ENDIF
#ENDIF
;
#ENDIF
;
#ENDIF
;
@ -188,7 +196,9 @@ ASCI_INIT1:
;
; RECEIVE INTERRUPT HANDLER
;
#IF (INTMODE > 0)
#IF (ASCIINTS)
;
#IF (INTMODE > 0)
;
; IM1 ENTRY POINT
;
@ -292,6 +302,8 @@ ASCI_INTRCV3:
ASCI_INTRCV4:
OR $FF ; NZ SET TO INDICATE INT HANDLED
RET ; AND RETURN
;
#ENDIF
;
#ENDIF
;
@ -309,7 +321,7 @@ ASCI_FNTBL:
.ECHO "*** INVALID ASCI FUNCTION TABLE ***\n"
#ENDIF
;
#IF (INTMODE == 0)
#IF ((!ASCIINTS) | (INTMODE == 0))
;
ASCI_IN:
CALL ASCI_IST ; CHECK FOR CHAR READY
@ -395,7 +407,7 @@ ASCI_OUT:
;
;
;
#IF (INTMODE == 0)
#IF ((!ASCIINTS) | (INTMODE == 0))
;
ASCI_IST:
CALL ASCI_ICHK ; ASCI INPUT CHECK
@ -522,7 +534,7 @@ ASCI_INITGO:
OUT (C),L ; WRITE CNTLB VALUE
INC C ; BUMP TO
INC C ; ... STAT REG, B IS STILL 0
#IF (INTMODE > 0)
#IF ((ASCIINTS) & (INTMODE > 0))
LD A,$08 ; SET RIE BIT ON
#ELSE
XOR A ; CLEAR RIE/TIE
@ -534,7 +546,7 @@ ASCI_INITGO:
LD A,$66 ; STATIC VALUE FOR ASEXT
OUT (C),A ; WRITE ASEXT REG
;
#IF (INTMODE > 0)
#IF ((ASCIINTS) & (INTMODE > 0))
;
; RESET THE RECEIVE BUFFER
LD E,(IY+6)
@ -769,7 +781,7 @@ ASCI_STR_ASCIB .DB "ASCI W/BRG$"
;
ASCI_DEV .DB 0 ; DEVICE NUM USED DURING INIT
;
#IF (INTMODE == 0)
#IF ((!ASCIINTS) | (INTMODE == 0))
;
ASCI0_RCVBUF .EQU 0
ASCI1_RCVBUF .EQU 0

1
Source/HBIOS/cfg_dyno.asm
View File

@ -100,6 +100,7 @@ DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
ASCIBOOT .EQU 0 ; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG

1
Source/HBIOS/cfg_master.asm
View File

@ -158,6 +158,7 @@ UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
ASCIBOOT .EQU 0 ; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG

1
Source/HBIOS/cfg_mk4.asm
View File

@ -122,6 +122,7 @@ UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
ASCIBOOT .EQU 0 ; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG

1
Source/HBIOS/cfg_n8.asm
View File

@ -124,6 +124,7 @@ UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
ASCIBOOT .EQU 0 ; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG

1
Source/HBIOS/cfg_rcz180.asm
View File

@ -125,6 +125,7 @@ UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
ASCIBOOT .EQU 0 ; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG

7
Source/HBIOS/cfg_rph.asm
View File

@ -18,7 +18,7 @@
PLATFORM .EQU PLT_RPH ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH]
CPUFAM .EQU CPU_Z180 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .EQU FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
BATCOND .EQU TRUE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .EQU FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .EQU TRUE ; ENABLE FONT COMPRESSION
TICKFREQ .EQU 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
@ -41,12 +41,12 @@ Z180_BASE .EQU $40 ; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
Z180_CLKDIV .EQU 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .EQU 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .EQU 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
Z180_TIMER .EQU FALSE ; Z180: ENABLE Z180 SYSTEM PERIODIC TIMER
Z180_TIMER .EQU TRUE ; Z180: ENABLE Z180 SYSTEM PERIODIC TIMER
;
RPH_PPI0 .EQU $88 ; RPH: FIRST PARALLEL PORT REGISTERS BASE ADR
RPH_RTC .EQU $84 ; RPH: RTC LATCH REGISTER ADR
RPH_ACR .EQU $80 ; RPH: AUXILLARY CONTROL REGISTER (ACR) ADR
RPH_DEFACR .EQU $00 ; RPH: AUX CTL REGISTER DEFAULT VALUE (QUIESCIENT STATE)
RPH_DEFACR .EQU $20 ; RPH: AUX CTL REGISTER DEFAULT VALUE (QUIESCIENT STATE)
;
RTCIO .EQU RPH_RTC ; RTC LATCH REGISTER ADR
;
@ -122,6 +122,7 @@ UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
ASCIBOOT .EQU 0 ; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG

1
Source/HBIOS/cfg_scz180.asm
View File

@ -120,6 +120,7 @@ UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
ASCISWAP .EQU FALSE ; ASCI: SWAP CHANNELS
ASCIBOOT .EQU 0 ; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG

36
Source/HBIOS/dsrtc.asm
View File

@ -66,28 +66,28 @@
; RTC LATCH WRITE
; ---------------
;
; BIT SBC SBC-004 MFPIC N8 N8-CSIO MK4 SC130 SC131 SC126 MBC
; ----- ------- ------- ------- ------- ------- ------- ------- ------- --------------- -------
; D7 RTC_OUT RTC_OUT -- RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT,I2C_SDA RTC_OUT
; D6 RTC_CLK RTC_CLK -- RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK RTC_CLK
; D5 /RTC_WE /RTC_WE -- /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE /RTC_WE
; D4 RTC_CE RTC_CE -- RTC_CE RTC_CE RTC_CE -- -- RTC_CE RTC_CE
; D3 NC CLKSEL /RTC_CE NC NC NC -- -- /SPI_CS2 CLKSEL
; D2 NC SPK RTC_CLK SPI_CS SPI_CS NC /SPI_CS1/SPI_CS1/SPI_CS1 SPK
; D1 -- -- RTC_WE SPI_CLK NC NC -- -- FS LED1
; D0 -- -- RTC_OUT SPI_DI NC NC -- -- I2C_SCL LED0
; BIT SBC SBC-004 MFPIC N8 N8-CSIO MK4 SC130 SC131 SC126 MBC RPH
; ----- ------- ------- ------- ------- ------- ------- ------- ------- --------------- ------- -------
; D7 RTC_OUT RTC_OUT -- RTC_OUT RTC_OUT RTC_OUT -- -- RTC_OUT,I2C_SDA RTC_OUT RTC_OUT
; D6 RTC_CLK RTC_CLK -- RTC_CLK RTC_CLK RTC_CLK -- -- RTC_CLK RTC_CLK RTC_CLK
; D5 /RTC_WE /RTC_WE -- /RTC_WE /RTC_WE /RTC_WE -- -- /RTC_WE /RTC_WE /RTC_WE
; D4 RTC_CE RTC_CE -- RTC_CE RTC_CE RTC_CE -- -- RTC_CE RTC_CE RTC_CE
; D3 NC CLKSEL /RTC_CE NC NC NC -- -- /SPI_CS2 CLKSEL NC
; D2 NC SPK RTC_CLK SPI_CS SPI_CS NC /SPI_CS1/SPI_CS1/SPI_CS1 SPK NC
; D1 -- -- RTC_WE SPI_CLK NC NC -- -- FS LED1 NC
; D0 -- -- RTC_OUT SPI_DI NC NC -- -- I2C_SCL LED0 NC
;
; RTC LATCH READ
; --------------
;
; D7 -- -- -- -- -- -- -- -- I2C_SDA --
; D6 CFG CFG -- SPI_DO CFG -- -- -- -- CFG
; D5 -- -- -- -- -- -- -- -- -- --
; D4 -- -- -- -- -- -- -- -- -- --
; D3 -- -- -- -- -- -- -- -- -- --
; D2 -- -- -- -- -- -- -- -- -- --
; D1 ---- -- -- -- -- -- -- -- -- CLKSEL
; D0 RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN -- -- RTC_IN RTC_IN
; D7 -- -- -- -- -- -- -- -- I2C_SDA -- --
; D6 CFG CFG -- SPI_DO CFG -- -- -- -- CFG --
; D5 -- -- -- -- -- -- -- -- -- -- --
; D4 -- -- -- -- -- -- -- -- -- -- --
; D3 -- -- -- -- -- -- -- -- -- -- --
; D2 -- -- -- -- -- -- -- -- -- -- --
; D1 ---- -- -- -- -- -- -- -- -- CLKSEL --
; D0 RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN RTC_IN -- -- RTC_IN RTC_IN RTC_IN
;
#IF (DSRTCMODE == DSRTCMODE_STD)
;

2
Source/ver.inc
View File

@ -2,4 +2,4 @@
#DEFINE RMN 1
#DEFINE RUP 1
#DEFINE RTP 0
#DEFINE BIOSVER "3.1.1-pre.166"
#DEFINE BIOSVER "3.1.1-pre.167"

2
Source/ver.lib
View File

@ -3,5 +3,5 @@ rmn equ 1
rup equ 1
rtp equ 0
biosver macro
db "3.1.1-pre.166"
db "3.1.1-pre.167"
endm

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