Browse Source

Improved clock driver auto-detect/fallback

pull/112/head
Wayne Warthen 6 years ago
parent
commit
257f784318
  1. 1
      Doc/ChangeLog.txt
  2. 2
      Source/HBIOS/Config/SCZ180_130.asm
  3. 2
      Source/HBIOS/Config/SCZ180_131.asm
  4. 7
      Source/HBIOS/bqrtc.asm
  5. 10
      Source/HBIOS/cfg_dyno.asm
  6. 10
      Source/HBIOS/cfg_ezz80.asm
  7. 10
      Source/HBIOS/cfg_master.asm
  8. 10
      Source/HBIOS/cfg_mk4.asm
  9. 10
      Source/HBIOS/cfg_n8.asm
  10. 10
      Source/HBIOS/cfg_rcz180.asm
  11. 10
      Source/HBIOS/cfg_rcz80.asm
  12. 10
      Source/HBIOS/cfg_sbc.asm
  13. 10
      Source/HBIOS/cfg_scz180.asm
  14. 10
      Source/HBIOS/cfg_zeta.asm
  15. 10
      Source/HBIOS/cfg_zeta2.asm
  16. 8
      Source/HBIOS/dsrtc.asm
  17. 80
      Source/HBIOS/hbios.asm
  18. 143
      Source/HBIOS/intrtc.asm
  19. 7
      Source/HBIOS/simrtc.asm
  20. 8
      Source/ReadMe.txt

1
Doc/ChangeLog.txt

@ -5,6 +5,7 @@ Version 3.1
- WBW: FDISK80 updated to allow reserving up to 256 slices
- WBW: Added support dual 16C550 UART on RC2014 platform
- WBW: Made .com images smaller (contain only Z-System now)
- WBW: Support automatic clock hardware detection and fallback
Version 3.0.1
-------------

2
Source/HBIOS/Config/SCZ180_130.asm

@ -40,8 +40,8 @@ LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
TIMRTCENABLE .SET TRUE ; ENABLE PERIODIC TIMER CLOCK DRIVER (TIMRTC.ASM)
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)

2
Source/HBIOS/Config/SCZ180_131.asm

@ -40,8 +40,8 @@ LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
TIMRTCENABLE .SET TRUE ; ENABLE PERIODIC TIMER CLOCK DRIVER (TIMRTC.ASM)
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)

7
Source/HBIOS/bqrtc.asm

@ -94,6 +94,10 @@ BQRTC_BUFSIZE .EQU 6 ; 6 BYTE BUFFER (YYMMDDHHMMSS)
; RTC Device Initialization Entry
BQRTC_INIT:
LD A,(RTC_DISPACT) ; RTC DISPATCHER ALREADY SET?
OR A ; SET FLAGS
RET NZ ; IF ALREADY ACTIVE, ABORT
;
CALL NEWLINE ; Formatting
PRTS("BQRTC: IO=0x$")
LD A, BQRTC_BASE
@ -127,6 +131,9 @@ BQRTC_INIT:
LD A, (BQRTC_BUF_SEC)
CALL PRTHEXBYTE
LD BC,BQRTC_DISPATCH
CALL RTC_SETDISP
XOR A ; Signal success
RET

10
Source/HBIOS/cfg_dyno.asm

@ -61,11 +61,6 @@ CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
;
TIMRTCENABLE .EQU FALSE ; ENABLE PERIODIC TIMER CLOCK DRIVER (TIMRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
@ -73,6 +68,11 @@ DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
BQRTCENABLE .EQU TRUE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)

10
Source/HBIOS/cfg_ezz80.asm

@ -58,11 +58,6 @@ CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
;
TIMRTCENABLE .EQU FALSE ; ENABLE PERIODIC TIMER CLOCK DRIVER (TIMRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
@ -70,6 +65,11 @@ DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

10
Source/HBIOS/cfg_master.asm

@ -80,11 +80,6 @@ KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
;
TIMRTCENABLE .EQU FALSE ; ENABLE PERIODIC TIMER CLOCK DRIVER (TIMRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DSRTCENABLE .EQU FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
@ -92,6 +87,11 @@ DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

10
Source/HBIOS/cfg_mk4.asm

@ -65,11 +65,6 @@ KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
;
TIMRTCENABLE .EQU FALSE ; ENABLE PERIODIC TIMER CLOCK DRIVER (TIMRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
@ -77,6 +72,11 @@ DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

10
Source/HBIOS/cfg_n8.asm

@ -68,11 +68,6 @@ KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
;
TIMRTCENABLE .EQU FALSE ; ENABLE PERIODIC TIMER CLOCK DRIVER (TIMRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
@ -80,6 +75,11 @@ DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

10
Source/HBIOS/cfg_rcz180.asm

@ -61,11 +61,6 @@ CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
;
TIMRTCENABLE .EQU FALSE ; ENABLE PERIODIC TIMER CLOCK DRIVER (TIMRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
@ -73,6 +68,11 @@ DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

10
Source/HBIOS/cfg_rcz80.asm

@ -57,11 +57,6 @@ CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
;
TIMRTCENABLE .EQU FALSE ; ENABLE PERIODIC TIMER CLOCK DRIVER (TIMRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
@ -69,6 +64,11 @@ DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

10
Source/HBIOS/cfg_sbc.asm

@ -59,11 +59,6 @@ KBDTRACE .EQU 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKKBLOUT .EQU KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
KBDKBLOUT .EQU KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
;
TIMRTCENABLE .EQU FALSE ; ENABLE PERIODIC TIMER CLOCK DRIVER (TIMRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
@ -71,6 +66,11 @@ DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

10
Source/HBIOS/cfg_scz180.asm

@ -56,11 +56,6 @@ CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
;
TIMRTCENABLE .EQU FALSE ; ENABLE PERIODIC TIMER CLOCK DRIVER (TIMRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
@ -68,6 +63,11 @@ DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

10
Source/HBIOS/cfg_zeta.asm

@ -53,11 +53,6 @@ CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
;
TIMRTCENABLE .EQU FALSE ; ENABLE PERIODIC TIMER CLOCK DRIVER (TIMRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
@ -65,6 +60,11 @@ DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

10
Source/HBIOS/cfg_zeta2.asm

@ -58,11 +58,6 @@ CRTACT .EQU FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
ANSITRACE .EQU 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
;
TIMRTCENABLE .EQU FALSE ; ENABLE PERIODIC TIMER CLOCK DRIVER (TIMRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DSRTCENABLE .EQU TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .EQU DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
@ -70,6 +65,11 @@ DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

8
Source/HBIOS/dsrtc.asm

@ -159,6 +159,10 @@ DSRTC_PREINIT1:
; RTC DEVICE INITIALIZATION ENTRY
;
DSRTC_INIT:
LD A,(RTC_DISPACT) ; RTC DISPATCHER ALREADY SET?
OR A ; SET FLAGS
RET NZ ; IF ALREADY ACTIVE, ABORT
;
CALL NEWLINE ; FORMATTING
PRTS("DSRTC: MODE=$")
;
@ -206,6 +210,10 @@ DSRTC_INIT1:
NOCHG1:
PRTS("OFF$")
NOCHG2:
;
LD BC,DSRTC_DISPATCH
CALL RTC_SETDISP
;
XOR A ; SIGNAL SUCCESS
RET
;

80
Source/HBIOS/hbios.asm

@ -1668,18 +1668,18 @@ HB_INITTBL:
#IF (ACIAENABLE)
.DW ACIA_INIT
#ENDIF
#IF (TIMRTCENABLE)
.DW TIMRTC_INIT
#ENDIF
#IF (SIMRTCENABLE)
.DW SIMRTC_INIT
#ENDIF
#IF (DSRTCENABLE)
.DW DSRTC_INIT
#ENDIF
#IF (BQRTCENABLE)
.DW BQRTC_INIT
#ENDIF
#IF (SIMRTCENABLE)
.DW SIMRTC_INIT
#ENDIF
#IF (INTRTCENABLE)
.DW INTRTC_INIT
#ENDIF
#IF (VDUENABLE)
.DW VDU_INIT
#ENDIF
@ -2153,22 +2153,30 @@ HB_IOBNK .DB 0 ; CURRENT IO BUFFER BANK ID
; B: FUNCTION
;
RTC_DISPATCH:
#IF (TIMRTCENABLE)
JP TIMRTC_DISPATCH
#ENDIF
#IF (SIMRTCENABLE)
JP SIMRTC_DISPATCH
#ENDIF
#IF (DSRTCENABLE)
JP DSRTC_DISPATCH
#ENDIF
#IF (BQRTCENABLE)
JP BQRTC_DISPATCH
#ENDIF
;CALL PANIC
PUSH HL ; SAVE INCOMING HL
LD HL,(RTC_DISPADR) ;
EX (SP),HL
RET
;
RTC_DISPERR:
OR $FF
RET
;
; SET RTC DISPATCH ADDRESS, USED BY RTC DRIVERS DURING INIT
; BC HAS ADDRESS OF DISPATCH ADDRESS
; WILL ONLY SAVE THE FIRST ADDRESS SET
;
RTC_SETDISP:
LD (RTC_DISPADR),BC ; SAVE THE ADDRESS
OR $FF ; FLAG ACTIVE VALUE
LD (RTC_DISPACT),A ; SAVE IT
RET ; AND DONE
;
;
;
RTC_DISPADR .DW RTC_DISPERR ; RTC DISPATCH ADDRESS
RTC_DISPACT .DB 0 ; SET WHEN DISPADR SET
;
;==================================================================================================
; VIDEO DISPLAY ADAPTER DEVICE DISPATCHER
;==================================================================================================
@ -2933,23 +2941,6 @@ HB_TMPREF .DW 0
; DEVICE DRIVERS
;==================================================================================================
;
#IF (TIMRTCENABLE)
ORG_TIMRTC .EQU $
#INCLUDE "timrtc.asm"
SIZ_TIMRTC .EQU $ - ORG_TIMRTC
.ECHO "TIMRTC occupies "
.ECHO SIZ_TIMRTC
.ECHO " bytes.\n"
#ENDIF
#IF (SIMRTCENABLE)
ORG_SIMRTC .EQU $
#INCLUDE "simrtc.asm"
SIZ_SIMRTC .EQU $ - ORG_SIMRTC
.ECHO "SIMRTC occupies "
.ECHO SIZ_SIMRTC
.ECHO " bytes.\n"
#ENDIF
;
#IF (DSRTCENABLE)
ORG_DSRTC .EQU $
#INCLUDE "dsrtc.asm"
@ -2967,6 +2958,23 @@ SIZ_BQRTC .EQU $ - ORG_BQRTC
.ECHO SIZ_BQRTC
.ECHO " bytes.\n"
#ENDIF
#IF (SIMRTCENABLE)
ORG_SIMRTC .EQU $
#INCLUDE "simrtc.asm"
SIZ_SIMRTC .EQU $ - ORG_SIMRTC
.ECHO "SIMRTC occupies "
.ECHO SIZ_SIMRTC
.ECHO " bytes.\n"
#ENDIF
;
#IF (INTRTCENABLE)
ORG_INTRTC .EQU $
#INCLUDE "intrtc.asm"
SIZ_INTRTC .EQU $ - ORG_INTRTC
.ECHO "INTRTC occupies "
.ECHO SIZ_INTRTC
.ECHO " bytes.\n"
#ENDIF
;
#IF (ASCIENABLE)
ORG_ASCI .EQU $

143
Source/HBIOS/timrtc.asm → Source/HBIOS/intrtc.asm

@ -3,24 +3,31 @@
; SYSTEM TIMER BASED CLOCK DRIVER
;==================================================================================================
;
TIMRTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS)
INTRTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS)
;
; RTC DEVICE INITIALIZATION ENTRY
;
TIMRTC_INIT:
INTRTC_INIT:
LD A,(RTC_DISPACT) ; RTC DISPATCHER ALREADY SET?
OR A ; SET FLAGS
RET NZ ; IF ALREADY ACTIVE, ABORT
;
CALL NEWLINE ; FORMATTING
PRTS("TIMRTC: $")
PRTS("INTRTC: $")
;
; HOOK THE HBIOS SECONDS VECTOR
LD HL,(VEC_SECOND+1) ; GET CUR SECONDS VECTOR
LD (TIMRTC_VEC),HL ; SAVE IT INTERNALLY
LD HL,TIMRTC_INT ; OUR SECONDS INT ENTRY
LD (INTRTC_VEC),HL ; SAVE IT INTERNALLY
LD HL,INTRTC_INT ; OUR SECONDS INT ENTRY
LD (VEC_SECOND+1),HL ; REPLACE IT
;
; DISPLAY CURRENT TIME
CALL TIMRTC_GETTIM0
LD HL,TIMRTC_BCDBUF ; POINT TO BCD BUF
CALL INTRTC_GETTIM0
LD HL,INTRTC_BCDBUF ; POINT TO BCD BUF
CALL PRTDT
;
LD BC,INTRTC_DISPATCH
CALL RTC_SETDISP
;
XOR A ; SIGNAL SUCCESS
RET
@ -29,28 +36,28 @@ TIMRTC_INIT:
; A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
; B: FUNCTION (IN)
;
TIMRTC_DISPATCH:
INTRTC_DISPATCH:
LD A,B ; GET REQUESTED FUNCTION
AND $0F ; ISOLATE SUB-FUNCTION
JP Z,TIMRTC_GETTIM ; GET TIME
JP Z,INTRTC_GETTIM ; GET TIME
DEC A
JP Z,TIMRTC_SETTIM ; SET TIME
JP Z,INTRTC_SETTIM ; SET TIME
DEC A
JP Z,TIMRTC_GETBYT ; GET NVRAM BYTE VALUE
JP Z,INTRTC_GETBYT ; GET NVRAM BYTE VALUE
DEC A
JP Z,TIMRTC_SETBYT ; SET NVRAM BYTE VALUE
JP Z,INTRTC_SETBYT ; SET NVRAM BYTE VALUE
DEC A
JP Z,TIMRTC_GETBLK ; GET NVRAM DATA BLOCK VALUES
JP Z,INTRTC_GETBLK ; GET NVRAM DATA BLOCK VALUES
DEC A
JP Z,TIMRTC_SETBLK ; SET NVRAM DATA BLOCK VALUES
JP Z,INTRTC_SETBLK ; SET NVRAM DATA BLOCK VALUES
CALL PANIC
;
; NVRAM FUNCTIONS ARE NOT AVAILABLE IN SIMULATOR
;
TIMRTC_GETBYT:
TIMRTC_SETBYT:
TIMRTC_GETBLK:
TIMRTC_SETBLK:
INTRTC_GETBYT:
INTRTC_SETBYT:
INTRTC_GETBLK:
INTRTC_SETBLK:
CALL PANIC
;
; RTC GET TIME
@ -59,19 +66,19 @@ TIMRTC_SETBLK:
; BUFFER FORMAT IS BCD: YYMMDDHHMMSS
; 24 HOUR TIME FORMAT IS ASSUMED
;
TIMRTC_GETTIM:
INTRTC_GETTIM:
; GET THE TIME INTO TEMP BUF
PUSH HL ; SAVE PTR TO CALLERS BUFFER
CALL TIMRTC_GETTIM0 ; GET TIME TO WORK BUFFER
CALL INTRTC_GETTIM0 ; GET TIME TO WORK BUFFER
;
; NOW COPY TO REAL DESTINATION (INTERBANK SAFE)
LD A,BID_BIOS ; COPY FROM BIOS BANK
LD (HB_SRCBNK),A ; SET IT
LD A,(HB_INVBNK) ; COPY TO CURRENT USER BANK
LD (HB_DSTBNK),A ; SET IT
LD HL,TIMRTC_BCDBUF ; SOURCE ADR
LD HL,INTRTC_BCDBUF ; SOURCE ADR
POP DE ; DEST ADR
LD BC,TIMRTC_BUFSIZ ; LENGTH
LD BC,INTRTC_BUFSIZ ; LENGTH
CALL HB_BNKCPY ; COPY THE CLOCK DATA
;
LD DE,60 ; DELAY 60 * 16US = ~1MS
@ -79,11 +86,11 @@ TIMRTC_GETTIM:
XOR A ; SIGNAL SUCCESS
RET ; AND RETURN
;
TIMRTC_GETTIM0:
LD HL,TIMRTC_BINBUF ; FROM BINARY BUFFER
LD DE,TIMRTC_BCDBUF ; TO BCD BUFFER
INTRTC_GETTIM0:
LD HL,INTRTC_BINBUF ; FROM BINARY BUFFER
LD DE,INTRTC_BCDBUF ; TO BCD BUFFER
HB_DI
CALL TIMRTC_BIN2BCD ; COPY AND CONVERT
CALL INTRTC_BIN2BCD ; COPY AND CONVERT
HB_EI
RET
;
@ -93,20 +100,20 @@ TIMRTC_GETTIM0:
; BUFFER FORMAT IS BCD: YYMMDDHHMMSSWW
; 24 HOUR TIME FORMAT IS ASSUMED
;
TIMRTC_SETTIM:
INTRTC_SETTIM:
; COPY TO BCD BUF
LD A,(HB_INVBNK) ; COPY FROM CURRENT USER BANK
LD (HB_SRCBNK),A ; SET IT
LD A,BID_BIOS ; COPY TO BIOS BANK
LD (HB_DSTBNK),A ; SET IT
LD DE,TIMRTC_BCDBUF ; DEST ADR
LD BC,TIMRTC_BUFSIZ ; LENGTH
LD DE,INTRTC_BCDBUF ; DEST ADR
LD BC,INTRTC_BUFSIZ ; LENGTH
CALL HB_BNKCPY ; COPY THE CLOCK DATA
;
LD HL,TIMRTC_BCDBUF ; FROM BCD BUF
LD DE,TIMRTC_BINBUF ; TO BIN BUF
LD HL,INTRTC_BCDBUF ; FROM BCD BUF
LD DE,INTRTC_BINBUF ; TO BIN BUF
HB_DI
CALL TIMRTC_BCD2BIN ; COPY AND CONVERT
CALL INTRTC_BCD2BIN ; COPY AND CONVERT
HB_EI
;
XOR A ; SIGNAL SUCCESS
@ -114,108 +121,108 @@ TIMRTC_SETTIM:
;
; HANDLER FOR TIMER SECONDS INTERRUPT
;
TIMRTC_INT:
LD HL,TIMRTC_BINBUF + TIMRTC_BUFSIZ - 1
INTRTC_INT:
LD HL,INTRTC_BINBUF + INTRTC_BUFSIZ - 1
INC (HL) ; INC SECONDS
LD A,59 ; MAX VALUE
CP (HL) ; OVERFLOW?
JR NC,TIMRTC_INTX ; NOPE, DONE
JR NC,INTRTC_INTX ; NOPE, DONE
LD (HL),0 ; BACK TO ZERO
DEC HL ; POINT TO MINUTES
INC (HL) ; INCREMENT MINUTE
CP (HL) ; OVERFLOW?
JR NC,TIMRTC_INTX ; NOPE, DONE
JR NC,INTRTC_INTX ; NOPE, DONE
LD (HL),0 ; BACK TO ZERO
DEC HL ; POINT TO HOURS
INC (HL) ; INCREMENT HOURS
LD A,23 ; MAX VALUE
CP (HL) ; OVERFLOW?
JR NC,TIMRTC_INTX ; NOPE, DONE
JR NC,INTRTC_INTX ; NOPE, DONE
LD (HL),0 ; BACK TO ZERO
DEC HL ; POINT TO DATE
LD A,(TIMRTC_MO) ; GET CURRENT MONTH
LD A,(INTRTC_MO) ; GET CURRENT MONTH
DEC A ; ZERO OFFSET
LD DE,TIMRTC_MONTBL ; POINT TO DAYS IN MON TBL
LD DE,INTRTC_MONTBL ; POINT TO DAYS IN MON TBL
ADD A,E ; ADD OFFSET
LD E,A ; BACK TO E
JR NC,TIMRTC_INT1 ; NO CARRY, SKIP
JR NC,INTRTC_INT1 ; NO CARRY, SKIP
INC D ; HANDLE CARRY
TIMRTC_INT1:
INTRTC_INT1:
LD A,(DE) ; A := DAYS IN MONTH
LD C,A ; COPY TO C FOR LATER
LD A,(TIMRTC_MO) ; GET CURRENT MONTH
LD A,(INTRTC_MO) ; GET CURRENT MONTH
CP 2 ; FEBRUARY?
JR NZ,TIMRTC_INT2 ; IF NOT, NOT LEAY, SKIP
LD A,(TIMRTC_YR) ; GET CURRENT YEAR
JR NZ,INTRTC_INT2 ; IF NOT, NOT LEAY, SKIP
LD A,(INTRTC_YR) ; GET CURRENT YEAR
AND $03 ; CHECK FOR LEAP
JR NZ,TIMRTC_INT2 ; IF NOT LEAP, SKIP AHEAD
JR NZ,INTRTC_INT2 ; IF NOT LEAP, SKIP AHEAD
INC C ; BUMP DAYS IN FEB FOR LEAP
TIMRTC_INT2:
INTRTC_INT2:
INC (HL) ; INCREMENT DATE
LD A,C ; A := TRUE DAYS IN MONTH + 1
CP (HL) ; OVERFLOW?
JR NZ,TIMRTC_INTX ; NOPE, DONE
JR NZ,INTRTC_INTX ; NOPE, DONE
LD (HL),1 ; BACK TO DAY ONE
DEC HL ; POINT TO MONTH
INC (HL) ; INCREMENT MONTH
LD A,13 ; PAST MAX?
CP (HL) ; OVERFLOW?
JR NZ,TIMRTC_INTX ; NOPE, DONE
JR NZ,INTRTC_INTX ; NOPE, DONE
LD (HL),1 ; BACK TO MONTH ONE
DEC HL ; POINT TO YEAR
INC (HL) ; INCREMENT YEAR
LD A,100 ; PAST MAX?
CP (HL) ; OVERFLOW?
JR NZ,TIMRTC_INTX ; NOPE, DONE
JR NZ,INTRTC_INTX ; NOPE, DONE
LD (HL),0 ; BACK TO YEAR ZERO
TIMRTC_INTX:
INTRTC_INTX:
JP PANIC
TIMRTC_VEC .EQU $-2
INTRTC_VEC .EQU $-2
;
; CONVERT FROM BINARY BUF (HL) TO BCD BUF (DE)
;
TIMRTC_BIN2BCD:
LD B,TIMRTC_BUFSIZ
TIMRTC_BIN2BCD1:
INTRTC_BIN2BCD:
LD B,INTRTC_BUFSIZ
INTRTC_BIN2BCD1:
LD A,(HL)
CALL BYTE2BCD
LD (DE),A
INC HL
INC DE
DJNZ TIMRTC_BIN2BCD1
DJNZ INTRTC_BIN2BCD1
RET
;
; CONVERT FROM BCD BUF (HL) TO BINARY BUF (DE)
;
TIMRTC_BCD2BIN
LD B,TIMRTC_BUFSIZ
TIMRTC_BCD2BIN1:
INTRTC_BCD2BIN
LD B,INTRTC_BUFSIZ
INTRTC_BCD2BIN1:
LD A,(HL)
CALL BCD2BYTE
LD (DE),A
INC HL
INC DE
DJNZ TIMRTC_BCD2BIN1
DJNZ INTRTC_BCD2BIN1
RET
;
; WORKING VARIABLES
;
TIMRTC_BINBUF: ; ALL IN BINARY
TIMRTC_YR .DB 20
TIMRTC_MO .DB 01
TIMRTC_DT .DB 01
TIMRTC_HH .DB 00
TIMRTC_MM .DB 00
TIMRTC_SS .DB 00
INTRTC_BINBUF: ; ALL IN BINARY
INTRTC_YR .DB 20
INTRTC_MO .DB 01
INTRTC_DT .DB 01
INTRTC_HH .DB 00
INTRTC_MM .DB 00
INTRTC_SS .DB 00
;
TIMRTC_BCDBUF .FILL TIMRTC_BUFSIZ
INTRTC_BCDBUF .FILL INTRTC_BUFSIZ
;
TIMRTC_MONTBL: ; DAYS IN MONTH + 1
INTRTC_MONTBL: ; DAYS IN MONTH + 1
.DB 32 ; JANUARY
.DB 29 ; FEBRUARY (NON-LEAP)
.DB 32 ; MARCH

7
Source/HBIOS/simrtc.asm

@ -11,6 +11,10 @@ SIMRTC_BUFSIZ .EQU 6 ; SIX BYTE BUFFER (YYMMDDHHMMSS)
; RTC DEVICE INITIALIZATION ENTRY
;
SIMRTC_INIT:
LD A,(RTC_DISPACT) ; RTC DISPATCHER ALREADY SET?
OR A ; SET FLAGS
RET NZ ; IF ALREADY ACTIVE, ABORT
;
CALL NEWLINE ; FORMATTING
PRTS("SIMRTC: $")
;
@ -20,6 +24,9 @@ SIMRTC_INIT:
CALL SIMRTC_GETTIM0
POP HL
CALL PRTDT
;
LD BC,SIMRTC_DISPATCH
CALL RTC_SETDISP
;
XOR A ; SIGNAL SUCCESS
RET

8
Source/ReadMe.txt

@ -67,7 +67,7 @@ Note that steps 1 and 2 are performed to customize your ROM as
desired. If you want to simply build a standard configuration, it is
*not* necessary to perform steps 1 or 2 before running a build. In
fact, I strongly recommend that you skip steps 1 and 2 initially and
just perform perform steps 3 and 4 using the standard configuraion to
just perform perform steps 3 and 4 using the standard configuration to
make sure that you have no issues building and programming a ROM that
works the same as a pre-built ROM.
@ -76,7 +76,7 @@ Each of the 4 steps above is described in more detail below.
1. Create/Update Configuration File
-----------------------------------
The options for a build are primarily controled by a configuration
The options for a build are primarily controlled by a configuration
file that is included in the build process. In order to customize
your settings, it is easiest to make a copy of an existing
configuration file and make your changes there.
@ -87,7 +87,7 @@ series of files named <plt>_<cfg>.asm where <plt> refers to the
CPU board in your system and <cfg> is used to name the specific
configuration so you can maintain multiple configurations.
You will notice that there is generaly one configuration file for
You will notice that there is generally one configuration file for
each CPU platform with a name of "std". For example, you there is
a file called MK4_std.asm. This is the standard ("std")
configuration for a Mark IV CPU board.
@ -148,7 +148,7 @@ These directories are already populated in the distribution. You do
not need to do anything unless you want to change the files that are
included in the ROM Disk.
In summary, the ROM Disk imbedded in the ROM firmware you build,
In summary, the ROM Disk embedded in the ROM firmware you build,
will include the files from the ROM_512KB directory (or the
ROM_1024KB directory if building a 1024KB firmware).
Additionally, files will be added from the directory associated

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