mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 22:43:15 -06:00
ez80: some general improvements to ez80 HBIOS drivers and implemented a true interrupt driver timer tick driver
This commit is contained in:
Dean Netherton
@@ -33,13 +33,10 @@ CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
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FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
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FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES
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;
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EZ80RTCENABLE .SET TRUE ; EZ80 ON CHIP RTC
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;
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UARTENABLE .SET FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
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ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
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SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
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DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
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EZ80UARTENABLE .SET TRUE ; EZ80UART: ENABLE EZ80 UART DRIVER (EZ80UART.ASM)
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;
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LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
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;
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@@ -67,5 +64,8 @@ IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
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;
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PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
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EZ80UARTENABLE .SET TRUE ; EZ80 UART: ENABLE EZ80 UART0 DRIVER (EZ80UART.ASM)
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EZ80RTCENABLE .SET TRUE ; EZ80 ON CHIP RTC
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EZ80TIMER .SET EZ80TMR_INT ; EZ80: TIMER TICK MODEL: EZ80TMR_[INT|FIRM]
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EZ80_IO_FREQ .SET 5250
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EZ80_MEM_FREQ .SET 8000
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@@ -130,6 +130,10 @@ BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
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;
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EZ80RTCENABLE .EQU TRUE ; EZ80 ON CHIP RTC
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;
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EZ80TMR_INT .EQU 1 ; MARSHALL TIMER TICK INTERRUPTS FROM EZ80 TO HBIOS
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EZ80TMR_FIRM .EQU 2 ; DELEGATE SYS TIMER HBIOS CALL TO EZ80 FIRMWARE (TIMER TICK INTS DISABLED)
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EZ80TIMER .EQU EZ80TMR_INT ; EZ80: TIMER TICK MODEL: EZ80TMR_[INT|FIRM]
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;
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INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
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;
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RP5RTCENABLE .EQU FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
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76
Source/HBIOS/ez80cpudrv.asm
Normal file
76
Source/HBIOS/ez80cpudrv.asm
Normal file
@@ -0,0 +1,76 @@
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;
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;==================================================================================================
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; EZ80 50/60HZ TIMER TICK DRIVER
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;==================================================================================================
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;
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; Communicate with on-chip eZ80 firmware to:
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; 1. Exchange platform version numbers
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; 2. Configure memory banking type
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; 3. Retrieve CPU Frequency
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; 4. Set Memory and I/O Bus Timings
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; 5. Set Timer Tick Frequency
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;
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EZ80_PREINIT:
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EZ80_TMR_INT_DISABLE()
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; PROVIDE THE EZ80 FIRMWARE WITH PLATFORM CONFIGUATIONS
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LD C, 1 ; RomWBW'S ASSIGNED CODE
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LD D, RMJ
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LD E, RMN
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LD H, RUP
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LD L, RTP
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EZ80_UTIL_VER_EXCH()
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; TODO CHECK RETURNED VERSION AND WARN IF NOT GOOD
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; EXPECT A VERSION NUMBER > 0.1.0.0
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LD C, MEMMGR
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LD HL, ROMSIZE
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LD DE, RAMSIZE
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EZ80_UTIL_BNK_HLP() ; INSTAL HIGH PERFORMANCE BANK SWITCHER
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; TODO CHECK RESULT AND USE STANDARD BANK SWITCHER IF NZ RETURNED
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; OTHERWISE USE RST.L %18 FOR BANK SWITCH HELPER
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EZ80_UTIL_GET_CPU_FQ()
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LD A, E
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LD (CB_CPUMHZ), A
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LD (CB_CPUKHZ), HL
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LD (HB_CPUOSC), HL
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#IF (EZ80_ASSIGN == 1)
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LD H, EZ80_MEM_CYCLES
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LD L, EZ80_IO_CYCLES
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EZ80_UTIL_SET_BUSTM()
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#ELSE
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LD HL, EZ80_MEM_FREQ
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LD DE, EZ80_IO_FREQ
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EZ80_UTIL_SET_BUSFQ() ; H -> CS3 CYCLES, L -> CS2 CYCLES
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#ENDIF
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LD A, H
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LD (EZ80_PLT_C3CYL), A
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LD A, L
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LD (EZ80_PLT_C2CYL), A
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LD C, TICKFREQ
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EZ80_TMR_SET_FREQTICK
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LD A, 5 ; HB_CPUTYPE = 5 FOR eZ80
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LD (HB_CPUTYPE),A
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RET
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EZ80_RPT_TIMINGS:
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LD A,(EZ80_PLT_C3CYL)
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CALL PRTDECB
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CALL PRTSTRD
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.TEXT " MEM B/C, $"
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LD A,(EZ80_PLT_C2CYL)
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CALL PRTDECB
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CALL PRTSTRD
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.TEXT " I/O B/C$"
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RET
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EZ80_PLT_C3CYL:
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.DB EZ80_MEM_CYCLES
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EZ80_PLT_C2CYL:
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.DB EZ80_IO_CYCLES
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@@ -27,14 +27,17 @@
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#DEFINE EZ80_RTC_GET_TIME LD A, 1 \ LD B, 1 \ EZ80_FN
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#DEFINE EZ80_RTC_SET_TIME LD A, 1 \ LD B, 2 \ EZ80_FN
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#DEFINE EZ80_TMR_GET_TICKS LD A, 2 \ LD B, 0 \ EZ80_FN
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#DEFINE EZ80_TMR_GET_SECONDS LD A, 2 \ LD B, 1 \ EZ80_FN
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#DEFINE EZ80_TMR_SET_TICKS LD A, 2 \ LD B, 2 \ EZ80_FN
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#DEFINE EZ80_TMR_SET_SECONDS LD A, 2 \ LD B, 3 \ EZ80_FN
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#DEFINE EZ80_TMR_GET_FREQTICK LD A, 2 \ LD B, 4 \ EZ80_FN
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#DEFINE EZ80_TMR_SET_FREQTICK LD A, 2 \ LD B, 5 \ EZ80_FN
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#DEFINE EZ80_TMR_DELAY_START LD A, 2 \ LD B, 6 \ EZ80_FN
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#DEFINE EZ80_TMR_DELAY_WAIT LD A, 2 \ LD B, 7 \ EZ80_FN
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#DEFINE EZ80_TMR_GET_TICKS LD A, 2 \ LD B, 0 \ EZ80_FN
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#DEFINE EZ80_TMR_GET_SECONDS LD A, 2 \ LD B, 1 \ EZ80_FN
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#DEFINE EZ80_TMR_SET_TICKS LD A, 2 \ LD B, 2 \ EZ80_FN
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#DEFINE EZ80_TMR_SET_SECONDS LD A, 2 \ LD B, 3 \ EZ80_FN
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#DEFINE EZ80_TMR_GET_FREQTICK LD A, 2 \ LD B, 4 \ EZ80_FN
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#DEFINE EZ80_TMR_SET_FREQTICK LD A, 2 \ LD B, 5 \ EZ80_FN
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#DEFINE EZ80_TMR_DELAY_START LD A, 2 \ LD B, 6 \ EZ80_FN
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#DEFINE EZ80_TMR_DELAY_WAIT LD A, 2 \ LD B, 7 \ EZ80_FN
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#DEFINE EZ80_TMR_INT_DISABLE LD A, 2 \ LD B, 8 \ EZ80_FN
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#DEFINE EZ80_TMR_INT_ENABLE LD A, 2 \ LD B, 9 \ EZ80_FN
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#DEFINE EZ80_TMR_IS_TICK_ISR LD A, 2 \ LD B, 10 \ EZ80_FN
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#DEFINE EZ80_DELAY_START(p,store) \
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#DEFCONT \ PUSH AF
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@@ -18,7 +18,7 @@ EZ80RTC_INIT:
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RET NZ ; IF ALREADY ACTIVE, ABORT
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CALL NEWLINE ; FORMATTING
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PRTS("EZ80 RTC: ON-CHIP $")
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PRTS("EZ80 RTC: POWERED $")
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EZ80_RTC_INIT()
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JR Z, RTC_POWERED
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81
Source/HBIOS/ez80systmr.asm
Normal file
81
Source/HBIOS/ez80systmr.asm
Normal file
@@ -0,0 +1,81 @@
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;
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;==================================================================================================
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; EZ80 50/60HZ TIMER TICK DRIVER
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;==================================================================================================
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;
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; Configuration options:
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; EZ80TIMER:
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; 0 -> No timer tick interrupts MARSHALLED to HBIOS.
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; HBIOS System calls SYS_GETTIMER, SYS_GETSECS, SYS_SETTIMER, SYS_SETSECS are implemented here and DELEGATED to eZ80 firmware functions
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; 1 -> Timer tick interrupts MARSHALLED to HBIOS.
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; HBIOS System calls SYS_GETTIMER, SYS_GETSECS, SYS_SETTIMER, SYS_SETSECS are implemented within HBIOS
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;
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#IF (EZ80TIMER == EZ80TMR_INT)
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EZ80_TMR_INIT:
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CALL NEWLINE ; FORMATTING
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PRTS("EZ80 TIMER: INTERRUPTS ENABLED$")
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LD HL,EZ80_TMR_INT ; GET INT VECTOR
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CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
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EZ80_TMR_INT_ENABLE() ; INSTALL TIMER HOOK
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RET
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EZ80_TMR_INT:
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EZ80_TMR_IS_TICK_ISR()
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RET Z ; NOT A EZ80 TIMER TICK
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CALL HB_TIMINT ; RETURN NZ - HANDLED
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OR $FF
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RET
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#ELSE
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EZ80_TMR_INIT:
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CALL NEWLINE ; FORMATTING
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PRTS("EZ80 TIMER: FIRMWARE$")
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RET
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; -----------------------------------------------
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; Implementation of HBIOS SYS TIMER functions to
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; delegate to eZ80 firmware functions
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; GET TIMER
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; RETURNS:
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; DE:HL: TIMER VALUE (32 BIT)
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;
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SYS_GETTIMER:
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EZ80_TMR_GET_TICKS()
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RET
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;
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; GET SECONDS
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; RETURNS:
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; DE:HL: SECONDS VALUE (32 BIT)
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; C: NUM TICKS WITHIN CURRENT SECOND
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;
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SYS_GETSECS:
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EZ80_TMR_GET_SECONDS()
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EZ80_UTIL_HL_TO_EHL() ; E:HL{15:0} <- HL{23:0}
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LD D, 0
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RET
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;
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; SET TIMER
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; ON ENTRY:
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; DE:HL: TIMER VALUE (32 BIT)
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;
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SYS_SETTIMER:
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EZ80_UTIL_EHL_TO_HL() ; HL{23:0} <- E:HL{15:0}
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EZ80_TMR_SET_TICKS()
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RET
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;
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; SET SECS
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; ON ENTRY:
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; DE:HL: SECONDS VALUE (32 BIT)
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;
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SYS_SETSECS:
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EZ80_UTIL_EHL_TO_HL() ; HL{23:0} <- E:HL{15:0}
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EZ80_TMR_SET_SECONDS()
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RET
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#ENDIF
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@@ -44,6 +44,9 @@ EZUART_PREINIT:
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RET
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EZUART_INIT:
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CALL NEWLINE ; FORMATTING
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PRTS("EZ80 UART: UART0$")
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XOR A
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RET
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;
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@@ -2135,86 +2135,6 @@ HB_CLRIVT_Z:
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;
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LD HL,0 ; L = 0 MEANS Z80
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;
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#IF (CPUFAM == CPU_EZ80)
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; PROVIDE THE EZ80 FIRMWARE WITH PLATFORM CONFIGUATIONS
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LD C, 1 ; RomWBW'S ASSIGNED CODE
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LD D, RMJ
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LD E, RMN
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LD H, RUP
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LD L, RTP
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EZ80_UTIL_VER_EXCH()
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; TODO CHECK RETURNED VERSION AND WARN IF NOT GOOD
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; EXPECT A VERSION NUMBER > 0.1.0.0
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LD C, MEMMGR
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LD HL, ROMSIZE
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LD DE, RAMSIZE
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EZ80_UTIL_BNK_HLP() ; INSTAL HIGH PERFORMANCE BANK SWITCHER
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; TODO CHECK RESULT AND USE STANDARD BANK SWITCHER IF NZ RETURNED
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; OTHERWISE USE RST.L %18 FOR BANK SWITCH HELPER
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EZ80_UTIL_GET_CPU_FQ()
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LD A, E
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LD (CB_CPUMHZ), A
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LD (CB_CPUKHZ), HL
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LD (HB_CPUOSC), HL
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#IF (EZ80_ASSIGN == 1)
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LD H, EZ80_MEM_CYCLES
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LD L, EZ80_IO_CYCLES
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EZ80_UTIL_SET_BUSTM()
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#ELSE
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LD HL, EZ80_MEM_FREQ
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LD DE, EZ80_IO_FREQ
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EZ80_UTIL_SET_BUSFQ() ; H -> CS3 CYCLES, L -> CS2 CYCLES
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#ENDIF
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LD A, H
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LD (EZ80_PLT_C3CYL), A
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LD A, L
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LD (EZ80_PLT_C2CYL), A
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LD C, TICKFREQ
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EZ80_TMR_SET_FREQTICK
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LD HL, 5 ; HB_CPUTYPE = 5 FOR eZ80
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JR PLT_DESCR_END
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PLT_DESCR:
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EZ80_PLT_EZ80VER:
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.DB RMJ
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.DB RMN
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.DB RUP
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.DB RTP
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EZ80_PLT_CPUOSC:
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.DW CPUOSC & $FFFF
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.DW CPUOSC >> 16
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EZ80_PLT_CPUMHZ:
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.DB PLATFORM
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EZ80_PLT_CPUKHZ:
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.DB MEMMGR
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.DB RAMSIZE & $FF
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EZ80_PLT_CHIP_ID:
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.DB RAMSIZE >> 8
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EZ80_PLT_RESVRD:
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.DB ROMSIZE & $FF
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.DB ROMSIZE >> 8
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.DB 0 ; RESERVED
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.DB 0 ; RESERVED
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EZ80_PLT_C3CYL:
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.DB EZ80_MEM_CYCLES
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EZ80_PLT_C2CYL:
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.DB EZ80_IO_CYCLES
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PLT_DESCR_END:
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#ENDIF
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;
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#IF (CPUFAM == CPU_Z180)
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;
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; TEST FOR ORIGINAL Z180 USING MLT
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@@ -2265,6 +2185,10 @@ HB_CPU1:
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; SOME DRIVERS NEED TO BE CALLED AS EARLY AS WE CAN ONE AN OPERATING
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; ENVIRONMENT IS ESTABLISHED.
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;
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#IF (CPUFAM == CPU_EZ80)
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; THIS WILL RE-ASSIGN HB_CPUTYPE
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CALL EZ80_PREINIT
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#ENDIF
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#IF (SN76489ENABLE)
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; SN76489 CHIP GENERATES UGLY NOISE AFTER HARDWARE RESET.
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; WE CALL THIS DRIVER'S PREINIT ASAP TO SHUT OFF THE NOISE.
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@@ -3004,10 +2928,7 @@ HB_Z280BUS1:
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; DISPLAY MEMORY TIMINGS
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;
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#IF (CPUFAM == CPU_EZ80)
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LD A,(EZ80_PLT_C3CYL)
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CALL PRTDECB
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CALL PRTSTRD
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.TEXT " MEM B/C, $"
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CALL EZ80_RPT_TIMINGS
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#ELSE
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#IF (CPUFAM == CPU_Z280)
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@@ -3033,11 +2954,7 @@ HB_Z280BUS1:
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; DISPLAY I/O TIMINGS
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;
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#IF (CPUFAM == CPU_EZ80)
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LD A,(EZ80_PLT_C2CYL)
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CALL PRTDECB
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CALL PRTSTRD
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.TEXT " I/O B/C$"
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; ALREADY REPORTED BY DRIVER
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#ELSE
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LD A,1
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#IF (CPUFAM == CPU_Z180)
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@@ -3848,6 +3765,10 @@ HB_INITTBL:
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#IF (EZ80RTCENABLE)
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.DW EZ80RTC_INIT
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#ENDIF
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#IF (CPUFAM == CPU_EZ80)
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; INITALISE ONE OF THE SUPPORTED SYSTEM TIMER TICKS DRIVERS
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.DW EZ80_TMR_INIT
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#ENDIF
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#IF (VDUENABLE)
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.DW VDU_INIT
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#ENDIF
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@@ -5119,16 +5040,16 @@ SYS_GETFN:
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POP DE ; ... TO DE
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RET ; AF STILL HAS RESULT OF CALC
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;
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#IF ((CPUFAM == CPU_EZ80) & (EZ80TIMER == EZ80TMR_FIRM))
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; IMPLEMENTED IN EZ80DRV.ASM
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;
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#ELSE
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;
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; GET TIMER
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; RETURNS:
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; DE:HL: TIMER VALUE (32 BIT)
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;
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SYS_GETTIMER:
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#IF (CPUFAM == CPU_EZ80)
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EZ80_TMR_GET_TICKS()
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RET
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#ELSE
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LD HL,HB_TICKS
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HB_DI
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CALL LD32
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@@ -5137,7 +5058,11 @@ SYS_GETTIMER:
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XOR A
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RET
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#ENDIF
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;
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#IF ((CPUFAM == CPU_EZ80) & (EZ80TIMER == EZ80TMR_FIRM))
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; IMPLEMENTED IN EZ80DRV.ASM
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;
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#ELSE
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;
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||||
; GET SECONDS
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||||
; RETURNS:
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||||
@@ -5145,14 +5070,6 @@ SYS_GETTIMER:
|
||||
; C: NUM TICKS WITHIN CURRENT SECOND
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||||
;
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SYS_GETSECS:
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#IF (CPUFAM == CPU_EZ80)
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EZ80_TMR_GET_SECONDS()
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||||
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EZ80_UTIL_HL_TO_EHL() ; E:HL{15:0} <- HL{23:0}
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LD D, 0
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||||
RET
|
||||
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||||
#ELSE
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||||
LD HL,HB_SECS
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||||
HB_DI
|
||||
CALL LD32
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||||
@@ -5366,16 +5283,16 @@ SYS_SETBOOTINFO:
|
||||
XOR A
|
||||
RET
|
||||
;
|
||||
#IF ((CPUFAM == CPU_EZ80) & (EZ80TIMER == EZ80TMR_FIRM))
|
||||
; IMPLEMENTED IN EZ80DRV.ASM
|
||||
;
|
||||
#ELSE
|
||||
;
|
||||
; SET TIMER
|
||||
; ON ENTRY:
|
||||
; DE:HL: TIMER VALUE (32 BIT)
|
||||
;
|
||||
SYS_SETTIMER:
|
||||
#IF (CPUFAM == CPU_EZ80)
|
||||
EZ80_UTIL_EHL_TO_HL() ; HL{23:0} <- E:HL{15:0}
|
||||
EZ80_TMR_SET_TICKS()
|
||||
RET
|
||||
#ELSE
|
||||
LD BC,HB_TICKS
|
||||
HB_DI
|
||||
CALL ST32
|
||||
@@ -5383,18 +5300,16 @@ SYS_SETTIMER:
|
||||
XOR A
|
||||
RET
|
||||
#ENDIF
|
||||
#IF ((CPUFAM == CPU_EZ80) & (EZ80TIMER == EZ80TMR_FIRM))
|
||||
; IMPLEMENTED IN EZ80DRV.ASM
|
||||
;
|
||||
#ELSE
|
||||
;
|
||||
; SET SECS
|
||||
; ON ENTRY:
|
||||
; DE:HL: SECONDS VALUE (32 BIT)
|
||||
;
|
||||
SYS_SETSECS:
|
||||
#IF (CPUFAM == CPU_EZ80)
|
||||
EZ80_UTIL_EHL_TO_HL() ; HL{23:0} <- E:HL{15:0}
|
||||
|
||||
EZ80_TMR_SET_SECONDS()
|
||||
RET
|
||||
#ELSE
|
||||
LD BC,HB_SECS
|
||||
HB_DI
|
||||
CALL ST32
|
||||
@@ -8152,14 +8067,7 @@ SIZ_RP5RTC .EQU $ - ORG_RP5RTC
|
||||
MEMECHO SIZ_RP5RTC
|
||||
MEMECHO " bytes.\n"
|
||||
#ENDIF
|
||||
#IF (EZ80RTCENABLE)
|
||||
ORG_EZ80RTC .EQU $
|
||||
#INCLUDE "ez80rtc.asm"
|
||||
SIZ_EZ80RTC .EQU $ - ORG_EZ80RTC
|
||||
MEMECHO "EZ80RTC occupies "
|
||||
MEMECHO SIZ_EZ80RTC
|
||||
MEMECHO " bytes.\n"
|
||||
#ENDIF
|
||||
;
|
||||
#IF (ASCIENABLE)
|
||||
ORG_ASCI .EQU $
|
||||
#INCLUDE "asci.asm"
|
||||
@@ -8205,15 +8113,6 @@ SIZ_SIO .EQU $ - ORG_SIO
|
||||
MEMECHO " bytes.\n"
|
||||
#ENDIF
|
||||
;
|
||||
#IF (EZ80UARTENABLE)
|
||||
ORG_EZU .EQU $
|
||||
#INCLUDE "ez80uart.asm"
|
||||
SIZ_EZU .EQU $ - ORG_EZU
|
||||
MEMECHO "EZ80 UART occupies "
|
||||
MEMECHO SIZ_EZU
|
||||
MEMECHO " bytes.\n"
|
||||
#ENDIF
|
||||
;
|
||||
#IF (ACIAENABLE)
|
||||
ORG_ACIA .EQU $
|
||||
#INCLUDE "acia.asm"
|
||||
@@ -8560,6 +8459,50 @@ SIZ_YM2612 .EQU $ - ORG_YM2612
|
||||
MEMECHO " bytes.\n"
|
||||
#ENDIF
|
||||
;
|
||||
;
|
||||
#IF (CPUFAM == CPU_EZ80)
|
||||
MEMECHO "EZ80 DRIVERS\n"
|
||||
ORG_EZ80DRVS .EQU $
|
||||
;
|
||||
ORG_EZ80CPUDRV .EQU $
|
||||
#INCLUDE "ez80cpudrv.asm"
|
||||
SIZ_EZ80CPUDRV .EQU $ - ORG_EZ80CPUDRV
|
||||
MEMECHO " EZ80 CPU DRIVER occupies "
|
||||
MEMECHO SIZ_EZ80CPUDRV
|
||||
MEMECHO " bytes.\n"
|
||||
;
|
||||
ORG_EZ80SYSTMR .EQU $
|
||||
#INCLUDE "ez80systmr.asm"
|
||||
SIZ_EZ80SYSTMR .EQU $ - ORG_EZ80SYSTMR
|
||||
MEMECHO " EZ80 SYS TIMER occupies "
|
||||
MEMECHO SIZ_EZ80SYSTMR
|
||||
MEMECHO " bytes.\n"
|
||||
;
|
||||
#IF (EZ80RTCENABLE)
|
||||
ORG_EZ80RTC .EQU $
|
||||
#INCLUDE "ez80rtc.asm"
|
||||
SIZ_EZ80RTC .EQU $ - ORG_EZ80RTC
|
||||
MEMECHO " EZ80 RTC occupies "
|
||||
MEMECHO SIZ_EZ80RTC
|
||||
MEMECHO " bytes.\n"
|
||||
#ENDIF
|
||||
;
|
||||
#IF (EZ80UARTENABLE)
|
||||
ORG_EZU .EQU $
|
||||
#INCLUDE "ez80uart.asm"
|
||||
SIZ_EZU .EQU $ - ORG_EZU
|
||||
MEMECHO " EZ80 UART occupies "
|
||||
MEMECHO SIZ_EZU
|
||||
MEMECHO " bytes.\n"
|
||||
#ENDIF
|
||||
|
||||
SIZ_EZ80DRVS .EQU $ - ORG_EZ80DRVS
|
||||
MEMECHO " Total "
|
||||
MEMECHO SIZ_EZ80DRVS
|
||||
MEMECHO " bytes.\n"
|
||||
|
||||
#ENDIF
|
||||
|
||||
MEMECHO "RTCDEF="
|
||||
MEMECHO RTCDEF
|
||||
MEMECHO "\n"
|
||||
|
||||
@@ -609,6 +609,7 @@ TM_TMS .EQU 2
|
||||
TM_SIMH .EQU 3
|
||||
TM_Z180 .EQU 4
|
||||
TM_Z280 .EQU 5
|
||||
TM_EZ80 .EQU 6
|
||||
;
|
||||
SYSECHO "SYSTEM TIMER:"
|
||||
SYSTIM .EQU TM_NONE
|
||||
@@ -647,6 +648,11 @@ SYSTIM .SET TM_Z280
|
||||
SYSECHO " Z280"
|
||||
#ENDIF
|
||||
#ENDIF
|
||||
;
|
||||
#IF ((CPUFAM == CPU_EZ80) & (EZ80TIMER == EZ80TMR_INT))
|
||||
SYSTIM .SET TM_EZ80
|
||||
SYSECHO " EZ80"
|
||||
#ENDIF
|
||||
;
|
||||
#IF SYSTIM == TM_NONE
|
||||
SYSECHO " NONE"
|
||||
|
||||
@@ -290,12 +290,10 @@ TMS_INIT1:
|
||||
#IF ((TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80))
|
||||
; ENABLE VDP INTERRUPTS ON NABU INTERRUPT CONTROLLER
|
||||
LD A,14 ; PSG R14 (PORT A DATA)
|
||||
EZ80_IO
|
||||
OUT (NABU_RSEL),A ; SELECT IT
|
||||
LD A,(NABU_CTLVAL) ; GET NABU CTL PORT SHADOW REG
|
||||
SET 4,A ; ENABLE VDP INTERRUPTS
|
||||
LD (NABU_CTLVAL),A ; UPDATE SHADOW REG
|
||||
EZ80_IO
|
||||
OUT (NABU_RDAT),A ; WRITE TO HARDWARE
|
||||
#ENDIF
|
||||
;
|
||||
|
||||
Reference in New Issue
Block a user