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Cleanup

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- Minor build script cleanup for DUART driver
This commit is contained in:
Wayne Warthen
2020-05-22 15:40:36 -07:00
parent 8399114748
commit 3eac8d164c
12 changed files with 69 additions and 38 deletions
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2
Source/HBIOS/cfg_dyno.asm
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@@ -74,6 +74,8 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)

9
Source/HBIOS/cfg_ezz80.asm
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@@ -76,6 +76,15 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

9
Source/HBIOS/cfg_master.asm
View File

@@ -98,6 +98,15 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

2
Source/HBIOS/cfg_mk4.asm
View File

@@ -81,6 +81,8 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

2
Source/HBIOS/cfg_n8.asm
View File

@@ -84,6 +84,8 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

9
Source/HBIOS/cfg_rcz180.asm
View File

@@ -77,6 +77,15 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

2
Source/HBIOS/cfg_sbc.asm
View File

@@ -77,6 +77,8 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

9
Source/HBIOS/cfg_scz180.asm
View File

@@ -72,6 +72,15 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .EQU 2 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .EQU $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .EQU DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .EQU DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .EQU $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .EQU DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .EQU DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS

4
Source/HBIOS/cfg_zeta.asm
View File

@@ -61,10 +61,12 @@ DSRTCCHG .EQU FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
BQRTCENABLE .EQU FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .EQU $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ

2
Source/HBIOS/cfg_zeta2.asm
View File

@@ -76,6 +76,8 @@ INTRTCENABLE .EQU FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
HTIMENABLE .EQU FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .EQU FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DUARTENABLE .EQU FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
;
UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS