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https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 22:33:12 -06:00
Update flashfs.asm
Implement Chip Erase
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@@ -2,7 +2,8 @@
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;==================================================================================================
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; FLASH DRIVER FOR FLASH & EEPROM PROGRAMMING
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;
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; 26 SEP 2020 - CURRENTLY ONLY IMPLEMENTS CHIP IDENTIFICATION -- PHIL SUMMERS
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; 26 SEP 2020 - CHIP IDENTIFICATION IMPLMENTED -- PHIL SUMMERS
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; - CHIP ERASE IMPLEMENTED
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;==================================================================================================
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;
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; UPPER RAM BANK IS ALWAYS AVAILABLE REGARDLESS OF MEMORY BANK SELECTION. HBX_BNKSEL AND
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@@ -59,7 +60,7 @@ FF_NXT1:LD A,(HL)
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INC HL
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INC HL
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JR FF_NXT2 ; MATCH SO EXIT
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;
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FF_NXT0:PUSH BC ; WE DIDN'T MATCH SO POINT
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LD BC,17 ; TO THE NEXT TABLE ENTRY
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ADD HL,BC
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@@ -109,6 +110,81 @@ FF_IDENT: ; FLASH ROM ID CODE ``
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;
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FF_I_SZ .EQU $-FF_IDENT
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;
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;======================================================================
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; ERASE FLASH CHIP.
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;======================================================================
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;
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FF_INIT_E:
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LD (FF_STACK),SP ; SAVE STACK
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LD HL,(FF_STACK)
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;
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LD BC,FF_E_SZ ; CODE SIZE REQUIRED
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CCF ; CREATE A RELOCATABLE
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SBC HL,BC ; CODE BUFFER IN THE
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LD SP,HL ; STACK AREA
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;
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PUSH HL ; SAVE THE EXECUTE ADDRESS
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EX DE,HL ; PUT EXECUTE / START ADDRESS IN DE
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LD HL,FF_ERASE ; COPY OUR RELOCATABLE
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LDIR ; CODE TO THE BUFFER
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;
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LD A,(HB_CURBNK) ; WE ARE STARTING IN HB_CURBNK
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LD B,A ; WHICH IS THE RAM COPY OF THE BIOS
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LD A,BID_BOOT ; BID_BOOT IS ROM BANK 0
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;
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POP HL ; CALL OUR RELOCATABLE CODE
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CALL JPHL
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;
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LD HL,(FF_STACK) ; RESTORE ORIGINAL
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LD SP,HL ; STACK POSITION
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;
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XOR A
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RET
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;
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;======================================================================
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; ERASE FLASH CHIP. THIS CODE IS RELOCATED AND EXECUTED IN THE STACK.
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; IT SWITCHES THE BOTTOM BANK TO ROM BANK 0 I.E. BOTTOM OF CHIP ADDRESS RANGE.
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; RETURNS THE BOTTOM BANK TO INITIAL STATE. ERASE COMMAND IS ISSUED TO
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; THE FLASH CHIP AND THEN TOGGLE BIT IS MONITORED FOR COMPLETION.
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;======================================================================
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;
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FF_ERASE:
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HB_DI
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CALL HBX_BNKSEL ; SELECT ROM BANK 0
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;
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LD A,$AA ; SET CHIP ERASE
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LD ($5555),A
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;
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LD A,$55
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LD ($2AAA),A
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;
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LD A,$80
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LD ($5555),A
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;
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LD A,$AA
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LD ($5555),A
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;
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LD A,$55
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LD ($2AAA),A
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;
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LD A,$10
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LD ($5555),A
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;
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LD HL,$5555 ; WAIT FOR TOGGLE
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FF_WAIT:LD A,(HL) ; BIT CHANGE
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CP (HL)
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JR NZ,FF_WAIT
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LD A,(HL)
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LD A,(HL)
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;
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LD A,B ; RETURN TO ORIGINAL BANK
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CALL HBX_BNKSEL ; WHICH IS OUR RAM BIOS COPY
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HB_EI
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;
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RET
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;
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FF_E_SZ .EQU $-FF_ERASE
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;
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; FLASH STYLE
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;
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ST_NORMAL .EQU 0
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