mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 22:13:13 -06:00
Cleanups and CPUSPD App
- Added very preliminary CPUSPD app which works only on MBC and SBC - HBIOS initialization code cleanup - Prep work on RAM size detection
This commit is contained in:
@@ -22,6 +22,7 @@ pushd rzsz && call Build || exit /b & popd
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pushd vdctest && call Build || exit /b & popd
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pushd kbdtest && call Build || exit /b & popd
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pushd ps2info && call Build || exit /b & popd
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pushd cpuspd && call Build || exit /b & popd
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goto :eof
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@@ -17,3 +17,4 @@ pushd rzsz && call Clean || exit /b 1 & popd
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pushd vdctest && call Clean || exit /b 1 & popd
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pushd kbdtest && call Clean || exit /b 1 & popd
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pushd ps2info && call Clean || exit /b 1 & popd
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pushd cpuspd && call Clean || exit /b 1 & popd
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@@ -1,5 +1,5 @@
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OBJECTS =
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SUBDIRS = DMAmon I2C inttest ppidetst ramtest tstdskng rzsz vdctest kbdtest ps2info
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SUBDIRS = DMAmon I2C inttest ppidetst ramtest tstdskng rzsz vdctest kbdtest ps2info cpuspd
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DEST = ../../../Binary/Apps/Test
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TOOLS =../../../Tools
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10
Source/Apps/Test/cpuspd/Build.cmd
Normal file
10
Source/Apps/Test/cpuspd/Build.cmd
Normal file
@@ -0,0 +1,10 @@
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@echo off
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setlocal
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set TOOLS=../../../../Tools
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set PATH=%TOOLS%\tasm32;%PATH%
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set TASMTABS=%TOOLS%\tasm32
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tasm -t180 -g3 -fFF cpuspd.asm cpuspd.com cpuspd.lst || exit /b
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copy /Y cpuspd.com ..\..\..\..\Binary\Apps\Test\ || exit /b
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6
Source/Apps/Test/cpuspd/Clean.cmd
Normal file
6
Source/Apps/Test/cpuspd/Clean.cmd
Normal file
@@ -0,0 +1,6 @@
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@echo off
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setlocal
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if exist *.com del *.com
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if exist *.lst del *.lst
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if exist *.bin del *.bin
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7
Source/Apps/Test/cpuspd/Makefile
Normal file
7
Source/Apps/Test/cpuspd/Makefile
Normal file
@@ -0,0 +1,7 @@
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OBJECTS = cpuspd.com
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DEST = ../../../../Binary/Apps/Test
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TOOLS =../../../../Tools
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USETASM=1
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include $(TOOLS)/Makefile.inc
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392
Source/Apps/Test/cpuspd/cpuspd.asm
Normal file
392
Source/Apps/Test/cpuspd/cpuspd.asm
Normal file
@@ -0,0 +1,392 @@
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;
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;=======================================================================
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; HBIOS CPU Speed Selection Tool
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;=======================================================================
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;
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; Simple utility that sets CPU speed on RomWBW systems that support
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; software speed selection.
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;
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;=======================================================================
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;
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#include "../../../HBIOS/hbios.inc"
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;
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cpumhz .equ 8 ; for time delay calculations (not critical)
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;
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; General operational equates (should not requre adjustment)
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;
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stksiz .equ $40 ; Working stack size
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;
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rtc_port .equ $70 ; RTC latch port adr
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;
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restart .equ $0000 ; CP/M restart vector
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bdos .equ $0005 ; BDOS invocation vector
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;
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; primary hardware platforms
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;
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plt_sbc .equ 1 ; SBC ECB Z80 SBC
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plt_zeta .equ 2 ; ZETA Z80 SBC
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plt_zeta2 .equ 3 ; ZETA Z80 V2 SBC
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plt_n8 .equ 4 ; N8 (HOME COMPUTER) Z180 SBC
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plt_mk4 .equ 5 ; MARK IV
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plt_una .equ 6 ; UNA BIOS
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plt_rcz80 .equ 7 ; RC2014 W/ Z80
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plt_rcz180 .equ 8 ; RC2014 W/ Z180
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plt_ezz80 .equ 9 ; EASY Z80
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plt_scz180 .equ 10 ; SCZ180
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plt_dyno .equ 11 ; DYNO MICRO-ATX MOTHERBOARD
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plt_rcz280 .equ 12 ; RC2014 W/ Z280
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plt_mbc .equ 13 ; MULTI BOARD COMPUTER
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;
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;=======================================================================
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;
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.org $100 ; standard CP/M executable
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;
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;
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; setup stack (save old value)
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ld (stksav),sp ; save stack
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ld sp,stack ; set new stack
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;
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call crlf
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ld de,str_banner ; banner
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call prtstr
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;
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call main ; do the real work
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;
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exit:
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; clean up and return to command processor
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call crlf ; formatting
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ld sp,(stksav) ; restore stack
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jp restart ; return to CP/M via restart
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;
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;
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;=======================================================================
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; Main Program
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;=======================================================================
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;
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main:
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;
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; Get HBIOS platform ID
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;
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;
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; Get platform id from RomWBW HBIOS
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ld b,BF_SYSVER ; HBIOS VER function 0xF1
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ld c,0 ; Required reserved value
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rst 08 ; Do it, L := Platform ID
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ld a,l ; Move to A
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;
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cp plt_sbc
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jr set_spd
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cp plt_mbc
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jr set_spd
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jp err_not_sup ; Platform not supported
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;
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set_spd:
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; Use first char of FCB for speed selection
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ld a,($5D)
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cp ' '
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jr z,show_spd
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and $5F ; make upper case
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cp 'F' ; fast
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jr z,set_fast
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cp 'H' ; high
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jr z,set_fast
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cp 'S' ; slow
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jr z,set_slow
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cp 'L' ; low
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jr z,set_slow
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jr usage
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;
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set_slow:
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ld a,(HB_RTCVAL)
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and ~%00001000
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jr new_spd
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;
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set_fast:
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ld a,(HB_RTCVAL)
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or %00001000
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jr new_spd
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;
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new_spd:
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ld (HB_RTCVAL),a
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out (rtc_port),a
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call show_spd
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xor a
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ret
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;
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show_spd:
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ld a,(HB_RTCVAL)
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and %00001000
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jr z,show_spd1
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ld de,str_fast
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jr show_spd2
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show_spd1:
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ld de,str_slow
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show_spd2:
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call crlf2
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call prtstr
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ret
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;
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usage:
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call crlf2
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ld de,str_usage
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call prtstr
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or $FF
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ret
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;
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; Error Handlers
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;
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err_not_sup:
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ld de,str_err_not_sup
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jr err_ret
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;
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err_ret:
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call crlf2
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call prtstr
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or $FF ; signal error
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ret
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;
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;=======================================================================
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; Utility Routines
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;=======================================================================
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;
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;
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; Print character in A without destroying any registers
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;
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prtchr:
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push af
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push bc ; save registers
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push de
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push hl
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ld e,a ; character to print in E
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ld c,$02 ; BDOS function to output a character
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call bdos ; do it
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pop hl ; restore registers
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pop de
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pop bc
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pop af
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ret
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;
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prtdot:
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;
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; shortcut to print a dot preserving all regs
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push af ; save af
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ld a,'.' ; load dot char
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call prtchr ; print it
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pop af ; restore af
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ret ; done
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;
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; Print a zero terminated string at (de) without destroying any registers
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;
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prtstr:
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push af
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push de
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;
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prtstr1:
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ld a,(de) ; get next char
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or a
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jr z,prtstr2
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call prtchr
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inc de
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jr prtstr1
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;
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prtstr2:
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pop de ; restore registers
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pop af
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ret
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;
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; Print a hex value prefix "0x"
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;
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prthexpre:
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push af
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ld a,'0'
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call prtchr
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ld a,'x'
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call prtchr
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pop af
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ret
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;
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; Print the value in A in hex without destroying any registers
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;
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prthex:
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call prthexpre
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prthex1:
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push af ; save AF
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push de ; save DE
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call hexascii ; convert value in A to hex chars in DE
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ld a,d ; get the high order hex char
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call prtchr ; print it
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ld a,e ; get the low order hex char
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call prtchr ; print it
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pop de ; restore DE
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pop af ; restore AF
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ret ; done
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;
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; print the hex word value in hl
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;
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prthexword:
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call prthexpre
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prthexword1:
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push af
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ld a,h
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call prthex1
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ld a,l
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call prthex1
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pop af
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ret
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;
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; print the hex dword value in de:hl
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;
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prthex32:
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call prthexpre
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push bc
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push de
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pop bc
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call prthexword1
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push hl
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pop bc
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call prthexword1
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pop bc
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ret
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;
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; Convert binary value in A to ascii hex characters in DE
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;
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hexascii:
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ld d,a ; save A in D
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call hexconv ; convert low nibble of A to hex
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ld e,a ; save it in E
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ld a,d ; get original value back
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rlca ; rotate high order nibble to low bits
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rlca
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rlca
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rlca
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call hexconv ; convert nibble
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ld d,a ; save it in D
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ret ; done
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;
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; Convert low nibble of A to ascii hex
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;
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hexconv:
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and $0F ; low nibble only
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add a,$90
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daa
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adc a,$40
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daa
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ret
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;
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; Print value of A or HL in decimal with leading zero suppression
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; Use prtdecb for A or prtdecw for HL
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;
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prtdecb:
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push hl
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ld h,0
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ld l,a
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call prtdecw ; print it
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pop hl
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ret
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;
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prtdecw:
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push af
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push bc
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push de
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push hl
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call prtdec0
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pop hl
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pop de
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pop bc
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pop af
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ret
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;
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prtdec0:
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ld e,'0'
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ld bc,-10000
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call prtdec1
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ld bc,-1000
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call prtdec1
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ld bc,-100
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call prtdec1
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ld c,-10
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call prtdec1
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ld e,0
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ld c,-1
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prtdec1:
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ld a,'0' - 1
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prtdec2:
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inc a
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add hl,bc
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jr c,prtdec2
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sbc hl,bc
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cp e
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ret z
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ld e,0
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call prtchr
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ret
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;
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; Start a new line
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;
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crlf2:
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call crlf ; two of them
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crlf:
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push af ; preserve AF
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ld a,13 ; <CR>
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call prtchr ; print it
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ld a,10 ; <LF>
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call prtchr ; print it
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pop af ; restore AF
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ret
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;
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; Add hl,a
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;
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; A register is destroyed!
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;
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addhla:
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add a,l
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ld l,a
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ret nc
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inc h
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ret
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;
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; Delay ~10ms
|
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;
|
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delay:
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push af
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push de
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ld de,625 ; 10000us/16us
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delay0:
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ld a,(cpuscl)
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delay1:
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dec a
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jr nz,delay1
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dec de
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ld a,d
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or e
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jp nz,delay0
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pop de
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pop af
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ret
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;
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;
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;
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||||
;=======================================================================
|
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; Constants
|
||||
;=======================================================================
|
||||
;
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str_banner .db "RomWBW CPU Speed Selector v0.1, 25-Jan-2022",0
|
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str_slow .db " CPU speed is SLOW",0
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str_fast .db " CPU speed is FAST",0
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str_err_not_sup .db " ERROR: Platform not supported!",0
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str_usage .db " Usage: CPUSPD [F|S]",0
|
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;
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||||
;=======================================================================
|
||||
; Working data
|
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;=======================================================================
|
||||
;
|
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stksav .dw 0 ; stack pointer saved at start
|
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.fill stksiz,0 ; stack
|
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stack .equ $ ; stack top
|
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;
|
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cpuscl .db cpumhz - 2
|
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;
|
||||
;=======================================================================
|
||||
;
|
||||
.end
|
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@@ -173,6 +173,7 @@ CTC_PRTCFG1:
|
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PRTS("TIM256$")
|
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#ENDIF
|
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;
|
||||
#IF (CTCDEBUG)
|
||||
PRTS(" DIVHI=$")
|
||||
LD A,CTC_DIVHI & $FF
|
||||
CALL PRTHEXBYTE
|
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@@ -181,7 +182,6 @@ CTC_PRTCFG1:
|
||||
LD A,CTC_DIVLO & $FF
|
||||
CALL PRTHEXBYTE
|
||||
;
|
||||
#IF (CTCDEBUG)
|
||||
PRTS(" PREIO=$")
|
||||
LD A,CTC_PREIO
|
||||
CALL PRTHEXBYTE
|
||||
|
||||
@@ -70,6 +70,8 @@
|
||||
;
|
||||
#DEFINE HBIOS
|
||||
;
|
||||
;;;#DEFINE TESTING
|
||||
;
|
||||
; MAKE SURE EXACTLY ONE OF ROMBOOT, APPBOOT, IMGBOOT IS DEFINED.
|
||||
;
|
||||
MODCNT .EQU 0
|
||||
@@ -170,16 +172,14 @@ MODCNT .SET MODCNT + 1
|
||||
;
|
||||
;
|
||||
;
|
||||
#IF (CTCENABLE)
|
||||
CTCA .EQU CTCBASE + 0 ; CTC: CHANNEL A REGISTER ADR
|
||||
CTCB .EQU CTCBASE + 1 ; CTC: CHANNEL B REGISTER ADR
|
||||
CTCC .EQU CTCBASE + 2 ; CTC: CHANNEL C REGISTER ADR
|
||||
CTCD .EQU CTCBASE + 3 ; CTC: CHANNEL D REGISTER ADR
|
||||
#ENDIF
|
||||
;
|
||||
; THIS EQUATE IS UPDATED BY DRIVER INCLUDES THAT SHARE THE RTC LATCH.
|
||||
; AS DRIVER IS INCLUDED, IT WILL USE .SET TO SET ANY BITS THEY OWN
|
||||
; AND WANT TO SET AS DEFAULT.
|
||||
; THE RTCDEF EQUATE IS INITIALIZED HERE AND UPDATED BY DRIVER INCLUDES
|
||||
; THAT SHARE THE RTC LATCH. AS EACH DRIVER FILE IS INCLUDED, IT CAN
|
||||
; USE .SET TO SET ANY BITS THEY OWN WITHIN THE RTC LATCH BYTE.
|
||||
; SINCE RTCDEF IS CHANGED AFTER IT NEEDS TO BE USED BY THE CODE, IT
|
||||
; CANNOT BE USED DIRECTLY TO SET THE LATCH. INSTEAD, THE FINAL VALUE
|
||||
; OF RTCDEF IS USED TO INITIALIZE A STORAGE BYTE CALLED RTCDEFVAL AT
|
||||
; THE END OF HBIOS.ASM. SO (RTCDEFVAL) CAN BE USED ANYWHERE IN
|
||||
; HBIOS.ASM TO ACCESS THE FINAL RTCDEF VALUE.
|
||||
;
|
||||
RTCDEF .EQU 0 ; ALLOWS DRIVERS TO SET BITS
|
||||
;
|
||||
@@ -188,19 +188,19 @@ RTCDEF .SET RTCDEF | %00000001 ; SC128 I2C SCL BIT
|
||||
#ENDIF
|
||||
;
|
||||
#IF ((CPUSPDCAP==SPD_HILO) & (PLATFORM==PLT_MBC))
|
||||
#IF (CPUSPDDEF==SPD_HIGH)
|
||||
#IF (CPUSPDDEF==SPD_HIGH)
|
||||
RTCDEF .SET RTCDEF | %00001000 ; DEFAULT SPEED HIGH
|
||||
#ELSE
|
||||
#ELSE
|
||||
RTCDEF .SET RTCDEF & ~%00001000 ; DEFAULT SPEED LOW
|
||||
#ENDIF
|
||||
#ENDIF
|
||||
#ENDIF
|
||||
;
|
||||
#IF ((CPUSPDCAP==SPD_HILO) & (PLATFORM==PLT_SBC))
|
||||
#IF (CPUSPDDEF==SPD_HIGH)
|
||||
#IF (CPUSPDDEF==SPD_HIGH)
|
||||
RTCDEF .SET RTCDEF & ~%00001000 ; DEFAULT SPEED HIGH
|
||||
#ELSE
|
||||
#ELSE
|
||||
RTCDEF .SET RTCDEF | %00001000 ; DEFAULT SPEED LOW
|
||||
#ENDIF
|
||||
#ENDIF
|
||||
#ENDIF
|
||||
;
|
||||
;
|
||||
@@ -470,6 +470,7 @@ HBX_RAM:
|
||||
RLCA ; SCALE SELECTOR TO
|
||||
RLCA ; ... GO FROM Z180 4K PAGE SIZE
|
||||
RLCA ; ... TO DESIRED 32K PAGE SIZE
|
||||
AND %11111000
|
||||
OUT0 (Z180_BBR),A ; WRITE TO BANK BASE
|
||||
LD A,N8_DEFACR | 80H ; SELECT RAM BY SETTING BIT 7
|
||||
OUT0 (N8_ACR),A ; ... IN N8 ACR REGISTER
|
||||
@@ -491,6 +492,7 @@ HBX_ROM:
|
||||
HBX_BNKSEL1:
|
||||
RLCA ; CONTINUE SHIFTING TO SCALE SELECTOR
|
||||
RLCA ; FOR Z180 4K PAGE -> DESIRED 32K PAGE
|
||||
AND %11111000
|
||||
OUT0 (Z180_BBR),A ; WRITE TO BANK BASE
|
||||
RET ; DONE
|
||||
#ENDIF
|
||||
@@ -962,7 +964,7 @@ HBX_BUF_END .EQU $
|
||||
.DB BID_USR ; HB_DSTBNK: BNKCPY DESTINATION BANK ID
|
||||
.DW 0 ; HB_CPYLEN: BNKCPY LENGTH
|
||||
.FILL 4,0 ; FILLER, RESERVED FOR FUTURE HBIOS USE
|
||||
.DB RTCDEF ; SHADOW VALUE FOR RTC LATCH PORT
|
||||
.DB 0 ; SHADOW VALUE FOR RTC LATCH PORT
|
||||
.DB $FE ; HB_LOCK: HBIOS MUTEX LOCK
|
||||
JP HBX_INVOKE ; HB_INVOKE: FIXED ADR ENTRY FOR HBX_INVOKE (ALT FOR RST 08)
|
||||
JP HBX_BNKSEL ; HB_BNKSEL: FIXED ADR ENTRY FOR HBX_BNKSEL
|
||||
@@ -1085,10 +1087,12 @@ Z280_BOOTERR .TEXT "\r\n\r\n*** Application mode boot not supported under Z280 n
|
||||
DI ; NO INTERRUPTS
|
||||
IM 1 ; INTERRUPT MODE 1
|
||||
|
||||
#IF ((PLATFORM=PLT_MBC) | (PLATFORM=PLT_SBC))
|
||||
LD A,(HB_RTCVAL) ; SET DEFAULT
|
||||
OUT (RTCIO),A ; SPEED
|
||||
#ENDIF
|
||||
;#IF ((PLATFORM=PLT_MBC) | (PLATFORM=PLT_SBC))
|
||||
; INITIALIZE RTC LATCH BYTE
|
||||
; FOR SOME PLATFORMS THIS CONTROLS HI/LO SPEED CIRCUIT
|
||||
LD A,(RTCDEFVAL) ; GET DEFAULT VALUE
|
||||
OUT (RTCIO),A ; SET IT
|
||||
;#ENDIF
|
||||
;
|
||||
#IF (DIAGENABLE)
|
||||
LD A,%00000001
|
||||
@@ -1099,13 +1103,15 @@ Z280_BOOTERR .TEXT "\r\n\r\n*** Application mode boot not supported under Z280 n
|
||||
XOR A ; LED IS INVERTED, TURN IT ON
|
||||
#ENDIF
|
||||
#IF (LEDMODE == LEDMODE_RTC)
|
||||
LD A,(HB_RTCVAL)
|
||||
OR %00000001 ; LED 0
|
||||
LD (HB_RTCVAL),A ; SAVE TO SHADOW REGISTER
|
||||
LD A,(RTCDEFVAL) ; DEFAULT LATCH VALUE
|
||||
OR %00000001 ; LED 0 ON
|
||||
#ENDIF
|
||||
OUT (LEDPORT),A
|
||||
#ENDIF
|
||||
;
|
||||
; WARNING: ALTHOUGH WE ARE INITIALIZING SP HERE, IT IS NOT YET
|
||||
; SAFE TO PUSH VALUES TO THE STACK BECAUSE SOME PLATFORMS WILL
|
||||
; NOT YET HAVE RAM MAPPED TO THE UPPER 32K YET!
|
||||
LD SP,HBX_LOC ; SETUP INITIAL STACK JUST BELOW HBIOS PROXY
|
||||
;
|
||||
#IF (CPUFAM == CPU_Z280)
|
||||
@@ -1288,25 +1294,54 @@ Z280_INITZ:
|
||||
; AT THIS POINT, RAM SHOULD BE AVAILABLE IN THE COMMON BANK
|
||||
; (TOP 32K).
|
||||
;
|
||||
DIAG(%00000011)
|
||||
; NOTIFICATION THAT WE HAVE MADE THE JUMP TO RAM BANK!
|
||||
; THE DIAG() MACRO IS NOT USED BECAUSE IT USES THE STACK AND WE DO
|
||||
; NOT WANT TO EFFECT RAM UNTIL AFTER THE BACKUP BATTERY STATUS CHECK
|
||||
; IS PERFORMED NEXT.
|
||||
;
|
||||
; CHECK BATTERY BACKUP STATUS BEFORE WE COPY PROXY TO UPPER MEMORY
|
||||
LD A,%00000011
|
||||
OUT (DIAGPORT),A
|
||||
;
|
||||
; WE USE THE TWO BYTES IMMEDIATELY BELOW THE PROXY TO STORE A COUPLE
|
||||
; VALUES TEMPORARILY BECAUSE WE MAY BE OPERATING IN ROM AT THIS POINT.
|
||||
; (HBX_LOC - 1) = BATCOND, (HBX_LOC - 2) = APPBANK
|
||||
; THERE IS NOTHING ON THE STACK AT THIS POINT SO, HERE, WE JUST RESET
|
||||
; THE STACK TO HBX_LOC - 2.
|
||||
;
|
||||
LD SP,HBX_LOC - 2
|
||||
;
|
||||
; CHECK BATTERY BACKUP STATUS BEFORE WE TOUCH RAM (UPPER MEMORY)
|
||||
;
|
||||
; IF A DS1210 POWER CONTROLLER IS INSTALLED AND BATTERY BACKUP IS NOT INSTALLED
|
||||
; OR IS LESS THAN 2V THEN THE DS1210 WILL BLOCK THE SECOND RAM ACCESS.
|
||||
; FAILURE TO COMPLETE TWO RAM ACCESSES BEFORE INSTALLING PROXY WILL RESULT
|
||||
; IN THE ROM ID BYTES NOT BEING COPIED CORRECTLY AND CP/M APPLICATIONS
|
||||
; WILL NOT START CORRECTLY WHEN THEY CHECK THE ROM ID VERSION BYTES.
|
||||
; THE BATTERY CONDITION VALUE IS TEMPORARILY STORED AT HBX_LOC - 1.
|
||||
; THE BATTERY CONDITION VALUE IS TEMPORARILY STORED AT HBX_LOC - 1
|
||||
; BECAUSE WE ARE CURRENTLY RUNNING IN ROM. AFTER WE TRANSITION HBIOS
|
||||
; TO RAM, THE VALUE IS MOVED TO IT'S REAL LCOATION AT HB_BATCOND.
|
||||
; IF THERE IS NO DS1210 IN THE SYSTEM, THE CODE BELOW DOES NO HARM.
|
||||
;
|
||||
DEC SP ; RESERVE A STACK BYTE
|
||||
LD HL,HBX_LOC - 1 ; POINT TO BYTE
|
||||
XOR A ; ZERO MEANS LOW BAT
|
||||
LD (HBX_LOC - 1),A ; WRITE IT (SHOULD ALWAYS WORK)
|
||||
LD (HL),A
|
||||
INC A ; 1 MEANS BAT OK
|
||||
LD (HBX_LOC - 1),A ; OVERWRITE IF NVC ALLOWS IT
|
||||
LD (HL),A
|
||||
;
|
||||
; IF APPBOOT, SAVE CURRENT BANKID
|
||||
; INSTALL PROXY IN UPPER MEMORY
|
||||
; THE HB_CURBNK MUST BE PRESERVED IF THIS IS AN APPBOOT.
|
||||
;
|
||||
LD A,(HB_CURBNK) ; SAVE EXISTING HB_CURBNK
|
||||
LD DE,HBX_LOC ; AS PER ABOVE
|
||||
LD HL,HBX_IMG
|
||||
LD BC,HBX_SIZ
|
||||
LDIR
|
||||
;
|
||||
#IFDEF APPBOOT
|
||||
LD (HB_CURBNK),A ; RESTORE HB_CURBNK
|
||||
#ENDIF
|
||||
;
|
||||
; SAVE CURRENT BANKID
|
||||
;
|
||||
; THIS IS NOT GOING TO WORK IF THE APP BOOT IMAGE IS LOADED
|
||||
; USING THE UNA FAT32 LOADER. SHOULD PROBABLY CHECK THAT THERE
|
||||
@@ -1314,23 +1349,101 @@ Z280_INITZ:
|
||||
; THIS USE CASE IS PROBABLY NON-EXISTENT. THE IMG BOOT IMAGE
|
||||
; SHOULD WORK FINE WITH THE UNA FAT32 LOADER.
|
||||
;
|
||||
#IFDEF APPBOOT
|
||||
LD A,(HB_CURBNK)
|
||||
DEC SP ; RESERVE A STACK BYTE
|
||||
LD (HBX_LOC - 2),A ; SAVE BANK
|
||||
PUSH AF ; ALSO ON STACK
|
||||
#ENDIF
|
||||
; THIS VALUE IS TEMPORARILY STORED AT HBX_LOC - 2
|
||||
; BECAUSE WE ARE CURRENTLY RUNNING IN ROM. AFTER WE TRANSITION HBIOS
|
||||
; TO RAM, THE VALUE IS MOVED TO IT'S REAL LCOATION AT HB_APPBNK.
|
||||
;
|
||||
; INSTALL PROXY IN UPPER MEMORY
|
||||
LD A,(HB_CURBNK) ; GET HB_CURBNK
|
||||
LD (HBX_LOC - 2),A ; ... AND SAVE TEMP FOR APPBNK
|
||||
;
|
||||
LD DE,HBX_LOC ; AS PER ABOVE
|
||||
LD HL,HBX_IMG
|
||||
LD BC,HBX_SIZ
|
||||
LDIR
|
||||
; THE RTCVAL FIELD OF THE PROXY DATA NEEDS TO BE INITIALIZED HERE
|
||||
; BECAUSE IT CANNOT BE PRE-INITIALIZED (SEE COMMENTS ABOVE WHERE
|
||||
; RTCVAL EQUATE IS DEFINED).
|
||||
;
|
||||
; THIS IS WHERE WE SHOULD PROBE FOR THE ACTUAL NUMBER OF RAM
|
||||
; BANKS AVAILABLE IN THE SYSTEM. THE PROBE CODE WOULD NEED
|
||||
LD A,(RTCDEFVAL)
|
||||
LD (HB_RTCVAL),A
|
||||
;
|
||||
#IFDEF TESTING
|
||||
;
|
||||
; THIS IS WHERE WE PROBE FOR THE ACTUAL NUMBER OF RAM
|
||||
; BANKS AVAILABLE IN THE SYSTEM. THE PROBE CODE NEEDS
|
||||
; TO BE COPIED TO AND RUN FROM THE COMMON RAM BANK.
|
||||
;
|
||||
LD DE,$F000
|
||||
LD HL,RS_IMAGE
|
||||
LD BC,RS_LEN
|
||||
LDIR
|
||||
CALL RS_START
|
||||
JP RS_IMAGE + RS_LEN
|
||||
;
|
||||
; CODE THAT IS COPIED TO $F000 TO PERFORM RAM SIZE DETECTION
|
||||
;
|
||||
RS_IMAGE:
|
||||
.ORG $F000
|
||||
RS_START:
|
||||
LD A,(HB_CURBNK) ; GET CURRENT BANK
|
||||
PUSH AF ; SAVE IT
|
||||
|
||||
LD C,0 ; RUNNING BANK COUNT
|
||||
LD IX,RS_ARY ; ORIG BYTE STORAGE ARRAY PTR
|
||||
RS_LOOP1:
|
||||
LD A,C
|
||||
ADD A,$80 ; OFFSET BY START OF RAM BANKS
|
||||
CALL HBX_BNKSEL ; SELECT THE BANK
|
||||
|
||||
LD A,($7FFF) ; GET ORIGINAL VALUE
|
||||
LD (IX),A ; SAVE IT TO RESTORE LATER
|
||||
INC IX ; BUMP IX
|
||||
|
||||
LD A,$AA ; TEST LOC WITH $AA
|
||||
LD ($7FFF),A
|
||||
LD A,($7FFF)
|
||||
CP $AA
|
||||
JR NZ,RS_DONE
|
||||
|
||||
LD A,$55 ; TEST LOC WITH $55
|
||||
LD ($7FFF),A
|
||||
LD A,($7FFF)
|
||||
CP $55
|
||||
JR NZ,RS_DONE
|
||||
|
||||
; STORE A UNIQUE VALUE
|
||||
LD A,C
|
||||
LD ($7FFF),A
|
||||
OR A ; ZERO?
|
||||
JR Z,RS_NEXT ; SKIP STORED VALUE CHECK
|
||||
|
||||
; VERIFY ALL STORED VALUES
|
||||
LD B,C ; INIT LOOP COUNTER
|
||||
LD E,0 ; INIT BANK ID
|
||||
RS_LOOP3:
|
||||
LD A,E
|
||||
ADD A,$80
|
||||
CALL HBX_BNKSEL
|
||||
LD A,($7FFF)
|
||||
CP E ; VERIFY
|
||||
JR NZ,RS_DONE ; ABORT IF MISCOMPARE
|
||||
INC E ; NEXT BANK
|
||||
DJNZ RS_LOOP3
|
||||
;
|
||||
RS_NEXT:
|
||||
INC C ; ADD 1 TO RAM BANK COUNT
|
||||
JR RS_LOOP1 ; AND LOOP TILL DONE
|
||||
;
|
||||
RS_DONE:
|
||||
LD E,C ; FINAL BANK COUNT TO E
|
||||
; RESTORE SAVED VALUES
|
||||
LD IX,RS_ARY
|
||||
LD B,C ; LOOP COUNT
|
||||
LD C,$80 ; BANK ID
|
||||
RS_LOOP2:
|
||||
LD A,C
|
||||
CALL HBX_BNKSEL
|
||||
INC C
|
||||
LD A,(IX) ; GET VALUE
|
||||
LD ($7FFF),A ; RESTORE IT
|
||||
INC IX
|
||||
DJNZ RS_LOOP2 ; ALL BANKS
|
||||
;
|
||||
; MBC RUNTIME MEMORY SIZE ADJUSTMENT
|
||||
;
|
||||
@@ -1348,21 +1461,59 @@ Z280_INITZ:
|
||||
; AND THEN POKES THE MASK INTO AN XOR INSTRUCTION IN THE MBC
|
||||
; MEMORY MANAGER.
|
||||
;
|
||||
#IF (MEMMGR == MM_MBC)
|
||||
LD HL,CB_RAMBANKS ; IN NUMBER OF RAMBANKS DETECTED FOR MBC
|
||||
#IF (MEMMGR == MM_MBC)
|
||||
;
|
||||
;LD HL,CB_RAMBANKS ; IN NUMBER OF RAMBANKS DETECTED FOR MBC
|
||||
LD A,%11101011 ; IS 4 (128KB) OR 16 (512KB) THEN
|
||||
;AND (HL) ; ZERO THE LAST BANK MASK OTHERWISE
|
||||
AND E ; ZERO THE LAST BANK MASK OTHERWISE
|
||||
JR Z,MBC_SINGLE ; CALCULATE THE LAST BANK MASK (BANKS/2)
|
||||
RRA ; 256K = %00000100, 1024K = %00010000
|
||||
MBC_SINGLE:
|
||||
LD (HBX_MBCMSK),A
|
||||
;
|
||||
#ENDIF
|
||||
;
|
||||
; RETURN TO ORIGINAL BANK
|
||||
POP AF
|
||||
CALL HBX_BNKSEL
|
||||
LD A,E ; RETURN BANK COUNT
|
||||
LD ($FFEA),A ; STASH HERE FOR A BIT
|
||||
RET
|
||||
;
|
||||
RS_ARY .EQU $
|
||||
;
|
||||
RS_LEN .EQU $ - RS_START
|
||||
.ORG RS_IMAGE + RS_LEN
|
||||
;
|
||||
#ELSE
|
||||
;
|
||||
; MBC RUNTIME MEMORY SIZE ADJUSTMENT
|
||||
;
|
||||
; THE MBC RAM BOARD CAN CONTAIN 1 OR 2 RAM CHIPS. THEY CAN BE
|
||||
; EITHER 128K OR 512K EACH. SO THE MBC RAM BOARD CAN HAVE A
|
||||
; TOTAL OF 128K, 256K, 512K, OR 1024K. THE COMMON (HIMEM) RAM
|
||||
; IS ALWAYS MAPPED TO THE LAST 32K OF THE FIRST CHIP ON THE BOARD.
|
||||
; IF THERE ARE TWO CHIPS ON THE BOARD, THIS MEANS THE COMMON
|
||||
; BANK WILL APPEAR IN THE "MIDDLE" OF THE PHYSICAL RAM BANKS.
|
||||
; ROMWBW NEEDS THE COMMON BANK TO BE AT THE LAST BANK OF PHYSICAL
|
||||
; RAM IN ORDER TO HAVE SEQUENTIAL RAM BANKS AVAILABLE FOR THE
|
||||
; RAM DISK. TO WORK AROUND THIS, WE FLIP THE HIGH BIT OF THE
|
||||
; BANK ID FOR AN MBC SYSTEM IFF IT HAS 2 CHIPS (256K OR 1024K).
|
||||
; THE CODE BELOW GENERATES THE CORRECT MASK TO ACCOMPLISH THIS
|
||||
; AND THEN POKES THE MASK INTO AN XOR INSTRUCTION IN THE MBC
|
||||
; MEMORY MANAGER.
|
||||
;
|
||||
#IF (MEMMGR == MM_MBC)
|
||||
LD HL,CB_RAMBANKS ; IF NUMBER OF RAMBANKS DETECTED FOR MBC
|
||||
LD A,%11101011 ; IS 4 (128KB) OR 16 (512KB) THEN
|
||||
AND (HL) ; ZERO THE LAST BANK MASK OTHERWISE
|
||||
JR Z,MBC_SINGLE ; CALCULATE THE LAST BANK MASK (BANKS/2)
|
||||
RRA ; 256K = %00000100, 1024K = %00010000
|
||||
MBC_SINGLE:
|
||||
LD (HBX_MBCMSK),A
|
||||
#ENDIF
|
||||
#ENDIF
|
||||
;
|
||||
; IF APPBOOT, RESTORE CURRENT BANK ID
|
||||
;
|
||||
#IFDEF APPBOOT
|
||||
POP AF
|
||||
LD (HB_CURBNK),A
|
||||
#ENDIF
|
||||
;
|
||||
; IF ALREADY EXECUTING IN RAM, BYPASS RAM BANK INSTALLATION
|
||||
@@ -1382,7 +1533,87 @@ MBC_SINGLE:
|
||||
LD BC,$8000
|
||||
CALL HBX_BNKCPY
|
||||
;
|
||||
#IF (1)
|
||||
; TRANSITION TO HBIOS IN RAM BANK
|
||||
;
|
||||
#IF (MEMMGR == MM_Z280)
|
||||
LD A,BID_BIOS
|
||||
LD B,$10 ; FIRST SYSTEM PDR
|
||||
CALL Z280_BNKSEL
|
||||
JR HB_START1
|
||||
#ELSE
|
||||
LD A,BID_BIOS ; BIOS BANK ID
|
||||
LD IX,HB_START1 ; EXECUTION RESUMES HERE
|
||||
CALL HBX_BNKCALL ; CONTINUE IN RAM BANK, DO NOT RETURN
|
||||
HALT ; WE SHOULD NOT COME BACK HERE!
|
||||
#ENDIF
|
||||
;
|
||||
HB_RAMFLAG .DB FALSE ; INITIALLY FALSE, SET TO TRUE BELOW AFTER RAM TRANSITION
|
||||
;
|
||||
; EXECUTION RESUMES HERE AFTER SWITCH TO RAM BANK
|
||||
;
|
||||
HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
|
||||
;
|
||||
; WE RESET THE STACK HERE BECAUSE WE ARE NOT GOING TO RETURN
|
||||
; FROM THE BNKCALL. REMEMBER THAT WE STORED A COUPLE BYTES
|
||||
; RIGHT BELOW HBX_LOC, SO THE STACK IS SET TO START JUST BELOW
|
||||
; THAT.
|
||||
LD SP,HBX_LOC - 2 ; RESET STACK
|
||||
;
|
||||
; NOTIFY THAT WE MADE THE TRANSTION!
|
||||
DIAG(%00000111)
|
||||
LED(%00000010)
|
||||
;
|
||||
; SET THE IN-RAM FLAG
|
||||
LD A,TRUE ; ACCUM := TRUE
|
||||
LD (HB_RAMFLAG),A ; SET RAMFLAG
|
||||
;
|
||||
; RECOVER DATA PASSED PRIOR TO RAM TRANSITION
|
||||
; (HBX_LOC - 1) = BATCOND, (HBX_LOC - 2) = APPBNK
|
||||
POP HL ; POP 2 BYTES
|
||||
LD A,H ; GET FIRST BYTE PUSHED
|
||||
LD (HB_BATCOND),A ; ... AND SAVE AS BAT COND
|
||||
;
|
||||
#IFDEF APPBOOT
|
||||
LD A,L ; GET SECOND BYTE PUSHED
|
||||
LD (HB_APPBNK),A ; ... AND SAVE AS APPBNK
|
||||
#ENDIF
|
||||
;
|
||||
#IF (MEMMGR == MM_Z280)
|
||||
; NOW POINT TO RAM COPY OF Z280 INT/TRAP TABLE
|
||||
; HL IS TOP 16 BITS OF PHYSICAL ADDRESS OF IVT
|
||||
; IVT *MUST* BE ON A 4K BOUNDARY
|
||||
LD C,Z280_VPR
|
||||
LD HL,0 + ((((BID_BIOS & $7F) * 8) + (1 << (RAMLOC - 12))) << 4) + (Z280_IVT >> 8)
|
||||
LDCTL (C),HL
|
||||
#ENDIF
|
||||
;
|
||||
; IF APPBOOT, WE NEED TO FIX UP A FEW THINGS IN PAGE ZERO
|
||||
;
|
||||
#IFDEF APPBOOT
|
||||
;
|
||||
; MAKE SURE RST 08 VECTOR IS RIGHT
|
||||
LD A,$C3
|
||||
LD ($0008),A
|
||||
LD HL,HB_INVOKE
|
||||
LD ($0009),HL
|
||||
;
|
||||
; MAKE SURE IM1 INT VECTOR IS RIGHT
|
||||
#IF (INTMODE == 1)
|
||||
; JP INT_IM1 IF INTERRUPT MODE ACTIVE
|
||||
LD A,$C3
|
||||
LD ($0038),A
|
||||
LD HL,INT_IM1
|
||||
LD ($0039),HL
|
||||
#ELSE
|
||||
; RETI ($ED, $4D) IF NON-INTERRUPT MODE
|
||||
LD HL,$0038
|
||||
LD (HL),$ED
|
||||
INC HL
|
||||
LD (HL),$4D
|
||||
#ENDIF
|
||||
#ENDIF
|
||||
;
|
||||
#IF FALSE
|
||||
;
|
||||
; POPULATE THE CRITICAL RAM BANK NUMBERS.
|
||||
;
|
||||
@@ -1415,75 +1646,6 @@ CB_IDS: LD (HL),A ; POPULATE CB_BIDCOM
|
||||
;
|
||||
#ENDIF
|
||||
;
|
||||
; TRANSITION TO HBIOS IN RAM BANK
|
||||
;
|
||||
#IF (MEMMGR == MM_Z280)
|
||||
LD A,BID_BIOS
|
||||
LD B,$10 ; FIRST SYSTEM PDR
|
||||
CALL Z280_BNKSEL
|
||||
JR HB_START1
|
||||
#ELSE
|
||||
LD A,BID_BIOS ; BIOS BANK ID
|
||||
LD IX,HB_START1 ; EXECUTION RESUMES HERE
|
||||
CALL HBX_BNKCALL ; CONTINUE IN RAM BANK, DO NOT RETURN
|
||||
HALT ; WE SHOULD NOT COME BACK HERE!
|
||||
#ENDIF
|
||||
;
|
||||
HB_RAMFLAG .DB FALSE ; INITIALLY FALSE, SET TO TRUE BELOW AFTER RAM TRANSITION
|
||||
;
|
||||
; EXECUTION RESUMES HERE AFTER SWITCH TO RAM BANK
|
||||
;
|
||||
HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
|
||||
;
|
||||
DIAG(%00000111)
|
||||
LED(%00000010)
|
||||
;
|
||||
LD A,(HBX_LOC - 1) ; RECALL BATTERY STATE AND SAVE
|
||||
LD (HB_BATCOND),A ; FOR FUTURE REFERENCE
|
||||
;
|
||||
LD SP,HBX_LOC ; RESET STACK SINCE WE DO NOT RETURN
|
||||
LD A,TRUE ; ACCUM := TRUE
|
||||
LD (HB_RAMFLAG),A ; SET RAMFLAG
|
||||
;
|
||||
#IF (MEMMGR == MM_Z280)
|
||||
; NOW POINT TO RAM COPY OF Z280 INT/TRAP TABLE
|
||||
; HL IS TOP 16 BITS OF PHYSICAL ADDRESS OF IVT
|
||||
; IVT *MUST* BE ON A 4K BOUNDARY
|
||||
LD C,Z280_VPR
|
||||
LD HL,0 + ((((BID_BIOS & $7F) * 8) + (1 << (RAMLOC - 12))) << 4) + (Z280_IVT >> 8)
|
||||
LDCTL (C),HL
|
||||
#ENDIF
|
||||
;
|
||||
; IF APPBOOT, WE NEED TO FIX UP A FEW THINGS IN PAGE ZERO
|
||||
;
|
||||
#IFDEF APPBOOT
|
||||
;
|
||||
; GET AND SAVE APP BOOT BANK ID
|
||||
LD A,(HBX_LOC - 2)
|
||||
LD (HB_APPBNK),A
|
||||
;
|
||||
; MAKE SURE RST 08 VECTOR IS RIGHT
|
||||
LD A,$C3
|
||||
LD ($0008),A
|
||||
LD HL,HB_INVOKE
|
||||
LD ($0009),HL
|
||||
;
|
||||
; MAKE SURE IM1 INT VECTOR IS RIGHT
|
||||
#IF (INTMODE == 1)
|
||||
; JP INT_IM1 IF INTERRUPT MODE ACTIVE
|
||||
LD A,$C3
|
||||
LD ($0038),A
|
||||
LD HL,INT_IM1
|
||||
LD ($0039),HL
|
||||
#ELSE
|
||||
; RETI ($ED, $4D) IF NON-INTERRUPT MODE
|
||||
LD HL,$0038
|
||||
LD (HL),$ED
|
||||
INC HL
|
||||
LD (HL),$4D
|
||||
#ENDIF
|
||||
#ENDIF
|
||||
;
|
||||
;==================================================================================================
|
||||
; RECOVERY MODE
|
||||
;==================================================================================================
|
||||
@@ -2137,6 +2299,20 @@ HB_Z280BUS1:
|
||||
CALL PRTSTRD
|
||||
.TEXT "KB RAM$"
|
||||
;
|
||||
#IFDEF TESTING
|
||||
;
|
||||
CALL PRTSTRD
|
||||
.TEXT ", RAMBANKS=0x$"
|
||||
LD A,($FFEA)
|
||||
CALL PRTHEXBYTE
|
||||
;
|
||||
CALL PRTSTRD
|
||||
.TEXT ", RTCDEF=0x$"
|
||||
LD A,(RTCDEFVAL)
|
||||
CALL PRTHEXBYTE
|
||||
;
|
||||
#ENDIF
|
||||
;
|
||||
#IF 0
|
||||
;
|
||||
; DIAGNOSTIC DISPLAY OF BANK IDS IN HCB
|
||||
@@ -6245,6 +6421,8 @@ IOPRVAL .DW 0 ; TEMP STORAGE FOR IOPR
|
||||
;
|
||||
HB_BATCOND .DB 0 ; BATTERY CONDITION (0=LOW, 1=OK)
|
||||
;
|
||||
RTCDEFVAL .DB RTCDEF ; STORAGE FOR RTC DEFAULT VALUE
|
||||
;
|
||||
#IF (BT_REC_TYPE != BT_REC_NONE)
|
||||
HB_BOOT_REC .DB 0 ; BOOT MODE (0=NORMAL, 1=RECOVERY MODE)
|
||||
#ENDIF
|
||||
|
||||
@@ -716,7 +716,7 @@ SIO_INITDEV4:
|
||||
;
|
||||
; ALL GOOD. PROGRAM THE CTC CHANNEL
|
||||
LD A,(IY+13) ; GET CTC CHANNEL
|
||||
ADD A,CTCA ; ADD TO CTC BASE PORT ADR
|
||||
ADD A,CTCBASE ; ADD TO CTC BASE PORT ADR
|
||||
#IF (SIODEBUG)
|
||||
PRTS(" CTC=$")
|
||||
CALL PRTHEXBYTE
|
||||
@@ -815,7 +815,7 @@ SIO_INITSAFE:
|
||||
; IF A CTC CHANNEL IS CONFIGURED, PROGRAM IT FOR
|
||||
; SIMPLE 1:1 SCALING.
|
||||
LD A,(IY+13) ; GET CTC CHANNEL
|
||||
ADD A,CTCA ; ADD TO CTC BASE PORT ADR
|
||||
ADD A,CTCBASE ; ADD TO CTC BASE PORT ADR
|
||||
LD C,A ; AND PUT IN C FOR I/O
|
||||
LD A,%01010111 ; CTCC CONTROL WORD VALUE
|
||||
OUT (C),A ; PREP CTC CHANNEL
|
||||
|
||||
@@ -2,4 +2,4 @@
|
||||
#DEFINE RMN 1
|
||||
#DEFINE RUP 1
|
||||
#DEFINE RTP 0
|
||||
#DEFINE BIOSVER "3.1.1-pre.148"
|
||||
#DEFINE BIOSVER "3.1.1-pre.150"
|
||||
|
||||
@@ -3,5 +3,5 @@ rmn equ 1
|
||||
rup equ 1
|
||||
rtp equ 0
|
||||
biosver macro
|
||||
db "3.1.1-pre.148"
|
||||
db "3.1.1-pre.150"
|
||||
endm
|
||||
|
||||
Reference in New Issue
Block a user