Add definable base address for SIO

8 years ago · 490e3e49f8
1 changed files with 1 additions and 0 deletions
--- a/Source/HBIOS/plt_sbc.inc
+++ b/Source/HBIOS/plt_sbc.inc
@ -19,3 +19,4 @@ MPGENA		.EQU	SBC_BASE + $1C	; PAGING ENABLE REGISTER - BIT 0 = 1  (WRITE ONLY)
 ;
 RTC		.EQU	SBC_BASE + $10	; ADDRESS OF RTC LATCH AND INPUT PORT
 PPIBASE		.EQU	SBC_BASE + $00	; PPI 82C55 I/O IS DECODED TO PORT 60-67
+SIOBASE	.EQU	$B0				; ZILOG PERIPHERALS DEFAULT				;PS