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Add definable base address for SIO

pull/8/head
b1ackmai1er 8 years ago
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      Source/HBIOS/plt_sbc.inc

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Source/HBIOS/plt_sbc.inc
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@ -19,3 +19,4 @@ MPGENA .EQU SBC_BASE + $1C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY)
; ;
RTC .EQU SBC_BASE + $10 ; ADDRESS OF RTC LATCH AND INPUT PORT RTC .EQU SBC_BASE + $10 ; ADDRESS OF RTC LATCH AND INPUT PORT
PPIBASE .EQU SBC_BASE + $00 ; PPI 82C55 I/O IS DECODED TO PORT 60-67 PPIBASE .EQU SBC_BASE + $00 ; PPI 82C55 I/O IS DECODED TO PORT 60-67
SIOBASE .EQU $B0 ; ZILOG PERIPHERALS DEFAULT ;PS

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