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@ -44,6 +44,16 @@ MPGSEL_2 .EQU $7A ; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY) |
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MPGSEL_3 .EQU $7B ; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY) |
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MPGENA .EQU $7C ; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY) |
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; |
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; BUS TIMING FOR PAGED MEMORY ACCESS (CS3) |
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EZ80_MEM_CYCLES .EQU 3 ; EZ80 CYCLES FOR MEMORY (1-15) |
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EZ80_MEM_FREQ .EQU 8000 ; CALCULATE APPROPRIATE BUS CYCLES TO ACHIVE APPOX BUS FREQUENCY |
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EZ80_MEM_ASSIGN .EQU 0 ; 0 -> USE FREQ, 1 -> USE CYCLES |
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; |
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; BUS TIMING FOR EXTERNAL I/O ACCESS (CS2) |
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EZ80_IO_CYCLES .EQU 3 ; EZ80 CYCLES FOR IO (1-15) |
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EZ80_IO_FREQ .EQU 8000 ; CALCULATE APPROPRIATE BUS CYCLES TO ACHIVE APPOX BUS FREQUENCY |
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EZ80_IO_ASSIGN .EQU 0 ; 0 -> USE FREQ, 1 -> USE CYCLES |
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; |
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RTCIO .EQU $C0 ; RTC LATCH REGISTER ADR |
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; |
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KIOENABLE .EQU FALSE ; ENABLE ZILOG KIO SUPPORT |
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