Browse Source

Prerelease 4

pull/3/head
Wayne Warthen 10 years ago
parent
commit
62641ba4a6
  1. 2
      Source/CBIOS/ver.inc
  2. 4
      Source/HBIOS/Build.ps1
  3. 171
      Source/HBIOS/hbios.asm
  4. 2
      Source/HBIOS/std.asm
  5. 2
      Source/HBIOS/ver.inc

2
Source/CBIOS/ver.inc

@ -2,4 +2,4 @@
#DEFINE RMN 8 #DEFINE RMN 8
#DEFINE RUP 0 #DEFINE RUP 0
#DEFINE RTP 0 #DEFINE RTP 0
#DEFINE BIOSVER "2.8.0-pre.3"
#DEFINE BIOSVER "2.8.0-pre.4"

4
Source/HBIOS/Build.ps1

@ -102,8 +102,8 @@ Asm 'romldr'
if ($Platform -ne "UNA") if ($Platform -ne "UNA")
{ {
Asm 'hbios' '-dROMBOOT' -Output 'hbios_rom.bin' -List 'hbios_rom.lst' Asm 'hbios' '-dROMBOOT' -Output 'hbios_rom.bin' -List 'hbios_rom.lst'
Asm 'hbios' '-dAPPBOOT' -Output 'hbios_app.bin' -List 'hbios_rom.lst'
Asm 'hbios' '-dIMGBOOT' -Output 'hbios_img.bin' -List 'hbios_rom.lst'
Asm 'hbios' '-dAPPBOOT' -Output 'hbios_app.bin' -List 'hbios_app.lst'
Asm 'hbios' '-dIMGBOOT' -Output 'hbios_img.bin' -List 'hbios_img.lst'
} }
# Generate result files using components above # Generate result files using components above

171
Source/HBIOS/hbios.asm

@ -3,10 +3,68 @@
; HBIOS ; HBIOS
;================================================================================================== ;==================================================================================================
; ;
; THIS FILE CONTAINS THE HBIOS IMAGE THAT IS INTENDED TO RUN IN A DEDICATED RAM BANK. THE CODE IS
; CONSTRUCTED SUCH THAT IT CAN BE LAUNCHED IN A VARIETY OF MODES AND INSTALL ITSELF. A SMALL 512
; BYTE PROXY IS PLACED AT THE TOP OF CPU MEMORY (FE00H-FFFFH). THIS PROXY CODE ALLOWS CODE
; RUNNING FROM ANY BANK TO INVOKE HBIOS FUNCTIONS. NORMALLY, ANY BANK THAT RUNS CODE WOULD SETUP
; THE RST 8 VECTOR TO POINT TO THE PROXY INVOKE ENTRY POINT AT FFF0H. CALLS VIA THE PROXY INVOKE
; ENTRY POINT TRANSPARENTLY SWAP IN THE HBIOS BANK, PERFORM THE REQUESTED FUNCTION, AND RETURN
; WITH THE ORIGINAL BANK ACTIVE. THE CODE USING HBIOS FUNCTIONS DOES NOT NEED TO BE AWARE OF
; THE BANK SWITCHING THAT OCCURS.
;
; THIS FILE CAN BE COMPILED TO BOOT IN ONE OF 3 MODES (ROM, APPLICATION, OR IMAGE) AS DESCRIBED
; BELOW. WHEN COMPILED, YOU MUST DEFINE EXACTLY ONE OF THE FOLLOWING MACROS:
;
; - ROMBOOT: BOOT FROM A ROM BANK
;
; WHEN ROMBOOT IS DEFINED, THE FILE IS ASSEMBLED TO BE IMBEDDED AT THE START OF A ROM
; ASSUMING THAT THE CPU WILL START EXECUTION AT ADDRESS 0. AFTER PERFORMING MINIMAL
; SYSTEM INITIALIZATION, THE IMAGE OF THE RUNNING ROM BANK IS COPIED TO A RAM BANK
; CREATING A SHADOW COPY IN RAM. EXECUTION IS THAN TRANSFERRED TO THE RAM SHADOW COPY.
; THIS IS ESSENTIAL BECAUSE THE HBIOS CODE DOES NOT SUPPORT RUNNING IN READ ONLY MEMORY
; (EXCEPT FOR THE INITIAL LAUNCHING CODE). IN THIS MODE, THE HBIOS INITIALIZATION WILL
; ALSO COPY THE OS IMAGES BANK IN ROM TO THE USER RAM BANK AND LAUNCH IT AFTER HBIOS
; IS INSTALLED.
;
; - APPBOOT: BOOT FROM A CP/M STYLE APPLICATION FILE
;
; WHEN APPBOOT IS DEFINED, THE FILE IS ASSEMBLED AS A CP/M APPLICATION ASSUMING
; THAT IT WILL BE LOADED AT 100H BY THE CP/M (OR COMPATIBLE) OS. NOTE THAT IN
; THIS CASE IT IS ASSUMED THAT AN OS IMAGES FILE IS APPENDED TO THE END OF THE
; HBIOS APPLICATION BINARY. THE APPENDED OS IMAGES ARE COPIED TO THE USER RAM
; BANK AND LAUNCHED AFTER HBIOS HAS INSTALLED ITSELF.
;
; - IMGBOOT: BOOT FROM AN IMAGE FILE THAT HAS BEEN PLACED IN THE USER BANK
;
; WHEN IMGBOOT IS DEFINED, THE FILE IS ASSEMBLED SUCH THAT IT CAN BE PRELOADED
; INTO THE RAM USER BANK BY AN EXTERNAL PROCESS THAT SUBSEQUENTLY LAUNCHES
; THE CODE AT ADDRESS 0. THE MOST COMMON EXAMPLE OF THIS IS THE UNA FSFAT
; TOOL WHICH CAN LOAD AN IMAGE FROM A DOS FAT FILESYSTEM PROVIDING A SIMPLE
; WAY TO LOAD A TEST COPY OF HBIOS. AS IS THE CASE WITH APPBOOT, IT IS ASSUMED
; THAT AN OS IMAGES FILE IS APPENDED TO THE END OF THE IMAGE AND IS LAUNCHED
; AFTER HBIOS IS INSTALLED.
;
; INCLUDE GENERIC STUFF ; INCLUDE GENERIC STUFF
; ;
#INCLUDE "std.asm" #INCLUDE "std.asm"
; ;
; MAKE SURE EXACTLY ONE OF ROMBOOT, APPBOOT, IMGBOOT IS DEFINED.
MODCNT .EQU 0
#IFDEF ROMBOOT
MODCNT .SET MODCNT + 1
#ENDIF
#IFDEF APPBOOT
MODCNT .SET MODCNT + 1
#ENDIF
#IFDEF IMGBOOT
MODCNT .SET MODCNT + 1
#ENDIF
#IF (MODCNT != 1)
.ECHO "*** ERROR: PLEASE DEFINE ONE AND ONLY ONE OF ROMBOOT, APPBOOT, IMGBOOT!!!\n"
!!! ; FORCE AN ASSEMBLY ERROR
#ENDIF
;
;
#IFNDEF APPBOOT #IFNDEF APPBOOT
; ;
.ORG 0 .ORG 0
@ -62,11 +120,11 @@ DESC .DB "ROMWBW v", BIOSVER, ", Copyright 2015, Wayne Warthen, GNU GPL v3", 0
HCB: HCB:
JP HB_START JP HB_START
; ;
.DB 'W',~'W' ; MARKER
.DB RMJ << 4 | RMN ; FIRST BYTE OF VERSION INFO
CB_MARKER .DB 'W',~'W' ; MARKER
CB_VERSION .DB RMJ << 4 | RMN ; FIRST BYTE OF VERSION INFO
.DB RUP << 4 | RTP ; SECOND BYTE OF VERSION INFO .DB RUP << 4 | RTP ; SECOND BYTE OF VERSION INFO
; ;
CB_PLT .DB PLATFORM
CB_PLATFORM .DB PLATFORM
CB_CPUMHZ .DB CPUMHZ CB_CPUMHZ .DB CPUMHZ
CB_CPUKHZ .DW CPUKHZ CB_CPUKHZ .DW CPUKHZ
CB_RAMBANKS .DB RAMSIZE / 32 CB_RAMBANKS .DB RAMSIZE / 32
@ -513,6 +571,9 @@ HBX_STACK .EQU $
;================================================================================================== ;==================================================================================================
; ;
HB_START: HB_START:
DI ; NO INTERRUPTS
IM 1 ; INTERRUPT MODE 1
LD SP,HBX_LOC ; SETUP INITIAL STACK JUST BELOW HBIOS PROXY
; ;
#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) #IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4))
; SET BASE FOR CPU IO REGISTERS ; SET BASE FOR CPU IO REGISTERS
@ -528,17 +589,17 @@ HB_START:
OUT0 (Z180_CCR),A OUT0 (Z180_CCR),A
OUT0 (Z180_CMR),A OUT0 (Z180_CMR),A
; SET DEFAULT WAIT STATES TO ACCURATELY MEASURE CPU SPEED
; SET DEFAULT WAIT STATES
LD A,$F0 LD A,$F0
OUT0 (Z180_DCNTL),A OUT0 (Z180_DCNTL),A
; MMU SETUP ; MMU SETUP
LD A,$80 LD A,$80
OUT0 (Z180_CBAR),A ; SETUP FOR 32K/32K BANK CONFIG OUT0 (Z180_CBAR),A ; SETUP FOR 32K/32K BANK CONFIG
#IFDEF ROMBOOT
XOR A
OUT0 (Z180_BBR),A ; BANK BASE = 0
#ENDIF
;#IFDEF ROMBOOT
; XOR A
; OUT0 (Z180_BBR),A ; BANK BASE = 0
;#ENDIF
LD A,(RAMSIZE + RAMBIAS - 64) >> 2 LD A,(RAMSIZE + RAMBIAS - 64) >> 2
OUT0 (Z180_CBR),A ; COMMON BASE = LAST (TOP) BANK OUT0 (Z180_CBR),A ; COMMON BASE = LAST (TOP) BANK
@ -580,7 +641,13 @@ HB_START:
LD BC,HBX_SIZ LD BC,HBX_SIZ
LDIR LDIR
; ;
; INSTALL HBIOS TO RAM BANK
; IF ALREADY EXECUTING IN RAM, BYPASS RAM BANK INSTALLATION
;
LD A,(HB_RAMFLAG)
OR A
JR NZ,HB_START1
;
; INSTALL HBIOS IN RAM BANK
; ;
LD A,(HB_CURBNK) LD A,(HB_CURBNK)
LD (HB_SRCBNK),A LD (HB_SRCBNK),A
@ -597,10 +664,17 @@ HB_START:
LD HL,HB_START1 ; EXECUTION RESUMES HERE LD HL,HB_START1 ; EXECUTION RESUMES HERE
CALL HBX_BNKCALL ; CONTINUE IN RAM BANK, DO NOT RETURN CALL HBX_BNKCALL ; CONTINUE IN RAM BANK, DO NOT RETURN
HALT ; WE SHOULD NOT COME BACK HERE! HALT ; WE SHOULD NOT COME BACK HERE!
;
HB_RAMFLAG .DB FALSE ; ASSUME FALSE, SET TO TRUE BELOW AFTER RAM TRANSITION
;
; EXECUTION RESUMES HERE AFTER SWITCH TO RAM BANK
;
HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
LD SP,HBX_LOC ; RESET STACK SINCE WE DO NOT RETURN LD SP,HBX_LOC ; RESET STACK SINCE WE DO NOT RETURN
LD A,TRUE ; ACCUM := TRUE
LD (HB_RAMFLAG),A ; SET RAMFLAG
; ;
;
; PERFORM DYNAMIC CPU SPEED DERIVATION
; ;
CALL HB_CPUSPD ; CPU SPEED DETECTION CALL HB_CPUSPD ; CPU SPEED DETECTION
; ;
@ -616,22 +690,11 @@ HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
; ;
; INITIALIZE HEAP STORAGE ; INITIALIZE HEAP STORAGE
; ;
LD DE,HB_END ; GET ADDRESS OF START OF HEAP
;
; HEAP STARTS AT END OF HBIOS
LD HL,HCB + HCB_HEAP ; POINT TO HEAP START ADDRESS VARIABLE
LD (HL),E ; SAVE LSB
INC HL ; BUMP
LD (HL),D ; SAVE MSB
;
; INIT HEAP TOP TO HEAP START
LD HL,HCB + HCB_HEAPTOP ; POINT TO HEAP TOP ADDRESS VARIABLE
LD (HL),E ; SAVE LSB
INC HL ; BUMP
LD (HL),D ; SAVE MSB
;
; INITIALIZE POINTERS
LD HL,HB_END ; HEAP FOLLOWS HBIOS CODE
LD (CB_HEAP),HL ; INIT HEAP BASE ADDRESS
LD (CB_HEAPTOP),HL ; INIT HEAP TOP ADDRESS
; CLEAR HEAP ; CLEAR HEAP
LD HL,HB_END ; START OF HEAP
LD BC,BNKTOP - HB_END ; MAX SIZE OF HEAP LD BC,BNKTOP - HB_END ; MAX SIZE OF HEAP
LD A,$FF ; FILL WITH $FF LD A,$FF ; FILL WITH $FF
CALL FILL ; DO IT CALL FILL ; DO IT
@ -650,7 +713,7 @@ HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
; VIA HBIOS. ; VIA HBIOS.
; ;
XOR A ; CONSOLE DEVICE IS UNIT #0 BY FIAT XOR A ; CONSOLE DEVICE IS UNIT #0 BY FIAT
LD (HCB + HCB_CONDEV),A ; SAVE IT, ACTIVATES CONSOLE ON HBIOS
LD (CB_CONDEV),A ; SAVE IT, ACTIVATES CONSOLE ON HBIOS
; ;
; ANNOUNCE HBIOS ; ANNOUNCE HBIOS
; ;
@ -659,7 +722,7 @@ HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
CALL NEWLINE2 CALL NEWLINE2
PRTX(STR_PLATFORM) PRTX(STR_PLATFORM)
PRTS(" @ $") PRTS(" @ $")
LD HL,(HCB + HCB_CPUKHZ)
LD HL,(CB_CPUKHZ)
CALL PRTD3M ; PRINT AS DECIMAL WITH 3 DIGIT MANTISSA CALL PRTD3M ; PRINT AS DECIMAL WITH 3 DIGIT MANTISSA
PRTS("MHz ROM=$") PRTS("MHz ROM=$")
LD HL,ROMSIZE LD HL,ROMSIZE
@ -692,7 +755,7 @@ INITSYS1:
; MARKS THE POINT IN THE HEAP AFTER WHICH MEMORY IS RELEASED ; MARKS THE POINT IN THE HEAP AFTER WHICH MEMORY IS RELEASED
; WHEN AN HBIOS RESET IS PEFORMED. ; WHEN AN HBIOS RESET IS PEFORMED.
; ;
LD HL,(HCB + HCB_HEAPTOP)
LD HL,(CB_HEAPTOP)
LD (HEAPCURB),HL LD (HEAPCURB),HL
; ;
; NOW SWITCH TO CRT CONSOLE IF CONFIGURED ; NOW SWITCH TO CRT CONSOLE IF CONFIGURED
@ -714,8 +777,8 @@ INITSYS1:
CALL NEWLINE CALL NEWLINE
; ;
; SWITCH TO CRT CONSOLE ; SWITCH TO CRT CONSOLE
LD A,(HCB + HCB_CRTDEV) ; GET CRT DISPLAY DEVICE
LD (HCB + HCB_CONDEV),A ; SAVE IT AS ACTIVE CONSOLE DEVICE
LD A,(CB_CRTDEV) ; GET CRT DISPLAY DEVICE
LD (CB_CONDEV),A ; SAVE IT AS ACTIVE CONSOLE DEVICE
; ;
; DISPLAY HBIOS BANNER ON NEW CONSOLE ; DISPLAY HBIOS BANNER ON NEW CONSOLE
PRTX(STR_BANNER) PRTX(STR_BANNER)
@ -920,7 +983,7 @@ CIO_DISPATCH:
RET ; AND RETURN RET ; AND RETURN
; ;
CIO_DISPATCH_CON: CIO_DISPATCH_CON:
LD A,(HCB + HCB_CONDEV) ; PUT CONSOLE UNIT NUMBER IN A
LD A,(CB_CONDEV) ; PUT CONSOLE UNIT NUMBER IN A
; FALL THRU ; FALL THRU
; ;
CIO_DISPATCH1: CIO_DISPATCH1:
@ -1475,9 +1538,9 @@ SYS_GET:
; DE: BOOT DISK VOLUME (UNIT/SLICE) ; DE: BOOT DISK VOLUME (UNIT/SLICE)
; ;
SYS_GETBOOTINFO: SYS_GETBOOTINFO:
LD A,(HCB + HCB_BOOTBID)
LD A,(CB_BOOTBID)
LD L,A LD L,A
LD DE,(HCB + HCB_BOOTVOL)
LD DE,(CB_BOOTVOL)
XOR A XOR A
RET RET
; ;
@ -1489,9 +1552,9 @@ SYS_GETBOOTINFO:
; ;
SYS_GETCPUINFO: SYS_GETCPUINFO:
LD H,0 ; NOT YET DEFINED LD H,0 ; NOT YET DEFINED
LD A,(HCB + HCB_CPUMHZ)
LD A,(CB_CPUMHZ)
LD L,A LD L,A
LD DE,(HCB + HCB_CPUKHZ)
LD DE,(CB_CPUKHZ)
XOR A XOR A
RET RET
; ;
@ -1512,9 +1575,9 @@ SYS_GETMEMINFO:
; E: USER BANK ID ; E: USER BANK ID
; ;
SYS_GETBNKINFO: SYS_GETBNKINFO:
LD A,(HCB + HCB_BIDBIOS)
LD A,(CB_BIDBIOS)
LD D,A LD D,A
LD A,(HCB + HCB_BIDUSR)
LD A,(CB_BIDUSR)
LD E,A LD E,A
XOR A XOR A
RET RET
@ -1560,8 +1623,8 @@ SYS_SET:
; ;
SYS_SETBOOTINFO: SYS_SETBOOTINFO:
LD A,L LD A,L
LD (HCB + HCB_BOOTBID),A
LD (HCB + HCB_BOOTVOL),DE
LD (CB_BOOTBID),A
LD (CB_BOOTVOL),DE
XOR A XOR A
RET RET
; ;
@ -1586,7 +1649,7 @@ SYS_POKE:
; ;
SYS_RESET: SYS_RESET:
LD HL,(HEAPCURB) ; GET HBIOS HEAP THRESHOLD LD HL,(HEAPCURB) ; GET HBIOS HEAP THRESHOLD
LD (HCB + HCB_HEAPTOP),HL ; RESTORE HEAP TOP
LD (CB_HEAPTOP),HL ; RESTORE HEAP TOP
XOR A XOR A
RET RET
;; ;;
@ -1721,15 +1784,15 @@ HB_ALLOC:
LD DE,4 ; SIZE OF HEADER LD DE,4 ; SIZE OF HEADER
ADD HL,DE ; ADD IT IN ADD HL,DE ; ADD IT IN
JR C,HB_ALLOC1 ; ERROR ON OVERFLOW JR C,HB_ALLOC1 ; ERROR ON OVERFLOW
LD DE,(HCB + HCB_HEAPTOP) ; CURRENT HEAP TOP
LD DE,(CB_HEAPTOP) ; CURRENT HEAP TOP
ADD HL,DE ; ADD IT IN, HL := NEW HEAP TOP ADD HL,DE ; ADD IT IN, HL := NEW HEAP TOP
JR C,HB_ALLOC1 ; ERROR ON OVERFLOW JR C,HB_ALLOC1 ; ERROR ON OVERFLOW
BIT 7,H ; TEST PAST END OF BANK (>= 32K) BIT 7,H ; TEST PAST END OF BANK (>= 32K)
JR NZ,HB_ALLOC1 ; ERROR IF PAST END JR NZ,HB_ALLOC1 ; ERROR IF PAST END
; ;
; SAVE NEW HEAP TOP ; SAVE NEW HEAP TOP
LD DE,(HCB + HCB_HEAPTOP) ; GET ORIGINAL HEAP TOP
LD (HCB + HCB_HEAPTOP),HL ; SAVE NEW HEAP TOP
LD DE,(CB_HEAPTOP) ; GET ORIGINAL HEAP TOP
LD (CB_HEAPTOP),HL ; SAVE NEW HEAP TOP
; ;
; SET HEADER VALUES ; SET HEADER VALUES
EX DE,HL ; HEADER ADR TO HL EX DE,HL ; HEADER ADR TO HL
@ -1994,11 +2057,11 @@ HB_CPUSPD1:
SLA L SLA L
RL H RL H
; ;
LD (HCB + HCB_CPUKHZ),HL
LD (CB_CPUKHZ),HL
LD DE,1000 LD DE,1000
CALL DIV16 CALL DIV16
LD A,C LD A,C
LD (HCB + HCB_CPUMHZ),A
LD (CB_CPUMHZ),A
; ;
RET RET
; ;
@ -2247,7 +2310,7 @@ PS_PRTDC:
CALL PRTDEC ; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED) CALL PRTDEC ; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
PRTS("MB$") ; PRINT SUFFIX PRTS("MB$") ; PRINT SUFFIX
CALL PC_COMMA CALL PC_COMMA
PRTS(" LBA$") ; FOR NOW, WE ASSUME HARD DISK DOES LBA
PRTS("LBA$") ; FOR NOW, WE ASSUME HARD DISK DOES LBA
RET ; DONE RET ; DONE
; ;
PS_PRTDC1: PS_PRTDC1:
@ -2261,7 +2324,7 @@ PS_PRTDC1:
CALL PRTDEC ; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED) CALL PRTDEC ; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
PRTS("KB$") ; PRINT SUFFIX PRTS("KB$") ; PRINT SUFFIX
CALL PC_COMMA CALL PC_COMMA
PRTS(" LBA$") ; FOR NOW, WE ASSUME HARD DISK DOES LBA
PRTS("LBA$") ; FOR NOW, WE ASSUME HARD DISK DOES LBA
RET ; DONE RET ; DONE
; ;
PS_PRTDC2: PS_PRTDC2:
@ -2312,7 +2375,7 @@ PS_PRTDC2B:
PS_PRTDC2C: PS_PRTDC2C:
CALL WRITESTR CALL WRITESTR
CALL PC_COMMA CALL PC_COMMA
PRTS(" CHS$") ; FOR NOW, WE ASSUME HARD DISK DOES LBA
PRTS("CHS$") ; FOR NOW, WE ASSUME HARD DISK DOES LBA
; ;
RET ; DONE RET ; DONE
; ;
@ -2430,17 +2493,17 @@ PS_PRTSC1:
CALL PRTDECB ; PRINT IT CALL PRTDECB ; PRINT IT
CALL PC_COMMA CALL PC_COMMA
#IF (VDAEMU == EMUTYP_TTY) #IF (VDAEMU == EMUTYP_TTY)
PRTS(" TTY$")
PRTS("TTY$")
#ENDIF #ENDIF
#IF (VDAEMU == EMUTYP_ANSI) #IF (VDAEMU == EMUTYP_ANSI)
PRTS(" ANSI$")
PRTS("ANSI$")
#ENDIF #ENDIF
RET RET
; ;
PS_PRTSC2: PS_PRTSC2:
PRTS("PropTerm$") ; ASSUME PROPELLER PRTS("PropTerm$") ; ASSUME PROPELLER
CALL PC_COMMA CALL PC_COMMA
PRTS(" ANSI$")
PRTS("ANSI$")
RET RET
; ;
; PRINT ONE LINE VIDEO UNIT/DEVICE INFO, VIDEO UNIT INDEX IN C ; PRINT ONE LINE VIDEO UNIT/DEVICE INFO, VIDEO UNIT INDEX IN C
@ -2663,7 +2726,7 @@ COUT:
; ;
; GET CURRENT CONSOLE UNIT ; GET CURRENT CONSOLE UNIT
LD E,A ; TEMPORARILY STASH OUTPUT CHAR IN E LD E,A ; TEMPORARILY STASH OUTPUT CHAR IN E
LD A,(HCB + HCB_CONDEV) ; GET CONSOLE UNIT BYTE
LD A,(CB_CONDEV) ; GET CONSOLE UNIT BYTE
CP $FF ; TEST FOR $FF (HBIOS NOT READY) CP $FF ; TEST FOR $FF (HBIOS NOT READY)
JR Z,COUT1 ; IF NOT READY, USE XIO JR Z,COUT1 ; IF NOT READY, USE XIO
; ;
@ -2694,7 +2757,7 @@ CIN:
PUSH DE PUSH DE
PUSH HL PUSH HL
; ;
LD A,(HCB + HCB_CONDEV) ; GET CONSOLE UNIT BYTE
LD A,(CB_CONDEV) ; GET CONSOLE UNIT BYTE
CP $FF ; TEST FOR $FF (HBIOS NOT READY) CP $FF ; TEST FOR $FF (HBIOS NOT READY)
JR Z,CIN1 ; IF NOT READY, USE XIO JR Z,CIN1 ; IF NOT READY, USE XIO
; ;
@ -2725,7 +2788,7 @@ CST:
PUSH DE PUSH DE
PUSH HL PUSH HL
; ;
LD A,(HCB + HCB_CONDEV) ; GET CONSOLE UNIT BYTE
LD A,(CB_CONDEV) ; GET CONSOLE UNIT BYTE
CP $FF ; TEST FOR $FF (HBIOS NOT READY) CP $FF ; TEST FOR $FF (HBIOS NOT READY)
JR Z,CST1 ; IF NOT READY, USE XIO JR Z,CST1 ; IF NOT READY, USE XIO
; ;

2
Source/HBIOS/std.asm

@ -230,7 +230,7 @@ BID_ROMN .EQU (BID_ROM0 + ((ROMSIZE / 32) - 1))
BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1)) BID_RAMN .EQU (BID_RAM0 + ((RAMSIZE / 32) - 1))
BID_BOOT .EQU BID_ROM0 ; BOOT BANK BID_BOOT .EQU BID_ROM0 ; BOOT BANK
BID_BIOSIMG .EQU BID_ROM0 + 1 ; BIOS IMAGE BANK
;BID_BIOSIMG .EQU BID_ROM0 + 1 ; BIOS IMAGE BANK
BID_OSIMG .EQU BID_ROM0 + 2 ; ROM LOADER AND IMAGES BANK BID_OSIMG .EQU BID_ROM0 + 2 ; ROM LOADER AND IMAGES BANK
BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK BID_FSFAT .EQU BID_ROM0 + 3 ; FAT FILESYSTEM DRIVER BANK
BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK BID_ROMD0 .EQU BID_ROM0 + 4 ; FIRST ROM DRIVE BANK

2
Source/HBIOS/ver.inc

@ -2,4 +2,4 @@
#DEFINE RMN 8 #DEFINE RMN 8
#DEFINE RUP 0 #DEFINE RUP 0
#DEFINE RTP 0 #DEFINE RTP 0
#DEFINE BIOSVER "2.8.0-pre.3"
#DEFINE BIOSVER "2.8.0-pre.4"

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