Fix and Improve SCC Chip Detection

- Adopted the chip detection logic in the thread <https://groups.google.com/g/retro-comp/c/imNsPBJO45s/m/mbpfnQDNAwAJ?utm_medium=email&utm_source=footer>

Source/HBIOS/scc.asm

@@ -16,8 +16,9 @@
 SCC_BUFSZ	.EQU	32		; RECEIVE RING BUFFER SIZE
 ;
 SCC_NONE	.EQU	0
-SCC_SCC		.EQU	1
-SCC_ESCC	.EQU	2
+SCC_8530	.EQU	1
+SCC_85C30	.EQU	2
+SCC_85230	.EQU	3
 ;
 SCC_DEFBAUD	.EQU	38400		; FAILSAFE BAUD RATE
 SCC_DEFCLK	.EQU	4915200		; FAILSAVE BAUD CLOCK
@@ -845,21 +846,33 @@ SCC_DETECT1:
 	; RETURN CHIP TYPE
 	LD	A,SCC_NONE		; ASSUME NOTHING HERE
 	RET	NC			; IF CF NOT SET, RETURN
-	; CHECK FOR ESCC
+	; CHECK FOR CMOS OR BETTER
 	LD	C,(IY+3)		; CMD/STATUS PORT
 	LD	B,9			; R9
 	LD	A,%11000000		; RESET CHIP
 	CALL	SCC_WR			; DO IT
 	LD	B,15			; R15
-	CALL	SCC_RD			; READ IT
-	CALL	PRTHEXBYTE
-	CP	$01			; ESCC?
+	LD	A,1			; PROBE VALUE
+	CALL	SCC_WR			; SEND IT
+	CALL	SCC_RD			; READ IT BACK
+	CP	$01			; CMOS OR BETTER?
 	JR	Z,SCC_DETECT2		; IF SO, JUMP AHEAD
-	LD	A,SCC_SCC		; CHIP TYPE IS SCC
+	LD	A,SCC_8530		; ELSE CHIP TYPE IS 8530 (NMOS)
 	RET				; DONE
 SCC_DETECT2:
-	LD	A,SCC_ESCC		; CHIP TYPE IS ESCC
-	RET
+	; CHECK FOR ESCC
+	LD	B,8			; XMIT BUF
+	XOR	A			; NULL BYTE
+	CALL	SCC_WR			; WRITE IT
+	LD	B,0			; R0
+	CALL	SCC_RD			; READ IT
+	AND	%00000100		; ISOLATE TX BUF EMPTY
+	JR	NZ,SCC_DETECT3		; BUF STILL EMPTY, MUST BE 230
+	LD	A,SCC_85C30		; CHIP TYPE IS 85C30 (CMOS)
+	RET				; DONE
+SCC_DETECT3:
+	LD	A,SCC_85230		; CHIP TYPE IS 85230
+	RET				; DONE
 ;
 ; COMPUTE DIVISOR TO BC
 ;
@@ -938,12 +951,14 @@ SCC_PRTCFG:
 ;
 SCC_TYPE_MAP:
 	.DW	SCC_STR_NONE
-	.DW	SCC_STR_SCC
-	.DW	SCC_STR_ESCC
-
+	.DW	SCC_STR_8530
+	.DW	SCC_STR_85C30
+	.DW	SCC_STR_85230
+;
 SCC_STR_NONE	.DB	"<NOT PRESENT>$"
-SCC_STR_SCC	.DB	"8530$"
-SCC_STR_ESCC	.DB	"85230$"
+SCC_STR_8530	.DB	"8530$"
+SCC_STR_85C30	.DB	"85C30$"
+SCC_STR_85230	.DB	"85230$"
 ;
 ; WORKING VARIABLES
 ;