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@ -43,7 +43,7 @@ |
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; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU". |
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; |
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#DEFINE PLATFORM_NAME "RCBus", " [", CONFIG, "]" |
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#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS |
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#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION |
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; |
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#INCLUDE "cfg_MASTER.asm" |
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; |
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@ -63,7 +63,6 @@ CPUSPDCAP .SET SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO |
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CPUSPDDEF .SET SPD_HIGH ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW |
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CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ |
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INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280) |
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;;;DEFSERCFG .SET SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM) |
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; |
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RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) |
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ROMSIZE .SET 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!) |
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@ -105,7 +104,7 @@ FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS |
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FPLED_IO .SET $00 ; FP: PORT ADDRESS FOR FP LEDS |
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FPLED_INV .SET FALSE ; FP: LED BITS ARE INVERTED |
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FPLED_DSKACT .SET TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS |
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FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES |
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FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES |
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FPSW_IO .SET $00 ; FP: PORT ADDRESS FOR FP SWITCHES |
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FPSW_INV .SET FALSE ; FP: SWITCH BITS ARE INVERTED |
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; |
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@ -124,7 +123,7 @@ PKDENABLE .SET FALSE ; ENABLES DSKY NG PKD DRIVER (8259) |
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PKDPPIBASE .SET $60 ; BASE I/O ADDRESS OF PKD PPI |
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PKDOSC .SET 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ) |
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H8PENABLE .SET FALSE ; ENABLES HEATH H8 FRONT PANEL |
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LCDENABLE .SET TRUE ; ENABLE LCD DISPLAY |
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LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY |
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LCDBASE .SET $AA ; BASE I/O ADDRESS OF LCD CONTROLLER |
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GM7303ENABLE .SET FALSE ; ENABLES THE GM7303 BOARD WITH 16X2 LCD |
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; |
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@ -203,7 +202,7 @@ UART6CFG .SET DEFSERCFG ; UART 6: SERIAL LINE CONFIG |
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UART7BASE .SET $FF ; UART 7: REGISTERS BASE ADR |
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UART7CFG .SET DEFSERCFG ; UART 7: SERIAL LINE CONFIG |
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; |
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ASCIENABLE .SET TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) |
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ASCIENABLE .SET FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM) |
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ASCIINTS .SET TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3 |
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ASCISWAP .SET FALSE ; ASCI: SWAP CHANNELS |
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ASCIBOOT .SET 0 ; ASCI: REBOOT ON RCV CHAR (0=DISABLED) |
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@ -214,7 +213,7 @@ Z2UENABLE .SET FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM) |
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; |
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ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM) |
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; |
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SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) |
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SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM) |
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SIODEBUG .SET FALSE ; SIO: ENABLE DEBUG OUTPUT |
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SIOBOOT .SET 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED) |
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SIOCNT .SET 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP |
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@ -222,18 +221,18 @@ SIOINTS .SET TRUE ; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3 |
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SIO0MODE .SET SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] |
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SIO0BASE .SET $80 ; SIO 0: REGISTERS BASE ADR |
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SIO0ACLK .SET 7372800 ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
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SIO0ACFG .SET SER_115200_8N1 ; SIO 0A: SERIAL LINE CONFIG |
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SIO0ACFG .SET DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG |
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SIO0ACTCC .SET -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE |
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SIO0BCLK .SET 7372800 ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
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SIO0BCFG .SET SER_115200_8N1 ; SIO 0B: SERIAL LINE CONFIG |
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SIO0BCFG .SET DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG |
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SIO0BCTCC .SET -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE |
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SIO1MODE .SET SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R] |
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SIO1BASE .SET $84 ; SIO 1: REGISTERS BASE ADR |
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SIO1ACLK .SET 7372800 ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
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SIO1ACFG .SET SER_115200_8N1 ; SIO 1A: SERIAL LINE CONFIG |
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SIO1ACFG .SET DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG |
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SIO1ACTCC .SET -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE |
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SIO1BCLK .SET 7372800 ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800 |
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SIO1BCFG .SET SER_115200_8N1 ; SIO 1B: SERIAL LINE CONFIG |
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SIO1BCFG .SET DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG |
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SIO1BCTCC .SET -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE |
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; |
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XIOCFG .SET DEFSERCFG ; XIO: SERIAL LINE CONFIG |
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@ -303,14 +302,14 @@ PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER |
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PPIDE2B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER |
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; |
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SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM) |
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SDMODE .SET SDMODE_MT ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] |
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SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W] |
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SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE |
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SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY |
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SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE |
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SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011 |
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; |
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CHENABLE .SET TRUE ; CH: ENABLE CH375/376 USB SUPPORT |
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CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT |
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CHTRACE .SET 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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CHUSBTRACE .SET 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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CHSDTRACE .SET 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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@ -345,21 +344,21 @@ LPTTRACE .SET 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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LPT0BASE .SET $0C ; LPT 0: REGISTERS BASE ADR |
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LPT1BASE .SET $00 ; LPT 1: REGISTERS BASE ADR |
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; |
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PPAENABLE .SET FALSE ; PPA: ENABLE PPA DISK DRIVER (PPA.ASM) |
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PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM) |
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PPACNT .SET 1 ; PPA: NUMBER OF PPA DEVICES (1-2) |
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PPATRACE .SET 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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PPAMODE .SET PPAMODE_MG014 ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014] |
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PPA0BASE .SET LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA |
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PPA1BASE .SET LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA |
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; |
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IMMENABLE .SET FALSE ; IMM: ENABLE IMM DISK DRIVER (IMM.ASM) |
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IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM) |
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IMMCNT .SET 1 ; IMM: NUMBER OF IMM DEVICES (1-2) |
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IMMTRACE .SET 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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IMMMODE .SET IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014] |
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IMM0BASE .SET LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM |
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IMM1BASE .SET LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM |
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; |
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SYQENABLE .SET FALSE ; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM) |
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SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM) |
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SYQCNT .SET 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2) |
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SYQTRACE .SET 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL) |
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SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014] |
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