mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 22:33:12 -06:00
Z280 Cleanup
- Z280 UART MODE command support - BNKCALL handles calls into HBIOS using system mode
This commit is contained in:
Wayne Warthen
@@ -130,6 +130,7 @@ ASCI0CFG .EQU DEFSERCFG ; ASCI 0: SERIAL LINE CONFIG
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ASCI1CFG .EQU DEFSERCFG ; ASCI 1: SERIAL LINE CONFIG
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;
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Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
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Z2UOSC .EQU 1843200 ; Z2U: OSC FREQUENCY IN MHZ
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Z2U0BASE .EQU $10 ; Z2U 0: BASE I/O ADDRESS
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Z2U0CFG .EQU DEFSERCFG ; Z2U 0: SERIAL LINE CONFIG
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;
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@@ -103,6 +103,7 @@ UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
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ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
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;
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Z2UENABLE .EQU FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
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Z2UOSC .EQU 1843200 ; Z2U: OSC FREQUENCY IN MHZ
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Z2U0BASE .EQU $10 ; Z2U 0: BASE I/O ADDRESS
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Z2U0CFG .EQU DEFSERCFG ; Z2U 0: SERIAL LINE CONFIG
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;
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@@ -588,54 +588,29 @@ HBX_BC_ITER:
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HBX_BNKCALL:
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;
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#IF (MEMMGR == MM_Z280)
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JR HBX_BNKCALL2
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CP BID_BIOS ; CALLING HBIOS?
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JR NZ,HBX_BNKCALL2 ; NOPE, DO NORMAL PROCESSING
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;PUSH AF
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;LD A,'['
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;.DB $ED,$71 ; SC
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;.DW COUT ; SC PARAMETER
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;POP AF
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;
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;LD A,(HB_CURBNK) ; GET CURRENT BANK
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;LD (HB_INVBNK),A ; SAVE INVOCATION BANK
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;
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;LD A,BID_BIOS ; HBIOS BANK
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;LD (HB_CURBNK),A ; SET AS CURRENT BANK
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LD (HBX_BNKCALL1+2),IX ; SETUP TARGET ADDRESS
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HBX_BNKCALL1:
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JR NZ,HBX_BNKCALL3 ; NOPE, DO NORMAL PROCESSING
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.DB $ED,$71 ; SC
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.DW $FFFF ; SC PARAMETER (SET ABOVE)
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;PUSH AF
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;LD A,']'
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;.DB $ED,$71 ; SC
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;.DW COUT ; SC PARAMETER
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;POP AF
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;PUSH AF
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;LD A,(HB_INVBNK)
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;LD (HB_CURBNK),A
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;POP AF
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RET
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#ENDIF
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.DW HBX_BNKCALL2 ; CALL HERE IN SYSTEM MODE
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RET ; THEN RETURN
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HBX_BNKCALL2:
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LD (HBX_TGTBNK),A ; STUFF TARGET BANK TO CALL INTO CODE BELOW
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LD (HBX_TGTADR),IX ; STUFF ADDRESS TO CALL INTO CODE BELOW
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HB_EI ; INTS ARE OK
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LD (HBX_BNKCALL_GO+1),IX ; SETUP DEST ADR
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.DB $ED,$65 ; PCACHE (CRITICAL!!!)
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HBX_BNKCALL_GO:
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JP $FFFF ; DO THE REAL WORK AND RETURN
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#ENDIF
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HBX_BNKCALL3:
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LD (HBX_BNKCALL_BNK+1),A ; STUFF TARGET BANK TO CALL INTO CODE BELOW
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LD (HBX_BNKCALL_ADR+1),IX ; STUFF ADDRESS TO CALL INTO CODE BELOW
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LD A,(HB_CURBNK) ; GET CURRENT BANK
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PUSH AF ; SAVE FOR RETURN
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HBX_TGTBNK .EQU $ + 1
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HBX_BNKCALL_BNK:
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LD A,$FF ; LOAD BANK TO CALL ($FF OVERLAID AT ENTRY)
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CALL HBX_BNKSEL ; ACTIVATE THE NEW BANK
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HBX_TGTADR .EQU $ + 1
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HBX_BNKCALL_ADR:
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CALL $FFFF ; CALL ROUTINE ($FFFF IS OVERLAID ABOVE)
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EX (SP),HL ; SAVE HL AND GET BANK TO RESTORE IN HL
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PUSH AF ; SAVE AF
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@@ -4390,7 +4365,7 @@ W_MMU1:
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.DB $ED,$BF ; OUTW (C),HL
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W_MMU2:
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;.DB $ED,$65 ; PCACHE
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LD L,0 ; RESTORE I/O PAGE REG TO 0
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LD L,$00 ; RESTORE I/O PAGE REG TO 0
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LD C,Z280_IOPR
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.DB $ED,$6E ; LDCTL (C),HL
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POP BC
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@@ -4450,7 +4425,7 @@ Z2DMALOOP:
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JR NZ,Z2DMALOOP ; LOOP WHILE ACTIVE
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; RETURN TO I/O PAGE $00
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XOR A ; I/O PAGE ZERO
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LD L,$00 ; RESTORE I/O PAGE REG TO 0
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LD C,Z280_IOPR ; I/O PAGE REGISTER
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.DB $ED,$6E ; LDCTL (C),HL
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@@ -410,21 +410,53 @@ Z2U_OST:
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; CAN AVOID ENABLING/DISABLING INTS.
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;
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Z2U_INITDEV:
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Z2U_INITSAFE:
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HB_DI ; DISABLE INTS
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CALL Z2U_INITDEVX ; DO THE WORK
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HB_EI ; INTS BACK ON
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RET ; DONE
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;
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Z2U_INITSAFE:
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LD E,%11000010 ; 8N0, DIV 16, NO C/T
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JR Z2U_INITDEV2 ; YES, DO IT
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;
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Z2U_INITDEVX:
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;
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LD A,D ; HIWORD OF CONFIG
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AND $1F ; ISOLATE BAUD RATE
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PUSH AF
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;
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LD DE,Z2UOSC >> 16 ; BAUD OSC HI WORD
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LD HL,Z2UOSC & $FFFF ; BAUD OSC LO WORD
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LD C,75 ; BAUD RATE ENCODE CONSTANT
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CALL ENCODE ; C = ENCODED OSC
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POP DE ; D = UART OSC
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JR NZ,Z2U_INITFAIL ; HANDLE ENCODE FAILURE
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LD A,C ; TO A
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SUB D ; DIV W/ SUB OF SQUARES
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;
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LD E,%11000010 ; 8N0, DIV 16, NO C/T
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CP 4 ; DIV 16?
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JR Z,Z2U_INITDEV2 ; YES, DO IT
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LD E,%11000100 ; 8N0, DIV 32, NO C/T
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CP 5 ; DIV 32?
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JR Z,Z2U_INITDEV2 ; YES, DO IT
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LD E,%11000110 ; 8N0, DIV 64, NO C/T
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CP 6 ; DIV 64?
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JR Z,Z2U_INITDEV2 ; YES, DO IT
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;
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Z2U_INITFAIL:
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OR $FF ; SIGNAL ERROR
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RET ; AND DONE
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;
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Z2U_INITDEV2:
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; START BY SELECTING I/O PAGE $FE
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LD L,$FE ; Z280 UART REGISTERS AT I/O PAGE $FE
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LD C,Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER
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.DB $ED,$6E ; LDCTL (C),HL
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;
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; SETUP
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LD A,%11000010 ; 8N0, DIV 16, NO C/T
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;LD A,%11000010 ; 8N0, DIV 16, NO C/T
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LD A,E ; CONFIG VALUE
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OUT (Z280_UARTCFG),A ; SET CONFIG REGISTER
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LD A,%10000000 ; ENABLE, NO INTS, 1 STOP BITS
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OUT (Z280_UARTXCTL),A ; SET CONFIG REGISTER
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@@ -2,4 +2,4 @@
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#DEFINE RMN 1
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#DEFINE RUP 1
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#DEFINE RTP 0
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#DEFINE BIOSVER "3.1.1-pre.35"
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#DEFINE BIOSVER "3.1.1-pre.36"
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@@ -3,5 +3,5 @@ rmn equ 1
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rup equ 1
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rtp equ 0
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biosver macro
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db "3.1.1-pre.35"
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db "3.1.1-pre.36"
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endm
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