Added Diagnostic Port Support

This commit is contained in:
Wayne Warthen
2018-05-24 09:28:21 -07:00
parent 05641bdec0
commit 99b8409738
2 changed files with 32 additions and 3 deletions

View File

@@ -6,8 +6,8 @@
#include "cfg_rc180.asm" #include "cfg_rc180.asm"
; ;
Z180_CLKDIV .SET 1 ; 0=OSC/2, 1=OSC, 2=OSC*2 Z180_CLKDIV .SET 1 ; 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; MEMORY WAIT STATES TO INSERT (0-3) Z180_MEMWAIT .SET 3 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .SET 1 ; IO WAIT STATES TO INSERT (0-3) Z180_IOWAIT .SET 3 ; IO WAIT STATES TO INSERT (0-3)
; ;
CPUOSC .SET 18432000 ; CPU OSC FREQ CPUOSC .SET 18432000 ; CPU OSC FREQ
DEFSERCFG .SET SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE) DEFSERCFG .SET SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE)

View File

@@ -67,12 +67,25 @@ MODCNT .SET MODCNT + 1
; ;
; ;
; ;
; #DEFINE DIAGP $00
;
#IFDEF DIAGP
#DEFINE DIAG(N) PUSH AF
#DEFCONT \ LD A,N
#DEFCONT \ OUT (DIAGP),A
#DEFCONT \ POP AF
#ELSE
#DEFINE DIAG(N) \;
#ENDIF
;
;
;
#IF (INTMODE == 0) #IF (INTMODE == 0)
; NO INTERRUPT HANDLING ; NO INTERRUPT HANDLING
#DEFINE HB_DI DI #DEFINE HB_DI DI
#DEFINE HB_EI ; #DEFINE HB_EI ;
#ELSE #ELSE
; MODE 1 OR 2 INTERRUPT HANDLING ; MODE 1 OR 2 INTERRUPT HANDLING
#DEFINE HB_DI DI #DEFINE HB_DI DI
#DEFINE HB_EI EI #DEFINE HB_EI EI
#ENDIF #ENDIF
@@ -635,6 +648,8 @@ HB_START:
DI ; NO INTERRUPTS DI ; NO INTERRUPTS
IM 1 ; INTERRUPT MODE 1 IM 1 ; INTERRUPT MODE 1
LD SP,HBX_LOC ; SETUP INITIAL STACK JUST BELOW HBIOS PROXY LD SP,HBX_LOC ; SETUP INITIAL STACK JUST BELOW HBIOS PROXY
DIAG(%00000001)
; ;
#IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4) | (PLATFORM == PLT_RC180)) #IF ((PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4) | (PLATFORM == PLT_RC180))
; SET BASE FOR CPU IO REGISTERS ; SET BASE FOR CPU IO REGISTERS
@@ -700,6 +715,8 @@ HB_START:
LD A,1 LD A,1
OUT (MPGENA),A OUT (MPGENA),A
#ENDIF #ENDIF
;
DIAG(%00000011)
; ;
; INSTALL PROXY IN UPPER MEMORY ; INSTALL PROXY IN UPPER MEMORY
; ;
@@ -756,6 +773,8 @@ HB_RAMFLAG .DB FALSE ; INITIALLY FALSE, SET TO TRUE BELOW AFTER RAM TRANSITION
; EXECUTION RESUMES HERE AFTER SWITCH TO RAM BANK ; EXECUTION RESUMES HERE AFTER SWITCH TO RAM BANK
; ;
HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
;
DIAG(%00000111)
; ;
LD SP,HBX_LOC ; RESET STACK SINCE WE DO NOT RETURN LD SP,HBX_LOC ; RESET STACK SINCE WE DO NOT RETURN
LD A,TRUE ; ACCUM := TRUE LD A,TRUE ; ACCUM := TRUE
@@ -785,6 +804,8 @@ HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
LD (HL),$4D LD (HL),$4D
#ENDIF #ENDIF
#ENDIF #ENDIF
;
DIAG(%00001111)
; ;
; PERFORM DYNAMIC CPU SPEED DERIVATION ; PERFORM DYNAMIC CPU SPEED DERIVATION
; ;
@@ -799,6 +820,8 @@ HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
#ENDIF #ENDIF
; ;
CALL DELAY_INIT ; INITIALIZE SPEED COMPENSATED DELAY FUNCTIONS CALL DELAY_INIT ; INITIALIZE SPEED COMPENSATED DELAY FUNCTIONS
;
DIAG(%00011111)
; ;
; INITIALIZE HEAP STORAGE ; INITIALIZE HEAP STORAGE
; ;
@@ -810,6 +833,8 @@ HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
LD BC,BNKTOP - HB_END ; MAX SIZE OF HEAP LD BC,BNKTOP - HB_END ; MAX SIZE OF HEAP
LD A,$FF ; FILL WITH $FF LD A,$FF ; FILL WITH $FF
CALL FILL ; DO IT CALL FILL ; DO IT
;
DIAG(%00111111)
; ;
; PRE-CONSOLE INITIALIZATION ; PRE-CONSOLE INITIALIZATION
; ;
@@ -825,6 +850,8 @@ HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
#IF (ACIAENABLE) #IF (ACIAENABLE)
CALL ACIA_PREINIT CALL ACIA_PREINIT
#ENDIF #ENDIF
;
DIAG(%01111111)
; ;
; PRIOR TO THIS POINT, CONSOLE I/O WAS DIRECTED TO HARDWARE (XIO.ASM). ; PRIOR TO THIS POINT, CONSOLE I/O WAS DIRECTED TO HARDWARE (XIO.ASM).
; NOW THAT HBIOS IS READY, SET THE CONSOLE UNIT TO ACTIVATE CONSOLE I/O ; NOW THAT HBIOS IS READY, SET THE CONSOLE UNIT TO ACTIVATE CONSOLE I/O
@@ -838,6 +865,8 @@ HB_START1: ; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
CALL NEWLINE2 CALL NEWLINE2
PRTX(STR_BANNER) PRTX(STR_BANNER)
; ;
DIAG(%11111111)
;
; IO PORT SCAN ; IO PORT SCAN
; ;
#IF 0 #IF 0