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@ -3,19 +3,18 @@ |
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; UART DRIVER (SERIAL PORT) |
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;================================================================================================== |
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; |
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; Setup Parameter Word: |
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; _______________________________ _______________________________ |
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; | | | encoded || | | | | | |
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; | |rts| Baud Rate ||dtr|xon| parity |stp| 8/7/6 | |
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; |_______|___|___|_______________||___|___|___________|___|_______| |
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; 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 |
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; D register E register |
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; |
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; _______________________________ _______________________________ |
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; | | | || | | | | | |
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; | 0 0 |AFE|LP OT2 OT1 RTS DTR||DLB|BRK|STK EPS PEN|STB| WLS | |
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; |_______|___|___________________||___|___|___________|___|_______| |
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; 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 |
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; SETUP PARAMETER WORD: |
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; +-------+---+-------------------+ +---+---+-----------+---+-------+ |
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; | |RTS| ENCODED BAUD RATE | |DTR|XON| PARITY |STP| 8/7/6 | |
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; +-------+---+---+---------------+ ----+---+-----------+---+-------+ |
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; F E D C B A 9 8 7 6 5 4 3 2 1 0 |
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; -- MSB (D REGISTER) -- -- LSB (E REGISTER) -- |
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; |
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; UART CONFIGURATION REGISTERS: |
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; +-------+---+-------------------+ +---+---+-----------+---+-------+ |
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; | 0 0 |AFE|LP OT2 OT1 RTS DTR| |DLB|BRK|STK EPS PEN|STB| WLS | |
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; +-------+---+-------------------+ +---+---+-----------+---+-------+ |
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; F E D C B A 9 8 7 6 5 4 3 2 1 0 |
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; -- MCR -- -- LCR -- |
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; |
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; |
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@ -46,20 +45,16 @@ UART_SCR .EQU 7 ; SCRATCH REGISTER (READ/WRITE) |
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UART_DLL .EQU 0 ; DLAB=1: DIVISOR LATCH (LS) (READ/WRITE) |
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UART_DLM .EQU 1 ; DLAB=1: DIVISOR LATCH (MS) (READ/WRITE) |
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UART_EFR .EQU 2 ; LCR=$BF: ENHANCED FEATURE REG (READ/WRITE) |
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; |
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UART_FIFO .EQU 0 ; FIFO ENABLE BIT |
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UART_AFC .EQU 1 ; AUTO FLOW CONTROL ENABLE BIT |
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;; |
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;UART_FIFO .EQU 0 ; FIFO ENABLE BIT |
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;UART_AFC .EQU 1 ; AUTO FLOW CONTROL ENABLE BIT |
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; |
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#DEFINE UART_INP(RID) CALL UART_INP_IMP \ .DB RID |
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#DEFINE UART_OUTP(RID) CALL UART_OUTP_IMP \ .DB RID |
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; |
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; CHARACTER DEVICE DRIVER ENTRY |
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; A: RESULT (OUT), CF=ERR |
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; B: FUNCTION (IN) |
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; C: CHARACTER (IN/OUT) |
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; E: DEVICE/UNIT (IN) |
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; |
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UART_INIT: |
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; |
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UART_PREINIT: |
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; |
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; INIT UART4 BOARD CONFIG REGISTER (NO HARM IF IT IS NOT THERE) |
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; |
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@ -68,11 +63,11 @@ UART_INIT: |
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; |
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; SETUP THE DISPATCH TABLE ENTRIES |
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; |
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LD B,UARTCNT ; LOOP CONTROL |
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LD B,UART_CNT ; LOOP CONTROL |
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LD C,0 ; PHYSICAL UNIT INDEX |
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XOR A ; ZERO TO ACCUM |
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LD (UART_DEV),A ; CURRENT DEVICE NUMBER |
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UART_INIT0: |
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UART_PREINIT0: |
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PUSH BC ; SAVE LOOP CONTROL |
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LD A,C ; PHYSICAL UNIT TO A |
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RLCA ; MULTIPLY BY CFG TABLE ENTRY SIZE (8 BYTES) |
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@ -83,39 +78,28 @@ UART_INIT0: |
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PUSH HL ; SAVE IT |
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PUSH HL ; COPY CFG DATA PTR |
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POP IY ; ... TO IY |
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CALL UART_INITP ; HAND OFF TO GENERIC INIT CODE |
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CALL UART_INITUNIT ; HAND OFF TO GENERIC INIT CODE |
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POP DE ; GET ENTRY ADDRESS BACK, BUT PUT IN DE |
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POP BC ; RESTORE LOOP CONTROL |
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; |
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LD A,(IY + 1) ; GET THE UART TYPE DETECTED |
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OR A ; SET FLAGS |
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JR Z,UART_INIT1 ; SKIP IT IF NOTHING FOUND |
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JR Z,UART_PREINIT2 ; SKIP IT IF NOTHING FOUND |
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; |
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PUSH BC ; SAVE LOOP CONTROL |
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LD BC,UART_DISPATCH ; BC := DISPATCH ADDRESS |
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CALL NZ,CIO_ADDENT ; ADD ENTRY IF UART FOUND, BC:DE |
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POP BC ; RESTORE LOOP CONTROL |
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; |
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UART_INIT1: |
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UART_PREINIT2: |
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INC C ; NEXT PHYSICAL UNIT |
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DJNZ UART_INIT0 ; LOOP UNTIL DONE |
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DJNZ UART_PREINIT0 ; LOOP UNTIL DONE |
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XOR A ; SIGNAL SUCCESS |
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RET ; AND RETURN |
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; |
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; UART INITIALIZATION ROUTINE |
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; |
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UART_INITP: |
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; WAIT FOR ANY IN-FLIGHT DATA TO BE SENT |
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LD B,0 ; LOOP TIMEOUT COUNTER |
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UART_INITP1: |
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UART_INP(UART_LSR) ; GET LINE STATUS REGISTER |
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BIT 6,A ; TEST BIT 6 (TRANSMITTER EMPTY) |
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JR NZ,UART_INITP2 ; EMPTY, CONTINUE |
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LD DE,100 ; DELAY 100 * 16US |
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CALL VDELAY ; NORMALIZE TIMEOUT TO CPU SPEED |
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DJNZ UART_INITP1 ; KEEP CHECKING UNTIL TIMEOUT |
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UART_INITP2: |
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UART_INITUNIT: |
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; DETECT THE UART TYPE |
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CALL UART_DETECT ; DETERMINE UART TYPE |
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LD (IY + 1),A ; ALSO SAVE IN CONFIG TABLE |
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@ -130,10 +114,36 @@ UART_INITP2: |
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; SET DEFAULT CONFIG |
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LD DE,-1 ; LEAVE CONFIG ALONE |
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CALL UART_INITDEV ; IMPLEMENT IT |
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JP UART_INITDEV ; IMPLEMENT IT AND RETURN |
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; |
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; |
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; |
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; |
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UART_INIT: |
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LD B,UART_CNT ; COUNT OF POSSIBLE UART UNITS |
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LD C,0 ; INDEX INTO UART CONFIG TABLE |
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UART_INIT1: |
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PUSH BC ; SAVE LOOP CONTROL |
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LD A,C ; PHYSICAL UNIT TO A |
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RLCA ; MULTIPLY BY CFG TABLE ENTRY SIZE (8 BYTES) |
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RLCA ; ... |
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RLCA ; ... TO GET OFFSET INTO CFG TABLE |
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LD HL,UART_CFG ; POINT TO START OF CFG TABLE |
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CALL ADDHLA ; HL := ENTRY ADDRESS |
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PUSH HL ; COPY CFG DATA PTR |
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POP IY ; ... TO IY |
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LD A,(IY + 1) ; GET UART TYPE |
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OR A ; SET FLAGS |
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CALL NZ,UART_PRTCFG ; PRINT IF NOT ZERO |
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; DISPLAY UART CONFIG AND RETURN |
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JP UART_PRTCFG |
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POP BC ; RESTORE LOOP CONTROL |
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INC C ; NEXT UNIT |
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DJNZ UART_INIT1 ; LOOP TILL DONE |
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; |
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XOR A ; SIGNAL SUCCESS |
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RET ; DONE |
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; |
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; |
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; |
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@ -239,8 +249,9 @@ UART_INITDEV1: |
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LD A,%00100111 ; FIFO ENABLE & RESET, 64 BYTE FIFO ENABLE ON 750+ |
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UART_OUTP(UART_FCR) ; DO IT |
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; |
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; SETUP LCR TO DEFAULT (DLAB IS CLEARED) |
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LD A,$03 ; DLAB OFF, 8 DATA, 1 STOP, NO PARITY |
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; SETUP LCR FROM SECOND CONFIG BYTE (DLAB IS CLEARED) |
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LD A,(IY + 4) ; GET CONFIG BYTE |
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AND ~$C0 ; ISOLATE PARITY, STOP/DATA BITS |
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UART_OUTP(UART_LCR) ; SAVE IT |
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; |
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; SETUP MCR FROM FIRST CONFIG BYTE |
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@ -248,10 +259,6 @@ UART_INITDEV1: |
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AND ~$1F ; REMOVE ENCODED BAUD RATE BITS |
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OR $03 ; FORCE RTS & DTR |
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UART_OUTP(UART_MCR) ; SAVE IT |
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; |
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; SPECIAL HANDLING FOR AFC ON UARTS WITH EFR REGISTER |
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BIT 5,A ; IS FLOW CONTOL REQUESTED? |
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JR Z,UART_INITDEV3 ; NOPE, SKIP AHEAD |
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; |
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; TEST FOR EFR CAPABLE CHIPS |
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LD A,(IY + 1) ; GET UART TYPE |
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@ -259,20 +266,26 @@ UART_INITDEV1: |
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JR Z,UART_INITDEV2 ; USE EFR REGISTER |
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CP UART_16850 ; 16850? |
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JR Z,UART_INITDEV2 ; USE EFR REGISTER |
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JR UART_INITDEV3 ; NO EFT, SKIP AHEAD |
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JR UART_INITDEV4 ; NO EFT, SKIP AHEAD |
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; |
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UART_INITDEV2: |
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; WE HAVE AN EFR CAPABLE CHIP, SET AUTOFLOW IN EFR REGISTER |
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; WE HAVE AN EFR CAPABLE CHIP, SET EFR REGISTER |
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UART_INP(UART_LCR) ; GET CURRENT LCR VALUE |
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PUSH AF ; SAVE IT |
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LD A,$BF ; VALUE TO ACCESS EFR |
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UART_OUTP(UART_LCR) ; SET VALUE IN LCR |
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LD A,$C0 ; ENABLE CTS/RTS FLOW CONTROL |
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LD A,(IY + 5) ; GET CONFIG BYTE |
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BIT 5,A ; AFC REQUESTED? |
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LD A,$C0 ; ASSUME AFC ON |
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JR NZ,UART_INITDEV3 ; YES, IMPLEMENT IT |
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XOR A ; NO AFC REQEUST, EFR := 0 |
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; |
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UART_INITDEV3: |
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UART_OUTP(UART_EFR) ; SAVE IT |
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POP AF ; RECOVER ORIGINAL LCR VALUE |
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UART_OUTP(UART_LCR) ; AND SAVE IT |
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UART_OUTP(UART_LCR) ; AND PUT IT BACK |
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; |
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UART_INITDEV3: |
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UART_INITDEV4: |
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#IF (UART_DEBUG) |
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PRTS(" [$") |
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@ -327,7 +340,7 @@ UART_QUERY: |
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; |
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UART_DEVICE: |
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LD D,CIODEV_UART ; D := DEVICE TYPE |
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LD E,C ; E := PHYSICAL UNIT |
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LD E,(IY) ; E := PHYSICAL UNIT |
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XOR A ; SIGNAL SUCCESS |
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RET |
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; |
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@ -496,13 +509,13 @@ UART_PRTCFG: |
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; ; PRINT FEATURES ENABLED |
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; LD A,(UART_FEAT) |
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; BIT UART_FIFO,A |
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; JR Z,UART_INITP2 |
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; JR Z,UART_INITUNIT2 |
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; PRTS(" FIFO$") |
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;UART_INITP2: |
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;UART_INITUNIT2: |
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; BIT UART_AFC,A |
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; JR Z,UART_INITP3 |
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; JR Z,UART_INITUNIT3 |
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; PRTS(" AFC$") |
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;UART_INITP3: |
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;UART_INITUNIT3: |
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; |
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XOR A |
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RET |
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@ -570,67 +583,68 @@ UART_DEV .DB 0 ; DEVICE NUM USED DURING INIT |
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; UART PORT TABLE |
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; |
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UART_CFG: |
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#IF (UARTCNT >= 1) |
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#IF ((PLATFORM == PLT_SBC) | (PLATFORM == PLT_ZETA) | (PLATFORM == PLT_ZETA2)) |
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; SBC/ZETA ONBOARD SERIAL PORT |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UART0IOB ; IO PORT BASE (RBR, THR) |
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.DB UART0IOB + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UART0CFG ; LINE CONFIGURATION |
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.DB $68 ; IO PORT BASE (RBR, THR) |
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.DB $68 + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW DEFSERCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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#ENDIF |
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#IF (UARTCNT >= 2) |
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#IF (PLATFORM == PLT_SBC) | (PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) |
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; CASSETTE INTERFACE SERIAL PORT |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UART1IOB ; IO PORT BASE (RBR, THR) |
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.DB UART1IOB + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UART1CFG ; LINE CONFIGURATION |
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.DB $80 ; IO PORT BASE (RBR, THR) |
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.DB $80 + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW SER_300_8N1 ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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#ENDIF |
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#IF (UARTCNT >= 3) |
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#IF (PLATFORM == PLT_SBC) |
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; MF/PIC SERIAL PORT |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UART2IOB ; IO PORT BASE (RBR, THR) |
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.DB UART2IOB + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UART2CFG ; LINE CONFIGURATION |
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.DB $48 ; IO PORT BASE (RBR, THR) |
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.DB $48 + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW DEFSERCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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#ENDIF |
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#IF (UARTCNT >= 4) |
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#IF (PLATFORM == PLT_SBC) | (PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) |
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; 4UART SERIAL PORT A |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UART3IOB ; IO PORT BASE (RBR, THR) |
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.DB UART3IOB + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UART3CFG ; LINE CONFIGURATION |
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.DB $C0 ; IO PORT BASE (RBR, THR) |
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.DB $C0 + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW DEFSERCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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#ENDIF |
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#IF (UARTCNT >= 5) |
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#IF (PLATFORM == PLT_SBC) | (PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) |
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; 4UART SERIAL PORT B |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UART4IOB ; IO PORT BASE (RBR, THR) |
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.DB UART4IOB + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UART4CFG ; LINE CONFIGURATION |
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.DB $C8 ; IO PORT BASE (RBR, THR) |
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.DB $C8 + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW DEFSERCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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#ENDIF |
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#IF (UARTCNT >= 6) |
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#IF (PLATFORM == PLT_SBC) | (PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) |
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; 4UART SERIAL PORT C |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UART5IOB ; IO PORT BASE (RBR, THR) |
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.DB UART5IOB + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UART5CFG ; LINE CONFIGURATION |
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.DB $D0 ; IO PORT BASE (RBR, THR) |
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.DB $D0 + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW DEFSERCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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#ENDIF |
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#IF (UARTCNT >= 7) |
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#IF (PLATFORM == PLT_SBC) | (PLATFORM == PLT_N8) | (PLATFORM == PLT_MK4)) |
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; 4UART SERIAL PORT D |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UART6IOB ; IO PORT BASE (RBR, THR) |
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.DB UART6IOB + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UART6CFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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#ENDIF |
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#IF (UARTCNT >= 8) |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; UART TYPE |
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.DB UART7IOB ; IO PORT BASE (RBR, THR) |
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.DB UART7IOB + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW UART7CFG ; LINE CONFIGURATION |
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.DB $D8 ; IO PORT BASE (RBR, THR) |
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.DB $D8 + UART_LSR ; LINE STATUS PORT (LSR) |
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.DW DEFSERCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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#ENDIF |
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; |
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UART_CNT .EQU ($ - UART_CFG) / 8 |
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Wayne Warthen
10 years ago