MirrorRepos
/
RomWBW
mirror of https://github.com/wwarthen/RomWBW.git
1
0
Fork 1
Code Issues Projects Releases Wiki Activity
Browse Source

Resync

pull/38/head
b1ackmai1er 7 years ago
parent
cf9d077057
commit
a3844a0149
16 changed files with 79 additions and 95 deletions
Whitespace
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Unified View
Diff Options
Show Stats Download Patch File Download Diff File
  1. 52
      Doc/ReadMe.txt
  2. 2
      ReadMe.txt
  3. 17
      Source/HBIOS/cfg_ezz80.asm
  4. 13
      Source/HBIOS/cfg_mk4.asm
  5. 7
      Source/HBIOS/cfg_n8.asm
  6. 26
      Source/HBIOS/cfg_rcz180.asm
  7. 17
      Source/HBIOS/cfg_rcz80.asm
  8. 19
      Source/HBIOS/cfg_sbc.asm
  9. 3
      Source/HBIOS/cfg_zeta.asm
  10. 1
      Source/HBIOS/plt_ezz80.inc
  11. 1
      Source/HBIOS/plt_rcz180.inc
  12. 1
      Source/HBIOS/plt_rcz80.inc
  13. 6
      Source/HBIOS/plt_sbc.inc
  14. 3
      Source/HBIOS/plt_zeta.inc
  15. 3
      Source/HBIOS/plt_zeta2.inc
  16. 3
      Source/HBIOS/std.asm

52
Doc/ReadMe.txt
View File

@ -1,52 +0,0 @@
***********************************************************************
*** ***
*** R o m W B W ***
*** ***
*** Z80/Z180 System Software ***
*** ***
***********************************************************************
This directory ("Doc") is part of the RomWBW System Software
distribution archive. It contains documentation for components of
the system.
CPM Manual ("CPM Manual.pdf")
-----------------------------
The original DRI CP/M 2.x Operating System Manual. This should be
considered the primary reference for system operation. The section
on CP/M 2 Alteration can be ignored since this work has already been
completed as part of the RomWBW distribution.
DDTZ Manual ("DDTZ.doc")
------------------------
Manual for the DDTZ v2.7 debug tool included on the ROM drive.
FDisk Manual ("FDisk Manual.pdf")
---------------------------------
The operational manual for John Coffman's hard disk partitioning
program. This program is included in RomWBW as FDISK80.
RomWBW Architecture ("RomWBW Architecture.pdf")
-----------------------------------------------
Document describing the architecture of the RomWBW HBIOS. It
includes reference information for the HBIOS calls.
ZCPR Manual ("ZCPR Manual.pdf")
-------------------------------
ZCPR is the command proccessor portion of Z-System. This is the
manual for ZCPR 1.x as included in RomWBW. The installation
instructions can be ignored since that work has already been
completed as part of the RomWBW distribution.
ZSDOS Manual ("ZSDOS Manual.pdf")
---------------------------------
ZSDOS is the DOS portion of Z-System. This is the manual fo ZSDOS
1.x as included in RomWBW. The installation instructions can be
ignored since that work has already been completed as part of the
RomWBW distribution.

2
ReadMe.txt
View File

@ -7,7 +7,7 @@
*********************************************************************** ***********************************************************************
Wayne Warthen (wwarthen@gmail.com) Wayne Warthen (wwarthen@gmail.com)
Version 2.9.2-pre, 2019-06-21
Version 2.9.2-pre.1, 2019-07-22
https://www.retrobrewcomputers.org/ https://www.retrobrewcomputers.org/
RomWBW is a ROM-based implementation of CP/M-80 2.2 and Z-System for RomWBW is a ROM-based implementation of CP/M-80 2.2 and Z-System for

17
Source/HBIOS/cfg_ezz80.asm
View File

@ -10,6 +10,8 @@ MEMMGR .EQU MM_Z2 ; MM_NONE, MM_SBC, MM_Z2, MM_N8, MM_Z180
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE) DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE)
INTMODE .EQU 2 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2 INTMODE .EQU 2 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2
DIAGENABLE .EQU FALSE ; TRUE FOR DIAGNOSTIC CODE PORT OUTPUT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
; ;
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
@ -28,12 +30,18 @@ UARTOSC .EQU 1843200 ; UART OSC FREQUENCY
ACIAENABLE .EQU FALSE ; TRUE FOR MOTOROLA 6850 ACIA SUPPORT ACIAENABLE .EQU FALSE ; TRUE FOR MOTOROLA 6850 ACIA SUPPORT
; ;
SIOENABLE .EQU TRUE ; TRUE FOR ZILOG SIO SUPPORT SIOENABLE .EQU TRUE ; TRUE FOR ZILOG SIO SUPPORT
SIOMODE .EQU SIOMODE_EZZ80 ; SIOMODE_RC, SIOMODE_SMB, SIOMODE_ZP
DEFSIOACFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
DEFSIOBCFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
SIODEBUG .EQU FALSE ; PS
DEFSIODIV .EQU 1 ; 1=RC2014/SMB, 2/4/8/16/32/64/128/256=ZP depending on jumper X5 DEFSIODIV .EQU 1 ; 1=RC2014/SMB, 2/4/8/16/32/64/128/256=ZP depending on jumper X5
DEFSIOCLK .EQU 1843200 ; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY DEFSIOCLK .EQU 1843200 ; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY
SIODEBUG .EQU FALSE ;PS
SIOCNT .EQU 1 ; 1 OR 2 SIO CHIPS (EACH CHIP HAS 2 CHANNELS)
SIO0MODE .EQU SIOMODE_EZZ80 ; TYPE OF FIRST SIO TO DETECT: SIOMODE_RC/SMB/ZP/EZZ80
SIO1MODE .EQU SIOMODE_RC ; TYPE OF SECOND SIO TO DETECT: SIOMODE_RC, SIOMODE_SMB
SIO0BASE .EQU $80 ; IO PORT ADDRESS BASE FOR FIRST SIO CHIP
SIO1BASE .EQU $84 ; IO PORT ADDRESS BASE FOR SECOND SIO CHIP
DEFSIO0ACFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
DEFSIO0BCFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
DEFSIO1ACFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
DEFSIO1BCFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
; ;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
@ -91,3 +99,4 @@ PIO_ZP .EQU FALSE ; TRUE FOR ECB-ZILOG PERIPHERALS BOARD
PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE) PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE)
; ;
UFENABLE .EQU FALSE ; TRUE FOR ECB USB-FIFO SUPPORT UFENABLE .EQU FALSE ; TRUE FOR ECB USB-FIFO SUPPORT

13
Source/HBIOS/cfg_mk4.asm
View File

@ -10,6 +10,8 @@ MEMMGR .EQU MM_Z180 ; MM_NONE, MM_SBC, MM_Z2, MM_N8, MM_Z180
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE) DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE)
INTMODE .EQU 2 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2 INTMODE .EQU 2 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2
DIAGENABLE .EQU FALSE ; TRUE FOR DIAGNOSTIC CODE PORT OUTPUT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
; ;
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
@ -26,7 +28,6 @@ ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTOSC .EQU 1843200 ; UART OSC FREQUENCY UARTOSC .EQU 1843200 ; UART OSC FREQUENCY
SIOENABLE .EQU FALSE ; TRUE FOR ZILOG SIO/2 SUPPORT SIOENABLE .EQU FALSE ; TRUE FOR ZILOG SIO/2 SUPPORT
SIOMODE .EQU SIOMODE_RC ; SIOMODE_RC, SIOMODE_SMB
ACIAENABLE .EQU FALSE ; TRUE FOR MOTOROLA 6850 ACIA SUPPORT ACIAENABLE .EQU FALSE ; TRUE FOR MOTOROLA 6850 ACIA SUPPORT
; ;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
@ -70,7 +71,6 @@ SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE
SDCSIOFAST .EQU TRUE ; TABLE-DRIVEN BIT INVERTER SDCSIOFAST .EQU TRUE ; TABLE-DRIVEN BIT INVERTER
; ;
PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SUPPORT PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SUPPORT
PRPIOB .EQU $A8 ; PORT IO ADDRESS BASE
PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT PRPSDENABLE .EQU TRUE ; TRUE FOR PROPIO SD SUPPORT
PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE) PRPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PRPSDENABLE = TRUE)
PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO) PRPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO)
@ -98,17 +98,18 @@ BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
; 18.432MHz OSC @ FULL SPEED ; 18.432MHz OSC @ FULL SPEED
; ;
Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2 Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .EQU 0 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3)
Z180_MEMWAIT .EQU 0 ; MEMORY WAIT STATES (0-3)
Z180_IOWAIT .EQU 1 ; ADD (0-3) I/O WAIT STATES ABOVE 1 W/S BUILT-IN
; ;
; 18.432MHz OSC @ DOUBLE SPEED ; 18.432MHz OSC @ DOUBLE SPEED
; ;
;Z180_CLKDIV .EQU 2 ; 0=OSC/2, 1=OSC, 2=OSC*2 ;Z180_CLKDIV .EQU 2 ; 0=OSC/2, 1=OSC, 2=OSC*2
;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
;Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3)
;Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES (0-3)
;Z180_IOWAIT .EQU 1 ; ADD (0-3) I/O WAIT STATES ABOVE 1 W/S BUILT-IN
; ;
PIO_4P .EQU FALSE ; TRUE FOR ECB-4PIO PIO SUPPORT PIO_4P .EQU FALSE ; TRUE FOR ECB-4PIO PIO SUPPORT
PIO_ZP .EQU FALSE ; TRUE FOR ECB-ZILOG PERIPHERALS BOARD PIO_ZP .EQU FALSE ; TRUE FOR ECB-ZILOG PERIPHERALS BOARD
PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE) PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE)
; ;
UFENABLE .EQU FALSE ; TRUE FOR ECB USB-FIFO SUPPORT UFENABLE .EQU FALSE ; TRUE FOR ECB USB-FIFO SUPPORT

7
Source/HBIOS/cfg_n8.asm
View File

@ -10,6 +10,8 @@ MEMMGR .EQU MM_N8 ; MM_NONE, MM_SBC, MM_Z2, MM_N8, MM_Z180
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE) DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE)
INTMODE .EQU 2 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2 INTMODE .EQU 2 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2
DIAGENABLE .EQU FALSE ; TRUE FOR DIAGNOSTIC CODE PORT OUTPUT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
; ;
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
@ -26,7 +28,6 @@ ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU TRUE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTOSC .EQU 1843200 ; UART OSC FREQUENCY UARTOSC .EQU 1843200 ; UART OSC FREQUENCY
SIOENABLE .EQU FALSE ; TRUE FOR ZILOG SIO/2 SUPPORT SIOENABLE .EQU FALSE ; TRUE FOR ZILOG SIO/2 SUPPORT
SIOMODE .EQU SIOMODE_RC ; SIOMODE_RC, SIOMODE_SMB
ACIAENABLE .EQU FALSE ; TRUE FOR MOTOROLA 6850 ACIA SUPPORT ACIAENABLE .EQU FALSE ; TRUE FOR MOTOROLA 6850 ACIA SUPPORT
; ;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
@ -92,8 +93,8 @@ BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE
BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
; ;
Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2 Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 3 ; IO WAIT STATES TO INSERT (0-3)
Z180_MEMWAIT .EQU 1 ; MEMORY WAIT STATES (0-3)
Z180_IOWAIT .EQU 3 ; ADD (0-3) I/O WAIT STATES ABOVE 1 W/S BUILT-IN
; ;
PIO_4P .EQU FALSE ; TRUE FOR ECB-4PIO PIO SUPPORT PIO_4P .EQU FALSE ; TRUE FOR ECB-4PIO PIO SUPPORT
PIO_ZP .EQU FALSE ; TRUE FOR ECB-ZILOG PERIPHERALS BOARD PIO_ZP .EQU FALSE ; TRUE FOR ECB-ZILOG PERIPHERALS BOARD

26
Source/HBIOS/cfg_rcz180.asm
View File

@ -10,6 +10,8 @@ MEMMGR .EQU MM_Z180 ; MM_NONE, MM_SBC, MM_Z2, MM_N8, MM_Z180
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE) DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE)
INTMODE .EQU 2 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2 INTMODE .EQU 2 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2
DIAGENABLE .EQU TRUE ; TRUE FOR DIAGNOSTIC CODE PORT OUTPUT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
; ;
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
@ -25,14 +27,21 @@ DSRTCCHG .EQU FALSE ; DS-1302 CONFIGURE CHARGE ON (TRUE) OR OFF (FALSE)
ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT ASCIENABLE .EQU TRUE ; TRUE FOR Z180 ASCI SUPPORT
UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE)
UARTOSC .EQU 1843200 ; UART OSC FREQUENCY UARTOSC .EQU 1843200 ; UART OSC FREQUENCY
SIOENABLE .EQU FALSE ; TRUE FOR ZILOG SIO/2 SUPPORT
SIOMODE .EQU SIOMODE_RC ; SIOMODE_RC, SIOMODE_SMB
SIODEBUG .EQU FALSE ;PS
DEFSIOACFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG
DEFSIOBCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG
ACIAENABLE .EQU FALSE ; TRUE FOR MOTOROLA 6850 ACIA SUPPORT
;
SIOENABLE .EQU FALSE ; TRUE FOR ZILOG SIO SUPPORT
SIODEBUG .EQU FALSE ; PS
DEFSIODIV .EQU 1 ; 1=RC2014/SMB, 2/4/8/16/32/64/128/256=ZP depending on jumper X5 DEFSIODIV .EQU 1 ; 1=RC2014/SMB, 2/4/8/16/32/64/128/256=ZP depending on jumper X5
DEFSIOCLK .EQU 7372800 ; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY DEFSIOCLK .EQU 7372800 ; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY
ACIAENABLE .EQU FALSE ; TRUE FOR MOTOROLA 6850 ACIA SUPPORT
SIOCNT .EQU 1 ; 1 OR 2 SIO CHIPS (EACH CHIP HAS 2 CHANNELS)
SIO0MODE .EQU SIOMODE_RC ; TYPE OF FIRST SIO TO DETECT: SIOMODE_RC/SMB/ZP/EZZ80
SIO1MODE .EQU SIOMODE_RC ; TYPE OF SECOND SIO TO DETECT: SIOMODE_RC, SIOMODE_SMB
SIO0BASE .EQU $80 ; IO PORT ADDRESS BASE FOR FIRST SIO CHIP
SIO1BASE .EQU $84 ; IO PORT ADDRESS BASE FOR SECOND SIO CHIP
DEFSIO0ACFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
DEFSIO0BCFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
DEFSIO1ACFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
DEFSIO1BCFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
; ;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
@ -88,11 +97,12 @@ BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT
; 18.432MHz OSC @ FULL SPEED ; 18.432MHz OSC @ FULL SPEED
; ;
Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2 Z180_CLKDIV .EQU 1 ; 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .EQU 0 ; MEMORY WAIT STATES TO INSERT (0-3)
Z180_IOWAIT .EQU 1 ; IO WAIT STATES TO INSERT (0-3)
Z180_MEMWAIT .EQU 0 ; MEMORY WAIT STATES (0-3)
Z180_IOWAIT .EQU 1 ; ADD (0-3) I/O WAIT STATES ABOVE 1 W/S BUILT-IN
; ;
PIO_4P .EQU FALSE ; TRUE FOR ECB-4PIO PIO SUPPORT PIO_4P .EQU FALSE ; TRUE FOR ECB-4PIO PIO SUPPORT
PIO_ZP .EQU FALSE ; TRUE FOR ECB-ZILOG PERIPHERALS BOARD PIO_ZP .EQU FALSE ; TRUE FOR ECB-ZILOG PERIPHERALS BOARD
PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE) PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE)
; ;
UFENABLE .EQU FALSE ; TRUE FOR ECB USB-FIFO SUPPORT UFENABLE .EQU FALSE ; TRUE FOR ECB USB-FIFO SUPPORT

17
Source/HBIOS/cfg_rcz80.asm
View File

@ -10,6 +10,8 @@ MEMMGR .EQU MM_Z2 ; MM_NONE, MM_SBC, MM_Z2, MM_N8, MM_Z180
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE) DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE)
INTMODE .EQU 1 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2 INTMODE .EQU 1 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2
DIAGENABLE .EQU TRUE ; TRUE FOR DIAGNOSTIC CODE PORT OUTPUT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
; ;
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
@ -28,12 +30,18 @@ UARTOSC .EQU 1843200 ; UART OSC FREQUENCY
ACIAENABLE .EQU TRUE ; TRUE FOR MOTOROLA 6850 ACIA SUPPORT ACIAENABLE .EQU TRUE ; TRUE FOR MOTOROLA 6850 ACIA SUPPORT
; ;
SIOENABLE .EQU TRUE ; TRUE FOR ZILOG SIO SUPPORT SIOENABLE .EQU TRUE ; TRUE FOR ZILOG SIO SUPPORT
SIOMODE .EQU SIOMODE_RC ; SIOMODE_RC, SIOMODE_SMB, SIOMODE_ZP
DEFSIOACFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
DEFSIOBCFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
SIODEBUG .EQU FALSE ; PS
DEFSIODIV .EQU 1 ; 1=RC2014/SMB, 2/4/8/16/32/64/128/256=ZP depending on jumper X5 DEFSIODIV .EQU 1 ; 1=RC2014/SMB, 2/4/8/16/32/64/128/256=ZP depending on jumper X5
DEFSIOCLK .EQU CPUOSC ; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY DEFSIOCLK .EQU CPUOSC ; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY
SIODEBUG .EQU FALSE ;PS
SIOCNT .EQU 2 ; 1 OR 2 SIO CHIPS (EACH CHIP HAS 2 CHANNELS)
SIO0MODE .EQU SIOMODE_RC ; TYPE OF FIRST SIO TO DETECT: SIOMODE_RC/SMB/ZP/EZZ80
SIO1MODE .EQU SIOMODE_RC ; TYPE OF SECOND SIO TO DETECT: SIOMODE_RC, SIOMODE_SMB
SIO0BASE .EQU $80 ; IO PORT ADDRESS BASE FOR FIRST SIO CHIP
SIO1BASE .EQU $84 ; IO PORT ADDRESS BASE FOR SECOND SIO CHIP
DEFSIO0ACFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
DEFSIO0BCFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
DEFSIO1ACFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
DEFSIO1BCFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
; ;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
@ -91,3 +99,4 @@ PIO_ZP .EQU FALSE ; TRUE FOR ECB-ZILOG PERIPHERALS BOARD
PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE) PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE)
; ;
UFENABLE .EQU FALSE ; TRUE FOR ECB USB-FIFO SUPPORT UFENABLE .EQU FALSE ; TRUE FOR ECB USB-FIFO SUPPORT

19
Source/HBIOS/cfg_sbc.asm
View File

@ -10,6 +10,8 @@ MEMMGR .EQU MM_SBC ; MM_NONE, MM_SBC, MM_Z2, MM_N8, MM_Z180
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE) DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE)
INTMODE .EQU 0 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2 INTMODE .EQU 0 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2
DIAGENABLE .EQU FALSE ; TRUE FOR DIAGNOSTIC CODE PORT OUTPUT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
; ;
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
@ -28,12 +30,18 @@ UARTOSC .EQU 1843200 ; UART OSC FREQUENCY
ACIAENABLE .EQU FALSE ; TRUE FOR MOTOROLA 6850 ACIA SUPPORT ACIAENABLE .EQU FALSE ; TRUE FOR MOTOROLA 6850 ACIA SUPPORT
; ;
SIOENABLE .EQU FALSE ; TRUE FOR ZILOG SIO SUPPORT SIOENABLE .EQU FALSE ; TRUE FOR ZILOG SIO SUPPORT
SIOMODE .EQU SIOMODE_ZP ; SIOMODE_RC, SIOMODE_SMB, SIOMODE_ZP
DEFSIOACFG .EQU SER_9600_8N1 ; DEFAULT SERIAL LINE CONFIG
DEFSIOBCFG .EQU SER_9600_8N1 ; DEFAULT SERIAL LINE CONFIG
DEFSIODIV .EQU 8 ; 1=RC2014, SMB, 2/4/8/16/32/64/128/256 for ZP depending on jumper X5
SIODEBUG .EQU FALSE ; PS
DEFSIODIV .EQU 8 ; 1=RC2014/SMB, 2/4/8/16/32/64/128/256=ZP depending on jumper X5
DEFSIOCLK .EQU 4915200 ; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY DEFSIOCLK .EQU 4915200 ; 2457600/4915200=ZP,7372800=RC/SMB - SIO FIXED OSC FREQUENCY
SIODEBUG .EQU FALSE ;
SIOCNT .EQU 1 ; 1 OR 2 SIO CHIPS (EACH CHIP HAS 2 CHANNELS)
SIO0MODE .EQU SIOMODE_ZP ; TYPE OF FIRST SIO TO DETECT: SIOMODE_RC/SMB/ZP/EZZ80
;SIO1MODE .EQU SIOMODE_ZP ; TYPE OF SECOND SIO TO DETECT: SIOMODE_RC, SIOMODE_SMB
SIO0BASE .EQU $B0 ; IO PORT ADDRESS BASE FOR FIRST SIO CHIP
;SIO1BASE .EQU $84 ; IO PORT ADDRESS BASE FOR SECOND SIO CHIP
DEFSIO0ACFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
DEFSIO0BCFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
;DEFSIO1ACFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
;DEFSIO1BCFG .EQU DEFSERCFG ; DEFAULT SERIAL LINE CONFIG
; ;
VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT
CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT
@ -103,3 +111,4 @@ PIO_ZP .EQU FALSE ; TRUE FOR ECB-ZILOG PERIPHERALS BOARD
PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE) PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE)
; ;
UFENABLE .EQU FALSE ; TRUE FOR ECB USB-FIFO SUPPORT UFENABLE .EQU FALSE ; TRUE FOR ECB USB-FIFO SUPPORT

3
Source/HBIOS/cfg_zeta.asm
View File

@ -10,6 +10,8 @@ MEMMGR .EQU MM_SBC ; MM_NONE, MM_SBC, MM_Z2, MM_N8, MM_Z180
RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!!
DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE) DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE)
INTMODE .EQU 0 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2 INTMODE .EQU 0 ; 0=NONE, 1=INT MODE 1, 2=INT MODE 2
DIAGENABLE .EQU FALSE ; TRUE FOR DIAGNOSTIC CODE PORT OUTPUT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
; ;
CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP
VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...)
@ -82,3 +84,4 @@ PIO_ZP .EQU FALSE ; TRUE FOR ECB-ZILOG PERIPHERALS BOARD
PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE) PPI_SBC .EQU FALSE ; TRUE FOR SBC V2 8255 (IF NOT BEING USED FOR PPIDE)
; ;
UFENABLE .EQU FALSE ; TRUE FOR ECB USB-FIFO SUPPORT UFENABLE .EQU FALSE ; TRUE FOR ECB USB-FIFO SUPPORT

1
Source/HBIOS/plt_ezz80.inc
View File

@ -8,7 +8,6 @@ MPGSEL_3 .EQU $7B ; BANK_3 PAGE SELECT REGISTER (WRITE ONLY)
MPGENA .EQU $7C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY) MPGENA .EQU $7C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY)
; ;
RTC .EQU $C0 ; RTC PORT address RTC .EQU $C0 ; RTC PORT address
SIOBASE .EQU $80 ; RC OR SMB SIO DEFAULT
; ;
WDOG .EQU $6F ; WATCHDOG WDOG .EQU $6F ; WATCHDOG
; ;

1
Source/HBIOS/plt_rcz180.inc
View File

@ -12,6 +12,5 @@ MPGENA .EQU $7C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY)
RTC .EQU $0C ; ADDRESS OF RTC LATCH AND INPUT PORT RTC .EQU $0C ; ADDRESS OF RTC LATCH AND INPUT PORT
; ;
Z180_BASE .EQU $C0 ; I/O BASE ADDRESS FOR INTERNAL Z180 REGISTERS Z180_BASE .EQU $C0 ; I/O BASE ADDRESS FOR INTERNAL Z180 REGISTERS
SIOBASE .EQU $80 ; RC OR SMB SIO DEFAULT
; ;
#INCLUDE "z180.inc" #INCLUDE "z180.inc"

1
Source/HBIOS/plt_rcz80.inc
View File

@ -8,4 +8,3 @@ MPGSEL_3 .EQU $7B ; BANK_3 PAGE SELECT REGISTER (WRITE ONLY)
MPGENA .EQU $7C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY) MPGENA .EQU $7C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY)
; ;
RTC .EQU $C0 ; RTC PORT address RTC .EQU $C0 ; RTC PORT address
SIOBASE .EQU $80 ; RC OR SMB SIO DEFAULT

6
Source/HBIOS/plt_sbc.inc
View File

@ -19,8 +19,8 @@ MPGENA .EQU SBC_BASE + $1C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY)
; ;
RTC .EQU SBC_BASE + $10 ; ADDRESS OF RTC LATCH AND INPUT PORT RTC .EQU SBC_BASE + $10 ; ADDRESS OF RTC LATCH AND INPUT PORT
PPIBASE .EQU SBC_BASE + $00 ; PPI 82C55 I/O IS DECODED TO PORT 60-67 PPIBASE .EQU SBC_BASE + $00 ; PPI 82C55 I/O IS DECODED TO PORT 60-67
SIOBASE .EQU $B0 ; ZILOG PERIPHERALS DEFAULT
PIOZBASE .EQU SIOBASE+8 ; ZILOG PERIPHERALS DEFAULT PIO DEFAULT
PIO4BASE .EQU $90 ; ECB-4PIO DEFAULT PIO DEFAULT
PIOZBASE .EQU $88 ; ZILOG PERIPHERALS DEFAULT PIO DEFAULT
PIO4BASE .EQU $90 ; ECB-4PIO DEFAULT PIO DEFAULT
;
; ;
FIFO_BASE .EQU $0C ; ECB USB-FIFO DEFAULT PORT FIFO_BASE .EQU $0C ; ECB USB-FIFO DEFAULT PORT

3
Source/HBIOS/plt_zeta.inc
View File

@ -9,6 +9,3 @@ MPCL_ROM .EQU SBC_BASE + $1C ; MEMORY PAGER CONFIG LATCH - ROM (WRITE ONLY)
; ;
RTC .EQU SBC_BASE + $10 ; ADDRESS OF RTC LATCH AND INPUT PORT RTC .EQU SBC_BASE + $10 ; ADDRESS OF RTC LATCH AND INPUT PORT
PPIBASE .EQU SBC_BASE + $00 ; PPI 82C55 I/O IS DECODED TO PORT 60-67 PPIBASE .EQU SBC_BASE + $00 ; PPI 82C55 I/O IS DECODED TO PORT 60-67
SIOBASE .EQU $B0 ; ZILOG PERIPHERALS DEFAULT
PIOZBASE .EQU SIOBASE+8 ; ZILOG PERIPHERALS DEFAULT PIO DEFAULT
PIO4BASE .EQU $90 ; ECB-4PIO DEFAULT PIO DEFAULT

3
Source/HBIOS/plt_zeta2.inc
View File

@ -11,9 +11,6 @@ MPGENA .EQU SBC_BASE + $1C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY)
; ;
RTC .EQU SBC_BASE + $10 ; ADDRESS OF RTC LATCH AND INPUT PORT RTC .EQU SBC_BASE + $10 ; ADDRESS OF RTC LATCH AND INPUT PORT
PPIBASE .EQU SBC_BASE + $00 ; PPI 82C55 I/O IS DECODED TO PORT 60-67 PPIBASE .EQU SBC_BASE + $00 ; PPI 82C55 I/O IS DECODED TO PORT 60-67
SIOBASE .EQU $B0 ; ZILOG PERIPHERALS DEFAULT
PIOZBASE .EQU SIOBASE+8 ; ZILOG PERIPHERALS DEFAULT PIO DEFAULT
PIO4BASE .EQU $90 ; ECB-4PIO DEFAULT PIO DEFAULT
; ;
CTCBASE .EQU $20 ; CTC BASE I/O ADDRESS CTCBASE .EQU $20 ; CTC BASE I/O ADDRESS
CTCA .EQU CTCBASE + 0 ; CTC CHANNEL A CTCA .EQU CTCBASE + 0 ; CTC CHANNEL A

3
Source/HBIOS/std.asm
View File

@ -266,6 +266,9 @@ IVT_PIO0 .EQU 18
IVT_PIO1 .EQU 20 IVT_PIO1 .EQU 20
IVT_PIO2 .EQU 22 IVT_PIO2 .EQU 22
IVT_PIO3 .EQU 24 IVT_PIO3 .EQU 24
IVT_SER2 .EQU 26
IVT_SER3 .EQU 28
;
; ;
; DEVICE DRIVER TO BE INITIALIZED FIRST. FIRST CIO DRIVER, UNIT 0 INITIALIZED BECOMES PRIMARY CONSOLE. ; DEVICE DRIVER TO BE INITIALIZED FIRST. FIRST CIO DRIVER, UNIT 0 INITIALIZED BECOMES PRIMARY CONSOLE.
; IS AN INDEX INTO THE ENABLED INITIALIZATION DRIVER LIST i.e. ASCI, UART, SIO, ACIA, PIO, UF ETC. ; IS AN INDEX INTO THE ENABLED INITIALIZATION DRIVER LIST i.e. ASCI, UART, SIO, ACIA, PIO, UF ETC.

Write Preview
Loading…
Cancel
Save