@ -22,27 +22,25 @@
; SYSTEM INITIALIZATION, THE IMAGE OF THE RUNNING ROM BANK IS COPIED TO A RAM BANK
; SYSTEM INITIALIZATION, THE IMAGE OF THE RUNNING ROM BANK IS COPIED TO A RAM BANK
; CREATING A SHADOW COPY IN RAM. EXECUTION IS THAN TRANSFERRED TO THE RAM SHADOW COPY.
; CREATING A SHADOW COPY IN RAM. EXECUTION IS THAN TRANSFERRED TO THE RAM SHADOW COPY.
; THIS IS ESSENTIAL BECAUSE THE HBIOS CODE DOES NOT SUPPORT RUNNING IN READ ONLY MEMORY
; THIS IS ESSENTIAL BECAUSE THE HBIOS CODE DOES NOT SUPPORT RUNNING IN READ ONLY MEMORY
; (EXCEPT FOR THE INITIAL LAUNCHING CODE). IN THIS MODE, THE HBI OS INITIALIZATION WILL
; ALSO COPY THE OS IMAGES BANK IN ROM TO THE USER RAM BANK AND LAUNCH IT AFTER HBIOS
; IS INSTALLED.
; (EXCEPT FOR THE INITIAL LAUNCHING CODE).
;
;
; - APPBOOT: BOOT FROM A CP/M STYLE APPLICATION FILE
; - APPBOOT: BOOT FROM A CP/M STYLE APPLICATION FILE
;
;
; WHEN APPBOOT IS DEFINED, THE FILE IS ASSEMBLED AS A CP/M APPLICATION ASSUMING
; WHEN APPBOOT IS DEFINED, THE FILE IS ASSEMBLED AS A CP/M APPLICATION ASSUMING
; THAT IT WILL BE LOADED AT 100H BY THE CP/M (OR COMPATIBLE) OS. NOTE THAT IN
; THAT IT WILL BE LOADED AT 100H BY THE CP/M (OR COMPATIBLE) OS. NOTE THAT IN
; THIS CASE IT IS ASSUMED THAT AN OS IMAGES FILE IS APPENDED TO THE END OF THE
; THIS CASE IT IS ASSUMED THAT AN OS IMAGES FILE IS APPENDED TO THE END OF THE
; HBIOS APPLICATION BINARY. THE APPENDED OS IMAGES ARE COPIED TO THE USER RAM
; HBIOS APPLICATION BINARY. THE APPENDED OS IMAGES ARE COPIED TO THE AUX RAM
; BANK AND LAUNCHED AFTER HBIOS HAS INSTALLED ITSELF.
; BANK AND LAUNCHED AFTER HBIOS HAS INSTALLED ITSELF.
;
;
; - IMGBOOT: BOOT FROM AN IMAGE FILE THAT HAS BEEN PLACED IN THE USER BANK
;
; WHEN IMGBOOT IS DEFINED, THE FILE IS ASSEMBLED SUCH THAT IT CAN BE PRELOADED
; INTO THE RAM USER BANK BY AN EXTERNAL PROCESS THAT SUBSEQUENTLY LAUNCHES
; THE CODE AT ADDRESS 0. THE MOST COMMON EXAMPLE OF THIS IS THE UNA FSFAT
; TOOL WHICH CAN LOAD AN IMAGE FROM A DOS FAT FILESYSTEM PROVIDING A SIMPLE
; WAY TO LOAD A TEST COPY OF HBIOS. AS IS THE CASE WITH APPBOOT, IT IS ASSUMED
; THAT AN OS IMAGES FILE IS APPENDED TO THE END OF THE IMAGE AND IS LAUNCHED
; AFTER HBIOS IS INSTALLED.
;;;; - IMGBOOT: BOOT FROM AN IMAGE FILE THAT HAS BEEN PLACED IN THE USER BANK
;;;;
;;;; WHEN IMGBOOT IS DEFINED, THE FILE IS ASSEMBLED SUCH THAT IT CAN BE PRELOADED
;;;; INTO THE RAM USER BANK BY AN EXTERNAL PROCESS THAT SUBSEQUENTLY LAUNCHES
;;;; THE CODE AT ADDRESS 0. THE MOST COMMON EXAMPLE OF THIS IS THE UNA FSFAT
;;;; TOOL WHICH CAN LOAD AN IMAGE FROM A DOS FAT FILESYSTEM PROVIDING A SIMPLE
;;;; WAY TO LOAD A TEST COPY OF HBIOS. AS IS THE CASE WITH APPBOOT, IT IS ASSUMED
;;;; THAT AN OS IMAGES FILE IS APPENDED TO THE END OF THE IMAGE AND IS LAUNCHED
;;;; AFTER HBIOS IS INSTALLED.
;
;
; INCLUDE FILE NESTING:
; INCLUDE FILE NESTING:
;
;
@ -1423,15 +1421,32 @@ BOOTWAIT:
; Z280 BARE METAL INIT
; Z280 BARE METAL INIT
;
;
# IF ( CPUFAM = = CPU_Z280 )
# IF ( CPUFAM = = CPU_Z280 )
; CLEAR THE MASTER STATUS REGISTER
LD C , Z280_MSR ; MASTER STATUS REGISTER
LD HL , $ 0000 ; SYS MODE, NO INTERRUPTS
LDCTL ( C ), HL ; DO IT
;
; SET MAXIMUM I/O WAIT STATES FOR NOW
; SET MAXIMUM I/O WAIT STATES FOR NOW
LD C , Z280_BTCR ; BUS TIMING AND CONTROL REGISTER
LD C , Z280_BTCR ; BUS TIMING AND CONTROL REGISTER
LD HL , $ 0033 ; 3 I/O WAIT STATES ADDED
LD HL , $ 0033 ; 3 I/O WAIT STATES ADDED
LDCTL ( C ), HL
LDCTL ( C ), HL ; DO IT
;
;
; START BY S ELECTING I/O PAGE $FF
; SELECT I/O PAGE $FF FOR INTERNAL SYSTEM REGISTER ACCESS
LD L , $ FF ; MMU AND DMA PAGE I/O REG IS $FF
LD L , $ FF ; MMU AND DMA PAGE I/O REG IS $FF
LD C , Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER
LD C , Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER
LDCTL ( C ), HL
LDCTL ( C ), HL ; DO IT
;
; DISABLE MEMORY REFRESH CYCLES
LD A , $ 08 ; REFRESH DISABLED
OUT ( Z280_RRR ), A ; DO IT
;
; INITIALIZE CACHE CONTROL REGISTER
LD A , $ 20 ; CACHE INSTRUCTIONS, NOT DATA
OUT ( Z280_CCR ), A ; DO IT
;
; INITIALIZE TRAP CONTROL REGISTER
LD A , $ 00 ; ALLOW USER I/O, NO EPU, NO STK WARN
OUT ( Z280_TCR ), A ; DO IT
;
;
# IF ( MEMMGR = = MM_Z280 )
# IF ( MEMMGR = = MM_Z280 )
;
;
@ -1468,10 +1483,6 @@ BOOTWAIT:
LD C , Z280_MMUMCR ; MMU MASTER CONTROL REGISTER
LD C , Z280_MMUMCR ; MMU MASTER CONTROL REGISTER
LD HL , $ BBFF ; ENABLE USER & SYSTEM TRANSLATE
LD HL , $ BBFF ; ENABLE USER & SYSTEM TRANSLATE
OUTW ( C ), HL
OUTW ( C ), HL
;
; DISABLE MEMORY REFRESH CYCLES
LD A , $ 08 ; DISABLED
OUT ( Z280_RRR ), A ; SET REFRESH RATE REGISTER
;
;
JR Z280_INITZ ; JUMP TO CODE CONTINUATION
JR Z280_INITZ ; JUMP TO CODE CONTINUATION
;
;
@ -1505,7 +1516,7 @@ Z280_INITZ:
;
;
# ENDIF
# ENDIF
;
;
; RESTORE I/O PAGE TO $00
; RESTORE I/O PAGE TO $00 FOR NORMAL USER I/O SPACE
LD L , $ 00 ; NORMAL I/O REG IS $00
LD L , $ 00 ; NORMAL I/O REG IS $00
LD C , Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER
LD C , Z280_IOPR ; REG C POINTS TO I/O PAGE REGISTER
LDCTL ( C ), HL
LDCTL ( C ), HL
@ -2917,17 +2928,26 @@ HB_Z280BUS1:
PRTS ( "BTCR=$" )
PRTS ( "BTCR=$" )
LD C , Z280_BTCR ; BUS TIMING AND CONTROL REGISTER
LD C , Z280_BTCR ; BUS TIMING AND CONTROL REGISTER
LDCTL HL ,( C )
LDCTL HL ,( C )
CALL PRTHEXWORDHL
LD A , L
CALL PRTHEXBYTE
CALL PC_SPACE
CALL PC_SPACE
PRTS ( "BTIR=$" )
PRTS ( "BTIR=$" )
LD C , Z280_BTIR ; BUS TIMING AND CONTROL REGISTER
LD C , Z280_BTIR ; BUS TIMING AND CONTROL REGISTER
LDCTL HL ,( C )
LDCTL HL ,( C )
CALL PRTHEXWORDHL
LD A , L
CALL PRTHEXBYTE
CALL PC_SPACE
CALL PC_SPACE
PRTS ( "CCR=$" )
PRTS ( "CCR=$" )
LD C , Z280_CCR ; CACHE CONTROL REGISTER
LD C , Z280_CCR ; CACHE CONTROL REGISTER
LDCTL HL ,( C )
LDCTL HL ,( C )
CALL PRTHEXWORDHL
LD A , L
CALL PRTHEXBYTE
CALL PC_SPACE
PRTS ( "TCR=$" )
LD C , Z280_TCR ; CACHE CONTROL REGISTER
LDCTL HL ,( C )
LD A , L
CALL PRTHEXBYTE
# ENDIF
# ENDIF
;
;
# IFDEF ROMBOOT
# IFDEF ROMBOOT
@ -3326,32 +3346,28 @@ DBG_NOTE:
;
;
# ENDIF
# ENDIF
;
;
# IFDEF TESTING
CALL SND_BEEP
# ENDIF
;
INITSYS4:
INITSYS4:
;
;
# IF ( MEMMGR = = MM_Z280 )
# IF ( MEMMGR = = MM_Z280 )
; LEAVE SYSTEM MODE STACK POINTING TO AN OK PLACE
LD SP , HB_STACK ; NOW USE REAL SYSTEM STACK LOC
;
HB_DI ; NOT SURE THIS IS NEEDED
; LEAVE SYSTEM MODE STACK POINTING TO THE RIGHT PLACE
LD SP , HB_STACK ; DEDICATED HBIOS STACK LOC
;
;
; ACTIVATE THE CORRECT USER MODE BANK
; ACTIVATE THE CORRECT USER MODE BANK
LD A ,( HB_CURBNK ) ; GET CURRENT BANK
LD A ,( HB_CURBNK ) ; GET CURRENT BANK
CALL HBX_BNKSEL
CALL HBX_BNKSEL ; DO IT
;
;
; PRESET THE USER MODE STACK
; PRESET THE USER MODE STACK
LD HL , HBX_LOC
LDCTL USP , HL
;
HB_EI ; NOT SURE THIS IS NEEDED
LD HL , HBX_LOC ; USER STACK JUST BELOW PROXY
LDCTL USP , HL ; DO IT
;
;
; SWITCH TO USER MODE NOW
; SWITCH TO USER MODE NOW
LD C , Z280_MSR
LD HL , $ 407 F
LDCTL ( C ), HL
# ENDIF
;
# IFDEF TESTING
CALL SND_BEEP
LD C , Z280_MSR ; MASTER STATUS REGISTER
LD HL , $ 4000 | $ 0B ; USER MODE W/ NORMAL INT MASK
LDCTL ( C ), HL ; DO IT
# ENDIF
# ENDIF
;
;
DIAG ( 0 ) ; CLEAR BOOT DIAG LED(S)
DIAG ( 0 ) ; CLEAR BOOT DIAG LED(S)
@ -5911,23 +5927,31 @@ Z280_PRIVINST:
EX ( SP ), HL ; GET ADR, SAVE HL
EX ( SP ), HL ; GET ADR, SAVE HL
;
;
PUSH AF
PUSH AF
PUSH BC
PUSH DE
PUSH BC ; NEEDED?
PUSH DE ; NEEDED?
;
;
LDUP A ,( HL ) ; BYTE FROM USER SPACE
LDUP A ,( HL ) ; BYTE FROM USER SPACE
;
;
; HANDLE DI
; HANDLE USER MODE Z80 DI
CP $ F3 ; DI?
CP $ F3 ; DI?
JR NZ , Z280_PRIVINST2
JR NZ , Z280_PRIVINST2
HB_DI ; DO THE DI
;;;HB_DI ; DO THE DI
XOR A ; NO INTERRUPTS
LD ( HB_MSRSAV ), A ; UPDATE SAVED MSR LSB
INC HL ; BUMP PAST IT
INC HL ; BUMP PAST IT
JR Z280_PRIVINSTX
JR Z280_PRIVINSTX
;
;
Z280_PRIVINST2:
Z280_PRIVINST2:
; HANDLE EI
; HANDLE USER MODE Z80 EI
CP $ FB ; EI?
CP $ FB ; EI?
JR NZ , Z280_PRIVINST3
JR NZ , Z280_PRIVINST3
HB_EI ; DO THE EI
;;;HB_EI ; DO THE EI
LD A , $ 0B ; NORMAL INTERRUPTS
LD ( HB_MSRSAV ), A ; UPDATE SAVED MSR LSB
INC HL ; BUMP PAST IT
INC HL ; BUMP PAST IT
JR Z280_PRIVINSTX
JR Z280_PRIVINSTX
;
;
@ -5954,8 +5978,8 @@ Z280_PRIVINST4:
;
;
Z280_PRIVINSTX:
Z280_PRIVINSTX:
; RESTORE REGISTERS
; RESTORE REGISTERS
POP DE
POP BC
POP DE ; NEEDED?
POP BC ; NEEDED?
POP AF
POP AF
;
;
; RECOVER HL AND MSR, THEN RETURN VIA RETIL
; RECOVER HL AND MSR, THEN RETURN VIA RETIL