mirror of https://github.com/wwarthen/RomWBW.git
Wayne Warthen
8 years ago
13 changed files with 1702 additions and 18 deletions
@ -1,5 +1,5 @@ |
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#DEFINE RMJ 2 |
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#DEFINE RMN 8 |
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#DEFINE RUP 5 |
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#DEFINE RUP 6 |
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#DEFINE RTP 0 |
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#DEFINE BIOSVER "2.8.5" |
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#DEFINE BIOSVER "2.8.6" |
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|
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@ -0,0 +1,8 @@ |
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; |
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;================================================================================================== |
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; RC2014 STANDARD CONFIGURATION |
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;================================================================================================== |
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; |
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#include "cfg_rc.asm" |
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; |
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IDEENABLE .SET TRUE ; TRUE FOR IDE DEVICE SUPPORT |
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@ -0,0 +1,73 @@ |
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; |
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;================================================================================================== |
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; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RC2014 |
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;================================================================================================== |
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; |
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; BUILD CONFIGURATION OPTIONS |
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; |
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CPUOSC .EQU 7372800 ; CPU OSC FREQ |
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RAMSIZE .EQU 512 ; SIZE OF RAM IN KB, MUST MATCH YOUR HARDWARE!!! |
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DEFSERCFG .EQU SER_115200_8N1 ; DEFAULT SERIAL LINE CONFIG (SHOULD MATCH ABOVE) |
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INTTYPE .EQU IT_NONE ; INTERRUPT HANDLING TYPE (IT_NONE, IT_SIMH, IT_Z180, IT_CTC, ...) |
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; |
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CRTACT .EQU FALSE ; CRT ACTIVATION AT STARTUP |
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VDAEMU .EQU EMUTYP_ANSI ; DEFAULT VDA EMULATION (EMUTYP_TTY, EMUTYP_ANSI, ...) |
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; |
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DSKYENABLE .EQU FALSE ; TRUE FOR DSKY SUPPORT (DO NOT COMBINE WITH PPIDE) |
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; |
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SIMRTCENABLE .EQU FALSE ; SIMH CLOCK DRIVER |
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DSRTCENABLE .EQU FALSE ; DS-1302 CLOCK DRIVER |
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DSRTCMODE .EQU DSRTCMODE_STD ; DSRTCMODE_STD, DSRTCMODE_MFPIC |
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; |
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ASCIENABLE .EQU FALSE ; TRUE FOR Z180 ASCI SUPPORT |
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UARTENABLE .EQU FALSE ; TRUE FOR UART SUPPORT (ALMOST ALWAYS WANT THIS TO BE TRUE) |
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UARTOSC .EQU 1843200 ; UART OSC FREQUENCY |
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SIOENABLE .EQU TRUE ; TRUE FOR SIO SUPPORT |
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; |
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VDUENABLE .EQU FALSE ; TRUE FOR VDU BOARD SUPPORT |
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CVDUENABLE .EQU FALSE ; TRUE FOR CVDU BOARD SUPPORT |
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NECENABLE .EQU FALSE ; TRUE FOR uPD7220 BOARD SUPPORT |
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TMSENABLE .EQU FALSE ; TRUE FOR N8 (TMS9918) VIDEO/KBD SUPPORT |
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VGAENABLE .EQU FALSE ; TRUE FOR VGA VIDEO/KBD SUPPORT |
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; |
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MDENABLE .EQU TRUE ; TRUE FOR ROM/RAM DISK SUPPORT (ALMOST ALWAYS WANT THIS ENABLED) |
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MDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF MDENABLE = TRUE) |
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; |
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FDENABLE .EQU FALSE ; TRUE FOR FLOPPY SUPPORT |
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FDMODE .EQU FDMODE_ZETA ; FDMODE_DIO, FDMODE_ZETA, FDMODE_DIDE, FDMODE_N8, FDMODE_DIO3 |
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FDTRACE .EQU 1 ; 0=SILENT, 1=FATAL ERRORS, 2=ALL ERRORS, 3=EVERYTHING (ONLY RELEVANT IF FDENABLE = TRUE) |
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FDMEDIA .EQU FDM144 ; FDM720, FDM144, FDM360, FDM120 (ONLY RELEVANT IF FDENABLE = TRUE) |
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FDMEDIAALT .EQU FDM720 ; ALTERNATE MEDIA TO TRY, SAME CHOICES AS ABOVE (ONLY RELEVANT IF FDMAUTO = TRUE) |
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FDMAUTO .EQU TRUE ; SELECT BETWEEN MEDIA OPTS ABOVE AUTOMATICALLY |
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; |
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RFENABLE .EQU FALSE ; TRUE FOR RAM FLOPPY SUPPORT |
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; |
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IDEENABLE .EQU FALSE ; TRUE FOR IDE SUPPORT |
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IDEMODE .EQU IDEMODE_RC ; IDEMODE_DIO, IDEMODE_DIDE, IDEMODE_RC |
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IDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) |
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IDE8BIT .EQU TRUE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) |
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; |
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PPIDEENABLE .EQU FALSE ; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE) |
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PPIDEMODE .EQU PPIDEMODE_SBC ; PPIDEMODE_SBC, PPPIDEMODE_DIO3, PPIDEMODE_MFP, PPIDEMODE_N8 |
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PPIDETRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE) |
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PPIDE8BIT .EQU FALSE ; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!) |
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; |
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SDENABLE .EQU FALSE ; TRUE FOR SD SUPPORT |
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SDMODE .EQU SDMODE_PPI ; SDMODE_JUHA, SDMODE_CSIO, SDMODE_UART, SDMODE_PPI, SDMODE_DSD |
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SDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF IDEENABLE = TRUE) |
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SDCSIOFAST .EQU FALSE ; TABLE-DRIVEN BIT INVERTER |
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; |
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PRPENABLE .EQU FALSE ; TRUE FOR PROPIO SUPPORT |
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; |
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PPPENABLE .EQU FALSE ; TRUE FOR PARPORTPROP SUPPORT |
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PPPSDENABLE .EQU TRUE ; TRUE FOR PARPORTPROP SD SUPPORT |
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PPPSDTRACE .EQU 1 ; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPPENABLE = TRUE) |
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PPPCONENABLE .EQU TRUE ; TRUE FOR PROPIO CONSOLE SUPPORT (PS/2 KBD & VGA VIDEO) |
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; |
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HDSKENABLE .EQU FALSE ; TRUE FOR SIMH HDSK SUPPORT |
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; |
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TERMENABLE .EQU FALSE ; TERM PSEUDO DEVICE, WILL BE ENABLED IF A VDA IS ENABLED |
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; |
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BOOTTYPE .EQU BT_MENU ; BT_MENU (WAIT FOR KEYPRESS), BT_AUTO (BOOT_DEFAULT AFTER BOOT_TIMEOUT SECS) |
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BOOT_TIMEOUT .EQU 20 ; APPROX TIMEOUT IN SECONDS FOR AUTOBOOT, 0 FOR IMMEDIATE |
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BOOT_DEFAULT .EQU 'Z' ; SELECTION TO INVOKE AT TIMEOUT |
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File diff suppressed because it is too large
@ -0,0 +1,8 @@ |
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; |
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; RC2014 HARDWARE DEFINITIONS |
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; |
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MPGSEL_0 .EQU $78 ; BANK_0 PAGE SELECT REGISTER (WRITE ONLY) |
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MPGSEL_1 .EQU $79 ; BANK_1 PAGE SELECT REGISTER (WRITE ONLY) |
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MPGSEL_2 .EQU $7A ; BANK_2 PAGE SELECT REGISTER (WRITE ONLY) |
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MPGSEL_3 .EQU $7B ; BANK_3 PAGE SELECT REGISTER (WRITE ONLY) |
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MPGENA .EQU $7C ; PAGING ENABLE REGISTER - BIT 0 = 1 (WRITE ONLY) |
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@ -0,0 +1,292 @@ |
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; |
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; |
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;================================================================================================== |
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; SIO DRIVER (SERIAL PORT) |
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;================================================================================================== |
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; |
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; SETUP PARAMETER WORD: |
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; +-------+---+-------------------+ +---+---+-----------+---+-------+ |
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; | |RTS| ENCODED BAUD RATE | |DTR|XON| PARITY |STP| 8/7/6 | |
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; +-------+---+---+---------------+ ----+---+-----------+---+-------+ |
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; F E D C B A 9 8 7 6 5 4 3 2 1 0 |
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; -- MSB (D REGISTER) -- -- LSB (E REGISTER) -- |
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; |
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SIO_DEBUG .EQU FALSE |
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; |
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SIO_NONE .EQU 0 |
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SIO_SIO .EQU 1 |
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; |
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; |
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; |
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SIO_PREINIT: |
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; |
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; SETUP THE DISPATCH TABLE ENTRIES |
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; |
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LD B,SIO_CNT ; LOOP CONTROL |
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LD C,0 ; PHYSICAL UNIT INDEX |
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SIO_PREINIT0: |
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PUSH BC ; SAVE LOOP CONTROL |
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LD A,C ; PHYSICAL UNIT TO A |
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RLCA ; MULTIPLY BY CFG TABLE ENTRY SIZE (8 BYTES) |
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RLCA ; ... |
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RLCA ; ... TO GET OFFSET INTO CFG TABLE |
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LD HL,SIO_CFG ; POINT TO START OF CFG TABLE |
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CALL ADDHLA ; HL := ENTRY ADDRESS |
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PUSH HL ; SAVE IT |
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PUSH HL ; COPY CFG DATA PTR |
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POP IY ; ... TO IY |
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CALL SIO_INITUNIT ; HAND OFF TO GENERIC INIT CODE |
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POP DE ; GET ENTRY ADDRESS BACK, BUT PUT IN DE |
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POP BC ; RESTORE LOOP CONTROL |
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; |
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LD A,(IY + 1) ; GET THE SIO TYPE DETECTED |
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OR A ; SET FLAGS |
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JR Z,SIO_PREINIT2 ; SKIP IT IF NOTHING FOUND |
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; |
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PUSH BC ; SAVE LOOP CONTROL |
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LD BC,SIO_DISPATCH ; BC := DISPATCH ADDRESS |
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CALL NZ,CIO_ADDENT ; ADD ENTRY IF SIO FOUND, BC:DE |
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POP BC ; RESTORE LOOP CONTROL |
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; |
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SIO_PREINIT2: |
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INC C ; NEXT PHYSICAL UNIT |
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DJNZ SIO_PREINIT0 ; LOOP UNTIL DONE |
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XOR A ; SIGNAL SUCCESS |
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RET ; AND RETURN |
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; |
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; |
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; |
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SIO_INITUNIT: |
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CALL SIO_DETECT ; DETERMINE SIO TYPE |
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LD (IY + 1),A ; SAVE IN CONFIG TABLE |
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OR A ; SET FLAGS |
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RET Z ; ABORT IF NOTHING THERE |
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|
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; UPDATE WORKING SIO DEVICE NUM |
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LD HL,SIO_DEV ; POINT TO CURRENT UART DEVICE NUM |
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LD A,(HL) ; PUT IN ACCUM |
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INC (HL) ; INCREMENT IT (FOR NEXT LOOP) |
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LD (IY),A ; UDPATE UNIT NUM |
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|
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; SET DEFAULT CONFIG |
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LD DE,-1 ; LEAVE CONFIG ALONE |
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JP SIO_INITDEV ; IMPLEMENT IT AND RETURN |
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; |
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; |
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; |
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SIO_INIT: |
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LD B,SIO_CNT ; COUNT OF POSSIBLE SIO UNITS |
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LD C,0 ; INDEX INTO SIO CONFIG TABLE |
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SIO_INIT1: |
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PUSH BC ; SAVE LOOP CONTROL |
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|
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LD A,C ; PHYSICAL UNIT TO A |
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RLCA ; MULTIPLY BY CFG TABLE ENTRY SIZE (8 BYTES) |
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RLCA ; ... |
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RLCA ; ... TO GET OFFSET INTO CFG TABLE |
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LD HL,SIO_CFG ; POINT TO START OF CFG TABLE |
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CALL ADDHLA ; HL := ENTRY ADDRESS |
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PUSH HL ; COPY CFG DATA PTR |
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POP IY ; ... TO IY |
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|
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CALL NZ,SIO_PRTCFG ; PRINT IF NOT ZERO |
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|
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POP BC ; RESTORE LOOP CONTROL |
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INC C ; NEXT UNIT |
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DJNZ SIO_INIT1 ; LOOP TILL DONE |
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; |
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XOR A ; SIGNAL SUCCESS |
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RET ; DONE |
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; |
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; |
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; |
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SIO_DISPATCH: |
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; DISPATCH TO FUNCTION HANDLER |
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PUSH HL ; SAVE HL FOR NOW |
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LD A,B ; GET FUNCTION |
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AND $0F ; ISOLATE LOW NIBBLE |
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RLCA ; X 2 FOR WORD OFFSET INTO FUNCTION TABLE |
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LD HL,SIO_FTBL ; START OF FUNC TABLE |
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CALL ADDHLA ; HL := ADDRESS OF ADDRESS OF FUNCTION |
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LD A,(HL) ; DEREF HL |
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INC HL ; ... |
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LD H,(HL) ; ... |
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LD L,A ; ... TO GET ADDRESS OF FUNCTION |
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EX (SP),HL ; RESTORE HL & PUT FUNC ADDRESS -> (SP) |
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RET ; EFFECTIVELY A JP TO TGT ADDRESS |
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|
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SIO_FTBL: |
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.DW SIO_IN |
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.DW SIO_OUT |
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.DW SIO_IST |
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.DW SIO_OST |
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.DW SIO_INITDEV |
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.DW SIO_QUERY |
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.DW SIO_DEVICE |
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; |
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; |
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; |
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SIO_IN: |
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CALL SIO_IST ; RECEIVED CHAR READY? |
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JR Z,SIO_IN ; LOOP IF NOT |
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LD C,(IY + 2) ; C := BASE SIO PORT (WHICH IS ALSO RBR REG) |
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IN E,(C) ; CHAR READ TO E |
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XOR A ; SIGNAL SUCCESS |
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RET ; AND DONE |
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; |
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; |
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; |
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SIO_OUT: |
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CALL SIO_OST ; READY FOR CHAR? |
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JR Z,SIO_OUT ; LOOP IF NOT |
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LD C,(IY + 2) ; C := BASE SIO PORT (WHICH IS ALSO THR REG) |
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OUT (C),E ; SEND CHAR FROM E |
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XOR A ; SIGNAL SUCCESS |
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RET |
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; |
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; |
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; |
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SIO_IST: |
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LD C,(IY + 3) ; CMD PORT |
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XOR A ; WR0 |
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OUT (C),A ; DO IT |
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IN A,(C) ; GET STATUS |
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AND $01 ; ISOLATE BIT 0 (RECEIVE DATA READY) |
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JP Z,CIO_IDLE ; NOT READY, RETURN VIA IDLE PROCESSING |
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XOR A ; ZERO ACCUM |
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INC A ; ACCUM := 1 TO SIGNAL 1 CHAR WAITING |
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RET ; DONE |
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; |
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; |
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; |
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SIO_OST: |
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LD C,(IY + 3) ; CMD PORT |
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XOR A ; WR0 |
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OUT (C),A ; DO IT |
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IN A,(C) ; GET STATUS |
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AND $04 ; ISOLATE BIT 2 (TX EMPTY) |
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JP Z,CIO_IDLE ; NOT READY, RETURN VIA IDLE PROCESSING |
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XOR A ; ZERO ACCUM |
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INC A ; ACCUM := 1 TO SIGNAL 1 BUFFER POSITION |
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RET ; DONE |
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; |
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; |
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; |
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SIO_INITDEV: |
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LD C,(IY + 3) ; COMMAND PORT |
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LD HL,SIO_INITVALS ; POINT TO INIT VALUES |
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LD B,SIO_INITLEN ; COUNT OF BYTES TO WRITE |
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OTIR ; WRITE ALL VALUES |
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XOR A ; SIGNAL SUCCESS |
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RET ; RETURN |
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; |
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SIO_INITVALS: |
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.DB $00, $18 ; WR0: CHANNEL RESET |
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.DB $04, $C4 ; WR4: CLK/64=115200 BAUD, NO PARITY, 1 STOP BIT |
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.DB $01, $00 ; WR1: NO INTERRUPTS |
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.DB $03, $C1 ; WR3: 8 BIT RCV, RX ENABLE |
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.DB $05, $EA ; WR5: DTR, 8 BITS SEND, TX ENABLE, RTS |
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SIO_INITLEN .EQU $ - SIO_INITVALS |
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; |
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; |
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; |
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SIO_QUERY: |
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LD E,(IY + 4) ; FIRST CONFIG BYTE TO E |
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LD D,(IY + 5) ; SECOND CONFIG BYTE TO D |
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XOR A ; SIGNAL SUCCESS |
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RET ; DONE |
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; |
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; |
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; |
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SIO_DEVICE: |
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LD D,CIODEV_SIO ; D := DEVICE TYPE |
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LD E,(IY) ; E := PHYSICAL UNIT |
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XOR A ; SIGNAL SUCCESS |
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RET |
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; |
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; SIO DETECTION ROUTINE |
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; |
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SIO_DETECT: |
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LD C,(IY + 3) ; COMMAND PORT |
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XOR A |
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OUT (C),A ; ACCESS RD0 |
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IN A,(C) ; GET RD0 VALUE |
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LD B,A ; SAVE IT |
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LD A,1 |
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OUT (C),A ; ACCESS RD1 |
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IN A,(C) ; GET RD1 VALUE |
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CP B ; COMPARE |
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LD A,SIO_NONE ; ASSUME NOTHING THERE |
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RET Z ; RD0=RD1 MEANS NOTHING THERE |
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LD A,SIO_SIO ; GUESS WE HAVE A VALID SIO HERE |
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RET ; DONE |
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; |
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; |
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; |
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SIO_PRTCFG: |
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; ANNOUNCE PORT |
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CALL NEWLINE ; FORMATTING |
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PRTS("SIO$") ; FORMATTING |
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LD A,(IY) ; DEVICE NUM |
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CALL PRTDECB ; PRINT DEVICE NUM |
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PRTS(": IO=0x$") ; FORMATTING |
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LD A,(IY + 3) ; GET BASE PORT |
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CALL PRTHEXBYTE ; PRINT BASE PORT |
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|
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; PRINT THE SIO TYPE |
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CALL PC_SPACE ; FORMATTING |
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LD A,(IY + 1) ; GET SIO TYPE BYTE |
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RLCA ; MAKE IT A WORD OFFSET |
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LD HL,SIO_TYPE_MAP ; POINT HL TO TYPE MAP TABLE |
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CALL ADDHLA ; HL := ENTRY |
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LD E,(HL) ; DEREFERENCE |
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INC HL ; ... |
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LD D,(HL) ; ... TO GET STRING POINTER |
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CALL WRITESTR ; PRINT IT |
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; |
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; ALL DONE IF NO SIO WAS DETECTED |
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LD A,(IY + 1) ; GET SIO TYPE BYTE |
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OR A ; SET FLAGS |
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RET Z ; IF ZERO, NOT PRESENT |
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; |
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PRTS(" MODE=$") ; FORMATTING |
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LD E,(IY + 4) ; LOAD CONFIG |
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LD D,(IY + 5) ; ... WORD TO DE |
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CALL PS_PRTSC0 ; PRINT CONFIG |
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; |
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XOR A |
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RET |
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; |
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; |
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; |
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SIO_TYPE_MAP: |
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.DW SIO_STR_NONE |
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.DW SIO_STR_SIO |
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|
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SIO_STR_NONE .DB "<NOT PRESENT>$" |
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SIO_STR_SIO .DB "SIO$" |
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; |
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; WORKING VARIABLES |
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; |
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SIO_DEV .DB 0 ; DEVICE NUM USED DURING INIT |
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; |
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; SIO PORT TABLE |
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; |
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SIO_CFG: |
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; SIO/2 CHANNEL A |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; SIO TYPE |
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.DB $81 ; DATA PORT |
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.DB $80 ; CMD PORT |
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.DW DEFSERCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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; |
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; SIO/2 CHANNEL B |
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.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT) |
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.DB 0 ; SIO TYPE |
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.DB $83 ; DATA PORT |
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.DB $82 ; CMD PORT |
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.DW DEFSERCFG ; LINE CONFIGURATION |
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.FILL 2,$FF ; FILLER |
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; |
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SIO_CNT .EQU ($ - SIO_CFG) / 8 |
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@ -1,5 +1,5 @@ |
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#DEFINE RMJ 2 |
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#DEFINE RMN 8 |
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#DEFINE RUP 5 |
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#DEFINE RUP 6 |
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#DEFINE RTP 0 |
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#DEFINE BIOSVER "2.8.5" |
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#DEFINE BIOSVER "2.8.6" |
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|
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