mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 14:11:48 -06:00
Update CH Driver Port Config for RCBus Systems
- Updated to standardize on 0x3E/0x3F for primary CH device and 0x3C/0x3D for secondary CH device. Both devices are optional and detected automatically.
This commit is contained in:
@@ -253,12 +253,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
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CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
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CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
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CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
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CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
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CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
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CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
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CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
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;
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PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
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@@ -303,12 +303,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
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CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
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CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
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CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
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CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
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CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
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CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
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CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
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;
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PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
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@@ -251,12 +251,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
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CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
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CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
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CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
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CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
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CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
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CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
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CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
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;
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PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
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@@ -253,16 +253,16 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
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SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
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;
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CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
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CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT
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CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
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CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
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CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
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CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
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CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
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CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
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CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
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;
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PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
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@@ -257,16 +257,16 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
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SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
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;
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CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
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CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT
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CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
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CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
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CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
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CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
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CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
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CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
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CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
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;
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PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
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@@ -256,12 +256,12 @@ CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
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CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
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CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
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CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
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CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
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CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
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CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
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CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
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;
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PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
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@@ -247,16 +247,16 @@ SDTRACE .EQU 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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SDCSIOFAST .EQU FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
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SDMTSWAP .EQU FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
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;
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CHENABLE .EQU FALSE ; CH: ENABLE CH375/376 USB SUPPORT
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CHENABLE .EQU TRUE ; CH: ENABLE CH375/376 USB SUPPORT
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CHTRACE .EQU 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHUSBTRACE .EQU 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHSDTRACE .EQU 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
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CHCNT .EQU 1 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $BE ; CH 0: BASE I/O ADDRESS
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CHCNT .EQU 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
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CH0BASE .EQU $3E ; CH 0: BASE I/O ADDRESS
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CH0USBENABLE .EQU TRUE ; CH 0: ENABLE USB DISK
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CH0SDENABLE .EQU FALSE ; CH 0: ENABLE SD DISK
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CH1BASE .EQU $FF ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU FALSE ; CH 1: ENABLE USB DISK
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CH1BASE .EQU $3C ; CH 1: BASE I/O ADDRESS
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CH1USBENABLE .EQU TRUE ; CH 1: ENABLE USB DISK
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CH1SDENABLE .EQU FALSE ; CH 1: ENABLE SD DISK
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;
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PRPENABLE .EQU FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
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@@ -2,7 +2,7 @@
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#DEFINE RMN 4
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#DEFINE RUP 0
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#DEFINE RTP 0
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#DEFINE BIOSVER "3.4.0-dev.34"
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#DEFINE BIOSVER "3.4.0-dev.35"
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#define rmj RMJ
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#define rmn RMN
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#define rup RUP
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@@ -3,5 +3,5 @@ rmn equ 4
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rup equ 0
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rtp equ 0
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biosver macro
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db "3.4.0-dev.34"
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db "3.4.0-dev.35"
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endm
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