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@ -70,7 +70,7 @@ STX EQU 02H ; 'Start of header' for 1024 byte blocks |
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; |
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; Conditional equates - change to suit your system, then assemble |
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; |
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MHZ EQU 4 ; Clock speed, use integer (2,4,5,8, etc.) |
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MHZ EQU 10 ; Clock speed, use integer (2,4,5,8, etc.) |
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CPM3 EQU NO ; Yes, if operating in CP/M v3.0 environment |
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STOPBIT EQU NO ; No, if using 1 stop bit, yes if using 2 |
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BYEBDOS EQU NO ; Yes, if using BYE338-up, BYE501-up, or NUBYE |
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@ -817,6 +817,7 @@ BADROP: POP PSW ; Restore stack |
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ALLSET: CALL GETCHR |
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CALL GETCHR |
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CALL MINIT |
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STA CPUMHZ ; WBW: Update CPU speed from MINIT in A |
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; |
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; Jump to appropriate function |
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; |
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@ -3458,7 +3459,11 @@ RECVDG: CALL GETCHR |
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CALL GETCHR |
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; |
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RECV: PUSH D ; Save 'DE' regs. |
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MVI E,MHZ ; Get the clock speed |
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;WBW BEGIN: Use dynamic CPU speed |
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; MVI E,MHZ ; Get the clock speed |
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LDA CPUMHZ ; Get the clock speed |
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MOV E,A ; Put speed in E |
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;WBW END |
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XRA A ; Clear the 'A' reg. |
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; |
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MSLOOP: ADD B ; Number of seconds |
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@ -3546,14 +3551,27 @@ CARCK2: LDA OPTSAV ; Get option |
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; Delay - 100 millisecond delay. |
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; |
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DELAY: PUSH B ; Save 'BC' |
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LXI B,MHZ*4167 ; Value for 100 ms. delay |
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; |
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; WBW BEGIN: Use dynamic CPU speed |
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; Loop below is 105TS on Z80 and 96TS on Z180 |
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; Approx 1024 iter per 100ms per MHz |
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; Loop time below extended to accommodate CPU speeds up to 64MHz |
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; LXI B,MHZ*4167 ; Value for 100 ms. delay |
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; Init BC w/ CPU MHz * 1024 |
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LDA CPUMHZ ; CPU MHz to A |
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RLC ; * 2 |
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RLC ; * 2, A now has MHz * 4 |
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MOV B,A ; Use as high byte |
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MVI C,0 ; Zero low byte, BC now has MHz * 1024 |
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; WBW END |
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DELAY2: DCX B ; Update count |
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MOV A,B ; Get MSP byte |
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ORA C ; Count = zero? |
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JNZ DELAY2 ; If not, continue |
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CALL DELAY3 ; WBW: Extend loop time |
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CALL DELAY3 ; WBW: Extend loop time |
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CALL DELAY3 ; WBW: Extend loop time |
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POP B ; Restore 'BC' |
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RET ; Return to CARCK1 |
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DELAY3: RET ; Return to CARCK1 |
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; |
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;----------------------------------------------------------------------- |
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; |
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@ -3933,9 +3951,16 @@ INPUT: PUSH H ; Save current values |
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PUSH D |
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PUSH B |
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; |
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INPUT1: LXI D,1200 ; Outer loop count (about 2 minutes) |
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; WBW BEGIN: Use dynamic CPU speed |
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;INPUT1: LXI D,1200 ; Outer loop count (about 2 minutes) |
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;; |
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;INPUT2: LXI B,MHZ*100 ; Roughly 100 ms. |
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INPUT1: LXI D,468 ; Outer loop count (about 2 minutes) |
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; |
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INPUT2: LXI B,MHZ*100 ; Roughly 100 ms. |
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INPUT2: LDA CPUMHZ ; CPU MHz to A |
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MOV B,A ; Put in B |
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MVI C,0 ; Zero C, BC is now CPU MHz * 256, ~256ms |
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; WBW END |
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; |
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INPUT3: PUSH D ; Save the outer delay count |
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PUSH B ; Save the inner delay count |
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@ -5614,6 +5639,7 @@ MSGFLG: DB 0 ; Message upload flag |
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SAVEHL: DW 0 ; Saves TBUF command line address |
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TOTERR: DW 0 ; Total errors for transmission attempt |
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VRECNO: DW 0 ; Virtual record # in 128 byte records |
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CPUMHZ: DW MHZ ; WBW: CPU speed in MHz, *word value* |
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; |
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EOFLG: DB 0 ; 'EOF' flag (1=yes) |
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EOFCTR: DB 0 ; EOF send counter |
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