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Update dskyng.asm

When clearing the 8259 display ram, it is necessary to wait for a status bit to clear before continuing.
pull/246/head
Wayne Warthen 5 years ago
parent
commit
de5f2b1308
  1. 17
      Source/HBIOS/dskyng.asm

17
Source/HBIOS/dskyng.asm

@ -96,9 +96,24 @@ DSKY_REINIT:
; FALL THRU
;
DSKY_RESET:
; RESET DSKY
; RESET DSKY -- CLEAR RAM AND FIFO
LD A,DSKY_CMD_CLR
CALL DSKY_CMD
;
; 8259 TAKES ~160US TO CLEAR RAM DURING WHICH TIME WRITES TO
; DISPLAY RAM ARE INHIBITED. HIGH BIT OF STATUS BYTE IS SET
; DURING THIS WINDOW. TO PREVENT A DEADLOCK, A LOOP COUNTER
; IS USED TO IMPLEMENT A TIMEOUT.
LD B,0 ; TIMEOUT LOOP COUNTER
DSKY_RESET1:
PUSH BC ; SAVE COUNTER
CALL DSKY_ST ; GET STATUS BYTE
POP BC ; RECOVER COUNTER
BIT 7,A ; BIT 7 IS DISPLAY RAM BUSY
JR Z,DSKY_RESET2 ; MOVE ON IF DONE
DJNZ DSKY_RESET1 ; LOOP TILL TIMEOUT
;
DSKY_RESET2:
RET
;
#IFDEF DSKY_KBD

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