Browse Source

VGARC Improvements, Doc Fix

- Added ability to enable VGARC and front panel in default config without I/O conflicts (does **not** support having both types of hardware present at the same time).
- Fixed documentation error in issue #345 reported by @MorfeoMatrixx.
pull/351/head v3.3.0-dev.9
Wayne Warthen 3 years ago
parent
commit
e32002545b
  1. BIN
      Doc/RomWBW Applications.pdf
  2. BIN
      Doc/RomWBW Disk Catalog.pdf
  3. BIN
      Doc/RomWBW Errata.pdf
  4. BIN
      Doc/RomWBW ROM Applications.pdf
  5. BIN
      Doc/RomWBW System Guide.pdf
  6. BIN
      Doc/RomWBW User Guide.pdf
  7. 2
      ReadMe.md
  8. 2
      ReadMe.txt
  9. 2
      Source/Doc/SystemGuide.md
  10. 4
      Source/HBIOS/Config/RCZ180_ext.asm
  11. 4
      Source/HBIOS/Config/RCZ180_nat.asm
  12. 4
      Source/HBIOS/Config/RCZ280_ext.asm
  13. 4
      Source/HBIOS/Config/RCZ280_nat.asm
  14. 6
      Source/HBIOS/Config/RCZ280_zz80mb.asm
  15. 6
      Source/HBIOS/Config/RCZ280_zzrc.asm
  16. 6
      Source/HBIOS/Config/RCZ80_easy.asm
  17. 4
      Source/HBIOS/Config/RCZ80_kio.asm
  18. 4
      Source/HBIOS/Config/RCZ80_skz.asm
  19. 4
      Source/HBIOS/Config/RCZ80_std.asm
  20. 5
      Source/HBIOS/Config/RCZ80_tiny.asm
  21. 8
      Source/HBIOS/Config/RCZ80_zrc.asm
  22. 6
      Source/HBIOS/Config/RCZ80_zrc_ram.asm
  23. 3
      Source/HBIOS/Config/SBC_max.asm
  24. 6
      Source/HBIOS/Config/SCZ180_sc126.asm
  25. 6
      Source/HBIOS/Config/SCZ180_sc130.asm
  26. 4
      Source/HBIOS/Config/SCZ180_sc131.asm
  27. 7
      Source/HBIOS/Config/SCZ180_sc140.asm
  28. 7
      Source/HBIOS/Config/SCZ180_sc503.asm
  29. 11
      Source/HBIOS/cfg_dyno.asm
  30. 11
      Source/HBIOS/cfg_master.asm
  31. 11
      Source/HBIOS/cfg_mbc.asm
  32. 11
      Source/HBIOS/cfg_mk4.asm
  33. 11
      Source/HBIOS/cfg_n8.asm
  34. 7
      Source/HBIOS/cfg_rcz180.asm
  35. 11
      Source/HBIOS/cfg_rcz280.asm
  36. 11
      Source/HBIOS/cfg_rcz80.asm
  37. 11
      Source/HBIOS/cfg_rph.asm
  38. 11
      Source/HBIOS/cfg_sbc.asm
  39. 11
      Source/HBIOS/cfg_scz180.asm
  40. 6
      Source/HBIOS/cfg_una.asm
  41. 11
      Source/HBIOS/cfg_z80retro.asm
  42. 11
      Source/HBIOS/cfg_zeta.asm
  43. 11
      Source/HBIOS/cfg_zeta2.asm
  44. 404
      Source/HBIOS/hbios.asm
  45. 10
      Source/HBIOS/romldr.asm
  46. 8
      Source/HBIOS/vrc.asm
  47. 2
      Source/ver.inc
  48. 2
      Source/ver.lib

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Doc/RomWBW Applications.pdf

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Doc/RomWBW Disk Catalog.pdf

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Doc/RomWBW Errata.pdf

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Doc/RomWBW ROM Applications.pdf

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Doc/RomWBW System Guide.pdf

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Doc/RomWBW User Guide.pdf

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2
ReadMe.md

@ -3,7 +3,7 @@
**RomWBW ReadMe** \
Version 3.3 \
Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
02 May 2023
03 May 2023
# Overview

2
ReadMe.txt

@ -1,6 +1,6 @@
RomWBW ReadMe
Wayne Warthen (wwarthen@gmail.com)
02 May 2023
03 May 2023

2
Source/Doc/SystemGuide.md

@ -2221,7 +2221,7 @@ rate of the ASCI port(s) will be affected.
| **Entry Parameters** | **Returned Values** |
|----------------------------------------|----------------------------------------|
| B: 0xF8 | A: Status |
| B: 0xF9 | A: Status |
| C: 0xF4 | |
| L: LEDs | |

4
Source/HBIOS/Config/RCZ180_ext.asm

@ -29,8 +29,8 @@
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;

4
Source/HBIOS/Config/RCZ180_nat.asm

@ -29,8 +29,8 @@
CPUOSC .SET 18432000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z180 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;

4
Source/HBIOS/Config/RCZ280_ext.asm

@ -30,8 +30,8 @@ CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z2 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
;

4
Source/HBIOS/Config/RCZ280_nat.asm

@ -30,8 +30,8 @@ CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;

6
Source/HBIOS/Config/RCZ280_zz80mb.asm

@ -32,8 +32,8 @@ CPUOSC .SET 12000000 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
@ -54,7 +54,7 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

6
Source/HBIOS/Config/RCZ280_zzrc.asm

@ -32,8 +32,8 @@ CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
INTMODE .SET 3 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
MEMMGR .SET MM_Z280 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
;
@ -62,7 +62,7 @@ SIOENABLE .SET TRUE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

6
Source/HBIOS/Config/RCZ80_easy.asm

@ -33,14 +33,12 @@ CPUOSC .SET 10000000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
WDOGMODE .SET WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .SET $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;

4
Source/HBIOS/Config/RCZ80_kio.asm

@ -30,8 +30,8 @@ CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)

4
Source/HBIOS/Config/RCZ80_skz.asm

@ -29,13 +29,13 @@
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
SKZENABLE .SET TRUE ; ENABLE SERGEY'S Z80-512K FEATURES
SKZDIV .SET DIV_12 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
WDOGMODE .SET WDOG_SKZ ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .SET $6E ; STATUS LED PORT ADDRESS
;

4
Source/HBIOS/Config/RCZ80_std.asm

@ -29,8 +29,8 @@
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET FALSE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)

5
Source/HBIOS/Config/RCZ80_tiny.asm

@ -33,14 +33,13 @@ CPUOSC .SET 16000000 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
EIPCENABLE .SET TRUE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
WDOGMODE .SET WDOG_EZZ80 ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .SET $6F ; WATCHDOG REGISTER ADR
;
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
LEDENABLE .SET TRUE ; ENABLES STATUS LED (SINGLE LED)
LEDPORT .SET $6E ; STATUS LED PORT ADDRESS
;

8
Source/HBIOS/Config/RCZ80_zrc.asm

@ -30,8 +30,8 @@
CPUOSC .SET 14745600 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
RAMSIZE .SET 1536 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
MEMMGR .SET MM_ZRC ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
@ -45,8 +45,8 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER
AYMODE .SET AYMODE_RCZ80 ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]

6
Source/HBIOS/Config/RCZ80_zrc_ram.asm

@ -31,8 +31,8 @@
CPUOSC .SET 7372800 ; CPU OSC FREQ IN MHZ
CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
RAMSIZE .SET 2048 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
@ -49,7 +49,7 @@ TMSENABLE .SET FALSE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSTIMENABLE .SET FALSE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
TMSMODE .SET TMSMODE_MSX ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
MKYENABLE .SET FALSE ; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VRCENABLE .SET TRUE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
VDAEMU_SERKBD .SET 0 ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
;
AY38910ENABLE .SET FALSE ; AY: AY-3-8910 / YM2149 SOUND DRIVER

3
Source/HBIOS/Config/SBC_max.asm

@ -35,7 +35,8 @@ USELZSA2 .SET TRUE ; ENABLE FONT COMPRESSION
;
KIOENABLE .SET TRUE ; ENABLE ZILOG KIO SUPPORT
;
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
DSKYENABLE .SET TRUE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
;

6
Source/HBIOS/Config/SCZ180_sc126.asm

@ -35,9 +35,9 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $0D ; DIAGNOSTIC PORT ADDRESS
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
FPLED_IO .SET $0D ; FP: PORT ADDRESS FOR FP LEDS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)

6
Source/HBIOS/Config/SCZ180_sc130.asm

@ -35,9 +35,9 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $00 ; DIAGNOSTIC PORT ADDRESS
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)

4
Source/HBIOS/Config/SCZ180_sc131.asm

@ -34,8 +34,10 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
;
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)

7
Source/HBIOS/Config/SCZ180_sc140.asm

@ -34,11 +34,10 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
FPBASE .SET $00 ; FRONT PANEL I/O PORT BASE ADDRESS
FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $00 ; DIAGNOSTIC PORT ADDRESS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)

7
Source/HBIOS/Config/SCZ180_sc503.asm

@ -34,11 +34,10 @@ Z180_CLKDIV .SET 1 ; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
Z180_MEMWAIT .SET 0 ; Z180: MEMORY WAIT STATES (0-3)
Z180_IOWAIT .SET 1 ; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
;
FPENABLE .SET TRUE ; ENABLES FRONT PANEL SWITCHES
FPBASE .SET $00 ; FRONT PANEL I/O PORT BASE ADDRESS
FPLED_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET TRUE ; FP: ENABLES FRONT PANEL SWITCHES
;
LEDENABLE .SET TRUE ; ENABLE STATUS LED (SINGLE LED)
DIAGENABLE .SET TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .SET $00 ; DIAGNOSTIC PORT ADDRESS
;
DSRTCENABLE .SET TRUE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
INTRTCENABLE .SET TRUE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)

11
Source/HBIOS/cfg_dyno.asm

@ -66,11 +66,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)

11
Source/HBIOS/cfg_master.asm

@ -95,11 +95,12 @@ SKZDIV .EQU DIV_1 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .EQU $6F ; WATCHDOG REGISTER ADR
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)

11
Source/HBIOS/cfg_mbc.asm

@ -60,11 +60,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU TRUE ; ENABLES STATUS LED

11
Source/HBIOS/cfg_mk4.asm

@ -66,11 +66,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)

11
Source/HBIOS/cfg_n8.asm

@ -68,11 +68,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED

7
Source/HBIOS/cfg_rcz180.asm

@ -71,6 +71,13 @@ FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
;
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU TRUE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)

11
Source/HBIOS/cfg_rcz280.asm

@ -66,11 +66,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU TRUE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)

11
Source/HBIOS/cfg_rcz80.asm

@ -65,11 +65,12 @@ SKZDIV .EQU DIV_1 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .EQU $6E ; WATCHDOG REGISTER ADR
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)

11
Source/HBIOS/cfg_rph.asm

@ -66,11 +66,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED

11
Source/HBIOS/cfg_sbc.asm

@ -60,11 +60,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED

11
Source/HBIOS/cfg_scz180.asm

@ -66,11 +66,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU TRUE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $0D ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU TRUE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $0D ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED (SINGLE LED)

6
Source/HBIOS/cfg_una.asm

@ -19,7 +19,9 @@
CPUFAM .EQU CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280]
BIOS .EQU BIOS_UNA ; HARDWARE BIOS: BIOS_[WBW|UNA]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
BOOT_TIMEOUT .EQU -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
;
@ -34,5 +36,3 @@ ROMSIZE .EQU 512 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
RTCIO .EQU $70 ; RTC LATCH REGISTER ADR
;
DSKYENABLE .EQU FALSE ; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING

11
Source/HBIOS/cfg_z80retro.asm

@ -63,11 +63,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED

11
Source/HBIOS/cfg_zeta.asm

@ -52,11 +52,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED

11
Source/HBIOS/cfg_zeta2.asm

@ -63,11 +63,12 @@ SKZENABLE .EQU FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
;
WDOGMODE .EQU WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
;
FPENABLE .EQU FALSE ; ENABLES FRONT PANEL SWITCHES
FPBASE .EQU $00 ; FRONT PANEL I/O PORT BASE ADDRESS
DIAGENABLE .EQU FALSE ; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
DIAGPORT .EQU $00 ; DIAGNOSTIC PORT ADDRESS
DIAGDISKIO .EQU TRUE ; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
FPLED_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .EQU $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_DSKACT .EQU TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .EQU FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .EQU $00 ; FP: PORT ADDRESS FOR FP SWITCHES
;
DIAGLVL .EQU DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .EQU FALSE ; ENABLES STATUS LED

404
Source/HBIOS/hbios.asm

@ -105,10 +105,11 @@ MODCNT .SET MODCNT + 1
;
;
;
#IF (DIAGENABLE)
#IF (FPLED_ENABLE)
#DEFINE DIAG(N) PUSH AF
#DEFCONT \ LD A,N
#DEFCONT \ OUT (DIAGPORT),A
; #DEFCONT \ OUT (DIAGPORT),A
#DEFCONT \ CALL FP_SETLEDS
#DEFCONT \ POP AF
#ELSE
#DEFINE DIAG(N) \;
@ -1109,16 +1110,9 @@ HB_START:
;
#IFDEF APPBOOT
#IF (MEMMGR == MM_Z280)
LD A,DIAG_01
OUT (DIAGPORT),A
LD DE,Z280_BOOTERR
LD C,9
LD A,DIAG_02
OUT (DIAGPORT),A
CALL $0005
LD A,DIAG_04
OUT (DIAGPORT),A
RET
LD DE,Z280_BOOTERR ; POINT TO ERROR MESSAGE
LD C,9 ; BDOS FUNC 9: WRITE STR
JP $0005 ; DO IT AND RETURN TO OS
;
Z280_BOOTERR .TEXT "\r\n\r\n*** Application mode boot not supported under Z280 native memory management!!!\r\n\r\n$"
#ENDIF
@ -1144,9 +1138,10 @@ Z280_BOOTERR .TEXT "\r\n\r\n*** Application mode boot not supported under Z280 n
OUT0 (RPH_ACR),A ; ... REGISTER IS INITIALIZED
#ENDIF
;
#IF (DIAGENABLE)
#IF (FPLED_ENABLE)
; NO STACK YET, SO CAN'T USE DIAG() MACRO
LD A,DIAG_01
OUT (DIAGPORT),A
OUT (FPLED_IO),A
#ENDIF
#IF (LEDENABLE)
#IF (LEDMODE == LEDMODE_STD)
@ -1255,8 +1250,6 @@ Z280_INITZ:
LD A,Z180_BASE
OUT0 ($3F),A ; AT RESET, ICR IS AT $3F
DIAG(DIAG_02)
; DISABLE REFRESH
XOR A
OUT0 (Z180_RCR),A
@ -1349,10 +1342,12 @@ Z280_INITZ:
; NOT WANT TO EFFECT RAM UNTIL AFTER THE BACKUP BATTERY STATUS CHECK
; IS PERFORMED NEXT.
;
#IF (DIAGENABLE)
#IF (FPLED_ENABLE)
; NO STACK YET, SO CAN'T USE DIAG() MACRO
LD A,DIAG_02
OUT (DIAGPORT),A
OUT (FPLED_IO),A
#ENDIF
;
; WE USE THE TWO BYTES IMMEDIATELY BELOW THE PROXY TO STORE A COUPLE
; VALUES TEMPORARILY BECAUSE WE MAY BE OPERATING IN ROM AT THIS POINT.
@ -2232,29 +2227,6 @@ NOT_REC_M0:
CALL DSKY_SHOW
#ENDIF
;
#IF FPENABLE
;
; IF FRONT PANEL IS ENABLED IN CONFIG, WE NEED TO CHECK TO SEE IF THE
; HARDWARE REALLY EXISTS. THE ONLY WAY TO DO THAT IS TO SEE IF THE
; FRONT PANEL PORT SEEMS TO BE VALID (NOT FLOATING). HERE WE JUST
; DO THE CHECKING AND RECORD WHETHER THE FP SWITCHES ARE USEABLE.
;
; THE SWITCH HARDWARE MAY OR MAY NOT BE INSTALLED. SO, HERE WE
; ATTEMPT TO CONFIRM WE HAVE A VALID PORT. CREDIT TO STEPHEN
; COUSINS FOR THIS APPROACH.
LD C,FPBASE ; ADR OF SWITCH PORT
IN C,(C) ; READ IT USING IN (C)
IN A,(FPBASE) ; READ IT USING IN (PORT)
CP C ; PORT FLOATING ON MISMATCH
JR NZ,HB_SWZ ; ABORT IF FLOATING
CP $FF ; $FF ALSO MEANS PORT INACTIVE
JR Z,HB_SWZ ; ABORT IF SO
OR $FF ; SIGNAL FP EXISTS
LD (HB_HASFP),A ; AND SAVE IT
HB_SWZ:
;
#ENDIF
;
#IF FALSE
;
; TEST DEBUG ***************************************************************************************
@ -2792,7 +2764,12 @@ HB_WDZ:
;
#ENDIF
;
#IF FPENABLE
; THIS IS A GOOD PLACE TO DETERMINE IF FRONT PANEL HARDWARE REALLY
; EXISTS.
;
CALL FP_DETECT
;
#IF (FPSW_ENABLE)
;
; IF WE HAVE FRONT PANEL SWITCHES, THIS IS THE RIGHT PLACE TO HANDLE
; ANY CONSOLE CHANGE REQUESTS. THE FRONT PANEL HAS TWO SWITCHES
@ -2802,12 +2779,12 @@ HB_WDZ:
; DEVICE.
;
PRTS("\r\nFP: IO=0x$")
LD A,FPBASE
LD A,FPSW_IO
CALL PRTHEXBYTE
;
; THE EXISTENCE OF THE FP WAS TESTED EARLIER. IF IT DOESN'T
; EXIST, BAIL OUT.
LD A,(HB_HASFP) ; GET FP EXISTENCE FLAG
LD A,(FPSW_ACTIVE) ; GET FP EXISTENCE FLAG
OR A ; SET FLAGS
JR NZ,HB_FP1 ; IF WE HAVE ONE, CONTINUE
;
@ -2823,7 +2800,7 @@ HB_FP1:
; OF A CRT DEVICE -- IT WILL JUST FAILBACK TO FIRST SERIAL
; PORT.
PRTS(" SWITCHES=0x$") ; TAG
IN A,(FPBASE) ; GET SWITCH SETTINGS
CALL FP_GETSWITCHES ; GET SWITCH SETTINGS
CALL PRTHEXBYTE ; DISPLAY VALUE
LD B,A ; SAVE IN REG B
AND SW_CRT ; TEST CRT BIT
@ -3491,7 +3468,7 @@ HB_DSKREAD:
;
LD (HB_DSKCMD),BC ; SAVE HBIOS FUNC & UNIT
;
#IF (DIAGENABLE)
#IF (FPLED_ENABLE & FPLED_DSKACT)
; SAVE DISK UNIT NUMBER BIT MASK
LD A,C ; GET DISK UNIT NUMBER
LD B,A ; PUT IN B FOR LOOP COUNTER
@ -3581,7 +3558,7 @@ HB_DSKWRITE:
;
LD (HB_DSKCMD),BC ; SAVE HBIOS FUNC & UNIT
;
#IF (DIAGENABLE)
#IF (FPLED_ENABLE & FPLED_DSKACT)
; SAVE DISK UNIT NUMBER BIT MASK
LD A,C ; GET DISK UNIT NUMBER
LD B,A ; PUT IN B FOR LOOP COUNTER
@ -3678,9 +3655,9 @@ HB_DSKIOX:
;
HB_DSKFN:
PUSH BC ; SAVE COUNTERS
#IF (DIAGENABLE & DIAGDISKIO)
#IF (FPLED_ENABLE & FPLED_DSKACT)
LD A,(HB_DSKBIT) ; LOAD UNIT DISK BIT MASK
OUT (DIAGPORT),A ; DISPLAY ON DIAG LEDS
CALL FP_SETLEDS ; DISPLAY ON DIAG LEDS
#ENDIF
#IF (LEDENABLE & LEDDISKIO)
LED(%00000101) ; BIT 0 FOR TINY Z80 & MBC, BIT 2 FOR SCXXX
@ -3688,8 +3665,8 @@ HB_DSKFN:
LD E,1 ; ONE SECTOR
HB_DSKFNADR .EQU $+1
CALL PANIC ; READ ONE SECTOR
#IF (DIAGENABLE & DIAGDISKIO)
DIAG(DIAG_00) ; CLEAR DIAG LEDS
#IF (FPLED_ENABLE & FPLED_DSKACT)
DIAG($00) ; CLEAR DIAG LEDS
#ENDIF
#IF (LEDENABLE & LEDDISKIO)
LED($00)
@ -4539,11 +4516,11 @@ SYS_GETCPUSPD1:
;
SYS_GETPANEL:
;
#IF FPENABLE
LD A,(HB_HASFP) ; GET FP EXISTS FLAG
#IF (FPSW_ENABLE)
LD A,(FPSW_ACTIVE) ; FP SWITCHES ACTIVE?
OR A ; SET FLAGS
JR Z,SYS_GETPANEL1 ; HANDLE NOT EXISTS
IN A,(FPBASE) ; READ SWITCHES
CALL FP_GETSWITCHES ; READ SWITCHES
LD H,0 ; FOR FUTURE
LD L,A ; PUT SWITCHES VALUE IN L
XOR A ; SIGNAL SUCCESS
@ -4851,9 +4828,9 @@ SYS_SETCPUSPD_ERR:
;
SYS_SETPANEL:
;
#IF DIAGENABLE
#IF (FPLED_ENABLE)
LD A,L
OUT (DIAGPORT),A
CALL FP_SETLEDS
XOR A
RET
#ELSE
@ -6454,7 +6431,97 @@ SIZ_YM2612 .EQU $ - ORG_YM2612
#INCLUDE "unlzsa2s.asm"
#ENDIF
;
; DETECT CPU SPEED USING DS-1302 RTC
;==================================================================================================
; FRONT PANEL SUPPORT
;==================================================================================================
;
; FRONT PANEL HARDWARE DETECTION
;
; WE ARE REALLY JUST CHECKING FOR SWITCHES. NO WAY TO QUERY FOR
; LEDS. WE CHECK FOR I/O CONFLICT WITH VGARC IF ACTIVE.
;
FP_DETECT:
; D: LEDS ACTIVE, E: SWITCHES ACTIVE
LD D,TRUE ; ASSUME ACTIVE FOR NOW
LD E,TRUE ; ASSUME ACTIVE FOR NOW
;
; IF VGARC IS ENABLED, CHECK IF IT IS ACTIVE. IF SO AND THE
; I/O PORTS CONFLICT, DEACTIVATE FRONT PANEL.
;
#IF (VRCENABLE)
LD A,(VRC_ACTIVE) ; GET VGARC ACTIVE STATUS
OR A ; SET FLAGS
JR Z,FP_DETECT1 ; IF NO, CONTINUE
#IF ((FPLED_IO >= $00) & (FPLED_IO <= $0F))
; CONFLICT, DEACTIVATE LEDS
LD D,FALSE ; FP LEDS NOT ACTIVE
#ENDIF
#IF ((FPSW_IO >= $00) & (FPSW_IO <= $0F))
; CONFLICT, DEACTIVATE SWITCHES
LD E,FALSE ; FP SWITCHES NOT ACTIVE
#ENDIF
#ENDIF
;
FP_DETECT1:
; THE SWITCH HARDWARE MAY OR MAY NOT BE INSTALLED. SO, HERE WE
; ATTEMPT TO CONFIRM WE HAVE A VALID PORT. CREDIT TO STEPHEN
; COUSINS FOR THIS APPROACH.
LD C,FPSW_IO ; ADR OF SWITCH PORT
IN C,(C) ; READ IT USING IN (C)
IN A,(FPSW_IO) ; READ IT USING IN (PORT)
CP C ; PORT FLOATING ON MISMATCH
JR NZ,FP_DETECT2 ; NO H/W, SET FLAG
CP $FF ; PORT FLOATING ON $FF
JR Z,FP_DETECT2 ; NO H/W, SET FLAG
JR FP_DETECTZ ; H/W EXISTS, DONE
;
FP_DETECT2:
LD E,FALSE ; RECORD NOT PRESENT
;
FP_DETECTZ:
LD (FP_ACTIVE),DE ; RECORD RESULTS
RET ; DONE
;
#IF (FPLED_ENABLE)
;
; SET FRONT PANEL LEDS FROM VALUE IN A
;
FP_SETLEDS:
PUSH HL ; SAVE HL
LD L,A ; LED VALUE TO L
LD A,(FPLED_ACTIVE) ; LEDS ACTIVE?
OR A ; SET FLAGS
LD A,L ; RESTORE REG A
JR Z,FP_SETLEDS1 ; BAIL OUT IF NOT ACTIVE
OUT (FPLED_IO),A ; WRITE
FP_SETLEDS1:
POP HL ; RESTORE HL
RET ; DONE
;
;
#ENDIF
;
#IF (FPSW_ENABLE)
;
; GET FRONT PANEL SWITCH SETTINGS
;
FP_GETSWITCHES:
LD A,(FPSW_ACTIVE) ; SWITCHES ACTIVE?
OR A ; SET FLAGS
RET Z ; BAIL OUT IF NOT ACTIVE
IN A,(FPSW_IO) ; READ SWITCHES
RET ; DONE
;
;
#ENDIF
;
FP_ACTIVE:
FPSW_ACTIVE .DB TRUE
FPLED_ACTIVE .DB TRUE
;
;==================================================================================================
; CPU SPEED DETECTION USING DS-1302 RTC
;==================================================================================================
;
HB_CPUSPD:
;
@ -6570,116 +6637,6 @@ HB_CPUSPD2:
OR $FF ; SIGNAL ERROR
RET ; AND DONE
;
; SYSTEM CHECK: DUMP MACHINE STATE AND CONTINUE?
;
SYSCHKA:
; CHECK DIAG LEVEL TO SEE IF WE SHOULD DISPLAY
PUSH AF ; PRESERVE INCOMING AF VALUE
LD A,(CB_DIAGLVL) ; GET DIAGNOSTIC LEVEL
CP DL_ERROR ; >= ERROR LEVEL
JR C,SYSCHK1 ; IF NOT, GO HOME
POP AF ; RESTORE INCOMING AF VALUE
;
; DISPLAY SYSCHK MESSAGE
PUSH DE ; PRESERVE DE VALUE
LD DE,STR_SYSCHK ; POINT TO PREFIX STRING
CALL WRITESTR ; PRINT IT
POP DE ; RESTORE DE VALUE
CALL XREGDMP ; DUMP REGISTERS
; DISPLAY ERROR CODE. IT IS AT RETURN ADDRESS+1 .. LD A,XX
EX (SP),HL ; GET RETURN ADDRESS
INC HL ; POINT TO THE ERROR CODE
PUSH AF
LD A,(HL) ; DISPLAY
CALL PRTHEXBYTE
POP AF
DEC HL ; RESTORE RETURN ADDRESS
EX (SP),HL
;
JR CONTINUE ; CHECK W/ USER
;
SYSCHK1:
; RETURN IF MESSAGING BYPASSED BY DIAG LEVEL
POP AF
RET
;
; PANIC: DUMP MACHINE STATE AND HALT
;
PANIC:
PUSH DE
LD DE,STR_PANIC
CALL WRITESTR
POP DE
CALL XREGDMP ; DUMP REGISTERS
JR SYSHALT ; FULL STOP
;
;
;
CONTINUE:
PUSH AF
CONTINUE1:
PUSH DE
LD DE,STR_CONTINUE
CALL WRITESTR
POP DE
CALL CIN
RES 5,A ; FORCE UPPERCASE (IMPERFECTLY)
CALL COUT ; ECHO
CP 'Y'
JR Z,CONTINUE3
CP 'N'
JR Z,SYSHALT
JR CONTINUE1
CONTINUE3:
CALL NEWLINE
POP AF
RET
;
;
;
SYSHALT:
LD DE,STR_HALT
CALL WRITESTR
DI
HALT
;
; PRINT VALUE OF HL AS THOUSANDTHS, IE. 0.000
;
PRTD3M:
PUSH BC
PUSH DE
PUSH HL
LD E,'0'
LD BC,-10000
CALL PRTD3M1
LD E,0
LD BC,-1000
CALL PRTD3M1
CALL PC_PERIOD
LD BC,-100
CALL PRTD3M1
LD C,-10
CALL PRTD3M1
LD C,-1
CALL PRTD3M1
POP HL
POP DE
POP BC
RET
PRTD3M1:
LD A,'0' - 1
PRTD3M2:
INC A
ADD HL,BC
JR C,PRTD3M2
SBC HL,BC
CP E
JR Z,PRTD3M3
LD E,0
CALL COUT
PRTD3M3:
RET
;==================================================================================================
; DISPLAY SUMMARY OF ATTACHED UNITS/DEVICES
;==================================================================================================
@ -7373,7 +7330,7 @@ CST2:
RET
;
;==================================================================================================
; MISCELLANEOUS UTILITY FUNCTIONS
; INTERNAL UTILITY FUNCTIONS
;==================================================================================================
;
; SET HL TO IY+A, A IS TRASHED
@ -7410,6 +7367,117 @@ HB_CHS2LBA:
XOR A
RET
;
; SYSTEM CHECK: DUMP MACHINE STATE AND CONTINUE?
;
SYSCHKA:
; CHECK DIAG LEVEL TO SEE IF WE SHOULD DISPLAY
PUSH AF ; PRESERVE INCOMING AF VALUE
LD A,(CB_DIAGLVL) ; GET DIAGNOSTIC LEVEL
CP DL_ERROR ; >= ERROR LEVEL
JR C,SYSCHK1 ; IF NOT, GO HOME
POP AF ; RESTORE INCOMING AF VALUE
;
; DISPLAY SYSCHK MESSAGE
PUSH DE ; PRESERVE DE VALUE
LD DE,STR_SYSCHK ; POINT TO PREFIX STRING
CALL WRITESTR ; PRINT IT
POP DE ; RESTORE DE VALUE
CALL XREGDMP ; DUMP REGISTERS
; DISPLAY ERROR CODE. IT IS AT RETURN ADDRESS+1 .. LD A,XX
EX (SP),HL ; GET RETURN ADDRESS
INC HL ; POINT TO THE ERROR CODE
PUSH AF
LD A,(HL) ; DISPLAY
CALL PRTHEXBYTE
POP AF
DEC HL ; RESTORE RETURN ADDRESS
EX (SP),HL
;
JR CONTINUE ; CHECK W/ USER
;
SYSCHK1:
; RETURN IF MESSAGING BYPASSED BY DIAG LEVEL
POP AF
RET
;
; PANIC: DUMP MACHINE STATE AND HALT
;
PANIC:
PUSH DE
LD DE,STR_PANIC
CALL WRITESTR
POP DE
CALL XREGDMP ; DUMP REGISTERS
JR SYSHALT ; FULL STOP
;
;
;
CONTINUE:
PUSH AF
CONTINUE1:
PUSH DE
LD DE,STR_CONTINUE
CALL WRITESTR
POP DE
CALL CIN
RES 5,A ; FORCE UPPERCASE (IMPERFECTLY)
CALL COUT ; ECHO
CP 'Y'
JR Z,CONTINUE3
CP 'N'
JR Z,SYSHALT
JR CONTINUE1
CONTINUE3:
CALL NEWLINE
POP AF
RET
;
;
;
SYSHALT:
LD DE,STR_HALT
CALL WRITESTR
DI
HALT
;
; PRINT VALUE OF HL AS THOUSANDTHS, IE. 0.000
;
PRTD3M:
PUSH BC
PUSH DE
PUSH HL
LD E,'0'
LD BC,-10000
CALL PRTD3M1
LD E,0
LD BC,-1000
CALL PRTD3M1
CALL PC_PERIOD
LD BC,-100
CALL PRTD3M1
LD C,-10
CALL PRTD3M1
LD C,-1
CALL PRTD3M1
POP HL
POP DE
POP BC
RET
PRTD3M1:
LD A,'0' - 1
PRTD3M2:
INC A
ADD HL,BC
JR C,PRTD3M2
SBC HL,BC
CP E
JR Z,PRTD3M3
LD E,0
CALL COUT
PRTD3M3:
RET
;
;==================================================================================================
; HBIOS GLOBAL DATA
;==================================================================================================

10
Source/HBIOS/romldr.asm

@ -1352,9 +1352,13 @@ diskread:
;
clrled:
#if (BIOS == BIOS_WBW)
#if (DIAGENABLE)
xor a ; zero accum
out (DIAGPORT),a ; clear diag leds
#if (FPLED_ENABLE)
;xor a ; zero accum
;out (FPLED_IO),a ; clear diag leds
ld b,BF_SYSSET ; HBIOS SysGet
ld c,BF_SYSSET_PANEL ; ... Panel swiches value
ld l,$00 ; all LEDs off
rst 08 ; do it
#endif
#if (LEDENABLE)
#if (LEDMODE == LEDMODE_STD)

8
Source/HBIOS/vrc.asm

@ -46,6 +46,9 @@ VRC_INIT:
RET
;
VRC_INIT1:
; RECORD DRIVER ACTIVE
OR $FF
LD (VRC_ACTIVE),A
; DISPLAY CONSOLE DIMENSIONS
LD A,VRC_COLS
CALL PC_SPACE
@ -232,8 +235,8 @@ VRC_VDARDC:
; ON RETURN, ZF SET INDICATES HARDWARE FOUND
;
VRC_PROBE:
LD C,VRC_BASE
LD B,0
LD C,VRC_BASE + 1 ; +1 AVOIDS LEDS
LD B,$00
LD A,$AA
OUT (C),A
INC B
@ -632,6 +635,7 @@ VRC_POS .DW 0 ; CURRENT DISPLAY POSITION
VRC_OFF .DW 0 ; SCREEN START OFFSET INTO DISP BUF
VRC_LOFF .DB 0 ; LINE OFFSET INTO DISP BUF
VRC_CURSOR .DB 0 ; CURSOR NESTING LEVEL
VRC_ACTIVE .DB FALSE ; FLAG FOR DRIVER ACTIVE
;
;==================================================================================================
; VGA DRIVER - INSTANCE DATA

2
Source/ver.inc

@ -2,7 +2,7 @@
#DEFINE RMN 3
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "3.3.0-dev.8"
#DEFINE BIOSVER "3.3.0-dev.9"
#define rmj RMJ
#define rmn RMN
#define rup RUP

2
Source/ver.lib

@ -3,5 +3,5 @@ rmn equ 3
rup equ 0
rtp equ 0
biosver macro
db "3.3.0-dev.8"
db "3.3.0-dev.9"
endm

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