mirror of
https://github.com/wwarthen/RomWBW.git
synced 2026-02-06 22:13:13 -06:00
ROMLDR Improvements
.com files can now be started from CP/M and size of .com files has been reduced so they always fit.
This commit is contained in:
Wayne Warthen
@@ -1058,14 +1058,6 @@ through the normal startup process just like it was started from ROM.
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However, your ROM has not been updated and the next time you boot your
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system, it will revert to the system image contained in ROM.
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There are two restrictions to be aware of related to loading a system
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image as a .com application. First, this is only supported under
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Z-System and CP/M 2.2. You must boot into one of these OSes before
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attempting to launch the .com file. Second, you may find that you
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are unable to load the .com file because it is too large to fit in
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available application RAM (TPA). Your only recourse in this
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situation is to build a custom ROM with fewer features.
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If you do not have easy access to a ROM programmer, it is usually
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possible to reprogram your system ROM using the FLASH utility from
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Will Sowerbutts. This application, called FLASH.COM, can be found on the
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@@ -184,9 +184,12 @@ if ($Platform -ne "UNA")
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#
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"Building ${RomName} output files..."
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# Build 32K OS chunk containing the loader, debug monitor, and OS images
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# Build 32K OS chunk containing the loader, debug monitor, and two OS images
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Concat 'romldr.bin', 'eastaegg.bin','dbgmon.bin', "..\cpm22\cpm_${Bios}.bin", "..\zsdos\zsys_${Bios}.bin" osimg.bin
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# Build 20K OS chunk containing the loader, debug monitor, and one OS image
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Concat 'romldr.bin', 'eastaegg.bin','dbgmon.bin', "..\zsdos\zsys_${Bios}.bin" osimg_small.bin
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# Build second 32K chunk containing supplemental ROM apps (not for UNA)
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if ($Platform -ne "UNA")
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{
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@@ -237,8 +240,8 @@ if ($Platform -eq "UNA")
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else
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{
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Concat 'hbios_rom.bin','osimg.bin','osimg1.bin','osimg.bin',$RomDiskFile $RomFile
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Concat 'hbios_app.bin','osimg.bin' $ComFile
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# Concat 'hbios_img.bin','osimg.bin' $ImgFile
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Concat 'hbios_app.bin','osimg_small.bin' $ComFile
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# Concat 'hbios_img.bin','osimg_small.bin' $ImgFile
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}
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# Remove the temporary working ROM disk file
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@@ -100,6 +100,7 @@ fi
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echo "Building $romname output files..."
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cat romldr.bin eastaegg.bin dbgmon.bin ../CPM22/cpm_$BIOS.bin ../ZSDOS/zsys_$BIOS.bin >osimg.bin
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cat romldr.bin eastaegg.bin dbgmon.bin ../ZSDOS/zsys_$BIOS.bin >osimg_small.bin
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if [ $platform != UNA ] ; then
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cat camel80.bin nascom.bin tastybasic.bin game.bin imgpad0.bin usrrom.bin >osimg1.bin
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@@ -146,8 +147,8 @@ if [ $platform = UNA ] ; then
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cat ../UBIOS/UNA-BIOS.BIN osimg.bin ../UBIOS/FSFAT.BIN $romdiskfile >$romname.rom
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else
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cat hbios_rom.bin osimg.bin osimg1.bin osimg.bin $romdiskfile >$romname.rom
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cat hbios_app.bin osimg.bin > $romname.com
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cat hbios_img.bin osimg.bin > $romname.img
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cat hbios_app.bin osimg_small.bin > $romname.com
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# cat hbios_img.bin osimg_small.bin > $romname.img
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fi
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#rm $romdiskfile
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@@ -85,7 +85,7 @@
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;
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#IF (DSRTCMODE == DSRTCMODE_STD)
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;
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DSRTC_BASE .EQU RTCIO ; RTC PORT
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DSRTC_IO .EQU RTCIO ; RTC PORT
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;
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DSRTC_DATA .EQU %10000000 ; BIT 7 IS RTC DATA OUT
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DSRTC_CLK .EQU %01000000 ; BIT 6 IS RTC CLOCK (CLK)
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@@ -95,6 +95,10 @@ DSRTC_CE .EQU %00010000 ; BIT 4 IS CHIP ENABLE (CE)
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DSRTC_MASK .EQU %11110000 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
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DSRTC_IDLE .EQU %00100000 ; QUIESCENT STATE
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;
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RTCDEF .SET DSRTC_IDLE ; FOR HBIOS MAINLINE
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;
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#DEFINE DSRTC_OPRVAL RTCVAL
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;
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; VALUES FOR DIFFERENT BATTERY OR SUPERCAPACITOR CHARGE RATES
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;
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DS1d2k .EQU %10100101 ; 1 DIODE 2K RESISTOR (DEFAULT)
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@@ -108,7 +112,7 @@ DS2d8k .EQU %10101011 ; 2 DIODES 8K RESISTOR
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;
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#IF (DSRTCMODE == DSRTCMODE_MFPIC)
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;
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DSRTC_BASE .EQU $43 ; RTC PORT ON MF/PIC
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DSRTC_IO .EQU $43 ; RTC PORT ON MF/PIC
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;
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DSRTC_DATA .EQU %00000001 ; BIT 0 IS RTC DATA OUT
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DSRTC_CLK .EQU %00000100 ; BIT 2 IS RTC CLOCK (CLK)
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@@ -116,12 +120,12 @@ DSRTC_WR .EQU %00000010 ; BIT 1 IS DATA DIRECTION (WE)
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DSRTC_CE .EQU %00001000 ; BIT 3 CHIP ENABLE (/CE)
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;
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DSRTC_MASK .EQU %00001111 ; MASK FOR BITS WE OWN IN RTC LATCH PORT
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DSRTC_IDLE .EQU %00101000 ; QUIESCENT STATE
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DSRTC_IDLE .EQU %00001000 ; QUIESCENT STATE
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;
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#DEFINE DSRTC_OPRVAL DSRTC_RTCVAL
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;
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#ENDIF
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;
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RTCDEF .SET DSRTC_IDLE ; FOR HBIOS MAINLINE
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;
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DSRTC_BUFSIZ .EQU 7 ; 7 BYTE BUFFER (YYMMDDHHMMSSWW)
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;
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; RTC DEVICE PRE-INITIALIZATION ENTRY
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@@ -130,10 +134,10 @@ DSRTC_PREINIT:
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;
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; SET RELEVANT BITS IN RTC LATCH SHADOW REGISTER
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; TO THEIR QUIESENT STATE
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LD A,(RTCVAL) ; GET CURRENT SHADOW REG VAL
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LD A,(DSRTC_OPRVAL) ; GET CURRENT SHADOW REG VAL
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AND ~DSRTC_MASK ; CLEAR OUR BITS
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OR DSRTC_IDLE ; SET OUR IDLE BITS
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LD (RTCVAL),A ; SAVE IT
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LD (DSRTC_OPRVAL),A ; SAVE IT
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;
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CALL DSRTC_DETECT ; HARDWARE DETECTION
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LD (DSRTC_STAT),A ; SAVE RESULT
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@@ -167,7 +171,7 @@ DSRTC_INIT:
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;
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; PRINT RTC LATCH PORT ADDRESS
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PRTS(" IO=0x$") ; LABEL FOR IO ADDRESS
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LD A,DSRTC_BASE ; GET IO ADDRESS
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LD A,DSRTC_IO ; GET IO ADDRESS
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CALL PRTHEXBYTE ; PRINT IT
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;
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; CHECK PRESENCE STATUS
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@@ -541,15 +545,15 @@ DSRTC_WRCLK1:
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; 5) PUT COMMAND
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;
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DSRTC_CMD:
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LD A,(RTCVAL) ; INIT A WITH QUIESCENT STATE
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OUT (DSRTC_BASE),A ; WRITE TO PORT
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LD A,(DSRTC_OPRVAL) ; INIT A WITH QUIESCENT STATE
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OUT (DSRTC_IO),A ; WRITE TO PORT
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CALL DLY2 ; DELAY 2 * 27 T-STATES
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#IF (DSRTCMODE == DSRTCMODE_MFPIC)
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AND ~DSRTC_CE ; ASSERT CE (LOW)
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#ELSE
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OR DSRTC_CE ; ASSERT CE (HIGH)
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#ENDIF
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OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
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OUT (DSRTC_IO),A ; WRITE TO RTC PORT
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CALL DLY2 ; DELAY 2 * 27 T-STATES
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CALL DSRTC_PUT ; WRITE IT
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RET
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@@ -577,7 +581,7 @@ DSRTC_PUT:
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#ENDIF
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DSRTC_PUT1:
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AND ~DSRTC_CLK ; SET CLOCK LOW
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OUT (DSRTC_BASE),A ; DO IT
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OUT (DSRTC_IO),A ; DO IT
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CALL DLY1 ; DELAY 27 T-STATES
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#IF (DSRTCMODE == DSRTCMODE_MFPIC)
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@@ -589,9 +593,9 @@ DSRTC_PUT1:
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RR E ; ROTATE NEXT BIT TO SEND INTO CARRY
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RRA ; ROTATE BITS BACK TO CORRECT POSTIIONS
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#ENDIF
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OUT (DSRTC_BASE),A ; ASSERT DATA BIT ON BUS
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OUT (DSRTC_IO),A ; ASSERT DATA BIT ON BUS
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OR DSRTC_CLK ; SET CLOCK HI
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OUT (DSRTC_BASE),A ; DO IT
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OUT (DSRTC_IO),A ; DO IT
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CALL DLY1 ; DELAY 27 T-STATES
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DJNZ DSRTC_PUT1 ; LOOP IF NOT DONE
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RET
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@@ -620,15 +624,15 @@ DSRTC_GET:
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#ENDIF
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DSRTC_GET1:
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AND ~DSRTC_CLK ; SET CLK LO
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OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
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OUT (DSRTC_IO),A ; WRITE TO RTC PORT
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CALL DLY1 ; DELAY 2 * 27 T-STATES
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PUSH AF ; SAVE PORT VALUE
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IN A,(DSRTC_BASE) ; READ THE RTC PORT
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IN A,(DSRTC_IO) ; READ THE RTC PORT
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RRA ; DATA BIT TO CARRY
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RR E ; SHIFT INTO WORKING VALUE
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POP AF ; RESTORE PORT VALUE
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OR DSRTC_CLK ; CLOCK BACK TO HI
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OUT (DSRTC_BASE),A ; WRITE TO RTC PORT
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OUT (DSRTC_IO),A ; WRITE TO RTC PORT
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CALL DLY1 ; DELAY 27 T-STATES
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DJNZ DSRTC_GET1 ; LOOP IF NOT DONE (13)
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RET
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@@ -640,8 +644,8 @@ DSRTC_GET1:
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; 1) SET ALL LINES BACK TO QUIESCENT STATE
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;
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DSRTC_END:
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LD A,(RTCVAL) ; INIT A WITH QUIESCENT STATE
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OUT (DSRTC_BASE),A ; WRITE TO PORT
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LD A,(DSRTC_OPRVAL) ; INIT A WITH QUIESCENT STATE
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OUT (DSRTC_IO),A ; WRITE TO PORT
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RET ; RETURN
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;
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; WORKING VARIABLES
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@@ -649,6 +653,8 @@ DSRTC_END:
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DSRTC_STAT .DB 0 ; DEVICE STATUS (0=OK)
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DSRTC_TEMP .DB 0 ; TEMP VALUE STORAGE
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;
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DSRTC_RTCVAL .DB DSRTC_IDLE ; LOCAL LATCH SHADOW FOR MFPIC
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;
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; DSRTC_BUF IS USED FOR BURST READ/WRITE OF CLOCK DATA TO DS-1302
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; FIELDS BELOW MATCH ORDER OF DS-1302 FIELDS (BCD)
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;
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@@ -115,7 +115,7 @@ start:
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di
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#endif
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;
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; Switch banked memory to user RAM bank and setup page zero.
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; Switch to user RAM bank
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;
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#if (BIOS == BIOS_WBW)
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ld b,BF_SYSSETBNK ; HBIOS func: set bank
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@@ -123,15 +123,24 @@ start:
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rst 08 ; do it
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ld a,c ; previous bank to A
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ld (bid_ldr),a ; save previous bank for later
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cp BID_IMG0 ; starting from ROM?
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#endif
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;
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#if (BIOS == BIOS_UNA)
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ld bc,$01FB ; UNA func: set bank
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ld de,BID_USR ; select user bank
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rst 08 ; do it
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ld a,c ; save previous bank
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ld (bid_ldr),de ; ... for later
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ld a,d ; starting from ROM?
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or e ; ... bank == 0?
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#endif
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;
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; For app mode startup, use alternate table
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ld hl,ra_tbl ; assume ROM startup
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jr z,start1 ; if so, ra_tbl OK, skip ahead
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ld hl,ra_tbl_app ; not ROM boot, get app tbl loc
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start1:
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ld (ra_tbl_loc),hl ; and overlay pointer
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;
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; Copy original page zero into user page zero
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;
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@@ -274,7 +283,7 @@ runcmd:
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jp z,reboot ; if so, do it
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;
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; Attempt ROM application launch
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ld ix,ra_tbl ; point to start of ROM app tbl
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ld ix,(ra_tbl_loc) ; point to start of ROM app tbl
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ld c,a ; save command in C
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runcmd1:
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ld a,(ix+ra_conkey) ; get match char
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@@ -334,7 +343,7 @@ dskycmd:
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jp z,reboot ; if so, do it
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;
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; Attempt ROM application launch
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ld ix,ra_tbl ; point to start of ROM app tbl
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ld ix,(ra_tbl_loc) ; point to start of ROM app tbl
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ld c,a ; save DSKY key in C
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dskycmd1:
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ld a,(ix+ra_dskykey) ; get match char
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@@ -374,7 +383,7 @@ applst:
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ld hl,str_applst
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call pstr
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call nl
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ld ix,ra_tbl
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ld ix,(ra_tbl_loc)
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applst1:
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; check for end of table
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ld a,(ix)
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@@ -1493,25 +1502,26 @@ ra_ent .equ 12
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; *_SIZ *_END and any code generated which does not include std.asm is
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; synced.
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;
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; Note: The loadable ROM images are placed in ROM banks bid_img0 and
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; bid_img1. However, RomWBW supports a mechanism to load a complete
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; Note: The loadable ROM images are placed in ROM banks BID_IMG0 and
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; BID_IMG1. However, RomWBW supports a mechanism to load a complete
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; new system dynamically as a runnable application (see appboot and
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; imgboot in hbios.asm). In this case, the contents of bid_img0 will
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; imgboot in hbios.asm). In this case, the contents of BID_IMG0 will
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; be pre-loaded into the currently executing ram bank thereby allowing
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; those images to be dynamically loaded as well. To support this
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; concept, a pseudo-bank called bid_cur is used to specify the images
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; normally found in bid_img0. In romload, this special value will cause
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; normally found in BID_IMG0. In romload, this special value will cause
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; the associated image to be loaded from the currently executing bank
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; which will be correct regardless of the load mode. Images in other
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; banks (bid_img1) will always be loaded directly from ROM.
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; banks (BID_IMG1) will always be loaded directly from ROM.
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;
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ra_tbl:
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;
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; Name Key Dsky Bank Src Dest Size Entry
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; --------- ------- ----- -------- ----- ------- ------- ----------
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ra_ent(str_mon, 'M', KY_CL, bid_cur, $1000, MON_LOC, MON_SIZ, MON_SERIAL)
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ra_ent(str_mon, 'M', KY_CL, BID_IMG0, $1000, MON_LOC, MON_SIZ, MON_SERIAL)
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ra_entsiz .equ $ - ra_tbl
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ra_ent(str_cpm22, 'C', KY_BK, bid_cur, $2000, CPM_LOC, CPM_SIZ, CPM_ENT)
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ra_ent(str_zsys, 'Z', KY_FW, bid_cur, $5000, CPM_LOC, CPM_SIZ, CPM_ENT)
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ra_ent(str_cpm22, 'C', KY_BK, BID_IMG0, $2000, CPM_LOC, CPM_SIZ, CPM_ENT)
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ra_ent(str_zsys, 'Z', KY_FW, BID_IMG0, $5000, CPM_LOC, CPM_SIZ, CPM_ENT)
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#if (BIOS == BIOS_WBW)
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ra_ent(str_fth, 'F', KY_EX, BID_IMG1, $0000, FTH_LOC, FTH_SIZ, FTH_LOC)
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ra_ent(str_bas, 'B', KY_DE, BID_IMG1, $1700, BAS_LOC, BAS_SIZ, BAS_LOC)
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@@ -1520,9 +1530,21 @@ ra_ent(str_play, 'P', $FF, BID_IMG1, $4000, GAM_LOC, GAM_SIZ, GAM_LOC)
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ra_ent(str_user, 'U', $FF, BID_IMG1, $7000, USR_LOC, USR_SIZ, USR_LOC)
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#endif
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#if (DSKYENABLE)
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ra_ent(str_dsky, 'Y'+$80, KY_GO, bid_cur, $1000, MON_LOC, MON_SIZ, MON_DSKY)
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ra_ent(str_dsky, 'Y'+$80, KY_GO, bid_cur, $1000, MON_LOC, MON_SIZ, MON_DSKY)
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#endif
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ra_ent(str_egg, 'E'+$80, $FF , bid_cur, $0E00, EGG_LOC, EGG_SIZ, EGG_LOC)
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ra_ent(str_egg, 'E'+$80, $FF , bid_cur, $0E00, EGG_LOC, EGG_SIZ, EGG_LOC)
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.dw 0 ; table terminator
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;
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ra_tbl_app:
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;
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; Name Key Dsky Bank Src Dest Size Entry
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; --------- ------- ----- -------- ----- ------- ------- ----------
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ra_ent(str_mon, 'M', KY_CL, bid_cur, $1000, MON_LOC, MON_SIZ, MON_SERIAL)
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ra_ent(str_zsys, 'Z', KY_FW, bid_cur, $2000, CPM_LOC, CPM_SIZ, CPM_ENT)
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#if (DSKYENABLE)
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ra_ent(str_dsky, 'Y'+$80, KY_GO, bid_cur, $1000, MON_LOC, MON_SIZ, MON_DSKY)
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#endif
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ra_ent(str_egg, 'E'+$80, $FF , bid_cur, $0E00, EGG_LOC, EGG_SIZ, EGG_LOC)
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.dw 0 ; table terminator
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;
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str_mon .db "Monitor",0
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@@ -1562,6 +1584,7 @@ bid_ldr .ds 2 ; bank at startup
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loadlba .ds 4 ; lba for load, dword
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#endif
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;
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ra_tbl_loc .ds 2 ; points to active ra_tbl
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bootunit .ds 1 ; boot disk unit
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bootslice .ds 1 ; boot disk slice
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loadcnt .ds 1 ; num disk sectors to load
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@@ -20,8 +20,8 @@
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;
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; CS = CHIP SELECT (AKA DAT3 FOR NON-SPI MODE)
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; CLK = CLOCK
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; DI = DATA IN (HOST -> CARD, AKA CMD FOR NON-SPI MODE)
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; DO = DATA OUT (HOST <- CARD, AKA DAT0 FOR NON-SPI MODE)
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; DI = MOSI = DATA IN (HOST -> CARD, AKA CMD FOR NON-SPI MODE)
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; DO = MISO = DATA OUT (HOST <- CARD, AKA DAT0 FOR NON-SPI MODE)
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;
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; NOTES:
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; 1) SIGNAL NAMES ARE FROM THE SD CARD SPEC AND ARE NAMED FROM THE
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@@ -570,6 +570,7 @@ SD_INITUNIT2:
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RET Z ; IF NOT, DONE
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PRTS(" WP$") ; NOTIFY USER
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;
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XOR A ; SIGNAL SUCCESS
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RET ; DONE
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;
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;----------------------------------------------------------------------
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@@ -2,4 +2,4 @@
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#DEFINE RMN 1
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#DEFINE RUP 0
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#DEFINE RTP 0
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#DEFINE BIOSVER "3.1-pre.1"
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#DEFINE BIOSVER "3.1-pre.2"
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@@ -3,5 +3,5 @@ rmn equ 1
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rup equ 0
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rtp equ 0
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biosver macro
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db "3.1-pre.1"
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db "3.1-pre.2"
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endm
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Reference in New Issue
Block a user