- Support is limited to 512 byte sectors. So, devices such as ATAPI Zip Drives will work. CD-ROM devices will not because they use a larger sector size.
- Added WDATE command courtesy Kevin Boone. See https://github.com/kevinboone/wdate-cpm for more information.
- Final cleanup of PPA/IMM/SYQ drivers including CPU speed compensated timeouts.
IMM Driver has rational timeouts now. It also lights the MG014 LED during activity.
The PPA skeleton just attempts to determine if the PPA interface is present. It does not attempt any I/O.
- Added ability to enable VGARC and front panel in default config without I/O conflicts (does **not** support having both types of hardware present at the same time).
- Fixed documentation error in issue #345 reported by @MorfeoMatrixx.
- The use of hardware reset has been improved such that it is generally only used at initial boot up.
- Minor improvements to CF card detection and initialization.
- Implement a simple wait mechanism to accommodate the startup time of the RC2014 SD Pico module.
- Front panel I/O port for SC series of systems has been moved to 0x00 which is consistent with all other systems and avoids some I/O conflicts.
Prior improvement to IDE device detection broke detection of spinning hard disks. IDE registers cannot be used prior to device init completion (spin up). Not a problem for CF, but special steps required to ensure devices are fully initialized before register testing.
- Floppy devices are now configured per-device so that each floppy drive can be different (e.g., first floppy is 3.5" and second floppy is 5.25").
- Removed need to use termination signal on floppy sector I/O.
Addresses issue #318
If serial hardware flow control is enabled, but not working, then a system will appear dead because it won't send any data to the host computer. This change suppresses hardware flow control during boot just to ensure that boot messages can make it to the serial console. This will only be effective for serial interfaces that support dynamic management of HFC.
Edge case where the CPU speed detection routine would overflow in a fast emulator and return a speed of 0.000 MHz. Modified to fail back to the default CPU speed from the config file if an overflow occurs.
- Revamped CTC detection algorithm hoping to handle problem XRBR is having
- Fixed typo in dynamic CPU speed test that caused it to not be properly recorded/reported (credit XRBR)
- Allow use of DEL/RUBOUT keys as backspace in ROM Loader and Debug Monitor
- Set the default CPUOSC to 8MHz (default value in the project's
documentation), updated the User Guide
- Set the FDD controller to ZETA2 - regression introduced in bd664c3
cp/m fails to boot with the dma driver included but no dma hardware installed. This is because the default "dma_fail_flag" indicates that the dma is good to go. But in safe mode the dma initialization never takes place to find no dma and set this flag, so the memory driver hangs. This change is to make the default status of the flag the failed state so the memory driver will fallback to software in recovery mode.
CBIOS reports *** HBIOS Heap Overflow, when the HBIOS is big (i.e. lots of included drivers)
Trigger build failure when CCP will not fit in heap.
Slightly more informative CBIOS error message
