Wayne Warthen
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4ce0e1f657
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Handle CTC anomaly
Small update to accommodate CTC behavior that occurs when the CTC trigger is more than half the CTC clock.
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2020-04-20 13:08:49 -07:00 |
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Wayne Warthen
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7d022f709b
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CF Card compatibility improvement
Older CF Cards did not reset IDE registers to defaults values when reset. Implemented a work around.
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2020-04-18 15:19:10 -07:00 |
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Wayne Warthen
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57f78d1a6b
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CTC driver fine tuning
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2020-04-17 15:53:17 -07:00 |
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Wayne Warthen
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8ad2bdbb29
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SIO driver now CTC aware
The SIO driver can now use a CTC (if available) to provide much more flexible baud rate programming.
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2020-04-17 11:25:28 -07:00 |
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Wayne Warthen
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e84a1bc3ea
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ROMLDR Improvements
.com files can now be started from CP/M and size of .com files has been reduced so they always fit.
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2020-04-11 13:32:55 -07:00 |
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Wayne Warthen
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f4daaa91a4
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Add RC2014 UART, Improve SD protocol fix
- RC2014 and related platforms will autodetect a UART at 0xA0 and 0xA8
- Ensure that CS fully brackets all SD I/O
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2020-04-09 11:49:09 -07:00 |
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Wayne Warthen
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621175533b
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Start v3.1 Development
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2020-04-06 12:54:23 -07:00 |
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Wayne Warthen
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9d5e792b34
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Revert "New ROMLDR and INTRTC driver"
This reverts commit d9bed4563e.
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2020-04-06 12:44:52 -07:00 |
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Wayne Warthen
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d9bed4563e
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New ROMLDR and INTRTC driver
- Refactored romldr.asm
- Added new periodic timer based RTC driver
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2020-04-05 16:01:04 -07:00 |
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Wayne Warthen
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2e2d2bebd7
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Finalize v3.0.1
Cleanup release for v3.0
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2020-04-04 10:48:34 -07:00 |
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Wayne Warthen
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81390b846c
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Bump to Version 3.0
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2020-03-27 10:38:38 -07:00 |
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Wayne Warthen
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e15546e051
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Pre-release for Testing
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2020-03-26 15:34:34 -07:00 |
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Wayne Warthen
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a8d2f3bd39
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Minor Bug Fixes
- Disk assignment edge case
- CP/M 3 accidental fall thru
- Cosmetic updates
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2020-03-15 13:45:32 -07:00 |
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Wayne Warthen
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daf0430c6f
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Prerelease 36
General cleanup
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2020-03-14 10:50:34 -07:00 |
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Wayne Warthen
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db81d1a28b
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Add SC131 Support
Also cleaned up some ReadMe files.
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2020-03-12 11:40:11 -07:00 |
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Wayne Warthen
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490c865ea1
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Build Test
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2020-03-06 16:56:27 -08:00 |
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