Commit Graph

12 Commits

Author SHA1 Message Date
Wayne Warthen
98463d6774 Update ACIA detection
ACIA should no longer be detected if there is also a UART module in the system.
2020-04-19 17:11:54 -07:00
Wayne Warthen
257f784318 Improved clock driver auto-detect/fallback 2020-04-12 14:54:30 -07:00
Wayne Warthen
f4daaa91a4 Add RC2014 UART, Improve SD protocol fix
- RC2014 and related platforms will autodetect a UART at 0xA0 and 0xA8
- Ensure that CS fully brackets all SD I/O
2020-04-09 11:49:09 -07:00
Wayne Warthen
621175533b Start v3.1 Development 2020-04-06 12:54:23 -07:00
Wayne Warthen
60c3ff8a41 Cleanup
- Fix SuperZAP to work under NZCOM and ZPM3
- Finalize standard config files
2020-03-25 19:54:55 -07:00
Wayne Warthen
bbd1ce6168 Config File Cleanups 2020-03-14 14:37:18 -07:00
Phillip Stevens
6f0940e4b5 HBIOS SCZ180 - adjust mutex comment 2020-03-13 09:22:32 +11:00
Phillip Stevens
97c533c7c5 HBIOS SCZ180 - remove mutex special files 2020-03-13 08:56:20 +11:00
Wayne Warthen
382b5594f0 Support multiple devices in IDE driver 2020-02-11 17:01:55 -08:00
Wayne Warthen
6950195741 Finalize pre-release 27
Default baud rate for RC and SC platforms with Z180 now 115200.
2020-01-26 12:46:51 -08:00
Wayne Warthen
782bcba9f7 Cleanup 2019-10-05 13:58:30 -07:00
Wayne Warthen
57dabc1ab5 Finalize SCZ180 Configurations 2019-10-02 08:45:11 -07:00