Wayne Warthen
1a8cfb91e7
Changes from Dean Netherton
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- Allow immediate autoboot (no timeout)
- Allow configuring number of floppy devices
2020-05-02 14:58:07 -07:00
Wayne Warthen
0834acc020
RTC Device Info Functions
2020-04-29 19:30:24 -07:00
Wayne Warthen
e50f5f0935
Add support for EPFDC
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Credit to Alan Cox for the changes.
2020-04-29 17:45:04 -07:00
Wayne Warthen
e654c5739e
Disk Catalog & Loader Console Command
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- Disk Catalog document has been added to the Doc directory courtesy of Mykl Orders.
- Loader enhanced to allow switching the console device before booting OS or ROM app.
2020-04-23 22:08:19 -07:00
Wayne Warthen
dc2f55570c
Make tick frequency configurable
2020-04-23 17:28:18 -07:00
Wayne Warthen
d14cf27acf
Miscellaneous Cleanup
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No functional changes.
2020-04-22 11:26:32 -07:00
Wayne Warthen
f57e3bed00
Enhance CTC periodic timer
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Add ability to use TIMER mode in CTC driver to generate priodic interrupts.
2020-04-21 12:46:31 -07:00
Wayne Warthen
08b112a20f
Bump version
2020-04-21 09:43:31 -07:00
Wayne Warthen
aac4a51f23
MacOS Build Improvement
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Build script updated to improve compatibility with MacOS.
Credit to Fredrik Axtelius for this.
2020-04-20 14:59:27 -07:00
Wayne Warthen
4ce0e1f657
Handle CTC anomaly
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Small update to accommodate CTC behavior that occurs when the CTC trigger is more than half the CTC clock.
2020-04-20 13:08:49 -07:00
Wayne Warthen
7d022f709b
CF Card compatibility improvement
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Older CF Cards did not reset IDE registers to defaults values when reset. Implemented a work around.
2020-04-18 15:19:10 -07:00
Wayne Warthen
57f78d1a6b
CTC driver fine tuning
2020-04-17 15:53:17 -07:00
Wayne Warthen
8ad2bdbb29
SIO driver now CTC aware
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The SIO driver can now use a CTC (if available) to provide much more flexible baud rate programming.
2020-04-17 11:25:28 -07:00
Wayne Warthen
e84a1bc3ea
ROMLDR Improvements
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.com files can now be started from CP/M and size of .com files has been reduced so they always fit.
2020-04-11 13:32:55 -07:00
Wayne Warthen
f4daaa91a4
Add RC2014 UART, Improve SD protocol fix
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- RC2014 and related platforms will autodetect a UART at 0xA0 and 0xA8
- Ensure that CS fully brackets all SD I/O
2020-04-09 11:49:09 -07:00
Wayne Warthen
621175533b
Start v3.1 Development
2020-04-06 12:54:23 -07:00
Wayne Warthen
9d5e792b34
Revert "New ROMLDR and INTRTC driver"
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This reverts commit d9bed4563e
2020-04-06 12:44:52 -07:00
Wayne Warthen
d9bed4563e
New ROMLDR and INTRTC driver
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- Refactored romldr.asm
- Added new periodic timer based RTC driver
2020-04-05 16:01:04 -07:00
Wayne Warthen
2e2d2bebd7
Finalize v3.0.1
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Cleanup release for v3.0
2020-04-04 10:48:34 -07:00
Wayne Warthen
81390b846c
Bump to Version 3.0
2020-03-27 10:38:38 -07:00
Wayne Warthen
e15546e051
Pre-release for Testing
2020-03-26 15:34:34 -07:00
Wayne Warthen
a8d2f3bd39
Minor Bug Fixes
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- Disk assignment edge case
- CP/M 3 accidental fall thru
- Cosmetic updates
2020-03-15 13:45:32 -07:00
Wayne Warthen
daf0430c6f
Prerelease 36
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General cleanup
2020-03-14 10:50:34 -07:00
Wayne Warthen
db81d1a28b
Add SC131 Support
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Also cleaned up some ReadMe files.
2020-03-12 11:40:11 -07:00
Wayne Warthen
490c865ea1
Build Test
2020-03-06 16:56:27 -08:00
