Update CLRDIR with minor update from the author Max Scane to emphasize the need to type a capital Y to proceed. Thanks and credit to Max Scane for this application.
Adds CLRDIR to the Applications document.
- Rearranged HBIOS code to improve colocation of related code.
- Implemented macros to improve control over assembly diagnostic output.
- Improved handling of diagnostic LEDs.
- Improved application boot bank management.
- Implemented application boot for Z280 systems.
- Moved Z280_BNKSEL into proxy.
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- Translate NABU special keys to standard RomWBW values to allow things like arrow keys to emit proper escape sequences within ANSI emulation.
- Add a simple, single byte buffer to avoid keyboard status returning a key is ready when it is only a special character that has no translation.
- Modified TMS driver to always imbed an uncompressed font. This is because I have found no reasonable way to decompress a font while an OS is still active without mangling some of the OSes RAM.
- This change avoids clearing the screen every time an OS reset occurs. A non-destructive VDC reset is now performed that leaves the screen contents and cursor position unchanged.
- If an application overwrites the video RAM, then the screen may contain garbage upon return to OS. However, the console will still be functional and the user can just press enter a few times to clear the screen.
- When an OS performs a reset operation, the HBIOS hook has been extended to automatically reset the video hardware of the CRT device (if it exists).
- This should go a long way toward fixing corrupt video after an application is run that reprograms the video hardware.
- An OS reset may or may not be performed when an application exits depending on the behavior of the application. So, if an application exits without initiating a reset, then the video will not be reset. Most applications that muck with the video chip directly will perform the reset at exit, so this is not normally an issue.
- If the OS encounters an error (such as drive not ready when doing a DIR), the error message may be erased by this new behavior depending on the specific scenario.
- The TMS reset function was missing a call to re-initialize the CRT registers. This has been added.
- The SN76489 powers up in a dreadful state where it is emitting loud noise until initialized. Added a PREINIT entry point to initialize the registers earlier. Still not great, but a lot better.
Make the first UART port detected be Channel A $78-$7F : CHSEL=1. ( logic 0 on the CHSEL selects the UART channel B while a logic 1 selects UART channel A. )
Based on input from Martin R, the console takeover mechanism has been modified to require that the space bar be pressed twice in a row on the character unit desiring to be the console. This reduces the chance of a spurious console takeover due to garbage input on serial ports.
- If enabled by AUTOCON config setting, you can press <space> at any character device to take over the console at the boot loader prompt.
- Correction to SIOSEEK documentation in System Guide. Thanks and credit to Martin R.
- Update PR template for new branching under v3.4
- Tweak Makefile.inc for slightly improved performance
- Improve UART driver messaging when bad CTS signal is detected
- Minor doc updates
- Comment updates in ansi.asm and tms.asm
- Correction to build process for ROMless systems
- Fix for ZRC (default configuration) to use all available RAM
- Split out the SD and USB specific support from the main CH37x driver to optimize code space usage.
- Ensure CH37x mode switch is handled properly when there are multiple devices active in a system.
I am encountering some CH376 chips that go haywire after a
reset command. They stop responding for a very long time.
I am seeing this only on "LC Tech" adapters and only on Z80
systems (not Z180). No idea what is going on, so I am
giving up for now and removing the reset.
- Last check-in had a couple of config file errors which are corrected here.
- Also updated Appendix A of the User Guide to reflect new CH37x port addressing.
- Updated to standardize on 0x3E/0x3F for primary CH device and 0x3C/0x3D for secondary CH device. Both devices are optional and detected automatically.
- The post-reset delay of both the IDE and PPIDE drivers has been extended. The SD-IDE adapters need more time to initialize before being ready to behave as proper IDE devices.
- Added support for the FDC section of the Duodyne Disk-IO board.