Commit Graph

455 Commits

Author SHA1 Message Date
Wayne Warthen
b9d1cb12fe Misc. Cleanup
- No functional changes
2021-05-26 14:40:30 -07:00
Wayne Warthen
242dc59471 FDC hardware auto-detection
- FD driver will now detect presence of FDC hardware and install if found in all standard configurations
- Does *not* detect type of FDC which must still be set in config
- Added default FD driver MODE to all configs
- Thanks to Alan Cox for the technique!
2021-05-14 17:53:34 -07:00
Wayne Warthen
099a9331bf Miscellaneous
- Fixed Linux/MacOS build
- Fixed error reporting in some disk drivers
2021-05-12 18:01:44 -07:00
Wayne Warthen
12fea8a1d0 Fixes for MT011 in SD driver
Credit to Douglas Miller for these.
2021-05-02 18:02:07 -07:00
Wayne Warthen
ab3abb7936 CP/NET Stuff
- Added the MT011-based CP/NET work of Douglas Miller and Jay Cotton in user area 4.
- Added network boot (CP/NOS) from Douglas to Boot Loader
2021-04-29 15:29:00 -07:00
Wayne Warthen
c4a0548e76 Miscellaneous Fixes
- SDCNT was not properly implemented in all cases
- ParPortProp debug formatting fix
2021-04-27 14:35:00 -07:00
Wayne Warthen
ff6d854298 Received Char Reboot
Allow specifying a character code which, upon receipt, will reboot system.  Only useful/implemented for interrupt driven serial drivers.  Currently only implemented for ASCI and SIO.  Do *not* use this unless you fully understand the ramifications!!!
2021-04-21 16:53:42 -07:00
Wayne Warthen
a72802470a Miscellaneous
- Correct and enhance some diskdefs entries.  Added RC2014 definitions.
- Change NETBOOT binary from 32K to 8K
2021-04-18 11:38:15 -07:00
Wayne Warthen
0b92e41935 Prototype Network Boot Support 2021-04-17 17:00:42 -07:00
Wayne Warthen
518ddd9f46 Update ZZR Monitor 2021-04-16 14:02:21 -07:00
Wayne Warthen
4cbe3212a5 Allow swapping MT011 SPI ports
- Config variable SDMTSWAP will swap the logical order of the SPI ports of MT011
- Updated COPY.COM from v1.72 -> v1.73
2021-04-11 16:39:53 -07:00
Wayne Warthen
41061179b5 Miscellaneous
- Improved Linux build to pass actual processor type to uz80as
- Modified Z280 system timer to handle faster CPU clocks accurately
2021-04-01 17:08:16 -07:00
Wayne Warthen
1945c0f52d CBIOS default drive assignment cleanup
Improved the way that the default drive is assigned in the scenario where you are booting to a ROM-based OS.  This should allow removal of either the RAM drive or the ROM drive without causing unexpected consequences.
2021-03-20 11:55:12 -07:00
Wayne Warthen
ccda402b9b Add Z180 & Z280 timer config settings
Allows Z180 & Z280 system periodic timer to be enabled/disabled via config.  Enabled by default.
2021-03-18 10:37:08 -07:00
Wayne Warthen
7236aec3fe ZZRCC Disk Image Enhancements
Bill has provided an improved mechanism to allow ZZRCC to boot directly from CF Card.  This work has been incorporated directly into the diskimage creation process for the ZZRCC disk image.
2021-03-17 17:59:29 -07:00
Wayne Warthen
75d2cc4dfe Fix CP/M 3 ZZRCC RAM/ROM disk handling
- Clearing of RAM disk was corrupting non-RAM Disk banks on ZZRCC.
- On ZZRCC, CP/M 3 failed to make RAM/ROM disk DPB adjustments at startup.
2021-03-16 19:17:19 -07:00
Wayne Warthen
4edc408893 ZZRCC Build Improvements
- Creation of hex load file is now automated.
2021-03-13 16:42:06 -08:00
Wayne Warthen
9cf9893ed4 Miscellaneous
- Update romldr to stop using address space >= 0xA000
- ZZRCC work in progress (not finished)
2021-03-12 15:11:15 -08:00
Wayne Warthen
bc2e7a89cc CP/M 3 Time Routines Cleanup 2021-03-11 15:02:03 -08:00
Wayne Warthen
65db7a3b15 Implement CP/M 3 RTC date setting 2021-03-10 16:42:27 -08:00
Wayne Warthen
db659da876 Build script improvements
- Allow building a 128KB ROM with 0KB ROM disk
- Move Z280 UART driver to top of device list to make it the highest priority driver for Z280 platforms
2021-03-08 10:25:13 -08:00
Wayne Warthen
82a8792153 Fix Z280 Cold Restart 2021-03-07 19:01:29 -08:00
Wayne Warthen
0053a840b7 Support ZZRCC 2021-03-07 16:21:49 -08:00
Wayne Warthen
33ef02cfc0 Implement BOOTCON
Added BOOTCON config variable to allow setting the boot console device.  This replaces FORCECON and removes the code that used to rearrange the PCINITTBL.
2021-03-03 15:12:57 -08:00
Wayne Warthen
d4e7cb8d5f Tweaks
- Small optimization in Z180 invalid opcode handler
- Improve ZRC disk image generation script
2021-02-25 13:28:04 -08:00
Wayne Warthen
953dd70052 Z180 Invalid Opcode Tweaks
Thanks and credit to Phillip Stevens for his significant contributions to this enhancement.
2021-02-22 18:49:31 -08:00
Wayne Warthen
e17fee85e9 Add Z180 Invalid Opcode Handler 2021-02-22 14:18:01 -08:00
Wayne Warthen
6a46f8b74c Z280 UART Flow Control
- Implement RTS flow control on Z280 UART using C/T 2 output pin.  Must be supported on PCB and wired properly at serial adapter.
2021-02-21 13:18:57 -08:00
Wayne Warthen
a1a25465da Bug Fixes 2021-02-20 16:49:36 -08:00
Wayne Warthen
c9a62b6b08 Fix Unix Build 2021-02-19 18:56:13 -08:00
Wayne Warthen
9da58082a7 Z280 Cleanup 2021-02-19 15:47:33 -08:00
Wayne Warthen
f20addf39d Support ZZ80MB 2021-02-18 17:29:08 -08:00
Wayne Warthen
0d6c792282 Z280 Tweaks
- Interrupt routines that change the Z280 I/O page register now save and restore the original value.
2021-02-13 17:14:59 -08:00
Wayne Warthen
8e7e9039f9 Additional SK Z80-512K Support
- Added support for UART clock divider (CLK2).
2021-02-11 14:28:26 -08:00
Wayne Warthen
4791d5f040 Perliminary support for Sergey's Z80-512K
- Watchdog functionality will be enabled if a system timer is operational.
- LED indicates boot progress and thereafter disk I/O.
2021-02-10 15:47:23 -08:00
Wayne Warthen
d21318b753 Bump Version Number 2021-02-09 16:44:01 -08:00
Wayne Warthen
2ac9f33be7 Mo' Faster
- Some minor Z280 speed optimizations.
2021-02-05 18:20:03 -08:00
Wayne Warthen
7956074746 Miscellaneous
- Fix minor ACIA bug that only occurs if setting a non-standard baud rate.
- Enhance Z280 UART driver to use C/T for more baud rates and to use Z280 opcodes to speed up interrupt handler a bit.
2021-02-04 13:35:21 -08:00
Wayne Warthen
4cc21948bc Z280 Optimizations
- New Z280 bank selection routine that does not require gigantic table and is about as fast.
- Bump Z280 UART driver to 128 byte buffer.
- Truncate unused portion of Z280 IVT at end.
2021-02-02 16:52:25 -08:00
Wayne Warthen
c43283b3ec Enable ACIA on Interrupt Modes 2 & 3
ACIA driver will now allow use of the driver in interrupt modes 2 & 3, but will operate in polling mode.
2021-02-01 09:48:46 -08:00
Wayne Warthen
b91ad2aba0 Fix Typo 2021-01-31 15:38:20 -08:00
Wayne Warthen
6e6e3d2059 Cleanup 2021-01-31 15:12:55 -08:00
Wayne Warthen
8945580ff5 Z280 Cleanup
- Z280 UART MODE command support
- BNKCALL handles calls into HBIOS using system mode
2021-01-30 16:17:34 -08:00
Wayne Warthen
8fa14863f8 Add System Timer to Z280 IM3
- Z280 counter/timer is now used to implement 50Hz system timer based on CPU oscillator.
- Bug fix in EI <mask> opcodes.
2021-01-28 16:41:33 -08:00
Wayne Warthen
fe14a4b2a8 Z280 UART in all interrupt modes
By using polling mode, the Z280 UART can be utilized in interrupts modes 0/1/2.
2021-01-28 10:39:57 -08:00
Wayne Warthen
2d12da4903 Z280 Internal UART Support
Z280 UART can only be used w/ native memory & interrupt mode 3.
2021-01-27 19:33:37 -08:00
Wayne Warthen
75c468d897 Z280 Native Mode Completion
Z280 Native Mode using Interrupt Mode 3 is now stable.  The built-in UART is not yet supported.  Also, RomWBW application style boot is not yet supported.
2021-01-24 15:54:31 -08:00
Wayne Warthen
3f8cc830f7 Bump Version 2021-01-22 20:43:47 -08:00
Wayne Warthen
6a0837e908 Z280 Work in Progress
- API callls now run in system mode
- Expansion of proxy size has been reverted
2021-01-22 16:45:43 -08:00
Wayne Warthen
10d875ffbb Z280 Work in Progress, SC140 Config
- Early support for native mode memory for Z280.
- Added support for SC140 as new standard build.
2021-01-20 11:21:24 -08:00