Version 2.5.3

Apps/Source/applvers.h

@@ -1,16 +1,16 @@
 /************************************/
-/* applvers.h dwg - 2.5.2.18        */
+/* applvers.h dwg - 2.5.3.19        */
 /************************************/
 
 #define A_RMJ	2
 #define A_RMN	5
-#define A_RUP	2
-#define A_RTP	18
+#define A_RUP	3
+#define A_RTP	19
 
-#define A_MONTH	9
-#define A_DAY	29
-#define A_YEAR	2013
-#define A_YR	13
+#define A_MONTH	1
+#define A_DAY	20
+#define A_YEAR	2014
+#define A_YR	14
 
 /********************/
 /* eof - applvers.h */

Apps/Source/applvers.lib

@@ -2,15 +2,15 @@
 
 A$RMJ	equ	2
 A$RMN	equ	5
-A$RUP	equ	2
-A$RTP	equ	18
+A$RUP	equ	3
+A$RTP	equ	19
 
-A$MONTH	equ	9
-A$DAY	equ	29
-A$YEAR	equ	2013
+A$MONTH	equ	1
+A$DAY	equ	20
+A$YEAR	equ	2014
 
 date	macro
-dat	db	'  9/29/2013$'
+dat	db	'  1/20/2014$'
 	endm
 
 serial	macro

Doc/ChangeLog.txt

@@ -1,3 +1,10 @@
+Version 2.5.3
+-------------
+- WBW: Fixed EXM in DPB for 360K floppy definition (credit to Martin for finding this error)
+- WBW: Improved /WAIT trigger performance in PropIO (credit to Marko)
+       PropIO now seems to be compatible with CPU clock speeds up to 16MHz
+- WBW: Corrected the IO base address for PPIDE driver on N8 variants (credit to Arlen Michaels)
+
 Version 2.5.2
 -------------
 - WBW: Added initial support for RAM Floppy

ReadMe.txt

@@ -8,8 +8,8 @@ Builders: Wayne Warthen (wwarthen@gmail.com)
           Douglas Goodall (douglas_goodall@mac.com)
           David Giles (vk5dg@internode.on.net)
 
-Updated: 2013-09-28
-Version: 2.5.2
+Updated: 2014-01-20
+Version: 2.5.3
 
 This is an adaptation of CP/M-80 2.2 and ZSDOS/ZCPR
 targeting ROMs for all N8VEM Z80 hardware variations

Source/cbios.asm

@@ -1461,7 +1461,7 @@ DPB_ROM:
 	.DW  	256		; SPT: SECTORS PER TRACK
 	.DB  	4		; BSH: BLOCK SHIFT FACTOR
 	.DB  	15		; BLM: BLOCK MASK
-#IF (ROMBLKS < 256)
+#IF ((ROMBLKS - 1) < 256)
 	.DB  	1		; EXM: EXTENT MASK
 #ELSE
 	.DB  	0		; EXM: EXTENT MASK
@@ -1483,7 +1483,7 @@ DPB_RAM:
 	.DW  	256		; SPT: SECTORS PER TRACK
 	.DB  	4		; BSH: BLOCK SHIFT FACTOR
 	.DB  	15		; BLM: BLOCK MASK
-#IF (RAMBLKS < 256)
+#IF ((RAMBLKS - 1) < 256)
 	.DB  	1		; EXM: EXTENT MASK
 #ELSE
 	.DB  	0		; EXM: EXTENT MASK
@@ -1574,7 +1574,7 @@ DPB_FD360:
 	.DW  	36		; SPT: SECTORS PER TRACK
 	.DB  	4		; BSH: BLOCK SHIFT FACTOR
 	.DB  	15		; BLM: BLOCK MASK
-	.DB  	0		; EXM: EXTENT MASK
+	.DB  	1		; EXM: EXTENT MASK
 	.DW  	170		; DSM: TOTAL STORAGE IN BLOCKS - 1 BLK = ((360K - 18K OFF) / 2K BLS) - 1 = 170
 	.DW  	127		; DRM: DIR ENTRIES - 1 = 128 - 1 = 127
 	.DB  	11110000B	; AL0: DIR BLK BIT MAP, FIRST BYTE
@@ -1792,24 +1792,18 @@ DSK_CNT	.EQU	DPH_CNT
 ;
 ;	MAP LOGICAL TO PHYSICAL DEVICES
 ;
-#IF (PLATFORM == PLT_N8)
-TTYDEV	.EQU	CIODEV_ASCI
-#ELSE
-TTYDEV	.EQU	CIODEV_UART
-#ENDIF
-;
-LD_TTY	.EQU	TTYDEV
+LD_TTY	.EQU	DEFCON
 LD_CRT	.EQU	CIODEV_CRT
 LD_BAT	.EQU	CIODEV_BAT
-LD_UC1	.EQU	TTYDEV
-LD_PTR	.EQU	TTYDEV
-LD_UR1	.EQU	TTYDEV
-LD_UR2	.EQU	TTYDEV
-LD_PTP	.EQU	TTYDEV
-LD_UP1	.EQU	TTYDEV
-LD_UP2	.EQU	TTYDEV
-LD_LPT	.EQU	TTYDEV
-LD_UL1	.EQU	TTYDEV
+LD_UC1	.EQU	DEFCON
+LD_PTR	.EQU	DEFCON
+LD_UR1	.EQU	DEFCON
+LD_UR2	.EQU	DEFCON
+LD_PTP	.EQU	DEFCON
+LD_UP1	.EQU	DEFCON
+LD_UP2	.EQU	DEFCON
+LD_LPT	.EQU	DEFCON
+LD_UL1	.EQU	DEFCON
 ;
 #IF (PLATFORM == PLT_N8)
 LD_UC1	.SET	CIODEV_ASCI + 1

Source/config_n8_2312.asm

@@ -55,7 +55,7 @@ IDE8BIT		.EQU	FALSE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!
 IDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
 PPIDEENABLE	.EQU	FALSE		; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
-PPIDEIOB	.EQU	$60		; PPIDE IOBASE
+PPIDEIOB	.EQU	$80		; PPIDE IOBASE
 PPIDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
 PPIDE8BIT	.EQU	FALSE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
 PPIDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)

Source/config_n8_2511.asm

@@ -55,7 +55,7 @@ IDE8BIT		.EQU	FALSE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!
 IDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)
 ;
 PPIDEENABLE	.EQU	FALSE		; TRUE FOR PPIDE SUPPORT (DO NOT COMBINE WITH DSKYENABLE)
-PPIDEIOB	.EQU	$60		; PPIDE IOBASE
+PPIDEIOB	.EQU	$80		; PPIDE IOBASE
 PPIDETRACE	.EQU	1		; 0=SILENT, 1=ERRORS, 2=EVERYTHING (ONLY RELEVANT IF PPIDEENABLE = TRUE)
 PPIDE8BIT	.EQU	FALSE		; USE IDE 8BIT TRANSFERS (PROBABLY ONLY WORKS FOR CF CARDS!)
 PPIDECAPACITY	.EQU	64		; CAPACITY OF DEVICE (IN MB)

Source/ver.inc

@@ -1,7 +1,7 @@
 #DEFINE	RMJ	2
 #DEFINE	RMN	5
-#DEFINE	RUP	2
-#DEFINE	RTP	18
-#DEFINE BIOSVER	"2.5.2"
-#DEFINE BIOSBLD "Build 18"
+#DEFINE	RUP	3
+#DEFINE	RTP	19
+#DEFINE BIOSVER	"2.5.3"
+#DEFINE BIOSBLD "Build 19"
 #DEFINE REVISION 500

Support/PropIO/Spin/VGA_1024.spin

@@ -131,7 +131,7 @@ PUB cls1(c,screencolor,pcport,ascii,CR) | i,x,y
   
   inverse := 1
 
-  statprint(36,0, string("                         N8VEM ParPortProp | RomWBW                        v0.92"))
+  statprint(36,0, string("                         N8VEM ParPortProp | RomWBW                        v0.93"))
   inverse := 0
   statprint(37,0, string("                                                                                "))
   statprint(38,0, string("                                                                                "))