Audio Driver Cleanup

Resolved some consistency issues between the AY-3-8910 and SN76489 audio drivers.

.github/workflows/commit.yml

@@ -14,9 +14,9 @@ jobs:
     runs-on: ubuntu-latest
 
     steps:
-      - uses: rlespinasse/github-slug-action@v3.x
+      - uses: rlespinasse/github-slug-action@v4.4.0
         
-      - uses: actions/checkout@v2
+      - uses: actions/checkout@v3.1.0
 
       - name: Build
         run: |
@@ -33,7 +33,7 @@ jobs:
           find -type f -exec md5sum '{}' \;
 
       - name: Upload Artifact
-        uses: actions/upload-artifact@v2
+        uses: actions/upload-artifact@v3.1.1
         with:
           name: RomWBW_Linux-${{env.GITHUB_REF_SLUG}}-${{env.GITHUB_SHA_SHORT}}
           path: .
@@ -43,7 +43,7 @@ jobs:
             zip -r RomWBW-SnapShot-Package.zip .
  
       - name: Post SnapShot
-        uses: "marvinpinto/action-automatic-releases@latest"
+        uses: wwarthen/actions/packages/automatic-releases@built-packages
         with:
           repo_token: "${{ secrets.GITHUB_TOKEN }}"
           automatic_release_tag: "SnapShot"
@@ -53,10 +53,10 @@ jobs:
             RomWBW-SnapShot-Package.zip
 
   buildMacOS:
-    runs-on: macos-latest
+    runs-on: macOS-12
 
     steps:
-      - uses: actions/checkout@v2
+      - uses: actions/checkout@v3.1.0
 
       - name: Build
         run: |
@@ -72,7 +72,7 @@ jobs:
           find . -type f -exec md5 -r -- '{}' +;
 
       - name: Upload Artifact
-        uses: actions/upload-artifact@v2
+        uses: actions/upload-artifact@v3.1.1
         with:
           name: RomWBW_MacOS
           path: .

Binary/Apps/Tunes/ReadMe.txt

@@ -7,4 +7,4 @@
 ***********************************************************************
 
 This directory contains some sample ProTracker and MYM sound
-files that can be played by the TUNE application.
+files that can be played by the TUNE or VGMPLAY application.

Doc/ChangeLog.txt

@@ -63,6 +63,10 @@ Version 3.1.1
 - DDW: Add support for MBC sound card
 - WBW: Add support for "romless" booting
 - L?N: Fixes for ZCPR-D&J (buffer overflow, default drive/user)
+- J?P: Add support for DS1501 RTC
+- LLS: Added a user defined mode for SD Card interfaces (not complete)
+- L?N: Updated ZDE to v1.8 including time stamp preservation fixes
+- D?M: Minor update to CP/NET client files, fix to CPNBOOT
 
 Version 3.1
 -----------

ReadMe.md

@@ -3,23 +3,23 @@
 ## Z80/Z180 System Software
 
 Version 3.1 Pre-release  
-09 Jul 2022
+01 Jan 2023
 
 Wayne Warthen <wwarthen@gmail.com>
 
 ### Download
 
--   [RomWBW Distribution
-    Package](https://github.com/wwarthen/RomWBW/releases)
+- [RomWBW Distribution
+  Package](https://github.com/wwarthen/RomWBW/releases)
 
 ### Related Pages
 
--   [RomWBW Architecture
-    Document](https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=software:firmwareos:romwbw:romwbw_architecture.pdf)
--   [RomWBW
-    Applications](https://www.retrobrewcomputers.org/doku.php?id=software:firmwareos:romwbw:apps)
--   [RomWBW
-    Errata](https://www.retrobrewcomputers.org/doku.php?id=software:firmwareos:romwbw:errata)
+- [RomWBW Architecture
+  Document](https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=software:firmwareos:romwbw:romwbw_architecture.pdf)
+- [RomWBW
+  Applications](https://www.retrobrewcomputers.org/doku.php?id=software:firmwareos:romwbw:apps)
+- [RomWBW
+  Errata](https://www.retrobrewcomputers.org/doku.php?id=software:firmwareos:romwbw:errata)
 
 # Overview
 
@@ -27,28 +27,28 @@ RomWBW provides a complete software system for a wide variety of
 hobbyist Z80/Z180 CPU-based systems produced by these developer
 communities:
 
--   [RetroBrew Computers](https://www.retrobrewcomputers.org)
--   [RC2014](https://rc2014.co.uk)
--   [retro-comp](https://groups.google.com/forum/#!forum/retro-comp)
+- [RetroBrew Computers](https://www.retrobrewcomputers.org)
+- [RC2014](https://rc2014.co.uk)
+- [retro-comp](https://groups.google.com/forum/#!forum/retro-comp)
 
 General features include:
 
--   Banked memory services for several banking designs
--   Disk drivers for RAM, ROM, Floppy, IDE, CF, and SD
--   Serial drivers including UART (16550-like), ASCI, ACIA, SIO
--   Video drivers including TMS9918, SY6545, MOS8563, HD6445
--   Real time clock drivers including DS1302, BQ4845
--   Multiple OS support including CP/M 2.2, ZSDOS, CP/M 3, ZPM3
--   Built-in VT-100 terminal emulation support
+- Banked memory services for several banking designs
+- Disk drivers for RAM, ROM, Floppy, IDE, CF, and SD
+- Serial drivers including UART (16550-like), ASCI, ACIA, SIO
+- Video drivers including TMS9918, SY6545, MOS8563, HD6445
+- Real time clock drivers including DS1302, BQ4845
+- Multiple OS support including CP/M 2.2, ZSDOS, CP/M 3, ZPM3
+- Built-in VT-100 terminal emulation support
 
 RomWBW is distributed as both source code and pre-built ROM and disk
 images. Some of the provided software can be launched directly from the
 ROM firmware itself:
 
--   System Monitor
--   Operating Systems (CP/M 2.2, ZSDOS)
--   ROM BASIC (Nascom BASIC and Tasty BASIC)
--   ROM Forth
+- System Monitor
+- Operating Systems (CP/M 2.2, ZSDOS)
+- ROM BASIC (Nascom BASIC and Tasty BASIC)
+- ROM Forth
 
 A dynamic disk drive letter assignment mechanism allows mapping
 operating system drive letters to any available disk media.
@@ -209,10 +209,10 @@ modular approach to implementing device drivers and presenting devices
 to the operating system. In general, all devices are classified as one
 of the following:
 
--   Disk (Hard Disk, CF Card, SD Card, RAM/ROM Disk, etc.)
--   Character (Serial Ports, Parallel Ports, etc.)
--   Video (Video Display/Keyboard Interfaces)
--   RTC/NVRAM (Real Time Clock, Non-volatile RAM)
+- Disk (Hard Disk, CF Card, SD Card, RAM/ROM Disk, etc.)
+- Character (Serial Ports, Parallel Ports, etc.)
+- Video (Video Display/Keyboard Interfaces)
+- RTC/NVRAM (Real Time Clock, Non-volatile RAM)
 
 HBIOS uses the concept of unit numbers to present a complex set of
 hardware devices to the operating system. As an example, a typical
@@ -270,26 +270,20 @@ VDU type devices or serial devices. If you want to change which device
 is the console, the ***I*** menu option can be used to choose the unit
 and it’s speed.
 
-The command format is `I <u> [<c>]`
+The command format is `I <u> [<b>]`
 
-where ***u*** is unit to select and ***c*** is the optional baud rate
-code as listed below.
+where ***u*** is unit to select and ***b*** is the optional baud rate.
 
-     Code |   Rate   | Code |   Rate   | Code |   Rate   | Code |   Rate   |
-    ------|----------|------|----------|------|----------|------|----------|
-       0  |      75  |   8  |    1800  |  16  |   28880  |  24  |  460800  |
-       1  |     150  |   9  |    2400  |  17  |   38400  |  25  |  614400  |
-       2  |     225  |  10  |    3600  |  18  |   57600  |  26  |  921600  |
-       3  |     300  |  11  |    4800  |  19  |   76800  |  27  | 1228822  |
-       4  |     450  |  12  |    7200  |  20  |  115200  |  28  | 1843200  |
-       5  |     600  |  13  |    9600  |  21  |  153600  |  29  | 2457600  |
-       6  |     900  |  14  |   14400  |  22  |  230400  |  30  | 3686400  |
-       7  |    1200  |  15  |   19200  |  23  |  307200  |  31  | 7372800  |
-    ------------------------------------------------------------------------
+Supported baud rates are:
+
+     75   450  1800   7200  38400  115200   460800  1843200
+    150   600  2400   9600  28800  153600   614400  2457600
+    225   900  3600  14400  57600  230400   921600  3686400
+    300  1200  4800  19200  76800  307200  1228800  7372800
 
 Example: To change current console to 9600 baud
 
-    I 0 13
+    I 0 9600
 
 ## Drive Letter Assignment
 
@@ -452,6 +446,15 @@ well. However, you will find some files on the ROM disk that will work
 with ZSDOS, but will not work on CP/M 2.2. For example, `LDDS`, which
 loads the ZSDOS date/time stamper will only run on ZSDOS.
 
+## Flash ROM Disks
+
+The limitation of ROM disks being read only can be overcome on some
+platforms with the appropriate selection of Flash ROM chip and system
+configuration. In this case the flash-file system can be enabled which
+will allow the ROM disk to be read and written to. Flash devices have a
+limited write lifespan and continual usage will eventually wear out the
+device. It is not suited for high usage applications.
+
 ## Disk Devices
 
 While the RAM/ROM disks provide a functional system, they are not useful
@@ -738,17 +741,17 @@ most stable and you are less likely to encounter problems.
 
 ### Notes
 
--   You can change media, but it must be done while at the OS command
-    prompt and you **must** warm start CP/M by pressing ctrl-c. This is
-    a CP/M 2.2 constraint and is well documented in the DRI manuals.
+- You can change media, but it must be done while at the OS command
+  prompt and you **must** warm start CP/M by pressing ctrl-c. This is a
+  CP/M 2.2 constraint and is well documented in the DRI manuals.
 
--   The original versions of DDT, DDTZ, and ZSID used the RST 38 vector
-    which conflicts with interrupt mode 1 use of this vector. The DDT,
-    DDTZ, and ZSID applications in RomWBW have been modified to use RST
-    30 to avoid this issue.
+- The original versions of DDT, DDTZ, and ZSID used the RST 38 vector
+  which conflicts with interrupt mode 1 use of this vector. The DDT,
+  DDTZ, and ZSID applications in RomWBW have been modified to use RST 30
+  to avoid this issue.
 
--   Z-System applications will not run under CP/M 2.2. For example, the
-    `LDDS` date stamper will not run.
+- Z-System applications will not run under CP/M 2.2. For example, the
+  `LDDS` date stamper will not run.
 
 ## ZSDOS 1.1
 
@@ -766,14 +769,13 @@ Manual.pdf”).
 
 ### Notes
 
--   Although most CP/M 2.2 applications will run under Z-System, some
-    may not work as expected. The best example is PIP which is not aware
-    of the ZSDOS paths and will fail in some scenarios (use `COPY`
-    instead).
+- Although most CP/M 2.2 applications will run under Z-System, some may
+  not work as expected. The best example is PIP which is not aware of
+  the ZSDOS paths and will fail in some scenarios (use `COPY` instead).
 
--   Although ZSDOS can recognize a media change in some cases, it will
-    not always work. You should only change media at a command prompt
-    and be sure to warm start the OS with a ctrl-c.
+- Although ZSDOS can recognize a media change in some cases, it will not
+  always work. You should only change media at a command prompt and be
+  sure to warm start the OS with a ctrl-c.
 
 ## NZCOM Automatic Z-System
 
@@ -794,8 +796,8 @@ RomWBW Doc directory.
 
 ### Notes
 
--   There is no `DIR` command, you must use `SDZ` instead. If you don’t
-    like this, look into the ALIAS facility.
+- There is no `DIR` command, you must use `SDZ` instead. If you don’t
+  like this, look into the ALIAS facility.
 
 ## Digital Research CP/M 3
 
@@ -811,19 +813,18 @@ tracks. `CPMLDR.SYS` chain loads `CPM3.SYS`.
 
 ### Notes
 
--   The `DATE` command cannot yet be used to **set** the RTC. The RTC is
-    used to read the current date/time for file stamping, etc. You can
-    use the `RTC` app to set the RTC clock.
+- The `DATE` command cannot yet be used to **set** the RTC. The RTC is
+  used to read the current date/time for file stamping, etc. You can use
+  the `RTC` app to set the RTC clock.
 
--   The `COPYSYS` command described in the DRI CP/M 3 documentation is
-    not provided with RomWBW. The RomWBW `SYSCOPY` command is used
-    instead.
+- The `COPYSYS` command described in the DRI CP/M 3 documentation is not
+  provided with RomWBW. The RomWBW `SYSCOPY` command is used instead.
 
--   Although CP/M 3 is generally able to run CP/M 2.2 programs, this is
-    not universally true. This is especially true of the utility
-    programs included with the operating system. For example, the
-    `SUBMIT` program of CP/M 3 is completely different from the `SUBMIT`
-    program of CP/M 2.2.
+- Although CP/M 3 is generally able to run CP/M 2.2 programs, this is
+  not universally true. This is especially true of the utility programs
+  included with the operating system. For example, the `SUBMIT` program
+  of CP/M 3 is completely different from the `SUBMIT` program of CP/M
+  2.2.
 
 ## Simeon Cran’s ZPM3
 
@@ -835,14 +836,14 @@ tracks of the disk.
 
 ### Notes
 
--   `ZPMLDR` is equivalent to CPMLDR. Both are included. Previously,
-    ZPMLDR had issues that prevented it from properly booting RomWBW
-    ZPM3. However, those issues have been resolved.
+- `ZPMLDR` is equivalent to CPMLDR. Both are included. Previously,
+  ZPMLDR had issues that prevented it from properly booting RomWBW ZPM3.
+  However, those issues have been resolved.
 
--   The ZPM operating system is contained in the file called CPM3.SYS
-    which is confusing, but this is as intended by the ZPM3
-    distribution. I believe it was done this way to make it easier for
-    users to transition from CP/M 3 to ZPM3.
+- The ZPM operating system is contained in the file called CPM3.SYS
+  which is confusing, but this is as intended by the ZPM3 distribution.
+  I believe it was done this way to make it easier for users to
+  transition from CP/M 3 to ZPM3.
 
 ## FreeRTOS
 
@@ -1027,10 +1028,10 @@ images.
 While John is likely to enhance UNA over time, there are currently a few
 things that UNA does not support:
 
--   Floppy Drives
--   Terminal Emulation
--   Zeta 1, N8, RC2014, Easy Z80, and Dyno Systems
--   Some older support boards
+- Floppy Drives
+- Terminal Emulation
+- Zeta 1, N8, RC2014, Easy Z80, and Dyno Systems
+- Some older support boards
 
 The UNA version embedded in RomWBW is the latest production release of
 UNA. RomWBW will be updated with John’s upcoming UNA release with
@@ -1136,89 +1137,86 @@ If the disk is bootable, you need to update the system image on the disk
 using the procedure described below corresponsing to the operating
 system on your disk.
 
--   **CP/M 2.2**
+- **CP/M 2.2**
 
-    Boot to CP/M 2.2 from ROM, then use `SYSCOPY` to update the system
-    image on **all** CP/M 2.2 boot disks/slices. The CP/M 2.2 system
-    image is called CPM.SYS and is found on the ROM disk. For example:
+  Boot to CP/M 2.2 from ROM, then use `SYSCOPY` to update the system
+  image on **all** CP/M 2.2 boot disks/slices. The CP/M 2.2 system image
+  is called CPM.SYS and is found on the ROM disk. For example:
 
-    `B>SYSCOPY C:=CPM.SYS`
+  `B>SYSCOPY C:=CPM.SYS`
 
--   **ZSDOS**
+- **ZSDOS**
 
-    Boot to Z-System from ROM, then use `SYSCOPY` to update the system
-    image on **all** ZSDOS boot disks/slices. The ZSDOS system image is
-    called ZSYS.SYS and is found on the ROM disk. For example:
+  Boot to Z-System from ROM, then use `SYSCOPY` to update the system
+  image on **all** ZSDOS boot disks/slices. The ZSDOS system image is
+  called ZSYS.SYS and is found on the ROM disk. For example:
 
-    `B>SYSCOPY C:=ZSYS.SYS`
+  `B>SYSCOPY C:=ZSYS.SYS`
 
--   **NZCOM**
+- **NZCOM**
 
-    NZCOM runs on top of either CP/M 2.2 or ZSDOS. By default, the
-    RomWBW disk image for NZCOM uses ZSDOS. Follow the corresponding
-    procedure above to update the system image on the NZCOM boot
-    disks/slices.
+  NZCOM runs on top of either CP/M 2.2 or ZSDOS. By default, the RomWBW
+  disk image for NZCOM uses ZSDOS. Follow the corresponding procedure
+  above to update the system image on the NZCOM boot disks/slices.
 
--   **CP/M 3**
+- **CP/M 3**
 
-    CP/M 3 uses a multi-step boot process involving multiple files. The
-    CP/M 3 boot files are not included on the ROM disk due to space
-    constraints. You will need to transfer the files to your system from
-    the RomWBW distribution directory Binary\CPM3.
+  CP/M 3 uses a multi-step boot process involving multiple files. The
+  CP/M 3 boot files are not included on the ROM disk due to space
+  constraints. You will need to transfer the files to your system from
+  the RomWBW distribution directory Binary\CPM3.
 
-    After this is done, you will need to use `SYSCOPY` to place the CP/M
-    3 loader image on the boot tracks of all CP/M 3 boot disks/slices.
-    The loader image is called `CPMLDR.SYS`. You must then copy (at a
-    minimum) `CPM3.SYS` and `CCP.COM` onto the disk/slice. Assuming you
-    copied the CP/M 3 boot files onto your RAM disk at A:, you would
-    use:
+  After this is done, you will need to use `SYSCOPY` to place the CP/M 3
+  loader image on the boot tracks of all CP/M 3 boot disks/slices. The
+  loader image is called `CPMLDR.SYS`. You must then copy (at a minimum)
+  `CPM3.SYS` and `CCP.COM` onto the disk/slice. Assuming you copied the
+  CP/M 3 boot files onto your RAM disk at A:, you would use:
 
-        A>B:SYSCOPY C:=CPMLDR.SYS
-        A>B:COPY CPM3.SYS C:
-        A>B:COPY CCP.COM C:
+      A>B:SYSCOPY C:=CPMLDR.SYS
+      A>B:COPY CPM3.SYS C:
+      A>B:COPY CCP.COM C:
 
--   **ZPM3**
+- **ZPM3**
 
-    ZPM3 uses a multi-step boot process involving multiple files. The
-    ZPM3 boot files are not included on the ROM disk due to space
-    constraints. You will need to transfer the files to your system from
-    the RomWBW distribution directory Binary\ZPM3.
+  ZPM3 uses a multi-step boot process involving multiple files. The ZPM3
+  boot files are not included on the ROM disk due to space constraints.
+  You will need to transfer the files to your system from the RomWBW
+  distribution directory Binary\ZPM3.
 
-    After this is done, you will need to use `SYSCOPY` to place the ZPM3
-    loader image on the boot tracks of all ZPM3 boot disks/slices. The
-    loader image is called `ZPMLDR.SYS`. You must then copy (at a
-    minimum) `CPM3.SYS`, `ZCCP.COM`, `ZINSTAL.ZPM`, and `STARTZPM.COM`
-    onto the disk/slice. Assuming you copied the ZPM3 boot files onto
-    your RAM disk at A:, you would use:
+  After this is done, you will need to use `SYSCOPY` to place the ZPM3
+  loader image on the boot tracks of all ZPM3 boot disks/slices. The
+  loader image is called `ZPMLDR.SYS`. You must then copy (at a minimum)
+  `CPM3.SYS`, `ZCCP.COM`, `ZINSTAL.ZPM`, and `STARTZPM.COM` onto the
+  disk/slice. Assuming you copied the ZPM3 boot files onto your RAM disk
+  at A:, you would use:
 
-        A>B:SYSCOPY C:=ZPMLDR.SYS
-        A>B:COPY CPM3.SYS C:
-        A>B:COPY ZCCP.COM C:
-        A>B:COPY ZINSTAL.ZPM C:
-        A>B:COPY STARTZPM.COM C:
+      A>B:SYSCOPY C:=ZPMLDR.SYS
+      A>B:COPY CPM3.SYS C:
+      A>B:COPY ZCCP.COM C:
+      A>B:COPY ZINSTAL.ZPM C:
+      A>B:COPY STARTZPM.COM C:
 
-    You may be wondering if the reference to `CPM3.SYS` is a typo. It is
-    not. The ZPM3 main system code file is called `CPM3.SYS` which is
-    the same name as CP/M 3 uses, but the file contents are not the
-    same.
+  You may be wondering if the reference to `CPM3.SYS` is a typo. It is
+  not. The ZPM3 main system code file is called `CPM3.SYS` which is the
+  same name as CP/M 3 uses, but the file contents are not the same.
 
 Finally, if you have copies of any of the RomWBW custom applications on
 your hard disk, you need to update them with the latest copies. The
 following applications are found on your ROM disk. Use COPY to copy them
 over any older versions of the app on your disk:
 
--   ASSIGN.COM
--   SYSCOPY.COM
--   MODE.COM
--   FDU.COM (was FDTST.COM)
--   FORMAT.COM
--   XM.COM
--   FLASH.COM
--   FDISK80.COM
--   TALK.COM
--   RTC.COM
--   TIMER.COM
--   INTTEST.COM
+- ASSIGN.COM
+- SYSCOPY.COM
+- MODE.COM
+- FDU.COM (was FDTST.COM)
+- FORMAT.COM
+- XM.COM
+- FLASH.COM
+- FDISK80.COM
+- TALK.COM
+- RTC.COM
+- TIMER.COM
+- INTTEST.COM
 
 For example: `B>COPY ASSIGN.COM C:`
 
@@ -1227,8 +1225,8 @@ you are using any of these you will need to transfer them to your system
 and then update all copies. These applications are found in the
 Binary\Apps directory of the distribution and in all of the disk images.
 
--   FAT.COM
--   TUNE.COM
+- FAT.COM
+- TUNE.COM
 
 ## System Update
 
@@ -1242,11 +1240,11 @@ and CP/M system.
 A System Update may be more favorable than a System Upgrade in cases
 such as:
 
--   Overwriting of the ROM drive is not desired.
--   Space is unavailable to hold a full ROMWBW ROM.
--   To mimimize time taken to transfer and flash a full ROM.
--   Configuration changes are only minor and do not impact disk
-    applications.
+- Overwriting of the ROM drive is not desired.
+- Space is unavailable to hold a full ROMWBW ROM.
+- To mimimize time taken to transfer and flash a full ROM.
+- Configuration changes are only minor and do not impact disk
+  applications.
 
 The ROMWBW build process generates a system upgrade file along with the
 normal ROM image and can be identified by the extension “.upd”. It will
@@ -1297,22 +1295,22 @@ continue the maintenance of these applications and they have become
 unusable due to changes within RomWBW. As of RomWBW 2.6, these
 applications are no longer provided.
 
--   David Giles contributed support for the CSIO support in the SD Card
-    driver.
--   Ed Brindley contributed some of the code that supports the RC2014
-    platform.
--   Phil Summers contributed the Forth and BASIC adaptations in ROM, the
-    AY-3-8910 sound driver as well as a long list of general code
-    enhancements.
--   Phillip Stevens contributed support for FreeRTOS.
--   Curt Mayer contributed the original Linux / MacOS build process.
--   UNA BIOS and FDISK80 are the products of John Coffman.
--   FLASH4 is a product of Will Sowerbutts.
--   CLRDIR is a product of Max Scane.
--   Tasty Basic is a product of Dimitri Theulings.
--   Dean Netherton contributed the sound driver interface and the
-    SN76489 sound driver.
--   The RomWBW Disk Catalog document was produced by Mykl Orders.
+- David Giles contributed support for the CSIO support in the SD Card
+  driver.
+- Ed Brindley contributed some of the code that supports the RC2014
+  platform.
+- Phil Summers contributed the Forth and BASIC adaptations in ROM, the
+  AY-3-8910 sound driver as well as a long list of general code
+  enhancements.
+- Phillip Stevens contributed support for FreeRTOS.
+- Curt Mayer contributed the original Linux / MacOS build process.
+- UNA BIOS and FDISK80 are the products of John Coffman.
+- FLASH4 is a product of Will Sowerbutts.
+- CLRDIR is a product of Max Scane.
+- Tasty Basic is a product of Dimitri Theulings.
+- Dean Netherton contributed the sound driver interface and the SN76489
+  sound driver.
+- The RomWBW Disk Catalog document was produced by Mykl Orders.
 
 Contributions of all kinds to RomWBW are very welcome.
 
@@ -1363,12 +1361,11 @@ All contributions to RomWBW are subject to this license.
 The best way to get assistance with RomWBW or any aspect of the
 RetroBrew Computers projects is via the community forums:
 
--   [RetroBrew Computers
-    Forum](https://www.retrobrewcomputers.org/forum/)
--   [RC2014 Google
-    Group](https://groups.google.com/forum/#!forum/rc2014-z80)
--   [retro-comp Google
-    Group](https://groups.google.com/forum/#!forum/retro-comp)
+- [RetroBrew Computers Forum](https://www.retrobrewcomputers.org/forum/)
+- [RC2014 Google
+  Group](https://groups.google.com/forum/#!forum/rc2014-z80)
+- [retro-comp Google
+  Group](https://groups.google.com/forum/#!forum/retro-comp)
 
 Submission of issues and bugs are welcome at the [RomWBW GitHub
 Repository](https://github.com/wwarthen/RomWBW).

ReadMe.txt

@@ -1,6 +1,6 @@
 RomWBW Getting Started
 Wayne Warthen (mailto:wwarthen@gmail.com)
-09 Jul 2022
+01 Jan 2023
 
 
 
@@ -17,7 +17,7 @@ RomWBW
 Z80/Z180 System Software
 
 Version 3.1 Pre-release
-09 Jul 2022
+01 Jan 2023
 
 Wayne Warthen wwarthen@gmail.com
 
@@ -307,26 +307,20 @@ VDU type devices or serial devices. If you want to change which device
 is the console, the I menu option can be used to choose the unit and
 it’s speed.
 
-The command format is I <u> [<c>]
+The command format is I <u> [<b>]
 
-where u is unit to select and c is the optional baud rate code as listed
-below.
+where u is unit to select and b is the optional baud rate.
 
-     Code |   Rate   | Code |   Rate   | Code |   Rate   | Code |   Rate   |
-    ------|----------|------|----------|------|----------|------|----------|
-       0  |      75  |   8  |    1800  |  16  |   28880  |  24  |  460800  |
-       1  |     150  |   9  |    2400  |  17  |   38400  |  25  |  614400  |
-       2  |     225  |  10  |    3600  |  18  |   57600  |  26  |  921600  |
-       3  |     300  |  11  |    4800  |  19  |   76800  |  27  | 1228822  |
-       4  |     450  |  12  |    7200  |  20  |  115200  |  28  | 1843200  |
-       5  |     600  |  13  |    9600  |  21  |  153600  |  29  | 2457600  |
-       6  |     900  |  14  |   14400  |  22  |  230400  |  30  | 3686400  |
-       7  |    1200  |  15  |   19200  |  23  |  307200  |  31  | 7372800  |
-    ------------------------------------------------------------------------
+Supported baud rates are:
+
+     75   450  1800   7200  38400  115200   460800  1843200
+    150   600  2400   9600  28800  153600   614400  2457600
+    225   900  3600  14400  57600  230400   921600  3686400
+    300  1200  4800  19200  76800  307200  1228800  7372800
 
 Example: To change current console to 9600 baud
 
-    I 0 13
+    I 0 9600
 
 Drive Letter Assignment
 
@@ -438,11 +432,11 @@ the OS variants included with RomWBW.
 The following custom applications are found on the ROM disk and are,
 therefore, globally available.
 
-  -----------------------------------------------------------------------------
+  ----------------------------------------------------------------------------
   Application   Description
-  ------------- ---------------------------------------------------------------
-  ASSIGN        Add, change, and delete drive letter assignments. Use ASSIGN /?
-                for usage instructions.
+  ------------- --------------------------------------------------------------
+  ASSIGN        Add, change, and delete drive letter assignments. Use ASSIGN
+                /? for usage instructions.
 
   SYSCOPY       Copy system image to a device to make it bootable. Use SYSCOPY
                 with no parms for usage instructions.
@@ -454,8 +448,8 @@ therefore, globally available.
   FORMAT        Will someday be a command line tool to format floppy disks.
                 Currently does nothing!
 
-  XM            XModem file transfer program adapted to hardware. Automatically
-                uses primary serial port on system.
+  XM            XModem file transfer program adapted to hardware.
+                Automatically uses primary serial port on system.
 
   FLASH         Will Sowerbutts’ in-situ ROM programming utility.
 
@@ -469,7 +463,7 @@ therefore, globally available.
   TIMER         Display value of running periodic system timer.
 
   CPUSPD        Change the running CPU speed and wait states of the system.
-  -----------------------------------------------------------------------------
+  ----------------------------------------------------------------------------
 
 Some custom applications do not fit on the ROM disk. They are found on
 the disk image files or the individual files can be found in the
@@ -511,6 +505,15 @@ well. However, you will find some files on the ROM disk that will work
 with ZSDOS, but will not work on CP/M 2.2. For example, LDDS, which
 loads the ZSDOS date/time stamper will only run on ZSDOS.
 
+Flash ROM Disks
+
+The limitation of ROM disks being read only can be overcome on some
+platforms with the appropriate selection of Flash ROM chip and system
+configuration. In this case the flash-file system can be enabled which
+will allow the ROM disk to be read and written to. Flash devices have a
+limited write lifespan and continual usage will eventually wear out the
+device. It is not suited for high usage applications.
+
 Disk Devices
 
 While the RAM/ROM disks provide a functional system, they are not useful

Source/Apps/TEST/sound/Scales.asm

@@ -0,0 +1,329 @@
+;
+;------------------------------------------------------------------------------
+; PLAY SCALES USING HBIOS
+;------------------------------------------------------------------------------
+;
+FCB		.EQU	$5C			; Location of default FCB
+BDOS		.EQU	$0005
+;
+		.ORG	$0100
+;
+                LD      (OLDSTACK),SP		; save old stack pointer
+                LD      SP,STACK		; set new stack pointer
+;
+;------------------------------------------------------------------------------
+; GET DEVICE # FROM COMMAND LINE
+;------------------------------------------------------------------------------
+;
+		LD	A,(FCB+1)		; GET FIRST CHAR 
+		SUB	' '
+		JR	Z,NO_ARG
+		SUB	'0'-' '
+		JP	C,EXIT
+;
+;------------------------------------------------------------------------------
+; DISPLAY DEVICE AND NUMBER OF CHANNELS
+;------------------------------------------------------------------------------
+;
+NO_ARG:		LD	(DEVICE),A		; 	
+		LD	DE,TXT_DEV		; DEVICE:
+		CALL	PRTSTR
+		CALL	PRTDECB
+		LD	C,A			; GET DEVICE ID
+		LD	A,':'
+		CALL	PRTCHR
+		LD	B,$55
+		PUSH	BC
+		LD	E,4
+		RST	08
+		LD	DE,TXT_NAME
+		LD	A,B
+		RRCA \ RRCA \ RRCA \ RRCA
+		CALL	PRTIDXDEA		; SHOW NAME
+		LD	DE,TXT_CH
+		CALL	PRTSTR
+;
+		POP	BC			; GET & DISPLAY # CHANNELS
+		LD	E,1
+		RST	08
+		LD	A,B		
+		CALL	PRTDECB
+		CALL	CRLF			; NUMBER OF CHANNELS IS IN B
+;
+;------------------------------------------------------------------------------
+; LOOP THROUGH EACH CHANNEL 
+;------------------------------------------------------------------------------
+
+CH__TONE:	LD	A,(DEVICE)	; C CONTAINS DEVICE
+		LD	C,A		; THROUGH THIS LOOP
+;
+		PUSH	BC
+		LD	B,50H		; RESET DEVICE
+		RST	08
+		POP	BC
+;
+		PUSH	BC
+		LD	B,51H		; VOLUME FULL
+		LD	L,0FFH
+		RST	08
+		POP	BC
+;
+		LD	A,B
+TST_TONE_LP:	DEC	A
+		LD	(CHANNEL),A	; SAVE CURRENT CHANNEL
+		CALL	TST_SCALES	; SCALES TEST
+;		CALL	TST_VOLUME	; VOLUME TEST
+		CALL	CRLF
+		DJNZ	TST_TONE_LP
+;
+		PUSH	BC
+		LD	B,50H		; RESET DEVICE
+		RST	08
+		POP	BC
+;
+;------------------------------------------------------------------------------
+; RESTORE STACK & EXIT
+;------------------------------------------------------------------------------
+;
+EXIT:		LD      SP, (OLDSTACK)		; Exit to CP/M
+		RST     00H
+		DI
+		HALT
+;
+;------------------------------------------------------------------------------
+; PLAY SCALES FROM HIGHEST HBIOS NOTE TO LOWEST
+;------------------------------------------------------------------------------
+;
+TST_SCALES:	PUSH	BC		
+		PUSH	AF
+;
+		LD	HL,380		; START NOTE
+		LD	(NOTE),HL	; Top of Octave 7 is 343
+
+		LD	B,51H		; VOLUME HIGH
+		LD	L,0FFH
+		PUSH	BC
+		RST	08
+		POP	BC
+;
+NEXT0:		PUSH	BC
+;
+		LD	DE,TXT_TSTCH	; DISPLAY CHANNEL 
+		CALL	PRTSTR
+		LD	A,(CHANNEL)
+		CALL	PRTDECB
+;
+		LD	DE,TXT_NOTE	; DISPLAY NOTE
+		CALL	PRTSTR
+		LD	HL,(NOTE)
+		CALL	PRTDECW
+		POP	BC
+;
+		LD	B,53H		; SET NOTE
+		LD	HL,(NOTE)
+		PUSH	BC
+		RST	08
+		POP	BC
+
+		OR	A		; DID DRIVER FAIL
+		JR	Z,NEXT4		; THIS NOTE ?
+
+		LD	DE,TXT_BAD_N
+		CALL	FAILMSG
+		JR	SKIP
+;
+NEXT4:		LD	B,57H		; DURATION
+		LD	HL,1000
+		PUSH	BC
+		RST	08
+		POP	BC
+
+		LD	B,54H		; PLAY
+		LD	A,(CHANNEL)
+		LD	D,A
+		PUSH	BC
+		RST	08
+		POP	BC
+;
+		OR	A		; DID DRIVER FAIL
+		JR	Z,NEXT2		; TO PLAY ?
+
+		LD	DE,TXT_BAD_N
+		CALL	FAILMSG
+		JR	SKIP
+;
+NEXT2:		CALL	DELAY
+		CALL	CRLF
+;
+SKIP:		LD	HL,(NOTE)
+		DEC	HL
+		LD	(NOTE),HL
+
+		INC	HL
+		LD	A,H
+		OR	L
+		DEC	HL
+		JR	NZ,NEXT0
+;
+		LD	B,51H		; VOLUME
+		LD	L,00H		; OFF
+		PUSH	BC
+		RST	08
+		POP	BC
+;
+		LD	B,54H		; PLAY
+		LD	A,(CHANNEL)
+		LD	D,A
+		PUSH	BC
+		RST	08
+		POP	BC
+
+		PUSH	BC
+		LD      C, 6		; check for keypress
+		LD      E,0FFH
+		CALL    BDOS
+		POP	BC
+		OR      A
+		JP	NZ,EXIT
+
+		POP	AF
+		POP	BC
+;
+		RET
+;
+FAILMSG:	PUSH	AF
+		PUSH	BC
+		CALL	PRTSTR
+		CALL	CRLF
+		POP	BC
+		POP	AF
+		RET
+;
+;------------------------------------------------------------------------------
+; CONSTANT TONE ON ALL CHANNELS, SCALE VOLUME
+;------------------------------------------------------------------------------
+;
+TST_VOLUME:
+	LD	HL,332+48		; TONE
+	LD	(NOTE),HL
+;
+	LD	B,3
+NEXTCH1	LD	A,B
+	DEC	A
+	LD	(CHANNEL),A
+	PUSH	BC		; ACROSS
+	CALL	TONE		; ALL
+
+	LD      C, 6		; KEYPRESS 
+        LD      E, 0FFH
+        CALL    BDOS
+	POP	BC		; CHANNELS
+
+        OR      A
+        JP	NZ,EXIT
+
+	DJNZ	NEXTCH1
+
+	RET
+
+TONE:	LD	A,(DEVICE)
+	LD	C,A
+
+	LD	B,50H		; RESET
+	PUSH	BC
+	RST	08
+	POP	BC
+;
+NEXT1:	LD	B,51H		; VOLUME
+	LD	A,(VOLUME)
+	LD	L,A
+	PUSH	BC
+	RST	08
+	POP	BC
+;
+	LD	B,53H		; NOTE
+	LD	HL,(NOTE)
+	PUSH	BC
+	RST	08
+	POP	BC
+;
+	LD	B,54H		; PLAY
+	LD	A,(CHANNEL)
+	LD	D,A
+	PUSH	BC
+	RST	08
+	POP	BC
+;
+	CALL	DELAY
+;
+	LD	A,(VOLUME)
+	DEC	A
+	LD	(VOLUME),A
+	JR	NZ,NEXT1
+;
+	LD	B,51H		; VOLUME
+	LD	L,00H
+	PUSH	BC
+	RST	08
+	POP	BC
+;
+	LD	B,54H		; PLAY
+	PUSH	BC
+	LD	A,(CHANNEL)
+	LD	D,A
+	POP	BC
+	RST	08
+;
+	RET
+;;
+;------------------------------------------------------------------------------
+; LONG DELAY
+;------------------------------------------------------------------------------
+;
+DELAY:	LD	HL,-1
+DELAY1:	DEC	HL
+	LD	A,H
+	OR	L
+	JR	NZ,DELAY1
+	RET
+;
+;------------------------------------------------------------------------------
+; PRINT THE nTH STRING IN A LIST OF STRINGS WHERE EACH IS TERMINATED BY 0
+; A REGISTER DEFINES THE nTH STRING IN THE LIST TO PRINT AND DE POINTS
+; TO THE START OF THE STRING LIST.
+;------------------------------------------------------------------------------
+;
+PRTIDXDEA:	LD	C,A
+		OR	A
+PRTIDXDEA1:	JR	Z,PRTIDXDEA3		; FOUND TARGET SO EXIT 
+PRTIDXDEA2:	LD	A,(DE)			; LOOP UNIT
+		INC	DE			; WE REACH
+		OR	A			; END OF STRING
+		JR	NZ,PRTIDXDEA2
+		DEC	C			; AT STRING END. SO GO
+		JR	PRTIDXDEA1		; CHECK FOR INDEX MATCH
+PRTIDXDEA3:	CALL	PRTSTR			; DISPLAY THE STRING
+		RET
+;
+#INCLUDE "printing.inc"
+;
+TXT_CH		.DB	"CHANNELS: ",0
+TXT_TSTCH	.DB	"CHANNEL: ",0
+TXT_BAD_N	.DB	" BAD NOTE",0
+TXT_BAD_P	.DB	" PLAY ERROR",0
+TXT_NOTE	.DB	" NOTE: ",0
+TXT_DEV		.DB	"DEVICE: ",0
+TXT_NAME	.DB	"SN76489 ",0
+		.DB	"AY-3-8910 ",0
+		.DB	"I/O PORT ",0
+		.DB	"YM2612 ",0
+MODE		.DB	0		; scales mode or volume mode
+DEVICE		.DB	0
+NOTE		.DW	128
+VOLUME		.DB	0
+CHANNEL		.DB	0
+OLDSTACK        .DW     0		; original stack pointer
+                .DS     40H		; space for stack
+STACK					; top of stack
+;
+	.END

Source/Apps/Tune/printing.inc

@@ -34,6 +34,7 @@ PRTCR:
 ; Print a zero terminated string at (DE) without destroying any registers
 ;
 PRTSTR:
+	PUSH	AF
 	PUSH	DE
 ;
 PRTSTR1:
@@ -46,6 +47,7 @@ PRTSTR1:
 ;
 PRTSTR2:
 	POP	DE		; restore registers
+	POP	AF
 	RET
 ;
 ; Print the value in A in hex without destroying any registers

Source/Apps/VGM/Build.cmd

@@ -6,6 +6,7 @@ set PATH=%TOOLS%\tasm32;%PATH%
 set TASMTABS=%TOOLS%\tasm32
 
 tasm -t180 -g3 -fFF -dWBW vgmplay.asm vgmplay.com vgmplay.lst || exit /b
+tasm -t180 -g3 -fFF -dWBW ymfmdemo.asm ymfmdemo.com ymfmdemo.lst || exit /b
 
 copy /Y vgmplay.com ..\..\..\Binary\Apps\ || exit /b
-copy /Y Tunes\*.* ..\..\..\Binary\Apps\Tunes\ || exit /b
+copy /Y Tunes\*.vgm ..\..\..\Binary\Apps\Tunes\ || exit /b

Source/Apps/VGM/Makefile

@@ -10,6 +10,9 @@ DEPS := vgmplay.asm $(shell find . -name '*.inc')
 vgmplay.com: $(DEPS)
 	$(TASM) -dWBW vgmplay.asm vgmplay.com vgmplay.lst
 
+ym2612.com: 
+	$(TASM) -dWBW ymfmdemo.asm ymfmdemo.com ymfmdemo.lst
+
 all::
 	mkdir -p $(DEST)/Tunes
-	cp Tunes/* $(DEST)/Tunes
+	cp Tunes/*.vgm $(DEST)/Tunes

Source/Apps/VGM/printing.inc

@@ -34,6 +34,7 @@ PRTCR:
 ; Print a zero terminated string at (DE) without destroying any registers
 ;
 PRTSTR:
+	PUSH	AF
 	PUSH	DE
 ;
 PRTSTR1:
@@ -46,6 +47,7 @@ PRTSTR1:
 ;
 PRTSTR2:
 	POP	DE		; restore registers
+	POP	AF
 	RET
 ;
 ; Print the value in A in hex without destroying any registers

Source/Apps/VGM/vgmplay.asm

@@ -9,122 +9,173 @@
 ; YM2151 support from Ed Brindley
 ;
 ; YM2162/YM3484, GD3 support, VGM Chip identification, 
-; default file type, basic file size checking added by Phil Summers
+; default file type, basic file size checking, polled CTC mode
+; added by Phil Summers
 ;
 ; Bugs: YM2151 playback untested & no mute.
+;       CTC polled timing - predicted 44100 divider is too slow
 ;
 ; Assemble with:
 ;
 ;   TASM -80 -b VGMPLAY.ASM VGMPLAY.COM
 ;
+;
+; A VGM file can play 44100 samples a second. This may be sound chip
+; register commands or PCM data. This player does not support PCM playback
+; due to the high processor speed and file size required. Typical VGM files
+; available use a much lower sample rate and are playable. Where the processor
+; speed is low and the sample rate is high, the playback overhead will cause
+; playback speed to be inaccurate. 
+
 ;------------------------------------------------------------------------------
 ; Device and system specific definitions
 ;------------------------------------------------------------------------------
 ;
-P8X180          .EQU    0           	        ; System configuration
-RC2014          .EQU    0
-SBCECB		.EQU	1
-MBC		.EQU	0
+custom		.equ	0           	        ; System configurations
+P8X180          .equ    1
+RC2014          .equ    2
+sbcecb		.equ	3			
+MBC		.equ	4
 ;
-                .IF P8X180
-RSEL            .EQU    82H			; Primary AY-3-8910 Register selection
-RDAT            .EQU    83H			; Primary AY-3-8910 Register data
-RSEL2           .EQU    88H			; Secondary AY-3-8910 Register selection
-RDAT2           .EQU    89H			; Secondary AY-3-8910 Register data
-PSG1REG         .EQU    84H			; Primary SN76489
-PSG2REG         .EQU    8AH			; Secondary SN76489
-YM2151_SEL1	.EQU	0B0H			; Primary YM2151 register selection
-YM2151_DAT1	.EQU	0B1H			; Primary YM2151 register data
-YM2151_SEL2	.EQU	0B2H			; Secondary YM2151 register selection
-YM2151_DAT2	.EQU	0B3H			; Secondary YM2151 register data
-FRAME_DLY       .EQU    48			; Frame delay (~ 1/44100)
-                .ENDIF
+plt_romwbw	.equ	1			; Build for ROMWBW?
+plt_type	.equ	sbcecb			; Select build configuration
+debug		.equ	0			; Display port, register, config info
 ;
-                .IF RC2014
-RSEL            .EQU    0D8H			; Primary AY-3-8910 Register selection
-RDAT            .EQU    0D0H			; Primary AY-3-8910 Register data
-RSEL2           .EQU    0A0H			; Secondary AY-3-8910 Register selection
-RDAT2           .EQU    0A1H			; Secondary AY-3-8910 Register data
-PSG1REG         .EQU    0FFH			; Primary SN76489
-PSG2REG         .EQU    0FBH			; Secondary SN76489
-YM2151_SEL1	.EQU	0FEH			; Primary YM2151 register selection
-YM2151_DAT1	.EQU	0FFH			; Primary YM2151 register data
-YM2151_SEL2	.EQU	0D0H			; Secondary YM2151 register selection
-YM2151_DAT2	.EQU	0D1H			; Secondary YM2151 register data
-FRAME_DLY       .EQU    15			; Frame delay (~ 1/44100)
-                .ENDIF
+#IF (plt_type=custom)
+RSEL            .equ    09AH			; Primary AY-3-8910 Register selection
+RDAT            .equ    09BH			; Primary AY-3-8910 Register data
+RSEL2           .equ    88H			; Secondary AY-3-8910 Register selection
+RDAT2           .equ    89H			; Secondary AY-3-8910 Register data
+VGMBASE		.equ	$C0
+YMSEL		.equ	VGMBASE+00H		; Primary YM2162 11000000 a1=0 a0=0
+YMDAT		.equ	VGMBASE+01H		; Primary YM2162 11000001 a1=0 a0=1
+YM2SEL		.equ	VGMBASE+02H		; Secondary YM2162 11000010 a1=1 a0=0
+YM2DAT		.equ	VGMBASE+03H		; Secondary YM2162 11000011 a1=1 a0=1
+PSG1REG         .equ    VGMBASE+08H		; Primary SN76489
+PSG2REG         .equ    VGMBASE+09H		; Secondary SN76489
+ctcbase		.equ	VGMBASE+0CH		; CTC base address
+YM2151_SEL1	.equ	0FEH			; Primary YM2151 register selection
+YM2151_DAT1	.equ	0FFH			; Primary YM2151 register data
+YM2151_SEL2	.equ	0FEH			; Secondary YM2151 register selection
+YM2151_DAT2	.equ	0FFH			; Secondary YM2151 register data
+FRAME_DLY       .equ    10  			; Frame delay (~ 1/44100)
+plt_cpuspd	.equ	6			; Non ROMWBW cpu speed default
+#ENDIF
 ;
-                .IF SBCECB
-RSEL            .EQU    0D8H			; Primary AY-3-8910 Register selection
-RDAT            .EQU    0D0H			; Primary AY-3-8910 Register data
-RSEL2           .EQU    0A0H			; Secondary AY-3-8910 Register selection
-RDAT2           .EQU    0A1H			; Secondary AY-3-8910 Register data
-YMSEL		.EQU	0C0H			; Primary YM2162 11000000 a1=0 a0=0
-YMDAT		.EQU	0C1H			; Primary YM2162 11000001 a1=0 a0=1
-YM2SEL		.EQU	0C2H			; Secondary YM2162 11000010 a1=1 a0=0
-YM2DAT		.EQU	0C3H			; Secondary YM2162 11000011 a1=1 a0=1
-PSG1REG         .EQU    0C6H			; Primary SN76489
-PSG2REG         .EQU    0C7H			; Secondary SN76489
-YM2151_SEL1	.EQU	0FEH			; Primary YM2151 register selection
-YM2151_DAT1	.EQU	0FFH			; Primary YM2151 register data
-YM2151_SEL2	.EQU	0FEH			; Secondary YM2151 register selection
-YM2151_DAT2	.EQU	0FFH			; Secondary YM2151 register data
-FRAME_DLY       .EQU    8  			; Frame delay (~ 1/44100)
-                .ENDIF
+#IF (plt_type=P8X180)
+RSEL            .equ    82H			; Primary AY-3-8910 Register selection
+RDAT            .equ    83H			; Primary AY-3-8910 Register data
+RSEL2           .equ    88H			; Secondary AY-3-8910 Register selection
+RDAT2           .equ    89H			; Secondary AY-3-8910 Register data
+PSG1REG         .equ    84H			; Primary SN76489
+PSG2REG         .equ    8AH			; Secondary SN76489
+YM2151_SEL1	.equ	0B0H			; Primary YM2151 register selection
+YM2151_DAT1	.equ	0B1H			; Primary YM2151 register data
+YM2151_SEL2	.equ	0B2H			; Secondary YM2151 register selection
+YM2151_DAT2	.equ	0B3H			; Secondary YM2151 register data
+ctcbase		.equ	000H			; CTC base address
+YMSEL		.equ	000H			; Primary YM2162 11000000 a1=0 a0=0
+YMDAT		.equ	000H			; Primary YM2162 11000001 a1=0 a0=1
+YM2SEL		.equ	000H			; Secondary YM2162 11000010 a1=1 a0=0
+YM2DAT		.equ	000H			; Secondary YM2162 11000011 a1=1 a0=1
+FRAME_DLY       .equ    48			; Frame delay (~ 1/44100)
+plt_cpuspd	.equ	20			; Non ROMWBW cpu speed default
+#ENDIF
 ;
-		.IF MBC
-RSEL            .EQU    0A0H			; Primary AY-3-8910 Register selection
-RDAT            .EQU    0A1H			; Primary AY-3-8910 Register data
-RSEL           	.EQU    0D8H			; Secondary AY-3-8910 Register selection
-RDAT           	.EQU    0D0H			; Secondary AY-3-8910 Register data
-YMSEL		.EQU	0C0H			; 11000000 a1=0 a0=0
-YMDAT		.EQU	0C1H			; 11000001 a1=0 a0=1
-YM2SEL		.EQU	0C2H			; 11000010 a1=1 a0=0
-YM2DAT		.EQU	0C3H			; 11000011 a1=1 a0=1
-PSGREG          .EQU    0C6H			; Primary SN76489
-PSG2REG         .EQU    0C7H			; Secondary SN76489
-YM2151_SEL1	.EQU	0FEH			; Primary YM2151 register selection
-YM2151_DAT1	.EQU	0FFH			; Primary YM2151 register data
-YM2151_SEL2	.EQU	0FEH			; Secondary YM2151 register selection
-YM2151_DAT2	.EQU	0FFH			; Secondary YM2151 register data
-FRAME_DLY       .EQU    10  			; Frame delay (~ 1/44100)
-                .ENDIF
+#IF (plt_type=RC2014)
+RSEL            .equ    0D8H			; Primary AY-3-8910 Register selection
+RDAT            .equ    0D0H			; Primary AY-3-8910 Register data
+RSEL2           .equ    0A0H			; Secondary AY-3-8910 Register selection
+RDAT2           .equ    0A1H			; Secondary AY-3-8910 Register data
+PSG1REG         .equ    0FFH			; Primary SN76489
+PSG2REG         .equ    0FBH			; Secondary SN76489
+YM2151_SEL1	.equ	0FEH			; Primary YM2151 register selection
+YM2151_DAT1	.equ	0FFH			; Primary YM2151 register data
+YM2151_SEL2	.equ	0D0H			; Secondary YM2151 register selection
+YM2151_DAT2	.equ	0D1H			; Secondary YM2151 register data
+ctcbase		.equ	000H			; CTC base address
+YMSEL		.equ	000H			; Primary YM2162 11000000 a1=0 a0=0
+YMDAT		.equ	000H			; Primary YM2162 11000001 a1=0 a0=1
+YM2SEL		.equ	000H			; Secondary YM2162 11000010 a1=1 a0=0
+YM2DAT		.equ	000H			; Secondary YM2162 11000011 a1=1 a0=1
+FRAME_DLY       .equ    12			; Frame delay (~ 1/44100)
+plt_cpuspd	.equ	7			; Non ROMWBW cpu speed default
+#ENDIF
+;
+#IF (plt_type=sbcecb)
+RSEL            .equ    09AH			; Primary AY-3-8910 Register selection
+RDAT            .equ	09BH			; Primary AY-3-8910 Register data
+RSEL2           .equ    0A0H			; Secondary AY-3-8910 Register selection
+RDAT2           .equ    0A1H			; Secondary AY-3-8910 Register data
+VGMBASE		.equ	$C0
+YMSEL		.equ	VGMBASE+00H		; Primary YM2162 11000000 a1=0 a0=0
+YMDAT		.equ	VGMBASE+01H		; Primary YM2162 11000001 a1=0 a0=1
+YM2SEL		.equ	VGMBASE+02H		; Secondary YM2162 11000010 a1=1 a0=0
+YM2DAT		.equ	VGMBASE+03H		; Secondary YM2162 11000011 a1=1 a0=1
+PSG1REG         .equ    VGMBASE+06H		; Primary SN76489
+PSG2REG         .equ    VGMBASE+07H		; Secondary SN76489
+ctcbase		.equ	VGMBASE+0CH		; CTC base address
+YM2151_SEL1	.equ	0FEH			; Primary YM2151 register selection
+YM2151_DAT1	.equ	0FFH			; Primary YM2151 register data
+YM2151_SEL2	.equ	0FEH			; Secondary YM2151 register selection
+YM2151_DAT2	.equ	0FFH			; Secondary YM2151 register data
+FRAME_DLY       .equ    13  			; Frame delay (~ 1/44100)
+plt_cpuspd	.equ	8			; Non ROMWBW cpu speed default
+#ENDIF
+;
+#IF (plt_type=MBC)
+RSEL            .equ    0A0H			; Primary AY-3-8910 Register selection
+RDAT            .equ    0A1H			; Primary AY-3-8910 Register data
+RSEL2           .equ    0D8H			; Secondary AY-3-8910 Register selection
+RDAT2           .equ    0D0H			; Secondary AY-3-8910 Register data
+YMSEL		.equ	0C0H			; 11000000 a1=0 a0=0
+YMDAT		.equ	0C1H			; 11000001 a1=0 a0=1
+YM2SEL		.equ	0C2H			; 11000010 a1=1 a0=0
+YM2DAT		.equ	0C3H			; 11000011 a1=1 a0=1
+PSG1REG         .equ    0C6H			; Primary SN76489
+PSG2REG         .equ    0C7H			; Secondary SN76489
+ctcbase		.equ	000H			; CTC base address
+YM2151_SEL1	.equ	0FEH			; Primary YM2151 register selection
+YM2151_DAT1	.equ	0FFH			; Primary YM2151 register data
+YM2151_SEL2	.equ	0FEH			; Secondary YM2151 register selection
+YM2151_DAT2	.equ	0FFH			; Secondary YM2151 register data
+FRAME_DLY       .equ    13  			; Frame delay (~ 1/44100)
+plt_cpuspd	.equ	8			; Non ROMWBW cpu speed default
+#ENDIF
 ;
 ;------------------------------------------------------------------------------
-; Your customer overrides can go in here i.e. ports 
+; Configure timing loop 
 ;------------------------------------------------------------------------------
 ;
-;RSEL            .SET    09AH			; Primary AY-3-8910 Register selection
-;RDAT            .SET    09BH			; Primary AY-3-8910 Register data
+cpu_loop:	.equ	0
+ctc_poll:	.equ	1
+ctc_int:	.equ	2			; not implemented
+;
+delay_type:	.equ	cpu_loop		; cpu timed loop or utilize ctc
+delay_wait	.equ	0			; funny wait mode for ctc
+;
+D60		.equ	735			; 735x60=44100 Frame delay values for ntsc
+D50		.equ	882			; 882x50=44100 Frame delay values for pal
 ;
 ;------------------------------------------------------------------------------
-; Frame delay overide values for different processor speeds. 
+; CTC Defaults 
 ;------------------------------------------------------------------------------
 ;
-;FRAME_DLY       .SET    10  			; 1Mhz	; not 
-;FRAME_DLY       .SET    10  			; 2Mhz	; implemented
-;FRAME_DLY       .SET    10  			; 4Mhz	; yet
-;FRAME_DLY       .SET    15  			; 8Mhz
-;FRAME_DLY       .SET    10  			; 10Mhz
-;FRAME_DLY       .SET    20  			; 12Mhz
-;
-;------------------------------------------------------------------------------
-; Frame delay values for pal/ntsc
-;------------------------------------------------------------------------------
-;
-D60		.EQU	735
-D50		.EQU	882
+ctcdiv0		 .equ 	1			; Divider chain for 3.579545MHz input
+ctcdiv1		 .equ 	1			; Ctc with 3 step divider base address
+ctcdiv2		 .equ 	16
+ctcdiv3		 .equ 	3			; 3579545 / 1 / 2 / 41 = 43653 = 1% error
 ;
 ;------------------------------------------------------------------------------
 ; Processor speed control for SBCV2004+
 ;------------------------------------------------------------------------------
 ;
 ;#DEFINE 	SBCV2004			; My SBC board at 12Mhz needs this to switch to
-HB_RTCVAL	.EQU	0FFEEH			; 6MHz for it to work with the ECB-VGM reliably.
-RTCIO		.EQU	070H						
-
+HB_RTCVAL	.equ	0FFEEH			; 6MHz for it to work with the ECB-VGM reliably.
+RTCIO		.equ	070H						
+;
 ;------------------------------------------------------------------------------
-; YM2162 Register write macros
+; YM2162 Register write macros - with wait and timeout
 ;------------------------------------------------------------------------------
 ;
 #DEFINE	setreg(reg,val) \
@@ -132,53 +183,57 @@ RTCIO		.EQU	070H
 #DEFCONT \	out	(YMSEL),a 
 #DEFCONT \	ld	a,val 
 #DEFCONT \	out	(YMDAT),a 
+#DEFCONT \	ld	b,0
 #DEFCONT \	in	a,(YMSEL)
 #DEFCONT \	rlca
-#DEFCONT \	jp	c,$-3
+#DEFCONT \	jp	nc,$+5
+#DEFCONT \	djnz	$-6
 ;
 #DEFINE	setreg2(reg,val) \
 #DEFCONT \	ld	a,reg 
 #DEFCONT \	out	(YM2SEL),a 
 #DEFCONT \	ld	a,val 
 #DEFCONT \	out	(YM2DAT),a
+#DEFCONT \	ld	b,0
 #DEFCONT \	in	a,(YMSEL)
 #DEFCONT \	rlca
-#DEFCONT \	jp	c,$-3 
+#DEFCONT \	jp	nc,$+5
+#DEFCONT \	djnz	$-6
 
 ;------------------------------------------------------------------------------
-; VGM Codes
+; VGM Codes - see vgmrips.net/wiki/VGM_specification
 ;------------------------------------------------------------------------------
 
-VGM_GG_W	.EQU	04FH			; GAME GEAR PSG STEREO. WRITE DD TO PORT 0X06
-VGM_PSG1_W	.EQU	050H			; PSG (SN76489/SN76496) #1 WRITE VALUE DD
-VGM_PSG2_W	.EQU	030H			; PSG (SN76489/SN76496) #2 WRITE VALUE DD
-VGM_YM26121_W	.EQU	052H			; YM2612 #1 WRITE VALUE DD
-VGM_YM26122_W	.EQU	053H			; YM2612 #2 WRITE VALUE DD
-VGM_WNS		.EQU	061H			; WAIT N SAMPLES
-VGM_W735	.EQU	062H			; WAIT 735 SAMPLES (1/60TH SECOND)
-VGM_W882	.EQU	063H			; WAIT 882 SAMPLES (1/50TH SECOND)
-VGM_ESD		.EQU	066H			; END OF SOUND DATA
-VGM_YM21511_W	.EQU	054H			; YM2612 #1 WRITE VALUE DD
-VGM_YM21512_W	.EQU	0A4H			; YM2612 #2WRITE VALUE DD
+VGM_GG_W	.equ	04FH			; GAME GEAR PSG STEREO. WRITE DD TO PORT 0X06
+VGM_PSG1_W	.equ	050H			; PSG (SN76489/SN76496) #1 WRITE VALUE DD
+VGM_PSG2_W	.equ	030H			; PSG (SN76489/SN76496) #2 WRITE VALUE DD
+VGM_YM26121_W	.equ	052H			; YM2612 #1 WRITE VALUE DD
+VGM_YM26122_W	.equ	053H			; YM2612 #2 WRITE VALUE DD
+VGM_WNS		.equ	061H			; WAIT N SAMPLES
+VGM_W735	.equ	062H			; WAIT 735 SAMPLES (1/60TH SECOND)
+VGM_W882	.equ	063H			; WAIT 882 SAMPLES (1/50TH SECOND)
+VGM_ESD		.equ	066H			; END OF SOUND DATA
+VGM_YM21511_W	.equ	054H			; YM2612 #1 WRITE VALUE DD
+VGM_YM21512_W	.equ	0A4H			; YM2612 #2 WRITE VALUE DD
 
 ;------------------------------------------------------------------------------
 ; Generic CP/M definitions
 ;------------------------------------------------------------------------------
 
-BOOT            .EQU    0000H               	; boot location
-BDOS            .EQU    0005H              	; bdos entry point
-FCB             .EQU    005CH              	; file control block
-FCBCR           .EQU    FCB + 20H          	; fcb current record
-BUFF            .EQU    0080H              	; DMA buffer
-TOPM		.EQU	0002H			; Top of memory
+BOOT            .equ    0000H               	; boot location
+BDOS            .equ    0005H              	; bdos entry point
+FCB             .equ    005CH              	; file control block
+FCBCR           .equ    FCB + 20H          	; fcb current record
+BUFF            .equ    0080H              	; DMA buffer
+TOPM		.equ	0002H			; Top of memory
 	
-PRINTF          .EQU    9                  	; BDOS print string function
-OPENF           .EQU    15                 	; BDOS open file function
-CLOSEF          .EQU    16                 	; BDOS close file function
-READF           .EQU    20                 	; BDOS sequential read function
+PRINTF          .equ    9                  	; BDOS print string function
+OPENF           .equ    15                 	; BDOS open file function
+CLOSEF          .equ    16                 	; BDOS close file function
+READF           .equ    20                 	; BDOS sequential read function
 	
-CR              .EQU    0DH                	; carriage return
-LF              .EQU    0AH                	; line feed
+CR              .equ    0DH                	; carriage return
+LF              .equ    0AH                	; line feed
 
 ;------------------------------------------------------------------------------
 ; Program Start
@@ -188,12 +243,29 @@ LF              .EQU    0AH                	; line feed
 
                 LD      (OLDSTACK),SP		; save old stack pointer
                 LD      SP,STACK		; set new stack pointer
-
-		LD	DE,MSG_WELC		; Welcome Message
-		CALL	PRTSTR
-
+;
+#IF (delay_type==cpu_loop)
+		call	setfdelay		; Setup the frame delay based on cpu speed
+#ENDIF
+;
+#IF (delay_type==ctc_poll)
+		call	cfgctc_poll		; If building for polled ctc, initialize it
+#ENDIF
+;
+#IF (delay_type==ctc_int)			; If building for interrupt driven ctc, initialize it
+		call	cfgctc_int
+#ENDIF
+;
+#IF (debug)
+;		LD	A,0			; tone to validate presence
+;TST:		LD	C,PSG1REG
+;		OUT	(C),A
+;		LD	C,PSG2REG
+;		OUT	(C),A
+;		JR	TST
+#ENDIF
+		call	welcome			; Welcome message and build debug info
 		CALL	READVGM			; Read in the VGM file
-
 		CALL	VGMINFO			; Check and display VGM Information
 
 		LD      HL, (VGMDATA + 34H) 	; Determine start of VGM
@@ -206,25 +278,63 @@ _S1             LD      DE, VGMDATA + 34H
                 LD      (VGMPOS), HL
 
                 LD      HL,D60             	; VGM delay (60hz)
-                LD      (VGMDLY), HL
-
+		LD      (vdelay), HL
+;
+		LD	IX,VGM_DEV		; IX points to device mask
+;
+;------------------------------------------------------------------------------
+; Play loop
+;------------------------------------------------------------------------------
+;
 MAINLOOP	CALL    PLAY                	; Play one frame
-
-                LD      C,6			; Check for keypress
-                LD      E,0FFH
-                CALL    BDOS
+;
+		LD	HL,KEYCHK		; Check for keypress
+		DEC	(HL)
+		JR	NZ,NO_CHK
+;
+                LD      C,6			; Every 256 commands
+                LD      E,0FFH			; because HBIOS calls
+                CALL    BDOS			; take a long time
                 OR      A
                 JR      NZ,EXIT
+NO_CHK:
+#IF (delay_type==cpu_loop)
+vdelay:		.equ	$+1
+		ld	hl,vdelay
+fdelay:		.equ	$+1
+lp1:		LD      B,FRAME_DLY		; 44100 one frame = 0.0000226757 seconds
+		DJNZ    $
+		DEC     HL
+		LD      A,H
+		OR      L
+		JP      NZ,lp1			; Normally NZ so jp is faster
+#ENDIF
+;
+#IF (delay_type==ctc_poll)
+vdelay:		.equ	$+1
+		ld	hl,vdelay        	; Frame delay
+lp1:		in	a,(ctcch3)		; wait for counter to reach zero
+		dec	a
+		jr	nz,lp1
+#IF (delay_wait)
+lp2:		in	a,(ctcch3)		; wait for counter to pass zero
+		dec	a
+		jr	z,lp2
 
-                LD      HL,(VGMDLY)        	; Frame delay
-L1              LD      B,FRAME_DLY
-                DJNZ    $
-                DEC     HL
-                LD      A,H
-                OR      L
-                JR      NZ,L1
-
-                JR      MAINLOOP
+lp3:		in	a,(ctcch3)		; wait for counter to reach zero
+		dec	a
+		jr	nz,lp3
+#ENDIF			
+		DEC     HL
+		LD      A,H
+		OR      L
+		JP      NZ,lp1			; Normally NZ so jp is faster
+#ENDIF
+;
+#IF (delay_type==ctc_int)
+#ENDIF
+;
+                JP      MAINLOOP
 ;
 ;------------------------------------------------------------------------------
 ; Program Exit
@@ -240,6 +350,194 @@ EXIT:		CALL	VGMDEVICES		; Display devices used
 EXIT_ERR:	CALL	PRTSTR			; Generic message or error
                 LD      SP, (OLDSTACK)		; Exit to CP/M
                 RST     00H
+		DI
+		HALT
+;
+;------------------------------------------------------------------------------
+; Welcome
+;------------------------------------------------------------------------------
+;
+welcome:	LD	DE,MSG_WELC		; Welcome Message
+		CALL	PRTSTR
+;
+#IF (plt_romwbw)
+		LD	DE,MSG_ROMWBW		; display system type
+		CALL	PRTSTR
+#ENDIF
+;
+		LD	A,delay_type		; display build type
+		LD	DE,MSG_CPU
+		CALL	PRTIDXDEA
+;
+		LD	A,plt_type		; display system type
+		LD	DE,MSG_CUSTOM
+		CALL	PRTIDXDEA
+		call	CRLF
+;
+#IF (debug)
+#IF (delay_type==cpu_loop)
+		ld	a,'f'			; Display frame rate delay
+		call	PRTCHR
+		call	PRTDOT
+		ld	a,(fdelay)
+		call	PRTDECB
+		LD	A,' '
+#ENDIF
+		CALL	PRTCHR
+		ld	a,'c'
+		call	PRTCHR
+		call	PRTDOT
+		ld	a,ctcdiv0		; Display ctc divider values
+		call	PRTDECB
+		CALL	PRTDOT
+		ld	a,ctcdiv1
+		call	PRTDECB
+		CALL	PRTDOT
+		ld	a,ctcdiv2
+		call	PRTDECB
+		CALL	PRTDOT
+		ld	a,ctcdiv3
+		call	PRTDECB
+;
+#IF (delay_wait)
+		ld	a,' '
+		CALL	PRTCHR
+		LD	A,'w'			; Display if using double wait
+		CALL	PRTCHR
+#ENDIF
+#ENDIF
+		CALL	CRLF
+		ret
+;
+;------------------------------------------------------------------------------
+; Setup frame delay value - Loop count for DJNZ $ loop
+;------------------------------------------------------------------------------
+;
+setfdelay:
+#IF (delay_type==cpu_loop)
+#IF (plt_romwbw)
+	LD	BC,$F8F0		; GET CPU SPEED
+	RST	08			; FROM HBIOS
+	LD	A,L			; 
+#ELSE
+	ld	a,plt_cpuspd		; USE STANDALONE CPU SPEED
+#ENDIF
+	LD	HL,CLKTBL-1		; CPU SPEED
+	ADD	A,L			; INDEXES 
+	LD	L,A			; INTO
+	ADC	A,H			; TABLE
+	SUB	L			
+	LD	H,A                     ; LOOK IT UP IN THE
+	LD	A,(HL)                  ; CLOCK TABLE
+
+	LD	(fdelay),A		; SAVE LOOP COUNTER FOR CPU SPEED
+	RET
+
+;------------------------------------------------------------------------------
+; Frame delay values for different processor speeds. 
+;------------------------------------------------------------------------------
+;
+;	    1/44100hz  = 22676ns
+;		16Mhz  = 62.5ns  : DJNZ $	= 1 frame delay= 22676ns/13*62.5ns  = 27.91
+;		12Mhz  = 83.3ns  : DJNZ $	= 1 frame delay= 22676ns/13*83.3ns  = 20.94
+;		10Mhz  = 100ns   : DJNZ $	= 1 frame delay= 22676ns/13*100ns   = 17.44
+;		 8Mhz  = 125ns   : DJNZ $	= 1 frame delay= 22676ns/13*125ns   = 13.95
+;	    7.3728Mhz  = 135.6ns : DJNZ $	= 1 frame delay= 22676ns/13*135.6ns = 12.86
+;		 6Mhz  = 166.6s  : DJNZ $	= 1 frame delay= 22676ns/13*166.6ns = 10.47
+;		 4Mhz  = 250ns   : DJNZ $	= 1 frame delay= 22676ns/13*250ns   =  6.98
+;		 2Mhz  = 500ns   : DJNZ $	= 1 frame delay= 22676ns/13*500ns   =  3.49
+;		 1Mhz  = 1000ns  : DJNZ $	= 1 frame delay= 22676ns/13*1000ns  =  1.74
+;
+CLKTBL:		.DB	1  		; 1Mhz		; none of these 
+		.DB	3  		; 2Mhz		; have been
+		.DB	0		; 3Mhz		; validated
+		.DB	6  		; 4Mhz
+		.DB	0		; 5Mhz
+		.DB	10 		; 6Mhz
+		.DB	12 		; 7Mhz 7.3728Mhz
+		.DB	13 		; 8Mhz
+		.DB	0		; 9Mhz
+		.DB	17 		; 10Mhz
+		.DB	0		; 11Mhz
+		.DB	20 		; 12Mhz
+		.DB	0		; 13Mhz
+		.DB	0		; 14Mhz
+		.DB	0		; 15Mhz
+		.DB	27 		; 16Mhz
+		.DB	0		; 17Mhz
+		.DB	0		; 18Mhz
+		.DB	0		; 19Mhz
+		.DB	0		; 20Mhz
+#ENDIF
+;
+;------------------------------------------------------------------------------
+; Initialize CTC
+;------------------------------------------------------------------------------
+;
+; %01010011	; CTC DEFAULT CONFIG
+; %01010111	; CTC COUNTER MODE CONFIG
+; %11010111	; CTC COUNTER INTERRUPT MODE CONFIG
+;  |||||||+-- CONTROL WORD FLAG
+;  ||||||+--- SOFTWARE RESET
+;  |||||+---- TIME CONSTANT FOLLOWS
+;  ||||+----- AUTO TRIGGER WHEN TIME CONST LOADED
+;  |||+------ RISING EDGE TRIGGER
+;  ||+------- TIMER MODE PRESCALER (0=16, 1=256)
+;  |+-------- COUNTER MODE
+;  +--------- INTERRUPT ENABLE
+;
+cfgctc_poll:
+;
+ctcch0		.equ	ctcbase
+ctcch1		.equ	ctcbase+1
+ctcch2		.equ	ctcbase+2
+ctcch3		.equ	ctcbase+3
+;
+ctccfg0		.equ	%01010011
+ctccfg1		.equ	%01010111
+ctccfg2		.equ	%01010111
+ctccfg3		.equ	%01010111
+;
+	ld	a,ctccfg0 & $7f	; 	; Channel 0
+	out	(ctcch0),a
+;	
+	ld	a,ctccfg1 & $7f		; Channel 1
+	out	(ctcch1),a		; 
+	ld	a,ctcdiv1 & $ff		; 
+	out	(ctcch1),a		; 
+;
+	ld	a,ctccfg2 & $7f		; Channel 2
+	out	(ctcch2),a		; 
+	ld	a,ctcdiv2 & $ff		; 
+	out	(ctcch2),a		; 
+;
+	ld	a,ctccfg3 & $7f		; Channel 3
+	out	(ctcch3),a		; 
+	ld	a,ctcdiv3 & $ff		; 
+	out	(ctcch3),a		; 
+;
+	ret
+;
+#IF (debug)	
+ctctest:
+	ld	b,0
+
+ctclp1:	in	a,(ctcch3)		; wait for counter to reach zero
+	dec	a
+	jr	nz,ctclp1
+
+ctclp2:	in	a,(ctcch3)		; wait for counter to pass zero
+	dec	a
+	jr	z,ctclp2
+
+	call	PRTDOT
+;
+	djnz	ctclp1
+#ENDIF
+	ret
+;
+cfgctc_int:
+	ret
 ;
 ;------------------------------------------------------------------------------
 ; Read VGM file into memory
@@ -396,7 +694,6 @@ PLAY
 #IFDEF SBCV2004
 		CALL	SLOWIO
 #ENDIF
-		LD	IX,VGM_DEV
                 LD      HL, (VGMPOS)		; Start processing VGM commands
 NEXT            LD      A, (HL)
                 INC     HL
@@ -406,19 +703,14 @@ NEXT            LD      A, (HL)
                 LD      HL, (VGMDATA + 1CH)	; Loop offset
                 LD      A, H
                 OR      L
-                JP      Z, EXIT
+		JP	Z, EXIT
                 LD      DE, VGMDATA + 1CH
                 ADD     HL, DE
                 LD      (VGMPOS), HL
                 JR      NEXT
 
-NEXT1           CP      VGM_GG_W		; Game Gear SN76489 stereo. Ignored
-                JR      NZ, PSG
-		LD	IX,VGM_DEV
-		SET	0,(IX+1)
-		INC     HL
-		JR      NEXT
-
+NEXT1:
+;
 ;	SN76489 SECTION
 
 PSG             CP      VGM_PSG1_W		; Write byte to SN76489.
@@ -426,7 +718,6 @@ PSG             CP      VGM_PSG1_W		; Write byte to SN76489.
                 LD      A, (HL)
 		INC	HL
                 OUT     (PSG1REG), A
-		LD	IX,VGM_DEV
 		SET	0,(IX+0)
                 JR      NEXT
 
@@ -435,7 +726,6 @@ PSG2            CP      VGM_PSG2_W		; Write byte to second SN76489.
                 LD      A, (HL)
                 INC     HL
                 OUT     (PSG2REG), A
-		LD	IX,VGM_DEV
 		SET	1,(IX+0)
                 JR      NEXT
 
@@ -452,19 +742,17 @@ AY              CP      0A0H
                 LD      A, (HL)
                 INC     HL
                 OUT     (RDAT2), A
-		LD	IX,VGM_DEV
 		SET	2,(IX+0)
                 JR      NEXT
 AY1		OUT     (RSEL), A
                 LD      A, (HL)
                 INC     HL
                 OUT     (RDAT), A
-		LD	IX,VGM_DEV
 		SET	3,(IX+0)
                 JR      NEXT
-
+;
 ;	YM2612 SECTION
-
+;
 YM2162_1	CP      VGM_YM26121_W
                 JR      NZ, YM2162_2
 		LD	A,(HL)
@@ -473,7 +761,6 @@ YM2162_1	CP      VGM_YM26121_W
 		LD	A,(HL)
 		OUT	(YMDAT),A
 		INC	HL
-		LD	IX,VGM_DEV
 		SET	4,(IX+0)
 		JP	NEXT
 ;
@@ -485,12 +772,11 @@ YM2162_2	CP      VGM_YM26122_W
 		LD	A,(HL)
 		OUT	(YM2DAT),A
 		INC	HL
-		LD	IX,VGM_DEV
 		SET	4,(IX+0)		; 2nd channel 
 		JP	NEXT
-
+;
 ;	YM2151 SECTION
-
+;
 YM2151_1	CP      VGM_YM21511_W
                 JR      NZ,YM2151_2
 		LD	A,(HL)
@@ -499,21 +785,27 @@ YM2151_1	CP      VGM_YM21511_W
 		LD	A,(HL)
 		OUT	(YM2151_DAT1),A
 		INC	HL
-		LD	IX,VGM_DEV
 		SET	6,(IX+0)
 		JP	NEXT
 ;
 YM2151_2	CP      VGM_YM21512_W
-                JR      NZ,WAITNN
+                JR      NZ,GG
 		LD	A,(HL)
 		OUT	(YM2151_SEL2),A
 		INC	HL
 		LD	A,(HL)
 		OUT	(YM2151_DAT2),A
 		INC	HL
-		LD	IX,VGM_DEV
 		SET	7,(IX+0)
 		JP	NEXT
+;
+;	GAME GEAR SN76489 STEREO SECTION
+;
+GG:		CP      VGM_GG_W		; Stereo steering port value
+		JR      NZ, WAITNN
+;		SET	0,(IX+1)
+		INC     HL
+		JP      NEXT
 ;	
 WAITNN		CP      VGM_WNS			; Wait nn samples
                 JR      NZ, WAIT60
@@ -524,36 +816,43 @@ WAITNN		CP      VGM_WNS			; Wait nn samples
                 LD      (VGMPOS), HL
                 LD      L, A
                 LD      H, D
-                LD      (VGMDLY), HL
+                LD      (vdelay), HL
                 RET
 ;
 WAIT60          CP      VGM_W735		; Wait 735 samples (60Hz)
                 JR      NZ, WAIT50
                 LD      (VGMPOS), HL
                 LD      HL, D60
-                LD      (VGMDLY), HL
+                LD      (vdelay), HL
                 RET
 ;
-WAIT50          CP      VGM_W882		; Wait 882 samples (50Hz)
-                JR      NZ, WAIT1
-                LD      (VGMPOS), HL
-                LD      HL, D50
-                LD      (VGMDLY), HL
+WAIT50:		CP      VGM_W882		; Wait 882 samples (50Hz)
+		JR      NZ, WAIT1
+		LD      (VGMPOS), HL
+		LD      HL, D50
+                LD      (vdelay), HL
                 RET
 ;
-WAIT1           CP      70H			; WAIT 0-15 SAMPLES
+WAIT1:          CP      70H			; WAIT 0-15 SAMPLES
                 JR      C, UNK			; CODES 70-7FH
                 CP      80H
                 JP      NC, UNK
                 SUB     6FH
                 LD      L, A
                 LD      H, 0
-                LD      (VGMDLY), HL
+                LD      (vdelay), HL
                 RET
 ;
-UNK		LD	IX,VGM_DEV		; Set flag for
-		SET	0,(IX+1)		; unknown device
+UNK:		SET	0,(IX+1)		; unknown device
 		INC	HL			; Try and skip
+#IF (debug)
+		ld	a,'u'			; Display unknow command
+		call	PRTCHR
+		call	PRTDOT
+		call	PRTHEX
+		ld	a,' '
+		call	PRTCHR
+#ENDIF
 		JP	NEXT
 ;
 ;------------------------------------------------------------------------------
@@ -609,12 +908,6 @@ CHKDEV:		AND	%00000011		; Display
 		CALL	PRTCHR			; Skip if not
 		CALL	PRTSTR			; used.
 		RET
-
-DEBUG:		PUSH	AF
-		LD	A,'*'
-		CALL	PRTCHR
-		POP	AF
-		RET
 ;
 ;------------------------------------------------------------------------------
 ; Mute Devices.
@@ -939,6 +1232,28 @@ FASTIO:
 		RET
 ;
 ;------------------------------------------------------------------------------
+; PRINT THE nTH STRING IN A LIST OF STRINGS WHERE EACH IS TERMINATED BY 0
+; A REGISTER DEFINES THE nTH STRING IN THE LIST TO PRINT AND DE POINTS
+; TO THE START OF THE STRING LIST.
+;------------------------------------------------------------------------------
+;
+PRTIDXDEA:
+	LD	C,A
+	OR	A
+PRTIDXDEA1:
+	JR	Z,PRTIDXDEA3		; FOUND TARGET SO EXIT 
+PRTIDXDEA2:
+	LD	A,(DE)			; LOOP UNIT
+	INC	DE			; WE REACH
+	OR	A			; END OF STRING
+	JR	NZ,PRTIDXDEA2
+	DEC	C			; AT STRING END. SO GO
+	JR	PRTIDXDEA1		; CHECK FOR INDEX MATCH
+PRTIDXDEA3:
+	CALL	PRTSTR			; DISPLAY THE STRING
+	RET
+;
+;------------------------------------------------------------------------------
 ; External routines.
 ;------------------------------------------------------------------------------
 ;
@@ -948,8 +1263,8 @@ FASTIO:
 ; Strings and constants.
 ;------------------------------------------------------------------------------
 ;
-MSG_WELC:	.DB	"VGM Player for RomWBW v0.3, 2-Jul-2022",CR,LF
-;		.DB	"J.B. Langston/Marco Maccaferri/Phil Summers",CR,LF
+MSG_WELC:	.DB	"VGM Player v0.4, 11-Dec-2022"
+;		.DB	CR,LF, "J.B. Langston/Marco Maccaferri/Ed Brindley/Phil Summers",CR,LF
 		.DB	0
 MSG_BADF:	.DB	"Not a VGM file",CR,LF,0
 MSG_PO		.DB	"Played on : ",0
@@ -963,17 +1278,33 @@ MSG_NOFILE:     .DB	"File not found", CR, LF, 0
 MSG_MEM:	.DB	"File to big", CR, LF, 0
 MSG_TITLE:	.DB	" from: ",0
 MSG_TRACK	.DB	"Playing: ",0
+MSG_CPU		.DB	"[cpu]",0
+MSG_CTCPOLL	.DB	"[ctc polled]",0
+MSG_CTCINT	.DB	"[ctc interrupts]",0
+MSG_ROMWBW	.DB	" [romwbw] ",0
+MSG_CUSTOM	.DB	" [custom] ",0
+MSG_P8X180	.DB	" [p8x180] ",0
+MSG_RC2014	.DB	" [rc2014] ",0
+MSG_SBCECB	.DB	" [sbc] ",0
+MSG_MBC		.DB	" [mbc] ",0
 ;
 ;------------------------------------------------------------------------------
 ; Variables
 ;------------------------------------------------------------------------------
 ;
 VGMPOS          .DW     0
-VGMDLY          .DW     0
-VGMUNK_F	.DB	0		; Flag for unknown device
-VGM_DEV		.DB	%00000000	; yyYYAASS
-		.DB	%00000000	; Unimplemented device flags
+;VGMDLY          .DW     0		; Saves number of frames to delay
+KEYCHK		.DB	0		; Counter for keypress checks
+;
+VGM_DEV		.DB	%00000000	; IX+0 Flags for devices
+					; xx...... ym2151 1 & 2
+					; ..x..... ym2612 2 (not supported)
+					; ...x.... ym2612 1
+					; ....xx.. ay-3-8910 1 & 2
+					; ......xx sn76489 1 & 2
 
+		.DB	%00000000	; IX+1 Unimplemented device flags & future devices
+;
 OLDSTACK        .DW     0		; original stack pointer
                 .DS     40H		; space for stack
 STACK					; top of stack

Source/Apps/VGM/vgmplay.txt

@@ -5,39 +5,70 @@ Simple player for VGM (Video Game Music) files.
 
 Usage:
 
-  VGMPLAY MUSIC.VGM
+VGMPLAY MUSIC[.VGM]
 
-Default Ports:
+Press a key to exit the program. 
 
-  D8H-D0H - First AY-3-8910 (RSEL/RDAT)
-  A0H-A1H - Second AY-3-8910
-  FFH     - First SN76489
-  FBH     - Second SN76489
-  C6H-C7H - YM2612/YM3484
+Supported devices
+=================
 
-If your system uses different ports you need to recompile the source.
+SN76489
+AY-3-89810
+YM2612/YM3484
+YM2151
 
-Note: The player should be compatible with VGM files up to version 1.51
-but there are very few controls (if any) in the code, be sure to have
-a good VGM file that doesn't contain much extra data. These files can be
-very big, the player is limited to the available TPA space which is
-typically around 54-55k, bigger files will overwrite the CP/M code and/or
-wrap around the 64k limit. 
+Supported platforms
+===================
 
-The played is designed to run on a standard RC2014 with a 7.3728 MHz clock, 
-if your system uses a different clock you need to adjust the frame delay accordingly.
+VGM Player is currently being developed on the ROMWBW platform using the Retrobrew computers
+EBC-SBC-V2 (Z80), ECB-SCG (AY-3-8910) and ECB-VGM (YM2612 and 2xSN76489) board. 
+It can be configured to run with other hardware such as RC2014, P8X180 and nhyodyne MBC.
 
+VGM files can be very big and are limited in size by the available TPA space, which is typically 52k.
+
+Processor speed affects the playback speed. Under ROMWBW the player will detect the cpu speed configuration
+and adjust timing loops. For other platforms, default speeds are configured but may need to be changed
+to suit your hardware. Counter/Timer hardware may be supported in future.
 
 Example Music Files
 ===================
 
-LEMMIN01.VGM - SN76489        - Lemmings: Title Screen
-PENGUI03.VGM - AY-3-8910      - Penguin Adventure: Forest Path
-PITFAL02.VGM - 2xSN76489      - Pitfall II: Scene 1
-TIGER02.VGM  - 2xAY-3-8910    - Tiger Hely: First Mission
-WONDER01.VGM - 2xSN76489      - Wonder Boy in Monster Land
-FILTHY01.VGM - YM3484         - Columns : Filthy
-ITSGAMOV.VGM - YM3484+SN76489 - Puyo Puyo Tsuu : It's Game Over!
+ENDING.VGM   - AY-3-8910           * Puyo Puyo: Ending (Unused)                                   : 24K
+QIX.VGM      - AY-3-8910           - Super Qix: Main BGM 2                                        : 28K
+AGGRESS.VGM  - AY-3-8910           - Rastan Saga: Aggressive World                                : 32K
+PENGUI03.VGM - AY-3-8910           - Penguin Adventure: Forest Path                               : 44K
+TIGER02.VGM  - 2xAY-3-8910         - Tiger Hely: First Mission                                    : 28K
+BGM.VGM      - 2xAY-3-8910         * SHM: BGM                                                     : 8K
+LEMMIN01.VGM - SN76489             - Lemmings: Title Screen                                       : 44K
+TEDDY.VGM    - 2xSN76489           - TeddyBoy Blues: Title ~ Main Theme                           : 52K
+PITFAL02.VGM - 2xSN76489           - Pitfall II: Scene 1                                          : 16K
+WONDER01.VGM - 2xSN76489           * Wonder Boy in Monster Land: Monster Land                     : 40K
+DESCENT.VGM  - SN76489+YM2612      - Flashback: The Quest for Identity: Descent into the Tunnels  : 40K
+SHIRAKAW.VGM - SN76489+YM2612      * Jantei Monogatari: St. Shirakawa University                  : 32K
+ANNA.VGM     - SN76489+YM2612      - Jantei Monogatari: Anna                                      : 32K
+FIELDMAP.VGM - SN76489+YM2612      - Taikou Risshiden: Field Map: Summer                          : 8K
+ITSGAMOV.VGM - SN76489+YM2612      - Puyo Puyo Tsuu: It's Game Over!                              : 16K
+STARTDEM.VGN - 2xSN76489+AY-3-8910 * Exed Exes / Savage Bees: Start Demo ~Main BGM                : 32K
+INCHINA.VGM  - YM2612              * Double Dragon 3: The Rosetta Stone: In China                 : 44K
 
-Original Source by J.B Langston, Marco Maccaferri
-ROMWBW + YM2612/YM3484 version by Phil Summers
+* Included in disk images
+
+VGM sources
+===========
+https://www.smspower.org/forums/15359-VGMPacksGameGearMegaCollection
+https://vgmrips.net/packs/chip/ym2612
+https://project2612.org/
+
+VGM Tools
+=========
+https://vgmrips.net/wiki/VGMTool
+https://github.com/vgmrips/vgmtools
+
+References
+==========
+http://www.primrosebank.net/computers/mtx/tools/PD/vgmplayer.zip - Paul Daniels MTX SN76489 interrupt version with embedded VGM tune.
+https://github.com/jblang/SN76489/blob/master/examples/vgmplayer.asm - J.B. Langston RC2014 polled version with file loading.
+https://groups.google.com/g/rc2014-z80/c/9nHnETJzGKU - Marco Maccaferri P8X180 & AY-3-8910 support
+https://github.com/electrified/rc2014-ym2151/tree/main/software/vgmplay - Ed Brindly RC2014 & YM2151 support
+
+ROMWBW version by Phil Summers. VGM Player is still in development. The ECB-VGM is also still under development.

Source/Apps/VGM/ymfmdemo.asm

@@ -0,0 +1,779 @@
+;
+;------------------------------------------------------------------------------
+; Simple Z80 FM Music Driver.
+; Adapted from https://github.com/michaelcmartin/bumbershoot/genesis/fm_mus.asm
+;------------------------------------------------------------------------------
+;
+; A song in this system is a series of records, where each record
+; begins with a byte for the number of frames this record lasts,
+; followed by a byte for the number of register writes to the first
+; block of FM registers, followed by that many pairs of (register,
+; value) bytes.
+; When a zero byte is reached for a record length, the playback
+; loops back to the "segno" label.
+;
+; Song data is created from a Music Macro Language score (mml)
+; by the makebach.py script
+;
+;------------------------------------------------------------------------------
+; Device and system specific definitions
+;------------------------------------------------------------------------------
+;
+custom		.equ	0           	        ; System configurations
+sbcecb		.equ	1		
+MBC		.equ	2
+;
+plt_romwbw	.equ	1			; Build for ROMWBW?
+plt_type	.equ	sbcecb			; Select build configuration
+plt_cpuspd	.equ	6			; Non ROMWBW cpu speed default
+debug		.equ	0
+
+ctc_delay	.equ	0
+;
+        .org    100H
+;
+BDOS	.equ	0005h
+;
+YMSEL	.equ	$c0
+YMDAT	.equ	$c1
+ctcbase	.equ	$cc
+;
+;------------------------------------------------------------------------------
+; Initialize sound chip and ctc etc
+;------------------------------------------------------------------------------
+;
+init:	
+#IF	(debug)
+	call	ym_init
+#ENDIF
+#IF	(ctc_delay)
+	call	ctc_config
+#ENDIF
+;
+;------------------------------------------------------------------------------
+; Main loop
+;------------------------------------------------------------------------------
+;
+mloop:	LD      C, 6		; check for keypress
+        LD      E, 0FFH
+        CALL    5
+        OR      A
+        JP	NZ,0
+;
+	call	ploop		; PLAY
+	jp	z,0
+;
+	ld	hl,$1000	; DELAY
+dlp:	dec	hl
+	ld	a,h
+	or	l
+	jr	nz,dlp
+;
+	jr	mloop
+;
+;------------------------------------------------------------------------------
+; Play loop
+;------------------------------------------------------------------------------
+;
+ploop:	ld      hl, wait	; HAVE WE REACHED THE 
+        dec     (hl)		; LAST FRAME
+        ret	nz
+
+        ld      hl, (ptr)	; POINT TO START OF SONG
+        ld      a, (hl)		; GET NO OF FRAMES	
+        and     a		; 
+	ret	z
+;        jr      nz, nolp
+;
+;	ld	a,'@'
+;	call	PRTCHR
+;
+;        ld      hl, segno	; POINT TO CURRENT SEGMENT
+ ;       ld      a, (hl)		; GET FRAME COUNT
+nolp:   ld      (wait), a	; AND SAVE IT
+        inc     hl
+	 call	PRTHEX
+	 call	PRTDOT
+
+        ld      b, (hl)		; GET NUMBER OF REGISTER PAIRS TO WRITE
+        inc     hl		; POINT TO REGISTER
+	 ld	a,b
+	 call	PRTHEX
+	 call	PRTDOT
+
+rlp:    ld      a, (hl)		; SELECT REGISTER
+	out	(YMSEL),a
+	call	PRTHEX
+
+	inc     hl		; GET VALUE
+        ld      a, (hl)
+	call	PRTHEX
+
+        inc     hl
+
+	out	(YMDAT),a		; WRITE THE VALUE
+
+	djnz    rlp		; DO ALL THE PAIRS IN THIS SEGMENT
+
+        ld      (ptr), hl	; SAVE WHERE WE ARE AT
+	call	CRLF
+
+	ret
+;
+;------------------------------------------------------------------------------
+; CTC initialization
+;------------------------------------------------------------------------------
+;
+ctc_config:
+;	ld	b,4			; 4 channels
+;	ld	c,ctcbase		; first channel port
+;ctc_lp:	ld	a,ctc_defcfg		; ctc default config
+;	out	(c),a			; ctc command
+;	inc	c			; next channel port
+;	djnz	ctc_lp
+
+;	ld	hl,hb_timint		; TIMER INT HANDLER ADR
+;	ld	(ivt(ctctivt)),hl
+;
+;	ld	a,int_ctc0a * 2
+	out	(ctcbase),a		; SETUP CTC BASE INT VECTOR
+;
+ctcch0		.equ	ctcbase
+ctcch1		.equ	ctcbase+1
+ctcch2		.equ	ctcbase+2
+ctcch3		.equ	ctcbase+3
+
+ctccfg0		.equ	%01010011
+ctccfg1		.equ	%01010111
+ctccfg2		.equ	%01010111
+ctccfg3		.equ	%01010111
+
+ctcdiv0		.equ	1		; 3.579545MHz input 60Hz timer tick
+ctcdiv1		.equ	8
+ctcdiv2		.equ	0
+ctcdiv3		.equ	29
+
+;ctcdiv0	.equ	1		; 3.579545MHz input 50Hz timer tick
+;ctcdiv1	.equ	8
+;ctcdiv2	.equ	0
+;ctcdiv3	.equ	34
+
+;ctcdiv0	.equ	1		; 3.579545MHz input 44100z timer tick
+;ctcdiv1	.equ	1
+;ctcdiv2	.equ	1
+;ctcdiv3	.equ	81
+
+	ld	a,ctccfg0 & $7f	; 	; Channel 0
+	out	(ctcch0),a
+;	
+	ld	a,ctccfg1 & $7f		; Channel 1
+	out	(ctcch1),a		; 
+	ld	a,ctcdiv1 & $ff		; 
+	out	(ctcch1),a		; 
+;
+	ld	a,ctccfg2 & $7f		; Channel 2
+	out	(ctcch2),a		; 
+	ld	a,ctcdiv2 & $ff		; 
+	out	(ctcch2),a		; 
+;
+	ld	a,ctccfg3 & $7f		; Channel 3
+	out	(ctcch3),a		; 
+	ld	a,ctcdiv3 & $ff		; 
+	out	(ctcch3),a		; 
+;
+	ret
+;
+ptr:    .dw    song
+wait:   .db    $01
+;
+;------------------------------------------------------------------------------
+; YM2612 initialization - not required if included in song data
+;------------------------------------------------------------------------------
+;
+#DEFINE	setreg(reg,val) \
+#DEFCONT \	ld	a,reg 
+#DEFCONT \	out	(YMSEL),a 
+#DEFCONT \	ld	a,val 
+#DEFCONT \	out	(YMDAT),a 
+#DEFCONT \	ld	b,0
+#DEFCONT \	in	a,(YMSEL)
+#DEFCONT \	rlca
+#DEFCONT \	jp	nc,$+5
+#DEFCONT \	djnz	$-6
+;
+ym_init:
+	setreg($22,$00)	; lfo off		
+	setreg($27,$00) ; note off ch 0
+	setreg($28,$01) ; note off ch 1
+	setreg($28,$02) ; note off ch 2
+	setreg($28,$03) ; note off ch 3
+	setreg($28,$04) ; note off ch 4
+	setreg($28,$05) ; note off ch 5
+	setreg($28,$06) ; note off ch 6
+	setreg($28,$01) ; note off ch 1
+	setreg($2b,$00) ; dac off
+	setreg($30,$71) 
+	setreg($34,$0d)
+	setreg($38,$33)
+	setreg($3c,$01) ; dt1/mul
+	setreg($40,$23)
+	setreg($44,$2d)
+	setreg($48,$26)
+	setreg($4c,$00) ; total level
+	setreg($50,$5f)
+	setreg($54,$99)
+	setreg($58,$5f)
+	setreg($5c,$94) ; rs/ar
+	setreg($60,$05)
+	setreg($64,$05)
+	setreg($68,$05)
+	setreg($6c,$07) ; am/dir
+	setreg($70,$02)
+	setreg($74,$02)
+	setreg($78,$02)
+	setreg($7c,$02) ; d2r
+	setreg($80,$11)
+	setreg($84,$11)
+	setreg($88,$11)
+	setreg($8c,$a6) ; d1l/rr
+	setreg($90,$00)
+	setreg($94,$00)
+	setreg($98,$00)
+	setreg($9c,$00) ; proprietary
+	setreg($b0,$32) ; feedback/algorithm
+	setreg($b4,$c0) ; both speakers on
+	setreg($28,$00) ; key off
+	setreg($a4,$22)
+	setreg($a0,$69) ; set frequency
+;
+	ret
+;
+;------------------------------------------------------------------------------
+; Example breakdown of first section, which is initialization
+;------------------------------------------------------------------------------
+;
+;	BYTE	NUMBER OF FRAMES
+;	BYTE	NUMBER OF REGISTER WRITES
+;	BYTE	REGISTER
+;	BYTE	VALUE
+;
+;	CNT	$0D	13 frames
+;		$42	66 register writes (132 BYTES)
+;	2	$30,$71	dac
+;	4	$34,$0D	dac
+;	6	$38,$33	dac
+;	8	$3C,$01	dt1/mul
+;	10	$40,$23 dt1/mul
+;	12	$44,$2D dt1/mul
+;	14	$48,$26 dt1/mul
+;	16	$4C,$00 total level
+;	18	$50,$5F total level
+;	20	$54,$99 total level
+;	22	$58,$5F total level
+;	24	$5C,$94 rs/ar
+;	26	$60,$05 rs/ar
+;	28	$64,$05 rs/ar
+;	30	$68,$05 rs/ar
+;	32	$6C,$07 am/dir
+;	34	$70,$02 am/dir
+;	36	$74,$02 am/dir
+;	38	$78,$02 am/dir
+;	40	$7c,$02 d2r
+;	42	$80,$11 d2r
+;	44	$84,$11 d2r
+;	46	$88,$11 d2r
+;	48	$8C,$A6
+;	50	$90,$00
+;	52	$94,$00
+;	54	$98,$00
+;	56	$9C,$00
+;	58	$B0,$32
+;	60	$B4,$C0
+;	62	$31,$71
+;	64	$35,$0D
+;	66	$39,$33
+;	68	$3D,$01
+;	70	$41,$23
+;	72	$45,$2D
+;	74	$49,$26
+;	76	$4D,$00
+;	78	$51,$5F
+;	80	$55,$99
+;	82	$59,$5F
+;	84	$5D,$94
+;	86	$61,$05
+;	88	$65,$05
+;	90	$69,$05
+;	92	$6D,$07
+;	94	$71,$02
+;	96	$75,$02
+;	98	$79,$02
+;	100	$7D,$02
+;	102	$81,$11
+;	104	$85,$11
+;	106	$89,$11
+;	108	$8D,$A6
+;	110	$91,$00
+;	112	$95,$00
+;	114	$99,$00
+;	116	$9D,$00
+;	118	$B0,$32
+;	120	$B4,$C0
+;	122	$A4,$17
+;	124	$A0,$89
+;	126	$28,$F0
+;	128	$A5,$0F	
+;	130	$A1,$89
+;	132	$28,$F1
+;
+;------------------------------------------------------------------------------
+; Song data created from Music Macro Language (mml) by makebach
+;------------------------------------------------------------------------------
+;
+song:
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+        .db    $02,$01,$28,$01,$02,$01,$28,$00,$08,$06,$A4,$1C,$A0,$3B,$28,$F0
+        .db    $A5,$0D,$A1,$08,$28,$F1,$02,$01,$28,$00,$08,$03,$A4,$1C,$A0,$BF
+        .db    $28,$F0,$02,$01,$28,$00,$06,$03,$A4,$1D,$A0,$08,$28,$F0,$02,$01
+        .db    $28,$01,$02,$01,$28,$00,$1A,$06,$A4,$15,$A0,$A5,$28,$F0,$A5,$0D
+        .db    $A1,$A5,$28,$F1,$04,$02,$28,$00,$28,$01,$1A,$06,$A4,$17,$A0,$1D
+        .db    $28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$04,$02,$28,$00,$28,$01,$1A,$06
+        .db    $A4,$17,$A0,$89,$28,$F0,$A5,$0F,$A1,$89,$28,$F1,$04,$01,$28,$01
+        .db    $1A,$03,$A5,$0D,$A1,$A5,$28,$F1,$04,$01,$28,$01,$12,$03,$A5,$07
+        .db    $A1,$89,$28,$F1,$08,$01,$28,$00,$04,$01,$28,$01,$0D,$06,$A4,$17
+        .db    $A0,$89,$28,$F0,$A5,$0E,$A1,$56,$28,$F1,$02,$01,$28,$00,$0B,$03
+        .db    $A4,$1C,$A0,$3B,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06
+        .db    $A4,$1C,$A0,$BF,$28,$F0,$A5,$0D,$A1,$FB,$28,$F1,$02,$01,$28,$00
+        .db    $0B,$03,$A4,$1C,$A0,$3B,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00
+        .db    $0D,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$0C,$A1,$BF,$28,$F1,$02,$01
+        .db    $28,$00,$0B,$03,$A4,$17,$A0,$1D,$28,$F0,$02,$01,$28,$01,$02,$01
+        .db    $28,$00,$1A,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$0E,$A1,$56,$28,$F1
+        .db    $04,$02,$28,$00,$28,$01,$1A,$06,$A4,$16,$A0,$56,$28,$F0,$A5,$0C
+        .db    $A1,$BF,$28,$F1,$04,$02,$28,$00,$28,$01,$1A,$06,$A4,$16,$A0,$56
+        .db    $28,$F0,$A5,$06,$A1,$56,$28,$F1,$04,$02,$28,$00,$28,$01,$0D,$06
+        .db    $A4,$1F,$A0,$89,$28,$F0,$A5,$0E,$A1,$56,$28,$F1,$02,$01,$28,$00
+        .db    $0B,$03,$A4,$1F,$A0,$1D,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00
+        .db    $0D,$06,$A4,$1E,$A0,$56,$28,$F0,$A5,$0F,$A1,$89,$28,$F1,$02,$01
+        .db    $28,$00,$0B,$03,$A4,$1F,$A0,$89,$28,$F0,$02,$01,$28,$01,$02,$01
+        .db    $28,$00,$0D,$06,$A4,$1F,$A0,$1D,$28,$F0,$A5,$14,$A1,$BF,$28,$F1
+        .db    $02,$01,$28,$00,$0B,$03,$A4,$1E,$A0,$56,$28,$F0,$02,$01,$28,$01
+        .db    $02,$01,$28,$00,$0D,$06,$A4,$1F,$A0,$1D,$28,$F0,$A5,$0C,$A1,$BF
+        .db    $28,$F1,$02,$01,$28,$01,$0B,$03,$A5,$0D,$A1,$FB,$28,$F1,$02,$01
+        .db    $28,$00,$02,$01,$28,$01,$0D,$06,$A4,$1C,$A0,$BF,$28,$F0,$A5,$0F
+        .db    $A1,$1D,$28,$F1,$02,$01,$28,$01,$0B,$03,$A5,$14,$A1,$BF,$28,$F1
+        .db    $02,$01,$28,$00,$02,$01,$28,$01,$0D,$06,$A4,$1C,$A0,$BF,$28,$F0
+        .db    $A5,$0F,$A1,$1D,$28,$F1,$02,$01,$28,$01,$0B,$03,$A5,$0D,$A1,$FB
+        .db    $28,$F1,$02,$01,$28,$00,$02,$01,$28,$01,$0D,$06,$A4,$1F,$A0,$89
+        .db    $28,$F0,$A5,$0E,$A1,$56,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1F
+        .db    $A0,$1D,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1E
+        .db    $A0,$56,$28,$F0,$A5,$0F,$A1,$89,$28,$F1,$02,$01,$28,$00,$0B,$03
+        .db    $A4,$1F,$A0,$89,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06
+        .db    $A4,$1F,$A0,$1D,$28,$F0,$A5,$14,$A1,$BF,$28,$F1,$02,$01,$28,$00
+        .db    $0B,$03,$A4,$1E,$A0,$56,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00
+        .db    $1A,$06,$A4,$1F,$A0,$1D,$28,$F0,$A5,$0C,$A1,$BF,$28,$F1,$04,$02
+        .db    $28,$00,$28,$01,$1A,$06,$A4,$1C,$A0,$BF,$28,$F0,$A5,$14,$A1,$3B
+        .db    $28,$F1,$04,$02,$28,$00,$28,$01,$1A,$06,$A4,$1E,$A0,$56,$28,$F0
+        .db    $A5,$0F,$A1,$89,$28,$F1,$04,$02,$28,$00,$28,$01,$08,$06,$A4,$1F
+        .db    $A0,$1D,$28,$F0,$A5,$14,$A1,$3B,$28,$F1,$02,$01,$28,$00,$08,$03
+        .db    $A4,$1F,$A0,$89,$28,$F0,$02,$01,$28,$00,$06,$03,$A4,$24,$A0,$3B
+        .db    $28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$1A,$06,$A4,$1C,$A0,$BF
+        .db    $28,$F0,$A5,$14,$A1,$BF,$28,$F1,$04,$02,$28,$00,$28,$01,$1A,$06
+        .db    $A4,$1D,$A0,$FB,$28,$F0,$A5,$0C,$A1,$BF,$28,$F1,$04,$02,$28,$00
+        .db    $28,$01,$1A,$06,$A4,$1E,$A0,$56,$28,$F0,$A5,$0E,$A1,$56,$28,$F1
+        .db    $04,$01,$28,$00,$0D,$03,$A4,$1D,$A0,$FB,$28,$F0,$02,$01,$28,$00
+        .db    $0D,$03,$A4,$1E,$A0,$56,$28,$F0,$02,$01,$28,$00,$12,$03,$A4,$1F
+        .db    $A0,$1D,$28,$F0,$08,$01,$28,$01,$04,$01,$28,$00,$1A,$06,$A4,$1F
+        .db    $A0,$89,$28,$F0,$A5,$0C,$A1,$BF,$28,$F1,$04,$02,$28,$00,$28,$01
+        .db    $0D,$06,$A4,$1F,$A0,$89,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$02,$01
+        .db    $28,$00,$0B,$03,$A4,$1F,$A0,$1D,$28,$F0,$02,$01,$28,$01,$02,$01
+        .db    $28,$00,$0D,$06,$A4,$1E,$A0,$56,$28,$F0,$A5,$0F,$A1,$89,$28,$F1
+        .db    $02,$01,$28,$00,$0B,$03,$A4,$1D,$A0,$A5,$28,$F0,$02,$01,$28,$01
+        .db    $02,$01,$28,$00,$1A,$06,$A4,$1E,$A0,$56,$28,$F0,$A5,$0D,$A1,$08
+        .db    $28,$F1,$04,$02,$28,$00,$28,$01,$0D,$06,$A4,$1E,$A0,$56,$28,$F0
+        .db    $A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1D,$A0,$A5
+        .db    $28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1D,$A0,$08
+        .db    $28,$F0,$A5,$0E,$A1,$56,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1C
+        .db    $A0,$BF,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$1A,$06,$A4,$1D
+        .db    $A0,$08,$28,$F0,$A5,$0C,$A1,$3B,$28,$F1,$04,$02,$28,$00,$28,$01
+        .db    $0D,$06,$A4,$1D,$A0,$08,$28,$F0,$A5,$0C,$A1,$BF,$28,$F1,$02,$01
+        .db    $28,$00,$0B,$03,$A4,$1C,$A0,$BF,$28,$F0,$02,$01,$28,$01,$02,$01
+        .db    $28,$00,$0D,$06,$A4,$1C,$A0,$3B,$28,$F0,$A5,$0D,$A1,$08,$28,$F1
+        .db    $02,$01,$28,$00,$0B,$03,$A4,$17,$A0,$89,$28,$F0,$02,$01,$28,$01
+        .db    $02,$01,$28,$00,$1A,$06,$A4,$17,$A0,$1D,$28,$F0,$A5,$0D,$A1,$A5
+        .db    $28,$F1,$04,$02,$28,$00,$28,$01,$0D,$06,$A4,$16,$A0,$56,$28,$F0
+        .db    $A5,$0C,$A1,$3B,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$17,$A0,$1D
+        .db    $28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$1A,$06,$A4,$15,$A0,$A5
+        .db    $28,$F0,$A5,$05,$A1,$A5,$28,$F1,$04,$02,$28,$00,$28,$01,$0D,$06
+        .db    $A4,$1C,$A0,$3B,$28,$F0,$A5,$0F,$A1,$1D,$28,$F1,$02,$01,$28,$01
+        .db    $0B,$03,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00,$02,$01,$28,$01
+        .db    $0D,$06,$A4,$15,$A0,$A5,$28,$F0,$A5,$0F,$A1,$1D,$28,$F1,$02,$01
+        .db    $28,$01,$0B,$03,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00,$02,$01
+        .db    $28,$01,$0D,$06,$A4,$15,$A0,$A5,$28,$F0,$A5,$0F,$A1,$1D,$28,$F1
+        .db    $02,$01,$28,$01,$0B,$03,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00
+        .db    $02,$01,$28,$01,$0D,$06,$A4,$1C,$A0,$BF,$28,$F0,$A5,$0F,$A1,$89
+        .db    $28,$F1,$02,$01,$28,$01,$0B,$03,$A5,$0D,$A1,$A5,$28,$F1,$02,$01
+        .db    $28,$00,$02,$01,$28,$01,$0D,$06,$A4,$15,$A0,$A5,$28,$F0,$A5,$0F
+        .db    $A1,$89,$28,$F1,$02,$01,$28,$01,$0B,$03,$A5,$0D,$A1,$A5,$28,$F1
+        .db    $02,$01,$28,$00,$02,$01,$28,$01,$0D,$06,$A4,$15,$A0,$A5,$28,$F0
+        .db    $A5,$0F,$A1,$89,$28,$F1,$02,$01,$28,$01,$0B,$03,$A5,$0D,$A1,$A5
+        .db    $28,$F1,$02,$01,$28,$00,$02,$01,$28,$01,$1A,$06,$A4,$1D,$A0,$08
+        .db    $28,$F0,$A5,$0F,$A1,$1D,$28,$F1,$04,$02,$28,$00,$28,$01,$0D,$06
+        .db    $A4,$1D,$A0,$A5,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00
+        .db    $0B,$03,$A4,$1D,$A0,$08,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00
+        .db    $0D,$06,$A4,$1C,$A0,$BF,$28,$F0,$A5,$0F,$A1,$89,$28,$F1,$02,$01
+        .db    $28,$00,$0B,$03,$A4,$1D,$A0,$08,$28,$F0,$02,$01,$28,$01,$02,$01
+        .db    $28,$00,$0D,$06,$A4,$1C,$A0,$3B,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1
+        .db    $02,$01,$28,$01,$0D,$03,$A5,$0E,$A1,$56,$28,$F1,$02,$01,$28,$01
+        .db    $0D,$03,$A5,$0F,$A1,$1D,$28,$F1,$02,$01,$28,$01,$0D,$03,$A5,$0D
+        .db    $A1,$A5,$28,$F1,$02,$01,$28,$01,$0D,$03,$A5,$0E,$A1,$56,$28,$F1
+        .db    $02,$01,$28,$01,$03,$03,$A5,$0F,$A1,$1D,$28,$F1,$0A,$01,$28,$00
+        .db    $02,$01,$28,$01,$0D,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$0F,$A1,$89
+        .db    $28,$F1,$02,$01,$28,$00,$0D,$03,$A4,$1C,$A0,$BF,$28,$F0,$02,$01
+        .db    $28,$00,$0D,$03,$A4,$1D,$A0,$A5,$28,$F0,$02,$01,$28,$00,$07,$03
+        .db    $A4,$1F,$A0,$89,$28,$F0,$06,$01,$28,$01,$02,$01,$28,$00,$0D,$06
+        .db    $A4,$1C,$A0,$3B,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00
+        .db    $0B,$03,$A4,$1F,$A0,$1D,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00
+        .db    $0D,$06,$A4,$1F,$A0,$89,$28,$F0,$A5,$07,$A1,$89,$28,$F1,$02,$01
+        .db    $28,$01,$0B,$03,$A5,$0C,$A1,$BF,$28,$F1,$02,$01,$28,$00,$02,$01
+        .db    $28,$01,$0D,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1
+        .db    $02,$01,$28,$01,$0B,$03,$A5,$0F,$A1,$89,$28,$F1,$02,$01,$28,$00
+        .db    $02,$01,$28,$01,$0D,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$0D,$A1,$A5
+        .db    $28,$F1,$02,$01,$28,$01,$0B,$03,$A5,$0C,$A1,$BF,$28,$F1,$02,$01
+        .db    $28,$00,$02,$01,$28,$01,$0D,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$07
+        .db    $A1,$89,$28,$F1,$02,$01,$28,$00,$0D,$03,$A4,$1C,$A0,$BF,$28,$F0
+        .db    $02,$01,$28,$00,$0D,$03,$A4,$1D,$A0,$A5,$28,$F0,$02,$01,$28,$00
+        .db    $07,$03,$A4,$1F,$A0,$89,$28,$F0,$06,$01,$28,$01,$02,$01,$28,$00
+        .db    $0D,$06,$A4,$1C,$A0,$3B,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$02,$01
+        .db    $28,$00,$0B,$03,$A4,$1F,$A0,$1D,$28,$F0,$02,$01,$28,$01,$02,$01
+        .db    $28,$00,$0D,$06,$A4,$1F,$A0,$89,$28,$F0,$A5,$07,$A1,$89,$28,$F1
+        .db    $02,$01,$28,$01,$0B,$03,$A5,$0C,$A1,$BF,$28,$F1,$02,$01,$28,$00
+        .db    $02,$01,$28,$01,$0D,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$0D,$A1,$A5
+        .db    $28,$F1,$02,$01,$28,$01,$0B,$03,$A5,$0F,$A1,$89,$28,$F1,$02,$01
+        .db    $28,$00,$02,$01,$28,$01,$0D,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$0D
+        .db    $A1,$A5,$28,$F1,$02,$01,$28,$01,$0B,$03,$A5,$0C,$A1,$BF,$28,$F1
+        .db    $02,$01,$28,$00,$02,$01,$28,$01,$1A,$06,$A4,$1E,$A0,$56,$28,$F0
+        .db    $A5,$0D,$A1,$08,$28,$F1,$04,$02,$28,$00,$28,$01,$0D,$06,$A4,$1D
+        .db    $A0,$A5,$28,$F0,$A5,$0E,$A1,$56,$28,$F1,$02,$01,$28,$00,$0B,$03
+        .db    $A4,$1D,$A0,$08,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06
+        .db    $A4,$1C,$A0,$BF,$28,$F0,$A5,$0F,$A1,$89,$28,$F1,$02,$01,$28,$00
+        .db    $0B,$03,$A4,$1C,$A0,$3B,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00
+        .db    $1A,$06,$A4,$1D,$A0,$A5,$28,$F0,$A5,$0C,$A1,$BF,$28,$F1,$04,$02
+        .db    $28,$00,$28,$01,$0D,$06,$A4,$1D,$A0,$08,$28,$F0,$A5,$0D,$A1,$A5
+        .db    $28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1C,$A0,$BF,$28,$F0,$02,$01
+        .db    $28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1C,$A0,$3B,$28,$F0,$A5,$0F
+        .db    $A1,$89,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$17,$A0,$89,$28,$F0
+        .db    $02,$01,$28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1C,$A0,$3B,$28,$F0
+        .db    $A5,$0D,$A1,$08,$28,$F1,$02,$01,$28,$00,$0D,$03,$A4,$1C,$A0,$BF
+        .db    $28,$F0,$02,$01,$28,$00,$16,$03,$A4,$15,$A0,$A5,$28,$F0,$04,$01
+        .db    $28,$01,$04,$01,$28,$00,$1A,$06,$A4,$17,$A0,$1D,$28,$F0,$A5,$0D
+        .db    $A1,$A5,$28,$F1,$04,$02,$28,$00,$28,$01,$1A,$06,$A4,$17,$A0,$89
+        .db    $28,$F0,$A5,$0F,$A1,$89,$28,$F1,$04,$01,$28,$01,$1A,$03,$A5,$0D
+        .db    $A1,$A5,$28,$F1,$04,$01,$28,$01,$12,$03,$A5,$07,$A1,$89,$28,$F1
+        .db    $08,$01,$28,$00,$04,$01,$28,$01,$0D,$06,$A4,$17,$A0,$89,$28,$F0
+        .db    $A5,$0E,$A1,$56,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1C,$A0,$3B
+        .db    $28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1C,$A0,$BF
+        .db    $28,$F0,$A5,$0D,$A1,$FB,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1C
+        .db    $A0,$3B,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06,$A4,$17
+        .db    $A0,$89,$28,$F0,$A5,$0C,$A1,$BF,$28,$F1,$02,$01,$28,$00,$0B,$03
+        .db    $A4,$17,$A0,$1D,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$1A,$06
+        .db    $A4,$17,$A0,$89,$28,$F0,$A5,$0E,$A1,$56,$28,$F1,$04,$02,$28,$00
+        .db    $28,$01,$1A,$06,$A4,$16,$A0,$56,$28,$F0,$A5,$0C,$A1,$BF,$28,$F1
+        .db    $04,$02,$28,$00,$28,$01,$1A,$06,$A4,$16,$A0,$56,$28,$F0,$A5,$06
+        .db    $A1,$56,$28,$F1,$04,$02,$28,$00,$28,$01,$0D,$06,$A4,$1F,$A0,$89
+        .db    $28,$F0,$A5,$0E,$A1,$56,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1F
+        .db    $A0,$1D,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1E
+        .db    $A0,$56,$28,$F0,$A5,$0F,$A1,$89,$28,$F1,$02,$01,$28,$00,$0B,$03
+        .db    $A4,$1F,$A0,$89,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06
+        .db    $A4,$1F,$A0,$1D,$28,$F0,$A5,$14,$A1,$BF,$28,$F1,$02,$01,$28,$00
+        .db    $0B,$03,$A4,$1E,$A0,$56,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00
+        .db    $0D,$06,$A4,$1F,$A0,$1D,$28,$F0,$A5,$0C,$A1,$BF,$28,$F1,$02,$01
+        .db    $28,$01,$0B,$03,$A5,$0D,$A1,$FB,$28,$F1,$02,$01,$28,$00,$02,$01
+        .db    $28,$01,$0D,$06,$A4,$1C,$A0,$BF,$28,$F0,$A5,$0F,$A1,$1D,$28,$F1
+        .db    $02,$01,$28,$01,$0B,$03,$A5,$14,$A1,$BF,$28,$F1,$02,$01,$28,$00
+        .db    $02,$01,$28,$01,$0D,$06,$A4,$1C,$A0,$BF,$28,$F0,$A5,$0F,$A1,$1D
+        .db    $28,$F1,$02,$01,$28,$01,$0B,$03,$A5,$0D,$A1,$FB,$28,$F1,$02,$01
+        .db    $28,$00,$02,$01,$28,$01,$0D,$06,$A4,$1F,$A0,$89,$28,$F0,$A5,$0E
+        .db    $A1,$56,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1F,$A0,$1D,$28,$F0
+        .db    $02,$01,$28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1E,$A0,$56,$28,$F0
+        .db    $A5,$0F,$A1,$89,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1F,$A0,$89
+        .db    $28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1F,$A0,$1D
+        .db    $28,$F0,$A5,$14,$A1,$BF,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1E
+        .db    $A0,$56,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$1A,$06,$A4,$1F
+        .db    $A0,$1D,$28,$F0,$A5,$0C,$A1,$BF,$28,$F1,$04,$02,$28,$00,$28,$01
+        .db    $1A,$06,$A4,$1C,$A0,$BF,$28,$F0,$A5,$14,$A1,$3B,$28,$F1,$04,$02
+        .db    $28,$00,$28,$01,$1A,$06,$A4,$1E,$A0,$56,$28,$F0,$A5,$0F,$A1,$89
+        .db    $28,$F1,$04,$02,$28,$00,$28,$01,$08,$06,$A4,$1F,$A0,$1D,$28,$F0
+        .db    $A5,$14,$A1,$3B,$28,$F1,$02,$01,$28,$00,$08,$03,$A4,$1F,$A0,$89
+        .db    $28,$F0,$02,$01,$28,$00,$06,$03,$A4,$24,$A0,$3B,$28,$F0,$02,$01
+        .db    $28,$01,$02,$01,$28,$00,$1A,$06,$A4,$1C,$A0,$BF,$28,$F0,$A5,$14
+        .db    $A1,$BF,$28,$F1,$04,$02,$28,$00,$28,$01,$1A,$06,$A4,$1D,$A0,$FB
+        .db    $28,$F0,$A5,$0C,$A1,$BF,$28,$F1,$04,$02,$28,$00,$28,$01,$1A,$06
+        .db    $A4,$1E,$A0,$56,$28,$F0,$A5,$0E,$A1,$56,$28,$F1,$04,$01,$28,$00
+        .db    $0D,$03,$A4,$1D,$A0,$FB,$28,$F0,$02,$01,$28,$00,$0D,$03,$A4,$1E
+        .db    $A0,$56,$28,$F0,$02,$01,$28,$00,$12,$03,$A4,$1F,$A0,$1D,$28,$F0
+        .db    $08,$01,$28,$01,$04,$01,$28,$00,$1A,$06,$A4,$1F,$A0,$89,$28,$F0
+        .db    $A5,$0C,$A1,$BF,$28,$F1,$04,$02,$28,$00,$28,$01,$0D,$06,$A4,$1F
+        .db    $A0,$89,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00,$0B,$03
+        .db    $A4,$1F,$A0,$1D,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06
+        .db    $A4,$1E,$A0,$56,$28,$F0,$A5,$0F,$A1,$89,$28,$F1,$02,$01,$28,$00
+        .db    $0B,$03,$A4,$1D,$A0,$A5,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00
+        .db    $1A,$06,$A4,$1E,$A0,$56,$28,$F0,$A5,$0D,$A1,$08,$28,$F1,$04,$02
+        .db    $28,$00,$28,$01,$0D,$06,$A4,$1E,$A0,$56,$28,$F0,$A5,$0D,$A1,$A5
+        .db    $28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1D,$A0,$A5,$28,$F0,$02,$01
+        .db    $28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1D,$A0,$08,$28,$F0,$A5,$0E
+        .db    $A1,$56,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1C,$A0,$BF,$28,$F0
+        .db    $02,$01,$28,$01,$02,$01,$28,$00,$1A,$06,$A4,$1D,$A0,$08,$28,$F0
+        .db    $A5,$0C,$A1,$3B,$28,$F1,$04,$02,$28,$00,$28,$01,$0D,$06,$A4,$1D
+        .db    $A0,$08,$28,$F0,$A5,$0C,$A1,$BF,$28,$F1,$02,$01,$28,$00,$0B,$03
+        .db    $A4,$1C,$A0,$BF,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06
+        .db    $A4,$1C,$A0,$3B,$28,$F0,$A5,$0D,$A1,$08,$28,$F1,$02,$01,$28,$00
+        .db    $0B,$03,$A4,$17,$A0,$89,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00
+        .db    $1A,$06,$A4,$17,$A0,$1D,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$04,$02
+        .db    $28,$00,$28,$01,$0D,$06,$A4,$16,$A0,$56,$28,$F0,$A5,$0C,$A1,$3B
+        .db    $28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$17,$A0,$1D,$28,$F0,$02,$01
+        .db    $28,$01,$02,$01,$28,$00,$1A,$06,$A4,$15,$A0,$A5,$28,$F0,$A5,$05
+        .db    $A1,$A5,$28,$F1,$04,$02,$28,$00,$28,$01,$0D,$06,$A4,$1C,$A0,$3B
+        .db    $28,$F0,$A5,$0F,$A1,$1D,$28,$F1,$02,$01,$28,$01,$0B,$03,$A5,$0D
+        .db    $A1,$A5,$28,$F1,$02,$01,$28,$00,$02,$01,$28,$01,$0D,$06,$A4,$15
+        .db    $A0,$A5,$28,$F0,$A5,$0F,$A1,$1D,$28,$F1,$02,$01,$28,$01,$0B,$03
+        .db    $A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00,$02,$01,$28,$01,$0D,$06
+        .db    $A4,$15,$A0,$A5,$28,$F0,$A5,$0F,$A1,$1D,$28,$F1,$02,$01,$28,$01
+        .db    $0B,$03,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00,$02,$01,$28,$01
+        .db    $0D,$06,$A4,$1C,$A0,$BF,$28,$F0,$A5,$0F,$A1,$89,$28,$F1,$02,$01
+        .db    $28,$01,$0B,$03,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00,$02,$01
+        .db    $28,$01,$0D,$06,$A4,$15,$A0,$A5,$28,$F0,$A5,$0F,$A1,$89,$28,$F1
+        .db    $02,$01,$28,$01,$0B,$03,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00
+        .db    $02,$01,$28,$01,$0D,$06,$A4,$15,$A0,$A5,$28,$F0,$A5,$0F,$A1,$89
+        .db    $28,$F1,$02,$01,$28,$01,$0B,$03,$A5,$0D,$A1,$A5,$28,$F1,$02,$01
+        .db    $28,$00,$02,$01,$28,$01,$1A,$06,$A4,$1D,$A0,$08,$28,$F0,$A5,$0F
+        .db    $A1,$1D,$28,$F1,$04,$02,$28,$00,$28,$01,$0D,$06,$A4,$1D,$A0,$A5
+        .db    $28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1D
+        .db    $A0,$08,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1C
+        .db    $A0,$BF,$28,$F0,$A5,$0F,$A1,$89,$28,$F1,$02,$01,$28,$00,$0B,$03
+        .db    $A4,$1D,$A0,$08,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06
+        .db    $A4,$1C,$A0,$3B,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$01
+        .db    $0D,$03,$A5,$0E,$A1,$56,$28,$F1,$02,$01,$28,$01,$0D,$03,$A5,$0F
+        .db    $A1,$1D,$28,$F1,$02,$01,$28,$01,$0D,$03,$A5,$0D,$A1,$A5,$28,$F1
+        .db    $02,$01,$28,$01,$0D,$03,$A5,$0E,$A1,$56,$28,$F1,$02,$01,$28,$01
+        .db    $03,$03,$A5,$0F,$A1,$1D,$28,$F1,$0A,$01,$28,$00,$02,$01,$28,$01
+        .db    $0D,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$0F,$A1,$89,$28,$F1,$02,$01
+        .db    $28,$00,$0D,$03,$A4,$1C,$A0,$BF,$28,$F0,$02,$01,$28,$00,$0D,$03
+        .db    $A4,$1D,$A0,$A5,$28,$F0,$02,$01,$28,$00,$07,$03,$A4,$1F,$A0,$89
+        .db    $28,$F0,$06,$01,$28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1C,$A0,$3B
+        .db    $28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1F
+        .db    $A0,$1D,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1F
+        .db    $A0,$89,$28,$F0,$A5,$07,$A1,$89,$28,$F1,$02,$01,$28,$01,$0B,$03
+        .db    $A5,$0C,$A1,$BF,$28,$F1,$02,$01,$28,$00,$02,$01,$28,$01,$0D,$06
+        .db    $A4,$17,$A0,$89,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$01
+        .db    $0B,$03,$A5,$0F,$A1,$89,$28,$F1,$02,$01,$28,$00,$02,$01,$28,$01
+        .db    $0D,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$02,$01
+        .db    $28,$01,$0B,$03,$A5,$0C,$A1,$BF,$28,$F1,$02,$01,$28,$00,$02,$01
+        .db    $28,$01,$0D,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$07,$A1,$89,$28,$F1
+        .db    $02,$01,$28,$00,$0D,$03,$A4,$1C,$A0,$BF,$28,$F0,$02,$01,$28,$00
+        .db    $0D,$03,$A4,$1D,$A0,$A5,$28,$F0,$02,$01,$28,$00,$07,$03,$A4,$1F
+        .db    $A0,$89,$28,$F0,$06,$01,$28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1C
+        .db    $A0,$3B,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$02,$01,$28,$00,$0B,$03
+        .db    $A4,$1F,$A0,$1D,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06
+        .db    $A4,$1F,$A0,$89,$28,$F0,$A5,$07,$A1,$89,$28,$F1,$02,$01,$28,$01
+        .db    $0B,$03,$A5,$0C,$A1,$BF,$28,$F1,$02,$01,$28,$00,$02,$01,$28,$01
+        .db    $0D,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$02,$01
+        .db    $28,$01,$0B,$03,$A5,$0F,$A1,$89,$28,$F1,$02,$01,$28,$00,$02,$01
+        .db    $28,$01,$0D,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1
+        .db    $02,$01,$28,$01,$0B,$03,$A5,$0C,$A1,$BF,$28,$F1,$02,$01,$28,$00
+        .db    $02,$01,$28,$01,$1A,$06,$A4,$1E,$A0,$56,$28,$F0,$A5,$0D,$A1,$08
+        .db    $28,$F1,$04,$02,$28,$00,$28,$01,$0D,$06,$A4,$1D,$A0,$A5,$28,$F0
+        .db    $A5,$0E,$A1,$56,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1D,$A0,$08
+        .db    $28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$0D,$06,$A4,$1C,$A0,$BF
+        .db    $28,$F0,$A5,$0F,$A1,$89,$28,$F1,$02,$01,$28,$00,$0B,$03,$A4,$1C
+        .db    $A0,$3B,$28,$F0,$02,$01,$28,$01,$02,$01,$28,$00,$1A,$06,$A4,$1D
+        .db    $A0,$A5,$28,$F0,$A5,$0C,$A1,$BF,$28,$F1,$04,$02,$28,$00,$28,$01
+        .db    $0D,$06,$A4,$1D,$A0,$08,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1,$02,$01
+        .db    $28,$00,$0B,$03,$A4,$1C,$A0,$BF,$28,$F0,$02,$01,$28,$01,$02,$01
+        .db    $28,$00,$0D,$06,$A4,$1C,$A0,$3B,$28,$F0,$A5,$0F,$A1,$89,$28,$F1
+        .db    $02,$01,$28,$00,$0B,$03,$A4,$17,$A0,$89,$28,$F0,$02,$01,$28,$01
+        .db    $02,$01,$28,$00,$0D,$06,$A4,$1C,$A0,$3B,$28,$F0,$A5,$0D,$A1,$08
+        .db    $28,$F1,$02,$01,$28,$00,$0D,$03,$A4,$1C,$A0,$BF,$28,$F0,$02,$01
+        .db    $28,$00,$16,$03,$A4,$15,$A0,$A5,$28,$F0,$04,$01,$28,$01,$04,$01
+        .db    $28,$00,$1A,$06,$A4,$17,$A0,$1D,$28,$F0,$A5,$0D,$A1,$A5,$28,$F1
+        .db    $04,$02,$28,$00,$28,$01,$1A,$06,$A4,$17,$A0,$89,$28,$F0,$A5,$0F
+        .db    $A1,$89,$28,$F1,$04,$01,$28,$01,$1A,$03,$A5,$0D,$A1,$A5,$28,$F1
+        .db    $04,$01,$28,$01,$12,$03,$A5,$07,$A1,$89,$28,$F1,$08,$01,$28,$00
+        .db    $04,$01,$28,$01,$00
+        ;; 7045 bytes in song
+
+#include "printing.inc"
+
+	.end

Source/Doc/Architecture.md

@@ -30,6 +30,8 @@ RomWBW firmware includes:
 * HBIOS (Hardware BIOS) providing support for the vast majority of
 RetroBrew Computers I/O components
 
+* Diagnostics and customizable debugging information.
+
 * A complete operating system (either CP/M 2.2 or ZSDOS 1.1)
 
 * A built-in CP/M filesystem containing the basic applications and
@@ -919,7 +921,7 @@ device number assigned by the driver.
 Each RTC device is handled by an appropriate driver (DSRTC, BQRTC,
 etc.) which is identified by a device type id from the table below.
 
-**Type ID** | **Disk Device Type**
+**Type ID** | **RTC Device Type**
 ----------- | --------------------
 0x00        | DS1302
 0x10        | BQ4845P
@@ -1396,7 +1398,7 @@ Increase by steps of 4 to select the next corresponding note.
 Increase by steps of 48 to select the same note in next octave.
 
 If the driver is able to generate the requested note, a success (0) is
-returned, otherwise a non-zero error state will be returned.
+returned, otherwise a non-zero error value will be returned.
 
 The sound chip resolution and its oscillator limit the range and
 accuracy of the notes played. The typical range of the AY-3-8910
@@ -1441,7 +1443,7 @@ the following HBIOS calls would need to be made:
 
 ```
 HBIOS B=51 C=00 L=80      ; Set volume to half level
-HBIOS B=53 C=00 L=69      ; Select Middle C (C4) assuming SN76489
+HBIOS B=53 C=00 HL=152    ; Select Middle C (C4)
 HBIOS B=54 C=00 D=01      ; Play note on Channel 1
 ```
 
@@ -1516,6 +1518,8 @@ AUDIO ID       | Value | Device     | Returned registers
 SND_SN76489    | 0x01  | SN76489    | E: Left channel port, L: Right channel port
 SND_AY38910    | 0x02  | AY-3-8910  | D: Address port, E: Data port
 SND_BITMODE    | 0x03  | I/O PORT   | D: Address port, E: Bit mask
+SND_YM2612     | 0x04  | YM2612     | D: Part 0 Address port, E: Part 0 Data port
+               |       |            | H: Part 1 Address port, L: Part 1 Data port
 
 ### Function 0x56 -- Sound Duration (SNDDUR)
 
@@ -1545,10 +1549,10 @@ and then return.
 
 | _Exit Results_
 |       A: Status (0=OK, else error)
-|       D: Serial Device Type
-|       E: Serial Device Number
-|       H: Serial Device Unit Mode
-|       L: Serial Device Unit I/O Base Address
+|       D: Sound Device Type
+|       E: Sound Device Number
+|       H: Sound Device Unit Mode
+|       L: Sound Device Unit I/O Base Address
 
 Reports information about the sound device unit specified.  Register D
 indicates the device type (driver) and register E indicates the physical
@@ -1563,6 +1567,7 @@ _Id_ | _Device Type / Driver_
 0x00 | SN76489
 0x10 | AY38910
 0x20 | BITMODE
+0x30 | YM2612
 
 `\clearpage`{=latex}
 
@@ -2166,7 +2171,7 @@ IM1, the size of the table is the number of vectors chained together.
 For IM2, the size of the table is the number of slots in the vector
 table.
 
-#### SYSINT Subfunction 0x10) -- Get Interrupt (INTGET)
+#### SYSINT Subfunction 0x10 -- Get Interrupt (INTGET)
 
 |      _Entry Parameters_
 |           BC: 0xFC10
@@ -2180,7 +2185,7 @@ On entry, register E must contain an index into the interrupt vector
 table. On return, HL will contain the address of the current interrupt
 vector at the specified index.
 
-#### SYSINT Subfunction 0x20) -- Set Interrupt (INTSET)
+#### SYSINT Subfunction 0x20 -- Set Interrupt (INTSET)
 
 |      _Entry Parameters_
 |           BC: 0xFC20
@@ -2198,6 +2203,173 @@ be inserted in the table at the index. On return, HL will contain the
 previous address in the table at the index.
 
 
+`\clearpage`{=latex}
+
+
+Errors and diagnostics
+========
+
+ROMWBW tries to provide useful information when a run time or build time
+error occurs. Many sections of the code also have code blocks that can be 
+enable to aid in debugging and in some cases the level of reporting detail
+can be customized.
+
+Run time errors
+--------
+
+### PANIC
+
+A panic error indicates a non-recoverable error. The processor status is displayed on the console
+and interrupts are disabled and execution is halted. A cold boot or reset is required to restart.
+
+Example error message: 
+
+\>>> PANIC: @06C4[DFA3:DFC3:0100:F103:04FC:0000:2B5E] 
+
+\*** System Halted ***
+
+The format of the information provided is 
+
+@XXXX [-AF-:-BC-:-DE-:-HL-:-SP-:-IX-:-IY-]
+
+Where @XXXX is the address the panic was called from. The other information
+is the CPU register contents.
+
+Possible reasons a PANIC may occur are:
+
+- RAM Bank range error when attempting a read or write to a RAM disk.
+- Sector read function has not been setup but a read was attempted.
+- An interrupt vector has not been set up when an interrupt was received.
+- There was an attempt to add more devices than the device table had room for.
+- An illegal SD card command was encountered.
+
+The @XXXX memory address can be cross referenced with the build source code to identify
+which section of the software or hardware caused the fault.
+
+### SYSCHK 
+
+A syschk error is identified when an internal error is detected. When this 
+occurs an error code is returned to the calling program in the A register.
+A non-zero result indicates an error.
+
+Syschk errors may be reported to the console. Whether this occurs depends on 
+the value of the diagnosis level equate DIAGLVL. By default syschk errors
+are not reported to the console.
+
+If the diagnosis level is set to display the diagnosis information, then
+memory address, register dump and error code is displayed.
+A key differance with the PANIC error is that execution may be continued. 
+
+Example error message:
+
+\>>> SYSCHK: @06C4[DFA3:DFC3:0100:F103:04FC:0000:2B5E] FD
+Continue (Y/N)
+
+The format of the information provided is similar the PANIC report.
+
+@XXXX [-AF-:-BC-:-DE-:-HL-:-SP-:-IX-:-IY-] YY
+
+The syschk error codes YY is returned in the A register.
+
+| Error                               | Code YY  |
+| ----------------------------------- | -------- |
+| Success                             |   0x00   | 
+| Undefined Error                     |   0xFF   | 
+| Function Not Implemented            |   0xFE   | 
+| Invalid Function                    |   0xFD   | 
+| Invalid Unit Number                 |   0xFC   | 
+| Out Of Memory                       |   0xFB   | 
+| Parameter Out Of Range              |   0xFA   | 
+| Media Not Present                   |   0xF9   | 
+| Hardware Not Present                |   0xF8   | 
+| I/O Error                           |   0xF7   | 
+| Write Request To Read-Only Media    |   0xF6   | 
+| Device Timeout                      |   0xF5   | 
+| Invalid Configuration               |   0xF4   | 
+| Internal Error                      |   0xF3   | 
+
+### Error Level reporting
+
+placeholder
+
+Build time errors
+--------
+
+### Build chain tool errors
+
+place holder
+
+### Assembly time check errors
+
+placeholder
+
+Diagnostics
+--------
+
+### DIAG
+
+Progress through the boot and initialization process can be difficult to monitor 
+due to the lack of console or video output. Access to these output devices does
+not become available until late the in the boot process. If these output devices 
+are also involved with the issue trying to be resolved then trouble shooting is 
+even more difficult.
+
+ROMWBW can be configured to display boot progress with the assistance of additional 
+hardware. This take the form of an LED breakout debugging board connected to an
+8-bit output port. As the boot code executes, the LED output display is updated.
+
+To use a LED breakout board, it must be connected the computers data, reset and port
+select lines.
+
+To enable the DIAG option the following settings must be made in the systems .ini
+configuration file, where 0xnn is the port address.
+
+DIAGENABLE .SET TRUE
+DIAGPORT   .SET 0xnn
+
+The following table shows the ROMWBW process steps in relation to the LED display.
+
+|   LED    | ROMWBW Processes                               |
+| -------- |:---------------------------------------------- |
+| `........` | Initial boot                                 |
+|          | Jump to start address                          |
+|          | Disable interrupts                             |
+|          | Set interrupt mode 1                           |
+|          | Initialize critical ports and initial speed    |
+| `.......O` |  Setup initial stack                         |
+|          | Memory manager and CPU configuration           |
+|          | Set top bank to be RAM                         |
+| `......OO` |  Get and save battery condition              |
+|          | Install HBIOS proxy in upper memory            |
+|          | If platform is MBC reconfigure memory manager  |
+|          | Setup "ROMLESS" HBIOS image or ...             |
+|          | Copy HBIOS from ROM to RAM if RAM flag not set |
+|          | Jump to HBIOS in RAM                           |
+|          | Set running in RAM flag                        |
+|  `.....OOO` | Finalize configuration for running in RAM   |
+|          | Check battery condition                        |
+|          | Check for recovery mode boot                   |
+| `....OOOO` | Identify CPU type                            |
+| `...OOOOO` | Set cpu oscillator speed                     |
+|          | Setup counter-timers                           |
+|          | Setup heap                                     |
+| `..OOOOOO` | Preconsole initialization                    |
+| `.OOOOOOO` | Boot delay                                   |
+|          | Set boot console device                        |
+|          | Bios announcement                              |
+| `OOOOOOOO` | Display platform information                 |
+|          | Display memory configuration                   |
+|          | Display CPU family                             |
+|          | Verify ROM checksum                            |
+|          | Report battery condition                       |
+|          | Perform device driver initialization           |
+|          | Report watchdog status                         |
+|          | Mark HBIOS heap so it is preserved             |
+|          | Switch from boot console to CRT if active      |
+|          | Display device summary                         |
+|          | Execute boot loader                            |
+
+
 `\clearpage`{=latex}
 
 ### Appendix A Driver Instance Data fields
@@ -2229,3 +2401,5 @@ The following section outlines the read only data referenced by the
 | DCNTL* | 14 | 1  | Z180 DMA/WAIT CONTROL |
 
 * ONLY PRESENT FOR Z180 BUILDS
+
+

Source/Doc/GettingStarted.md

@@ -272,28 +272,22 @@ be VDU type devices or serial devices. If you want to change which
 device is the console, the ***I*** menu option can be used to choose
 the unit and it's speed.
 
-The command format is ```I <u> [<c>]``` 
+The command format is ```I <u> [<b>]``` 
 
-where ***u*** is unit to select and ***c*** is the optional baud rate code as listed below.
+where ***u*** is unit to select and ***b*** is the optional baud rate.
 
+Supported baud rates are:
 ```
- Code |   Rate   | Code |   Rate   | Code |   Rate   | Code |   Rate   |
-------|----------|------|----------|------|----------|------|----------|
-   0  |      75  |   8  |    1800  |  16  |   28880  |  24  |  460800  |
-   1  |     150  |   9  |    2400  |  17  |   38400  |  25  |  614400  |
-   2  |     225  |  10  |    3600  |  18  |   57600  |  26  |  921600  |
-   3  |     300  |  11  |    4800  |  19  |   76800  |  27  | 1228822  |
-   4  |     450  |  12  |    7200  |  20  |  115200  |  28  | 1843200  |
-   5  |     600  |  13  |    9600  |  21  |  153600  |  29  | 2457600  |
-   6  |     900  |  14  |   14400  |  22  |  230400  |  30  | 3686400  |
-   7  |    1200  |  15  |   19200  |  23  |  307200  |  31  | 7372800  |
-------------------------------------------------------------------------
+ 75   450  1800   7200  38400  115200   460800  1843200
+150   600  2400   9600  28800  153600   614400  2457600
+225   900  3600  14400  57600  230400   921600  3686400
+300  1200  4800  19200  76800  307200  1228800  7372800
 ```
 
 Example: To change current console to 9600 baud
 
 ```
-I 0 13
+I 0 9600
 ```
 
 
@@ -411,20 +405,20 @@ functional on all of the OS variants included with RomWBW.
 The following custom applications are found on the ROM disk and are,
 therefore, globally available.
 
-| Application | Description                                                                                          |
-| ----------- | ---------------------------------------------------------------------------------------------------- |
-| ASSIGN      | Add, change, and delete drive letter assignments. Use ASSIGN /? for usage instructions.              |
-| SYSCOPY     | Copy system image to a device to make it bootable. Use SYSCOPY with no parms for usage instructions. |
-| MODE        | Reconfigures serial ports dynamically.                                                               |
-| FDU         | Format and test floppy disks. Menu driven interface.                                                 |
-| FORMAT      | Will someday be a command line tool to format floppy disks. Currently does nothing!                  |
-| XM          | XModem file transfer program adapted to hardware. Automatically uses primary serial port on system.  |
-| FLASH       | Will Sowerbutts' in-situ ROM programming utility.                                                    |
-| FDISK80     | John Coffman's Z80 hard disk partitioning tool.  See documentation in Doc directory.                 |
-| TALK        | Direct console I/O to a specified character device.                                                  |
-| RTC         | Manage and test the Real Time Clock hardware.                                                        |
-| TIMER       | Display value of running periodic system timer.                                                      |
-| CPUSPD      | Change the running CPU speed and wait states of the system.    |
+| Application   | Description                                                                                          |
+| ------------- | ---------------------------------------------------------------------------------------------------- |
+| ASSIGN        | Add, change, and delete drive letter assignments. Use ASSIGN /? for usage instructions.              |
+| SYSCOPY       | Copy system image to a device to make it bootable. Use SYSCOPY with no parms for usage instructions. |
+| MODE          | Reconfigures serial ports dynamically.                                                               |
+| FDU           | Format and test floppy disks. Menu driven interface.                                                 |
+| FORMAT        | Will someday be a command line tool to format floppy disks. Currently does nothing!                  |
+| XM            | XModem file transfer program adapted to hardware. Automatically uses primary serial port on system.  |
+| FLASH         | Will Sowerbutts' in-situ ROM programming utility.                                                    |
+| FDISK80       | John Coffman's Z80 hard disk partitioning tool.  See documentation in Doc directory.                 |
+| TALK          | Direct console I/O to a specified character device.                                                  |
+| RTC           | Manage and test the Real Time Clock hardware.                                                        |
+| TIMER         | Display value of running periodic system timer.                                                      |
+| CPUSPD        | Change the running CPU speed and wait states of the system.                                          |
 
 Some custom applications do not fit on the ROM disk. They are found on the
 disk image files or the individual files can be found in the Binary\\Apps
@@ -434,7 +428,7 @@ directory of the distribution.
 | ----------- | -------------------------------------------------------------- |
 | TUNE        | Play .PT2, .PT3, .MYM audio files.                             |
 | FAT         | Access MS-DOS FAT filesystems from RomWBW (based on FatFs).    |
-| INTTEST     | Test interrupt vector hooking.                                                                       |
+| INTTEST     | Test interrupt vector hooking.                                 |
 
 Additional documentation on all of these applications can be found in
 "RomWBW Applications.pdf" in the Doc directory of the distribution.
@@ -463,6 +457,16 @@ will find some files on the ROM disk that will work with ZSDOS, but
 will not work on CP/M 2.2. For example, `LDDS`, which loads the
 ZSDOS date/time stamper will only run on ZSDOS.
 
+## Flash ROM Disks
+
+The limitation of ROM disks being read only can be overcome on some
+platforms with the appropriate selection of Flash ROM chip and 
+system configuration. In this case the flash-file system can be
+enabled which will allow the ROM disk to be read and written to.
+Flash devices have a limited write lifespan and continual usage will
+eventually wear out the device. It is not suited for high usage
+applications. 
+
 ## Disk Devices
 
 While the RAM/ROM disks provide a functional system, they are not

Source/Doc/ROM_Applications.md

@@ -316,7 +316,9 @@ D+	| d1 d2 -- d1+d2             | Add double numbers
 2>R	| d --                       | 2 to R
 2R>	| d --                       | fetch 2 from R
 M*/	| d1 n2 u3 --  d=(d1*n2)/u3  | double precision mult. div
-
+SVC	| hl de bc n -- hl de bc af  | Execute a ROMWBW function
+P!	| n p --                     | Write a byte to a I/O port
+P@      | p -- n                     | Read a byte from and I/O port
 
 # BASIC
 

Source/HBIOS/Config/RCZ80_std.asm

@@ -36,7 +36,7 @@ SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 ;
 TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
 TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
-TMSMODE         .SET    TMSMODE_RCV9958	; TMS: DRIVER MODE: TMSMODE_[RC/RCV9958]
+TMSMODE         .SET    TMSMODE_MSX9958	; TMS: DRIVER MODE: TMSMODE_[RC/MSX9958]
 MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
 ;
 AY38910ENABLE	.SET	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER

Source/HBIOS/Config/SBC_max.asm

@@ -62,6 +62,8 @@ SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 ;
 PRPENABLE	.SET	TRUE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 ;
-AY38910ENABLE	.SET	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+AY38910ENABLE	.SET	TRUE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER (AY38910.ASM)
 ;
-SN7ENABLE	.SET	TRUE		; SN : SN76489 DRIVER
+SN76489ENABLE	.SET	TRUE		; SN: ENABLE SN76489 SOUND DRIVER (SN76489.ASM)
+;
+YM2612ENABLE	.SET	TRUE		; YM2612: ENABLE ECB VGM YM2612 SOUND DRIVER (YM2612.ASM)

Source/HBIOS/audio.inc

@@ -1,4 +1,5 @@
 #IF AUDIOTRACE
+;
 #DEFINE	AUDTRACE(STR)	PUSH DE \ LD DE, STR \ CALL WRITESTR \ POP DE
 #DEFINE AUDTRACE_A	CALL PRTHEXBYTE
 #DEFINE AUDTRACE_B	PUSH AF \ LD A, B \ CALL PRTHEXBYTE \ POP AF
@@ -9,12 +10,13 @@
 #DEFINE AUDTRACE_BC	PUSH HL \ PUSH BC \ POP HL \ CALL PRTHEXWORDHL \ POP HL
 #DEFINE AUDTRACE_DE	PUSH HL \ PUSH DE \ POP HL \ CALL PRTHEXWORDHL \ POP HL
 #DEFINE AUDTRACE_IY	PUSH HL \ PUSH IY \ POP HL \ CALL PRTHEXWORDHL \ POP HL
-
+;
 #DEFINE AUDDEBUG(S) push hl \ CALL PRTSTRD \ .TEXT S \ .TEXT "$" \ pop hl	; $$$$$$ PRINT STRING S TO CONSOLE - PRTD("HELLO") - NO TRAILING $ REQUIRED
-
+;
 #DEFINE AUDTRACE_CR AUDDEBUG("\r\n$")
-
+;
 #ELSE
+;
 #DEFINE	AUDTRACE(S)
 #DEFINE AUDTRACE_A
 #DEFINE AUDTRACE_B
@@ -25,51 +27,76 @@
 #DEFINE AUDTRACE_HL
 #DEFINE AUDTRACE_DE
 #DEFINE AUDTRACE_IY
-
+;
 #DEFINE AUDDEBUG(STR)
-
+;
 #DEFINE AUDTRACE_CR
+;
 #ENDIF
-
-
-#IFNDEF AUDIOUTILS
-#DEFINE AUDIOUTILS
-
+;
+#IFNDEF AUDIO_INC
+#DEFINE AUDIO_INC
+;
+; NOTE TABLE VALUES ARE SHIFTED A FEW EXTRA BITS TO MAKE THE
+; DIVISION AS ACCURATE AS POSSIBLE.
+;
+AUD_SCALE	.EQU	3
+;
+; ON ENTRY, DE IS ADDRESS OF NOTE TABLE, HL IS NOTE TO PLAY
+; NOTE VALUE 0 MEANS B0b/A0# IN OCTAVE 0 WHICH IS THE FIRST ENTRY
+; OF THE NOTE TABLE.  THE NOTE TABLE REPRESENTS THE FREQUENCIES
+; FOR 1 FULL OCTAVE IN QUARTER NOTES.  SINCE THERE ARE 12 NOTES
+; IN AN OCTAVE, THE TABLE HAS 48 ENTRIES FOR ALL QUARTER NOTES.
+;
+; ON EXIT, HL CONTAINS THE PERIOD VALUE TO PROGRAM INTO THE PSG
+; DERIVED FROM THE NOTE TABLE SCALED TO THE REQUESTED OCTAVE.
+;
 AUD_NOTE:
 	AUDDEBUG("AUDNOTE ")
 	AUDTRACE_HL
 	AUDTRACE_CR
 	AUDTRACE_DE
 	AUDTRACE_CR
-
-	push	de
-	LD	DE, 48
-	CALL	DIV16
-					; BC IS OCTAVE COUNT
-					; HL is NOTE WITIN OCTAVE
-	ADD	HL, HL
-	pop	de
-	ADD	HL, DE
-
-	LD	A, (HL)			; RETRIEVE PERIOD COUNT FROM SN7NOTETBL
-	INC	HL
-	LD	H, (HL)
-	LD	L, A
-
-	INC	C
+;
+	; START BY SEPARATING THE NOTE AND OCTAVE PORTION
+	; OF THE INCOMING TONE VALUE IN HL
+	PUSH	DE			; SAVE NOTE TABLE ADR
+	LD	DE,48			; 48 QUARTERNOTES PER OCTAVE
+	CALL	DIV16			; SEPARATE OCTAVE AND NOTE
+;
+	; THE QUOTIENT (BC) IS THE OCTAVE NUMBER REQUESTED
+	; THE REMAINDER (HL) IS THE QUARTER NOTE WITHIN THE OCTAVE.
+;
+	; NOW USE THE QUARTER NOTE VALUE TO LOOKUP THE CORRESPONDING
+	; PSG PERIOD VALUE IN THE NOTE TABLE.
+	ADD	HL,HL			; SCALE FOR 2 BYTE TABLE ENTRY SIZE
+	POP	DE			; RECOVER THE TABLE ADR
+	ADD	HL,DE			; HL := DESIRED TABLE ENTRY ADR
+	LD	A,(HL)			; GET LOW BYTE OF PERIOD TO A
+	INC	HL			; POINT TO HIGH BYTE VALUE
+	LD	H,(HL)			; GET HIGH BYTE OF PERIOD TO H
+	LD	L,A			; PUT LOW BYTE INTO L
+;
+	; NOW WE SCALE THE PERIOD VALUE DOWN BASED ON THE OCTAVE VALUE IN C
+	; AND BY THE AUD_SCALE VALUE THAT WAS USED IN THE NOTE TABLE.
+	; FOR EACH OCTAVE, THE PERIOD IS HALVED WHICH DOUBLES THE FREQUENCY
+	; THAT WILL BE PRODUCED BY THE PSG.  SINCE MOVING UP AN OCTAVE
+	; SHOULD PRODUCE A FREQUENCY THAT IS TWICE THE LOWER OCTIAVE, THIS
+	; WORKS NICELY, ALTHOUGH SOME ERROR MAY BE INTRODUCED.
+;
+	LD	A,AUD_SCALE		; SHIFT BY AUD_SCALE BITS
+	ADD	A,C			; ... AND OCTAVE
+	LD	B,A			; USE AS LOOP COUNTER
 AUD_NOTE1:
-	DEC	C
-	JR	Z, AUD_NOTE2
-	SRL	H
-  	RR	L
-	JR	AUD_NOTE1
-
-AUD_NOTE2:
-	LD	A, L			; IF NOT ZERO
-	OR	H
-	RET	NZ			; RETURN THE CALCULATED PERIOD
-
-	LD	H, $FF			; OTHERWISE RETURN -1 PERIOD (ERROR)
-	LD	L, $FF
+	SRL	H			; RIGHT SHIFT HL
+	RR	L			; ... BY ONE BIT
+	DJNZ	AUD_NOTE1		; LOOP UNTIL DONE
+;
+	; IF THE RESULTANT PERIOD IS ZERO, IT MEANS THAT THE REQUESTED
+	; PERIOD IS TOO LOW (FREQUENCY TOO HIGH) FOR THE PSG TO PRODUCE.
+	LD	A, L			; CHECK FOR ZERO
+	OR	H			; ... MEANING PSG CAN'T DO IT
+	RET	NZ			; IF NOT ZERO, RETURN THE CALCULATED PERIOD
+	DEC	HL			; OTHERWISE RETURN -1 PERIOD (ERROR)
 	RET
 #ENDIF

Source/HBIOS/ay38910.asm

@@ -4,8 +4,12 @@
 ;
 ;======================================================================
 ;
-; @3.579545 OCTAVE RANGE IS 2 - 7 (Bb2/A#2 .. A7)
-; @4.000000 OCTAVE RANGE IS 2 - 7 (B2 .. A7)
+; AY-3-8910 & YM2149 PSG CHIPS NEED AN INPUT CLOCK FREQUENCY OF
+; NO MORE THAN 2 MHZ.  THE CLOSEST THING THERE IS TO A STANDARD
+; IS THE MSX FREQ OF 1.7897725 MHZ.
+;
+; @1.7897725 OCTAVE RANGE IS 2 - 7 (Bb2/A#2 .. A7)
+; @2.0000000 OCTAVE RANGE IS 2 - 7 (B2 .. A7)
 ;
 AY_RCSND	.EQU	0		; 0 = EB MODULE, 1=MF MODULE
 ;
@@ -14,7 +18,6 @@ AY_RSEL		.EQU	$9A
 AY_RDAT		.EQU	$9B
 AY_RIN		.EQU	AY_RSEL
 AY_ACR		.EQU	$9C
-AY_CLK		.SET	3579545 	; MSX NTSC COLOUR BURST FREQ = 315/88
 #ENDIF
 ;
 #IF (AYMODE == AYMODE_N8)
@@ -53,7 +56,6 @@ AY_RSEL		.EQU	$A0
 AY_RDAT		.EQU	$A1
 AY_RIN		.EQU	AY_RSEL
 AY_ACR		.EQU	$A2
-AY_CLK		.SET	3579545 	; MSX NTSC COLOUR BURST FREQ = 315/88
 #ENDIF
 ;
 ;======================================================================
@@ -92,14 +94,16 @@ AY_IDAT	.EQU	0			; NO INSTANCE DATA ASSOCIATED WITH THIS DEVICE
 ;
 AY_TONECNT	.EQU	3		; COUNT NUMBER OF TONE CHANNELS
 AY_NOISECNT	.EQU	1		; COUNT NUMBER OF NOISE CHANNELS
+;;
+;#IF (AY_CLK > 3579545)			; DEPENDING ON THE 
+;AY_SCALE	.EQU	2		; INPUT CLOCK FREQUENCY
+;#ELSE					; PRESCALE THE TONE PERIOD
+;AY_SCALE	.EQU	3		; DATA TO MAINTAIN MAXIMUM
+;#ENDIF					; RANGE AND ACCURACY
 ;
-#IF (AY_CLK > 3579545)			; DEPENDING ON THE 
-AY_SCALE	.EQU	2		; INPUT CLOCK FREQUENCY
-#ELSE					; PRESCALE THE TONE PERIOD
-AY_SCALE	.EQU	3		; DATA TO MAINTAIN MAXIMUM
-#ENDIF					; RANGE AND ACCURACY
-;
-AY_RATIO	.EQU	(AY_CLK * 100) / (16 >> AY_SCALE)
+	.ECHO	"SN76489 CLOCK: "
+	.ECHO	SN7CLK
+	.ECHO	"\n"
 ;
 #INCLUDE "audio.inc"
 ;
@@ -306,38 +310,8 @@ AY_VOLUME:
 ;======================================================================
 ;
 AY_NOTE:
-	AUDTRACE(AYT_NOTE)
-	AUDTRACE_HL
-	AUDTRACE_CR
-;
-;	CALL	PRTHEXWORDHL
-;	CALL	PC_COLON
-;
-	LD	DE, AY3NOTETBL		; ON ENTRY HL IS THE NOTE TO PLAY
-	PUSH	DE			; AND DE IS THE START OF NOTE TABLE
-	LD	DE, 48			; LOAD DE WITH NOTE TABLE SIZE
-	CALL	DIV16			; AND CALCULATE OCTAVE COUNT IN BC
-;			
-	ADD	HL, HL			; HL IS THE REMAINDER FROM ABOVE DIVISION (0-47) AND THE NOTE 
-	POP	DE			; TO PLAY IN THE OCTAVE. ADD IT TO THE START OF THE NOTE TABLE
-	ADD	HL, DE			; TO POINT TO THE PERIOD FOR THE NOTE WE WANT TO PLAY.
-;
-	LD	A, (HL)			; HL POINT TO CURRENT PERIOD COUNT WE WANT TO PLAY
-	INC	HL			; SO LOAD PERIOD COUNT FROM NOTE TABLE INTO HL
-	LD	H, (HL)			; SO WE CAN UPDATE IT FOR THE REQUIRED OCTAVE
-	LD	L, A
-;
-	;LD	A,AY_SCALE - 1		; THE NOTE TABLE PERIOD DATA HAS BEEN
-	LD	A,AY_SCALE		; THE NOTE TABLE PERIOD DATA HAS BEEN
-	ADD	A,C			; PRESCALED TO MAINTAIN RANGE SO ALLOW
-	LD	B,A			; FOR THIS WHEN CHANGING OCTAVE
-AY_NOTE1:
-	SRL	H			; ADJUST THE PERIOD DATA
-  	RR	L			; FOR THE DESIRED OCTAVE
-	DJNZ	AY_NOTE1		; FALL THROUGH TO SET PERIOD AND RANGE CHECK
-;
-;	CALL	PRTHEXWORDHL
-;	CALL	NEWLINE
+	LD	DE, AY3NOTETBL
+	CALL	AUD_NOTE		; RETURNS PERIOD IN HL, FALL THRU
 ;
 ;======================================================================
 ;	SOUND DRIVER FUNCTION - PERIOD
@@ -347,21 +321,22 @@ AY_PERIOD:
 	AUDTRACE(AYT_PERIOD)
 	AUDTRACE_HL
 	AUDTRACE_CR
-
-	LD	A, H			; IF ZERO - ERROR
-	OR	L
-	JR	Z, AY_PERIOD1
 ;
-	LD	A, H			; MAXIMUM TONE PERIOD IS 12-BITS
+	LD	A,H			; IF ZERO - ERROR
+	OR	L
+	JR	Z,AY_PERIOD1
+;
+	LD	A,H			; MAXIMUM TONE PERIOD IS 12-BITS
 	AND	11110000B		; ALLOWED RANGE IS 0001-0FFF (4095)
-	JR	NZ, AY_PERIOD1		; RETURN NZ IF NUMBER TOO LARGE
-	LD	(AY_PENDING_PERIOD), HL	; SAVE AND RETURN SUCCESSFUL
+	JR	NZ,AY_PERIOD1		; RETURN NZ IF NUMBER TOO LARGE
+	LD	(AY_PENDING_PERIOD),HL	; SAVE AND RETURN SUCCESSFUL
+	XOR	A			; SET SUCCESS
 	RET
 ;
 AY_PERIOD1:
-	LD	A, $FF			; REQUESTED PERIOD IS LARGER
-	LD	(AY_PENDING_PERIOD), A	; THAN THE DEVICE CAN SUPPORT
-	LD	(AY_PENDING_PERIOD+1), A; SO SET PERIOD TO FFFF
+	LD	HL,$FFFF		; REQUESTED PERIOD IS LARGER
+	LD	(AY_PENDING_PERIOD),HL	; THAN PSG CAN SUPPORT, SO
+	OR	$FF			; SET PERIOD TO $FFFF
 	RET				; AND RETURN FAILURE
 ;
 ;======================================================================
@@ -612,10 +587,32 @@ AYT_REGWR		.DB	"\r\nOUT AY-3-8910 $"
 ;	QUARTER TONE FREQUENCY TABLE
 ;======================================================================
 ;
-; THE FREQUENCY BY QUARTER TONE STARTING AT A0# OCTAVE 0
-; USED TO MAP EACH OCTAVE (DIV BY 2 TO JUMP AN OCTAVE UP)
-; FIRST PLAYABLE NOTE WILL BE 0
-; ASSUMING A CLOCK OF 1843200 THIS MAPS TO A0#
+; THE FOLLOWING TABLE MAPS A FULL OCTAVE OF QUARTER-NOTES
+; STARTING AT A# IN OCTAVE 0 TO THE CORRESPONDING PERIOD
+; VALUE TO USE ON THE PSG TO ACHIEVE THE DESIRED NOTE FREQUENCY.
+;
+; THE FREQUENCY PRODUCED BY THE AY-3-8910 IS:
+; FREQ = CLOCK / 16 / PERIOD
+;
+; SO, TO MAP A DESIRED FREQUENCY TO A PERIOD, WE USE:
+; PERIOD = CLOCK / 16 / FREQ
+;
+; IN ORDER TO IMPROVE THE RESOLUTION OF THE FREQUENCY
+; VALUE USED, WE ALSO MULTPLY BOTH SIDES OF THE EQUATION
+; BY 100:
+; PERIOD * 100 = (CLOCK / 16 / FREQ) * 100
+;
+; THE RESULTING PERIOD VALUE CAN BE REPEATEDLY HALVED
+; TO TO JUMP UP AS MANY OCTAVES AS DESIRED.
+;
+; THE FINAL VALUE IS SHIFTED BY AUD_SCALE BITS
+; IN ORDER TO IMPROVE THE RESOLUTION.  THIS FINAL SHIFT
+; IS REMOVED WHEN IN THE AY_NOTE ROUTINE.
+;
+; ASSUMING A CLOCK OF 1.7897725 MHZ, THE FIRST PLAYABLE
+; NOTE WILL BE A0#/B0b (HBIOS NOTE CODE 0).
+;
+AY_RATIO	.EQU	(AY_CLK * 100) / (16 >> AUD_SCALE)
 ;
 AY3NOTETBL:
 	.DW	AY_RATIO / 2913		; A0#/B0b	178977250 / 2913 = 61440; PROOF: 61440 >> 3 = 7680, 3579545 / 7680 / 16 = 29.13

Source/HBIOS/bqrtc.asm

@@ -161,9 +161,7 @@ BQRTC_DISPATCH:
 	JP	Z, BQRTC_SETALM			; Set Alarm
 	DEC	A
 	JP	Z, BQRTC_DEVICE			; Report RTC device info
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 	
 ;
@@ -173,9 +171,7 @@ BQRTC_GETBYT:
 BQRTC_SETBYT:
 BQRTC_GETBLK:
 BQRTC_SETBLK:
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 	
 ; RTC Get Time

Source/HBIOS/cfg_dyno.asm

@@ -34,7 +34,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -66,6 +66,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -84,6 +85,9 @@ DSRTCENABLE	.EQU	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	TRUE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -170,7 +174,7 @@ PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -192,13 +196,13 @@ PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
-SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_NONE	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
 ;
-AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
-AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
 AYMODE		.EQU	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
@@ -206,3 +210,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_ezz80.asm

@@ -34,7 +34,7 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -67,6 +67,7 @@ WDOGIO		.EQU	$6F		; WATCHDOG REGISTER ADR
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -90,6 +91,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -207,7 +211,7 @@ PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -236,13 +240,13 @@ PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
-SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
 ;
-AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
-AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
 AYMODE		.EQU	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
@@ -250,3 +254,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_NONE	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_master.asm

@@ -31,7 +31,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_NONE		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -98,6 +98,7 @@ WDOGIO		.EQU	$6F		; WATCHDOG REGISTER ADR
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -124,6 +125,9 @@ DSRTCENABLE	.EQU	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -275,7 +279,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_NONE	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_NONE	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -316,13 +320,13 @@ PIOSBASE	.EQU	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 UFBASE		.EQU	$0C		; UF: REGISTERS BASE ADR
 ;
-SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_NONE	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
 ;
-AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
-AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
 AYMODE		.EQU	AYMODE_NONE	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
@@ -330,3 +334,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_NONE	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_mbc.asm

@@ -34,7 +34,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_MBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -63,6 +63,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	TRUE		; ENABLES STATUS LED
 LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
@@ -89,6 +90,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -204,7 +208,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -240,13 +244,13 @@ PIOSBASE	.EQU	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 UFBASE		.EQU	$0C		; UF: REGISTERS BASE ADR
 ;
-SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_NONE	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
 ;
-AY38910ENABLE	.EQU	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
-AY_CLK		.EQU	3579545 / 2	; DEFAULT TO CPUOSC / 4
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
 AYMODE		.EQU	AYMODE_MBC	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
@@ -254,3 +258,7 @@ SPKENABLE	.EQU	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_MBC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+

Source/HBIOS/cfg_mk4.asm

@@ -34,7 +34,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -69,6 +69,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -95,6 +96,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -203,7 +207,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_MK4	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -242,13 +246,13 @@ PIOSBASE	.EQU	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 UFBASE		.EQU	$0C		; UF: REGISTERS BASE ADR
 ;
-SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_VGM	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
 ;
-AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
-AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
 AYMODE		.EQU	AYMODE_SCG	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
@@ -256,3 +260,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_ECB	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_n8.asm

@@ -34,7 +34,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_N8		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
@@ -71,6 +71,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
 LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
@@ -97,6 +98,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -237,13 +241,13 @@ PIOSBASE	.EQU	N8_PPI0		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 FIFO_BASE	.EQU	$0C		; UF: REGISTERS BASE ADR
 ;
-SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_VGM	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
 ;
-AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
-AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
 AYMODE		.EQU	AYMODE_N8	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
@@ -251,3 +255,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_rcz180.asm

@@ -34,7 +34,7 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -69,6 +69,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -92,6 +93,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -164,7 +168,7 @@ VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_RC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;
@@ -220,7 +224,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -249,13 +253,13 @@ PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
-SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
 ;
-AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
-AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
 AYMODE		.EQU	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
@@ -263,3 +267,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_rcz280.asm

@@ -34,7 +34,7 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -74,6 +74,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -97,6 +98,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -179,7 +183,7 @@ VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_RC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;
@@ -235,7 +239,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -264,13 +268,13 @@ PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
-SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
 ;
-AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
-AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
 AYMODE		.EQU	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
@@ -278,3 +282,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_Z280	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_rcz80.asm

@@ -34,7 +34,7 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -68,6 +68,7 @@ WDOGIO		.EQU	$6E		; WATCHDOG REGISTER ADR
 DIAGENABLE	.EQU	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -91,6 +92,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -168,7 +172,7 @@ VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_RC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;
@@ -224,7 +228,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -256,13 +260,13 @@ PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
-SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-SNMODE		.EQU	SNMODE_RCZ80	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
 ;
-AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
-AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
 AYMODE		.EQU	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
@@ -270,3 +274,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_RC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_rph.asm

@@ -34,7 +34,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_RPH		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
@@ -69,6 +69,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
 LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
@@ -95,6 +96,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -205,7 +209,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_CSIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	RPH_PPI0	; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -237,13 +241,13 @@ PIOSBASE	.EQU	RPH_PPI0		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 FIFO_BASE	.EQU	$0C		; UF: REGISTERS BASE ADR
 ;
-SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_NONE	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
 ;
-AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
-AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
 AYMODE		.EQU	AYMODE_N8	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
@@ -251,3 +255,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_sbc.asm

@@ -34,7 +34,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -63,6 +63,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
 LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
@@ -89,6 +90,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -204,7 +208,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -240,13 +244,13 @@ PIOSBASE	.EQU	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 UFBASE		.EQU	$0C		; UF: REGISTERS BASE ADR
 ;
-SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.EQU	3575950		; DEFAULT OSCILLATOR
-SNMODE		.EQU	SNMODE_VGM	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_VGM	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
 ;
-AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
-AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
 AYMODE		.EQU	AYMODE_SCG	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
@@ -254,3 +258,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_ECB	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_scz180.asm

@@ -34,7 +34,7 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
@@ -64,6 +64,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	TRUE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$0D		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
 LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
@@ -87,6 +88,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -159,7 +163,7 @@ VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
 CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
 GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
 TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
-TMSMODE		.EQU	TMSMODE_RC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|RC|RCV9958|RCKBD]
+TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD]
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 ;
@@ -215,7 +219,7 @@ PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
 PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -244,13 +248,13 @@ PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
 ;
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 ;
-SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
-SN7CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
-SNMODE		.EQU	SNMODE_NONE	; DRIVER MODE: SNMODE_[NONE|RC2014|VGM]
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
 ;
-AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
-AY_CLK		.EQU	CPUOSC / 4	; DEFAULT TO CPUOSC / 4
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
 AYMODE		.EQU	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
 ;
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
@@ -258,3 +262,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_una.asm

@@ -32,3 +32,5 @@ ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 RTCIO		.EQU	$70		; RTC LATCH REGISTER ADR
 ;
 DSKYENABLE	.EQU	FALSE		; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
+
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING

Source/HBIOS/cfg_zeta.asm

@@ -34,7 +34,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -55,6 +55,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
 LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
@@ -76,6 +77,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -148,7 +152,7 @@ PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -182,3 +186,6 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_NONE	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/cfg_zeta2.asm

@@ -34,7 +34,7 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VEREIFICATION (0=DISABLED)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -66,6 +66,7 @@ WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
 DIAGENABLE	.EQU	FALSE		; ENABLES OUTPUT TO 8 BIT LED DIAGNOSTIC PORT
 DIAGPORT	.EQU	$00		; DIAGNOSTIC PORT ADDRESS
 DIAGDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON DIAGNOSTIC LEDS
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
 ;
 LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED
 LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
@@ -87,6 +88,9 @@ DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
 DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
 ;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
 BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
 BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
 ;
@@ -159,7 +163,7 @@ PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
 PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
 ;
 SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
-SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT]
+SDMODE		.EQU	SDMODE_PPI	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
 SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
 SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -190,7 +194,9 @@ SN76489ENABLE	.EQU	FALSE		; SN76489 SOUND DRIVER
 AY38910ENABLE	.EQU	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
 SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
-;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
 DMAMODE		.EQU	DMAMODE_NONE	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)

Source/HBIOS/ctc.asm

@@ -112,7 +112,7 @@ CTC_PREINIT1:
 ;
 	; CTC USES 4 CONSECUTIVE VECTOR POSITIONS, ONE FOR
 	; EACH CHANNEL.  BELOW WE SET THE BASE VECTOR TO THE
-	; START OF THE IVT, SO THE FIRST FOUR ENTIRES OF THE
+	; START OF THE IVT, SO THE FIRST FOUR ENTRIES OF THE
 	; IVT CORRESPOND TO CTC CHANNELS A-D.
 	LD	A,INT_CTC0A * 2
 	OUT	(CTCBASE),A		; SETUP CTC BASE INT VECTOR

Source/HBIOS/cvdu.asm

@@ -171,9 +171,7 @@ CVDU_VDADEV:
 	RET
 
 CVDU_VDASCS:
-	CALL	SYSCHK		; NOT IMPLEMENTED (YET)
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)	; NOT IMPLEMENTED (YET)
 	RET
 
 CVDU_VDASCP:

Source/HBIOS/ds1501rtc.asm

@@ -0,0 +1,397 @@
+
+;
+;==================================================================================================
+; Maxim DS1501/DS1511 Y2K-Compliant Watchdog RTC Driver
+;==================================================================================================
+;
+; THIS DRIVER CODE WAS CONTRIBUTED TO ROMWBW BY JPELLETIER 3:59 PM 7/24/2022
+;
+;  Register Addresses (HEX / BCD):
+;
+;  +---+-----+---------------+-------------------+------------------+----------------+
+;  |ADR|  D7 | D6  | D5 | D4 | D3 | D2 | D1 | D0 | RANGE            | REGISTER       |
+;  +---+-----+---------------+-------------------+------------------+----------------+
+;  | 0 |  0  |     10-Second |          1-Second |            00-59 | Seconds        |
+;  +---+-----+-----+---------+-------------------+------------------+----------------+
+;  | 1 |  0  |     10-Minute |          1-Minute |            00-59 | Minutes        |
+;  +---+-----+-----+---------+-------------------+------------------+----------------+
+;  | 2 |  0  |  0  | 10-Hour |            1-Hour |            00-23 | Hours          |
+;  +---+-----+-----+----+----+-------------------+------------------+----------------+
+;  | 3 |  0  |  0  |  0 |  0 |  0 |  Day Of Week |            01-07 | Day Of Week    |
+;  +---+-----+-----+----+----+----+--------------+------------------+----------------+
+;  | 4 |  0  |  0  | 10-Date |            1-Date |            01-31 | Date           |
+;  +---+-----+-----+----+----+-------------------+------------------+----------------+
+;  | 5 |/EOSC|/E32K|BB32|10Mo|           1-Month |            01-12 | Month          |
+;  +---+-----+-----+----+----+-------------------+------------------+----------------+
+;  | 6 |             10-Year |            1-Year |            00-99 | Year           |
+;  +---+-----+-----+----+----+----+----+----+----+------------------+----------------+
+;  | 7 |          10-Century |         1-Century |            00-39 | Century        |
+;  +---+-----+-----+----+----+----+----+----+----+------------------+----------------+
+;  | 8 |  AM1|     10-Second |          1-Second |            00-59 | Seconds Alarm  |
+;  +---+-----+---------------+-------------------+------------------+----------------+
+;  | 9 |  AM2|     10-Minute |          1-Minute |            00-59 | Minutes Alarm  |
+;  +---+-----+-----+---------+-------------------+------------------+----------------+
+;  | A |  AM3|  0  | 10-Hour |            1-Hour |            00-23 | Hours Alarm    |
+;  +---+-----+-----+----+----+-------------------+------------------+----------------+
+;  | B |  AM4|DY/DT| 10-date |          Day/Date |        1-7/01-31 | Day/Date Alarm |
+;  +---+-----+-----+----+----+----+--------------+------------------+----------------+
+;  | C |          0.1-Second |       0.01-Second |            00-99 | Watchdog       |
+;  +---+-----+-----+---------+-------------------+------------------+----------------+
+;  | D |           10-Second |          1-Second |            00-99 | Watchdog       |
+;  +---+-----+-----+---------+-------------------+------------------+----------------+
+;  | E | BLF1| BLF2| PRS| PAB| TDF| KSF| WDF|IRQF|                  | ControlA       |
+;  +---+-----+-----+----+----+----+----+----+----+------------------+----------------+
+;  | F |   TE|   CS| BME| TPE| TIE| KIE| WDE| WDS|                  | ControlB       |
+;  +---+-----+-----+----+----+----+----+----+----+------------------+----------------+
+;  |10 |           Extended RAM Address          |            00-FF | RAM Address    |
+;  +---+-----+-----+----+----+----+----+----+----+------------------+----------------+
+;  |11 |                 Reserved                |                  |                |
+;  +---+-----+-----+----+----+----+----+----+----+------------------+----------------+
+;  |12 |                 Reserved                |                  |                |
+;  +---+--+--+-----+----+----+----+----+----+----+------------------+----------------+
+;  |13 |             Extended RAM Data           |            00-FF | RAM Data       |
+;  +---+--+--+-----+----+----+----+----+----+----+------------------+----------------+
+;  |14-1F |              Reserved                |                  |                |
+;  +------+--+-----+----+----+----+----+----+----+------------------+----------------+
+
+;  * = Unused bits; unwritable and read as 0.
+;  0 = should be set to 0 for valid time/calendar range.
+;  Clock calendar data is BCD. Automatic leap year adjustment.
+;  Day-Of-Week coded as Sunday = 1 through Saturday = 7.
+
+; Constants
+
+;By defining 2 bases, this allows some flexibility for address decoding
+DS1501NVM_BASE      .EQU    DS1501RTC_BASE + $10
+
+DS1501RTC_SEC	    .EQU	DS1501RTC_BASE + $00
+DS1501RTC_MIN	    .EQU	DS1501RTC_BASE + $01
+DS1501RTC_HOUR	    .EQU	DS1501RTC_BASE + $02
+DS1501RTC_WEEK_DAY	.EQU	DS1501RTC_BASE + $03
+DS1501RTC_DAY	    .EQU	DS1501RTC_BASE + $04
+DS1501RTC_MONTH	    .EQU	DS1501RTC_BASE + $05
+DS1501RTC_YEAR	    .EQU	DS1501RTC_BASE + $06
+DS1501RTC_CENT      .EQU	DS1501RTC_BASE + $07
+DS1501RTC_SEC_ALM	.EQU	DS1501RTC_BASE + $08
+DS1501RTC_MIN_ALM	.EQU	DS1501RTC_BASE + $09
+DS1501RTC_HOUR_ALM	.EQU	DS1501RTC_BASE + $0A
+DS1501RTC_DAY_ALM	.EQU	DS1501RTC_BASE + $0B
+DS1501RTC_WDOG1     .EQU	DS1501RTC_BASE + $0C
+DS1501RTC_WDOG2 	.EQU	DS1501RTC_BASE + $0D
+DS1501RTC_CONTROLA	.EQU	DS1501RTC_BASE + $0E
+DS1501RTC_CONTROLB	.EQU	DS1501RTC_BASE + $0F
+
+DS1501RTC_RAMADDR	.EQU	DS1501NVM_BASE + $00
+DS1501RTC_RAMDATA	.EQU	DS1501NVM_BASE + $03
+
+DS1501RTC_HIGH	.EQU	%11110000
+DS1501RTC_LOW	.EQU	%00001111
+
+;ControlA bit masks
+;BLF1| BLF2| PRS| PAB| TDF| KSF| WDF|IRQF
+DS1501RTC_IRQF	.EQU	%00000001
+DS1501RTC_WDF	.EQU	%00000010
+DS1501RTC_KSF	.EQU	%00000100
+DS1501RTC_TDF	.EQU	%00001000
+DS1501RTC_PAB	.EQU	%00010000
+DS1501RTC_PRS 	.EQU	%00100000
+DS1501RTC_BLF2  .EQU	%01000000
+DS1501RTC_BLF1	.EQU	%10000000
+
+;ControlB bit masks
+;TE| CS| BME| TPE| TIE| KIE| WDE| WDS|
+DS1501RTC_WDS 	.EQU	%00000001
+DS1501RTC_WDE	.EQU	%00000010
+DS1501RTC_KIE	.EQU	%00000100
+DS1501RTC_TIE	.EQU	%00001000
+DS1501RTC_TPE	.EQU	%00010000
+DS1501RTC_BME 	.EQU	%00100000
+DS1501RTC_CS    .EQU	%01000000
+DS1501RTC_TE	.EQU	%10000000
+
+DS1501RTC_BUFSIZE	.EQU	6		; 6 BYTE BUFFER (YYMMDDHHMMSS)
+
+; RTC Device Initialization Entry
+
+DS1501RTC_INIT:
+	CALL	NEWLINE				; Formatting
+	PRTS("DS1501RTC: IO=0x$")
+	LD	A, DS1501RTC_BASE
+	CALL	PRTHEXBYTE
+
+	CALL	NEWLINE				; Formatting
+	PRTS("DS1501NVM: IO=0x$")
+	LD	A, DS1501NVM_BASE
+	CALL	PRTHEXBYTE
+
+    IN	A,(DS1501RTC_CONTROLB)      ;clear any pending interrupt flags
+
+	XOR	A				; Zero A
+    OR      DS1501RTC_TE            ;enable time updates
+    OUT	(DS1501RTC_CONTROLB), A
+
+	CALL	DS1501RTC_LOAD
+	; DISPLAY CURRENT TIME
+	PRTS("  $")
+	LD	A, (DS1501RTC_BUF_MON)
+	CALL	PRTHEXBYTE
+	PRTS("/$")
+	LD	A, (DS1501RTC_BUF_DAY)
+	CALL	PRTHEXBYTE
+	PRTS("/$")
+	LD	A, (DS1501RTC_BUF_YEAR)
+	CALL	PRTHEXBYTE
+	PRTS(" $")
+	LD	A, (DS1501RTC_BUF_HOUR)
+	CALL	PRTHEXBYTE
+	PRTS(":$")
+	LD	A, (DS1501RTC_BUF_MIN)
+	CALL	PRTHEXBYTE
+	PRTS(":$")
+	LD	A, (DS1501RTC_BUF_SEC)
+	CALL	PRTHEXBYTE
+
+	LD	BC,DS1501RTC_DISPATCH
+	CALL	RTC_SETDISP
+
+	XOR	A				; Signal success
+	RET
+
+; RTC Device Function Dispatch Entry
+;   A: Result (OUT), 0=OK, Z=OK, NZ=Error
+;   B: Function (IN)
+
+DS1501RTC_DISPATCH:
+	LD	A, B				; Get requested function
+	AND	$0F				; Isolate Sub-Function
+	JP	Z, DS1501RTC_GETTIM			; Get Time
+	DEC	A
+	JP	Z, DS1501RTC_SETTIM			; Set Time
+	DEC	A
+	JP	Z, DS1501RTC_GETBYT			; Get NVRAM Byte Value
+	DEC	A
+	JP	Z, DS1501RTC_SETBYT			; Set NVRAM Byte Value
+	DEC	A
+	JP	Z, DS1501RTC_GETBLK			; Get NVRAM Data Block Value
+	DEC	A
+	JP	Z, DS1501RTC_SETBLK			; Set NVRAM Data Block Value
+	DEC	A
+	JP	Z, DS1501RTC_GETALM			; Get Alarm
+	DEC	A
+	JP	Z, DS1501RTC_SETALM			; Set Alarm
+;
+; NVRAM FUNCTIONS ARE NOT IMPLEMENTED YET
+;
+DS1501RTC_GETBYT:
+DS1501RTC_SETBYT:
+DS1501RTC_GETBLK:
+DS1501RTC_SETBLK:
+	CALL	PANIC
+
+; RTC Get Time
+;   A: Result (OUT), 0=OK, Z=OK, NZ=Error
+;   HL: Date/Time Buffer (OUT)
+; Buffer format is BCD: YYMMDDHHMMSS
+; 24 hour time format is assumed
+;
+DS1501RTC_GETTIM:
+	EX	DE, HL
+	CALL	DS1501RTC_LOAD
+	; Now copy to read destination (Interbank Save)
+	LD	A, BID_BIOS			; Copy from BIOS bank
+	LD	(HB_SRCBNK), A			; Set it
+	LD	A, (HB_INVBNK)			; Copy to current user bank
+	LD	(HB_DSTBNK), A			; Set it
+	LD	BC, DS1501RTC_BUFSIZE		; Length is 6 bytes
+#IF (INTMODE == 1)
+	DI
+#ENDIF
+	CALL	HB_BNKCPY			; Copy the clock data
+#IF (INTMODE == 1)
+	EI
+#ENDIF
+;
+	; CLEAN UP AND RETURN
+	XOR	A				; SIGNAL SUCCESS
+	RET					; AND RETURN
+;
+; RTC Set Time
+;   A: Result (OUT), 0=OK, Z=OK, NZ=Error
+;   HL: Date/Time Buffer (IN)
+; Buffer Format is BCD: YYMMDDHHMMSS
+; 24 hour time format is assumed
+;
+DS1501RTC_SETTIM:
+;
+	; Copy incoming time data to our time buffer
+	LD	A, (HB_INVBNK)			; Copy from current user bank
+	LD	(HB_SRCBNK), A			; Set it
+	LD	A, BID_BIOS			; Copy to BIOS bank
+	LD	(HB_DSTBNK), A			; Set it
+	LD	DE, DS1501RTC_BUF			; Destination Address
+	LD	BC, DS1501RTC_BUFSIZE		; Length is 6 bytes
+#IF (INTMODE == 1)
+	DI
+#ENDIF
+	CALL	HB_BNKCPY			; Copy the clock data
+#IF (INTMODE == 1)
+	EI
+#ENDIF
+	; Write to clock
+	LD	HL, DS1501RTC_BUF
+	CALL	DS1501RTC_SUSPEND
+	LD	A, (HL)
+	OUT	(DS1501RTC_YEAR), A			; Write Year
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_MONTH), A		; Write Month
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_DAY), A			; Write Day
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_HOUR), A			; Write Hour
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_MIN), A			; Write Minute
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_SEC), A			; Write Second
+	CALL	DS1501RTC_RESUME
+	; clean up and return
+	XOR	A				; Signal success
+	RET					; And return
+
+; RTC Get Alarm
+;   A: Result (OUT), 0=OK, Z=OK, NZ=Error
+;   HL: Date/Time Buffer (OUT)
+; Buffer format is BCD: YYMMDDHHMMSS
+; 24 hour time format is assumed
+;
+DS1501RTC_GETALM:
+	EX	DE, HL
+	LD	HL, DS1501RTC_BUF
+	PUSH	HL				; Save address of source buffer
+	CALL	DS1501RTC_SUSPEND
+	XOR	A
+	LD	(HL), A				; Read Year
+	INC	HL
+	LD	(HL), A				; Read Month
+	INC	HL
+	IN	A, (DS1501RTC_DAY_ALM)		; Read Day
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_HOUR_ALM)		; Read Hour
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_MIN_ALM)		; Read Minute
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_SEC_ALM)		; Read Second
+	LD	(HL), A
+	CALL	DS1501RTC_RESUME
+	POP	HL				; Restore address of source buffer
+	; Now copy to read destination (Interbank Save)
+	LD	A, BID_BIOS			; Copy from BIOS bank
+	LD	(HB_SRCBNK), A			; Set it
+	LD	A, (HB_INVBNK)			; Copy to current user bank
+	LD	(HB_DSTBNK), A			; Set it
+	LD	BC, DS1501RTC_BUFSIZE		; Length is 6 bytes
+#IF (INTMODE == 1)
+	DI
+#ENDIF
+	CALL	HB_BNKCPY			; Copy the clock data
+#IF (INTMODE == 1)
+	EI
+#ENDIF
+;
+	; CLEAN UP AND RETURN
+	XOR	A				; SIGNAL SUCCESS
+	RET					; AND RETURN
+;
+; RTC Set Alarm
+;   A: Result (OUT), 0=OK, Z=OK, NZ=Error
+;   HL: Date/Time Buffer (IN)
+; Buffer Format is BCD: YYMMDDHHMMSS
+; 24 hour time format is assumed
+;
+DS1501RTC_SETALM:
+	; Copy incoming time data to our time buffer
+	LD	A, (HB_INVBNK)			; Copy from current user bank
+	LD	(HB_SRCBNK), A			; Set it
+	LD	A, BID_BIOS			; Copy to BIOS bank
+	LD	(HB_DSTBNK), A			; Set it
+	LD	DE, DS1501RTC_BUF			; Destination Address
+	LD	BC, DS1501RTC_BUFSIZE		; Length is 6 bytes
+#IF (INTMODE == 1)
+	DI
+#ENDIF
+	CALL	HB_BNKCPY			; Copy the clock data
+#IF (INTMODE == 1)
+	EI
+#ENDIF
+	; Write to clock
+	LD	HL, DS1501RTC_BUF_DAY
+	CALL	DS1501RTC_SUSPEND
+	LD	A, (HL)
+	OUT	(DS1501RTC_DAY_ALM), A		; Write Day
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_HOUR_ALM), A		; Write Hour
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_MIN_ALM), A		; Write Minute
+	INC	HL
+	LD	A, (HL)
+	OUT	(DS1501RTC_SEC_ALM), A		; Write Second
+	CALL	DS1501RTC_RESUME
+	; clean up and return
+	XOR	A				; Signal success
+	RET					; And return
+
+DS1501RTC_SUSPEND:
+	IN	A, (DS1501RTC_CONTROLB)		; Suspend Clock
+	AND	~DS1501RTC_TE
+	OUT	(DS1501RTC_CONTROLB), A
+	RET
+
+DS1501RTC_RESUME:
+	IN	A, (DS1501RTC_CONTROLB)		; Resume Clock
+	OR	DS1501RTC_TE
+	OUT	(DS1501RTC_CONTROLB), A
+	RET
+
+DS1501RTC_LOAD:
+	LD	HL, DS1501RTC_BUF
+	PUSH	HL				; Save address of source buffer
+	CALL	DS1501RTC_SUSPEND
+	IN	A, (DS1501RTC_YEAR)			; Read Year
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_MONTH)		; Read Month
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_DAY)			; Read Day
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_HOUR)			; Read Hour
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_MIN)			; Read Minute
+	LD	(HL), A
+	INC	HL
+	IN	A, (DS1501RTC_SEC)			; Read Second
+	LD	(HL), A
+	CALL	DS1501RTC_RESUME
+	POP	HL				; Restore address of source buffer
+	RET
+
+; Working Variables
+
+DS1501RTC_BUF:
+DS1501RTC_BUF_YEAR:	.DB	0		; Year
+DS1501RTC_BUF_MON:	.DB	0		; Month
+DS1501RTC_BUF_DAY:	.DB	0		; Day
+DS1501RTC_BUF_HOUR:	.DB	0		; Hour
+DS1501RTC_BUF_MIN:	.DB	0		; Minute
+DS1501RTC_BUF_SEC:	.DB	0		; Second

Source/HBIOS/ds7rtc.asm

@@ -100,9 +100,7 @@ DS7_DISPATCH:
 	JP	Z, DS7_SETALM			; SET ALARM
 	DEC	A
 	JP	Z, DS7_DEVICE			; REPORT RTC DEVICE INFO
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ;-----------------------------------------------------------------------------
@@ -269,9 +267,7 @@ DS7_GETBLK:
 DS7_SETBLK:
 DS7_SETALM
 DS7_GETALM
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;-----------------------------------------------------------------------------
 ; REPORT RTC DEVICE INFO
@@ -329,7 +325,7 @@ DS7_RL1:CALL	PCF_READI2C
 ;
 #IF (0)
 	LD	A,8
-	LD	DE,DS7_BUF	; DISLAY DATA READ
+	LD	DE,DS7_BUF	; DISPLAY DATA READ
 	CALL	PRTHEXBUF	; 
 	CALL   	NEWLINE
 #ENDIF

Source/HBIOS/dsky.asm

@@ -3,7 +3,7 @@
 ; DSKY (DISPLAY AND KEYBOARD) ROUTINES 
 ;==================================================================================================
 ;
-; THE DSKY MAY COSESIDE ON THE SAME PPI BUS AS A PPISD.  IT MAY NOT
+; THE DSKY MAY COINCIDE ON THE SAME PPI BUS AS A PPISD.  IT MAY NOT
 ; SHARE A PPI BUS WITH A PPIDE.  SEE PPI_BUS.TXT FOR MORE INFORMATION.
 ;
 ; LED SEGMENTS (BIT VALUES)

Source/HBIOS/dsrtc.asm

@@ -247,9 +247,7 @@ DSRTC_DISPATCH:
 	JP	Z,DSRTC_SETALM	; SET ALARM
 	DEC	A
 	JP	Z,DSRTC_DEVICE	; REPORT RTC DEVICE INFO
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ; NVRAM FUNCTIONS ARE NOT AVAILABLE IN SIMULATOR
@@ -258,9 +256,7 @@ DSRTC_GETBLK:
 DSRTC_SETBLK:
 DSRTC_GETALM:
 DSRTC_SETALM:
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;
 ; RTC GET TIME

Source/HBIOS/fd.asm

@@ -490,9 +490,7 @@ FD_FNTBL:
 FD_VERIFY:
 FD_FORMAT:
 FD_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; INVALID SUB-FUNCTION
 	RET
 ;
 ;
@@ -1149,9 +1147,7 @@ FD_RUN1:
 	JR	Z,FC_WRITE
 	CP	DOP_READID
 	JR	Z,FC_READID
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 
 FD_RUNCHK:

Source/HBIOS/gdc.asm

@@ -157,9 +157,7 @@ GDC_VDADEV:	; VIDEO DEVICE INFORMATION
 	RET
 ;
 GDC_VDASCS:	; SET CURSOR STYLE
-	CALL	SYSCHK		; NOT IMPLEMENTED (YET)
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 
 GDC_VDASCP:	; SET CURSOR POSITION

Source/HBIOS/hbios.asm

@@ -53,6 +53,8 @@
 ;    - build.inc
 ;      - config/<plt>_<cfg>.asm
 ;        - cfg_<plt>.asm
+;      - [z180.inc|z280.inc]
+;      - [eipc.inc]
 ;  - <drivers>.asm
 ;  - <fonts>.asm
 ;  - util.asm
@@ -61,7 +63,7 @@
 ;  - decode.asm
 ;  - encode.asm
 ;  - [xio|mio].asm
-;  - dsky.asm
+;  - [dsky.asm|dskyng.asm]
 ;  - unlzsa2s.asm
 ;
 ; INCLUDE GENERIC STUFF
@@ -90,7 +92,7 @@ MODCNT	.SET	MODCNT + 1
 ; SOME HARDWARE REQUIRES A SPECIFIC ROMSIZE (NOTABLY ZZRCC) OR THE
 ; RESULTING BUILD IMAGES WILL BE CORRUPT.  ROMSIZE_CHK IS SPECIFIED
 ; IN THE CONFIG FILE AND IS VERIFIED AGAINST THE ROMSIZE BEING USED
-; BY THE BUILD.  A ROMSIZE_CHK VALUE OF 0 INDICATES THE VERFICATION
+; BY THE BUILD.  A ROMSIZE_CHK VALUE OF 0 INDICATES THE VERIFICATION
 ; IS DISABLED (WHICH IT USUALLY IS).
 ;
 #IF (ROMSIZE_CHK != 0) & (ROMSIZE != ROMSIZE_CHK)
@@ -132,6 +134,11 @@ MODCNT	.SET	MODCNT + 1
 #DEFINE	LED(N)	\;
 #ENDIF
 ;
+#DEFINE SYSCHKERR(HB_ERR) \
+  #DEFCONT \	CALL	SYSCHKA
+  #DEFCONT \	LD	A,HB_ERR
+  #DEFCONT \	OR	A
+;
 ;
 ;
 #IF (INTMODE == 0)
@@ -1094,14 +1101,14 @@ HB_START:
 ;
 #IFDEF APPBOOT
   #IF (MEMMGR == MM_Z280)
-	LD	A,%00000001
+	LD	A,DIAG_01
 	OUT	(DIAGPORT),A
 	LD	DE,Z280_BOOTERR
 	LD	C,9
-	LD	A,%00000010
+	LD	A,DIAG_02
 	OUT	(DIAGPORT),A
 	CALL	$0005
-	LD	A,%00001000
+	LD	A,DIAG_04
 	OUT	(DIAGPORT),A
 	RET
 ;
@@ -1130,7 +1137,7 @@ Z280_BOOTERR	.TEXT	"\r\n\r\n*** Application mode boot not supported under Z280 n
 #ENDIF
 ;
 #IF (DIAGENABLE)
-	LD	A,%00000001
+	LD	A,DIAG_01
 	OUT	(DIAGPORT),A
 #ENDIF
 #IF (LEDENABLE)
@@ -1240,7 +1247,7 @@ Z280_INITZ:
 	LD	A,Z180_BASE
 	OUT0	($3F),A		; AT RESET, ICR IS AT $3F
 
-	DIAG(%00000010)
+	DIAG(DIAG_02)
 
 	; DISABLE REFRESH
 	XOR	A
@@ -1334,8 +1341,10 @@ Z280_INITZ:
 ; NOT WANT TO EFFECT RAM UNTIL AFTER THE BACKUP BATTERY STATUS CHECK
 ; IS PERFORMED NEXT.
 ;
-	LD	A,%00000011
+#IF (DIAGENABLE)
+	LD	A,DIAG_02
 	OUT	(DIAGPORT),A
+#ENDIF
 ;
 ; WE USE THE TWO BYTES IMMEDIATELY BELOW THE PROXY TO STORE A COUPLE
 ; VALUES TEMPORARILY BECAUSE WE MAY BE OPERATING IN ROM AT THIS POINT.
@@ -1354,7 +1363,7 @@ Z280_INITZ:
 ; WILL NOT START CORRECTLY WHEN THEY CHECK THE ROM ID VERSION BYTES.
 ; THE BATTERY CONDITION VALUE IS TEMPORARILY STORED AT HBX_LOC - 1
 ; BECAUSE WE ARE CURRENTLY RUNNING IN ROM.  AFTER WE TRANSITION HBIOS
-; TO RAM, THE VALUE IS MOVED TO IT'S REAL LCOATION AT HB_BATCOND.
+; TO RAM, THE VALUE IS MOVED TO IT'S REAL LOCATION AT HB_BATCOND.
 ; IF THERE IS NO DS1210 IN THE SYSTEM, THE CODE BELOW DOES NO HARM.
 ;
 	LD	HL,HBX_LOC - 1		; POINT TO BYTE
@@ -1660,8 +1669,8 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 	; THAT.
 	LD	SP,HBX_LOC - 2		; RESET STACK
 ;
-	; NOTIFY THAT WE MADE THE TRANSTION!
-	DIAG(%00000111)
+	; NOTIFY THAT WE MADE THE TRANSITION!
+	DIAG(DIAG_03)
 	LED(%00000010)
 ;
 	; SET THE IN-RAM FLAG
@@ -1788,7 +1797,7 @@ SAVE_REC_M:
   #ENDIF
 #ENDIF
 ;
-	DIAG(%00001111)
+	DIAG(DIAG_04)
 ;
 #IF (WBWDEBUG == USEMIO)		; BUFFER OUTPUT UNTIL
 	CALL	MIO_INIT		; WE GET TO BOOT MESSAGE
@@ -1877,7 +1886,7 @@ HB_CPU1:
 ;
 #ENDIF
 ;
-	DIAG(%00011111)
+	DIAG(DIAG_05)
 ;
 ; INIT OSCILLATOR SPEED FROM CONFIG
 ;
@@ -2169,7 +2178,7 @@ Z280_TC	.EQU	CPUOSC / 4 / 50 / 2	; TIME CONSTANT
 	LD	A,$FF			; FILL WITH $FF
 	CALL	FILL			; DO IT
 ;
-	DIAG(%00111111)
+	DIAG(DIAG_06)
 ;
 #IF FALSE
 ;
@@ -2225,7 +2234,7 @@ NOT_REC_M0:
 ;
 #ENDIF
 ;
-	DIAG(%01111111)
+	DIAG(DIAG_07)
 	LED(%00000011)
 ;
 ;
@@ -2313,7 +2322,7 @@ NXTMIO:	LD	A,(HL)
 #ENDIF
 NOT_REC_M2:
 ;
-	DIAG(%11111111)
+	DIAG(DIAG_08)
 ;
 ; IO PORT SCAN
 ;
@@ -2803,6 +2812,43 @@ INITSYS3:
 ;
 #ENDIF
 ;
+#IF 0
+;
+	LD	HL,0
+	CALL	DBG_NOTE
+	LD	HL,48
+	CALL	DBG_NOTE
+	LD	HL,204
+	CALL	DBG_NOTE
+	LD	HL,268
+	CALL	DBG_NOTE
+	LD	HL,436
+	CALL	DBG_NOTE
+;
+	JP	INITSYS4
+;
+DBG_NOTE:
+	PUSH	HL
+	CALL	NEWLINE
+	PRTS("AY: $")
+	CALL	PRTDEC16
+	PRTS("=$")
+	CALL	AY_NOTE
+	LD	HL,(AY_PENDING_PERIOD)
+	CALL	PRTDEC16
+	POP	HL
+;
+	PRTS(" SN: $")
+	CALL	PRTDEC16
+	PRTS("=$")
+	CALL	SN7_NOTE
+	LD	HL,(SN7_PENDING_PERIOD)
+	CALL	PRTDEC16
+;
+	RET
+;
+#ENDIF
+;
 INITSYS4:
 ;
 #IF (MEMMGR == MM_Z280)
@@ -2970,6 +3016,9 @@ HB_INITTBL:
 #IF (SN76489ENABLE)
 	.DW	SN76489_INIT
 #ENDIF
+#IF (YM2612ENABLE)
+	.DW	YM2612_INIT
+#ENDIF
 #IF (SPKENABLE)
 	.DW	SP_INIT			; AUDIBLE INDICATOR OF BOOT START
 #ENDIF
@@ -3006,6 +3055,9 @@ HB_INITTBL:
 #IF (DSRTCENABLE)
 	.DW	DSRTC_INIT
 #ENDIF
+#IF (DS1501RTCENABLE)
+	.DW	DS1501RTC_INIT
+#ENDIF
 #IF (BQRTCENABLE)
 	.DW	BQRTC_INIT
 #ENDIF
@@ -3070,7 +3122,6 @@ HB_INITTBL:
 #IF (PPPENABLE)
 	.DW	PPP_INIT
 #ENDIF
-
 ;
 HB_INITTBLLEN	.EQU	(($ - HB_INITTBL) / 2)
 ;
@@ -3123,7 +3174,7 @@ HB_DISPATCH:
 	PUSH	AF
 	LD	A,(HB_STACK - HB_STKSIZ + $08)
 	CP	$FF
-	CALL	SYSCHK
+	SYSCHKERR(ERR_INTERNAL)
 	LD	A,$FF
 	LD	(HB_STACK - HB_STKSIZ + $08),A
 	POP	AF
@@ -3151,9 +3202,7 @@ HB_DISPATCH1:
 	; FALL THRU
 ;
 HB_DISPERR:
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ;==================================================================================================
@@ -3494,7 +3543,7 @@ HB_DSKFN:
 HB_DSKFNADR	.EQU	$+1
 	CALL	PANIC			; READ ONE SECTOR
 #IF (DIAGENABLE & DIAGDISKIO)
-	DIAG(0)				; CLEAR DIAG LEDS
+	DIAG(DIAG_00)				; CLEAR DIAG LEDS
 #ENDIF
 #IF (LEDENABLE & LEDDISKIO)
 	LED($00)
@@ -3615,9 +3664,7 @@ RTC_DISPATCH:
 	RET
 ;
 RTC_DISPERR:
-	CALL	SYSCHK
-	LD	A,ERR_NOHW
-	OR	A
+	SYSCHKERR(ERR_NOHW)
 	RET
 ;
 ; SET RTC DISPATCH ADDRESS, USED BY RTC DRIVERS DURING INIT
@@ -3715,7 +3762,7 @@ SND_ADDENT:
 ;	WORD	UNIT SPECIFIC DATA (TYPICALLY A DEVICE INSTANCE DATA ADDRESS)
 ;
 SND_FNCNT	.EQU	8		; NUMBER OF SND FUNCS (FOR RANGE CHECK)
-SND_MAX		.EQU	4		; UP TO 4 UNITS
+SND_MAX		.EQU	5		; UP TO 5 UNITS
 SND_SIZ		.EQU	SND_MAX * 4	; EACH ENTRY IS 4 BYTES
 ;
 		.DB	SND_FNCNT	; SND FUNCTION COUNT (FOR RANGE CHECK)
@@ -3727,7 +3774,7 @@ SND_TBL		.FILL	SND_SIZ,0	; SPACE FOR ENTRIES
 ;   SPEAKER BEEP ROUTINE
 ;==================================================================================================
 ;
-; ROUTINE TO BEEP THE DEAULT SOUND UNIT
+; ROUTINE TO BEEP THE DEFAULT SOUND UNIT
 ; NEED TO CHECK FOR EXISTENCE OF SOUND UNIT
 ; WHICH CHANNEL SHOULD BE USED?  IS THERE A GOOD DEFAULT CHANNEL?
 ;
@@ -3815,9 +3862,7 @@ SYS_RESET:
 	JR	Z,SYS_RESCOLD
 	CP	BF_SYSRES_USER
 	JR	Z,SYS_RESUSER
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A			; SIGNAL ERROR
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ; SOFT RESET HBIOS, RELEASE HEAP MEMORY NOT USED BY HBIOS
@@ -4021,9 +4066,7 @@ SYS_ALLOC:
 ; ALL OTHER REGISTERS PRESERVED
 ;
 SYS_FREE:
-	CALL	SYSCHK			; NOT YET IMPLEMENTED
-	LD	A,ERR_NOTIMPL		; NOT YET INMPLEMENTED
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOTIMPL)		; NOT YET INMPLEMENTED
 	RET
 ;
 ; GET SYSTEM INFORMATION
@@ -4063,9 +4106,7 @@ SYS_GET:
 	JP	Z,SYS_GETBNKINFO
 	CP	BF_SYSGET_CPUSPD
 	JP	Z,SYS_GETCPUSPD
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOFUNC)		; SIGNAL ERROR
 	RET
 ;
 ; GET TIMER
@@ -4152,7 +4193,7 @@ SYS_GETBNKINFO:
 	XOR	A
 	RET
 ;
-; GET SYSTEM CPU SPEED ORMANCE ATTRIBUTES
+; GET SYSTEM CPU SPEED PERFORMANCE ATTRIBUTES
 ;   RETURNS:
 ;     L: CLOCK MULT (0:HALF, 1:FULL, 2: DOUBLE)
 ;     D: MEMORY WAIT STATES
@@ -4357,9 +4398,7 @@ SYS_SET:
 	JR	Z,SYS_SETBOOTINFO
 	CP	BF_SYSSET_CPUSPD
 	JR	Z,SYS_SETCPUSPD
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOFUNC)		; SIGNAL ERROR
 	RET
 ;
 ; SET BOOT INFORMATION
@@ -4720,9 +4759,7 @@ SYS_INT:
 	JR	Z,SYS_INTGET
 	CP	BF_SYSINT_SET
 	JR	Z,SYS_INTSET
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOFUNC)		; SIGNAL ERROR
 	RET
 ;
 ; GET INTERRUPT SYSTEM INFORMATION
@@ -4748,9 +4785,7 @@ SYS_INTINFO:
 ;
 SYS_INTVECADR:
 #IF (INTMODE == 0)
-	CALL	SYSCHK			; INVALID FOR INT MODE 0
-	LD	A,ERR_BADCFG		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_BADCFG)		; SIGNAL ERROR. INVALID FOR INT MODE 0
 	RET
 #ENDIF
 #IF (INTMODE == 1)
@@ -4764,9 +4799,7 @@ SYS_INTVECADR:
 	LD	A,E			; INCOMING INDEX POSITION TO A
 	CP	C			; COMPARE TO VECTOR COUNT
 	JR	C,SYS_INTGET1		; CONTINUE IF POSITION IN RANGE
-	CALL	SYSCHK			; ELSE ERROR
-	LD	A,ERR_RANGE		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_RANGE)		; ELSE ERROR
 	RET
 SYS_INTGET1:
 	OR	A			; CLEAR CARRY
@@ -5247,15 +5280,11 @@ HB_DISPCALC:
 	RET				; JUMP TO DRIVER FUNC ADR ON TOS
 ;
 HB_FUNCERR:
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOFUNC)		; SIGNAL ERROR
 	RET
 ;
 HB_UNITERR:
-	CALL	SYSCHK
-	LD	A,ERR_NOUNIT		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOUNIT)		; SIGNAL ERROR
 	RET
 ;
 ; ADD AN ENTRY TO THE UNIT TABLE AT ADDRESS IN HL
@@ -5342,9 +5371,7 @@ HB_ALLOC:
 HB_ALLOC1:
 	; ERROR RETURN
 	POP	DE			; RESTORE INCOMING DE
-	CALL	SYSCHK
-	LD	A,ERR_NOMEM		; SIGNAL ERROR
-	OR	A			; SET FLAGS
+	SYSCHKERR(ERR_NOMEM)		; SIGNAL ERROR
 	RET
 ;
 HB_TMPSZ	.DW	0
@@ -5773,6 +5800,15 @@ SIZ_DSRTC	.EQU	$ - ORG_DSRTC
 		.ECHO	" bytes.\n"
 #ENDIF
 ;
+#IF (DS1501RTCENABLE)
+ORG_DS1501RTC	.EQU	$
+  #INCLUDE "ds1501rtc.asm"
+SIZ_DS1501RTC	.EQU	$ - ORG_DS1501RTC
+		.ECHO	"DS1501RTC occupies "
+		.ECHO	SIZ_DS1501RTC
+		.ECHO	" bytes.\n"
+#ENDIF
+;
 #IF (BQRTCENABLE)
 ORG_BQRTC	.EQU	$
   #INCLUDE "bqrtc.asm"
@@ -6019,7 +6055,7 @@ SIZ_FONTS	.EQU	$ - ORG_FONTS
 		.ECHO	SIZ_FONTS
 		.ECHO	" bytes.\n"
 ;
-#IF (CVDUENABLE | VGAENABLE) | GDCENABLE | (TMSENABLE & ((TMSMODE == TMSMODE_RCKBD) | (TMSMODE == TMSMODE_MBC)))
+#IF (CVDUENABLE | VGAENABLE) | GDCENABLE | (TMSENABLE & ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC)))
 ORG_KBD		.EQU	$
   #INCLUDE "kbd.asm"
 SIZ_KBD		.EQU	$ - ORG_KBD
@@ -6177,6 +6213,14 @@ SIZ_AY38910	.EQU	$ - ORG_AY38910
 		.ECHO	SIZ_AY38910
 		.ECHO	" bytes.\n"
 #ENDIF
+#IF (YM2612ENABLE)
+ORG_YM2612	.EQU	$
+  #INCLUDE "ym2612.asm"
+SIZ_YM2612	.EQU	$ - ORG_YM2612
+		.ECHO	"YM2612 occupies "
+		.ECHO	SIZ_YM2612
+		.ECHO	" bytes.\n"
+#ENDIF
 ;
 		.ECHO	"RTCDEF="
 		.ECHO	RTCDEF
@@ -6323,7 +6367,7 @@ HB_RDSEC:
 ;
 ; SYSTEM CHECK: DUMP MACHINE STATE AND CONTINUE?
 ;
-SYSCHK:
+SYSCHKA:
 	; CHECK DIAG LEVEL TO SEE IF WE SHOULD DISPLAY
 	PUSH	AF			; PRESERVE INCOMING AF VALUE
 	LD	A,(CB_DIAGLVL)		; GET DIAGNOSTIC LEVEL
@@ -6337,6 +6381,17 @@ SYSCHK:
 	CALL	WRITESTR		; PRINT IT
 	POP	DE			; RESTORE DE VALUE
 	CALL	XREGDMP			; DUMP REGISTERS
+
+	; DISPLAY ERROR CODE. IT IS AT RETURN ADDRESS+1 .. LD A,XX
+	EX	(SP),HL			; GET RETURN ADDRESS
+	INC	HL			; POINT TO THE ERROR CODE
+	PUSH	AF
+	LD	A,(HL)			; DISPLAY
+	CALL	PRTHEXBYTE
+	POP	AF
+	DEC	HL			; RESTORE RETURN ADDRESS
+	EX	(SP),HL
+;
 	JR	CONTINUE		; CHECK W/ USER
 ;
 SYSCHK1:
@@ -6546,7 +6601,8 @@ PS_PRTDC:
 	RES	7,D			; CLEAR LBA BIT
 	LD	B,11			; 11 BIT SHIFT TO CONVERT BLOCKS --> MB
 	CALL	SRL32			; RIGHT SHIFT
-	CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+	;CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+	CALL	PRTDEC32		; PRINT DWORD IN DECIMAL
 	PRTS("MB$")			; PRINT SUFFIX
 	CALL	PC_COMMA
 	PRTS("LBA$")			; FOR NOW, WE ASSUME HARD DISK DOES LBA
@@ -6560,7 +6616,8 @@ PS_PRTDC1:
 	RES	7,D			; CLEAR LBA BIT
 	LD	B,1			; 11 BIT SHIFT TO CONVERT BLOCKS --> MB
 	CALL	SRL32			; RIGHT SHIFT
-	CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+	;CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+	CALL	PRTDEC32		; PRINT DWORD IN DECIMAL
 	PRTS("KB$")			; PRINT SUFFIX
 	CALL	PC_COMMA
 	PRTS("LBA$")			; FOR NOW, WE ASSUME HARD DISK DOES LBA
@@ -6803,7 +6860,7 @@ PS_SOUND:
 
 	; DEVICE COLUMN
 
-	PUSH	BC			;
+	PUSH	BC
 	LD	E,C
 	XOR	A
 	LD	DE,PS_SDSND		; POINT TO DEVICE TYPE NAME TABLE
@@ -6811,12 +6868,10 @@ PS_SOUND:
 	LD	A,C			; MOVE UNIT NUM TO A
 	CALL	PRTDECB			; PRINT IT
 	CALL	PC_COLON
-	CP	10			; CHECK FOR MULTIPLE DIGITS
-	CALL	C,PC_SPACE		; EXTRA SPACE IF NEEDED
 	LD	A,(PRTIDXCNT)
-	SUB	9+1
-	CPL
-	CALL	PS_PAD
+	SUB	12-1			; SUBTRACT FIELD WIDTH (LESS THE COLON)
+	NEG				; MAKE IT A POSITIVE NUMBER
+	CALL	PS_PAD			; PAD AS NEEDED
 	POP	BC
 
 	; DEVICE TYPE
@@ -6833,9 +6888,9 @@ PS_SOUND:
 	LD	DE,PS_SDSN76489
 	CALL	PRTIDXDEA
 	LD	A,(PRTIDXCNT)
-	SUB	18+1
-	CPL
-	CALL	PS_PAD			; PAD N SPACES (SPECIFIED IN A)
+	SUB	18			; SUBTRACT FIELD WIDTH
+	NEG				; MAKE IT A POSITIVE NUMBER
+	CALL	PS_PAD			; PAD AS NEEDED
 
 	; DEVICE CHARACTERISTICS
 ;
@@ -6877,7 +6932,7 @@ PS_PRTDEV:
 	CALL	PS_PAD			; PAD N SPACES (SPECIFIED IN A)
 	RET
 ;
-; PRINT DEVICE NMEMONIC, DEVTYP/NUM SPECIFIED IN DE
+; PRINT DEVICE MNEMONIC, DEVTYP/NUM SPECIFIED IN DE
 ;
 PS_PRTNUL:
 	LD	HL,PS_STRNUL
@@ -7023,6 +7078,7 @@ PS_SDSND	.TEXT	"SND$"
 PS_SDSN76489	.TEXT	"SN76489$"
 PS_SDAY38910	.TEXT	"AY-3-8910$"
 PS_SDBITMODE	.TEXT	"I/O PORT$"
+PS_SDYM2612	.TEXT	"YM2612$"
 ;
 ;			 0	   1	     2	       3	 4	   5	     6	       7
 ;			 01234567890123456789012345678901234567890123456789012345678901234567890123456789

Source/HBIOS/hbios.inc

@@ -156,6 +156,111 @@ ERR_TIMEOUT		.EQU	-11	; DEVICE TIMEOUT
 ERR_BADCFG		.EQU	-12	; INVALID CONFIGURATION
 ERR_INTERNAL		.EQU	-13	; INTERNAL ERROR
 ;
+; HBIOS DIAG OPTIONS
+;
+DIAG_PROG	.EQU	0		; PROGRESS BAR
+DIAG_STEP	.EQU	1		; STEP BAR
+DIAG_ASCII	.EQU	2		; 8-BIT ASCII 30H - 39H
+DIAG_BINARY	.EQU	3		; BINARY 00H - 09H
+DIAG_7SEG	.EQU	4		; 7-SEGMENT
+DIAG_FLASH	.EQU	5		; FLASH
+DIAG_TRIG	.EQU	6		; TRIGGER
+;
+DIAG_DISP	.EQU	DIAG_PROG	; DEFAULT
+;
+#IF (DIAG_DISP == DIAG_PROG)
+DIAG_00 .EQU 00000000B	
+DIAG_01 .EQU 00000001B 
+DIAG_02 .EQU 00000011B 
+DIAG_03 .EQU 00000111B 
+DIAG_04 .EQU 00001111B 
+DIAG_05 .EQU 00011111B 
+DIAG_06 .EQU 00111111B 
+DIAG_07 .EQU 01111111B 
+DIAG_08 .EQU 11111111B 
+DIAG_09 .EQU 11111111B   
+#ENDIF
+;
+#IF (DIAG_DISP == DIAG_STEP)
+DIAG_00 .EQU 00000000B	
+DIAG_01 .EQU 00000001B 
+DIAG_02 .EQU 00000010B 
+DIAG_03 .EQU 00000100B 
+DIAG_04 .EQU 00001000B 
+DIAG_05 .EQU 00010000B 
+DIAG_06 .EQU 00100000B 
+DIAG_07 .EQU 01000000B 
+DIAG_08 .EQU 10000000B
+DIAG_09 .EQU 11111111B
+#ENDIF
+;
+#IF (DIAG_DISP == DIAG_ASCII)
+DIAG_00 .EQU '0'	
+DIAG_01 .EQU '1'
+DIAG_02 .EQU '2' 
+DIAG_03 .EQU '3' 
+DIAG_04 .EQU '4'
+DIAG_05 .EQU '5'
+DIAG_06 .EQU '6' 
+DIAG_07 .EQU '7'
+DIAG_08 .EQU '8' 
+DIAG_09 .EQU '9' 
+#ENDIF
+;
+#IF (DIAG_DISP == DIAG_BINARY)
+DIAG_00 .EQU 0	
+DIAG_01 .EQU 1
+DIAG_02 .EQU 2
+DIAG_03 .EQU 3
+DIAG_04 .EQU 4
+DIAG_05 .EQU 5
+DIAG_06 .EQU 6
+DIAG_07 .EQU 7
+DIAG_08 .EQU 8
+DIAG_09 .EQU 9 
+#ENDIF
+;
+#IF (DIAG_DISP == DIAG_7SEG)
+;             abcdefg
+DIAG_00 .EQU 00000000B ; BLANK
+DIAG_01 .EQU 01111110B ; 0
+DIAG_02 .EQU 00110000B ; 1
+DIAG_03 .EQU 01101101B ; 2
+DIAG_04 .EQU 01111001B ; 3 
+DIAG_05 .EQU 00110011B ; 4
+DIAG_06 .EQU 01011011B ; 5
+DIAG_07 .EQU 00011111B ; 6 
+DIAG_08 .EQU 01110000B ; 7
+DIAG_09 .EQU 01111111B ; 8
+DIAG_10 .EQU 01110011B ; 9
+#ENDIF
+;
+#IF (DIAG_DISP == DIAG_FLASH)
+DIAG_00 .EQU 00000000B ; OFF	
+DIAG_01 .EQU 11111111B ; ON
+DIAG_02 .EQU 00000000B ; OFF	
+DIAG_03 .EQU 11111111B ; ON
+DIAG_04 .EQU 00000000B ; OFF	
+DIAG_05 .EQU 11111111B ; ON
+DIAG_06 .EQU 00000000B ; OFF	
+DIAG_07 .EQU 11111111B ; ON
+DIAG_08 .EQU 00000000B ; OFF	
+DIAG_09 .EQU 11111111B ; ON 
+#ENDIF
+;
+#IF (DIAG_DISP == DIAG_TRIG)
+DIAG_00 .EQU 11111111B ; ON	
+DIAG_01 .EQU 11111111B ; ON
+DIAG_02 .EQU 11111111B ; ON
+DIAG_03 .EQU 11111111B ; ON
+DIAG_04 .EQU 11111111B ; ON
+DIAG_05 .EQU 11111111B ; ON
+DIAG_06 .EQU 11111111B ; ON
+DIAG_07 .EQU 11111111B ; ON
+DIAG_08 .EQU 11111111B ; ON
+DIAG_09 .EQU 11111111B ; ON 
+#ENDIF
+;
 ; MEDIA ID VALUES
 ;
 MID_NONE	.EQU	0
@@ -228,6 +333,7 @@ VDADEV_VGA	.EQU	$40		; ECB VGA3 - HITACHI HD6445
 SNDDEV_SN76489	.EQU	$00
 SNDDEV_AY38910	.EQU	$10
 SNDDEV_BITMODE	.EQU	$20
+SNDDEV_YM2612	.EQU	$30
 ;
 ; HBIOS CONTROL BLOCK OFFSETS
 ; WARNING: THESE OFFSETS WILL CHANGE SIGNIFICANTLY BETWEEN RELEASES

Source/HBIOS/hdsk.asm

@@ -121,9 +121,7 @@ HDSK_FNTBL:
 HDSK_VERIFY:
 HDSK_FORMAT:
 HDSK_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)			; INVALID SUB-FUNCTION
 	RET
 ;
 ;

Source/HBIOS/ide.asm

@@ -415,7 +415,8 @@ IDE_INIT5:
 	PRTS(" SIZE=$")			; PRINT FIELD LABEL
 	LD	B,11			; 11 BIT SHIFT TO CONVERT BLOCKS --> MB
 	CALL	SRL32			; RIGHT SHIFT
-	CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+	;CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+	CALL	PRTDEC32		; PRINT DWORD IN DECIMAL
 	PRTS("MB$")			; PRINT SUFFIX
 ;
 	RET
@@ -461,9 +462,7 @@ IDE_FNTBL:
 IDE_VERIFY:
 IDE_FORMAT:
 IDE_DEFMED:
-	CALL	SYSCHK			; NOT IMPLEMENTED
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)			; NOT IMPLEMENTED
 	RET
 ;
 ;
@@ -1253,12 +1252,22 @@ IDE_INITDEV00:
 	; THEY ARE NOT RECOMMENDED BY THE CF CARD SPEC AND MIGHT
 	; OVERLAP WITH "REAL" HARD DISK SIGNATURES.  I HAVE NEVER
 	; SEEN A CF CARD THAT DID NOT USE ONE OF THE BELOW.
-	; CREDIT TO LASZLO SZOLNOKI 
+	; CREDIT TO LASZLO SZOLNOKI
+;
+#IF (IDETRACE >= 3)
+	CALL	IDE_PRTPREFIX
+	PRTS("SIG=0x$")
+	LD	BC,(HB_WRKBUF)
+	CALL	PRTHEXWORD
+#ENDIF
+;
 	LD	BC,$848A		; STANDARD CF CARD SIGNATURE
 	CALL	IDE_INITDEV000		; TEST & SET
-	LD	BC,$044A		; ALT SIG FOR NON-REMOVABLE
+	LD	BC,$044A		; ALT SIG FOR CF
 	CALL	IDE_INITDEV000		; TEST & SET
-	LD	BC,$0040		; ALT SIG FOR NON-REMOVABLE
+	LD	BC,$045A		; ALT SIG FOR CF
+	CALL	IDE_INITDEV000		; TEST & SET
+	LD	BC,$0040		; ALT SIG FOR CF NON-REMOVABLE
 	CALL	IDE_INITDEV000		; TEST & SET
 	JR	IDE_INITDEV1		; CONTINUE INIT
 ;

Source/HBIOS/intrtc.asm

@@ -56,9 +56,7 @@ INTRTC_DISPATCH:
 	JP	Z,INTRTC_SETALM	; SET ALARM 
 	DEC	A
 	JP	Z,INTRTC_DEVICE	; REPORT RTC DEVICE INFO
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ; NVRAM FUNCTIONS ARE NOT AVAILABLE IN SIMULATOR
@@ -69,9 +67,7 @@ INTRTC_GETBLK:
 INTRTC_SETBLK:
 INTRTC_GETALM:
 INTRTC_SETALM:
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;
 ; RTC GET TIME
@@ -205,7 +201,7 @@ INTRTC_INT2:
 	JR	NZ,INTRTC_INTX		; NOPE, DONE
 	LD	(HL),0			; BACK TO YEAR ZERO
 INTRTC_INTX:
-	JP	SYSCHK
+	JP	PANIC
 INTRTC_VEC	.EQU	$-2
 ;
 ; CONVERT FROM BINARY BUF (HL) TO BCD BUF (DE)

Source/HBIOS/md.asm

@@ -157,9 +157,7 @@ MD_FNTBL:
 MD_VERIFY:
 MD_FORMAT:
 MD_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; INVALID SUB-FUNCTION
 	RET
 ;
 ;
@@ -182,9 +180,7 @@ MD_CAP:					; ASSUMES THAT UNIT 0 IS RAM, UNIT 1 IS ROM
 	JR	Z,MD_CAP0		; UNIT 0
 	DEC	A			; TRY UNIT 1
 	JR	Z,MD_CAP1		; UNIT 1
-	CALL	SYSCHK			; INVALID UNIT
-	LD	A,ERR_NOUNIT
-	OR	A
+	SYSCHKERR(ERR_NOUNIT)		; INVALID UNIT
 	RET
 MD_CAP0:
 	LD	A,(HCB + HCB_RAMBANKS)	; POINT TO RAM BANK COUNT

Source/HBIOS/pio_ps.asm

@@ -605,7 +605,7 @@ PIOMIVT(PIO3IN,PI3_IST,PRTTAB+3)
 #DEFCONT ;\
 #DEFCONT ;	WAIT FOR SPACE FOR THE CHARACTER\
 #DEFCONT ;	IF WE ARE WAITING FOR A		\
-#DEFCONT ;	CHARACTRE THEN OUTPUT IT NOW	\
+#DEFCONT ;	CHARACTER THEN OUTPUT IT NOW	\
 #DEFCONT ;	OTHERWISE STORE IT UNTIL THE	\
 #DEFCONT ;	INTERRUPT CALLS FOR IT		\
 #DEFCONT ;\

Source/HBIOS/ppide.asm

@@ -411,7 +411,8 @@ PPIDE_INIT5:
 	PRTS(" SIZE=$")			; PRINT FIELD LABEL
 	LD	B,11			; 11 BIT SHIFT TO CONVERT BLOCKS --> MB
 	CALL	SRL32			; RIGHT SHIFT
-	CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+;	CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+	CALL	PRTDEC32		; PRINT DWORD IN DECIMAL
 	PRTS("MB$")			; PRINT SUFFIX
 ;
 	RET
@@ -470,9 +471,7 @@ PPIDE_FNTBL:
 PPIDE_VERIFY:
 PPIDE_FORMAT:
 PPIDE_DEFMED:
-	CALL	SYSCHK			; NOT IMPLEMENTED
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; NOT IMPLEMENTED
 	RET
 ;
 ;
@@ -1278,12 +1277,22 @@ PPIDE_INITDEV00:
 	; THEY ARE NOT RECOMMENDED BY THE CF CARD SPEC AND MIGHT
 	; OVERLAP WITH "REAL" HARD DISK SIGNATURES.  I HAVE NEVER
 	; SEEN A CF CARD THAT DID NOT USE ONE OF THE BELOW.
-	; CREDIT TO LASZLO SZOLNOKI 
+	; CREDIT TO LASZLO SZOLNOKI
+;
+#IF (PPIDETRACE >= 3)
+	CALL	IDE_PRTPREFIX
+	PRTS("SIG=0x$")
+	LD	BC,(HB_WRKBUF)
+	CALL	PRTHEXWORD
+#ENDIF
+;
 	LD	BC,$848A		; STANDARD CF CARD SIGNATURE
 	CALL	PPIDE_INITDEV000	; TEST & SET
-	LD	BC,$044A		; ALT SIG FOR NON-REMOVABLE
+	LD	BC,$044A		; ALT SIG FOR CF
 	CALL	PPIDE_INITDEV000	; TEST & SET
-	LD	BC,$0040		; ALT SIG FOR NON-REMOVABLE
+	LD	BC,$045A		; ALT SIG FOR CF
+	CALL	PPIDE_INITDEV000	; TEST & SET
+	LD	BC,$0040		; ALT SIG FOR CF NON-REMOVABLE
 	CALL	PPIDE_INITDEV000	; TEST & SET
 	JR	PPIDE_INITDEV1		; CONTINUE INIT
 ;

Source/HBIOS/ppp.asm

@@ -338,9 +338,7 @@ PPPCON_OST:
 ;
 ;
 PPPCON_INITDEV:
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;
 ;
@@ -476,7 +474,8 @@ PPPSD_INITUNIT:
 	PRTS(" SIZE=$")			; PRINT FIELD LABEL
 	LD	B,11			; 11 BIT SHIFT TO CONVERT BLOCKS --> MB
 	CALL	SRL32			; RIGHT SHIFT
-	CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+	;CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+	CALL	PRTDEC32		; PRINT DWORD IN DECIMAL
 	PRTS("MB$")			; PRINT SUFFIX
 ;
 	XOR	A			; SIGNAL SUCCESS
@@ -504,9 +503,7 @@ PPPSD_FNTBL:
 PPPSD_VERIFY:
 PPPSD_FORMAT:
 PPPSD_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; INVALID SUB-FUNCTION
 	RET
 ;
 ;

Source/HBIOS/prp.asm

@@ -211,9 +211,7 @@ PRPCON_OST1:
 ;
 ;
 PRPCON_INITDEV:
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;
 ;
@@ -373,7 +371,8 @@ PRPSD_INITUNIT:
 	PRTS(" SIZE=$")			; PRINT FIELD LABEL
 	LD	B,11			; 11 BIT SHIFT TO CONVERT BLOCKS --> MB
 	CALL	SRL32			; RIGHT SHIFT
-	CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+	;CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+	CALL	PRTDEC32		; PRINT DWORD IN DECIMAL
 	PRTS("MB$")			; PRINT SUFFIX
 ;
 	XOR	A			; SIGNAL SUCCESS
@@ -401,9 +400,7 @@ PRPSD_FNTBL:
 PRPSD_VERIFY:
 PRPSD_FORMAT:
 PRPSD_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; INVALID SUB-FUNCTION
 	RET
 ;
 ;

Source/HBIOS/rf.asm

@@ -138,9 +138,7 @@ RF_FNTBL:
 RF_VERIFY:
 RF_FORMAT:
 RF_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; INVALID SUB-FUNCTION
 	RET
 ;
 ;

Source/HBIOS/romldr.asm

@@ -499,10 +499,50 @@ setcon:
 	call	skipws			; skip whitespace
 	call	isnum			; do we have a number?
 	jp	nz,docon		; if no we don't change baudrate
-	call	getnum			; parse a number
-	jp	c,err_invcmd		; handle overflow error
+	call	getbnum			; return in HL:BC
 ;
-	cp	32			; handle invalid
+	ld	e,32			; search baud rate table
+	push	de			; for a matching entry
+	ld	de,tbl_baud
+nextbaud:
+	ex	de,hl			; hl = tbl_baud, de = msw
+	ld	a,d			; check all four bytes
+	cp	(hl)			; against HL:BC
+	inc	hl			; exit to next table
+	jr	nz,mm1			; entry on mismatch
+	ld	a,e
+	cp	(hl)
+	inc	hl
+	jr	nz,mm2
+	ld	a,b
+	cp	(hl)
+	inc	hl
+	jr	nz,mm3
+	ld	a,c
+	cp	(hl)
+	inc	hl
+	jr	nz,mm4
+;
+	; we have a match
+	pop	de			; get our count value
+	ld	a,32
+	sub	e
+	jr	s_exit
+;
+mm1:	inc	hl
+mm2:	inc	hl
+mm3:	inc	hl
+mm4:	ex	(sp),hl			; hl = count value, stack = tbl_baud, de = msw
+	dec	l
+	ex	(sp),hl			; hl = tbl_baud, stack= count
+	ex	de,hl			; hl = msw, de = tbl_baud
+	jr	nz,nextbaud
+;
+	; Failed to match
+	pop	de
+	jp	err_invcmd
+;
+s_exit:	cp	32			; handle invalid
 	jp	nc,err_invcmd		; baud rate
 	bit	0,a
 	jr	z,iseven		; convert sequential
@@ -512,6 +552,7 @@ setcon:
 iseven:	dec	a			; 15=19200
 	srl	a			; 17=38400
 	add	a,16			; 20=115200
+;
 setspd:	ld	(newspeed),a		; save validated baud rate
 ;
 	ld	hl,str_chspeed		; notify user
@@ -554,7 +595,92 @@ docon:	ld	hl,str_newcon		; new console msg
 	call	nl2			; formatting
 	ld	hl,str_banner		; display boot banner
 	call	pstr			; do it
-	ret				; done
+	ret
+;
+;=======================================================================
+; Get numeric chars at DE and convert to BCD number returned in HL:BC
+;=======================================================================
+;
+getbnum:ld	bc,0		; lsw
+	ld	hl,0		; msw
+getbnum1:
+	ld	a,(de)		; get the active char
+	cp	'0'		; compare to ascii '0'
+	jr	c,getbnum2	; abort if below
+	cp	'9' + 1		; compare to ascii '9'
+	jr	nc,getbnum2	; abort if above
+;
+	sub	'0'		; convert '0'-'9' to 0-9
+;
+	push	de		; save char posn
+	push	hl		; save hl bcd
+;
+	ld	hl,tmpbcd	; rotate 1 nyble in A
+	ld	(hl),c		; through HL:BC
+	rld
+	ld	c,(hl)
+	ld	(hl),b
+	rld
+	ld	b,(hl)
+	pop	de		; get hl bcd
+	ld	(hl),e
+	rld
+	ld	e,(hl)
+	ld	(hl),d
+	rld
+	ld	d,(hl)
+	ld	h,d
+	ld	l,e
+;
+	pop	de		; get char posn
+	inc	de		; bump to next char
+	jr	getbnum1	; loop
+;
+getbnum2:
+	or	a		; with flags set, CF is cleared
+	ret
+;
+tmpbcd:	.db	0		
+;
+#DEFINE PACK(a,b,c,d,e,f,g) \
+#DEFCONT \ 	.db	(16*('0'-'0'))+(a-'0'))
+#DEFCONT \ 	.db	(16*(b-'0'))+(c-'0'))
+#DEFCONT \ 	.db	(16*(d-'0'))+(e-'0'))
+#DEFCONT \ 	.db	(16*(f-'0'))+(g-'0'))	
+;
+tbl_baud:
+	PACK('0','0','0','0','0','7','5') ;      75  0 >  0
+	PACK('0','0','0','0','1','5','0') ;     150  1 >  1
+	PACK('0','0','0','0','2','2','5') ;     225  2 > 16
+	PACK('0','0','0','0','3','0','0') ;     300  3 >  2
+	PACK('0','0','0','0','4','5','0') ;     450  4 > 17
+	PACK('0','0','0','0','6','0','0') ;     600  5 >  3
+	PACK('0','0','0','0','9','0','0') ;     900  6 > 18
+	PACK('0','0','0','1','2','0','0') ;    1200  7 >  4
+	PACK('0','0','0','1','8','0','0') ;    1800  8 > 19
+	PACK('0','0','0','2','4','0','0') ;    2400  9 >  5
+	PACK('0','0','0','3','6','0','0') ;    3600 10 > 20
+	PACK('0','0','0','4','8','0','0') ;    4800 11 >  6
+	PACK('0','0','0','7','2','0','0') ;    7200 12 > 21
+	PACK('0','0','0','9','6','0','0') ;    9600 13 >  7
+	PACK('0','0','1','4','4','0','0') ;   14400 14 > 22
+	PACK('0','0','1','9','2','0','0') ;   19200 15 >  8
+	PACK('0','0','2','8','8','0','0') ;   28800 16 > 23
+	PACK('0','0','3','8','4','0','0') ;   38400 17 >  9
+	PACK('0','0','5','7','6','0','0') ;   57600 18 > 24
+	PACK('0','0','7','6','8','0','0') ;   76800 19 > 10
+	PACK('0','1','1','5','2','0','0') ;  115200 20 > 25
+	PACK('0','1','5','3','6','0','0') ;  153600 21 > 11
+	PACK('0','2','3','0','4','0','0') ;  230400 22 > 26
+	PACK('0','3','0','7','2','0','0') ;  307200 23 > 12
+	PACK('0','4','6','0','8','0','0') ;  460800 24 > 27
+	PACK('0','6','1','4','4','0','0') ;  614400 25 > 13
+	PACK('0','9','2','1','6','0','0') ;  921600 26 > 28
+	PACK('1','2','2','8','8','0','0') ; 1228800 27 > 14
+	PACK('1','8','4','3','2','0','0') ; 1843200 28 > 29
+	PACK('2','4','5','7','6','0','0') ; 2457600 29 > 15
+	PACK('3','6','8','6','4','0','0') ; 3686400 30 > 30
+	PACK('7','3','7','2','8','0','0') ; 7372800 31 > 31
 ;
 #endif
 ;

Source/HBIOS/rp5rtc.asm

@@ -159,9 +159,7 @@ RP5RTC_DISPATCH:
 	JP	Z,RP5RTC_SETALM		; SET ALARM
 	DEC	A
 	JP	Z,RP5RTC_DEVICE		; REPORT RTC DEVICE INFO
-	CALL	SYSCHK
-	LD	A, ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ; RTC GET NVRAM BYTE
@@ -240,9 +238,7 @@ RP5RTC_GETBLK:
 RP5RTC_SETBLK:
 RP5RTC_GETALM:
 RP5RTC_SETALM:
-	LD	A, ERR_NOTIMPL
-	CALL	SYSCHK
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;
 ; RTC GET TIME

Source/HBIOS/sd.asm

@@ -128,6 +128,7 @@ SD_CLK		.EQU	%00000010	; RTC:1 IS CLOCK
 SD_DI		.EQU	%00000001	; RTC:0 IS DATA IN (CARD <- CPU)
 SD_DO		.EQU	%10000000	; RTC:7 IS DATA OUT (CARD -> CPU)
 SD_IOBASE	.EQU	SD_OPRREG	; IOBASE
+SD_INVCS	.EQU	FALSE		; INVERT CS
 ;
 RTCDEF		.SET	RTCDEF | SD_OPRDEF	; SET DEFAULT IN HBIOS MAINLINE
 #ENDIF
@@ -143,6 +144,7 @@ SD_CLK		.EQU	%00000010	; RTC:1 IS CLOCK
 SD_DI		.EQU	%00000001	; RTC:0 IS DATA IN (CARD <- CPU)
 SD_DO		.EQU	%01000000	; RTC:6 IS DATA OUT (CARD -> CPU)
 SD_IOBASE	.EQU	SD_OPRREG	; IOBASE
+SD_INVCS	.EQU	FALSE		; INVERT CS
 ;
 RTCDEF		.SET	RTCDEF | SD_OPRDEF	; SET DEFAULT IN HBIOS MAINLINE
 #ENDIF
@@ -156,6 +158,7 @@ SD_CS0		.EQU	%00000100	; RTC:2 IS SELECT
 SD_CNTR		.EQU	Z180_CNTR
 SD_TRDR		.EQU	Z180_TRDR
 SD_IOBASE	.EQU	SD_OPRREG	; IOBASE
+SD_INVCS	.EQU	FALSE		; INVERT CS
 ;
 RTCDEF		.SET	RTCDEF | SD_OPRDEF	; SET DEFAULT IN HBIOS MAINLINE
 #ENDIF
@@ -174,6 +177,7 @@ SD_CLK		.EQU	%00000010	; PPIC:1 IS CLOCK
 SD_DI		.EQU	%00000001	; PPIC:0 IS DATA IN (CARD <- CPU)
 SD_DO		.EQU	%10000000	; PPIB:7 IS DATA OUT (CARD -> CPU)
 SD_IOBASE	.EQU	SD_PPIBASE	; IOBASE
+SD_INVCS	.EQU	TRUE		; INVERT CS
 #ENDIF
 ;
 #IF (SDMODE == SDMODE_UART)
@@ -187,6 +191,7 @@ SD_CLK		.EQU	%00000100	; UART MCR:2 IS CLOCK
 SD_DI		.EQU	%00000001	; UART MCR:0 IS DATA IN (CARD <- CPU)
 SD_DO		.EQU	%00100000	; UART MSR:5 IS DATA OUT (CARD -> CPU)
 SD_IOBASE	.EQU	UARTIOB		; IOBASE
+SD_INVCS	.EQU	TRUE		; INVERT CS
 #ENDIF
 ;
 #IF (SDMODE == SDMODE_DSD)		; DUAL SD
@@ -201,6 +206,7 @@ SD_CLK		.EQU	%00000010	; RTC:1 IS CLOCK
 SD_DI		.EQU	%00000001	; RTC:6 IS DATA IN (CARD <- CPU)
 SD_DO		.EQU	%00000001	; RTC:0 IS DATA OUT (CARD -> CPU)
 SD_IOBASE	.EQU	SD_OPRREG	; IOBASE
+SD_INVCS	.EQU	FALSE		; INVERT CS
 #ENDIF
 ;
 #IF (SDMODE == SDMODE_MK4)		; MARK IV (CSIO STYLE INTERFACE)
@@ -211,6 +217,7 @@ SD_CS0		.EQU	%00000100	; SELECT ACTIVE
 SD_CNTR		.EQU	Z180_CNTR
 SD_TRDR		.EQU	Z180_TRDR
 SD_IOBASE	.EQU	SD_OPRREG	; IOBASE
+SD_INVCS	.EQU	FALSE		; INVERT CS
 #ENDIF
 ;
 #IF (SDMODE == SDMODE_SC)		; SC
@@ -223,6 +230,7 @@ SD_CS1		.EQU	%00001000	; RTC:3 IS SELECT FOR SECONDARY SPI CARD
 SD_CNTR		.EQU	Z180_CNTR
 SD_TRDR		.EQU	Z180_TRDR
 SD_IOBASE	.EQU	SD_OPRREG	; IOBASE
+SD_INVCS	.EQU	TRUE		; INVERT CS
 ;
 RTCDEF		.SET	RTCDEF | SD_OPRDEF	; SET DEFAULT IN HBIOS MAINLINE
 #ENDIF
@@ -270,6 +278,30 @@ SD_CS0		.EQU	%00100000	; IN/OUT:SD_OPREG:5 = CS2, SDCARD2 CS, IN=1 Card present
 SD_CS1		.EQU	%00010000	; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present
   #ENDIF
 SD_IOBASE	.EQU	SD_BASE		; IOBASE
+SD_INVCS	.EQU	FALSE		; INVERT CS
+#ENDIF
+;
+;
+#IF (SDMODE == SDMODE_USR)		; USER DEFINED HARDWARE CONFIGURATION
+;
+; THIS MODE IS INTENDED TO ALLOW A USER TO EASILY CONFIGURE A CUSTOM
+; SD CARD INTERFACE.  IT IS NOT YET COMPLETE OR TESTED AND PROBABLY DOES
+; NOT YET WORK.
+;
+SD_DEVMAX	.EQU	2		; NUMBER OF PHYSICAL UNITS (SOCKETS)
+SD_IOBASE	.EQU	$01		; IO BASE ADDRESS FOR SD INTERFACE
+SD_OPRREG	.EQU	SD_IOBASE	; OUTPUT PORT (OUTPUT: CS, CLK, DIN)
+SD_OPRDEF	.EQU	%00000101	; OUTPUT PORT DEFAULT STATE
+SD_OPRMSK	.EQU	%00001111	; OUTPUT PORT MASK
+SD_INPREG	.EQU	SD_IOBASE	; INPUT REGISTER
+SD_CS0		.EQU	%00001000	; SELECT
+SD_CLK		.EQU	%00000100	; CLOCK
+SD_DI		.EQU	%00000010	; DATA IN (CARD <- CPU) MOSI
+SD_DO		.EQU	%00000001	; DATA OUT (CARD -> CPU) MISO
+SD_CINIT	.EQU	TRUE		; INITIALIZE OUTPUT PORT
+SD_DDR		.EQU	$03		; DATA DIRECTION REGISTER
+SD_DDRVAL	.EQU	%00001101	; DATA DIRECTION REGISTER VALUE
+SD_INVCS	.EQU	FALSE		; INVERT CS
 #ENDIF
 ;
 #IF (SD_DEVCNT > SD_DEVMAX)
@@ -477,6 +509,13 @@ SD_INIT:
 	LD	A,SD_BASE
 	CALL	PRTHEXBYTE
 #ENDIF
+;
+#IF (SDMODE == SDMODE_USR)
+	PRTS(" MODE=USER$")
+	PRTS(" IO=0x$")
+	LD	A,SD_IOBASE
+	CALL	PRTHEXBYTE
+#ENDIF
 ;
 	CALL	SD_PROBE		; CHECK FOR HARDWARE
 	JR	Z,SD_INIT00		; CONTINUE IF PRESENT
@@ -600,7 +639,8 @@ SD_INITUNIT2:
 	PRTS(" SIZE=$")			; PRINT FIELD LABEL
 	LD	B,11			; 11 BIT SHIFT TO CONVERT BLOCKS --> MB
 	CALL	SRL32			; RIGHT SHIFT
-	CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+	;CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
+	CALL	PRTDEC32		; PRINT DWORD IN DECIMAL
 	PRTS("MB$")			; PRINT SUFFIX
 ;
 	; CHECK FOR WRITE PROTECT AND NOTIFY USER IF SO
@@ -710,9 +750,7 @@ SD_FNTBL:
 SD_VERIFY:
 SD_FORMAT:
 SD_DEFMED:
-	CALL	SYSCHK			; INVALID SUB-FUNCTION
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; INVALID SUB-FUNCTION
 	RET
 ;
 ;
@@ -1131,7 +1169,9 @@ SD_INITCARD5:
 	JR	SD_INITCARD6		; HANDLE MMC OR SDSC
 ;	
 SD_INITCARD5A:
-	CALL	SYSCHK
+	PUSH	AF
+	SYSCHKERR(ERR_NOMEDIA)
+	POP	AF
 	JP	SD_NOMEDIA
 ;
 ; CAPACITY CALCULATION FOR MMC OR SDSC (V1) CARDS:
@@ -1682,7 +1722,7 @@ SD_SETUP:
 	OUT	(SD_OPRREG),A
 #ENDIF
 ;
-#IF ((SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_DSD) | (SDMODE == SDMODE_PPI)| (SDMODE == SDMODE_MT))
+#IF ((SDMODE == SDMODE_MK4) | (SDMODE == SDMODE_DSD) | (SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_MT))
 	LD	A,SD_OPRDEF
 	LD	(SD_OPRVAL),A
 	OUT	(SD_OPRREG),A
@@ -1695,6 +1735,22 @@ SD_SETUP:
 	LD	(SD_OPRVAL),A		; RECORD THE WORKING VALLUE
 	OUT	(SD_OPRREG),A		; OPRREG == SIO_MCR
 #ENDIF
+;
+#IF (SDMODE == SDMODE_USR)
+  #IF (SD_CINIT == TRUE)
+	LD	A,(SD_OPRMSK)		; GET OUTPUT PORT MASK
+	CPL				; INVERT ACCUMULATOR
+	LD	C,A			; SAVE IT FOR LATER
+	LD	A,(SD_DDR)		; GET DATA DIRECTION REGISTER VALUE
+	AND	C			; ZERO ALL INTERESTING BITS
+	OR	(SD_DDRVAL)		; ADD OUR VALUE
+	LD	(SD_DDR),A		; WRITE IT
+  #ENDIF
+;
+	LD	A,SD_OPRDEF
+	LD	(SD_OPRVAL),A
+	OUT	(SD_OPRREG),A
+#ENDIF
 ;
 	XOR	A
 	RET
@@ -1766,7 +1822,8 @@ SD_SELECT1:
 ;
 SD_SELECT2:
 ; ADJUST BIT(S) FOR INTERFACES USING INVERTED CS BITS
-#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART) | (SDMODE == SDMODE_SC))
+;#IF ((SDMODE == SDMODE_PPI) | (SDMODE == SDMODE_UART) | (SDMODE == SDMODE_SC))
+#IF (SD_INVCS)
   #IF ((SDMODE == SDMODE_SC) & (SD_DEVCNT > 1))
 	XOR	SD_CS0 | SD_CS1
   #ELSE

Source/HBIOS/simrtc.asm

@@ -55,9 +55,7 @@ SIMRTC_DISPATCH:
 	JP	Z,SIMRTC_SETALM	; SET ALARM 
 	DEC	A
 	JP	Z,SIMRTC_DEVICE	; REPORT RTC DEVICE INFO
-	CALL	SYSCHK
-	LD	A,ERR_NOFUNC
-	OR	A
+	SYSCHKERR(ERR_NOFUNC)
 	RET
 ;
 ; NVRAM FUNCTIONS ARE NOT AVAILABLE IN SIMULATOR
@@ -68,9 +66,7 @@ SIMRTC_GETBLK:
 SIMRTC_SETBLK:
 SIMRTC_GETALM:
 SIMRTC_SETALM:
-	CALL	SYSCHK
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)
 	RET
 ;
 ; RTC GET TIME

Source/HBIOS/sio.asm

@@ -843,9 +843,7 @@ SIO_INITGO:
 	LD	L,SIO1_VEC		; ASSUME CHIP 1
 	DEC	A			; CHIP 1?
 	JR	Z,SIO_INITIVT		; IF SO, DO IT
-	CALL 	SYSCHK			; IMPOSSIBLE SITUATION
-	LD	A,ERR_NOUNIT
-	OR	A
+	SYSCHKERR(ERR_NOUNIT)		; IMPOSSIBLE SITUATION
 	RET
 SIO_INITIVT:
 	LD	A,L			; VALUE TO A

Source/HBIOS/sn76489.asm

@@ -1,9 +1,13 @@
 ;======================================================================
-;	SN76489 sound driver
+;	SN76489 SOUND DRIVER
 ;
 ;	WRITTEN BY: DEAN NETHERTON
 ;======================================================================
 ;
+; SN74489 PSG CHIP NEEDS AN INPUT CLOCK FREQUENCY OF
+; NO MORE THAN 4 MHZ.  THE CLOSEST THING THERE IS TO A STANDARD
+; IS THE MSX FREQ OF 3.579545 MHZ.
+;
 ; TODO:
 ; 1. PROVIDE SUPPORT FOR NOISE CHANNEL
 ; 2. DOES THIS WORK FOR FASTER CPUS? ONLY BEEN TESTED ON A Z80 7MHZ UNIT
@@ -12,18 +16,16 @@
 ; CONSTANTS
 ;======================================================================
 ;
-#IF (PLATFORM == PLT_SBC) & (SNMODE == SNMODE_VGM)
+#IF (SNMODE == SNMODE_VGM)
 SN76489_PORT_LEFT	.EQU	$C6	; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT)
 SN76489_PORT_RIGHT	.EQU	$C7	; PORTS FOR ACCESSING THE SN76489 CHIP (RIGHT)
-;SN7CLK			.EQU	3575950	; CLOCK SPEED DRIVING THE SN76489 CHIPS
 #ENDIF
-
-#IF (PLATFORM == PLT_RCZ80) & (SNMODE == SNMODE_RCZ80)
+;
+#IF (SNMODE == SNMODE_RC)
 SN76489_PORT_LEFT	.EQU	$FF	; PORTS FOR ACCESSING THE SN76489 CHIP (LEFT)
 SN76489_PORT_RIGHT	.EQU	$FB	; PORTS FOR ACCESSING THE SN76489 CHIP (RIGHT)
-;SN7CLK			.EQU	CPUOSC/4; DEFAULT TO CPUOSC / 4
 #ENDIF
-
+;
 SN7_IDAT		.EQU	0
 SN7_TONECNT		.EQU	3	; COUNT NUMBER OF TONE CHANNELS
 SN7_NOISECNT		.EQU	1	; COUNT NUMBER OF NOISE CHANNELS
@@ -32,15 +34,13 @@ CHANNEL_0_SILENT	.EQU	$9F
 CHANNEL_1_SILENT	.EQU	$BF
 CHANNEL_2_SILENT	.EQU	$DF
 CHANNEL_3_SILENT	.EQU	$FF
-
-SN7RATIO	.EQU	SN7CLK * 100 / 32
-
+;
 	.ECHO	"SN76489 CLOCK: "
 	.ECHO	SN7CLK
 	.ECHO	"\n"
-
+;
 #INCLUDE "audio.inc"
-
+;
 SN76489_INIT:
 	LD	IY, SN7_IDAT		; POINTER TO INSTANCE DATA
 	LD	BC, SN7_FNTBL		; BC := FUNCTION TABLE ADDRESS
@@ -125,33 +125,29 @@ SN7_VOLUME:
 SN7_NOTE:
 	LD	DE, SN7NOTETBL
 	CALL	AUD_NOTE		; RETURNS PERIOD IN HL, FALL THRU
-					; TO SET THIS PERIOD
+;
 SN7_PERIOD:
 	AUDTRACE(SNT_PERIOD)
 	AUDTRACE_HL
 	AUDTRACE_CR
-
-	LD	A, H			; IF ZERO - ERROR
+;
+	LD	A,H			; IF ZERO - ERROR
 	OR	L
-	JR	Z, SN7_QUERY_PERIOD1
-
-	LD	(SN7_PENDING_PERIOD), HL ;ASSUME SUCCESS
-
-	OR	A			; IF >= 401 ERROR
-	LD	DE, $401
-	SBC	HL, DE
-	JR	NC, SN7_QUERY_PERIOD1
-
-	XOR	A			; SIGNAL SUCCESS
+	JR	Z,SN7_PERIOD1
+;
+	LD	A,H			; MAXIMUM TONE PERIOD IS 10-BITS
+	AND	11111100B		; ALLOWED RANGE IS 0001-03FF (1023)
+	JR	NZ,SN7_PERIOD1		; RETURN NZ IF NUMBER TOO LARGE
+	LD	(SN7_PENDING_PERIOD),HL	; SAVE AND RETURN SUCCESSFUL
+	XOR	A			; SET SUCCESS
 	RET
-
-SN7_QUERY_PERIOD1:			; REQUESTED PERIOD IS LARGER THAN THE SN76489 CAN SUPPORT
-	LD	A, $FF
-	LD	L, A
-	LD	H, A
-	LD	(SN7_PENDING_PERIOD), HL
-	RET
-
+;
+SN7_PERIOD1:
+	LD	HL,$FFFF		; REQUESTED PERIOD IS LARGER
+	LD	(SN7_PENDING_PERIOD),HL	; THAN PSG CAN SUPPORT, SO
+	OR	$FF			; SET PERIOD TO $FFFF
+	RET				; AND RETURN FAILURE
+;
 SN7_PLAY:
 	AUDTRACE(SNT_PLAY)
 	AUDTRACE_D
@@ -408,12 +404,38 @@ SNT_PERIOD		.DB	"\r\nSN7_PERIOD: $"
 SNT_PLAY		.DB	"\r\nSN7_PLAY CH: $"
 SNT_REGWR		.DB	"\r\nOUT SN76489, $"
 #ENDIF
-
-; THE FREQUENCY BY QUARTER TONE STARTING AT A0#
-; USED TO MAP EACH OCTAVE (DIV BY 2 TO JUMP AN OCTAVE UP)
-; ASSUMING A CLOCK OF 3575950 HZ, THE FIRST PLAYABLE
+;
+;======================================================================
+;	QUARTER TONE FREQUENCY TABLE
+;======================================================================
+;
+; THE FOLLOWING TABLE MAPS A FULL OCTAVE OF QUARTER-NOTES
+; STARTING AT A# IN OCTAVE 0 TO THE CORRESPONDING PERIOD
+; VALUE TO USE ON THE PSG TO ACHIEVE THE DESIRED NOTE FREQUENCY.
+;
+; THE FREQUENCY PRODUCED BY THE SN76489 IS:
+; FREQ = CLOCK / 32 / PERIOD
+;
+; SO, TO MAP A DESIRED FREQUENCY TO A PERIOD, WE USE:
+; PERIOD = CLOCK / 32 / FREQ
+;
+; IN ORDER TO IMPROVE THE RESOLUTION OF THE FREQUENCY
+; VALUE USED, WE ALSO MULTPLY BOTH SIDES OF THE EQUATION
+; BY 100:
+; PERIOD * 100 = (CLOCK / 32 / FREQ) * 100
+;
+; THE RESULTING PERIOD VALUE CAN BE REPEATEDLY HALVED
+; TO TO JUMP UP AS MANY OCTAVES AS DESIRED.
+;
+; THE FINAL VALUE IS SHIFTED BY AUD_SCALE BITS
+; IN ORDER TO IMPROVE THE RESOLUTION.  THIS FINAL SHIFT
+; IS REMOVED WHEN IN THE AY_NOTE ROUTINE.
+;
+; ASSUMING A CLOCK OF 3.579545 MHZ, THE FIRST PLAYABLE
 ; NOTE WILL BE A2 (HBIOS NOTE CODE 92).
-
+;
+SN7RATIO	.EQU	(SN7CLK * 100) / (32 >> AUD_SCALE)
+;
 SN7NOTETBL:
 	.DW	SN7RATIO / 2913		; A0#/B0b
 	.DW	SN7RATIO / 2956         ;

Source/HBIOS/std.asm

@@ -56,11 +56,6 @@ BIOS_NONE	.EQU	0		; NO BIOS TYPE DEFINED
 BIOS_WBW	.EQU	1		; ROMWBW HBIOS
 BIOS_UNA	.EQU	2		; UNA UBIOS
 ;
-; DEFAULT HBIOS DIAGNOSTIC LEVEL
-;   WILL ULTIMATELY BE MOVED TO CONFIG FILE
-;
-DIAGLVL		.EQU	DL_CRITICAL
-;
 ; MEMORY MANAGERS
 ;
 MM_NONE		.EQU	0
@@ -186,6 +181,7 @@ SDMODE_DSD	.EQU	6		; DUAL SD
 SDMODE_MK4	.EQU	7		; MARK IV
 SDMODE_SC	.EQU	8		; SC (Steve Cousins)
 SDMODE_MT	.EQU	9		; MT (Shift register SPI WIZNET for RC2014)
+SDMODE_USR	.EQU	10		; USER DEFINED (in sd.asm) (NOT COMPLETE)
 ;
 ; AY SOUND CHIP MODE SELECTIONS
 ;
@@ -201,7 +197,7 @@ AYMODE_MBC	.EQU	7		; MBC SOUND BOARD
 ; SN SOUND CHIP MODE SELECTIONS
 ;
 SNMODE_NONE	.EQU	0
-SNMODE_RCZ80	.EQU	1		; RC2014 SOUND MODULE
+SNMODE_RC	.EQU	1		; RC2014 SOUND MODULE
 SNMODE_VGM	.EQU	2		; VGM ECB BOARD
 ;
 ; TMS VIDEO MODE SELECTIONS
@@ -209,10 +205,11 @@ SNMODE_VGM	.EQU	2		; VGM ECB BOARD
 TMSMODE_NONE	.EQU	0
 TMSMODE_SCG	.EQU	1		; SCG ECB BOARD
 TMSMODE_N8	.EQU	2		; N8 BUILT-IN VIDEO
-TMSMODE_RC	.EQU	3		; RC2014 TMS9918 VIDEO BOARD
-TMSMODE_RCV9958	.EQU	4		; RC2014 V9958 VIDEO BOARD
-TMSMODE_RCKBD	.EQU	5		; RC2014 TMS9918 + PS2 KEYBOARD
+TMSMODE_MSX	.EQU	3		; MSX PORT MAPPING
+TMSMODE_MSX9958	.EQU	4		; MSX PORTS, V9958 CHIP
+TMSMODE_MSXKBD	.EQU	5		; MSX PORTS + PS2 KEYBOARD
 TMSMODE_MBC	.EQU	6		; MBC V9938/58 VIDEO BOARD
+TMSMODE_COLECO	.EQU	7		; COLECOVISION PORT MAPPING
 ;
 ; CVDU VIDEO MODE SELECTIONS
 ;

Source/HBIOS/tms.asm

@@ -23,17 +23,25 @@ TMSINTEN:       .EQU   5               ; INTERRUPT ENABLE BIT
 	.ECHO	"TMS INTERRUPTS ENABLED\n"
 #ENDIF
 
-#IF ((TMSMODE == TMSMODE_RC) | (TMSMODE == TMSMODE_RCV9958))
+#IF ((TMSMODE == TMSMODE_MSX) | (TMSMODE == TMSMODE_MSX9958))
 TMS_DATREG	.EQU	$98		; READ/WRITE DATA
 TMS_CMDREG	.EQU	$99		; READ STATUS / WRITE REG SEL
 TMS_PPIA	.EQU	0		; PPI PORT A
 TMS_PPIB	.EQU	0		; PPI PORT B
 TMS_PPIC	.EQU	0		; PPI PORT C
 TMS_PPIX	.EQU	0		; PPI CONTROL PORT
-
 #ENDIF
 
-#IF (TMSMODE == TMSMODE_RCKBD)
+#IF (TMSMODE == TMSMODE_COLECO))
+TMS_DATREG	.EQU	$BE		; READ/WRITE DATA
+TMS_CMDREG	.EQU	$BF		; READ STATUS / WRITE REG SEL
+TMS_PPIA	.EQU	0		; PPI PORT A
+TMS_PPIB	.EQU	0		; PPI PORT B
+TMS_PPIC	.EQU	0		; PPI PORT C
+TMS_PPIX	.EQU	0		; PPI CONTROL PORT
+#ENDIF
+
+#IF (TMSMODE == TMSMODE_MSXKBD)
 TMS_DATREG	.EQU	$98		; READ/WRITE DATA
 TMS_CMDREG	.EQU	$99		; READ STATUS / WRITE REG SEL
 TMS_KBDDATA	.EQU	$E0		; KBD CTLR DATA PORT
@@ -41,18 +49,15 @@ TMS_KBDST	.EQU	$E1		; KBD CTLR STATUS/CMD PORT
 #ENDIF
 
 #IF (TMSMODE == TMSMODE_N8)
-
 TMS_DATREG	.EQU	$98		; READ/WRITE DATA
 TMS_CMDREG	.EQU	$99		; READ STATUS / WRITE REG SEL
 TMS_PPIA	.EQU	$84		; PPI PORT A
 TMS_PPIB	.EQU	$85		; PPI PORT B
 TMS_PPIC	.EQU	$86		; PPI PORT C
 TMS_PPIX	.EQU	$87		; PPI CONTROL PORT
-
 #ENDIF
 
 #IF (TMSMODE == TMSMODE_SCG)
-
 TMS_DATREG	.EQU	$98		; READ/WRITE DATA
 TMS_CMDREG	.EQU	$99		; READ STATUS / WRITE REG SEL
 TMS_ACR		.EQU	$9C		; AUX CONTROL REGISTER
@@ -60,7 +65,6 @@ TMS_PPIA	.EQU	0		; PPI PORT A
 TMS_PPIB	.EQU	0		; PPI PORT B
 TMS_PPIC	.EQU	0		; PPI PORT C
 TMS_PPIX	.EQU	0		; PPI CONTROL PORT
-
 #ENDIF
 ;
 #IF (TMSMODE == TMSMODE_MBC)
@@ -78,7 +82,7 @@ TMS_KBDST	.EQU	$E3		; KBD CTLR STATUS/CMD PORT
 
 TMS_ROWS	.EQU	24
 
-#IF ((TMSMODE == TMSMODE_RCV9958) | (TMSMODE == TMSMODE_MBC))
+#IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC))
 TMS_FNTVADDR	.EQU	$1000		; VRAM ADDRESS OF FONT DATA
 TMS_COLS	.EQU	80
 #ELSE
@@ -99,7 +103,7 @@ TERMENABLE	.SET	TRUE		; INCLUDE TERMINAL PSEUDODEVICE DRIVER
 #DEFINE		TMS_IODELAY	EX (SP),HL \ EX (SP),HL	; 38 W/S
 #ELSE
 ; BELOW WAS TUNED FOR SBC AT 8MHZ
-#IF ((TMSMODE == TMSMODE_RCV9958) | (TMSMODE == TMSMODE_MBC))
+#IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC))
 #DEFINE		TMS_IODELAY	NOP \ NOP \ NOP \ NOP \ NOP \ NOP \ NOP ; V9958 NEEDS AT WORST CASE, APPROX 4us (28T) DELAY BETWEEN I/O (WHEN IN TEXT MODE)
 #ELSE
 #DEFINE		TMS_IODELAY	NOP \ NOP ; 8 W/S
@@ -148,13 +152,13 @@ TMS_INIT:
 #IF (TMSMODE == TMSMODE_N8)
 	PRTS("N8$")
 #ENDIF
-#IF (TMSMODE == TMSMODE_RC)
+#IF (TMSMODE == TMSMODE_MSX)
 	PRTS("RC$")
 #ENDIF
-#IF (TMSMODE == TMSMODE_RCKBD)
+#IF (TMSMODE == TMSMODE_MSXKBD)
 	PRTS("RCKBD$")
 #ENDIF
-#IF (TMSMODE == TMSMODE_RCV9958)
+#IF (TMSMODE == TMSMODE_MSX9958)
 	PRTS("RC_V9958$")
 #ENDIF
 ;
@@ -176,7 +180,7 @@ TMS_INIT1:
 #IF (TMSMODE == TMSMODE_N8)
 	CALL	PPK_INIT		; INITIALIZE PPI KEYBOARD DRIVER
 #ENDIF
-#IF ((TMSMODE == TMSMODE_RCKBD) | (TMSMODE == TMSMODE_MBC))
+#IF ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC))
 	CALL	KBD_INIT		; INITIALIZE 8242 KEYBOARD DRIVER
 #ENDIF
 #IF MKYENABLE
@@ -231,7 +235,7 @@ TMS_FNTBL:
 	.DW	PPK_FLUSH
 	.DW	PPK_READ
 #ELSE
-  #IF  ((TMSMODE == TMSMODE_RCKBD) | (TMSMODE == TMSMODE_MBC))
+  #IF  ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC))
   	.DW	KBD_STAT
   	.DW	KBD_FLUSH
   	.DW	KBD_READ
@@ -298,9 +302,7 @@ TMS_VDADEV:
 	RET
 
 TMS_VDASCS:
-	CALL	SYSCHK		; NOT IMPLEMENTED (YET)
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)		; NOT IMPLEMENTED (YET)
 	RET
 
 TMS_VDASCP:
@@ -435,7 +437,7 @@ TMS_SET:
 ;----------------------------------------------------------------------
 ;
 TMS_WR:
-#IF ((TMSMODE == TMSMODE_RCV9958)  | (TMSMODE == TMSMODE_MBC))
+#IF ((TMSMODE == TMSMODE_MSX9958)  | (TMSMODE == TMSMODE_MBC))
         ; CLEAR R#14 FOR V9958
         XOR     A
         OUT     (TMS_CMDREG), A
@@ -473,21 +475,27 @@ TMS_PROBE:
 	; WRITE TEST PATTERN TO FIRST TWO BYTES
 	LD	A,$A5			; FIRST BYTE
 	OUT	(TMS_DATREG),A		; OUTPUT
-	TMS_IODELAY			; DELAY
+	;TMS_IODELAY			; DELAY
+	CALL	DLY64			; DELAY
 	CPL				; COMPLEMENT ACCUM
 	OUT	(TMS_DATREG),A		; SECOND BYTE
-	TMS_IODELAY			; DELAY
+	;TMS_IODELAY			; DELAY
+	CALL	DLY64			; DELAY
 	; SET READ ADDRESS TO $0
 	LD	HL,0
 	CALL	TMS_RD
 	; READ TEST PATTERN
 	LD	C,$A5			; VALUE TO EXPECT
 	IN	A,(TMS_DATREG)		; READ FIRST BYTE
-	TMS_IODELAY			; DELAY
+	;CALL	PRTHEXBYTE
+	;TMS_IODELAY			; DELAY
+	CALL	DLY64			; DELAY
 	CP	C			; COMPARE
 	RET	NZ			; RETURN ON MISCOMPARE
 	IN	A,(TMS_DATREG)		; READ SECOND BYTE
-	TMS_IODELAY			; DELAY
+	;CALL	PRTHEXBYTE
+	;TMS_IODELAY			; DELAY
+	CALL	DLY64			; DELAY
 	CPL				; COMPLEMENT IT
 	CP	C			; COMPARE
 	RET				; RETURN WITH RESULT IN Z
@@ -522,6 +530,13 @@ TMS_CRTINIT2:
 	INC	HL			; POINT TO NEXT VALUE
 	INC	C			; POINT TO NEXT REGISTER
 	DJNZ	TMS_CRTINIT2		; LOOP
+;
+	; ENABLE WAIT SIGNAL IF 9938/58
+#IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC))
+	LD	C,25			; REGISTER 25
+	LD	A,%00000100		; ONLY WTE BIT SET
+	CALL	TMS_SET			; DO IT
+#ENDIF
     	RET
 ;
 ;----------------------------------------------------------------------
@@ -920,13 +935,13 @@ TMS_BUF		.FILL	256,0	; COPY BUFFER
 ;
 
 TMS_IDAT:
-#IF ((TMSMODE == TMSMODE_RC) | (TMSMODE == TMSMODE_RCV9958) | (TMSMODE == TMSMODE_N8) | (TMSMODE == TMSMODE_SCG))
+#IF ((TMSMODE == TMSMODE_MSX) | (TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_N8) | (TMSMODE == TMSMODE_SCG))
 	.DB	TMS_PPIA	; PPI PORT A
 	.DB	TMS_PPIB        ; PPI PORT B
 	.DB	TMS_PPIC        ; PPI PORT C
 	.DB	TMS_PPIX        ; PPI CONTROL PORT
 #ENDIF
-#IF ((TMSMODE == TMSMODE_RCKBD) | (TMSMODE == TMSMODE_MBC))
+#IF ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC))
 	.DB	TMS_KBDST	; 8242 CMD/STATUS PORT
 	.DB	TMS_KBDDATA	; 8242 DATA PORT
 	.DB	0		; FILLER
@@ -978,7 +993,7 @@ TMS_IDAT:
 ; 5S		Fifth sprite (not displayed) detected. Value in FS* is valid.
 ; INT		Set at each screen update, used for interrupts.
 ;
-#IF ((TMSMODE == TMSMODE_RCV9958)  | (TMSMODE == TMSMODE_MBC))
+#IF ((TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_MBC))
 TMS_INITVDU:
 	.DB	$04		; REG 0 - NO EXTERNAL VID, SET M4 = 1
 TMS_INITVDU_REG_1:

Source/HBIOS/util.asm

@@ -486,13 +486,15 @@ STR_TSTPT	.TEXT	"\r\n+++ TSTPT: $"
 ;STR_PC		.DB	" PC=$"
 ;STR_SP		.DB	" SP=$"
 ;
-; INDIRECT JUMP TO ADDRESS IN HL
+; INDIRECT JUMP TO ADDRESS IN HL,IX, OR IY
 ;
 ;   MOSTLY USEFUL TO PERFORM AN INDIRECT CALL LIKE:
 ;     LD	HL,xxxx
 ;     CALL	JPHL
 ;
 JPHL:	JP	(HL)
+JPIX:	JP	(IX)
+JPIY:	JP	(IY)
 ;
 ; ADD HL,A
 ;
@@ -829,54 +831,155 @@ BITLOC1:
 	DJNZ	BITLOC1		; LOOP AS NEEDED
 	RET			; DONE
 ;
-; PRINT VALUE OF A IN DECIMAL WITH LEADING ZERO SUPPRESSION
+; DECIMAL NUMBER PRINTING ROUTINES
 ;
-PRTDECB:
-	PUSH	HL
-	PUSH	AF
-	LD	L,A
-	LD	H,0
-	CALL	PRTDEC
-	POP	AF
-	POP	HL
+PRTDEC8:	; PRINT VALUE OF A REGISTER IN DECIMAL
+	PUSH	IY
+	LD	IY,B2D8
+	CALL	PRTDECSTR
+	POP	IY
 	RET
 ;
-; PRINT VALUE OF HL IN DECIMAL WITH LEADING ZERO SUPPRESSION
+PRTDEC16:	; PRINT VALUE OF HL REGISGTER IN DECIMAL
+	PUSH	IY
+	LD	IY,B2D16
+	CALL	PRTDECSTR
+	POP	IY
+	RET
 ;
-PRTDEC:
+PRTDEC32:	; PRINT VALUE OF DE:HL REGISTERS IN DECIMAL
+	PUSH	IY
+	LD	IY,B2D32
+	CALL	PRTDECSTR
+	POP	IY
+	RET
+;
+PRTDECSTR:
+	PUSH	AF
 	PUSH	BC
 	PUSH	DE
 	PUSH	HL
-	LD	E,'0'
-	LD	BC,-10000
-	CALL	PRTDEC1
-	LD	BC,-1000
-	CALL	PRTDEC1
-	LD	BC,-100
-	CALL	PRTDEC1
-	LD	C,-10
-	CALL	PRTDEC1
-	LD	E,0
-	LD	C,-1
-	CALL	PRTDEC1
+	PUSH	IX
+	CALL	JPIY			; CALL (IY)
+	EX	DE,HL
+	LD	A,'$'
+	LD	(B2DEND),A
+	CALL	WRITESTR
+	POP	IX
 	POP	HL
 	POP	DE
 	POP	BC
+	POP	AF
 	RET
-PRTDEC1:
-	LD	A,'0' - 1
-PRTDEC2:
-	INC	A
-	ADD	HL,BC
-	JR	C,PRTDEC2
+;
+; Combined routine for conversion of different sized binary numbers into
+; directly printable ASCII(Z)-string
+; Input value in registers, number size and -related to that- registers to fill
+; is selected by calling the correct entry:
+;
+;  entry  inputregister(s)  decimal value 0 to:
+;   B2D8             A                    255  (3 digits)
+;   B2D16           HL                  65535   5   "
+;   B2D24         E:HL               16777215   8   "
+;   B2D32        DE:HL             4294967295  10   "
+;   B2D48     BC:DE:HL        281474976710655  15   "
+;   B2D64  IX:BC:DE:HL   18446744073709551615  20   "
+;
+; The resulting string is placed into a small buffer attached to this routine,
+; this buffer needs no initialization and can be modified as desired.
+; The number is aligned to the right, and leading 0's are replaced with spaces.
+; On exit HL points to the first digit, (B)C = number of decimals
+; This way any re-alignment / postprocessing is made easy.
+; Changes: AF,BC,DE,HL,IX
+; P.S. some examples below
+;
+; by Alwin Henseler
+;
+B2D8:	LD	H,0
+	LD	L,A
+B2D16:	LD	E,0
+B2D24:	LD	D,0
+B2D32:	LD	BC,0
+B2D48:	LD	IX,0			; zero all non-used bits
+B2D64:	LD	(B2DINV),HL
+	LD	(B2DINV+2),DE
+	LD	(B2DINV+4),BC
+	LD	(B2DINV+6),IX		; place full 64-bit input value in buffer
+	LD	HL,B2DBUF
+	LD	DE,B2DBUF+1
+	LD	(HL),' '
+B2DFILC	.EQU	$-1			; address of fill-character
+	LD	BC,18
+	LDIR				; fill 1st 19 bytes of buffer with spaces
+	LD	(B2DEND-1),BC		;set BCD value to "0" & place terminating 0
+	LD	E,1			; no. of bytes in BCD value
+	LD	HL,B2DINV+8		; (address MSB input)+1
+	LD	BC,$0909
+	XOR	A
+B2DSKP0:DEC	B
+	JR	Z,B2DSIZ		; all 0: continue with postprocessing
+	DEC	HL
+	OR	(HL)			; find first byte <>0
+	JR	Z,B2DSKP0
+B2DFND1:DEC	C
+	RLA
+	JR	NC,B2DFND1		; determine no. of most significant 1-bit
+	RRA
+	LD	D,A			; byte from binary input value
+B2DLUS2:PUSH	HL
+	PUSH	BC
+B2DLUS1:LD	HL,B2DEND-1		; address LSB of BCD value
+	LD	B,E			; current length of BCD value in bytes
+	RL	D			; highest bit from input value -> carry
+B2DLUS0:LD	A,(HL)
+	ADC	A,A
+	DAA
+	LD	(HL),A			; double 1 BCD byte from intermediate result
+	DEC	HL
+	DJNZ	B2DLUS0			; and go on to double entire BCD value (+carry!)
+	JR	NC,B2DNXT
+	INC	E			; carry at MSB -> BCD value grew 1 byte larger
+	LD	(HL),1			; initialize new MSB of BCD value
+B2DNXT:	DEC	C
+	JR	NZ,B2DLUS1		; repeat for remaining bits from 1 input byte
+	POP	BC			; no. of remaining bytes in input value
+	LD	C,8			; reset bit-counter
+	POP	HL			; pointer to byte from input value
+	DEC	HL
+	LD	D,(HL)			; get next group of 8 bits
+	DJNZ	B2DLUS2			; and repeat until last byte from input value
+B2DSIZ:	LD	HL,B2DEND		; address of terminating 0
+	LD	C,E			; size of BCD value in bytes
+	OR	A
+	SBC	HL,BC			; calculate address of MSB BCD
+	LD	D,H
+	LD	E,L
 	SBC	HL,BC
-	CP	E
-	JR	Z,PRTDEC3
-	LD	E,0
-	CALL	COUT
-PRTDEC3:
+	EX	DE,HL			; HL=address BCD value, DE=start of decimal value
+	LD	B,C			; no. of bytes BCD
+	SLA	C			; no. of bytes decimal (possibly 1 too high)
+	LD	A,'0'
+	RLD				; shift bits 4-7 of (HL) into bit 0-3 of A
+	CP	'0'			; (HL) was > 9h?
+	JR	NZ,B2DEXPH		; if yes, start with recording high digit
+	DEC	C			; correct number of decimals
+	INC	DE			; correct start address
+	JR	B2DEXPL			; continue with converting low digit
+B2DEXP:	RLD				; shift high digit (HL) into low digit of A
+B2DEXPH:LD	(DE),A			; record resulting ASCII-code
+	INC	DE
+B2DEXPL:RLD
+	LD	(DE),A
+	INC	DE
+	INC	HL			; next BCD-byte
+	DJNZ	B2DEXP			; and go on to convert each BCD-byte into 2 ASCII
+	SBC	HL,BC			; return with HL pointing to 1st decimal
 	RET
 ;
+B2DINV	.FILL	8			; space for 64-bit input value (LSB first)
+B2DBUF	.FILL	20			; space for 20 decimal digits
+B2DEND	.DB 	1			; space for terminating 0
+;
 ; SHIFT HL:DE BY B BITS
 ;
 SRL32:
@@ -897,6 +1000,57 @@ SLA32:
 	DJNZ	SLA32
 	RET
 ;
+; PRINT VALUE OF A IN DECIMAL WITH LEADING ZERO SUPPRESSION
+; BELOW ARE NOW OBSOLETE AND MAPPED TO NEW ROUTINES
+;
+PRTDECB	.EQU	PRTDEC8
+;;;PRTDECB:
+;;;	PUSH	HL
+;;;	PUSH	AF
+;;;	LD	L,A
+;;;	LD	H,0
+;;;	CALL	PRTDEC
+;;;	POP	AF
+;;;	POP	HL
+;;;	RET
+;
+; PRINT VALUE OF HL IN DECIMAL WITH LEADING ZERO SUPPRESSION
+;
+PRTDEC	.EQU	PRTDEC16
+;;;PRTDEC:
+;;;	PUSH	BC
+;;;	PUSH	DE
+;;;	PUSH	HL
+;;;	LD	E,'0'
+;;;	LD	BC,-10000
+;;;	CALL	PRTDEC1
+;;;	LD	BC,-1000
+;;;	CALL	PRTDEC1
+;;;	LD	BC,-100
+;;;	CALL	PRTDEC1
+;;;	LD	C,-10
+;;;	CALL	PRTDEC1
+;;;	LD	E,0
+;;;	LD	C,-1
+;;;	CALL	PRTDEC1
+;;;	POP	HL
+;;;	POP	DE
+;;;	POP	BC
+;;;	RET
+;;;PRTDEC1:
+;;;	LD	A,'0' - 1
+;;;PRTDEC2:
+;;;	INC	A
+;;;	ADD	HL,BC
+;;;	JR	C,PRTDEC2
+;;;	SBC	HL,BC
+;;;	CP	E
+;;;	JR	Z,PRTDEC3
+;;;	LD	E,0
+;;;	CALL	COUT
+;;;PRTDEC3:
+;;;	RET
+;
 ; LOAD OR STORE DE:HL
 ;
 LD32:

Source/HBIOS/vga.asm

@@ -211,9 +211,7 @@ VGA_VDADEV:
 	RET
 
 VGA_VDASCS:
-	CALL	SYSCHK		; NOT IMPLEMENTED (YET)
-	LD	A,ERR_NOTIMPL
-	OR	A
+	SYSCHKERR(ERR_NOTIMPL)	; NOT IMPLEMENTED (YET)
 	RET
 
 VGA_VDASCP:

Source/HBIOS/ym2612.asm

@@ -0,0 +1,880 @@
+;------------------------------------------------------------------------------
+; YM2612 sound driver
+;	Written by: Phil Summers (b1ackmailer) difficultylevelhigh@gmail.com
+;
+;------------------------------------------------------------------------------
+; References:
+;	https://hiddenpalace.org/News/Sega_of_Japan_Sound_Documents_and_Source_Code
+;	https://www.smspower.org/maxim/Documents/YM2612
+;	https://plutiedev.com/blog/20200103
+;	https://www.plutiedev.com/ym2612-registers
+;	https://www.plutiedev.com/ym2612-operations
+;	https://en.wikipedia.org/wiki/Scientific_pitch_notation
+;	https://gendev.spritesmind.net/forum/viewtopic.php?t=2915 (1)
+;	http://nemesis.hacking-cult.org/MegaDrive/Documentation/YM2608J.PDF
+;
+;------------------------------------------------------------------------------
+; Octave range is A#0-B7+3/4 HBIOS note 0..343
+;------------------------------------------------------------------------------
+;
+YMSEL		.EQU	VGMBASE+00H		; Primary YM2162 11000000 a1=0 a0=0
+YMDAT		.EQU	VGMBASE+01H		; Primary YM2162 11000001 a1=0 a0=1
+YM2SEL		.EQU	VGMBASE+02H		; Secondary YM2162 11000010 a1=1 a0=0
+YM2DAT		.EQU	VGMBASE+03H		; Secondary YM2162 11000011 a1=1 a0=1
+
+;------------------------------------------------------------------------------
+; Device capabilities and configuration
+;------------------------------------------------------------------------------
+;
+YM_TONECNT	.EQU	6			; Count number of tone channels
+YM_NOISECNT	.EQU	0			; Count number of noise channels
+;
+YM_PENDING_PERIOD	.DW	0	; PENDING PERIOD (12 BITS)
+YM_PENDING_VOLUME	.DB	0	; PENDING VOL (8 BITS)	
+YM_PENDING_DURATION	.DW	0	; PENDING DURATION (16 BITS)
+YM_READY		.DB	0	; BIT 0 -> NZ DRIVER IS READY TO RECEIVE PLAY COMMAND
+					; BIT 1 -> NZ EXECUTING WITHIN TIMER HANDLER = DO NOT DIS/ENABLE INT
+YM_RDY_RST		.DB	0	; FLAG INDICATES IF DEVICE IS IN READY (NZ) OR RESET STATE (Z)
+YM_DEBUG		.EQU	0	; CHANGE TO 1 TO ENABLE DEBUGGING
+YM_RSTCFG		.EQU	0	; SET TO 1 FOR FULL REGISTER CLEAR
+YM_FAST3438		.EQU	0	; FAST CPU'S WITH A YM3438 MAY REQUIRE A DELAY
+;
+;------------------------------------------------------------------------------
+; Driver function table and instance data
+;------------------------------------------------------------------------------
+;
+YM_FNTBL:	.DW	YM_RESET
+		.DW	ym_volume
+		.DW	YM_PERIOD
+		.DW	YM_NOTE
+		.DW	YM_PLAY
+		.DW	YM_QUERY
+		.DW	YM_DURATION
+		.DW	YM_DEVICE
+;
+#IF (($ - YM_FNTBL) != (SND_FNCNT * 2))
+	.ECHO	"*** INVALID SND FUNCTION TABLE ***\n"
+	!!!!!
+#ENDIF
+;
+YM_IDAT	.EQU	0				; NO INSTANCE DATA FOR THIS DEVICE
+;
+;------------------------------------------------------------------------------
+; YM2162 Initialization
+;	Announce device on console. 
+;	Setup function tables. Setup the device.
+;	Set volume off.
+;	Return initialization status
+;------------------------------------------------------------------------------
+;
+YM2612_INIT:	CALL	NEWLINE			; ANNOUNCE
+		PRTS("YM:$")
+;
+		PRTS(" IO=0x$")
+		LD	A,YMSEL
+		CALL	PRTHEXBYTE
+;
+		LD	IY, YM_IDAT		; SETUP FUNCTION TABLE
+		LD	BC, YM_FNTBL		; POINTER TO INSTANCE DATA
+		LD	DE, YM_IDAT		; BC := FUNCTION TABLE ADDRESS
+		CALL	SND_ADDENT		; DE := INSTANCE DATA PTR
+;
+YM_INIT:	ld	hl,ym_cfg
+;		call	ym_prog
+;		ret
+;
+;------------------------------------------------------------------------------
+; Program ym2612 with a list of register entries
+;------------------------------------------------------------------------------
+;
+ym_prog:	ld	c,(hl)			; get port address
+		inc	hl
+		ld	d,(hl)			; count of pairs
+		inc	hl
+;
+#IF (YM_DEBUG)		
+	push	af
+	ld	a,c				; port
+	call PRTHEXBYTE
+	pop	af
+#ENDIF
+;
+t_loop:		ld	a,(hl)			; get register to write
+		out	(c),a			; write reg to RSEL port
+;
+#IF (YM_DEBUG)
+	call PRTHEXBYTE				; register
+#ENDIF
+;
+		inc	hl
+		inc	c			; point to RDAT port
+		ld	a,(hl)			; get value to write
+		out	(c),a			; write value to RDAT port
+;
+#IF (YM_DEBUG)
+	call PRTHEXBYTE
+	call PC_SPACE
+#ENDIF
+;
+		dec	c			; point back to RSEL port
+		ld	b,0			; 
+nready1:	
+#IF YM_FAST3438==1) \ cp (ix) \ #ENDIF	\	; ym3438 delay (1)
+		in	a,(c)           	; check device 
+		rlca                    	; ready with timeout
+		jr	nc,ready1       		; bits 7 = busy
+		djnz	nready1
+;
+;		timed out
+;
+ready1:		inc	hl			;
+		dec	d			; decrease # left to do
+		jr	nz,t_loop
+;
+#IF (YM_DEBUG)
+	call NEWLINE
+#ENDIF
+;
+		ld	a,(hl)			; end flag?
+		or	a
+		jr	nz,ym_prog		; no? restart
+		ret
+;
+;------------------------------------------------------------------------------
+; Sound driver function - QUERY and subfunctions
+;------------------------------------------------------------------------------
+;
+YM_QUERY:	LD	A, E
+		CP	BF_SNDQ_CHCNT		; SUB FUNCTION 01
+		JR	Z, YM_QUERY_CHCNT
+;
+		CP	BF_SNDQ_VOLUME		; SUB FUNCTION 02
+		JR	Z, YM_QUERY_VOLUME
+;
+		CP	BF_SNDQ_PERIOD		; SUB FUNCTION 03
+		JR	Z, YM_QUERY_PERIOD
+;
+		CP	BF_SNDQ_DEV		; SUB FUNCTION 04
+		JR	Z, YM_QUERY_DEV
+;
+		OR	$FF			; SIGNAL FAILURE
+		RET
+;
+YM_QUERY_CHCNT:	LD	BC,(YM_TONECNT*256)+YM_NOISECNT	
+		XOR	A			; RETURN NUMBER OF TONE AND NOISE
+		RET				; NOISE CHANNELS IN BC
+;
+YM_QUERY_PERIOD:LD	HL, (YM_PENDING_PERIOD)	; RETURN 16-BIT PERIOD
+		XOR	A			; IN HL REGISTER
+		RET
+;
+YM_QUERY_VOLUME:LD	A, (YM_PENDING_VOLUME)	; RETURN 8-BIT VOLUME
+		LD	L, A			; IN L REGISTER
+		XOR	A
+;		LD	H, A
+		RET
+;
+YM_QUERY_DEV:	LD	B, SNDDEV_YM2612	; RETURN DEVICE IDENTIFIER
+		LD	DE, +(YMSEL*256)+YMDAT	; AND ADDRESS AND DATA PORT
+		LD	HL, +(YM2SEL*256)+YM2DAT	
+		XOR	A
+		RET
+;
+;------------------------------------------------------------------------------
+; Sound driver function - DEVICE
+;------------------------------------------------------------------------------
+;
+YM_DEVICE:	LD	D,SNDDEV_YM2612		; D := DEVICE TYPE
+		LD	E,0			; E := PHYSICAL UNIT
+		LD	C,$00			; C := DEVICE TYPE
+		LD	H,0			; H := MODE
+		LD	L,YMSEL			; L := BASE I/O ADDRESS
+		XOR	A
+		RET
+;
+;------------------------------------------------------------------------------
+; Sound driver function - RESET
+; Initialize device. Set volume off. Reset volume and tone variables.
+;------------------------------------------------------------------------------
+;
+YM_RESET:	;CALL	AY_CHKREDY		; RETURNS TO OUR CALLER IF NOT READY
+;
+		PUSH	DE
+		PUSH	HL
+		CALL	YM_INIT			; SET DEFAULT CHIP CONFIGURATION
+;
+		XOR	A			; SIGNAL SUCCESS
+		LD	(YM_RDY_RST),A		; IN RESET STATE
+		LD	(YM_PENDING_VOLUME),A	; SET VOLUME TO ZERO
+		LD	H,A
+		LD	L,A
+		LD	(YM_PENDING_PERIOD),HL	; SET TONE PERIOD TO ZERO
+;
+		POP	HL
+		POP	DE
+		RET
+;
+;------------------------------------------------------------------------------
+; Sound driver function - VOLUME
+;------------------------------------------------------------------------------
+;
+ym_volume:	LD	A,L			; SAVE VOLUME
+		LD	(YM_PENDING_VOLUME),A
+		XOR	A			; SIGNAL SUCCESS
+		RET
+;
+;------------------------------------------------------------------------------
+; Sound driver function - NOTE 
+;------------------------------------------------------------------------------
+;
+YM_NOTE:	;CALL	PRTHEXWORDHL
+		;CALL	PC_COLON
+
+		LD	DE,40			; Calculate the ym2612 block (octave)
+		ADD	HL,DE			; This will go into b13-b11
+		LD	DE,48			; HL / DE
+		CALL	DIV16			; BC = block (octave) HL = quarter semitone note
+;				
+		ADD	HL,HL
+		LD	DE,ym_notetable		; point HL to frequency entry
+		ADD	HL,DE			; for the quarter semitone note
+
+		;CALL	PRTHEXWORDHL
+		;CALL	PC_COLON
+		;CALL	PRTHEXWORD
+		;CALL	PC_COLON
+;		
+		LD	A,C			; SHIFT OCTAVE INTO RIGHT POSITION
+		ADD	A,A			; X2
+		ADD	A,A			; X4
+		ADD	A,A			; X8 -NEEDS TO BE OR'ED WITH HIGH BYTE
+;
+		LD	E,(HL)			; COMBINE FREQUENCY ENTRY
+		INC	HL			; AND BLOCK (OCTAVE) IN HL
+		OR	(HL)
+		LD	H,A
+		LD	L,E
+
+		;CALL	PRTHEXWORDHL
+;
+;------------------------------------------------------------------------------
+; Sound driver function - PERIOD
+;	The format for setting frequency on the ym2612 is 00xxxyyy-yyyyyyyy
+;	Where xxx us the octave and yyy-yyyyyyyy is the frequency
+;------------------------------------------------------------------------------
+;
+YM_PERIOD:	LD	A, H			; IF ZERO - ERROR
+		OR	L
+		JR	Z, YM_PERIOD1
+;
+		LD	A, H			; MAXIMUM TONE PERIOD IS 11-BITS
+		AND	11000000B		; ALLOWED RANGE IS 0001-07FF (2047)
+		JR	NZ,YM_PERIOD1		; AND 3 BITS FOR OCTAVE (7)
+		LD	(YM_PENDING_PERIOD),HL	; RETURN NZ IF NUMBER TOO LARGE
+		RET				; SAVE AND RETURN SUCCESSFUL
+;
+YM_PERIOD1:	LD	A, $FF			; REQUESTED PERIOD IS LARGER
+		LD	(YM_PENDING_PERIOD),A	; THAN THE DEVICE CAN SUPPORT
+		LD	(YM_PENDING_PERIOD+1),A	; SO SET PERIOD TO FFFF
+		RET				; AND RETURN FAILURE
+;
+;------------------------------------------------------------------------------
+; Sound driver function - DURATION
+;------------------------------------------------------------------------------
+;
+YM_DURATION:	LD	(YM_PENDING_DURATION),HL ; SET TONE DURATION
+		XOR	A
+		RET
+;
+;------------------------------------------------------------------------------
+; Sound driver function - PLAY
+;	D = CHANNEL
+;------------------------------------------------------------------------------
+;
+YM_PLAY:	ld	a,d
+		cp	YM_TONECNT		; error if bad channel
+		ret	nc
+						
+		cp	3			; 000 > 000, 011 > 100
+		ld	e,part1			; 001 > 001, 100 > 101
+		jr	c,ch012                 ; 010 > 010, 101 > 110
+		sub	3
+		ld	d,a			; d = 0..2
+		add	a,4			; a = 4..6
+		jr	ch345
+ch012:		ld	e,part0
+ch345:
+;
+#IF (YM_DEBUG)		
+		call	PC_COLON
+		call	PRTHEXBYTE		; a = 0..2 4..6
+		push	af
+		ld	a,d
+		call	PRTHEXBYTE		; d = 00..05
+		ld	a,e
+		call	PRTHEXBYTE		; e = part0/part1 (c0/c2) 
+		pop	af
+		call	NEWLINE
+#ENDIF
+;
+		ld	hl,ym_playcmd01
+		ld	(hl),e			; set the part
+;		
+		ld	hl,ym_playcmd00		; setup keyoff channel
+		ld	(hl),a
+		ld	hl,ym_playcmd09		; setup keyon channel
+		or	%10000000		; operator 4 only
+		ld	(hl),a
+
+		ld	a,$a4			; setup frequency register msb
+		add	a,d			; $a4-$a6
+		ld	hl,ym_playcmd02
+		ld	(hl),a
+
+		ld	a,$a0			; setup frequency register lsb
+		add	a,d			; $a0-$a2
+		ld	hl,ym_playcmd04
+		ld	(hl),a
+
+		ld	a,$4c			; setup volume register
+		add	a,d			; $4c-$4e
+		ld	hl,ym_playcmd06
+		ld	(hl),a
+
+		LD	A,(YM_RDY_RST)		; IF STILL IN RESET
+		OR	A			; STATE GO SETUP FOR
+		CALL	Z,YM_MAKE_RDY		; PLAYING
+;
+		ld	hl,(YM_PENDING_PERIOD)	; GET THE PREVIOUSLY SETUP
+		ld 	de,ym_playcmd03		; TONE DATA AND
+		ld	a,h
+		ld	(de),a			; PATCH IT INTO THE
+		ld 	de,ym_playcmd05		; YM2612 PLAY COMMAND
+		ld	a,l
+		ld	(de),a
+;
+		ld	de,ym_playcmd07
+		ld	A,(YM_PENDING_VOLUME)	; GET VOLUME
+		srl	a
+		cpl
+		and	%01111111		; PATCH IT INTO THE
+		ld	(de),a   		; YM2612 PLAY COMMAND
+#IF (YM_DEBUG)	
+		ld	b,16			; debug
+		call	NEWLINE			; dump
+		ld	de,ym_playnote		; the 
+ym_dbgcmd:	ld	a,(de)			; command
+		call	PRTHEXBYTE		; stream
+		call	PC_SPACE
+		inc	de
+		djnz	ym_dbgcmd
+		call	NEWLINE
+#ENDIF
+		ld	hl,ym_playnote		; NOW PLAY IT
+		jp	ym_prog
+;
+;------------------------------------------------------------------------------
+; Make ready for hbios play
+;------------------------------------------------------------------------------
+;
+YM_MAKE_RDY:	CPL
+		LD	(YM_RDY_RST),A		; Invert the ready flag
+		ld	hl,ym_cfg_ready		; Program ym2612 for playing
+		jp	ym_prog
+;
+;------------------------------------------------------------------------------
+; Command sequence to play a note
+;------------------------------------------------------------------------------
+;
+ym_playnote:	.db	part0, 2/2
+		.db	$28
+ym_playcmd00:	.db	$00			; [0] KEY OFF		
+;
+ym_playcmd01:	.db	part0,6/2
+ym_playcmd02:	.db	$A4
+ym_playcmd03:	.db	$3F			; [X] Frequency MSB	
+ym_playcmd04:	.db	$A0
+ym_playcmd05:	.db	$FF			; [X] Frequency LSB	
+ym_playcmd06:	.db	$4C
+ym_playcmd07:	.db	$00			; [X] Volume	       
+;
+		.db	part0, 2/2
+ym_playcmd08:	.db	$28
+ym_playcmd09:	.db	$F0			; [0] KEY ON		
+
+		.db	$00			; End flag
+;
+;------------------------------------------------------------------------------
+; Quarter semitone F-Number values for frequency 
+;------------------------------------------------------------------------------
+;
+ym_notetable:	.dw	644			; C	; 152
+		.dw	653			;  approx
+		.dw	663			;  approx
+		.dw	672			;  approx	
+		.dw	681			; C#	; 156
+		.dw	691			;  approx
+		.dw	702			;  approx
+		.dw	712			;  approx
+		.dw	722			; D	; 160
+		.dw	733			;  approx
+		.dw	744			;  approx
+		.dw	754			;  approx
+		.dw	765			; D#	; 164
+		.dw	776			;  approx
+		.dw	788			;  approx
+		.dw	799			;  approx
+		.dw	810			; E	; 168
+		.dw	822			;  approx
+		.dw	834			;  approx
+		.dw	846			;  approx
+		.dw	858			; F	; 172
+		.dw	871			;  approx
+		.dw	884			;  approx
+		.dw	897			;  approx
+		.dw	910			; F#	; 176
+		.dw	924			;  approx
+		.dw	937			;  approx
+		.dw	951			;  approx
+		.dw	964			; G 	; 180
+		.dw	978			;  approx
+		.dw	993			;  approx
+		.dw	1007			;  approx
+		.dw	1021			; G#	; 184
+		.dw	1036			;  approx
+		.dw	1051			;  approx
+		.dw	1066			;  approx
+		.dw	1081			; A 	; 188
+		.dw	1097			;  approx
+		.dw	1114			;  approx
+		.dw	1130			;  approx
+		.dw	1146			; A#	; 192
+		.dw	1163			;  approx
+		.dw	1180			;  approx
+		.dw	1197			;  approx
+		.dw	1214			; B	; 196
+		.dw	1232			;  approx
+		.dw	1250			;  approx
+		.dw	1268			;  approx
+;
+;------------------------------------------------------------------------------
+; Register configuration data for play
+;------------------------------------------------------------------------------
+;
+ym_cfg_ready:	.db	part0, 2/2
+		.db	$22, $00		; Global: LFO disable
+;
+		.db	part0, 6/2
+		.db	$B0,$30			; Channel 1-3
+		.db	$b1,$30			; Algorithm 0 S1>S2>S3>S4
+		.db	$b2,$30			; Feedback pure sine wave
+;
+		.db	part1, 6/2
+		.db	$B0,$30			; Channel 4-6
+		.db	$b1,$30			; Algorithm 0 S1>S2>S3>S4
+		.db	$b2,$30			; Feedback pure sine wave
+;
+		.db	part0, 6/2
+		.db	$3c, $01		; Channel 1-3
+		.db	$3d, $01		; Operator 4.MUL = 1
+		.db	$3e, $01
+;
+		.db	part1, 6/2
+		.db	$3c, $01		; Channel 4-6
+		.db	$3d, $01		; Operator 4.MUL = 1
+		.db	$3e, $01
+;
+		.db	part0, 6/2
+		.db	$b4,%01000000		; Channel 1-3
+		.db	$b5,%01000000		; Left Channel
+		.db	$b6,%01000000
+;
+		.db	part1, 6/2
+		.db	$b4,%10000000		; Channel 4-6
+		.db	$b5,%10000000		; Right Channel
+		.db	$b6,%10000000
+;
+		.db	part0, 6/2
+		.db	$44, $7F		; Channel 1-3
+		.db	$45, $7F		; Mute operator 3 <- pure sine wave
+		.db	$46, $7F
+;
+		.db	part1, 6/2
+		.db	$44, $7F		; Channel 4-6
+		.db	$45, $7F		; Mute operator 3 <- pure sine wave
+		.db	$46, $7F
+;
+		.db	part0, 6/2
+		.db	$4C, $00		; Channel 1-3
+		.db	$4d, $00		; Max volume for operator 4
+		.db	$4e, $00
+;
+		.db	part1, 6/2
+		.db	$4C, $00		; Channel 4-6
+		.db	$4d, $00		; Max volume for operator 4
+		.db	$4e, $00
+;
+		.db	part0, 6/2
+		.db	$5C, $1F		; Channel 1-3
+		.db	$5d, $1F		; Operator 4.AR = shortest
+		.db	$5e, $1F
+;
+		.db	part1, 6/2
+		.db	$5C, $1F		; Channel 4-6
+		.db	$5d, $1F		; Operator 4.AR = shortest
+		.db	$5e, $1F
+;
+		.db	part0, 6/2
+		.db	$6C, $06		; Channel 1-3
+		.db	$6d, $06		; Operator 4.D1R= 6
+		.db	$6e, $06
+;
+		.db	part1, 6/2
+		.db	$6C, $06		; Channel 4-6
+		.db	$6d, $06		; Operator 4.D1R= 6
+		.db	$6e, $06
+;
+		.db	part0, 6/2
+		.db	$7C, $1F		; Channel 1-3
+		.db	$7d, $1F		; Operator 4.D2R= 31
+		.db	$7e, $1F
+;
+		.db	part1, 6/2
+		.db	$7C, $1F		; Channel 4-6
+		.db	$7d, $1F		; Operator 4.D2R= 31
+		.db	$7e, $1F
+;
+		.db	part0, 6/2
+		.db	$8C, $FF		; Channel 1-3
+		.db	$8d, $FF		; Operator 4.SL = 15 / Operator4. RR=15
+		.db	$8e, $FF
+;
+		.db	part1, 6/2
+		.db	$8C, $FF		; Channel 4-6
+		.db	$8d, $FF		; Operator 4.SL = 15 / Operator4. RR=15
+		.db	$8e, $FF
+;
+		.db	$00			; End flag
+;
+;
+;------------------------------------------------------------------------------
+; Register configuration data for soft reset state
+;------------------------------------------------------------------------------
+;	
+part0:		.equ	YMSEL
+part1:		.equ	YM2SEL
+;
+#IF (YM_RSTCFG==0)
+ym_cfg:		.db	part0,  24/2
+		.db	$22,$00			; [0] lfo off
+		.db	$27,$00			; [0] Disable independant Channel 3
+		.db	$28,$00			; [0] note off ch 1
+		.db	$28,$01			; [0] note off ch 2
+		.db	$28,$02			; [0] note off ch 3
+		.db	$28,$04			; [0] note off ch 4
+		.db	$28,$05			; [0] note off ch 5
+		.db	$28,$06			; [0] note off ch 6
+		.db	$2b,$00			; [0] dac off
+		.db	$b4,$00			; [0] sound off ch 1-3
+		.db	$b5,$00	
+		.db	$b6,$00	
+;
+		.db	part1, 6/2
+		.db	$b4,$00			; [1] sound off ch 4-6
+		.db	$b5,$00			; [1] 
+		.db	$b6,$00			; [1] 
+;
+		.db	part0, 24/2
+		.db	$40,$7f			; [0] ch 1-3 total level minimum
+		.db	$41,$7f			; [0] 
+		.db	$42,$7f			; [0] 
+		.db	$44,$7f			; [0] 
+		.db	$45,$7f			; [0] 
+		.db	$46,$7f			; [0] 
+		.db	$48,$7f			; [0] 
+		.db	$49,$7f			; [0] 
+		.db	$4a,$7f			; [0] 
+		.db	$4c,$7f			; [0] 
+		.db	$4d,$7f			; [0] 
+		.db	$4e,$7f			; [0] 
+;
+		.db	part1, 24/2
+		.db	$40,$7f			; [1] ch 4-6 total level minimum
+		.db	$41,$7f			; [1]
+		.db	$42,$7f			; [1]
+		.db	$44,$7f			; [1]
+		.db	$45,$7f			; [1]
+		.db	$46,$7f			; [1]
+		.db	$48,$7f			; [1]
+		.db	$49,$7f			; [1]
+		.db	$4a,$7f			; [1]
+		.db	$4c,$7f			; [1]
+		.db	$4d,$7f			; [1]
+		.db	$4e,$7f			; [1]
+;
+		.db	$00			; End flag
+;
+;------------------------------------------------------------------------------
+; Register configuration data for hard reset state
+;------------------------------------------------------------------------------
+;
+#ELSE
+ym_cfg:		.db	part0, 24/2
+		.db	$22,$00			; [0] lfo off
+		.db	$27,$00			; [0] Disable independant Channel 3
+		.db	$28,$00			; [0] note off ch 1
+		.db	$28,$01			; [0] note off ch 2
+		.db	$28,$02			; [0] note off ch 3
+		.db	$28,$04			; [0] note off ch 4
+		.db	$28,$05			; [0] note off ch 5
+		.db	$28,$06			; [0] note off ch 6
+		.db	$2b,$00			; [0] dac off
+		.db	$b4,$00			; [0] sound off ch 1-3
+		.db	$b5,$00			; [0] 
+		.db	$b6,$00			; [0] 
+
+		.db	part1, 6/2
+		.db	$b4,$00			; [1] sound off ch 4-6
+		.db	$b5,$00			; [1] 
+		.db	$b6,$00			; [1] 
+
+		.db	part0, 24/2
+		.db	$40,$7f			; [0] ch 1-3 total level minimum
+		.db	$41,$7f			; [0] 
+		.db	$42,$7f			; [0] 
+		.db	$44,$7f			; [0] 
+		.db	$45,$7f			; [0] 
+		.db	$46,$7f			; [0] 
+		.db	$48,$7f			; [0] 
+		.db	$49,$7f			; [0] 
+		.db	$4a,$7f			; [0] 
+		.db	$4c,$7f			; [0] 
+		.db	$4d,$7f			; [0] 
+		.db	$4e,$7f			; [0] 
+
+		.db	part1, 24/2
+		.db	$40,$7f			; [1] ch 4-6 total level minimum
+		.db	$41,$7f			; [1]
+		.db	$42,$7f			; [1]
+		.db	$44,$7f			; [1]
+		.db	$45,$7f			; [1]
+		.db	$46,$7f			; [1]
+		.db	$48,$7f			; [1]
+		.db	$49,$7f			; [1]
+		.db	$4a,$7f			; [1]
+		.db	$4c,$7f			; [1]
+		.db	$4d,$7f			; [1]
+		.db	$4e,$7f			; [1]
+
+		.db	part0, 32/2
+		.db	$2a,$00			; [0]	; dac value
+ 		.db	$24,$00			; [0]	; timer A frequency
+		.db	$25,$00			; [0]	; timer A frequency
+		.db	$26,$00			; [0]	; time B frequency
+		.db	$30,$00			; [0]	; ch 1-3 multiply & detune
+		.db	$31,$00	                ; [0]
+		.db	$32,$00	                ; [0]
+		.db	$34,$00	                ; [0]
+		.db	$35,$00	                ; [0]
+		.db	$36,$00	                ; [0]
+		.db	$38,$00	                ; [0]
+		.db	$39,$00	                ; [0]
+		.db	$3a,$00	                ; [0]
+		.db	$3c,$00	                ; [0]
+		.db	$3d,$00	                ; [0]
+		.db	$3e,$00	                ; [0]
+
+		.db	part1, 24/2
+		.db	$30,$00			; [1] ch 4-6 multiply & detune
+		.db	$31,$00			; [1]
+		.db	$32,$00			; [1]
+		.db	$34,$00			; [1]
+		.db	$35,$00			; [1]
+		.db	$36,$00			; [1]
+		.db	$38,$00			; [1]
+		.db	$39,$00			; [1]
+		.db	$3a,$00			; [1]
+		.db	$3c,$00			; [1]
+		.db	$3d,$00			; [1]
+		.db	$3e,$00			; [1]
+                             			
+		.db	part0, 24/2
+		.db	$50,$00	                ; [0] ch 1-3 attack rate and scaling
+		.db	$51,$00	                ; [0]
+		.db	$52,$00	                ; [0]
+		.db	$54,$00	                ; [0]
+		.db	$55,$00	                ; [0]
+		.db	$56,$00	                ; [0]
+		.db	$58,$00	                ; [0]
+		.db	$59,$00	                ; [0]
+		.db	$5a,$00	                ; [0]
+		.db	$5c,$00	                ; [0]
+		.db	$5d,$00	                ; [0]
+		.db	$5e,$00	                ; [0]
+
+		.db	part1, 24/2
+		.db	$50,$00			; [1] ch 4-6 attack rate and scaling
+		.db	$51,$00			; [1]
+		.db	$52,$00			; [1]
+		.db	$54,$00			; [1]
+		.db	$55,$00			; [1]
+		.db	$56,$00			; [1]
+		.db	$58,$00			; [1]
+		.db	$59,$00			; [1]
+		.db	$5a,$00			; [1]
+		.db	$5c,$00			; [1]
+		.db	$5d,$00			; [1]
+		.db	$5e,$00			; [1]
+
+		.db	part0, 24/2
+		.db	$60,$00	                ; [0] ch 1-3 decay rate and am enable
+		.db	$61,$00	                ; [0]
+		.db	$62,$00	                ; [0]
+		.db	$64,$00	                ; [0]
+		.db	$65,$00	                ; [0]
+		.db	$66,$00	                ; [0]
+		.db	$68,$00	                ; [0]
+		.db	$69,$00	                ; [0]
+		.db	$6a,$00	                ; [0]
+		.db	$6c,$00	                ; [0]
+		.db	$6d,$00	                ; [0]
+		.db	$6e,$00	                ; [0]
+
+		.db	part1, 24/2
+		.db	$60,$00			; [1] ch 4-6 decay rate and am enable
+		.db	$61,$00			; [1]
+		.db	$62,$00			; [1]
+		.db	$64,$00			; [1]
+		.db	$65,$00			; [1]
+		.db	$66,$00			; [1]
+		.db	$68,$00			; [1]
+		.db	$69,$00			; [1]
+		.db	$6a,$00			; [1]
+		.db	$6c,$00			; [1]
+		.db	$6d,$00			; [1]
+		.db	$6e,$00			; [1]
+
+		.db	part0, 24/2
+		.db	$70,$00	                ; [0] ch 1-3 sustain rate
+		.db	$71,$00	                ; [0]
+		.db	$72,$00	                ; [0]
+		.db	$74,$00	                ; [0]
+		.db	$75,$00	                ; [0]
+		.db	$76,$00	                ; [0]
+		.db	$78,$00	                ; [0]
+		.db	$79,$00	                ; [0]
+		.db	$7a,$00	                ; [0]
+		.db	$7c,$00	                ; [0]
+		.db	$7d,$00	                ; [0]
+		.db	$7e,$00	                ; [0]
+
+		.db	part1, 24/2
+		.db	$70,$00			; [1] ch 4-6 sustain rate
+		.db	$71,$00			; [1]
+		.db	$72,$00			; [1]
+		.db	$74,$00			; [1]
+		.db	$75,$00			; [1]
+		.db	$76,$00			; [1]
+		.db	$78,$00			; [1]
+		.db	$79,$00			; [1]
+		.db	$7a,$00			; [1]
+		.db	$7c,$00			; [1]
+		.db	$7d,$00			; [1]
+		.db	$7e,$00			; [1]
+
+		.db	part0, 24/2
+		.db	$80,$00	                ; [0] ch 1-3 release rate and sustain level
+		.db	$81,$00	                ; [0]
+		.db	$82,$00	                ; [0]
+		.db	$84,$00	                ; [0]
+		.db	$85,$00	                ; [0]
+		.db	$86,$00	                ; [0]
+		.db	$88,$00	                ; [0]
+		.db	$89,$00	                ; [0]
+		.db	$8a,$00	                ; [0]
+		.db	$8c,$00	                ; [0]
+		.db	$8d,$00	                ; [0]
+		.db	$8e,$00	                ; [0]
+
+		.db	part1, 24/2
+		.db	$80,$00			; [1] ch 4-6 release rate and sustain level
+		.db	$81,$00			; [1]
+		.db	$82,$00			; [1]
+		.db	$84,$00			; [1]
+		.db	$85,$00			; [1]
+		.db	$86,$00			; [1]
+		.db	$88,$00			; [1]
+		.db	$89,$00			; [1]
+		.db	$8a,$00			; [1]
+		.db	$8c,$00			; [1]
+		.db	$8d,$00			; [1]
+		.db	$8e,$00			; [1]
+
+		.db	part0, 24/2
+		.db	$90,$00	                ; [0] ch 1-3 ssg-eg
+		.db	$91,$00	                ; [0]
+		.db	$92,$00	                ; [0]
+		.db	$94,$00	                ; [0]
+		.db	$95,$00	                ; [0]
+		.db	$96,$00	                ; [0]
+		.db	$98,$00	                ; [0]
+		.db	$99,$00	                ; [0]
+		.db	$9a,$00	                ; [0]
+		.db	$9c,$00	                ; [0]
+		.db	$9d,$00	                ; [0]
+		.db	$9e,$00	                ; [0]
+
+		.db	part1, 24/2
+		.db	$90,$00			; [1] ch 4-6 ssg-eg
+		.db	$91,$00			; [1]
+		.db	$92,$00			; [1]
+		.db	$94,$00			; [1]
+		.db	$95,$00			; [1]
+		.db	$96,$00			; [1]
+		.db	$98,$00			; [1]
+		.db	$99,$00			; [1]
+		.db	$9a,$00			; [1]
+		.db	$9c,$00			; [1]
+		.db	$9d,$00			; [1]
+		.db	$9e,$00			; [1]
+
+		.db	part0, 12/2
+		.db	$a0,$00	                ; [0] ch 1-3 frequency
+		.db	$a1,$00	                ; [0]
+		.db	$a2,$00	                ; [0]
+		.db	$a4,$00	                ; [0]
+		.db	$a5,$00	                ; [0]
+		.db	$a6,$00	                ; [0]
+;		.db	$a8,$00	                ; [0] ch 3 special mode
+;		.db	$a9,$00	                ; [0]
+;		.db	$aa,$00	                ; [0]
+;		.db	$ac,$00	                ; [0]
+;		.db	$ad,$00	                ; [0]
+;		.db	$ae,$00	                ; [0]
+
+		.db	part1, 12/2
+		.db	$a0,$00			; [1] ch 4-6 frequency
+		.db	$a1,$00			; [1]
+		.db	$a2,$00			; [1]
+		.db	$a4,$00			; [1]
+		.db	$a5,$00			; [1]
+		.db	$a6,$00			; [1]
+;		.db	$a8,$00			; [1] ch 3 special mode
+;		.db	$a9,$00			; [1]
+;		.db	$aa,$00			; [1]
+;		.db	$ac,$00			; [1]
+;		.db	$ad,$00			; [1]
+;		.db	$ae,$00			; [1]
+
+		.db	part0, 6/2
+		.db	$b0,$00	                ; [0] ch 1-3 algorith + feedback
+		.db	$b1,$00	                ; [0]
+		.db	$b2,$00	                ; [0]
+
+		.db	part1, 6/2
+		.db	$b0,$00			; [1] ch 4-6 algorith + feedback
+		.db	$b1,$00			; [1]
+		.db	$b2,$00			; [1]
+;
+		.db	$00			; End flag
+#ENDIF