Fix SURVEY.COM (again)

- Previous fix to SURVEY.COM port survey broke the memory survey. Everything should be OK now. - Regenerated documentation.
Merge pull request #337 from wwarthen/master
2026-02-07 15:03:13 -06:00 · 2023-03-22 16:15:04 -07:00 · 2023-03-22 15:58:32 -07:00 · 2023-03-22 15:57:43 -07:00 · 2023-03-22 22:37:22 +00:00 · 2023-03-21 14:48:28 -07:00
18 changed files with 141 additions and 83 deletions
--- a/.github/workflows/commit.yml
+++ b/.github/workflows/commit.yml
@@ -13,16 +13,18 @@ jobs:
    runs-on: ubuntu-latest

    steps:
-      - name: Make Slugs
-        uses: rlespinasse/github-slug-action@v4.4.1
-
      - name: Checkout
        uses: actions/checkout@v3.3.0

+      - name: Get Commit Ref
+        run: |
+          COMMIT_REF=$(git rev-parse --short $GITHUB_SHA)
+          echo "COMMIT_REF: $COMMIT_REF"
+          echo "COMMIT_REF=$COMMIT_REF" >>$GITHUB_ENV
+
      - name: Build
        run: |
          export TZ='America/Los_Angeles'
-          sudo apt-get install libncurses-dev
          sudo apt-get install srecord
          make dist
          rm -rf .git*
@@ -36,19 +38,22 @@ jobs:
      - name: Upload Artifact
        uses: actions/upload-artifact@v3.1.1
        with:
-          name: RomWBW-${{env.GITHUB_SHA_SHORT}}-Linux
+          name: RomWBW-${{env.COMMIT_REF}}-Linux
          path: .

  buildMacOS:
    runs-on: macOS-latest

    steps:
-      - name: Make Slugs
-        uses: rlespinasse/github-slug-action@v4.4.1
-
      - name: Checkout
        uses: actions/checkout@v3.3.0

+      - name: Get Commit Ref
+        run: |
+          COMMIT_REF=$(git rev-parse --short $GITHUB_SHA)
+          echo "COMMIT_REF: $COMMIT_REF"
+          echo "COMMIT_REF=$COMMIT_REF" >>$GITHUB_ENV
+
      - name: Build
        run: |
          export TZ='America/Los_Angeles'
@@ -65,5 +70,5 @@ jobs:
      - name: Upload Artifact
        uses: actions/upload-artifact@v3.1.1
        with:
-          name: RomWBW-${{env.GITHUB_SHA_SHORT}}-MacOS
-          path: .
+          name: RomWBW-${{env.COMMIT_REF}}-MacOS
+          path: .
--- a/.github/workflows/release.yml
+++ b/.github/workflows/release.yml
@@ -14,15 +14,6 @@ jobs:
      - name: Checkout
        uses: actions/checkout@v3.3.0

-      - name: Create Package Label
-        run: |
-          echo GITHUB_REF: "$GITHUB_REF"
-          LABEL=`echo "$GITHUB_REF" | sed "s|^refs/tags/||"`
-          echo "PKGLBL=$LABEL" >> $GITHUB_ENV
-          echo PKGLBL: "$PKGLBL"
-          echo Upload URL: "${{github.event.release.upload_url}}"
-          echo GITHUB_TOKEN: "${{secrets.GITHUB_TOKEN}}"
-         
      - name: Build
        run: |
          export TZ='America/Los_Angeles'
@@ -33,22 +24,37 @@ jobs:
      
      - name: Create Package Archive
        run: |
-            zip -r RomWBW-${{env.PKGLBL}}-Package.zip .
+          zip -r RomWBW-${{github.ref_name}}-Package.zip .
+
+      - name: Set Title
+        run: |
+          echo "Tag: ${{github.ref_name}}"
+          if grep -q "dev" <<< "${{github.ref_name}}"; then
+            TITLE="RomWBW Development Snapshot"
+          elif grep -q "pre" <<< "${{github.ref_name}}"; then
+            TITLE="RomWBW Prerelease"
+          elif grep -q "rc" <<< "${{github.ref_name}}"; then
+            TITLE="RomWBW Release Candidate"
+          else
+            TITLE="RomWBW"
+          fi
+          echo "Title: $TITLE"
+          echo "TITLE=$TITLE" >>$GITHUB_ENV

      - name: Attach Package Archive
        uses: wwarthen/actions/packages/automatic-releases@built-packages
        with:
-          repo_token: "${{ secrets.GITHUB_TOKEN }}"
+          repo_token: "${{secrets.GITHUB_TOKEN}}"
          draft: true
          prerelease: true
-          title: "RomWBW Development SnapShot ${{env.PKGLBL}}"
+          title: "${{env.TITLE}} ${{github.ref_name}}"
          files: |
-            RomWBW-${{env.PKGLBL}}-Package.zip
+            RomWBW-${{github.ref_name}}-Package.zip
      
 #      - name: Upload Package Archive
 #        uses: AButler/upload-release-assets@v2.0.2
 #        with:
-#          repo-token: ${{ secrets.GITHUB_TOKEN }}
+#          repo-token: ${{secrets.github_token}}
 #          files: |
 #            RomWBW-${{env.PKGLBL}}-Package.zip

@@ -57,7 +63,7 @@ jobs:
 #        uses: docker://antonyurchenko/git-release:latest
 #        env:
 #          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
-#          RELEASE_NAME_PREFIX: "Development SnapShot Release "
+#          RELEASE_NAME_PREFIX: "${{env.TITLE}} "
 #          CHANGELOG_FILE: "none"
 #        with:
 #          args: |
--- a/Doc/ChangeLog.txt
+++ b/Doc/ChangeLog.txt
@@ -1,3 +1,8 @@
+Version 3.2.1
+-------------
+- M?P: Fixed Zeta 2 FDD and CPUSPD config settings
+- WBW: Fixed SURVEY.COM (again)
+
 Version 3.2
 -----------
 - WBW: Version bump for release
--- a/Applications.pdf
+++ b/Applications.pdf
--- a/Catalog.pdf
+++ b/Catalog.pdf
--- a/Errata.pdf
+++ b/Errata.pdf
--- a/Applications.pdf
+++ b/Applications.pdf
--- a/Doc/RomWBW
+++ b/Doc/RomWBW
--- a/Doc/RomWBW
+++ b/Doc/RomWBW
--- a/ReadMe.md
+++ b/ReadMe.md
@@ -1,9 +1,9 @@


 **RomWBW ReadMe** \
-Version 3.2 \
+Version 3.2.1 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-18 Mar 2023
+22 Mar 2023

 # Overview

@@ -102,22 +102,22 @@ functionality.

 Complete instructions for installation and operation of RomWBW are found
 in the [RomWBW User
-Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20User%20Guide.pdf).
+Guide](https://github.com/wwarthen/RomWBW/raw/dev/Doc/RomWBW%20User%20Guide.pdf).

 ## Documentation

 Documentation for RomWBW includes:

 - [RomWBW User
-  Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20User%20Guide.pdf)
+  Guide](https://github.com/wwarthen/RomWBW/raw/dev/Doc/RomWBW%20User%20Guide.pdf)
 - [RomWBW System
-  Guide](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20System%20Guide.pdf)
+  Guide](https://github.com/wwarthen/RomWBW/raw/dev/Doc/RomWBW%20System%20Guide.pdf)
 - [RomWBW
-  Applications](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Applications.pdf)
+  Applications](https://github.com/wwarthen/RomWBW/raw/dev/Doc/RomWBW%20Applications.pdf)
 - [RomWBW ROM
-  Applications](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20ROM%20Applications.pdf)
+  Applications](https://github.com/wwarthen/RomWBW/raw/dev/Doc/RomWBW%20ROM%20Applications.pdf)
 - [RomWBW
-  Errata](https://github.com/wwarthen/RomWBW/raw/master/Doc/RomWBW%20Errata.pdf)
+  Errata](https://github.com/wwarthen/RomWBW/raw/dev/Doc/RomWBW%20Errata.pdf)

 # Acknowledgments

--- a/ReadMe.txt
+++ b/ReadMe.txt
@@ -1,6 +1,6 @@
 RomWBW ReadMe
 Wayne Warthen (wwarthen@gmail.com)
-18 Mar 2023
+22 Mar 2023



--- a/Source/Apps/Survey/survey.mac
+++ b/Source/Apps/Survey/survey.mac
@@ -15,6 +15,13 @@
 ;
 ;VERSION LIST - Most recent version first.
 ;
+;21/Mar/23 - Previous hack was worthless because it broke
+;            the memory survey.  Rehacked to use HBIOS to
+;            detect if N8VEM SBC MPCL memory management is
+;            in use and bypass MPCL ports if so.  HBIOS check
+;            should allow use in non-RomWBW systems again.
+;            Wayne Warthen
+;
 ;10/Feb/23 - Total hack to avoid crash on ECB SBC
 ;            RomWBW now required by this version
 ;            Wayne Warthen
@@ -240,20 +247,6 @@ TABS	EQU	9		; Tab columns
 ;
 	;ORG	100H
 ;
-;
-;
-	.Z80
-	LD	HL,IMGORG
-	LD	DE,START
-	LD	BC,IMGEND-IMGORG
-	LDIR
-	JP	START
-	.8080
-;
-IMGORG:
-;
-	.PHASE	8000H
-;
 START:
 	LXI	H,0			; Save stack pointer
 	DAD	SP
@@ -261,9 +254,38 @@ START:
 	LXI	SP,FINIS+64
 	CALL	TYPE			; Type initial CRLF
 	DW	CRLF,CRLF
-	DB	TAB,'*** RomWBW System Survey (Feb 2023) ***'
+	DB	TAB,'*** RomWBW System Survey (Mar 2023) ***'
 	DW	CRLF,CRLFE
+;
+; Are we running an N8VEM SBC w/ MPCL on RomWBW???
+;
+	.Z80
+	XOR	A		; assume not
+	LD	(ISMPCL),A	; save it

+	; Check for RomWBW (HBIOS)
+	LD	HL,(0FFFEH)	; HL := HBIOS ident location
+	LD	A,'W'		; First byte of ident
+	CP	(HL)		; Compare
+	JR	NZ,NOTMPCL	; Not HBIOS
+	INC	HL		; Next byte of ident
+	LD	A,NOT 'W'	; Second byte of ident
+	CP	(HL)		; Compare
+	JR	NZ,NOTMPCL	; Not HBIOS
+;
+	LD	B,0F1H		; HBIOS: VER function
+	LD	C,0		; required reserved value
+	RST	08		; DE := version, L := platform id
+	LD	A,L		; Platform ID
+	CP	01H		; SBC?
+	JR	NZ,NOTMPCL	; Not SBC
+	LD	A,0FFH		; Flag
+	LD	(ISMPCL),A	; Set flag
+;
+	.8080
+;
+NOTMPCL:
+;
 ;DISK SURVEY
 	LXI	H,8			; Init drive counter
 	MVI	C,24			; Get login vector
@@ -445,20 +467,19 @@ MSURV:
 	ENDM
 	DB	'|'
 	DW	CRLF
-	db	' '			; dmb 31-May-82
-	DB	'T'+EOL
+	DB	'TT','T'+EOL
 	LXI	H,RAM
-	MVI	M,LOW 1023		; Init RAM counter
+	MVI	M,LOW 2047		; Init RAM counter
 	INX	H
-	MVI	M,HIGH 1023
+	MVI	M,HIGH 2047
 	MVI	B,4			; Clear ROM, EMP
 CLREG:
 	INX	H
 	MVI	M,0
 	DCR	B
 	JNZ	CLREG
-	LXI	H,1024			; Init memory pointer
-	MVI	C,63			; K to be checked
+	LXI	H,2048			; Init memory pointer
+	MVI	C,62			; K to be checked

 ;Start of analysis loop
 BEGANA:
@@ -492,7 +513,7 @@ NOTEM:
 	INXI	ROM
 NEXT:
 	INX	H			; Index next byte
-	DCX	D			; Decrement K counter
+	DCX	D			; DEC DE; Decrement K counter
 	XRA	A
 	ORA	D
 	ORA	E
@@ -545,8 +566,19 @@ NEXTK:
 ; contents of first page
 	call	type
 	db	'BIOS at',' '+eol
-	hexout	bios+2
-	hexout	bios+1
+	;hexout	bios+2
+	;hexout	bios+1
+	.z80
+	ld	hl,(bios+1)
+	ld	de,-3
+	add	hl,de
+	push	hl
+	ld	a,h
+	call	hexprn
+	pop	hl
+	ld	a,l
+	call	hexprn
+	.8080
 	call	type
 	db	tab,'iobyte',' '+eol
 	hexout	bios+3
@@ -555,8 +587,19 @@ NEXTK:
 	hexout	bios+4
 	call	type
 	db	tab,'BDOS at',' '+eol
-	hexout	bdos+2
-	hexout	bdos+1
+	;hexout	bdos+2
+	;hexout	bdos+1
+	.z80
+	ld	hl,(bdos+1)
+	ld	de,-6
+	add	hl,de
+	push	hl
+	ld	a,h
+	call	hexprn
+	pop	hl
+	ld	a,l
+	call	hexprn
+	.8080
 	call	type
 	dw	crlf,crlfe
 ;
@@ -607,9 +650,6 @@ PDLY:
 	JNZ	PDLY
 ;
 	.Z80
-	; record the active bank
-	ld	a,(0ffe0h)		; get current hbios bank id
-	ld	(BANK),a		; and save it
 	; Check for Z180 CPU
 	xor	a			; assume Z80
 	ld	(IS180),a		; save it
@@ -635,6 +675,17 @@ PORTLP:
 	ENDIF
 ;
 	.Z80
+;
+	ld	a,(ISMPCL)		; MPCL?
+	or	a			; set flags
+	jr	z,PCONT			; if not, skip ahead
+	ld	a,d			; get port to test
+	and	0F8H			; range of 8 ports
+	cp	078H			; starting at 78H
+	jr	z,ISPORT		; if in range, assume real port
+;
+PCONT:
+
 	di				; interrupts off
 	ld	a,(IS180)		; Z180?
 	or	a
@@ -679,11 +730,6 @@ pnum1b	equ	$-1
 	push	af
 ;
 rdz:
-	; Make sure correct bank is still selected!
-	push	af
-	ld	a,(BANK)
-	call	0FFF3H
-	pop	af
 ;
 	ei				; interrupts back on now
 ;
@@ -818,13 +864,9 @@ RAMF:	DS	1			; RAM good flag
 EMPF:	DS	1			; Empty so far flag
 BLKSHF:	DS	1			; block shift factor
 MAXALL:	DS	2			; maximum block number
-BANK:	DS	1			; saved HBIOS bank id
 IS180:	DS	1			; non-zero for Z180 CPU
+ISMPCL:	DS	1			; non-zero for N8VEM SBC MPCL
 FINIS	EQU	$			; End of program
-;
-	.DEPHASE
-;
-IMGEND:
 ;
 	END

--- a/Source/Doc/Basic.h
+++ b/Source/Doc/Basic.h
@@ -1,6 +1,6 @@
-$define{doc_ver}{Version 3.2}$
+$define{doc_ver}{Version 3.2.1}$
 $define{doc_product}{RomWBW}$
-$define{doc_root}{https://github.com/wwarthen/RomWBW/raw/master/Doc}$
+$define{doc_root}{https://github.com/wwarthen/RomWBW/raw/dev/Doc}$
 $ifndef{doc_title}$ $define{doc_title}{Document Title}$ $endif$
 $ifndef{doc_author}$ $define{doc_author}{Wayne Warthen}$ $endif$
 $define{doc_date}{$date{%d %b %Y}$}$
--- a/Source/Doc/UserGuide.md
+++ b/Source/Doc/UserGuide.md
@@ -3353,7 +3353,7 @@ the RomWBW HBIOS configuration.
 | Interrupts        | Mode 2        |

 - CPU speed is detected at startup if DS1302 RTC is active
-   - Otherwise 20.000 MHz assumed
+   - Otherwise 8.000 MHz assumed
 - System timer is generated by onboard CTC
 - Hardware auto-detected:
   - Onboard DS1302 RTC
--- a/Source/HBIOS/Config/ZETA2_std.asm
+++ b/Source/HBIOS/Config/ZETA2_std.asm
@@ -26,7 +26,7 @@
 ;
 #include "cfg_zeta2.asm"
 ;
-CPUOSC		.SET	20000000	; CPU OSC FREQ IN MHZ
+CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
@@ -35,7 +35,7 @@ UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTSBC		.SET	TRUE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_ZETA	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_ZETA2	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
 ;
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
--- a/Source/HBIOS/cfg_zeta2.asm
+++ b/Source/HBIOS/cfg_zeta2.asm
@@ -28,7 +28,7 @@ BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
 ;
 CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
-CPUOSC		.EQU	20000000	; CPU OSC FREQ IN MHZ
+CPUOSC		.EQU	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
 DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
--- a/Source/ver.inc
+++ b/Source/ver.inc
@@ -1,8 +1,8 @@
 #DEFINE	RMJ	3
 #DEFINE	RMN	2
-#DEFINE	RUP	0
+#DEFINE	RUP	1
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.2.0"
+#DEFINE BIOSVER	"3.2.1-dev.1"
 #define rmj	RMJ
 #define rmn	RMN
 #define rup	RUP
--- a/Source/ver.lib
+++ b/Source/ver.lib
@@ -1,7 +1,7 @@
 rmj	equ	3
 rmn	equ	2
-rup	equ	0
+rup	equ	1
 rtp	equ	0
 biosver	macro
-	db	"3.2.0"
+	db	"3.2.1-dev.1"
 	endm
Author	SHA1	Message	Date
Wayne Warthen	8aebaab3fe	Fix SURVEY.COM (again) - Previous fix to SURVEY.COM port survey broke the memory survey. Everything should be OK now. - Regenerated documentation.	2023-03-22 16:15:04 -07:00
Wayne Warthen	798d8c3ea3	Merge pull request #337 from wwarthen/master Sync	2023-03-22 15:58:32 -07:00
Wayne Warthen	bbaf2b0714	Merge pull request #336 from elevendroids/master Fix default ZETA V2 SBC configuration	2023-03-22 15:57:43 -07:00
Michal Potrzebicz	74a8283bba	Fix default ZETA V2 SBC configuration - Set the default CPUOSC to 8MHz (default value in the project's documentation), updated the User Guide - Set the FDD controller to ZETA2 - regression introduced in `bd664c3`	2023-03-22 22:37:22 +00:00
Wayne Warthen	e869e55252	Prep v3.2.1 Development Branch	2023-03-21 14:48:28 -07:00
Wayne Warthen	e8a76817dc	Merge pull request #335 from wwarthen/master Catch-up	2023-03-18 20:09:02 -07:00