Support ATAPI in IDE and PPIDE Drivers

- Support is limited to 512 byte sectors.  So, devices such as ATAPI Zip Drives will work.  CD-ROM devices will not because they use a larger sector size.

Doc/ChangeLog.txt

@@ -7,6 +7,10 @@ Version 3.3
 - WBW: Support per-drive floppy configuration
 - WBW: Support for Bill Shen's VGARC
 - WBW: Support for MG014 Parallel Port module + printer
+- WBW: Support for EMM Zip Drive on PPI interface (much inspiration from Alan Cox)
+- WBW: Support for PPA Zip Drive on PPI interface (much inspiration from Alan Cox)
+- WBW: Support for SyQuest SparQ Drive on PPI interface (much inspiration from Alan Cox)
+- WBW: Support for ATAPI Disk Drives (not CD-ROMs) on IDE and PPIDE interfaces
 
 Version 3.2.1
 -------------

ReadMe.md

@@ -3,7 +3,7 @@
 **RomWBW ReadMe** \
 Version 3.3 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-03 May 2023
+06 Jun 2023
 
 # Overview
 

ReadMe.txt

@@ -1,6 +1,6 @@
 RomWBW ReadMe
 Wayne Warthen (wwarthen@gmail.com)
-03 May 2023
+06 Jun 2023
 
 
 

Source/Apps/assign.asm

@@ -1918,9 +1918,9 @@ dev06	.db	"SD",0
 dev07	.db	"PRPSD",0
 dev08	.db	"PPPSD",0
 dev09	.db	"HDSK",0
-dev10	.equ	devunk
-dev11	.equ	devunk
-dev12	.equ	devunk
+dev10	.db	"PPA",0
+dev11	.db	"IMM",0
+dev12	.db	"SYQ",0
 dev13	.equ	devunk
 dev14	.equ	devunk
 dev15	.equ	devunk

Source/CBIOS/cbios.asm

@@ -2929,6 +2929,14 @@ DRV_INIT3:
 	RET
 ;
 DRV_INIT3A:
+	; CHECK FOR HARD DISK REMOVABLE CARTRIDGE DRIVES
+	CP	DIODEV_PPA		; PPA (ZIP DRIVE) IS REMOVABLE
+	JR	Z,DRV_INIT3B		; IF SO, SKIP MEDIA CHECK
+	CP	DIODEV_IMM		; IMM (ZIP DRIVE) IS REMOVABLE
+	JR	Z,DRV_INIT3B		; IF SO, SKIP MEDIA CHECK
+	CP	DIODEV_SYQ		; IMM (ZIP DRIVE) IS REMOVABLE
+	JR	Z,DRV_INIT3B		; IF SO, SKIP MEDIA CHECK
+
 	; CHECK FOR ACTIVE AND RETURN IF NOT
 	PUSH	DE			; SAVE DE (HARD DISK VOLUME COUNTER)
 	PUSH	HL			; SAVE DRIVE LIST PTR
@@ -2944,6 +2952,7 @@ DRV_INIT3A:
 
 	RET	NZ			; IF NO MEDIA, JUST RETURN
 
+DRV_INIT3B:
 	; IF ACTIVE...
 	LD	(HL),C			; SAVE UNIT NUM IN LIST
 	INC	HL			; BUMP PTR
@@ -3392,9 +3401,9 @@ DEV06	.DB	"SD$"
 DEV07	.DB	"PRPSD$"
 DEV08	.DB	"PPPSD$"
 DEV09	.DB	"HDSK$"
-DEV10	.EQU	DEVUNK
-DEV11	.EQU	DEVUNK
-DEV12	.EQU	DEVUNK
+DEV10	.DB	"PPA$"
+DEV11	.DB	"IMM$"
+DEV12	.DB	"SYQ$"
 DEV13	.EQU	DEVUNK
 DEV14	.EQU	DEVUNK
 DEV15	.EQU	DEVUNK

Source/CPM3/boot.z80

@@ -181,6 +181,14 @@ dinit3:
 	ret
 ;
 dinit3a:
+	; check for hard disk removable cartridge drives
+	cp	0A0h			; ppa (zip drive) is removable
+	jr	z,dinit3b		; if so, skip media check
+	cp	0B0h			; imm (zip drive) is removable
+	jr	z,dinit3b		; if so, skip media check
+	cp	0C0h			; syq (syquest drive) is removable
+	jr	z,dinit3b		; if so, skip media check
+
 	; check for active and return if not
 	push	de			; save de (hard disk volume counter)
 	push	hl			; save drive list ptr
@@ -195,7 +203,8 @@ dinit3a:
 	pop	de			; restore de
 	
 	ret	nz			; if no media, just return
-	
+
+dinit3b:
 	; if active...
 	ld	(hl),c			; save unit num in list
 	inc	hl			; bump ptr

Source/Doc/Applications.md

@@ -51,6 +51,7 @@ found:
 | INTTEST     | No       | Yes        | Yes      |
 | FAT         | No       | Yes        | Yes      |
 | TUNE        | No       | Yes        | Yes      |
+| WDATE       | No       | Yes        | Yes      |
 
 `\clearpage`{=latex}
 
@@ -889,6 +890,28 @@ written in C and requires SDCC to compile. As such it is not part of
 the RomWBW build process. However, the full project and source code is
 found in the [FAT GitHub Repository](https://github.com/wwarthen/FAT).
 
+## Known Issues
+
+CP/M (and workalike) OSes have significant restrictions on filename
+characters.  The FAT application will block any attempt to create a
+file on the CP/M filesystem containing any of these prohibited
+characters:
+
+|         `< > . , ; : = ? * [ ] _ % | ( ) / \`
+
+The operation will be aborted with "`Error: Invalid Path Name`" if such
+a filename character is encountered.
+
+Since MS-DOS does allow some of these characters, you can have
+issues when copying files from MS-DOS to CP/M if the MS-DOS filenames
+use these characters.  Unfortunately, FAT is not yet smart enough to
+substitute illegal characters with legal ones.  So, you will need to
+clean the filenames before trying to copy them to CP/M.
+
+The FAT application does try to detect the scenario where you are
+copying a file to itself.  However, this detection is not perfect and
+can corrupt a file if it occurs.  Be careful to avoid this.
+
 `\clearpage`{=latex}
 
 # TUNE
@@ -1106,3 +1129,85 @@ can be used to reduce your processor speed.
 
 VGMPLAY is still under development. The source code is provided in the 
 RomWBW distribution.
+
+`\clearpage`{=latex}
+
+# WDATE
+
+`wdate` is a utility for CP/M systems that have Wayne Warthen's
+ROMWBW firmware. It reads or sets the real-time clock, using function
+calls in the BIOS. It should work on any RTC device that is supported by
+ROMWBW, including the internal interrupt-driven timer that is is available
+on some systems. 
+
+`wdate` differs from the `rtc.com` utility that is provided with the
+ROMWBW version of CP/M in that it only gets and sets the date/time. 
+`rtc.com` can also manipulate the nonvolatile RAM in certain clock
+devices, and modify the charge controller. However, `wdate` is (I would
+argue) easier to use, as it takes its input from the command line, which
+can be edited, and it's less fussy about the format. It doesn't require
+the date to be set if you only want to change the time, for example.
+ In addition, `wdate` has at least some error checking.
+
+`wdate` displays the day-of-week and month as English text, not 
+numbers. It calculates the day-of-week from the year, month, and day.
+RTC chips usually store a day-of-week value, but it's useless in this
+application for two reasons: first, the BIOS does not expose it. Second,
+there is no universally-accepted way to interpret it (which day does
+the week start on? Is '0' a valid day of the week?)
+
+## Syntax
+
+| `WDATE`
+| `WDATE ` *`<hr> <min>`*
+| `WDATE ` *`<hr> <min> <sec>`*
+| `WDATE ` *`<year> <month> <day> <hr> <min> <sec>`*
+
+## Usage
+
+    A> wdate
+    Saturday 27 May 13:14:39 2023
+
+With no arguments, displays the current date and time. 
+
+    A> wdate hr min
+
+With two arguments, sets the time in hours and minutes, without changing date
+or seconds
+
+    A> wdate hr min sec
+
+With three arguments, sets the time in hours, minutes, and seconds, without
+changing date
+
+    A> wdate year month day hr min sec
+
+With six arguments, sets date and time. All numbers are one or two digits.  The
+two-digit year starts at 2000. 
+
+    A> wdate /?
+
+Show a summary of the command-line usage.
+
+## Notes
+
+I've tested this utility with the DS1302 clock board designed by Ed 
+Brindly, and on the interrupt-driven timer built into my Z180 board. 
+However, it does not interact with hardware, only BIOS; I would expect 
+it to work with other hardware.
+
+wdate checks for the non-existence of ROMWBW, and also for failing 
+operations on the RTC. It will display the terse "No RTC" message in 
+both cases.
+
+The ROMWBW functions that manipulate the date and time operate on BCD 
+numbers, as RTC chips themselves usually do. wdate works in decimal, so 
+that it can check that the user input makes sense. A substantial part of
+the program's code is taken up by number format conversion and range 
+checking.
+
+## Etymology
+
+The `WDATE` application was written and contributed by Kevin Boone.
+The source code is available on GitHub at
+[https://github.com/kevinboone/wdate-cpm/blob/main/README.md](https://github.com/kevinboone/wdate-cpm/blob/main/README.md).

Source/Doc/UserGuide.md

@@ -3896,10 +3896,12 @@ may be discovered by RomWBW in your system.
 | DSKY      | System   | Keypad & Display                                       |
 | DSRTC     | RTC      | Maxim DS1302 Real-Time Clock w/ NVRAM                  |
 | DUART     | Char     | SCC2681 or compatible Dual UART                        |
-| FD        | Disk     | 8272 of compatible Floppy Disk Controller              |
+| EMM       | Disk     | Disk drive on Parallel Port emm interface (Zip Drive)  |
+| FD        | Disk     | 8272 or compatible Floppy Disk Controller              |
 | GDC       | Video    | uPD7220 Video Display Controller                       |
 | HDSK      | Disk     | SIMH Simulator Hard Disk                               |
 | IDE       | Disk     | IDE/ATA Hard Disk Interface                            |
+| IMM       | Disk     | IMM Zip Drive on PPI                                   |
 | INTRTC    | RTC      | Interrupt-based Real Time Clock                        |
 | KBD       | Kbd      | 8242 PS/2 Keyboard Controller                          |
 | KIO       | System   | Zilog Serial/ Parallel Counter/Timer                   |
@@ -3909,6 +3911,7 @@ may be discovered by RomWBW in your system.
 | I2C       | System   | I2C Interface                                          |
 | PIO       | Char     | Zilog Parallel Interface Controller                    |
 | PPIDE     | Disk     | 8255 IDE/ATA Hard Disk Interface                       |
+| PPA       | Disk     | PPA Zip Drive on PPI                                   |
 | PPK       | Kbd      | Matrix Keyboard                                        |
 | PPPSD     | Disk     | ParPortProp SD Card Interface                          |
 | PPPCON    | Serial   | ParPortProp Serial Console Interface                   |
@@ -3921,6 +3924,7 @@ may be discovered by RomWBW in your system.
 | SIO       | Char     | Zilog Serial Port Interface                            |
 | SN76489   | Sound    | SN76489 Programmable Sound Generator                   |
 | SPK       | Sound    | Bit-bang Speaker                                       |
+| SYQ       | Disk     | Iomega SparQ Drive on PPI                              |
 | TMS       | Video    | TMS9918/38/58 Video Display Controller                 |
 | UART      | Char     | 16C550 Family Serial Interface                         |
 | USB-FIFO  | Char     | FT232H-based ECB USB FIFO                              |

Source/HBIOS/Config/RCZ80_easy.asm

@@ -75,5 +75,6 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_kio.asm

@@ -72,5 +72,6 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_skz.asm

@@ -67,5 +67,6 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_std.asm

@@ -61,5 +61,6 @@ PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|USR]
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_tiny.asm

@@ -82,5 +82,6 @@ IDE0BASE	.SET	$90		; IDE 0: IO BASE ADDRESS
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_zrc.asm

@@ -59,5 +59,6 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_zrc_ram.asm

@@ -63,5 +63,6 @@ IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
 SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
 ;
 PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/cfg_dyno.asm

@@ -252,6 +252,12 @@ PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_master.asm

@@ -311,12 +311,33 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-LPTMODE		.EQU	LPTMODE_NONE	; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
+LPTMODE		.EQU	LPTMODE_NONE	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
 LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
 LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_SPP	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_SPP	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_SPP	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_mbc.asm

@@ -235,12 +235,33 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-LPTMODE		.EQU	LPTMODE_IBM	; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
+LPTMODE		.EQU	LPTMODE_SPP	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
 LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
 LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_SPP	; PPA: DRIVER MODE: PPAMODE_[NONE|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_SPP	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_SPP	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_mk4.asm

@@ -248,12 +248,18 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-LPTMODE		.EQU	LPTMODE_NONE	; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
+LPTMODE		.EQU	LPTMODE_NONE	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
 LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
 LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_n8.asm

@@ -247,6 +247,12 @@ PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_rcz180.asm

@@ -257,12 +257,33 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
+LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
 LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
 LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.EQU	$18		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.EQU	$00		; LPT 1: REGISTERS BASE ADR
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_rcz280.asm

@@ -261,12 +261,33 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
+LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
 LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
 LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.EQU	$18		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.EQU	$00		; LPT 1: REGISTERS BASE ADR
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_rcz80.asm

@@ -255,12 +255,33 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
+LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
 LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
 LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-LPT0BASE	.EQU	$18		; LPT 0: REGISTERS BASE ADR
+LPT0BASE	.EQU	$0C		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.EQU	$00		; LPT 1: REGISTERS BASE ADR
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_rph.asm

@@ -236,6 +236,12 @@ PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)

Source/HBIOS/cfg_sbc.asm

@@ -234,11 +234,12 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-LPTMODE		.EQU	LPTMODE_NONE	; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
-LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
-LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
-LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
-LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
 ;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD

Source/HBIOS/cfg_scz180.asm

@@ -251,12 +251,33 @@ PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
 PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
-LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|IBM|MG014]
+LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
 LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
 LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 LPT0BASE	.EQU	$18		; LPT 0: REGISTERS BASE ADR
 LPT1BASE	.EQU	$00		; LPT 1: REGISTERS BASE ADR
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_z80retro.asm

@@ -206,6 +206,12 @@ PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_zeta.asm

@@ -177,6 +177,12 @@ PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/cfg_zeta2.asm

@@ -188,6 +188,12 @@ PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
 ;
 LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+;
 PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP

Source/HBIOS/hbios.asm

@@ -1261,11 +1261,11 @@ Z280_INITZ:
 
 	; SET DEFAULT CPU CLOCK MULTIPLIERS (XTAL / 2)
 	;
-	; IT HAS BEEN REPORTED THAT CMR NEEDS TO BE SET PRIOR TO CCR
-	; WHEN USING AN INPUT FREQUENCY THAT IS XTAL / 2.
-	; I NEVER EXPERIENCED A PROBLEM RELATED TO ORDER, BUT JUST
+	; BILL MCMULLEN REPORTED THAT CMR NEEDS TO BE SET PRIOR TO CCR
+	; WHEN USING A CPU FREQUENCY (PHI) THAT IS XTAL * 2.
+	; HERE WE ARE SETTING CPU FREQUENCY TO XTAL / 2, BUT JUST
 	; FOR GOOD MEASURE, CMR IS SET PRIOR TO CCR BELOW.
-	; https://www.retrobrewcomputers.org/forum/index.php?t=msg&th=316&#msg_5045
+	; https://www.retrobrewcomputers.org/forum/index.php?t=msg&th=316&goto=5045&#msg_5045
 	XOR	A
 	OUT0	(Z180_CMR),A
 	OUT0	(Z180_CCR),A
@@ -3239,6 +3239,15 @@ HB_INITTBL:
 #IF (HDSKENABLE)
 	.DW	HDSK_INIT
 #ENDIF
+#IF (PPAENABLE)
+	.DW	PPA_INIT
+#ENDIF
+#IF (IMMENABLE)
+	.DW	IMM_INIT
+#ENDIF
+#IF (SYQENABLE)
+	.DW	SYQ_INIT
+#ENDIF
 #IF (PRPENABLE)
 	.DW	PRP_INIT
 #ENDIF
@@ -6348,6 +6357,33 @@ SIZ_HDSK	.EQU	$ - ORG_HDSK
 		.ECHO	" bytes.\n"
 #ENDIF
 ;
+#IF (PPAENABLE)
+ORG_PPA		.EQU	$
+  #INCLUDE "ppa.asm"
+SIZ_PPA		.EQU	$ - ORG_PPA
+		.ECHO	"PPA occupies "
+		.ECHO	SIZ_PPA
+		.ECHO	" bytes.\n"
+#ENDIF
+;
+#IF (IMMENABLE)
+ORG_IMM		.EQU	$
+  #INCLUDE "imm.asm"
+SIZ_IMM		.EQU	$ - ORG_IMM
+		.ECHO	"IMM occupies "
+		.ECHO	SIZ_IMM
+		.ECHO	" bytes.\n"
+#ENDIF
+;
+#IF (SYQENABLE)
+ORG_SYQ		.EQU	$
+  #INCLUDE "syq.asm"
+SIZ_SYQ		.EQU	$ - ORG_SYQ
+		.ECHO	"SYQ occupies "
+		.ECHO	SIZ_SYQ
+		.ECHO	" bytes.\n"
+#ENDIF
+;
 #IF (TERMENABLE)
 ORG_TERM	.EQU	$
   #INCLUDE "term.asm"
@@ -6762,7 +6798,6 @@ PS_PRTDC:
 	RES	7,D			; CLEAR LBA BIT
 	LD	B,11			; 11 BIT SHIFT TO CONVERT BLOCKS --> MB
 	CALL	SRL32			; RIGHT SHIFT
-	;CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
 	CALL	PRTDEC32		; PRINT DWORD IN DECIMAL
 	PRTS("MB$")			; PRINT SUFFIX
 	CALL	PC_COMMA
@@ -6777,7 +6812,6 @@ PS_PRTDC1:
 	RES	7,D			; CLEAR LBA BIT
 	LD	B,1			; 11 BIT SHIFT TO CONVERT BLOCKS --> MB
 	CALL	SRL32			; RIGHT SHIFT
-	;CALL	PRTDEC			; PRINT LOW WORD IN DECIMAL (HIGH WORD DISCARDED)
 	CALL	PRTDEC32		; PRINT DWORD IN DECIMAL
 	PRTS("KB$")			; PRINT SUFFIX
 	CALL	PC_COMMA
@@ -7134,6 +7168,9 @@ PS_DDSD		.TEXT	"SD$"
 PS_DDPRPSD	.TEXT	"PRPSD$"
 PS_DDPPPSD	.TEXT	"PPPSD$"
 PS_DDHDSK	.TEXT	"HDSK$"
+PS_DDPPA	.TEXT	"PPA$"
+PS_DDIMM	.TEXT	"IMM$"
+PS_DDSYQ	.TEXT	"SYQ$"
 ;
 ; DISK TYPE STRINGS
 ;
@@ -7546,6 +7583,52 @@ HB_HASFP	.DB	0		; NON-ZERO MEANS FP EXISTS
 ;
 HB_WRKBUF	.FILL	512,0		; INTERNAL DISK BUFFER
 ;
+;
+;
+#IFDEF MG014_MAP
+;
+	.FILL	32 - ($ & (32 - 1))	; ALIGN TO 32 BYTE BOUNDARY
+
+MG014_STATMAPLO:
+	; LOWER NIBBLE
+	.DB	$08	; 00
+	.DB	$0C	; 01
+	.DB	$00	; 02
+	.DB	$04	; 03
+	.DB	$0A	; 04
+	.DB	$0E	; 05
+	.DB	$02	; 06
+	.DB	$06	; 07
+	.DB	$09	; 08
+	.DB	$0D	; 09
+	.DB	$01	; 0A
+	.DB	$05	; 0B
+	.DB	$0B	; 0C
+	.DB	$0F	; 0D
+	.DB	$03	; 0E
+	.DB	$07	; 0F
+;
+MG014_STATMAPHI:
+	; UPPER NIBBLE
+	.DB	$80	; 00
+	.DB	$C0	; 01
+	.DB	$00	; 02
+	.DB	$40	; 03
+	.DB	$A0	; 04
+	.DB	$E0	; 05
+	.DB	$20	; 06
+	.DB	$60	; 07
+	.DB	$90	; 08
+	.DB	$D0	; 09
+	.DB	$10	; 0A
+	.DB	$50	; 0B
+	.DB	$B0	; 0C
+	.DB	$F0	; 0D
+	.DB	$30	; 0E
+	.DB	$70	; 0F
+;
+#ENDIF
+;
 HB_END		.EQU	$
 ;
 SLACK		.EQU	BNKTOP - $

Source/HBIOS/hbios.inc

@@ -321,6 +321,9 @@ DIODEV_SD	.EQU	$60
 DIODEV_PRPSD	.EQU	$70
 DIODEV_PPPSD	.EQU	$80
 DIODEV_HDSK	.EQU	$90
+DIODEV_PPA	.EQU	$A0
+DIODEV_IMM	.EQU	$B0
+DIODEV_SYQ	.EQU	$C0
 ;
 ; RTC DEVICE IDS
 ;

Source/HBIOS/lpt.asm

@@ -10,9 +10,10 @@
 ;
 ;==================================================================================================
 ;
-;  IBM STYLE INTERFACE (USED BY NHYODYNE PRINT MODULE):
+;  IBM PC STANDARD PARALLEL PORT (SPP):
+;  - NHYODYNE PRINT MODULE
 ;
-;  PORT 0 (INPUT/OUTPUT):
+;  PORT 0 (OUTPUT):
 ;
 ;	D7	D6	D5	D4	D3	D2	D1	D0
 ;     +-------+-------+-------+-------+-------+-------+-------+-------+
@@ -26,7 +27,7 @@
 ;     | /BUSY | /ACK  | POUT  | SEL   | /ERR  | 0     | 0     | 0     |
 ;     +-------+-------+-------+-------+-------+-------+-------+-------+
 ;
-;  PORT 2 (INPUT/OUTPUT):
+;  PORT 2 (OUTPUT):
 ;
 ;	D7	D6	D5	D4	D3	D2	D1	D0
 ;     +-------+-------+-------+-------+-------+-------+-------+-------+
@@ -35,9 +36,10 @@
 ;
 ;==================================================================================================
 ;
-;  MG014 STYLE INTERFACE (USED BY RCBUS MG014 MODULE):
+;  MG014 STYLE INTERFACE:
+;  - RCBUS MG014 MODULE
 ;
-;  PORT 0 (INPUT/OUTPUT):
+;  PORT 0 (OUTPUT):
 ;
 ;	D7	D6	D5	D4	D3	D2	D1	D0
 ;     +-------+-------+-------+-------+-------+-------+-------+-------+
@@ -51,7 +53,7 @@
 ;     |	      |	      |	      | /ERR  | SEL   | POUT  | BUSY  | /ACK  |
 ;     +-------+-------+-------+-------+-------+-------+-------+-------+
 ;
-;  PORT 2 (INPUT/OUTPUT):
+;  PORT 2 (OUTPUT):
 ;
 ;	D7	D6	D5	D4	D3	D2	D1	D0
 ;     +-------+-------+-------+-------+-------+-------+-------+-------+
@@ -165,7 +167,7 @@ LPT_OUT:
 	JR	Z,LPT_OUT		; LOOP IF NOT
 	LD	C,(IY+3)		; PORT 0 (DATA)
 	OUT	(C),E			; OUTPUT DATA TO PORT
-#IF (LPTMODE == LPTMODE_IBM)
+#IF (LPTMODE == LPTMODE_SPP)
 	LD	A,%00001101		; SELECT & STROBE, LEDS OFF
 #ENDIF
 #IF (LPTMODE == LPTMODE_MG014)
@@ -175,7 +177,7 @@ LPT_OUT:
 	INC	C
 	OUT	(C),A			; OUTPUT DATA TO PORT
 	CALL	DELAY
-#IF (LPTMODE == LPTMODE_IBM)
+#IF (LPTMODE == LPTMODE_SPP)
 	LD	A,%00001100		; SELECT, LEDS OFF
 #ENDIF
 #IF (LPTMODE == LPTMODE_MG014)
@@ -199,7 +201,7 @@ LPT_OST:
 	LD	C,(IY+3)		; BASE PORT
 	INC	C			; SELECT STATUS PORT
 	IN	A,(C)			; GET STATUS INFO
-#IF (LPTMODE == LPTMODE_IBM)
+#IF (LPTMODE == LPTMODE_SPP)
 	AND	%10000000		; ISOLATE /BUSY
 #ENDIF
 #IF (LPTMODE == LPTMODE_MG014)
@@ -221,7 +223,7 @@ LPT_INITDEV:
 ;
 LPT_INITDEVX:
 ;
-#IF (LPTMODE == LPTMODE_IBM)
+#IF (LPTMODE == LPTMODE_SPP)
 ;
 	LD	C,(IY+3)		; PORT 0 (DATA)
 	XOR	A			; CLEAR ACCUM
@@ -283,7 +285,7 @@ LPT_DETECT:
 ;
 #ENDIF
 ;
-#IF (LPTMODE == LPTMODE_IBM)
+#IF (LPTMODE == LPTMODE_SPP)
 ;
 LPT_DETECT:
 	LD	C,(IY+3)		; BASE PORT ADDRESS
@@ -294,7 +296,7 @@ LPT_DETECT:
 ;
 LPT_DETECT1:
 	; LPT FOUND, RECORD IT
-	LD	A,LPTMODE_IBM		; RETURN CHIP TYPE
+	LD	A,LPTMODE_SPP		; RETURN CHIP TYPE
 	RET				; DONE
 ;
 LPT_DETECT2:
@@ -372,7 +374,7 @@ LPT_PRTCFG:
 	CALL	PRTHEXBYTE		; PRINT BASE PORT
 
 	; PRINT THE LPT TYPE
-	CALL	PC_SPACE		; FORMATTING
+	PRTS(" MODE=$")			; FORMATTING
 	LD	A,(IY+1)		; GET LPT TYPE BYTE
 	RLCA				; MAKE IT A WORD OFFSET
 	LD	HL,LPT_TYPE_MAP		; POINT HL TO TYPE MAP TABLE
@@ -396,11 +398,11 @@ LPT_PRTCFG:
 ;
 LPT_TYPE_MAP:
 		.DW	LPT_STR_NONE
-		.DW	LPT_STR_IBM
+		.DW	LPT_STR_SPP
 		.DW	LPT_STR_MG014
 ;
 LPT_STR_NONE	.DB	"<NOT PRESENT>$"
-LPT_STR_IBM	.DB	"IBM$"
+LPT_STR_SPP	.DB	"SPP$"
 LPT_STR_MG014	.DB	"MG014$"
 ;
 ; WORKING VARIABLES

Source/HBIOS/ppide.asm

@@ -5,6 +5,7 @@
 ;
 ; TODO:
 ; - GOPARTNER NEEDS TO HANDLE "NO PARTNER" CONDITION
+; - DATA TRANSFERS LIMITED TO 512 BYTES WHICH IS INSUFFICIENT FOR CD=ROM MEDIA
 ;
 ; NOTES:
 ;  - WELL KNOWN PPIDE PORT ADDRESSES:
@@ -135,6 +136,8 @@ PPIDE_REG_LBA0		.EQU	PPIDE_CTL_CS1 | $03	; LBA BYTE 0 (BITS 0-7) (R/W)
 PPIDE_REG_LBA1		.EQU	PPIDE_CTL_CS1 | $04	; LBA BYTE 1 (BITS 8-15) (R/W)
 PPIDE_REG_LBA2		.EQU	PPIDE_CTL_CS1 | $05	; LBA BYTE 2 (BITS 16-23) (R/W)
 PPIDE_REG_LBA3		.EQU	PPIDE_CTL_CS1 | $06	; LBA BYTE 3 (BITS 24-27) (R/W)
+PPIDE_REG_BCL		.EQU	PPIDE_CTL_CS1 | $04	; PKT BYTE COUNT LOW (BITS 0-7) (R/W)
+PPIDE_REG_BCH		.EQU	PPIDE_CTL_CS1 | $05	; PKT BYTE COUNT HIGH (BITS 8-15) (R/W)
 PPIDE_REG_STAT		.EQU	PPIDE_CTL_CS1 | $07	; STATUS REGISTER (R)
 PPIDE_REG_CMD		.EQU	PPIDE_CTL_CS1 | $07	; COMMAND REGISTER (EXECUTE) (W)
 PPIDE_REG_ALTSTAT	.EQU	PPIDE_CTL_CS3 | $06	; ALTERNATE STATUS REGISTER (R)
@@ -143,13 +146,14 @@ PPIDE_REG_DRVADR	.EQU	PPIDE_CTL_CS3 | $07	; DRIVE ADDRESS REGISTER (R)
 ;
 ; COMMAND BYTES
 ;
-PPIDE_CIDE_NOP		.EQU	$00
-PPIDE_CIDE_DEVRES	.EQU	$08
+PPIDE_CMD_NOP		.EQU	$00
+PPIDE_CMD_DEVRES	.EQU	$08
 PPIDE_CMD_RECAL		.EQU	$10
 PPIDE_CMD_READ		.EQU	$20
 PPIDE_CMD_WRITE		.EQU	$30
-PPIDE_CIDE_DEVDIAG	.EQU	$90
-PPIDE_CIDE_IDPKTDEV	.EQU	$A1
+PPIDE_CMD_DEVDIAG	.EQU	$90
+PPIDE_CMD_PACKET	.EQU	$A0
+PPIDE_CMD_IDPKTDEV	.EQU	$A1
 PPIDE_CMD_IDDEV		.EQU	$EC
 PPIDE_CMD_SETFEAT	.EQU	$EF
 ;
@@ -175,6 +179,7 @@ PPIDE_STRDYTO	.EQU	-5
 PPIDE_STDRQTO	.EQU	-6
 PPIDE_STBSYTO	.EQU	-7
 PPIDE_STNOTSUP	.EQU	-8
+PPIDE_STNOTRDY	.EQU	-9
 ;
 ; DRIVE SELECTION BYTES (FOR USE IN DRIVE/HEAD REGISTER)
 ;
@@ -407,10 +412,6 @@ PPIDE_INIT5:
 	JP	NZ,PPIDE_PRTSTATSTR	; EXIT VIA PRINT STATUS STRING
 ;
 PPIDE_INIT6:
-	LD	A,(IY+PPIDE_TYPE)	; GET DEVICE TYPE
-	CP	PPIDE_TYPEATA		; ATA?
-	RET	NZ			; IF NOT, THEN DONE
-;
 	LD	DE,PPIDE_STR_8BIT
 	BIT	1,(IY+PPIDE_ACC)	; 8 BIT ACCESS?
 	CALL	NZ,WRITESTR
@@ -526,12 +527,12 @@ PPIDE_IO:
 	PUSH	HL			; ... TO FILTER ALL EXITS
 #ENDIF
 	PUSH	BC			; SAVE COUNTERS
-	CALL	PPIDE_SELUNIT		; HARDWARE SELECTION OF TARGET UNIT
 	CALL	PPIDE_CHKERR		; CHECK FOR ERR STATUS AND RESET IF SO
 	POP	BC			; RESTORE COUNTERS
 	JR	NZ,PPIDE_IO3		; BAIL OUT ON ERROR
 PPIDE_IO1:
 	PUSH	BC			; SAVE COUNTERS
+	CALL	PPIDE_SELUNIT		; HARDWARE SELECTION OF TARGET UNIT
 	LD	HL,(PPIDE_IOFNADR)	; GET PENDING IO FUNCTION ADDRESS
 	CALL	JPHL			; ... AND CALL IT
 	JR	NZ,PPIDE_IO2		; IF ERROR, SKIP INCREMENT
@@ -644,8 +645,6 @@ PPIDE_GEOM:
 ; FUNCTION SUPPORT ROUTINES
 ;=============================================================================
 ;
-;
-;
 PPIDE_SETFEAT:
 	PUSH	AF
 #IF (PPIDETRACE >= 3)
@@ -674,32 +673,6 @@ PPIDE_SETFEAT:
 ;
 ;
 ;
-PPIDE_NOP:
-#IF (PPIDETRACE >= 3)
-	CALL	PPIDE_PRTPREFIX
-	PRTS(" NOP$")
-#ENDIF
-	LD	A,(PPIDE_DRVHD)
-	;OUT	(PPIDE_IO_DRVHD),A
-	CALL	PPIDE_OUT
-	.DB	PPIDE_REG_DRVHD
-#IF (PPIDETRACE >= 3)
-	CALL	PC_SPACE
-	CALL	PRTHEXBYTE
-#ENDIF
-;
-	; EXECUTE THE NOP COMMAND, BUT DON'T WAIT FOR DRDY, JUST
-	; MAKE SURE BUSY IS CLEAR.  THIS COMMAND IS USED DURING
-	; DEVICE DETECTION/INITIALIZATION AND ATAPI DEVICES WILL
-	; NOT ASSERT DRDY AFTER RESET.
-	LD	A,PPIDE_CIDE_NOP	; CMD = NOP
-	LD	(PPIDE_CMD),A		; SAVE IT
-	CALL	PPIDE_WAITBSY
-	RET	NZ
-	JP	PPIDE_RUNCMD1		; RUN COMMAND AND EXIT
-;
-;
-;
 PPIDE_IDENTIFY:
 #IF (PPIDETRACE >= 3)
 	CALL	PPIDE_PRTPREFIX
@@ -715,8 +688,13 @@ PPIDE_IDENTIFY:
 #ENDIF
 	LD	A,PPIDE_CMD_IDDEV
 	LD	(PPIDE_CMD),A
-	CALL	PPIDE_RUNCMD
+	CALL	PPIDE_RUNCMD_ND
 	RET	NZ
+;
+	CALL	PPIDE_IN
+	.DB	PPIDE_REG_STAT
+	BIT	3,A			; IS DRQ SET?
+	JP	Z,PPIDE_NOMEDIA
 ;
 	LD	HL,HB_WRKBUF
 	JP	PPIDE_GETBUF		; EXIT THRU BUFRD
@@ -729,21 +707,21 @@ PPIDE_IDENTIFYPACKET:
 	PRTS(" IDPKTDEV$")
 #ENDIF
 	LD	A,(PPIDE_DRVHD)
-	;OUT	(PPIDE_IO_DRVHD),A
+	;OUT	(PPIDE_REG_DRVHD),A
 	CALL	PPIDE_OUT
 	.DB	PPIDE_REG_DRVHD
 #IF (PPIDETRACE >= 3)
 	CALL	PC_SPACE
 	CALL	PRTHEXBYTE
 #ENDIF
-	LD	A,PPIDE_CIDE_IDPKTDEV
+	LD	A,PPIDE_CMD_IDPKTDEV
 	LD	(PPIDE_CMD),A
-	CALL	PPIDE_RUNCMD
+	CALL	PPIDE_RUNCMD_ND
 	RET	NZ
 ;
 	CALL	PPIDE_IN
 	.DB	PPIDE_REG_STAT
-	BIT	6,A			; IS DRQ SET?
+	BIT	3,A			; IS DRQ SET?
 	JP	Z,PPIDE_NOMEDIA
 ;
 	LD	HL,HB_WRKBUF
@@ -751,6 +729,33 @@ PPIDE_IDENTIFYPACKET:
 ;
 ;
 ;
+PPIDE_PACKET:
+#IF (PPIDETRACE >= 3)
+	CALL	PPIDE_PRTPREFIX
+	PRTS(" PACKET$")
+#ENDIF
+	LD	A,(PPIDE_DRVHD)
+	;OUT	(PPIDE_REG_DRVHD),A
+	CALL	PPIDE_OUT
+	.DB	PPIDE_REG_DRVHD
+#IF (PPIDETRACE >= 3)
+	CALL	PC_SPACE
+	CALL	PRTHEXBYTE
+#ENDIF
+	XOR	A			; ZERO
+	CALL	PPIDE_OUT
+	.DB	PPIDE_REG_FEAT		; FEATURE REG = 0
+	CALL	PPIDE_OUT
+	.DB	PPIDE_REG_BCL
+	LD	A,8
+	CALL	PPIDE_OUT
+	.DB	PPIDE_REG_BCH		; BYTE COUNT = 512????
+	LD	A,PPIDE_CMD_PACKET
+	LD	(PPIDE_CMD),A
+	JP	PPIDE_RUNCMD_ND
+;
+;
+;
 PPIDE_RDSEC:
 ;
 #IF (PPIDETRACE >= 3)
@@ -764,6 +769,17 @@ PPIDE_RDSEC:
 #IF (PPIDETRACE >= 3)
 	CALL	PC_SPACE
 	CALL	PRTHEXBYTE
+#ENDIF
+	LD	A,(IY+PPIDE_TYPE)
+	CP	PPIDE_TYPEATA
+	JR	Z,PPIDE_ATA_RDSEC
+	CP	PPIDE_TYPEATAPI
+	JR	Z,PPIDE_PKT_RDSEC
+	JP	PPIDE_CMDERR
+;
+PPIDE_ATA_RDSEC:
+#IF (PPIDETRACE >= 3)
+	PRTS(" ATA$")
 #ENDIF
 	CALL	PPIDE_SETADDR		; SETUP CYL, TRK, HEAD
 	LD	A,PPIDE_CMD_READ
@@ -773,6 +789,31 @@ PPIDE_RDSEC:
 	LD	HL,(PPIDE_DSKBUF)
 	JP	PPIDE_GETBUF
 ;
+PPIDE_PKT_RDSEC:
+#IF (PPIDETRACE >= 3)
+	PRTS(" PKT$")
+#ENDIF
+	; SETUP LBA
+	; 3 BYTES, LITTLE ENDIAN -> BIG ENDIAN
+	LD	HL,PPIDE_PKTCMD_RW10+3	; START OF LBA FIELD IN CDB (MSB)
+	LD	A,(IY+PPIDE_LBA+2)	; THIRD BYTE OF LBA FIELD IN CFG (MSB)
+	LD	(HL),A
+	INC	HL
+	LD	A,(IY+PPIDE_LBA+1)
+	LD	(HL),A
+	INC	HL
+	LD	A,(IY+PPIDE_LBA+0)
+	LD	(HL),A
+	INC	HL
+	LD	HL,PPIDE_PKTCMD_RW10
+	LD	A,SCSI_CMD_READ10
+	LD	(HL),A
+	XOR	A			; READ DIRECTION
+	LD	(PPIDE_XFRDIR),A	; SAVE IT
+	CALL	PPIDE_RUNPCMD
+	JP	NZ,PPIDE_CHKPCMD
+	RET
+;
 ;
 ;
 PPIDE_WRSEC:
@@ -788,6 +829,17 @@ PPIDE_WRSEC:
 #IF (PPIDETRACE >= 3)
 	CALL	PC_SPACE
 	CALL	PRTHEXBYTE
+#ENDIF
+	LD	A,(IY+PPIDE_TYPE)
+	CP	PPIDE_TYPEATA
+	JR	Z,PPIDE_ATA_WRSEC
+	CP	PPIDE_TYPEATAPI
+	JR	Z,PPIDE_PKT_WRSEC
+	JP	PPIDE_CMDERR
+;
+PPIDE_ATA_WRSEC:
+#IF (PPIDETRACE >= 3)
+	PRTS(" ATA$")
 #ENDIF
 	CALL	PPIDE_SETADDR		; SETUP CYL, TRK, HEAD
 	LD	A,PPIDE_CMD_WRITE
@@ -797,6 +849,31 @@ PPIDE_WRSEC:
 	LD	HL,(PPIDE_DSKBUF)
 	JP	PPIDE_PUTBUF
 ;
+PPIDE_PKT_WRSEC:
+#IF (PPIDETRACE >= 3)
+	PRTS(" PKT$")
+#ENDIF
+	; SETUP LBA
+	; 3 BYTES, LITTLE ENDIAN -> BIG ENDIAN
+	LD	HL,PPIDE_PKTCMD_RW10+3	; START OF LBA FIELD IN CDB (MSB)
+	LD	A,(IY+PPIDE_LBA+2)	; THIRD BYTE OF LBA FIELD IN CFG (MSB)
+	LD	(HL),A
+	INC	HL
+	LD	A,(IY+PPIDE_LBA+1)
+	LD	(HL),A
+	INC	HL
+	LD	A,(IY+PPIDE_LBA+0)
+	LD	(HL),A
+	INC	HL
+	LD	HL,PPIDE_PKTCMD_RW10
+	LD	A,SCSI_CMD_WRITE10
+	LD	(HL),A
+	OR	$FF			; WRITE DIRECTION
+	LD	(PPIDE_XFRDIR),A	; SAVE IT
+	CALL	PPIDE_RUNPCMD
+	JP	NZ,PPIDE_CHKPCMD
+	RET
+;
 ;
 ;
 PPIDE_SETADDR:
@@ -807,8 +884,8 @@ PPIDE_SETADDR:
 	CALL	HB_DSKACT		; SHOW ACTIVITY
 #ENDIF
 	; SEND 3 LOWEST BYTES OF LBA IN REVERSE ORDER
-	; IDE_IO_LBA3 HAS ALREADY BEEN SET
-	; HSTLBA2-0 --> IDE_IO_LBA2-0
+	; IDE_REG_LBA3 HAS ALREADY BEEN SET
+	; HSTLBA2-0 --> IDE_REG_LBA2-0
 	LD	A,(IY+PPIDE_LBA+2)
 #IF (PPIDETRACE >= 3)
 	CALL	PC_SPACE
@@ -847,6 +924,16 @@ PPIDE_SETADDR:
 ; COMMAND PROCESSING
 ;=============================================================================
 ;
+; RUN AN ATA COMMAND.  THERE ARE TWO ENTRY POINTS.  THE NORMAL ENTRY
+; POINT WILL WAIT FOR DRIVE READY.  THE _ND ENTRY POINT ONLY WAITS
+; FOR THE DEVICE TO BE NOT BUSY.  THE CORRECT ENTRY POINT DEPENDS ON
+; THE COMMAND.
+;
+PPIDE_RUNCMD_ND:
+	CALL	PPIDE_WAITBSY		; WAIT WHILE DEVICE BUSY
+	RET	NZ			; BAIL OUT ON TIMEOUT
+	JR	PPIDE_RUNCMD1		; CONTINUE
+
 PPIDE_RUNCMD:
 	CALL	PPIDE_WAITRDY		; WAIT FOR DRIVE READY
 	RET	NZ			; BAIL OUT ON TIMEOUT
@@ -871,54 +958,153 @@ PPIDE_RUNCMD1:
 	JP	NZ,PPIDE_CMDERR
 	RET
 ;
+; PACKET COMMAND PROCESSOR
+; HL: ADDRESS OF PACKET COMMAND BUFFER
 ;
+PPIDE_RUNPCMD:
+	PUSH	HL
+	CALL	PPIDE_PACKET
+	POP	HL
+	RET	NZ			; BAIL OUT ON ERROR
+;
+#IF (PPIDETRACE >= 3)
+	PRTS("\r\nPKTCMD:$")
+	PUSH	HL
+	POP	DE
+	LD	A,12
+	CALL	PRTHEXBUF
+#ENDIF
+;
+	; IF ZIP DRIVE HAS FALLEN ASLEEP, THEN IT WILL NEED EXTRA
+	; TIME HERE TO WAKE UP BEFORE ACCEPTING THE COMMAND.  USE
+	; LONG TIMEOUT TO ACCOMMODATE THIS.
+	LD	DE,(PPIDE_TIMEOUT)	; GET CURRENT TIMEOUT
+	PUSH	DE			; SAVE IT
+	LD	DE,PPIDE_TOSLOW		; SLOW TIMEOUT FOR THIS
+	LD	(PPIDE_TIMEOUT),DE	; SET IT
+	LD	B,6			; 6 WORDS ALWAYS
+	CALL	PPIDE_PUT
+	POP	DE			; RECOVER TIMEOUT
+	LD	(PPIDE_TIMEOUT),DE	; SET IT
+	RET	NZ
+;
+	CALL	PPIDE_IN
+	.DB	PPIDE_REG_STAT
+	BIT	3,A			; IS DRQ SET?
+	RET	Z			; IF NOT, ALL DONE
+;
+	CALL	PPIDE_IN
+	.DB	PPIDE_REG_BCL
+	LD	C,A
+	CALL	PPIDE_IN
+	.DB	PPIDE_REG_BCH
+	LD	B,A
+;
+	; BELOW ASSUMES MAX TRANSFER OF 512 BYTES!!!
+	PUSH	BC			; SAVE BYTE COUNT
+	SRL	B			; CONVERT
+	RR	C			; ... TO WORDS
+	LD	B,C
+	;LD	HL,HB_WRKBUF		; SET XFR BUFFER
+	LD	HL,(PPIDE_DSKBUF)	; SET XFR BUFFER
+	
+	LD	A,(PPIDE_XFRDIR)
+	OR	A
+	JR	NZ,PPIDE_RUNPCMD2	; NZ = WRITE
+	CALL	PPIDE_GET		; GET SOME DATA
+	JR	PPIDE_RUNPCMD3
+PPIDE_RUNPCMD2:
+	CALL	PPIDE_PUT		; PUT SOME DATA
+PPIDE_RUNPCMD3:
+	POP	BC			; RESTORE BYTE COUNT
+	RET	NZ			; BAIL OUT ON ERRORS
+;
+	XOR	A
+	RET
+;
+; THE FOLLOWING IS USED TO ASSESS ANY ERROR THAT OCCURS DURING
+; RUNCMD AND SET AN APPROPRIATE ERROR CODE.
+;
+PPIDE_CHKPCMD:
+;
+	LD	HL,HB_WRKBUF
+	LD	(PPIDE_DSKBUF),HL
+	LD	HL,PPIDE_PKTCMD_SENSE
+	CALL	PPIDE_RUNPCMD
+	RET	NZ
+;
+	CALL	PPIDE_IN
+	.DB	PPIDE_REG_BCL
+;
+#IF (PPIDETRACE >= 3)
+	CALL	NEWLINE
+	LD	DE,HB_WRKBUF
+	CALL	PRTHEXBUF
+#ENDIF
+;
+	; ASSESS SENSE DATA AND SET APPROPRIATE ERROR
+	LD	A,(HB_WRKBUF+12)
+	CP	$3A
+	JP	Z,PPIDE_NOMEDIA
+	CP	$04
+	JP	Z,PPIDE_NOTRDY
+;
+	JP	PPIDE_CMDERR
+;
+; HL=BUFFER
 ;
 PPIDE_GETBUF:
+	LD	B,0
+	; FALL THRU!!!
+;
+; HL=BUFFER
+; B=WORD COUNT, 0=256
+;
+PPIDE_GET:
 #IF (PPIDETRACE >= 3)
-	PRTS(" GETBUF$")
+	PRTS(" GET$")
 #ENDIF
 ;
 	; WAIT FOR BUFFER
+	PUSH	BC
+	PUSH	HL
 	CALL	PPIDE_WAITDRQ		; WAIT FOR BUFFER READY
+	POP	HL
+	POP	BC
 	RET	NZ			; BAIL OUT IF TIMEOUT
 ;
 	; SETUP PPI TO READ
 	LD	A,PPIDE_DIR_READ	; SET DATA BUS DIRECTION TO READ
-	;OUT	(PPIDE_IO_PPI),A	; DO IT
+	;OUT	(PPIDE_REG_PPI),A	; DO IT
 	LD	C,(IY+PPIDE_PPI)	; PPI CONTROL WORD
 	OUT	(C),A			; WRITE IT
 ;
 	; SELECT READ/WRITE IDE REGISTER
 	LD	A,PPIDE_REG_DATA	; DATA REGISTER
-	;OUT	(PPIDE_IO_CTL),A	; DO IT
+	;OUT	(PPIDE_REG_CTL),A	; DO IT
 	LD	C,(IY+PPIDE_CTL)	; SET IDE ADDRESS
 	OUT	(C),A			; DO IT
 	LD	E,A			; E := READ UNASSERTED
 	XOR	PPIDE_CTL_DIOR		; SWAP THE READ LINE BIT
 	LD	D,A			; D := READ ASSERTED
 ;
-	; LOOP SETUP
-	XOR	A			; IMPORTANT, NEEDED FOR LOOP END COMPARISON
-	LD	B,0			; 256 ITERATIONS
+	LD	A,B			; LOOP COUNTER IN A
 	LD	C,(IY+PPIDE_CTL)	; SET IDE ADDRESS
-;
 	BIT	1,(IY+PPIDE_ACC)	; 8 BIT?
-	JR	Z,PPIDE_GETBUF1		; IF NOT, DO 16 BIT
-	CALL	PPIDE_GETBUF8		; FIRST PASS (FIRST 256 BYTES)
-	CALL	PPIDE_GETBUF8		; SECOND PASS (LAST 256 BYTES)
-	JR	PPIDE_GETBUF2		; CONTINUE
-PPIDE_GETBUF1:
-	CALL	PPIDE_GETBUF16		; FIRST PASS (FIRST 256 BYTES)
-	CALL	PPIDE_GETBUF16		; SECOND PASS (LAST 256 BYTES)
-PPIDE_GETBUF2:
+	JR	Z,PPIDE_GET1		; IF NOT, DO 16 BIT
+	CALL	PPIDE_GET8		; 8-BIT READ
+	JR	PPIDE_GET2		; CONTINUE
+PPIDE_GET1:
+	CALL	PPIDE_GET16		; 16-0BIT READ
+PPIDE_GET2:
 	CALL	PPIDE_WAITRDY		; PROBLEMS IF THIS IS REMOVED!
 	RET	NZ
 	CALL	PPIDE_GETRES
 	JP	NZ,PPIDE_IOERR
 	RET
 ;
-PPIDE_GETBUF8:	; 8 BIT WIDE READ LOOP
-	; ENTER W/ C = PPIDE_IO_CTL
+PPIDE_GET8:	; 8 BIT WIDE READ LOOP
+	; ENTER W/ C = PPIDE_REG_CTL
 	OUT	(C),D			; ASSERT READ
 	DEC	C			; CTL -> MSB
 	DEC	C			; MSB -> LSB
@@ -926,12 +1112,19 @@ PPIDE_GETBUF8:	; 8 BIT WIDE READ LOOP
 	INC	C			; LSB -> MSB
 	INC	C			; MSB -> CTL
 	OUT	(C),E			; DEASSERT READ
-	CP	B			; B == A == 0?
-	JR	NZ,PPIDE_GETBUF8	; LOOP UNTIL DONE
+	OUT	(C),D			; ASSERT READ
+	DEC	C			; CTL -> MSB
+	DEC	C			; MSB -> LSB
+	INI				; READ FROM LSB
+	INC	C			; LSB -> MSB
+	INC	C			; MSB -> CTL
+	OUT	(C),E			; DEASSERT READ
+	DEC	A
+	JR	NZ,PPIDE_GET8		; LOOP UNTIL DONE
 	RET
 ;
-PPIDE_GETBUF16:	; 16 BIT WIDE READ LOOP
-	; ENTER W/ C = PPIDE_IO_CTL
+PPIDE_GET16:	; 16 BIT WIDE READ LOOP
+	; ENTER W/ C = PPIDE_REG_CTL
 	OUT	(C),D			; ASSERT READ
 	DEC	C			; CTL -> MSB
 	DEC	C			; MSB -> LSB
@@ -940,30 +1133,41 @@ PPIDE_GETBUF16:	; 16 BIT WIDE READ LOOP
 	INI				; READ MSB FOR 16 BIT
 	INC	C			; MSB -> CTL
 	OUT	(C),E			; DEASSERT READ
-	CP	B			; B == A == 0?
-	JR	NZ,PPIDE_GETBUF16	; LOOP UNTIL DONE
+	DEC	A
+	JR	NZ,PPIDE_GET16		; LOOP UNTIL DONE
 	RET
 ;
-;
+; HL=BUFFER
 ;
 PPIDE_PUTBUF:
+	LD	B,0
+	; FALL THRU!!!
+;
+; HL=BUFFER
+; B=WORD COUNT, 0=256
+;
+PPIDE_PUT:
 #IF (PPIDETRACE >= 3)
-	PRTS(" PUTBUF$")
+	PRTS(" PUT$")
 #ENDIF
 ;
 	; WAIT FOR BUFFER
+	PUSH	BC
+	PUSH	HL
 	CALL	PPIDE_WAITDRQ		; WAIT FOR BUFFER READY
+	POP	HL
+	POP	BC
 	RET	NZ			; BAIL OUT IF TIMEOUT
 ;
 	; SETUP PPI TO WRITE
 	LD	A,PPIDE_DIR_WRITE	; SET DATA BUS DIRECTION TO WRITE
-	;OUT	(PPIDE_IO_PPI),A	; DO IT
+	;OUT	(PPIDE_REG_PPI),A	; DO IT
 	LD	C,(IY+PPIDE_PPI)	; PPI CONTROL WORD
 	OUT	(C),A			; WRITE IT
 ;
 	; SELECT READ/WRITE IDE REGISTER
 	LD	A,PPIDE_REG_DATA	; DATA REGISTER
-	;OUT	(PPIDE_IO_CTL),A	; DO IT
+	;OUT	(PPIDE_REG_CTL),A	; DO IT
 	LD	C,(IY+PPIDE_CTL)	; SET IDE ADDRESS
 	OUT	(C),A			; DO IT
 	LD	E,A			; E := WRITE UNASSERTED
@@ -971,26 +1175,22 @@ PPIDE_PUTBUF:
 	LD	D,A			; D := WRITE ASSERTED
 ;
 	; LOOP SETUP
-	XOR	A			; IMPORTANT, NEEDED FOR LOOP END COMPARISON
-	LD	B,0			; 256 ITERATIONS
+	LD	A,B			; LOOP COUNTER IN A
 	LD	C,(IY+PPIDE_CTL)	; SET IDE ADDRESS
-;
 	BIT	1,(IY+PPIDE_ACC)	; 8 BIT?
-	JR	Z,PPIDE_PUTBUF1		; IF NOT, DO 16 BIT
-	CALL	PPIDE_PUTBUF8		; FIRST PASS (FIRST 256 BYTES)
-	CALL	PPIDE_PUTBUF8		; SECOND PASS (LAST 256 BYTES)
-	JR	PPIDE_PUTBUF2		; CONTINUE
-PPIDE_PUTBUF1:
-	CALL	PPIDE_PUTBUF16		; FIRST PASS (FIRST 256 BYTES)
-	CALL	PPIDE_PUTBUF16		; SECOND PASS (LAST 256 BYTES)
-PPIDE_PUTBUF2:
+	JR	Z,PPIDE_PUT1		; IF NOT, DO 16 BIT
+	CALL	PPIDE_PUT8		; SECOND PASS (LAST 256 BYTES)
+	JR	PPIDE_PUT2		; CONTINUE
+PPIDE_PUT1:
+	CALL	PPIDE_PUT16		; FIRST PASS (FIRST 256 BYTES)
+PPIDE_PUT2:
 	CALL	PPIDE_WAITRDY		; PROBLEMS IF THIS IS REMOVED!
 	RET	NZ
 	CALL	PPIDE_GETRES
 	JP	NZ,PPIDE_IOERR
 	RET
 ;
-PPIDE_PUTBUF8:	; 8 BIT WIDE WRITE LOOP
+PPIDE_PUT8:	; 8 BIT WIDE WRITE LOOP
 	DEC	C			; CTL -> MSB
 	DEC	C			; MSB -> LSB
 	OUTI				; WRITE NEXT BYTE (LSB)
@@ -998,11 +1198,18 @@ PPIDE_PUTBUF8:	; 8 BIT WIDE WRITE LOOP
 	INC	C			; MSB -> CTL
 	OUT	(C),D			; ASSERT WRITE
 	OUT	(C),E			; DEASSERT WRITE
-	CP	B			; B == A == 0?
-	JR	NZ,PPIDE_PUTBUF8	; LOOP UNTIL DONE
+	DEC	C			; CTL -> MSB
+	DEC	C			; MSB -> LSB
+	OUTI				; WRITE NEXT BYTE (LSB)
+	INC	C			; LSB -> MSB
+	INC	C			; MSB -> CTL
+	OUT	(C),D			; ASSERT WRITE
+	OUT	(C),E			; DEASSERT WRITE
+	DEC	A
+	JR	NZ,PPIDE_PUT8		; LOOP UNTIL DONE
 	RET
 ;
-PPIDE_PUTBUF16:	; 16 BIT WIDE WRITE LOOP
+PPIDE_PUT16:	; 16 BIT WIDE WRITE LOOP
 	DEC	C			; CTL -> MSB
 	DEC	C			; MSB -> LSB
 	OUTI				; WRITE NEXT BYTE (LSB)
@@ -1011,8 +1218,8 @@ PPIDE_PUTBUF16:	; 16 BIT WIDE WRITE LOOP
 	INC	C			; MSB -> CTL
 	OUT	(C),D			; ASSERT WRITE
 	OUT	(C),E			; DEASSERT WRITE
-	CP	B			; B == A == 0?
-	JR	NZ,PPIDE_PUTBUF16	; LOOP UNTIL DONE
+	DEC	A
+	JR	NZ,PPIDE_PUT16		; LOOP UNTIL DONE
 	RET
 ;
 ;
@@ -1057,7 +1264,7 @@ PPIDE_RESET:
 ;
 	; SETUP PPI TO READ
 	LD	A,PPIDE_DIR_READ	; SET DATA BUS DIRECTION TO READ
-	;OUT	(PPIDE_IO_PPI),A	; DO IT
+	;OUT	(PPIDE_REG_PPI),A	; DO IT
 	LD	C,(IY+PPIDE_PPI)	; PPI CONTROL WORD
 	OUT	(C),A			; WRITE IT
 ;
@@ -1082,13 +1289,13 @@ PPIDE_RESET:
 	PRTS(" HARD$")
 #ENDIF
 	LD	A,PPIDE_CTL_RESET
-	;OUT	(PPIDE_IO_CTL),A
+	;OUT	(PPIDE_REG_CTL),A
 	LD	C,(IY+PPIDE_CTL)	; SET IDE ADDRESS
 	OUT	(C),A
 	LD	DE,20			; DELAY 320US (SPEC IS >= 25US)
 	CALL	VDELAY
 	XOR	A
-	;OUT	(PPIDE_IO_CTL),A
+	;OUT	(PPIDE_REG_CTL),A
 	OUT	(C),A
 	LD	DE,20
 	CALL	VDELAY
@@ -1125,7 +1332,7 @@ PPIDE_RESET2:
 	PRTS(" SOFT$")
 #ENDIF
 	LD	A,%00001110		; ASSERT RESET, NO INTERRUPTS
-	;OUT	(PPIDE_IO_CTRL),A
+	;OUT	(PPIDE_REG_CTRL),A
 	CALL	PPIDE_OUT
 	.DB	PPIDE_REG_CTRL
 	LD	DE,20			; DELAY 320US (SPEC IS >= 25US)
@@ -1224,7 +1431,7 @@ PPIDE_PROBE:
 ;
 	; SELECT DEVICE (MASTER/SLAVE)
 	LD	A,(PPIDE_DRVHD)
-	;OUT	(IDE_IO_DRVHD),A
+	;OUT	(IDE_REG_DRVHD),A
 	CALL	PPIDE_OUT
 	.DB	PPIDE_REG_DRVHD
 #IF (PPIDETRACE >= 3)
@@ -1275,7 +1482,7 @@ PPIDE_PROBE:
 ;
 ; TEST FOR PRESENCE OF IDE REGISTERS.  USE LBA0/1 TO SEE
 ; IF VALUE CAN BE PERSISTED.  THE USE OF BOTH LBA0 AND LBA1
-; IS TO MAINTAIN CONSISTENCY WITH TGHE THE PPIDE DRIVER BECAUSE
+; IS TO MAINTAIN CONSISTENCY WITH THE THE PPIDE DRIVER BECAUSE
 ; PPI ITSELF WILL PERSIST THE LAST VALUE WRITTEN, SO WE USE
 ; MULTIPLE REGISTERS TO WORK AROUND THIS FALSE POSITIVE.
 ;
@@ -1326,14 +1533,24 @@ PPIDE_INITDEV:
 	PRTS(" INITDEV$")		; LABEL FOR IO ADDRESS
 #ENDIF
 ;
-; IF THE IDE STATUS BYTE IS $00, WE HAVE EITHER A NON-PRESENT SLAVE
-; OR AN ATAPI DEVICE.  TO DIFFERENTIATE THESE POSSIBILITIES, WE RUN
-; A NOP COMMAND.  IF WE HAVE AN ATAPI DEVICE, THIS WILL CAUSE THE
-; STATUS BYTE TO BE "NORMAL" (NON-ZERO).  IF THE STATUS IS STILL
-; ZERO, WE ABORT WITH A NO MEDIA STATUS.  NOTE THAT THE NOP COMMAND
-; RETURNS A COMMAND ERROR BY DESIGN.  WE JUST IGNORE THE ERROR.
+; WE NOW USE AN IDENTIFY DEVICE COMMAND TO ENSURE WE HAVE A WORKING
+; DEVICE.  NO DATA IS RETRIEVED BECAUSE WE HAVE NOT YET ESTABLISHED
+; 8/16 BIT I/O MODE.  IF THE DEVICE IS ATAPI, IT WILL RETURN A
+; COMMAND ABORTED ERROR BY DESIGN.  IF THAT HAPPENS, WE GO TO THE
+; ATAPI INITIALIZATION AND TRY THAT.  IDEALLY, WE WOULD CHECK FOR
+; THE PACKET DEVICE SIGNATURE.
+;
+	LD	A,PPIDE_CMD_IDDEV	; IDENTIFY DEVICE CMD
+	LD	(PPIDE_CMD),A		; SAVE IT
+	CALL	PPIDE_RUNCMD_ND		; RUN COMMAND
+	JR	NZ,PPIDE_INITPDEV	; ON ERROR, TRY PACKET DEVICE
+;
+; IF THE SLAVE DEVICE IS SELECTED, BUT DOES NOT EXIST, THEN THE MASTER
+; DEVICE WILL FORCE THE STATUS BYTE TO BE ZERO.  AS SUCH, THE IDENTIFY
+; DEVICE COMMAND ABOVE WILL APPEAR TO SUCCEED.  AT THIS POINT, WE
+; EXPLICITLY CHECK FOR A STATUS OF ZERO.  IF SO, WE CONVERT THIS TO
+; A NO MEDIA ERROR.
 ;
-	CALL	PPIDE_NOP
 	CALL	PPIDE_IN
 	.DB	PPIDE_REG_STAT
 	OR	A
@@ -1341,7 +1558,6 @@ PPIDE_INITDEV:
 ;
 ; WE NEED TO SETUP 8-BIT MODE BEFORE DOING ANYTHING ELSE
 ;
-PPIDE_INITDEV0A:
 	BIT	1,(IY+PPIDE_ACC)	; 8 BIT ACCESS?
 	JR	Z,PPIDE_INITDEV0	; NO, DO 16 BIT INIT
 	LD	A,PPIDE_FEAT_ENABLE8BIT	; FEATURE VALUE = ENABLE 8-BIT PIO
@@ -1359,7 +1575,7 @@ PPIDE_INITDEV0:
 PPIDE_INITDEV00:
 ;
 	CALL	PPIDE_IDENTIFY		; EXECUTE PPIDENTIFY COMMAND
-	JR	NZ,PPIDE_INITDEVP	; ON ERROR, TRY PACKET DEVICE
+	RET	NZ			; BAIL OUT ON ERROR
 ;
 	; DECLARE WE ARE ATA
 	LD	A,PPIDE_TYPEATA		; OTHERWISE TYPE=ATA
@@ -1371,13 +1587,6 @@ PPIDE_INITDEV00:
 #ENDIF
 ;
 	LD	(IY+PPIDE_MED),0	; CLEAR MEDIA FLAGS
-;
-	; DETERMINE IF CF DEVICE BY TESTING FOR CF CARD SIGNATURES
-	; IN THEORY, THERE ARE SOME OTHER POSSIBLE VARIATIONS, BUT
-	; THEY ARE NOT RECOMMENDED BY THE CF CARD SPEC AND MIGHT
-	; OVERLAP WITH "REAL" HARD DISK SIGNATURES.  I HAVE NEVER
-	; SEEN A CF CARD THAT DID NOT USE ONE OF THE BELOW.
-	; CREDIT TO LASZLO SZOLNOKI
 ;
 #IF (PPIDETRACE >= 3)
 	CALL	PPIDE_PRTPREFIX
@@ -1417,9 +1626,9 @@ PPIDE_INITDEV2:
 ;
 	RET				; RETURN, A=0, Z SET
 ;
+; (RE)INITIALIZE PACKET DEVICE
 ;
-;
-PPIDE_INITDEVP:
+PPIDE_INITPDEV:
 	CALL	PPIDE_IDENTIFYPACKET	; EXECUTE IDENTIFY COMMAND
 	RET	NZ			; BAIL OUT ON ERROR
 ;
@@ -1432,17 +1641,94 @@ PPIDE_INITDEVP:
 	CALL	DUMP_BUFFER		; DUMP IT IF DEBUGGING
 #ENDIF
 ;
-	LD	(IY+PPIDE_MED),0		; CLEAR FLAGS
+	LD	(IY+PPIDE_MED),0	; CLEAR FLAGS
+	SET	1,(IY+PPIDE_MED)	; SET FLAGS BIT FOR LBA (ASSUMED)
 ;
-	; DONE FOR NOW, ATAPI NOT INPLEMENTED
+	; WAIT FOR UNIT READY
+	LD	B,0			; MAX LOOPS
+	LD	C,4			; MAX ERRORS
+PPIDE_INITPDEV1:
+	DEC	B			; CHECK LOOP COUNTER EXCEEDED
+	JP	Z,PPIDE_NOMEDIA		; TREAT AS NO MEDIA
+	PUSH	BC			; SAVE LOOP CONTROL
+	LD	HL,PPIDE_PKTCMD_TSTRDY	; TEST UNIT READY
+	XOR	A			; READ DIRECTION
+	LD	(PPIDE_XFRDIR),A	; SAVE IT
+	CALL	PPIDE_RUNPCMD		; ISSUE PACKET COMMAND
+	CALL	NZ,PPIDE_CHKPCMD	; IF ERROR, DIAGNOSE IT
+	POP	BC			; RESTORE LOOP CONTROL
+	JR	Z,PPIDE_INITPDEV2	; IF NO ERROR, CONTINUE
+	CP	PPIDE_STNOMEDIA		; EXPLICIT NO MEDIA RESULT?
+	RET	Z			; EXIT REPORTING NO MEDIA
+	CP	PPIDE_STNOTRDY		; BECOMING READY?
+	JR	Z,PPIDE_INITPDEV1	; IF SO, NOT AN ERROR, LOOP
+	DEC	C			; DEC ERROR LIMIT
+	RET	Z			; BAIL OUT LIMIT EXCEEDED
+	JR	PPIDE_INITPDEV1		; LOOP
 ;
-	; RETURN NOT SUPPORTED STATUS
-	JP	PPIDE_NOTSUP		; NOT SUPPORTED
+PPIDE_INITPDEV2:
+#IF (PPIDETRACE >= 3)
+	LD	A,B
+	NEG
+	PRTS("\r\nLOOPS=$")
+	CALL	PRTHEXBYTE
+#ENDIF
 ;
-;	; RECORD STATUS OK
-;	XOR	A			; A := 0 (STATUS = OK)
-;	LD	(IY+PPIDE_STAT),A	; SAVE IT
-;	RET
+	; GET AND RECORD CAPACITY
+	LD	HL,HB_WRKBUF
+	LD	(PPIDE_DSKBUF),HL
+	LD	HL,PPIDE_PKTCMD_RDCAP
+	XOR	A			; READ DIRECTION
+	LD	(PPIDE_XFRDIR),A	; SAVE IT
+	CALL	PPIDE_RUNPCMD
+	JP	NZ,PPIDE_CHKPCMD
+;
+#IF (PPIDETRACE >= 3)
+	PRTS("\r\nRDCAP:$")
+	LD	A,8
+	LD	DE,HB_WRKBUF
+	CALL	PRTHEXBUF
+#ENDIF
+;
+	; CAPACITY IS RETURNED IN A 4 BYTE, BIG ENDIAN FIELD AND
+	; INDICATES THE LAST LBA VALUE.  WE NEED TO CONVERT THIS TO
+	; LITTLE ENDIAN AND INCREMENT THE VALUE TO MAKE IT A CAPACITY
+	; COUNT INSTEAD OF A LAST LBA VALUE.
+	LD	A,PPIDE_MEDCAP		; OFFSET IN CFG FOR CAPACITY
+	CALL	LDHLIYA			; POINTER TO HL
+	PUSH	HL			; SAVE IT
+	LD	HL,HB_WRKBUF		; POINT TO VALUE IN CMD RESULT
+	CALL	LD32			; LOAD IT TO DE:HL
+	LD	A,L			; FLIP BYTES
+	LD	L,D			; ... BIG ENDIAN
+	LD	D,A			; ... TO LITTLE ENDIAN
+	LD	A,H
+	LD	H,E
+	LD	E,A
+	CALL	INC32			; INCREMENT TO FINAL VALUE
+	POP	BC			; RECOVER SAVE LOCATION
+	CALL	ST32			; STORE VALUE
+;
+	; CHECK BLOCK LENGTH.  WE CURRENTLY ONLY SUPPORT 512 BYTE
+	; BLOCKS.  CD-ROM DEVICES (WHICH USE 2k BLOCKS) WILL FAIL
+	; HERE AS NOT SUPPORTED.
+	LD	HL,HB_WRKBUF+4		; POINT TO BLK SIZE IN RESULT
+	CALL	LD32			; LOAD IT TO DE:HL
+	; VALUE IS BIG ENDIAN, SO LH:ED MUST BE EXACTLY 0000:0200
+	LD	A,L			; CHECK THAT LH
+	OR	H			; ... IS ZERO
+	JP	NZ,PPIDE_NOTSUP		; IF NOT, FAIL AS NOT SUP
+	LD	A,D			; LOAD D
+	OR	A			; SET FLAGS
+	JP	NZ,PPIDE_NOTSUP		; IF NOT ZERO, FAIL AS NOT SUP
+	LD	A,E			; LOAD E
+	CP	2			; CHECK IT IF IS 2
+	JP	NZ,PPIDE_NOTSUP		; IF NOT, FAIL AS NOT SUP
+;
+	; RECORD STATUS OK
+	XOR	A			; A := 0 (STATUS = OK)
+	LD	(IY+PPIDE_STAT),A	; SAVE IT
+	RET
 ;
 ; SWITCH IY POINTER FROM CURRENT UNIT CFG TO PARTNER UNIT CFG
 ;
@@ -1535,19 +1821,19 @@ PPIDE_IN:
 	EX	(SP),HL			; GET PARM POINTER			; 19TS
 	PUSH	BC			; SAVE INCOMING BC			; 11TS
 	LD	A,PPIDE_DIR_READ	; SET DATA BUS DIRECTION TO READ	; 7TS
-	;OUT	(PPIDE_IO_PPI),A	; DO IT
+	;OUT	(PPIDE_REG_PPI),A	; DO IT
 	LD	C,(IY+PPIDE_PPI)	; PPI CONTROL WORD			; 19TS
 	OUT	(C),A			; WRITE IT				; 12TS
 ;
 	LD	B,(HL)			; GET CTL PORT VALUE			; 7TS
-	;LD	C,PPIDE_IO_CTL		; SETUP PORT TO WRITE
+	;LD	C,PPIDE_REG_CTL		; SETUP PORT TO WRITE
 	;LD	C,(IY+PPIDE_CTL)	; SET IDE ADDRESS
 	DEC	C			; SET IDE ADDRESS			; 4TS
 	OUT	(C),B			; SET ADDRESS LINES			; 12TS
 	SET	6,B			; TURN ON READ BIT			; 8TS
 	OUT	(C),B			; ASSERT READ LINE			; 12TS
 ;
-	;IN	A,(PPIDE_IO_DATALO)	; GET DATA VALUE FROM DEVICE
+	;IN	A,(PPIDE_REG_DATALO)	; GET DATA VALUE FROM DEVICE
 	DEC	C								; 4TS
 	DEC	C								; 4TS
 	IN	A,(C)			; GET DATA VALUE FROM DEVICE		; 12
@@ -1569,13 +1855,13 @@ PPIDE_OUT:
 	PUSH	BC			; SAVE INCOMING BC
 	PUSH	AF			; PRESERVE INCOMING VALUE
 	LD	A,PPIDE_DIR_WRITE	; SET DATA BUS DIRECTION TO WRITE
-	;OUT	(PPIDE_IO_PPI),A	; DO IT
+	;OUT	(PPIDE_REG_PPI),A	; DO IT
 	LD	C,(IY+PPIDE_PPI)	; PPI CONTROL WORD
 	OUT	(C),A			; WRITE IT
 	POP	AF			; RECOVER VALUE TO WRITE
 ;
 	LD	B,(HL)			; GET IDE ADDRESS VALUE
-	;LD	C,PPIDE_IO_CTL		; SETUP PORT TO WRITE
+	;LD	C,PPIDE_REG_CTL		; SETUP PORT TO WRITE
 	;LD	C,(IY+PPIDE_CTL)	; SET IDE ADDRESS
 	DEC	C			; SET IDE ADDRESS
 	OUT	(C),B			; SET ADDRESS LINES
@@ -1584,7 +1870,7 @@ PPIDE_OUT:
 ;
 	DEC	C
 	DEC	C
-	;OUT	(PPIDE_IO_DATALO),A	; SEND DATA VALUE TO DEVICE
+	;OUT	(PPIDE_REG_DATALO),A	; SEND DATA VALUE TO DEVICE
 	OUT	(C),A			; SEND DATA VALUE TO DEVICE
 	INC	C
 	INC	C
@@ -1634,6 +1920,10 @@ PPIDE_NOTSUP:
 	LD	A,PPIDE_STNOTSUP
 	JR	PPIDE_ERR
 ;
+PPIDE_NOTRDY:
+	LD	A,PPIDE_STNOTRDY
+	JR	PPIDE_ERR
+;
 PPIDE_ERR:
 	LD	(IY+PPIDE_STAT),A	; SAVE NEW STATUS
 ;
@@ -1706,6 +1996,9 @@ PPIDE_PRTSTATSTR:
 	INC	A
 	LD	DE,PPIDE_STR_STNOTSUP
 	JR	Z,PPIDE_PRTSTATSTR1
+	INC	A
+	LD	DE,PPIDE_STR_STNOTRDY
+	JR	Z,PPIDE_PRTSTATSTR1
 	LD	DE,PPIDE_STR_STUNK
 PPIDE_PRTSTATSTR1:
 	CALL	WRITESTR
@@ -1723,7 +2016,7 @@ PPIDE_REGDUMP:
 	CALL	PC_SPACE
 	CALL	PC_LBKT
 	LD	A,PPIDE_DIR_READ	; SET DATA BUS DIRECTION TO READ
-	;OUT	(PPIDE_IO_PPI),A	; DO IT
+	;OUT	(PPIDE_REG_PPI),A	; DO IT
 	LD	C,(IY+PPIDE_PPI)	; PPI CONTROL WORD
 	OUT	(C),A			; WRITE IT
 	LD	C,(IY+PPIDE_CTL)	; SET IDE ADDRESS
@@ -1731,12 +2024,12 @@ PPIDE_REGDUMP:
 	LD	B,7
 PPIDE_REGDUMP1:
 	LD	A,E			; REGISTER ADDRESS
-	;OUT	(PPIDE_IO_CTL),A	; SET IT
+	;OUT	(PPIDE_REG_CTL),A	; SET IT
 	OUT	(C),A			; REGISTER ADDRESS
 	XOR	PPIDE_CTL_DIOR		; SET BIT TO ASSERT READ LINE
-	;OUT	(PPIDE_IO_CTL),A	; ASSERT READ
+	;OUT	(PPIDE_REG_CTL),A	; ASSERT READ
 	OUT	(C),A			; ASSERT READ
-	;IN	A,(PPIDE_IO_DATALO)	; GET VALUE
+	;IN	A,(PPIDE_REG_DATALO)	; GET VALUE
 	DEC	C			; CTL -> MSB
 	DEC	C			; MSB -> LSB
 	IN	A,(C)			; GET VALUE
@@ -1744,7 +2037,7 @@ PPIDE_REGDUMP1:
 	INC	C			; MSB -> CTL
 	CALL	PRTHEXBYTE		; DISPLAY IT
 	;LD	A,C			; RELOAD ADDRESS W/ READ UNASSERTED
-	;OUT	(PPIDE_IO_CTL),A	; AND SET IT
+	;OUT	(PPIDE_REG_CTL),A	; AND SET IT
 	OUT	(C),E			; RELOAD ADDRESS W/ READ UNASSERTED
 	;DEC	C			; NEXT LOWER REGISTER
 	DEC	E			; NEXT LOWER REGISTER
@@ -1785,6 +2078,7 @@ PPIDE_STR_STRDYTO	.TEXT	"READY TIMEOUT$"
 PPIDE_STR_STDRQTO	.TEXT	"DRQ TIMEOUT$"
 PPIDE_STR_STBSYTO	.TEXT	"BUSY TIMEOUT$"
 PPIDE_STR_STNOTSUP	.TEXT	"NOT SUPPORTED$"
+PPIDE_STR_STNOTRDY	.TEXT	"NOT READY$"
 PPIDE_STR_STUNK		.TEXT	"UNKNOWN ERROR$"
 ;
 PPIDE_STR_NO		.TEXT	"NO$"
@@ -1806,5 +2100,14 @@ PPIDE_IOFNADR	.DW	0		; PENDING IO FUNCTION ADDRESS
 PPIDE_DRVHD	.DB	0		; CURRENT DRIVE/HEAD MASK
 ;
 PPIDE_DSKBUF	.DW	0		; ACTIVE DISK BUFFER
+PPIDE_XFRDIR	.DB	0		; 0=READ, NON-0=WRITE
 ;
 PPIDE_DEVNUM	.DB	0		; TEMP DEVICE NUM USED DURING INIT
+;
+; SCSI COMMAND TEMPLATES (ALWAYS 12 BYTES FOR ATAPI)
+;
+PPIDE_PKTCMD_RW		.DB	$00, $00, $00, $00, $01, $00, $00, $00, $00, $00, $00, $00	; READ/WRITE SECTOR
+PPIDE_PKTCMD_SENSE	.DB	$03, $00, $00, $00, $FF, $00, $00, $00, $00, $00, $00, $00	; REQUEST SENSE DATA
+PPIDE_PKTCMD_RDCAP	.DB	$25, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00	; READ CAPACITY
+PPIDE_PKTCMD_RW10	.DB	$28, $00, $00, $00, $00, $00, $00, $00, $01, $00, $00, $00	; READ/WRITE SECTOR
+PPIDE_PKTCMD_TSTRDY	.DB	$00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00	; TEST UNIT READY

Source/HBIOS/ppp.asm

@@ -904,7 +904,7 @@ PPPSD_GETCSD:
 	CALL	PPP_SNDCMD		; SEND COMMAND
 	RET	NZ			; ABORT ON ERROR
 
-	LD	B,16			; GET 4 BYTES
+	LD	B,16			; GET 16 BYTES
 	LD	HL,PPPSD_CSDBUF
 PPPSD_GETCSD1:
 	CALL	PPP_GETBYTE

Source/HBIOS/romldr.asm

@@ -180,7 +180,7 @@ start1:
 	call	pstr			; do it
 	call	clrbuf			; zero fill the cmd buffer
 ;
-#if (BIOS == BIOS_WBW)
+#if ((BIOS == BIOS_WBW) & FPSW_ENABLE)
 ;
 	ld	b,BF_SYSGET		; HBIOS SysGet
 	ld	c,BF_SYSGET_PANEL	; ... Panel swiches value
@@ -390,7 +390,7 @@ runcmd2:
 	ld	(bootslice),a		; save boot slice
 	jp	diskboot		; boot the disk unit/slice
 ;
-#if (BIOS == BIOS_WBW)
+#if ((BIOS == BIOS_WBW) & FPSW_ENABLE)
 ;
 ;=======================================================================
 ; Process Front Panel switches

Source/HBIOS/std.asm

@@ -245,9 +245,27 @@ GDCMODE_RPH	.EQU	2		; RPH GDC
 ; LPT DRIVER MODE SELECTIONS
 ;
 LPTMODE_NONE	.EQU	0		; NONE
-LPTMODE_IBM	.EQU	1		; IBM STYLE INTERFACE
+LPTMODE_SPP	.EQU	1		; IBM PC STANDARD PAR PORT (SPP)
 LPTMODE_MG014	.EQU	2		; RCBUS MG014 STYLE INTERFACE
 ;
+; PPA DRIVER MODE SELECTIONS
+;
+PPAMODE_NONE	.EQU	0		; NONE
+PPAMODE_SPP	.EQU	1		; IBM PC STANDARD PAR PORT (SPP)
+PPAMODE_MG014	.EQU	2		; RCBUS MG014 STYLE INTERFACE
+;
+; IMM DRIVER MODE SELECTIONS
+;
+IMMMODE_NONE	.EQU	0		; NONE
+IMMMODE_SPP	.EQU	1		; IBM PC STANDARD PAR PORT (SPP)
+IMMMODE_MG014	.EQU	2		; RCBUS MG014 STYLE INTERFACE
+;
+; SYQ DRIVER MODE SELECTIONS
+;
+SYQMODE_NONE	.EQU	0		; NONE
+SYQMODE_SPP	.EQU	1		; IBM PC STANDARD PAR PORT (SPP)
+SYQMODE_MG014	.EQU	2		; RCBUS MG014 STYLE INTERFACE
+;
 ; GDC MONITOR SELECTIONS
 ;
 GDCMON_NONE	.EQU	0
@@ -437,6 +455,18 @@ SPD_UNSUP	.EQU	0		; PLATFORM CAN CHANGE SPEEDS BUT IS UNSUPPORTED
 SPD_HIGH	.EQU	1		; PLATFORM CAN CHANGE SPEED, STARTS HIGH
 SPD_LOW		.EQU	2		; PLATFORM CAN CHANGE SPEED, STARTS LOW
 ;
+; SCSI COMMAND CODES (SHOULD BE IT IT'S OWN FILE)
+;
+SCSI_CMD_TSTRDY		.EQU	$00
+SCSI_CMD_SENSE		.EQU	$03
+SCSI_CMD_READ		.EQU	$08
+SCSI_CMD_WRITE		.EQU	$0A
+SCSI_CMD_INQ		.EQU	$12
+SCSI_CMD_START		.EQU	$1B
+SCSI_CMD_RDCAP		.EQU	$25
+SCSI_CMD_READ10		.EQU	$28
+SCSI_CMD_WRITE10	.EQU	$2A
+;
 #INCLUDE "build.inc"		; INCLUDE USER CONFIG, ADD VARIANT, TIMESTAMP, & ROMSIZE
 ;
 ; INCLUDE Z180 REGISTER DEFINITIONS

Source/ver.inc

@@ -2,7 +2,7 @@
 #DEFINE	RMN	3
 #DEFINE	RUP	0
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.3.0-dev.14"
+#DEFINE BIOSVER	"3.3.0-dev.23"
 #define rmj	RMJ
 #define rmn	RMN
 #define rup	RUP

Source/ver.lib

@@ -3,5 +3,5 @@ rmn	equ	3
 rup	equ	0
 rtp	equ	0
 biosver	macro
-	db	"3.3.0-dev.14"
+	db	"3.3.0-dev.23"
 	endm