ZRC and ZZRCC Image Creation Updates

- Modified ZRC and ZZRCC image creation scripts to allow up to 0x1B8 of boot code.

Binary/ReadMe.txt

@@ -39,8 +39,8 @@ image for the Mark IV with the standard configuration. If a custom
 configuration called "custom" is created and built, a new file called 
 MK4_custom.rom will be added to this directory.
 
-Documentation of the pre-built ROM Images is contained in the 
-RomList.txt file in this directory.
+Documentation of the pre-built ROM Images is contained in
+"RomWBW User Guide.pdf" in the Doc directory.
 
 ROM Firmware Update Images (<plt>_<cfg>.upd)
 -------------------------------------

Doc/ChangeLog.txt

@@ -1,3 +1,8 @@
+Version 3.4
+-----------
+NOTE: Changes require HBIOS/CBIOS/Apps sync, version bump to 3.4 to ensure integrity
+- WBW: Device type number moved from upper nibble to full byte
+
 Version 3.3
 -----------
 - WBW: Support Front Panel switches
@@ -12,6 +17,17 @@ Version 3.3
 - WBW: Support for SyQuest SparQ Drive on PPI interface (much inspiration from Alan Cox)
 - WBW: Support for ATAPI Disk Drives (not CD-ROMs) on IDE and PPIDE interfaces
 - R?P: Added new disk images: Aztec C, MS BASIC Compiler, MS Fortran, Games, HiTech-C, Turbo Pascal, SLR Z80ASM
+- JBL: Added RCZ80 configuration for ColecoVision
+- WBW: Support for Z180 running interrupt mode 1
+- WBW: Preliminary support for S100 Computers Z180
+- WBW: Preliminary support for Dan Werner's ESP32 MBC Module
+- WBW: Early support for Duodyne base system (CPU/UART/ROM/RAM/RTC/SPK)
+- M?C: Fixed XM to allow specifying HBIOS port for send operations
+- WBW: Fix S100 Z180 LED operation (credit to Jay Cotton for finding this issue)
+- WBW: QPM system image is now combined with current CBIOS during build
+- WBW: Added framework for Heath platform
+- WBW: Support for USB Disks via CH375/CH376
+- D?J: Support for Raspberry Pi build process
 
 Version 3.2.1
 -------------

Makefile

@@ -1,5 +1,11 @@
-all:
+.PHONY: tools source clean clobber diff dist
+
+all: tools source
+
+tools:
 	$(MAKE) --directory Tools
+
+source:
 	$(MAKE) --directory Source
 
 clean:

ReadMe.md

@@ -1,9 +1,9 @@
 
 
 **RomWBW ReadMe** \
-Version 3.3 \
+Version 3.4 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-20 Jun 2023
+09 Oct 2023
 
 # Overview
 

ReadMe.txt

@@ -1,6 +1,6 @@
 RomWBW ReadMe
 Wayne Warthen (wwarthen@gmail.com)
-20 Jun 2023
+09 Oct 2023
 
 
 

Source/Apps/Build.cmd

@@ -32,6 +32,7 @@ pushd Dev && call Build || exit /b & popd
 pushd VGM && call Build || exit /b & popd
 pushd cpuspd && call Build || exit /b & popd
 pushd Survey && call Build || exit /b & popd
+pushd HTalk && call Build || exit /b & popd
 
 copy *.com %APPBIN%\ || exit /b
 

Source/Apps/Clean.cmd

@@ -18,3 +18,4 @@ pushd Dev && call Clean || exit /b 1 & popd
 pushd VGM && call Clean || exit /b 1 & popd
 pushd cpuspd && call Clean || exit /b 1 & popd
 pushd Survey && call Clean || exit /b 1 & popd
+pushd HTalk && call Clean || exit /b 1 & popd

Source/Apps/FAT/ReadMe.txt

@@ -1,7 +1,7 @@
 RomWBW HBIOS CP/M FAT Utility ("FAT.COM")
 
 Author: Wayne Warthen
-Updated: 12-Apr-2021
+Updated: 12-Oct-2023
 
 Application to manipulate and exchange files with a FAT (DOS)
 filesystem.  Runs on any HBIOS hosted CP/M implementation.
@@ -101,4 +101,5 @@ HISTORY:
   11-Oct-2019: v0.9.7 (beta) fix FORMAT to use existing partition table entries
                              add attributes to directory listing
   12-Apr-2021: v0.9.8 (beta) support CP/NET drives
+  12-Oct-2023: v0.9.9 (beta) handle updated HBIOS Disk Device call
 		      

Source/Apps/FDU/fdu.doc

@@ -153,7 +153,8 @@ JP2 (/FAULT) shorted, JP3 (MINI): 2-3, JP4 (/DC/RDY): 2-3.
 
 The RCBus Scott Baker WDC-based floppy module should be jumpered
 for I/O base address 0x50 (SV1: 11-12), JP1 (/DACK): 1-2,
-JP2 (TC): 2-3.
+JP2 (TC): 2-3.  Note that pin 1 of JPX jumpers is toward the bottom
+of the board.
 
 The RCBus FDC by Alan Cox (Etched Pixels) needs to be strapped
 for base I/O address 0x48.

Source/Apps/HTalk/Build.cmd

@@ -0,0 +1,14 @@
+@echo off
+setlocal
+
+set TOOLS=../../../Tools
+set PATH=%TOOLS%\tasm32;%PATH%
+set TASMTABS=%TOOLS%\tasm32
+
+echo Building HTalk...
+tasm -t80 -g3 -fFF htalk.asm htalk.com %htalk.lst || exit /b
+
+copy /Y htalk.com ..\..\..\Binary\Apps\ || exit /b
+rem copy /Y *.ovr ..\..\..\Binary\Apps\ || exit /b
+rem copy /Y *.hlp ..\..\..\Binary\Apps\ || exit /b
+rem copy /Y *.doc ..\..\..\Binary\Apps\ || exit /b

Source/Apps/HTalk/Clean.cmd

@@ -0,0 +1,5 @@
+@echo off
+setlocal
+
+if exist *.com del *.com
+if exist *.lst del *.lst

Source/Apps/HTalk/Makefile

@@ -0,0 +1,10 @@
+OBJECTS = htalk.com
+#DOCS = htalk.txt
+DEST = ../../../Binary/Apps
+DOCDEST = ../../../Binary/Apps
+TOOLS = ../../../Tools
+include $(TOOLS)/Makefile.inc
+
+%.com: USETASM=1
+
+

Source/Apps/HTalk/htalk.asm

@@ -0,0 +1,725 @@
+;===============================================================================
+;HTALK - BARE MINIMUM TERMINAL INTERFACE
+;
+; CONSOLE TALKS TO ARBITRARY CHARACTER DEVICE.
+;===============================================================================
+;
+; AUTHOR: TOM PLANO (TOMPLANO@PROTON.ME)
+;
+; USAGE:
+;	HTALK $<CHAR_DEVICE_NUM>
+;
+;_______________________________________________________________________________
+;
+; CHANGE LOG:
+;			I'VE NOTATED SECTIONS OF CODE THAT ARNT REQUIRED IF THIS APP IS
+;			INCORPORATED INTO DBGMOD WITH A <OPT> TAG
+;
+;_______________________________________________________________________________
+;
+; TODO:
+; 	SEE ENUM_DEV1 TODO
+;				
+;
+;_______________________________________________________________________________
+;
+;===============================================================================
+; DEFINITIONS
+;===============================================================================
+;
+STKSIZ	.EQU	$FF
+;
+; HBIOS SYSTEM CALLS AND ID STRING ADDRESS
+; 
+ROMWBW_ID	.EQU		$FFFE	; ROMWBW ID STRING ADDRESS
+HBIOS_SYS	.EQU		$FFF0 	; HBIOS SYSCALL ADDRESS
+
+H_SYSGET	.EQU		$F8		;	GET SYSTEM INFO
+H_CIOCNT	.EQU		$00		; GET CHAR DEV COUNT SUBFUNCTION
+
+BF_CIOIN			.EQU		$00	; HBIOS CHAR INPUT 
+BF_CIOOUT			.EQU		$01	; HBIOS CHAR OUTPUT 
+BF_CIOIST			.EQU		$02	; HBIOS CHAR INPUT STATUS 
+BF_CIOOST			.EQU		$03	; HBIOS CHAR OUTPUT STATUS 
+BF_CIOINIT		.EQU		$04	; HBIOS CHAR I/O INIT 
+BF_CIOQUERY		.EQU		$05	; HBIOS CHAR I/O QUERY 
+BF_CIODEVICE	.EQU		$06	; HBIOS CHAR I/O DEVICE
+;
+; SUPPORTED HBIOS CIO DEVICE TYPES
+; 
+CIODEV_UART		.EQU		$00 ; 16C550 FAMILY SERIAL INTERFACE UART.ASM
+CIODEV_ASCI		.EQU		$10 ; Z180 BUILT-IN SERIAL PORTS ASCI.ASM
+CIODEV_TERM		.EQU		$20 ; TERMINAL ANSI.ASM
+CIODEV_PRPCON	.EQU		$30 ; PROPIO SERIAL CONSOLE INTERFACE PRP.ASM
+CIODEV_PPPCON	.EQU 		$40 ; PARPORTPROP SERIAL CONSOLE INTERFACE PPP.ASM
+CIODEV_SIO		.EQU		$50 ; ZILOG SERIAL PORT INTERFACE SIO.ASM
+CIODEV_ACIA		.EQU		$60 ; MC68B50 ASYNCHRONOUS INTERFACE ACIA.ASM
+CIODEV_PIO		.EQU		$70 ; ZILOG PARALLEL INTERFACE CONTROLLER PIO.ASM
+CIODEV_UF			.EQU		$80 ; FT232H-BASED ECB USB FIFO UF.ASM
+CIODEV_DUART	.EQU		$90 ; SCC2681 FAMILY DUAL UART DUART.ASM
+CIODEV_Z2U		.EQU		$A0 ; ZILOG Z280 BUILT-IN SERIAL PORTS Z2U.ASM
+CIODEV_LPT		.EQU		$B0 ; PARALLEL I/O CONTROLLER LPT.ASM
+
+; HBIOS CURRENT CONSOLE NUMBER
+CIO_CONSOLE	.EQU	$80
+
+; SPECIAL CHARS
+CTRLC			.EQU	$03
+CHR_BEL		.EQU	$07
+CHR_CR		.EQU	$0D
+CHR_LF		.EQU	$0A
+CHR_BS		.EQU	$08
+CHR_ESC		.EQU	$1B
+CHR_DEL		.EQU	$7F
+
+;
+;===============================================================================
+; BEGIN MAIN PROGRAM 
+;===============================================================================
+;
+	.ORG	$0100
+;	
+; SETUP STACK (SAVE OLD VALUE)
+;	<OPT> HANDLED BY DBGMON	
+	LD		(STKSAV),SP
+	LD		SP,STACK
+	
+
+;
+; INITIALIZATION + STARTUP MESSAGE + HBIOS DETECT
+;	<OPT> HANDLED BY DBGMON	
+	CALL INIT_PROG
+	JP NZ,EXIT
+;
+; LIST HBIOS DEV OPTIONS FOR REFERENCE
+; ALSO GETS MAX CONN
+;	
+;	<OPT> THIS IS OPTIONAL BECAUSE IF A CHAR DEVICE DOESNT EXIST, WE NEVER READ OR
+; WRITE TO IT, WE SIMPLY CALL CIOIST AND CIOOST OVER AND OVER ON IT, WITHOUT
+;	EVER PUSHING DATA TO IT
+	CALL	ENUM_DEV
+	JP NZ,EXIT
+;
+; PARSE COMMAND LINE 
+;
+ 	CALL	PARSE		
+	JP NZ,EXIT
+;
+; RUN CONVERSTION WITH CHAR DEVICE
+;
+	CALL 	TALK
+;
+;  DONE
+	JP		EXIT
+
+
+;
+; CLEAN UP AND RETURN TO CALLING PROCESS
+;
+EXIT:	
+	CALL 	NEWLINE						; ...
+	LD		HL,STR_EXITMSG	; LOAD EXIT STRING
+	CALL	PRTSTR					;	PRINT IT
+	CALL 	NEWLINE						; ...
+	LD		SP,(STKSAV)			; RESET STACK
+	RET										; RETURN TO CALLER
+	
+
+;
+;===============================================================================
+; END MAIN PROGRAM 
+;===============================================================================
+;
+
+;
+;===============================================================================
+; BEGIN MAIN PROGRAM SUBROUTINES
+;===============================================================================
+;
+	
+INIT_PROG:
+	LD		HL, STR_BANNER 	; LOAD WELCOME BANNER
+	CALL	PRTSTR					;	PRINT IT
+	CALL 	NEWLINE					;	...
+	LD		HL,(ROMWBW_ID) 	; GET FIRST BYTE OF ROMWBW MARKER
+	LD		A,(HL)					;	... THROUGH HL 
+	CP		'W'							; MATCH?
+	JP		NZ,NOTHBIOS			; ABORT WITH INVALID CONFIG BLOCK
+	INC		HL							; NEXT BYTE (MARKER BYTE 2)
+	LD		A,(HL)					; LOAD IT
+	CP		~'W'						; MATCH?
+	JP		NZ,NOTHBIOS			; ABORT WITH INVALID CONFIG BLOCK
+	LD		HL,STR_HBIOS		; POINT TO HBIOS STR
+	CALL	PRTSTR					; PRINT IT
+	CALL 	NEWLINE					; ...
+	RET
+;
+;	HBOIS NOT DETECTED, BAIL OUT W/ ERROR
+;
+NOTHBIOS:
+	LD		HL,STR_BIOERR		; LOAD HBIOS NOT FOUND STR
+	CALL	PRTSTR					; PRINT IT
+	CALL 	NEWLINE					; ...
+	AND 	$FF							; SET FLAGS
+	RET
+
+ENUM_DEV:
+;
+; CHAR COUNT HEADER
+;
+	LD 		HL,STR_DEVS_FOUND
+	CALL 	PRTSTR
+;
+;GET COUNT OF CHAR UNITS
+;
+	LD 		B,H_SYSGET			; LOAD SYSGET HBIOS FUNCTION
+	LD		C,H_CIOCNT			; LOAD SYSGET CHAR DEV COUNT SUBFUNCTION
+	CALL 	HBIOS_SYS				; JUMP TO HBIOS
+	OR		A								; SET FLAGS
+	JP 		NZ, EXIT				; JUMP TO EXIT ON FAILED
+	LD 		A,E							;	NUM CHAR DEVICES NOW IN A
+
+	DEC 	A								; DEC NUM DEVICES TO BE	0 INDEXED
+	LD		(CIODEV_CNT), A	; STORE BEFORE PRINT 
+	LD		(CIODEV_MAX), A	; STORE BEFORE PRINT 
+	INC A									; RESTORE NUM DEVICES VALUE
+
+	CALL 	PRTHEX 					; PRINT NUMBER OF UNITS FOUND
+	CALL 	NEWLINE						; ...
+
+ENUM_DEV1:
+
+	LD 		IX, TGT_DEV				
+; TODO: H AND L DONT ALWAYS GET SET BY THE DRIVERS. FIND SOME WAY TO MASK
+; THEM OUT IF THEY ARE THE SAME BEFORE AND AFTER THE CALL?
+	LD 		B, BF_CIODEVICE		; LOAD HBIOS FUNCTION TO QUERRY DEVICE INFO
+	LD		HL, CIODEV_CNT		; REQUEST A CHAR DEVICE
+	LD		C, (HL)						; ...
+	LD		(IX), C						; REMEMBER WHAT DEVICE WE ASKED FOR BEFORE BE
+	CALL	HBIOS_SYS					; EXECUTE HBIOS SUBROUTINE
+	OR		A									; SET FLAGS
+	RET NZ									; RETURN FAILED
+;
+;	STORE RESULTS OF HBOIS DEVICE QUERRY
+;
+  LD 		A,C								; MOVE C TO A
+	LD		(IX+1),	A					; STORE A DEVICE ATTRIBUTES, SKIP FIRST ENTRY
+	LD		A,D
+	LD		(IX+2),	A
+	LD		A,E
+	LD		(IX+3),	A
+	LD		A,H
+	LD		(IX+4),	A
+	LD		A,L
+	LD		(IX+5),	A
+;
+;	PRINT FORMATED DATA LOOP 
+;
+	LD 		B, $06 					;	PRINT THE 5 ELEMENTS OF DEV_STR_TBL
+	LD		HL,DEV_STR_TBL	; TABLE BASE PTR
+
+PLOOP_BASE:
+	CALL 	PRTSTR					; PTRSTR INCREMENTS HL FOR US
+	LD		A, (IX)
+	CALL 	PRTHEX
+	LD		A, '|'
+	CALL 	COUT
+	INC 	IX
+	DJNZ	PLOOP_BASE
+
+	CALL NEWLINE
+
+	LD A, (CIODEV_CNT) 
+	DEC A
+	LD		(CIODEV_CNT), A
+	JP P,	ENUM_DEV1 ; JUMP WHILE CIODEV_CNT >=0
+	AND $00
+	RET
+
+
+;
+; RUN CONVERSTION WITH CHAR DEVICE
+;
+TALK:	
+;
+; INIT PING PONG DEVICE POINTERS 
+;
+	LD 		IX,	USER_CON 	; LOAD VALUE AT ADDR USER_CON
+	LD 		A, (IX) 			; LOAD VALUE AT ADDR USER_CON
+	LD		(RF_DEV), A		; STORE TO ADDR RF_DEV
+	LD		A, (IX+1)			;	LOAD VALUE AT ADDR TARGET_CON
+	LD		(WT_DEV), A		;	STORE TO ADDR WT_DEV
+;
+; READ FROM RF_DEV -> WRITE TO WT_DEV
+;
+TALK_LOOP:
+;
+; CHECK FOR DATA ON RF_DEV
+;
+	LD		B,BF_CIOIST		; SET HBIOS FUNCTION TO RUN
+	LD		HL, RF_DEV
+	LD		C,(HL)		
+	CALL	HBIOS_SYS			; CHECK FOR CHAR PENDING ON INPUT BUFFER USING HBIOS
+	OR		A							;	SET FLAGS	 
+	JP		Z,TALK_NEXT		; JUMP NO CHARACTERS  READY 
+	JP		M,TALK_NEXT		;	JUMP ERROR ON READ 	
+;
+; EXEC READ FROM RF_DEV 
+;
+	LD		B,BF_CIOIN			; SET FUNCTION TO RUN
+	LD		HL, RF_DEV
+	LD		C,(HL)				; RETRIEVE CON_DEV_NUM TO READ/WRITE FROM ACTIVE CONSOLE
+	CALL	HBIOS_SYS			; CHECK FOR CHAR PENDING USING HBIOS
+	LD 		A,E						; MOVE RESULT TO A
+	CP		CTRLC					; CHECK FOR EXIT REQUEST (CTRL+C)
+	RET		Z							; IF SO, BAIL OUT
+	PUSH	AF						; SAVE THE CHAR WE READ
+;
+; CHECK FOR SPACE ON WT_DEV
+;
+	LD		B,BF_CIOOST		; SET HBIOS FUNCTION TO RUN
+	LD		HL, WT_DEV
+	LD		C,(HL)	
+	CALL	HBIOS_SYS			; CHECK FOR SPACE IN OUTPUT BUFFER USING HBIOS
+	
+	OR		A							; 0 OR 1 IS A VALID RETURN 
+	JP		Z,TALK_NEXT		;	JUMP  NO SPACE
+	JP		M,TALK_NEXT		; JUMP 	ERROR ON WRITE 
+;
+; EXEC WRITE TO WT_DEV
+;
+	LD		B,BF_CIOOUT		; SET HBIOS FUNCTION TO RUN
+	LD		HL, WT_DEV
+	LD		C,(HL)				; RETRIEVE TGT_DEV_NUM TO READ/WRITE FROM TARGET CHAR DEVICE
+	;
+	POP		AF						; RECOVER THE CHARACTER
+	LD		E,A						; MOVE CHARACTER TO E
+	CALL	HBIOS_SYS			; WRITE CHAR USING HBIOS
+
+TALK_NEXT:
+;
+; SWAP RF_DEV  AND WT_DEV
+;
+	LD 		IX,	RF_DEV	 	; LOAD VALUE AT ADDR USER_CON
+	LD 		A, (IX)				; LOAD VALUE AT ADDR RF_DEV
+	LD 		B, (IX+1) 		; LOAD VALUE AT ADDR WT_DEV
+	LD		(IX+1), A			;	STORE TO OLD RF_DEV TO  ADDR WT_DEV
+	LD		A, B					;	MOVE OLD WT_DEV TO A 
+	LD		(IX), A				;	STORE TO OLD WT_DEF TO  ADDR RF_DEV
+	JP		TALK_LOOP			; LOOP
+
+;
+;===============================================================================
+; END MAIN PROGRAM SUBROUTINES
+;===============================================================================
+;
+
+;
+;===============================================================================
+; BEGIN ROUTINES THAT ARE NOT COMPATIBLE WITH DBGMON
+;===============================================================================
+;
+
+
+PARSE:
+;
+	LD		HL,$81					; POINT TO START OF COMMAND TAIL (AFTER LENGTH BYTE)
+	CALL	NONBLANK				; SKIP LEADING BLANKS, 
+	CALL	HEXBYTE 
+	JP		C,ERRHEXRD			; IF NOT, ERR
+  LD		(TARGET_CON),A	; REQUESTED TARGET CONN 
+	
+	LD		B,A	; MOVE  TO B							
+
+	LD		HL,CIODEV_MAX		; GRAB MAX VALUE OF TARGETCON
+	LD		A,(HL)
+
+	CP		B								; CHECK IF B<=A
+	JP		M, 	ERROOR				; IF B>A,  and both are less then 80 then S SET, ERR
+	JP		C,	ERROOR        ; IF B> 80 carry set instead (signed numbers problem)
+	; swap A and B
+
+	JP		PE, ERROOR					; IF B>A, C SET, ERR
+
+	LD	HL, MSGTALKING		; PRINT TARGET DEVICE
+	CALL PRTSTR
+	LD A, B								; RETRIEVE TARGET CON
+	CALL PRTHEX
+	CALL  NEWLINE
+	
+	AND $00
+	RET
+
+
+
+;
+;NOT COMPATIBLE WITH THE DBGMON FUNCTION OF THE SAME NAME
+;
+NONBLANK:
+	LD	A,(HL)				; LOAD NEXT CHARACTER
+	OR	A							; STRING ENDS WITH A NULL
+	RET	Z							; IF NULL, RETURN POINTING TO NULL
+	CP	' '						; CHECK FOR BLANK
+	RET	NZ						; RETURN IF NOT BLANK
+	INC	HL						; IF BLANK, INCREMENT CHARACTER POINTER
+	JR	NONBLANK			; AND LOOP
+
+;
+;
+;===============================================================================
+; END ROUTINES THAT ARE NOT COMPATIBLE WITH DBGMON
+;===============================================================================
+;
+
+
+
+
+;
+;===============================================================================
+; BEGIN ROUTINES THAT ARE LIFTED FROM  DBGMON
+;===============================================================================
+;
+
+
+;
+;	PRINT THE VALUE IN A IN HEX WITHOUT DESTROYING ANY REGISTERS
+;
+PRTHEX:
+	PUSH	DE				; SAVE DE
+	CALL	HEXASCII	; CONVERT VALUE IN A TO HEX CHARS IN DE
+	LD	A,D					; GET THE HIGH ORDER HEX CHAR
+	CALL	COUT			; PRINT IT
+	LD	A,E					; GET THE LOW ORDER HEX CHAR
+	CALL	COUT			; PRINT IT
+	POP	DE					; RESTORE DE
+	RET							; DONE
+
+;
+; CONVERT BINARY VALUE IN A TO ASCII HEX CHARACTERS IN DE
+;
+
+HEXASCII:
+	LD	D,A				; SAVE A IN D
+	CALL	HEXCONV	; CONVERT LOW NIBBLE OF A TO HEX
+	LD	E,A				; SAVE IT IN E
+	LD	A,D				; GET ORIGINAL VALUE BACK
+	RLCA					; ROTATE HIGH ORDER NIBBLE TO LOW BITS
+	RLCA
+	RLCA
+	RLCA
+	CALL	HEXCONV	; CONVERT NIBBLE
+	LD	D,A				; SAVE IT IN D
+	RET						; DONE
+
+;
+; CONVERT LOW NIBBLE OF A TO ASCII HEX
+;
+HEXCONV:
+	AND	$0F	     	; LOW NIBBLE ONLY
+	ADD	A,$90
+	DAA	
+	ADC	A,$40
+	DAA	
+	RET
+;
+
+
+;
+; ADD THE VALUE IN A TO HL (HL := HL + A)
+;
+ADDHL:
+	ADD	A,L				; A := A + L
+	LD	L,A				; PUT RESULT BACK IN L
+	RET	NC				; IF NO CARRY, WE ARE DONE
+	INC	H					; IF CARRY, INCREMENT H
+	RET						; AND RETURN
+
+
+;
+;__________________________________________________________________________________________________
+;
+; UTILITY PROCS TO PRINT SINGLE CHARACTERS WITHOUT TRASHING ANY REGISTERS
+;
+;__________________________________________________________________________________________________
+;
+PC_SPACE:
+	PUSH	AF
+	LD	A,' '
+	JR	PC_PRTCHR
+PC_COLON:
+	PUSH	AF
+	LD	A,':'
+	JR	PC_PRTCHR
+PC_CR:
+	PUSH	AF
+	LD	A,CHR_CR
+	JR	PC_PRTCHR
+
+PC_LF:
+	PUSH	AF
+	LD	A,CHR_LF
+	JR	PC_PRTCHR
+
+PC_PRTCHR:
+	CALL	COUT
+	POP	AF
+	RET
+
+NEWLINE2:
+	CALL	NEWLINE
+NEWLINE:
+	CALL	PC_CR
+	CALL	PC_LF
+	RET
+
+PRTSTR:
+	LD	A,(HL)
+	INC	HL
+	CP	'$'
+	RET	Z
+	CALL	COUT
+	JR	PRTSTR
+
+;
+;__COUT_______________________________________________________________________
+;
+;	OUTPUT CHARACTER FROM A
+;_____________________________________________________________________________
+;
+COUT:
+	; SAVE ALL INCOMING REGISTERS
+	PUSH	AF
+	PUSH	BC
+	PUSH	DE
+	PUSH	HL
+;
+	; OUTPUT CHARACTER TO CONSOLE VIA HBIOS
+	LD	E,A							; OUTPUT CHAR TO E
+	LD	C,CIO_CONSOLE		; CONSOLE UNIT TO C
+	LD	B,BF_CIOOUT			; HBIOS FUNC: OUTPUT CHAR
+	CALL	HBIOS_SYS			; HBIOS OUTPUTS CHARACTER
+;
+	; RESTORE ALL REGISTERS
+	POP	HL
+	POP	DE
+	POP	BC
+	POP	AF
+	RET
+;
+;__CIN________________________________________________________________________
+;
+;	INPUT CHARACTER TO A
+;_____________________________________________________________________________
+;
+CIN:
+	; SAVE INCOMING REGISTERS (AF IS OUTPUT)
+	PUSH	BC
+	PUSH	DE
+	PUSH	HL
+;
+	; INPUT CHARACTER FROM CONSOLE VIA HBIOS
+	LD	C,CIO_CONSOLE	; CONSOLE UNIT TO C
+	LD	B,BF_CIOIN		; HBIOS FUNC: INPUT CHAR
+	CALL	HBIOS_SYS		; HBIOS READS CHARACTER
+	LD	A,E						; MOVE CHARACTER TO A FOR RETURN
+;
+	; RESTORE REGISTERS (AF IS OUTPUT)
+	POP	HL
+	POP	DE
+	POP	BC
+	RET
+;
+;__CST________________________________________________________________________
+;
+;	RETURN INPUT STATUS IN A (0 = NO CHAR, !=0 CHAR WAITING)
+;_____________________________________________________________________________
+;
+CST:
+	; SAVE INCOMING REGISTERS (AF IS OUTPUT)
+	PUSH	BC
+	PUSH	DE
+	PUSH	HL
+;
+	; GET CONSOLE INPUT STATUS VIA HBIOS
+	LD	C,CIO_CONSOLE		; CONSOLE UNIT TO C
+	LD	B,BF_CIOIST			; HBIOS FUNC: INPUT STATUS
+	CALL	HBIOS_SYS			; HBIOS RETURNS STATUS IN A
+;
+	; RESTORE REGISTERS (AF IS OUTPUT)
+	POP	HL
+	POP	DE
+	POP	BC
+	RET
+;
+
+
+;
+;__ISHEX______________________________________________________________________
+;
+;	CHECK BYTE AT (HL) FOR HEX CHAR, RET Z IF SO, ELSE NZ
+;_____________________________________________________________________________
+;
+ISHEX:
+	LD	A,(HL)			; CHAR TO AS
+	CP	'0'					; < '0'?
+	JR	C,ISHEX1		; YES, NOT 0-9, CHECK A-F
+	CP	'9' + 1			; > '9'
+	JR	NC,ISHEX1		; YES, NOT 0-9, CHECK A-F
+	XOR	A						; MUST BE 0-9, SET ZF
+	RET							; AND DONE
+ISHEX1:
+	CP	'A'					; < 'A'?
+	JR	C,ISHEX2		; YES, NOT A-F, FAIL
+	CP	'F' + 1			; > 'F'
+	JR	NC,ISHEX2		; YES, NOT A-F, FAIL
+	XOR	A						; MUST BE A-F, SET ZF
+	RET							; AND DONE
+ISHEX2:
+	OR	$FF					; CLEAR ZF
+	RET							; AND DONE
+;
+;__HEXBYTE____________________________________________________________________
+;
+;	GET ONE BYTE OF HEX DATA FROM BUFFER IN HL, RETURN IN A
+;_____________________________________________________________________________
+;
+HEXBYTE:
+	LD	C,0					; INIT WORKING VALUE
+HEXBYTE1:
+	CALL	ISHEX			; DO WE HAVE A HEX CHAR?
+	JR	NZ,HEXBYTE3	; IF NOT, WE ARE DONE
+	LD	B,4					; SHIFT WORKING VALUE (C := C * 16)
+HEXBYTE2:
+	SLA	C						; SHIFT ONE BIT
+	RET	C						; RETURN W/ CF SET INDICATING OVERFLOW ERROR
+	DJNZ	HEXBYTE2	; LOOP FOR 4 BITS
+	CALL	NIBL			; CONVERT HEX CHAR TO BINARY VALUE IN A & INC HL
+	OR	C						; COMBINE WITH WORKING VALUE
+	LD	C,A					; AND PUT BACK IN WORKING VALUE
+	JR	HEXBYTE1		; DO ANOTHER CHARACTER
+HEXBYTE3:
+	LD	A,C					; WORKING VALUE TO A
+	OR	A						; CLEAR CARRY
+	RET		
+
+;
+;__NIBL_______________________________________________________________________
+;
+;	GET ONE BYTE OF HEX DATA FROM BUFFER IN HL, RETURN IN A
+;_____________________________________________________________________________
+;
+NIBL:
+	LD	A,(HL)		; GET K B. DATA
+	INC	HL				; INC KB POINTER
+	CP	40H				; TEST FOR ALPHA
+	JR	NC,ALPH
+	AND	0FH				; GET THE BITS
+	RET
+ALPH:
+	AND	0FH				; GET THE BITS
+	ADD	A,09H			; MAKE IT HEX A-F
+	RET
+
+
+;
+;===============================================================================
+; END ROUTINES THAT ARE LIFTED FROM  DBGMON
+;===============================================================================
+;
+
+
+
+
+;
+;===============================================================================
+; ERROR RESPONCES
+;===============================================================================
+;
+
+ERROOR:						; REQUESTED DEV OUT OF RANGE (SYNTAX)
+	CALL	NEWLINE
+	LD		A, 'R'
+	CALL	COUT	
+	LD 		HL,TARGET_CON
+	LD    A,(HL)
+	CALL	PRTHEX
+
+
+	LD		A, ':'
+	CALL	COUT
+	LD		A, 'M'
+	CALL	COUT
+	LD 		HL,CIODEV_MAX
+	LD    A,(HL)
+	CALL	PRTHEX
+
+	LD	HL,MSGOOR
+	JR	ERROR
+ERRHEXRD:					; COMMAND HEX READ ERROR (SYNTAX)
+	LD	HL,MSGHEXRD
+	JR	ERROR
+ERRUSE:						; COMMAND USAGE ERROR (SYNTAX)
+	LD	HL,MSGUSE
+	JR	ERROR
+ERRPRM:						; COMMAND PARAMETER ERROR (SYNTAX)
+	LD	HL,MSGPRM
+	JR	ERROR
+ERROR:						; PRINT ERROR STRING AND RETURN ERROR SIGNAL
+	CALL	NEWLINE		; PRINT NEWLINE
+	CALL	PRTSTR		; PRINT ERROR STRING
+	OR	$FF					; SIGNAL ERROR
+	RET							; DONE
+
+;===============================================================================
+; STORAGE SECTION
+;===============================================================================
+;
+
+; CHAR DEV COUNT 
+CIODEV_CNT	.DB	$0
+CIODEV_MAX	.DB	$0
+
+;TALK LOOP DATA, DEFAULT TO LOOPBACK
+USER_CON		.DB $80
+TARGET_CON	.DB $80
+
+; PING PONG POINTERS
+RF_DEV			.DB 0
+WT_DEV			.DB 0
+
+; TARGET CHARACTER DEVICE DATA
+TGT_DEV:
+	.DB	0		; HBIOS CHAR NUM
+	.DB	0		; C: DEVICE ATTRIBUTES
+	.DB	0		; D: DEVICE TYPE
+	.DB	0		; E: DEVICE NUMBER
+	.DB	0		; H: DEVICE MODE
+	.DB	0		; L: DEVICE I/O BASE ADDRESS
+
+; STRING LITERALS 
+MSGUSE			.TEXT	"USAGE: HTALK <CIO_DEV_ID>$"
+MSGPRM			.TEXT	"PARAMETER ERROR$"
+MSGOOR			.TEXT	"CIO VAL TOO LARGE$"
+MSGHEXRD		.TEXT	"HEX READ ERR$"
+MSGTALKING	.TEXT	"CONNECTING TO CHAR:$"
+
+
+DEV_STR_TBL:
+	.TEXT "CHAR:$"
+	.TEXT "ATTR:$"
+	.TEXT "TYPE:$"
+	.TEXT "NUMB:$"
+	.TEXT "MODE:$"
+	.TEXT "ADDR:$"
+
+STR_DEVS_FOUND	.TEXT "NUM CHAR DEVICES FOUND - $"
+STR_EXITMSG	.TEXT "HTALK DONE$"
+STR_BANNER	.TEXT	"HTALK V1.0 (CTRL-C TO EXIT)$"
+STR_HBIOS	.TEXT "HBIOS DETECTED$"
+STR_BIOERR	.TEXT	"*** UNKNOWN BIOS	-	BAILING OUT ***$"
+	
+STKSAV	.DW	0		; STACK POINTER SAVED AT START
+	.FILL	STKSIZ,0	; STACK
+STACK	.EQU	$		; STACK TOP
+;
+	.END

Source/Apps/Makefile

@@ -1,6 +1,6 @@
 OBJECTS = sysgen.com syscopy.com assign.com format.com talk.com \
 	mode.com rtc.com timer.com rtchb.com
-SUBDIRS = XM FDU FAT Tune Test ZMP ZMD Dev VGM cpuspd Survey
+SUBDIRS = HTalk XM FDU FAT Tune Test ZMP ZMD Dev VGM cpuspd Survey
 DEST = ../../Binary/Apps
 TOOLS =../../Tools
 

Source/Apps/Test/DMAmon/dmamon.asm

@@ -12,12 +12,26 @@ DMAMODE_Z180	.EQU	2		; Z180 INTEGRATED DMA
 DMAMODE_Z280	.EQU	3		; Z280 INTEGRATED DMA
 DMAMODE_RC	.EQU	4		; RCBUS Z80 DMA
 DMAMODE_MBC	.EQU	5		; MBC
-DMAMODE_VDG	.EQU	6		; VELESOFT DATAGEAR
+DMAMODE_DUO	.EQU	6		; DUO
+DMAMODE_VDG	.EQU	7		; VELESOFT DATAGEAR
+;
+DMAMODE		.EQU	DMAMODE_DUO	; SELECT DMA DEVICE FOR TESTING
+;
+;==================================================================================================
+; SOME DEFAULT PLATFORM CONFIGURATIONS
+;==================================================================================================
 ;
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.EQU	DMAMODE_MBC	; SELECT DMA DEVICE FOR TESTING
+DMALATCH	.EQU	DMABASE+1	; DMA: DMA LATCH ADDRESS
 DMAIOTST	.EQU	$68		; AN OUTPUT PORT FOR TESTING - 16C450 SERIAL OUT
 ;
+#IF (DMAMODE==DMAMODE_DUO)
+DMABASE		.SET	$40		; DMA: DMA0 BASE ADDRESS
+DMALATCH	.SET	$43		; DMA: DMA LATCH ADDRESS
+DMAIOTST	.SET	$58		; AN OUTPUT PORT FOR TESTING - 16C450 SERIAL OUT
+;DMAIOTST	.SET	$94		; AN ALT OUTPUT PORT FOR TESTING - RTC/SPEAKER/LEDS PORT
+#ENDIF
+;
 ;==================================================================================================
 ; HELPER MACROS AND EQUATES
 ;==================================================================================================
@@ -113,7 +127,7 @@ MAIN:
 	LD	SP,STACK		; STACK
 ;
 	call	PRTSTRD			; WELCOME
-	.db	"\n\rDMA Monitor V3\n\r$"
+	.db	"\n\rDMA Monitor V3.1\n\r$"
 ;
 #IF (INTENABLE)
 ;
@@ -122,6 +136,8 @@ MAIN:
 	ld	de,$A000
 	ld	bc,hsiz
 	ldir
+	ld	a,(dmaport)
+	ld	(int_dmaport),a
 ;
 	; Install interrupt vector (RomWBW specific!!!)
 	ld	hl,int		; pointer to my interrupt handler
@@ -156,17 +172,17 @@ MENULP1:
 	CP	'N'
 	JP	Z,DMATST_N		; MEMORY COPY ITER
 	CP	'0'
-	JP	Z,DMATST_01
+	JP	Z,DMATST_0		; PULSE DMA PORT
+	CP	'1'
+	JP	Z,DMATST_1		; PULSE LATCH PORT
 	CP	'O'
 	JP	Z,DMATST_O
-#IF !(DMAMODE==DMAMODE_VDG)
-	CP	'1'
-	JP	Z,DMATST_01
 	CP	'R'
 	JP	Z,DMATST_R		; TOGGLE RESET
 	CP	'Y'
-	JP	Z,DMATST_Y		; TOGGLE READY
-#ENDIF
+	JP	Z,DMATST_Y
+	cp	'L'
+	jp	z,DMACFG_L		; SET LATCH PORT
 	cp	'S'
 	jp	z,DMACFG_S		; SET PORT
 	cp	'V'
@@ -197,12 +213,20 @@ DMABYE:
 ;
 DMACFG_S:
 	call	PRTSTRD
-	.db	"\n\rSet port address\n\rPort:$"
+	.db	"\n\rSet DMA port address\n\rPort:$"
 	call	HEXIN
 	ld	hl,dmaport
 	ld	(hl),a
-	inc	hl
-	inc	a
+#IF (INTENABLE)
+	ld	(int_dmaport),a
+#ENDIF
+	jp	MENULP
+;
+DMACFG_L:
+	call	PRTSTRD
+	.db	"\n\rSet Latch port address\n\rPort:$"
+	call	HEXIN
+	ld	hl,dmalach
 	ld	(hl),a
 	jp	MENULP
 ;
@@ -234,11 +258,17 @@ DMATST_N:
 	CALL	DMAMemTestIter
 	JP	MENULP
 ;
-DMATST_01:
+DMATST_0:
 	call	PRTSTRD
-	.db	"\n\rPerforming Port Selection Test\n\r$"
-	CALL	DMA_Port01
-	JP	MENULP
+	.db	"\n\rPerforming DMA Port Selection Test\n\r$"
+	CALL	DMA_Port0
+	ret
+
+DMATST_1:
+	call	PRTSTRD
+	.db	"\n\rPerforming Latch Port Selection Test\n\r$"
+	CALL	DMA_Port1
+	ret
 ;
 DMATST_O:
 	call	PRTSTRD
@@ -255,7 +285,7 @@ DMATST_D:
 DMATST_Y:
 	call	PRTSTRD
 	.db	"\n\rPerforming Ready Bit Test\n\r$"
-	CALL	DMA_ReadyT
+	CALL	DMA_ReadyY
 	JP	MENULP
 ;
 DMATST_R:
@@ -289,6 +319,10 @@ DISPM:	call	PRTSTRD
 	.db	", Port=0x$"
 	LD	A,(dmaport)		; DISPLAY
 	CALL	PRTHEXBYTE		; DMA PORT
+	call	PRTSTRD
+	.db	", Latch Port=0x$"
+	ld	A,(dmalach)
+	CALL	PRTHEXBYTE		; DMA PORT
 ;
 #IF (INTENABLE)
 ;
@@ -351,7 +385,7 @@ DMA_INIT:
 	CALL	PRTHEXBYTE
 ;
 #IF !(DMAMODE==DMAMODE_VDG)
-	ld	a,(dmautil)
+	ld	a,(dmalach)
 	ld	c,a
 	LD	A,DMA_FORCE
 	out	(c),a			; force ready off
@@ -369,7 +403,8 @@ DMA_INIT:
 ;
 	ld	hl,DMACode		; program the
 	ld	b,DMACode_Len		; dma command
-	ld	c,DMABASE		; block
+	ld	a,(dmaport)
+	ld	c,a		; block
 ;
 	di
 	otir				; load dma
@@ -417,6 +452,7 @@ DMA_DEV_STR:
 	.TEXT	"Z280$"
 	.TEXT	"RCBUS$"
 	.TEXT	"MBC$"
+	.TEXT	"DUODYNE$"
 	.TEXT	"DATAGEAR$"
 ;
 DMA_SPD_STR:
@@ -479,11 +515,12 @@ DMACFG_V:
 ;==================================================================================================
 ;
 DMABUF	.TEXT	"0123456789abcdef"
+;DMABUF	.DB	$04,$00,$04,$00,$04,$00,$04,$00,$04,$00,$04,$00,$04,$00,$04,$00,$00,$00,$00 ; SPEAKER
 ;
 DMA_ReadyO:
 	call	PRTSTRD
 	.db	"\r\nOutputing string to port 0x$"
-	ld	a,DMAIOTST
+	ld	a,(tstport)
 	call	PRTHEXBYTE
 	call	NEWLINE
 ;
@@ -491,7 +528,7 @@ DMA_ReadyO:
 IOLoop:	push	bc
 	call	NEWLINE
 	ld	hl,DMABUF
-	ld	a,DMAIOTST
+	ld	a,(tstport)
 	ld	bc,16
 ;
 	call	DMAOTIR
@@ -502,16 +539,17 @@ IOLoop:	push	bc
 	ret
 ;
 ;==================================================================================================
-; PULSE PORT (COMMON ROUTINE WHERE A CONTAINS THE ASCII PORT OFFSET)
+; PULSE PORT
 ;==================================================================================================
 ;
-DMA_Port01:
+DMA_Port0:
+	ld	a,(dmaport)
+	jr	DMA_Port
+DMA_Port1:
+	ld	a,(dmalach)
+DMA_Port:
 	call	PRTSTRD
 	.db	"\r\nPulsing port 0x$"
-	sub	'0'			; Calculate
-	ld	c,a
-	ld	a,(dmaport)		; Port to
-	add	a,c
 	call	PRTHEXBYTE
 	call	NEWLINE
 	ld	c,a			; toggle
@@ -543,12 +581,9 @@ dlylp:	dec	bc
 ; TOGGLE READY BIT
 ;==================================================================================================
 ;
-DMA_ReadyT:
+DMA_ReadyY:
 	call	NEWLINE
-#IF !(DMAMODE==DMAMODE_VDG)
-
-#ENDIF
-	ld	a,(dmautil)
+	ld	a,(dmalach)
 	ld	c,a			; toggle
 	ld	b,$20			; loop counter
 portlp2:push	bc
@@ -558,14 +593,12 @@ portlp2:push	bc
 	.db	": ON$"
 	call	delay
 	ld	a,$FF
-;	ld	c,DMABASE+1
 	out	(c),a
 	call	PRTSTRD
 	.db	" -> OFF$"
 	call	delay
 	call	PRTSTRD
 	.db	"\r               \r$"
-;	ld	c,DMABASE+1
 	ld	a,0
 	out	(c),a
 	pop	bc
@@ -605,9 +638,9 @@ DMAMemMove1:
 ;
 DMAMemMove2:
 ;
-;	LD	HL,$8400	; PLANT
-;	LD	A,$00		; BAD
-;	LD	(HL),A		; SEED
+	;LD	HL,$8400	; PLANT
+	;LD	A,$00		; BAD
+	;LD	(HL),A		; SEED
 ;
 	LD	A,$AA		; CHECK COPY SUCCESSFULL
 	LD	HL,$8000
@@ -615,6 +648,14 @@ DMAMemMove2:
 NXTCMP:	CPI
 	JP	PO,CMPOK
 	JR	Z,NXTCMP
+
+	DEC	HL
+	CALL	PRTHEXWORDHL
+	LD	A,' '
+	CALL	COUT
+	LD	A,(HL)
+	CALL	PRTHEXBYTE
+	
 	RET			; RET W/ ZF CLEAR
 ;
 CMPOK:
@@ -1167,10 +1208,10 @@ CST:
 	RET
 ;
 USEINT	.DB	FALSE		; USE INTERRUPTS FLAG
-counter	.dw	0	
 dmaport	.db	DMABASE
-dmautil	.db	DMABASE+1
+dmalach	.db	DMALATCH
 dmaxfer	.db	DMA_XMODE
+tstport	.db	DMAIOTST
 dmavbs	.db	0
 SAVSTK:	.DW	2
 	.FILL	64
@@ -1187,11 +1228,16 @@ reladr	.equ	$		; relocation start adr
 	.org	$A000		; code will run here
 ;
 int:
+	;LD	E,'.'			; OUTPUT CHAR TO E
+	;LD	C,CIO_CONSOLE		; CONSOLE UNIT TO C
+	;LD	B,BF_CIOOUT		; HBIOS FUNC: OUTPUT CHAR
+	;CALL	$FFF0			; HBIOS OUTPUTS CHARACTER
+
 	; According to the DMA doc, you must issue
 	; a DMA_DISABLE command prior to a
 	; DMA_REINIT_STATUS_BYTE command to avoid a
 	; potential race condition.
-	ld	a,(dmaport)
+	ld	a,(int_dmaport)
 	ld	c,a
 	ld	a,DMA_DISABLE
 	out	(c),a
@@ -1211,6 +1257,11 @@ int:
 	or	$ff		; signal int handled
 	ret
 ;
+; data referred to in handler must reside in high mem
+;
+int_dmaport	.db	0	; hi mem copy of dmaport
+counter		.dw	0	; interrupt counter
+;
 hsiz	.equ	$ - $A000	; size of handler to relocate
 ;
 	.org	reladr + hsiz

Source/Apps/Test/I2C/Build.cmd

@@ -8,6 +8,8 @@ set TASMTABS=%TOOLS%\tasm32
 tasm -t180 -g3 -fFF i2cscan.asm i2cscan.com i2cscan.lst || exit /b
 tasm -t180 -g3 -fFF rtcds7.asm rtcds7.com rtcds7.lst || exit /b
 tasm -t180 -g3 -fFF i2clcd.asm i2clcd.com i2clcd.lst || exit /b
+tasm -t80 -g3 -ff srom.asm srom.com srom.lst || exit /b
 
 copy /Y i2c*.com ..\..\..\..\Binary\Apps\Test\ || exit /b
 copy /Y rtcds7*.com ..\..\..\..\Binary\Apps\Test\ || exit /b
+copy /Y srom.com ..\..\..\..\Binary\Apps\Test\ || exit /b

Source/Apps/Test/I2C/Makefile

@@ -1,4 +1,4 @@
-OBJECTS = i2cscan.com rtcds7.com i2clcd.com
+OBJECTS = i2cscan.com rtcds7.com i2clcd.com srom.com
 DEST = ../../../../Binary/Apps/Test/
 TOOLS = ../../../../Tools
 

Source/Apps/Test/I2C/i2cscan.asm

@@ -5,12 +5,13 @@
 ; MARCO MACCAFERRI, HTTPS://WWW.MACCASOFT.COM
 ; HBIOS VERSION BY PHIL SUMMERS (B1ACKMAILER) DIFFICULTLEVELHIGH@GMAIL.COM
 ;
-PCF	.EQU	1
-P8X180	.EQU	0
-SC126	.EQU	0
-SC137	.EQU	0
+PCFECB		.EQU	0
+PCFDUO		.EQU	1
+P8X180		.EQU	0
+SC126		.EQU	0
+SC137		.EQU	0
 ;
-#IF (PCF)
+#IF (PCFECB)
 I2C_BASE 	.EQU  	0F0H
 PCF_ID   	.EQU  	0AAH
 CPU_CLK	 	.EQU  	12
@@ -20,6 +21,16 @@ PCF_RS1  	.EQU  	PCF_RS0+1
 PCF_OWN	 	.EQU  	(PCF_ID >> 1)        	; PCF'S ADDRESS IN SLAVE MODE
 #ENDIF
 ;
+#IF (PCFDUO)
+I2C_BASE 	.EQU  	056H
+PCF_ID   	.EQU  	0AAH
+CPU_CLK	 	.EQU  	12
+;
+PCF_RS0  	.EQU  	I2C_BASE
+PCF_RS1  	.EQU  	PCF_RS0+1
+PCF_OWN	 	.EQU  	(PCF_ID >> 1)        	; PCF'S ADDRESS IN SLAVE MODE
+#ENDIF
+;
 #IF (P8X180)
 I2C_BASE	.EQU	0A0h
 _sda		.EQU	0
@@ -153,8 +164,11 @@ lp5f:	ld	a,(addr)	; next address
 	jp	0
 
 signon:	.db	"I2C Bus Scanner"
-#IF (PCF)
-	.DB	" - PCF8584"
+#IF (PCFECB)
+	.DB	" - PCF8584 (ECB)"
+#ENDIF
+#IF (PCFDUO)
+	.DB	" - PCF8584 (Duodyne)"
 #ENDIF
 #IF (SC126)
 	.DB	" - SC126"
@@ -219,7 +233,7 @@ _cout:				; character
 	ret
 
 ;-----------------------------------------------------------------------------
-#IF (PCF)
+#IF (PCFECB | PCFDUO)
 _i2c_start:
 PCF_START:
         LD     A,PCF_START_  
@@ -418,7 +432,7 @@ PCF_PINFAIL 	.DB	"PIN FAIL$"
 PCF_BBFAIL	.DB	"BUS BUSY$"
 ;
 ;-----------------------------------------------------------------------------
-#IF (PCF)
+#IF (PCFECB | PCFDUO)
 _i2c_stop:  
 PCF_STOP: 
 	LD   	A,PCF_STOP_	; issue 

Source/Apps/Tune/tune.asm

@@ -629,6 +629,9 @@ CFGTBL:	;	PLT	RSEL	RDAT	RIN	Z180	ACR
 ;
 	.DB	13,	$A0,	$A1,	$A0,	$FF,	$A2	; MBC
 	.DW	HWSTR_MBC
+;
+	.DB	17,	$A0,	$A1,	$A0,	$FF,	$A2	; DUODYNE
+	.DW	HWSTR_DUO
 ;
 	.DB	$FF					; END OF TABLE MARKER
 ;
@@ -682,6 +685,7 @@ HWSTR_RCEB6	.DB	"RCBus Sound Module (EBv6)",0
 HWSTR_RCMF	.DB	"RCBus Sound Module (MF)",0
 HWSTR_LINC	.DB	"Z50 LiNC Sound Module",0
 HWSTR_MBC	.DB	"NHYODYNE Sound Module",0
+HWSTR_DUO	.DB	"DUODYNE Sound Module",0
 
 MSGUNSUP	.db	"MYM files not supported with HBIOS yet!\r\n", 0
 

Source/Apps/XM/xmdm125.asm

@@ -720,12 +720,17 @@ NOBYE:	LXI	H,FCB+1		; Get primary option
 ; Send option processor
 ; Single option: "K"	- force 1k mode
 ;
-	INX	H		; Look for a 'K'
+	CALL	SNDOPC
+	CALL	SNDOPC
+	JMP	ALLSET
+SNDOPC:INX	H		; Look for an option
 	MOV	A,M
 	CPI	' '		; Is it a space?
-	JZ	ALLSET		; Then we're ready to send...
-	CPI	'K'
-	JNZ	OPTERR		; "K" is the only setable 2nd option
+	JNZ	CHKK
+	POP	PSW
+	JMP	ALLSET
+CHKK:	CPI	'K'
+	JNZ	CHK6TH		; If it's not K it should be a port number
 	LDA	MSPEED
 	CPI	MINKSP		; If less than MINKSP bps, ignore 1k
 	JC	ALLSET		; Request
@@ -733,7 +738,7 @@ NOBYE:	LXI	H,FCB+1		; Get primary option
 	STA	KFLAG		; First, force us to 1K mode
 	CALL	ILPRT
 	DB	'(1k protocol selected)',CR,LF,0
-	JMP	ALLSET		; That's it for send...
+	RET		; That's it for send...
 ;
 ; Receive option processor
 ; 3 or 4 options: "X"	- disable auto-protocol select
@@ -5789,4 +5794,4 @@ BDPTOS	EQU	83		; Print Time on System
 	 ENDIF			; BYEBDOS
 ;
 	END
-
+

Source/Apps/assign.asm

@@ -31,6 +31,7 @@
 ;   2022-02-28 [WBW] Use HBIOS to swap banks under CP/M 3
 ;                    Use CPM3 BDOS direct BIOS call to get DRVTBL adr
 ;   2023-06-19 [WBW] Update for revised DIODEVICE API
+;   2023-09-19 [WBW] Added CHUSB & CHSD device support
 ;_______________________________________________________________________________
 ;
 ; ToDo:
@@ -1065,10 +1066,6 @@ drvmap1:	; loop through device table looking for a match
 drvmap2:	
 	; convert index to device type id
 	ld	a,c		; index to accum
-	rlca			; move it to upper nibble
-	rlca			; ...
-	rlca			; ...
-	rlca			; ...
 	ld	(device),a	; save as device id
 ;
 	; loop thru hbios units looking for device type/unit match
@@ -1308,10 +1305,6 @@ prtdev:
 	rst	08		; call hbios, D := device, E := unit
 	push	de		; save results
 	ld	a,d		; device to A
-	rrca			; isolate high nibble (device)
-	rrca			;   ...
-	rrca			;   ...
-	rrca			;   ... into low nibble
 	and	$0F		; mask out undesired bits
 	push	hl		; save HL
 	add	a,a		; multiple A by two for word table
@@ -1920,8 +1913,8 @@ dev09	.db	"HDSK",0
 dev10	.db	"PPA",0
 dev11	.db	"IMM",0
 dev12	.db	"SYQ",0
-dev13	.equ	devunk
-dev14	.equ	devunk
+dev13	.db	"CHUSB",0
+dev14	.db	"CHSD",0
 dev15	.equ	devunk
 ;
 devcnt	.equ	10		; 10 devices defined
@@ -1942,10 +1935,10 @@ stack	.equ	$		; stack top
 ; Messages
 ;
 indent	.db	"   ",0
-msgban1	.db	"ASSIGN v1.6 for RomWBW CP/M ",0
+msgban1	.db	"ASSIGN v1.7 for RomWBW CP/M ",0
 msg22	.db	"2.2",0
 msg3	.db	"3",0
-msbban2	.db	", 16-Jun-2023",0
+msbban2	.db	", 19-Sep-2023",0
 msghb	.db	" (HBIOS Mode)",0
 msgub	.db	" (UBIOS Mode)",0
 msgban3	.db	"Copyright 2021, Wayne Warthen, GNU GPL v3",0

Source/Apps/rtc.asm

@@ -31,6 +31,8 @@
 ;
 ;[2022/03/27] v1.8 Support RHYOPHYRE
 ;
+;[2023/07/07] v1.9 Support DUODYNE
+;
 ; Constants
 ;
 mask_data	.EQU	%10000000	; RTC data line
@@ -49,6 +51,7 @@ PORT_DYNO	.EQU	$0C		; RTC port for DYNO
 PORT_RCZ280	.EQU	$C0		; RTC port for RCZ280
 PORT_MBC	.EQU	$70		; RTC port for MBC
 PORT_RPH	.EQU	$84		; RTC port for RHYOPHYRE
+PORT_DUO	.EQU	$94		; RTC port for DUODYNE
 
 
 BDOS		.EQU	5		; BDOS invocation vector
@@ -1079,61 +1082,66 @@ HINIT:
 	LD	C,PORT_SBC
 	LD	DE,PLT_SBC
 	CP	$01		; SBC
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 	CP	$02		; ZETA
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 	CP	$03		; ZETA 2
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_N8
 	LD	DE,PLT_N8
 	CP	$04		; N8
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_MK4
 	LD	DE,PLT_MK4
 	CP	$05		; Mark IV
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_RCZ80
 	LD	DE,PLT_RCZ80
 	CP	$07		; RCBus w/ Z80
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_RCZ180
 	LD	DE,PLT_RCZ180
 	CP	$08		; RCBus w/ Z180
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_EZZ80
 	LD	DE,PLT_EZZ80
 	CP	$09		; Easy Z80
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_SCZ180
 	LD	DE,PLT_SCZ180
 	CP	$0A		; SCZ180
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_DYNO
 	LD	DE,PLT_DYNO
 	CP	11		; DYNO
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_RCZ280
 	LD	DE,PLT_RCZ280
 	CP	12		; RCZ280
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_MBC
 	LD	DE,PLT_MBC
 	CP	13		; MBC
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_RPH
 	LD	DE,PLT_RPH
 	CP	14		; RHYOPHYRE
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
+;
+	LD	C,PORT_DUO
+	LD	DE,PLT_DUO
+	CP	17		; DUODYNE
+	JP	Z,RTC_INIT2
 ;
 	; Unknown platform
 	LD	DE,PLTERR	; BIOS error message
@@ -1630,7 +1638,7 @@ TESTING_BIT_DELAY_OVER:
 
 RTC_HELP_MSG:
 	.DB	0Ah, 0Dh		; line feed and carriage return
-	.TEXT	"RTC: Version 1.8"
+	.TEXT	"RTC: Version 1.9"
 	.DB	0Ah, 0Dh		; line feed and carriage return
 	.TEXT	"Commands: E)xit T)ime st(A)rt S)et R)aw L)oop C)harge N)ocharge D)elay I)nit G)et P)ut B)oot W)arm-start H)elp"
 	.DB	0Ah, 0Dh		; line feed and carriage return
@@ -1760,6 +1768,7 @@ PLT_DYNO	.TEXT	", DYNO RTC Module Latch Port 0x0C\r\n$"
 PLT_RCZ280	.TEXT	", RCBus Z280 RTC Module Latch Port 0xC0\r\n$"
 PLT_MBC		.TEXT	", MBC RTC Latch Port 0x70\r\n$"
 PLT_RPH		.TEXT	", RHYOPHYRE RTC Latch Port 0x84\r\n$"
+PLT_DUO		.TEXT	", DUODYNE RTC Latch Port 0x70\r\n$"
 
 ;
 ; Generic FOR-NEXT loop algorithm

Source/BPBIOS/diskdefs

@@ -310,6 +310,32 @@ diskdef wbw_rom1024
   os 2.2
 end
 
+# RomWBW 512KB RAM (256KB reserved, 256KB RAM Disk)
+
+diskdef wbw_ram512
+  seclen 512
+  tracks 8
+  sectrk 64
+  blocksize 2048
+  maxdir 256
+  skew 0
+  boottrk 0
+  os 2.2
+end
+
+# RomWBW 1024KB RAM (256KB reserved, 768KB RAM Disk)
+
+diskdef wbw_ram1024
+  seclen 512
+  tracks 24
+  sectrk 64
+  blocksize 2048
+  maxdir 256
+  skew 0
+  boottrk 0
+  os 2.2
+end
+
 # RomWBW 720K floppy media
 
 diskdef wbw_fd720

Source/Build.cmd

@@ -8,7 +8,7 @@ call BuildShared || exit /b
 call BuildImages || exit /b
 call BuildROM %* || exit /b
 call BuildZRC || exit /b
-call BuildZZRC || exit /b
+call BuildZZRCC || exit /b
 
 if "%1" == "dist" (
   call Clean || exit /b

Source/BuildShared.cmd

@@ -4,6 +4,7 @@ setlocal
 pushd HDIAG && call Build || exit /b & popd
 pushd CBIOS && call Build || exit /b & popd
 pushd CPM22 && call Build || exit /b & popd
+pushd QPM && call Build || exit /b & popd
 pushd ZCPR && call Build || exit /b & popd
 pushd ZCPR-DJ && call Build || exit /b & popd
 pushd ZSDOS && call Build || exit /b & popd

Source/BuildZZRC.cmd

@@ -1,4 +0,0 @@
-@echo off
-setlocal
-
-pushd ZZRC && call Build || exit /b & popd

Source/BuildZZRCC.cmd

@@ -0,0 +1,4 @@
+@echo off
+setlocal
+
+pushd ZZRCC && call Build || exit /b & popd

Source/CBIOS/cbios.asm

@@ -1350,7 +1350,6 @@ DSK_SELECT1A:
 	LD	B,BF_DIODEVICE	; HBIOS FUNC: REPORT DEVICE INFO
 	RST	08		; GET UNIT INFO, DEVICE TYPE IN D
 	LD	A,D		; DEVICE TYPE -> A
-	AND	$F0		; ISOLATE HIGH BITS
 	CP	DIODEV_FD	; FLOPPY?
 	JR	NZ,DSK_SELECT1B	; IF NOT, DO LBA IO
 	LD	HL,SEKLBA+3	; POINT TO HIGH ORDER BYTE
@@ -1511,8 +1510,8 @@ DSK_MBR3:
 ;
 DSK_MBR4:
 	; IF BOOT FROM PARTITION, USE NEW SECTORS PER SLICE VALUE
-	LD	HL,16384		; NEW SECTORS PER SLICE
-	LD	(SPS),HL		; SAVE IT
+	LD	HL,16384	; NEW SECTORS PER SLICE
+	LD	(SPS),HL	; SAVE IT
 
 	; UPDATE MEDIA ID
 	LD	A,MID_HDNEW	; NEW MEDIA ID
@@ -1520,20 +1519,80 @@ DSK_MBR4:
 ;
 DSK_MBR5:
 	; ADJUST LBA OFFSET BASED ON TARGET SLICE
-	LD	A,(SLICE)		; GET SLICE, A IS LOOP CNT
-	LD	HL,(SEKLBA)		; SET DE:HL
-	LD	DE,(SEKLBA+2)		; ... TO STARTING LBA
-	LD	BC,(SPS)		; SECTORS PER SLICE
-DSK_MBR6:
-	OR	A			; SET FLAGS TO CHECK LOOP CNTR
-	JR	Z,DSK_MBR8		; DONE IF COUNTER EXHAUSTED
-	ADD	HL,BC			; ADD ONE SLICE TO LOW WORD
-	JR	NC,DSK_MBR7		; CHECK FOR CARRY
-	INC	DE			; IF SO, BUMP HIGH WORD
-DSK_MBR7:
-	DEC	A			; DEC LOOP DOWNCOUNTER
-	JR	DSK_MBR6		; AND LOOP
+	LD	A,(SLICE)	; GET SLICE, A IS LOOP CNT
+	LD	HL,(SEKLBA)	; SET DE:HL
+	LD	DE,(SEKLBA+2)	; ... TO STARTING LBA
+	LD	BC,(SPS)	; SECTORS PER SLICE
+	RES	7,D		; CLEAR LBA MODE BIT
+DSK_MBR6:                       
+	OR	A		; SET FLAGS TO CHECK LOOP CNTR
+	JR	Z,DSK_MBR8	; DONE IF COUNTER EXHAUSTED
+	ADD	HL,BC		; ADD ONE SLICE TO LOW WORD
+	JR	NC,DSK_MBR7	; CHECK FOR CARRY
+	INC	DE		; IF SO, BUMP HIGH WORD
+DSK_MBR7:                       
+	DEC	A		; DEC LOOP DOWNCOUNTER
+	JR	DSK_MBR6	; AND LOOP
 DSK_MBR8:
+	; LBA OFFSET OF DESIRED SLICE IS NOW IN DE:HL
+	; NEED TO CHECK IF THE SLICE IS BEYOND CAPACITY OF MEDIA
+	; IF LBA_OFF + SPS >= DSK_CAP, ERROR!
+;
+	; SAVE LBA_OFF
+	PUSH	DE		; MSW
+	PUSH	HL		; LSW
+;
+	; ADD SPS TO COMPUTE LBA_REQ
+	LD	BC,(SPS)	; SECTORS PER SLICE
+	ADD	HL,BC		; ADD ONE SLICE TO LOW WORD
+	JR	NC,DSK_MBR9	; CHECK FOR CARRY
+	INC	DE		; IF SO, BUMP HIGH WORD
+DSK_MBR9:
+	; SAVE CAP_REQ
+	LD	(CAP_REQ),HL	; LSW
+	LD	(CAP_REQ+2),DE	; MSW
+;
+#IFDEF PLTWBW
+	; GET DSK_CAP (DE:HL)
+	LD	B,BF_DIOCAP	; HBIOS DISK CAPACITY FUNC
+	LD	A,(SEKUNIT)	; DISK UNIT NUMBER
+	LD	C,A		; ... INTO C
+	RST	08		; HBIOS CALL (DE:HL = CAPACITY)
+#ENDIF
+;
+#IFDEF PLTUNA
+	; GET DSK_CAP (DE:HL)
+	LD	C,$45		; UBIOS DISK INFO FUNC
+	LD	A,(SEKUNIT)	; DISK UNIT NUMBER
+	LD	B,A		; ... INTO B
+	RST	08		; CALL UNA (DE:HL = CAPACITY)
+#ENDIF
+;
+	; SAVE DSK_CAP (DE:HL)
+	PUSH	DE		; SAVE DSK_CAP (MSW)
+	PUSH	HL		; SAVE DSK_CAP (LSW)
+;
+	; CHECK DSK_CAP >= CAP_REQ, CF SET ON OVERFLOW
+	; NO NEED SAVE ACTUAL RESULT
+	OR	A		; CLEAR CARRY FOR SBC
+	POP	HL		; DSK_CAP LSW
+	LD	DE,(CAP_REQ)	; CAP_REQ LSW
+	SBC	HL,DE		; DSK_CAP - LBA_REQ (LSW)
+	POP	HL		; DSK_CAP MSW
+	LD	DE,(CAP_REQ+2)	; CAP_REQ MSW
+	SBC	HL,DE		; DSK_CAP - LBA_REQ (MSW)
+;
+	; RESTORE LBA_OFF
+	POP	HL		; LSW
+	POP	DE		; MSW
+;
+	; ABORT ON OVERFLOW WITH ERROR!
+	JR	NC,DSK_MBR10	; IF NO OVERFLOW, CONTINUE
+	OR	$FF		; SIGNAL ERROR
+	RET			; DONE
+;
+DSK_MBR10:
+	; FINALIZE SLICE LBA
 	SET	7,D		; SET LBA ACCESS FLAG
 	; RESAVE IT
 	LD	(SEKLBA),HL	; LOWORD
@@ -1758,6 +1817,7 @@ CCPBUF		.DW	0		; ADDRESS OF CCP BUF IN BIOS BANK
 MEDID		.DB	0		; TEMP STORAGE FOR MEDIA ID
 SLICE		.DB	0		; CURRENT SLICE
 SPS		.DW	0		; SECTORS PER SLICE
+CAP_REQ		.DW	0,0		; LBA CAP REQUIRED FOR SLICE
 STKSAV		.DW	0		; TEMP SAVED STACK POINTER
 ;
 #IFDEF PLTWBW
@@ -2529,24 +2589,21 @@ MD_INIT:
 ; UDPATE THE RAM/ROM DPB STRUCTURES BASED ON HARDWARE
 ;
 #IFDEF PLTWBW
-	; TODO: HANDLE DISABLED RAM/ROM DISK BETTER.
-	; IF RAM OR ROM DISK ARE DISABLED, BELOW WILL STILL
-	; TRY TO ADJUST THE DPB BASED ON RAM BANK CALCULATIONS.
-	; IT SHOULD NOT MATTER BECAUSE THE DPB SHOULD NEVER BE
-	; USED.  IT WOULD BE BETTER TO GET RAMD0/ROMD0 AND
-	; RAMDN/ROMDN FROM THE HCB AND USE THOSE TO CALC THE
-	; DPB ADJUSTMENT.  IF DN-D0=0, BYPASS ADJUSTMENT.
-	LD	A,(HCB + HCB_ROMBANKS)	; ROM BANK COUNT
-	SUB	4		; REDUCE BANK COUNT BY RESERVED PAGES
-	LD	IX,DPB_ROM	; ADDRESS OF DPB
-	CALL	MD_INIT1	; FIX IT UP
+	; NOTE: ROM AND/OR RAM DISK MAY NOT BE ACTIVE, BUT WE GO
+	; AHEAD AND UPDATE BOTH DPBS ANYWAY.  IT CAUSES NO HARM SINCE
+	; INACTIVE RAM/ROM DISK WILL NEVER BE ACCESSED.
 ;
-	LD	A,(HCB + HCB_RAMBANKS)	; RAM BANK COUNT
-	SUB	8		; REDUCE BANK COUNT BY RESERVED PAGES
-	LD	IX,DPB_RAM	; ADDRESS OF DPB
-	CALL	MD_INIT1	; FIX IT UP
+	; ROM DISK
+	LD	A,(HCB + HCB_ROMD_BNKS)	; ROM DISK SIZE IN BANKS
+	LD	IX,DPB_ROM		; ADDRESS OF DPB
+	CALL	MD_INIT1		; FIX IT UP
 ;
-	JR	MD_INIT4	; DONE
+	; RAM DISK
+	LD	A,(HCB + HCB_RAMD_BNKS)	; RAM DISK SIZE IN BANKS
+	LD	IX,DPB_RAM		; ADDRESS OF DPB
+	CALL	MD_INIT1		; FIX IT UP
+;	
+	JR	MD_INIT4		; DONE
 ;
 MD_INIT1:
 ;
@@ -3349,10 +3406,6 @@ DEVUNK		.DB	"UNK$"
 	RST	08		; CALL HBIOS
 	LD	A,D		; RESULTANT DEVICE TYPE
 	PUSH	DE		; NEED TO SAVE UNIT NUMBER (IN E)
-	RRCA			; ROTATE DEVICE
-	RRCA			; ... BITS
-	RRCA			; ... INTO
-	RRCA			; ... LOWEST 4 BITS
 	AND	$0F		; ISOLATE DEVICE BITS
 	ADD	A,A		; MULTIPLY BY TWO FOR WORD TABLE
 	LD	HL,DEVTBL	; POINT TO START OF DEVICE NAME TABLE
@@ -3394,8 +3447,8 @@ DEV09	.DB	"HDSK$"
 DEV10	.DB	"PPA$"
 DEV11	.DB	"IMM$"
 DEV12	.DB	"SYQ$"
-DEV13	.EQU	DEVUNK
-DEV14	.EQU	DEVUNK
+DEV13	.DB	"CHUSB$"
+DEV14	.DB	"CHSD$"
 DEV15	.EQU	DEVUNK
 ;
 #ENDIF

Source/CPM3/boot.z80

@@ -44,7 +44,7 @@ tpa$bank	equ 0
 	if banked
 
 	; Clone page zero from bank 0 to additional banks
-	ld	b,4			; last bank
+	ld	b,2			; last bank
 	ld	c,0			; src bank
 init$2:
 	push	bc			; save bank id's

Source/CPM3/diskio.z80

@@ -38,7 +38,7 @@
 	
 	extrn	?bnkxlt
 	
-	extrn	phex8, cout
+	extrn	phex16, phex8, cout, crlf, crlf2
 
 
     ; CP/M 3 Disk definition macros
@@ -355,38 +355,30 @@ dpb$hdnew:	; 8MB Hard Disk Drive (new format)
 ;		called for first time initialization.
 
 dsk$init:
-	; TODO: Handle disabled RAM/ROM disk better.
-	; If RAM or ROM disk are disabled, below will still
-	; try to adjust the DPB based on RAM bank calculations.
-	; It should not matter because the DPB should never be
-	; used.  It would be better to get RAMD0/ROMD0 and
-	; RAMDN/ROMDN from the HCB and use those to calc the
-	; DPB adjustment.  If DN-D0=0, bypass adjustment.
-	ld	b,0FAh			; HBIOS Peek Function
-	ld	a,(@hbbio)		; HBIOS bank id
-	ld	d,a			; ... goes in D
-	ld	hl,10Ch			; Offset 10Ch is ROM bank cnt
-	rst	08			; Call HBIOS, value in E
-	ld	a,e			; move count to accum
-	sub	4			; reduce by # reserved banks
-	ld	ix,dpb$rom		; address of DPB
-	call	dsk$init1		; fix it up
-	
-	ld	b,0FAh			; HBIOS Peek Function
-	ld	a,(@hbbio)		; HBIOS bank id
-	ld	d,a			; ... goes in D
-	ld	hl,10Bh			; Offset 10Bh is RAM bank cnt
-	rst	08			; Call HBIOS, value in E
-	ld	a,e			; move count to accum
-	sub	8			; reduce by # reserved banks
-	ld	ix,dpb$ram		; address of DPB
-	call	dsk$init1		; fix it up
 
+	; NOTE: ROM and/or RAM disk may not be active, but we go
+	; ahead and update both DPBs anyway.  It causes no harm since
+	; inactive RAM/ROM disk will never be accessed.
+
+	ld	hl,1DFh			; ROM disk bank cnt in HCB
+	ld	ix,dpb$rom		; address of ROM Disk DPB
+	call	dsk$init1		; fix it up
+	ld	hl,1DDh			; RAM dsik bank cnt in HCB
+	ld	ix,dpb$ram		; address of RAM Disk DPB
+	call	dsk$init1		; fix it up
 	ret				; done
 
 dsk$init1:
+	; Get bank count of RAM/ROM disk
+	ld	b,0FAh			; HBIOS Peek Function
+	ld	a,(@hbbio)		; HBIOS bank id
+	ld	d,a			; ... goes in D
+	rst	08			; Call HBIOS, value in E
+	;ld	a,e			; move count to accum
+
 	; Setup HL with bank count
-	ld	l,a			; lsb
+	;ld	l,a			; lsb
+	ld	l,e			; lsb
 	ld	h,0			; msb is always zero
 
 	; Update EXM field
@@ -501,8 +493,7 @@ media:
 	ld	b,17h			; HBIOS func: report device info
 	call	0FFF0h			; get unit info, device type in D
 	ld	a,d			; device type -> A
-	and	0F0h			; isolate high bits
-	cp	10h			; floppy?
+	cp	01h			; floppy?
 	jr	nz,media1		; if not, do LBA I/O
 	ld	hl,lba+3		; point to high order byte
 	res	7,(hl)			; switch from LBA -> CHS
@@ -585,29 +576,77 @@ media4:
 	; adjust the sectors per slice and media id.
 
 	; Use new slice format sectors per slice value
-	ld	hl,16384		; new sectors per slice
-	ld	(sps),hl		; save it
+	ld	hl,16384	; new sectors per slice
+	ld	(sps),hl	; save it
 
 	; Update media id for new hard disk format
-	ld	a,10			; new media id
-	ld	(medid),a		; save it
+	ld	a,10		; new media id
+	ld	(medid),a	; save it
 
 media5:
 	; Adjust LBA offset based on target slice
-	ld	a,(slice)		; get slice, A is loop cnt
-	ld	hl,(lba)		; set DE:HL
-	ld	de,(lba+2)		; ... to starting LBA
-	ld	bc,(sps)		; sectors per slice
+	ld	a,(slice)	; get slice, A is loop cnt
+	ld	hl,(lba)	; set DE:HL
+	ld	de,(lba+2)	; ... to starting LBA
+	ld	bc,(sps)	; sectors per slice
+	res	7,d		; clear lba mode bit
 boot6:
-	or	a			; set flags to check loop cntr
-	jr	z,boot8			; done if counter exhausted
-	add	hl,bc			; add one slice to low word
-	jr	nc,boot7		; check for carry
-	inc	de			; if so, bump high word
+	or	a		; set flags to check loop cntr
+	jr	z,boot8		; done if counter exhausted
+	add	hl,bc		; add one slice to low word
+	jr	nc,boot7	; check for carry
+	inc	de		; if so, bump high word
 boot7:
-	dec	a			; dec loop downcounter
-	jr	boot6			; and loop
+	dec	a		; dec loop downcounter
+	jr	boot6		; and loop
 boot8:
+
+	; LBA offset of desired slice is now in DE:HL.
+	; Need to check if the slice is beyond capacity of media.
+	; If lba_off + sps >= dsk_cap, error!
+
+	; Save lba_off
+	push	de		; msw
+	push	hl		; lsw
+	
+	; Add sps to compute lba_req
+	ld	bc,(sps)	; sectors per slice
+	add	hl,bc		; add one slice to low word
+	jr	nc,dsk_mbr9	; check for carry
+	inc	de		; if so, bump high word
+dsk_mbr9:
+	; Save cap_req
+	ld	(cap_req),hl	; lsw
+	ld	(cap_req+2),de	; msw
+
+	; Get dsk_cap (de:hl)
+	ld	b,1Ah		; hbios disk capacity func
+	ld	a,(unit)	; disk unit number
+	ld	c,a		; ... into c
+	rst	08		; hbios call (de:hl = capacity)
+
+	; Save dsk_cap (de:hl)
+	push	de		; save dsk_cap (msw)
+	push	hl		; save dsk_cap (lsw)
+
+	; Check dsk_cap >= cap_req, cf set on overflow
+	; No need save actual result
+	or	a		; clear carry for sbc
+	pop	hl		; dsk_cap lsw
+	ld	de,(cap_req)	; cap_req lsw
+	sbc	hl,de		; dsk_cap - lba_req (lsw)
+	pop	hl		; dsk_cap msw
+	ld	de,(cap_req+2)	; cap_req msw
+	sbc	hl,de		; dsk_cap - lba_req (msw)
+
+	; Restore lba_off
+	pop	hl		; lsw
+	pop	de		; msw
+
+	; Abort on overflow with error!
+	jp	c,err_noslice	; slice too high, error exit
+
+	; Finalize slice lba
 	set	7,d			; set LBA access flag
 	ld	(lba),hl		; save new lba, low word
 	ld	(lba+2),de		; save new lba, high word
@@ -878,6 +917,7 @@ unit		db	0		; working disk unit num
 slice		db	0		; working slice num
 lba		dw	0,0		; working  lba
 sps		dw	0		; sectors per slice
+cap_req		dw	0,0		; lba cap required for slice
 mbrsec		ds	512		; MBR sector buffer
 dma		dw	0		; current DMA address
 bank		db	0		; HBIOS DMA bank

Source/CPM3/genbnk.dat

@@ -8,12 +8,12 @@ MEMTOP   = FD
 BNKSWT   = Y
 COMBAS   = 80
 LERROR   = Y
-NUMSEGS  = 04
+NUMSEGS  = 02
 MEMSEG00 = 01,17,00
 MEMSEG01 = 0E,72,02
 MEMSEG02 = 01,7F,03
-MEMSEG03 = 01,7F,04
-MEMSEG04 = 01,7F,05
+MEMSEG03 = 00,C0,04
+MEMSEG04 = 00,C0,05
 MEMSEG05 = 00,C0,06
 MEMSEG06 = 00,C0,07
 MEMSEG07 = 00,C0,08
@@ -25,22 +25,22 @@ MEMSEG0C = 00,C0,0D
 MEMSEG0D = 00,C0,0E
 MEMSEG0E = 00,C0,0F
 MEMSEG0F = 00,C0,10
-HASHDRVA = Y
-HASHDRVB = Y
-HASHDRVC = Y
-HASHDRVD = Y
-HASHDRVE = Y
-HASHDRVF = Y
-HASHDRVG = Y
-HASHDRVH = Y
-HASHDRVI = Y
-HASHDRVJ = Y
-HASHDRVK = Y
-HASHDRVL = Y
-HASHDRVM = Y
-HASHDRVN = Y
-HASHDRVO = Y
-HASHDRVP = Y
+HASHDRVA = N
+HASHDRVB = N
+HASHDRVC = N
+HASHDRVD = N
+HASHDRVE = N
+HASHDRVF = N
+HASHDRVG = N
+HASHDRVH = N
+HASHDRVI = N
+HASHDRVJ = N
+HASHDRVK = N
+HASHDRVL = N
+HASHDRVM = N
+HASHDRVN = N
+HASHDRVO = N
+HASHDRVP = N
 ALTBNKSA = Y
 ALTBNKSB = Y
 ALTBNKSC = Y

Source/CPM3/genres.dat

@@ -8,7 +8,7 @@ MEMTOP   = FD
 BNKSWT   = N
 COMBAS   = 00
 LERROR   = Y
-NUMSEGS  = 03
+NUMSEGS  = 01
 MEMSEG00 = 00,80,00
 MEMSEG01 = 00,C0,02
 MEMSEG02 = 00,C0,03

Source/CPM3/move.z80

@@ -65,12 +65,11 @@ xbnkmov:
 ; ------------	--------------	-------
 ; COMMON	BID_COM		8Fh
 ; 0: OS/BUFS	BID_USR         8Eh
-;		BID_BIOS	8Dh	
-; 1: TPA	BID_AUX		8Ch
-; 2: BUFS	BID_AUX-1	8Bh
-; 3: BUFS	BID_AUX-2	8Ah
-; 4: BUFS	BID_AUX-3	89h
-; 5: BUFS	BID_AUX-4	88h
+; 1: TPA	BID_AUX		8Dh
+; 2: BUFS	BID_AUX-1	8Ch
+; 3: BUFS	BID_AUX-2	8Bh
+; 4: BUFS	BID_AUX-3	8Ah
+; 5: BUFS	BID_AUX-4	89h
 ;
 ; N.B., Below BID_AUX is considered RAM disk bank.  Need to
 ; make sure RAM disk is kept small enough to stay below
@@ -80,17 +79,13 @@ xbnkmov:
 ; to adjust for real size of RAM in system
 ;
 ?bnkxlt:
-	or	a
-	jr	z,bank0
-	neg			; 2 -> -2
-	add	a,8Dh		; 8Dh - 2 = 8Bh
-@hbbio	equ	$ - 1		; BID_BIOS
-	ret
-bank0:
-	ld	a,8Eh		; 0 -> 8Eh
+	neg			; ex: 2 -> -2
+	add	a,8Eh		; ex: 8Eh - 2 = 8Ch
 @hbusr	equ	$ - 1		; BID_USR
 	ret
-	
+
+@hbbio	db	0		; BID_BIOS
+
 movtyp	db	0		; non-zero for interbank move
 
 movbnks:

Source/Clean.cmd

@@ -4,6 +4,7 @@ setlocal
 pushd HDIAG && call Clean.cmd & popd
 pushd Apps && call Clean.cmd & popd
 pushd CPM22 && call Clean.cmd & popd
+pushd QPM && call Clean.cmd & popd
 pushd ZCPR && call Clean.cmd & popd
 pushd ZCPR-DJ && call Clean.cmd & popd
 pushd ZSDOS && call Clean.cmd & popd
@@ -21,4 +22,4 @@ pushd Prop && call Clean & popd
 pushd RomDsk && call Clean & popd
 pushd Doc && call Clean & popd
 pushd ZRC && call Clean & popd
-pushd ZZRC && call Clean & popd
+pushd ZZRCC && call Clean & popd

Source/Doc/Applications.md

@@ -52,6 +52,7 @@ found:
 | FAT         | No       | Yes        | Yes      |
 | TUNE        | No       | Yes        | Yes      |
 | WDATE       | No       | Yes        | Yes      |
+| HTALK       | No       | Yes        | Yes      |
 
 `\clearpage`{=latex}
 
@@ -165,6 +166,13 @@ Be aware that this command will allow you to reassign or remove the
 assignment of your system drive letter. This can cause your operating
 system to fail and force you to reboot.
 
+The `ASSIGN` command does **not** prevent you from assigning a drive
+letter to a slice that does not fit on the physical media.  However,
+any subsequent attempt to refer to that drive letter will result in
+an immediate OS error of "no disk".  Refer to "Hard Disk Capacity"
+in the $doc_user$ for a discussion of the exact number of slices that
+will fit on a specific physical disk size.
+
 This command is particularly sensitive to being matched to the
 appropriate version of the RomWBW ROM you are using. Be very careful
 to keep all copies of `ASSIGN.COM` up to date with your ROM.
@@ -621,9 +629,9 @@ shown on your console.  The `TALK` application does this.
 `TALK` operates at the operating system level (not HBIOS).
 
 The parameter to `TALK` refers to logical CP/M serial devices.  Upon
-execution all characters types at the console will be sent to the
+execution all characters typed at the console will be sent to the
 device specified and all characters received by the specified device
-will be echoes on the console.
+will be echoed on the console.
 
 Press Control+Z on the console to terminate the application.
 
@@ -639,6 +647,36 @@ provided in the RomWBW distribution.
 
 `\clearpage`{=latex}
 
+# HTALK
+
+`HTALK` is a variation of the `TALK` utility, but it works directly
+against HBIOS Character Units.
+
+## Syntax
+
+`HTALK COMn:`
+
+## Usage
+
+`HTALK` operates at the HBIOS level.
+
+The parameter to `TALK` refers to a HBIOS character unit.  Upon
+execution all characters typed at the console will be sent to the
+device specified and all characters received by the specified device
+will be echoed on the console.
+
+Press Control+Z on the console to terminate the application.
+
+## Notes
+
+
+## Etymology
+
+The `TALK` command was created and donated to RomWBW by Tom Plano.  It
+is an original product designed specifically for RomWBW.
+
+`\clearpage`{=latex}
+
 # RTC
 
 Many RomWBW systems provide real time clock hardware.  The RTC

Source/Doc/Basic.h

@@ -1,4 +1,4 @@
-$define{doc_ver}{Version 3.3}$
+$define{doc_ver}{Version 3.4}$
 $define{doc_product}{RomWBW}$
 $define{doc_root}{https://github.com/wwarthen/RomWBW/raw/dev/Doc}$
 $ifndef{doc_title}$ $define{doc_title}{Document Title}$ $endif$

Source/Doc/Makefile

@@ -1,7 +1,7 @@
 #
-# NOTE: Pandoc, Latex (MiKTeX or TexLive), and gpp must be installed
+# NOTE: gpp, Pandoc, and Latex (MiKTeX or TexLive) must be installed
 # and available on commandline for this build to work!!!
-# Typically "sudo apt install pandoc, texlive-latex-extra, gpp"
+# Typically "sudo apt install gpp pandoc texlive-latex-extra texlive-luatex texlive-fonts-extra fonts-roboto"
 #
 OBJECTS = ReadMe.gfm ReadMe.txt UserGuide.pdf SystemGuide.pdf Applications.pdf ROM_Applications.pdf Catalog.pdf Errata.pdf
 # DEST = ../../Doc
@@ -16,7 +16,7 @@ all :: deploy
 	gpp -o $@ -U "$$" "$$" "{" "}{" "}$$" "{" "}" "@@@" "" -M "$$" "$$" "{" "}{" "}$$" "{" "}" $<
 
 %.pdf : %.tmp
-	pandoc $< -f markdown -t latex -s -o $@ --default-image-extension=pdf
+	pandoc $< -f markdown -t pdf -s -o $@ --default-image-extension=pdf --pdf-engine=lualatex
 
 %.html : %.tmp
 	pandoc $< -f markdown -t html -s -o $@ --default-image-extension=pdf

Source/Doc/SystemGuide.md

@@ -390,17 +390,20 @@ below enumerates these values.
 | **Device Type** | **ID** | **Description**                          | **Driver** |
 |-----------------|-------:|------------------------------------------|------------|
 | CIODEV_UART     | 0x00   | 16C550 Family Serial Interface           | uart.asm   |
-| CIODEV_ASCI     | 0x10   | Z180 Built-in Serial Ports               | asci.asm   |
-| CIODEV_TERM     | 0x20   | Terminal                                 | ansi.asm   |
-| CIODEV_PRPCON   | 0x30   | PropIO Serial Console Interface          | prp.asm    |
-| CIODEV_PPPCON   | 0x40   | ParPortProp Serial Console Interface     | ppp.asm    |
-| CIODEV_SIO      | 0x50   | Zilog Serial Port Interface              | sio.asm    |
-| CIODEV_ACIA     | 0x60   | MC68B50 Asynchronous Interface           | acia.asm   |
-| CIODEV_PIO      | 0x70   | Zilog Parallel Interface Controller      | pio.asm    |
-| CIODEV_UF       | 0x80   | FT232H-based ECB USB FIFO                | uf.asm     |
-| CIODEV_DUART    | 0x90   | SCC2681 Family Dual UART                 | duart.asm  |
-| CIODEV_Z2U      | 0xA0   | Zilog Z280 Built-in Serial Ports         | z2u.asm    |
-| CIODEV_LPT      | 0xB0   | Parallel I/O Controller                  | lpt.asm    |
+| CIODEV_ASCI     | 0x01   | Z180 Built-in Serial Ports               | asci.asm   |
+| CIODEV_TERM     | 0x02   | Terminal                                 | ansi.asm   |
+| CIODEV_PRPCON   | 0x03   | PropIO Serial Console Interface          | prp.asm    |
+| CIODEV_PPPCON   | 0x04   | ParPortProp Serial Console Interface     | ppp.asm    |
+| CIODEV_SIO      | 0x05   | Zilog Serial Port Interface              | sio.asm    |
+| CIODEV_ACIA     | 0x06   | MC68B50 Asynchronous Interface           | acia.asm   |
+| CIODEV_PIO      | 0x07   | Zilog Parallel Interface Controller      | pio.asm    |
+| CIODEV_UF       | 0x08   | FT232H-based ECB USB FIFO                | uf.asm     |
+| CIODEV_DUART    | 0x09   | SCC2681 Family Dual UART                 | duart.asm  |
+| CIODEV_Z2U      | 0x0A   | Zilog Z280 Built-in Serial Ports         | z2u.asm    |
+| CIODEV_LPT      | 0x0B   | Parallel I/O Controller                  | lpt.asm    |
+| CIODEV_ESPCON   | 0x0B   | ESP32 VGA Console                        | esp.asm    |
+| CIODEV_ESPSER   | 0x0B   | ESP32 Serial Port                        | esp.asm    |
+| CIODEV_SCON     | 0x0B   | S100 Console                             | scon.asm   |
 
 Character devices can usually be configured with line characteristics
 such as speed, framing, etc. A word value (16 bit) is used to describe
@@ -568,15 +571,20 @@ below enumerates there values.
 | **Device Type** | **ID** | **Description**                          | **Driver** |
 |-----------------|-------:|------------------------------------------|------------|
 | DIODEV_MD       | 0x00   | Memory Disk                              | md.asm     |
-| DIODEV_FD       | 0x10   | Floppy Disk                              | fd.asm     |
-| DIODEV_RF       | 0x20   | RAM Floppy                               | rf.asm     |
-| DIODEV_IDE      | 0x30   | IDE Disk                                 | ide.asm    |
-| DIODEV_ATAPI    | 0x40   | ATAPI Disk (not implemented)             |            |
-| DIODEV_PPIDE    | 0x50   | PPIDE Disk                               | ppide.asm  |
-| DIODEV_SD       | 0x60   | SD Card                                  | sd.asm     |
-| DIODEV_PRPSD    | 0x70   | PropIO SD Card                           | prp.asm    |
-| DIODEV_PPPSD    | 0x80   | ParPortProp SD Card                      | ppp.asm    |
-| DIODEV_HDSK     | 0x90   | SIMH HDSK Disk                           | hdsk.asm   |
+| DIODEV_FD       | 0x01   | Floppy Disk                              | fd.asm     |
+| DIODEV_RF       | 0x02   | RAM Floppy                               | rf.asm     |
+| DIODEV_IDE      | 0x03   | IDE Disk                                 | ide.asm    |
+| DIODEV_ATAPI    | 0x04   | ATAPI Disk (not implemented)             |            |
+| DIODEV_PPIDE    | 0x05   | PPIDE Disk                               | ppide.asm  |
+| DIODEV_SD       | 0x06   | SD Card                                  | sd.asm     |
+| DIODEV_PRPSD    | 0x07   | PropIO SD Card                           | prp.asm    |
+| DIODEV_PPPSD    | 0x08   | ParPortProp SD Card                      | ppp.asm    |
+| DIODEV_HDSK     | 0x09   | SIMH HDSK Disk                           | hdsk.asm   |
+| DIODEV_PPA      | 0x0A   | Iomega PPA Disk                          | ppa.asm    |
+| DIODEV_IMM      | 0x0B   | Iomega IMM Disk                          | imm.asm    |
+| DIODEV_SYQ      | 0x0C   | Syquest Sparq Disk                       | syq.asm    |
+| DIODEV_CHUSB    | 0x0D   | CH375/376 USB Disk                       | ch.asm     |
+| DIODEV_CHSD     | 0x0E   | CH375/376 SD Card                        | ch.asm     |
 
 A fixed set of media types are defined. The currently defined media 
 types identifiers are listed below. Each driver will support one or
@@ -878,11 +886,11 @@ unit.  The table below enumerates these values.
 | **Device Type** | **ID** | **Description**                          | **Driver** |
 |-----------------|-------:|------------------------------------------|------------|
 | RTCDEV_DS       | 0x00   | Maxim DS1302 Real-Time Clock w/ NVRAM    | dsrtc.asm  |
-| RTCDEV_BQ       | 0x10   | BQ4845P Real Time Clock                  | bqrtc.asm  |
-| RTCDEV_SIMH     | 0x20   | SIMH Simulator Real-Time Clock           | simrtc.asm |
-| RTCDEV_INT      | 0x30   | Interrupt-based Real Time Clock          | intrtc.asm |
-| RTCDEV_DS7      | 0x40   | Maxim DS1307 PCF I2C RTC w/ NVRAM        | ds7rtc.asm |
-| RTCDEV_RP5      | 0x50   | Ricoh RPC01A Real-Time Clock w/ NVRAM    | rp5rtc.asm |
+| RTCDEV_BQ       | 0x01   | BQ4845P Real Time Clock                  | bqrtc.asm  |
+| RTCDEV_SIMH     | 0x02   | SIMH Simulator Real-Time Clock           | simrtc.asm |
+| RTCDEV_INT      | 0x03   | Interrupt-based Real Time Clock          | intrtc.asm |
+| RTCDEV_DS7      | 0x04   | Maxim DS1307 PCF I2C RTC w/ NVRAM        | ds7rtc.asm |
+| RTCDEV_RP5      | 0x05   | Ricoh RPC01A Real-Time Clock w/ NVRAM    | rp5rtc.asm |
 
 The time functions to get and set the time (RTCGTM and RTCSTM) require a
 6 byte date/time buffer in the following format. Each byte is BCD 
@@ -1009,6 +1017,198 @@ used.
 
 `\clearpage`{=latex}
 
+## Display Keypad (DSKY)
+
+The Display Keypad functions provide read/write access to a segment
+style display and associated hex keypad.
+
+HBIOS only supports a single DSKY device since there is no reason to have
+more than one at a time.  The DSKY unit is assigned a Device Type ID 
+which indicates the specific hardware device driver that handles the 
+unit.  The table below enumerates these values.
+
+| **Device Type** | **ID** | **Description**                          | **Driver** |
+|-----------------|-------:|------------------------------------------|------------|
+| DSKYDEV_ICM     | 0x01   | Original ICM7218 based DSKY              | icm.asm    |
+| DSKYDEV_PKD     | 0x02   | Next Gen Intel P8279 based DSKY          | pkd.asm    |
+
+When segment display function encodes the display data in a byte per
+character format.  Currently, all segment displays are exactly
+8 charadcters and this is assumed in API calls.  The encoding of each
+byte is as shown below:
+
+```
+  +---01---+
+  |        |
+  20      02
+  |        |
+  +---40---+
+  |        |
+  10      04
+  |        |
+  +---08---+  80
+```
+
+The keypad keys are identified by the following key ids.  Not all
+keypads will contain all keys.
+
+| **Key Id** | **Key Definition** | **Key Id** | **Key Definition** |
+|------------|--------------------|------------|--------------------|
+| $00        | Hex Numeric 0      | $10        | Forward            |
+| $01        | Hex Numeric 1      | $11        | Backward           |
+| $02        | Hex Numeric 2      | $12        | Clear              |
+| $03        | Hex Numeric 3      | $13        | Enter              |
+| $04        | Hex Numeric 4      | $14        | Deposit            |
+| $05        | Hex Numeric 5      | $15        | Examine            |
+| $06        | Hex Numeric 6      | $16        | Go                 |
+| $07        | Hex Numeric 7      | $17        | Boot               |
+| $08        | Hex Numeric 8      | $18        | F4                 |
+| $09        | Hex Numeric 9      | $19        | F3                 |
+| $0A        | Hex Numeric A      | $1A        | F2                 |
+| $0B        | Hex Numeric B      | $1B        | F1                 |
+| $0C        | Hex Numeric C      |            |                    |
+| $0D        | Hex Numeric D      |            |                    |
+| $0E        | Hex Numeric E      |            |                    |
+| $0F        | Hex Numeric F      |            |                    |
+
+### Function 0x30 -- DSKY Reset (DSKYRESET)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x30                                | A: Status                              |
+
+This function performs a device dependent reset operation on the DSKY.
+The display will be cleared, keyboard queue will be flushed, and
+chip will be reinitialized.  The returned Status (A) is a standard 
+HBIOS result code.
+
+### Function 0x31 -- DSKY (DSKYSTATUS)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x31                                | A: Status / Characters Pending         |
+
+Return the count of Characters Pending (A) in the input buffer of the 
+DSKY.  If the unit has no input buffer or the 
+buffer utilization is not available, the function may return simply 0 or
+1 where 0 means there is no character available and 1 means there is at
+least one character available.
+
+The value returned in register A is used as both a Status (A) code and 
+the return value. Negative values (bit 7 set) indicate a standard HBIOS 
+result (error) code.  Otherwise, the return value represents the number 
+of characters in the buffer.
+
+### Function 0x32 -- DSKY Get Key (DSKYGETKEY)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x32                                | A: Status                              |
+|                                        | E: Character Value                     |
+
+Read and return a Character (E) from the DSKY.
+If no character(s) are available in the unit's input buffer, this 
+function will wait indefinitely.  The returned Status (A) is a standard 
+HBIOS result code.
+
+The Character Value (E) returned is not ASCII.  It is a keypad key
+id.  The possible id values are listed at the start of this section.
+
+### Function 0x33 -- DSKY Show HEX (RTCSHOWHEX)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x33                                | A: Status                              |
+| DE:HL=Binary Value                     |                                        |
+
+Display the 32-bit binary value (DE:HL) in hex on the DSKY segment
+display.  All decimal points of the display will be off.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x34 -- DSKY Show Segments (DSKYSHOWSEG)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x34                                | A: Status                              |
+| HL: Buffer Address                     |                                        |
+
+Display the segment-encoded values on the segment display.  The encoding
+is defined at the start of this section.  The entire displa is updated
+and it is assumed that an 8 character buffer will be pointed to by HL.
+The buffer must reside in high memory.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x35 -- DSKY Keypad LEDs (DSKYKEYLEDS)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x35                                | A: Status                              |
+| HL: Buffer Address                     |                                        |
+
+Light the LEDs for the keypad keys according to the
+bitmap contained in the buffer pointed to by HL.  The buffer
+must be located in high memory and is assumed to be 8 bytes.
+
+At this time, the bitmap is specific to the PKD hardware.
+This function is ignored by the ICM hardware.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x36 -- DSKY Status LED (DSKYSTATLED)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x36                                | A: Status                              |
+| D: LED Number                          |                                        |
+| E: LED State                           |                                        |
+
+Set or clear the status LED specified in D.  The state of
+the LED is contained in E.  If E=0, the LED will be turned
+off.  If E=1, the LED will be turned on.
+
+This function is specific to the PKD hardware.  It will be ignored
+by the ICM hardware.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x37 -- DSKY Beep (DSKYBEEP)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x37                                | A: Status                              |
+
+Beep the onboard speaker of the DSKY.
+This function is specific to the PKD hardware.  It will be ignored
+by the ICM hardware.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x38 -- DSKY Device (DSKYDEVICE)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x38                                | A: Status                              |
+|                                        | C: Device Attributes                   |
+|                                        | D: Device Type                         |
+|                                        | E: Device Number                       |
+|                                        | H: Device Unit Mode                    |
+|                                        | L: Device I/O Base Address             |
+
+Returns device information for the DSKY unit.  The Status (A) is a 
+standard HBIOS result code.
+
+Device Attribute (C) values are not yet defined.  Device Type (D) 
+indicates the specific hardware driver that handles the specified 
+character unit.  Values are listed at the start of this section. Device 
+Number (E) indicates the physical device number assigned per driver 
+which is always 0 for DSKY.
+
+Device Mode (H) is used to indicate the variant of the chip or circuit 
+that is used by the specified unit.  The Device I/O Base Address (L) 
+indicates the starting port address of the hardware interface that is 
+servicing the specified unit.  Both of these values are considered 
+driver specific.  Refer to the associated hardware driver for the values
+used.
+
+`\clearpage`{=latex}
+
 ## Video Display Adapter (VDA)
 
 The VDA functions are provided as a common interface to Video Display
@@ -1022,10 +1222,11 @@ below enumerates there values.
 | **Device Type** | **ID** | **Description**                          | **Driver** |
 |-----------------|-------:|------------------------------------------|------------|
 | VDADEV_VDU      | 0x00   | MC6845 Family Video Display Controller   | vdu.asm    |
-| VDADEV_CVDU     | 0x10   | MC8563-based Video Display Controller    | cvdu.asm   |
-| VDADEV_GDC      | 0x20   | uPD7220 Video Display Controller         | gdc.asm    |
-| VDADEV_TMS      | 0x30   | TMS9918/38/58 Video Display Controller   | tms.asm    |
-| VDADEV_VGA      | 0x40   | HD6445CP4-based Video Display Controller | vga.asm    |
+| VDADEV_CVDU     | 0x01   | MC8563-based Video Display Controller    | cvdu.asm   |
+| VDADEV_GDC      | 0x02   | uPD7220 Video Display Controller         | gdc.asm    |
+| VDADEV_TMS      | 0x03   | TMS9918/38/58 Video Display Controller   | tms.asm    |
+| VDADEV_VGA      | 0x04   | HD6445CP4-based Video Display Controller | vga.asm    |
+| VDADEV_VRC      | 0x05   | VGARC                                    | vrc.asm    |
 
 Depending on the capabilities of the hardware, the use of colors and
 attributes may or may not be supported. If the hardware does not support
@@ -1437,9 +1638,9 @@ below enumerates these values.
 | **Device Type** | **ID** | **Description**                              | **Driver**  |
 |-----------------|-------:|----------------------------------------------|-------------|
 | SNDDEV_SN76489  | $00    | SN76489 Programmable Sound Generator         | sn76489.asm |
-| SNDDEV_AY38910  | $10    | AY-3-8910/YM2149 Programmable Sound Generator| ay38910.asm |
-| SNDDEV_BITMODE  | $20    | Bit-bang Speaker                             | spk.asm     |
-| SNDDEV_YM2612   | $30    | YM2612 Programmable Sound Generator          | ym2612.asm  |
+| SNDDEV_AY38910  | $01    | AY-3-8910/YM2149 Programmable Sound Generator| ay38910.asm |
+| SNDDEV_BITMODE  | $02    | Bit-bang Speaker                             | spk.asm     |
+| SNDDEV_YM2612   | $03    | YM2612 Programmable Sound Generator          | ym2612.asm  |
 
 The Sound functions defer the actual programming of the sound chip
 until the SNDPLAY function is called.  You will call the volume
@@ -1760,6 +1961,9 @@ The hardware Platform (L) is identified as follows:
 | PLT_RCZ280    |12      | RCBUS W/ Z280                           |
 | PLT_MBC       |13      | NHYODYNE MULTI-BOARD COMPUTER           |
 | PLT_RPH       |14      | RHYOPHYRE GRAPHICS SBC                  |
+| PLT_Z80RETRO  |15      | Z80 RETRO COMPUTER                      |
+| PLT_S100      |16      | S100 COMPUTERS Z180                     |
+| PLT_DUO       |17      | DUODYNE Z80 SYSTEM                      |
 
 ### Function 0xF2 -- System Set Bank (SYSSETBNK)
 

Source/Doc/UserGuide.md

@@ -58,8 +58,9 @@ produced by these developer communities:
 
 General features include:
 
+* Z80 Family CPUs including Z80, Z180, and Z280
 * Banked memory services for several banking designs
-* Disk drivers for RAM, ROM, Floppy, IDE, CF, and SD
+* Disk drivers for RAM, ROM, Floppy, IDE ATA/ATAPI, CF, SD, Zip, Iomega
 * Serial drivers including UART (16550-like), ASCI, ACIA, SIO
 * Video drivers including TMS9918, SY6545, MOS8563, HD6445
 * Keyboard (PS/2) drivers via VT8242 or PPI interfaces
@@ -195,6 +196,7 @@ below, **carefully** pick the appropriate ROM image for your hardware.
 | [Small Computer SC131 Z180 Pocket Computer]^5^                 | -       | SCZ180_sc131.rom   | 115200        |
 | [Small Computer SC140 Z180 CPU Module]^5^                      | Z50     | SCZ180_sc140.rom   | 115200        |
 | [Small Computer SC503 Z180 CPU Module]^5^                      | Z50     | SCZ180_sc503.rom   | 115200        |
+| [Small Computer SC700 Z180 CPU Module]^5^                      | RCBus   | SCZ180_sc700.rom   | 115200        |
 | [Dyno Z180 SBC]^6^                                             | Dyno    | DYNO_std.rom       | 38400         |
 | [Nhyodyne Z80 MBC]^1^                                          | MBC     | MBC_std.rom        | 38400         |
 | [Rhyophyre Z180 SBC]^1^                                        | -       | RPH_std.rom        | 38400         |
@@ -202,6 +204,9 @@ below, **carefully** pick the appropriate ROM image for your hardware.
 | [Z280 ZZRCC CPU Module]^7^                                     | RCBus   | RCZ280_zzrc.rom    | 115200        |
 | [Z280 ZZ80MB SBC]^7^                                           | RCBus   | RCZ280_zz80mb.rom  | 115200        |
 | [Z80-Retro SBC]^8^                                             | -       | Z80RETRO_std.rom   | 38400         |
+| [S100 Computers Z180]^9^                                       | S100    | S100_std.rom       | 38400         |
+| [Duodyne Z80 System]^1^                                        | Duo     | DUO_std.rom        | 38400         |
+| [Heath H8 Z80 System]^10^                                      | H8      | HEATH_std.rom      | 115200        |
 
 | ^1^Designed by Andrew Lynch
 | ^2^Designed by Sergey Kiselev
@@ -211,6 +216,8 @@ below, **carefully** pick the appropriate ROM image for your hardware.
 | ^6^Designed by Steve Garcia
 | ^7^Designed by Bill Shen
 | ^8^Designed by Peter Wilson
+| ^9^Designed by John Monahan
+| ^10^Designed by Les Bird
 
 RCBus refers to Spencer Owen's RC2014 bus specification and derivatives
 including RC26, RC40, RC80, and BP80.
@@ -959,16 +966,24 @@ Drives E: thru L: have been assigned to the IDE0 hard disk device.  The
 4 entries for IDE0 are referring to 4 slices on that disk.  Slices are
 discussed later.
 
-The drive letter assignments **do not** change during an OS session
-unless you use the `ASSIGN` command yourself to do it. Additionally,
-the assignments at boot will stay the same on each boot as long as you
-do not make changes to your hardware configuration. Note that the
-assignments **are** dependent on the media currently inserted in hard
-disk drives. So, notice that if you insert or remove an SD Card or CF
-Card, the drive assignments will change. Since drive letter
-assignments can change, you must be careful when doing destructive
-things like using `CLRDIR` to make sure the drive letter you use is
-referring to the desired media.
+**WARNING**: Drive letter assignments do **not** ensure that the slice
+referenced by the drive letter actually fits on the media you are using.
+For example, a typical 64MB CF Card (which is typically a bit smaller
+than 64MB) will only fit 7 slices.  At startup, you will typically see
+8 drive letters assigned to the CF Card.  Attempting to access the
+last drive letter will result in a "no disk" error from the operating
+system.
+
+The drive letter assignments **do not** change during an OS session 
+unless you use the `ASSIGN` command yourself to do it. Additionally, the
+assignments at boot will stay the same on each boot as long as you do 
+not make changes to your hardware configuration. Note that the 
+assignments **are** dependent on the media currently inserted in hard 
+disk drives when the operating system is started. So, notice that if you
+insert or remove an SD Card or CF Card, the drive assignments will 
+change. Since drive letter assignments can change, you must be careful 
+when doing destructive things like using `CLRDIR` to make sure the drive
+letter you use is referring to the desired media.
 
 When performing a ROM boot of an operating system, note that A: will
 be your RAM disk and B: will be your ROM disk. When performing a disk
@@ -982,7 +997,8 @@ boot drive.
 A typical RomWBW system has 512KB of ROM and 512KB of RAM.  Some
 portions of each are dedicated to loading and running applications
 and operating system.  The space left over is available for an
-operating system to use as a pseudo-disk device.
+operating system to use as a pseudo-disk device (ROM Disk and RAM
+Disk).
 
 The RAM disk provides a small CP/M filesystem that you can use for the
 temporary storage of files. Unless your system has a battery backed
@@ -1011,13 +1027,13 @@ actual operating system and are not "bootable".  However, they are
 accessible to any operating system (whether the operating system is
 loaded from ROM or a different disk device).
 
-Neither RAM not ROM disks require explicit formatting or initialization.
+Neither RAM nor ROM disks require explicit formatting or initialization.
 ROM disks are pre-formatted and RAM disks are formatted automatically
 with an empty directory when first used.
 
 #### Flash ROM Disks
 
-The limitation of ROM disks being read only can be overcome on some
+The limitation of ROM disks being read-only can be overcome on some
 platforms with the appropriate selection of Flash ROM chip and
 system configuration. In this case the flash-file system can be
 enabled which will allow the ROM disk to be read and written to.
@@ -1201,7 +1217,7 @@ available storage devices. The allocation will depend on the number of
 mass storage devices available at boot. For example, if you have
 only one hard disk type media, you will see that 8 drive letters are
 assigned to the first 8 slices of that media. If you have two large
-storage devices, you will see that each device is allocated four drive
+storage devices, you will see that each device is allocated 4 drive
 letters.
 
 Referring to slices within a storage device is done by appending a :
@@ -1216,14 +1232,14 @@ slice of IDE0, you would type "IDE0:3". Here are some examples:
 | `IDE0:`  | First slice of disk in IDE0  |
 | `IDE0:3` | Fourth slice of disk in IDE0 |
 
-So, if you wanted to use drive letter L: to refer to the fourth slice
-of IDE0, you could use the command `ASSIGN L:=IDE0:3`. There are a
-couple of rules to be aware of when assigning drive letters. First,
-you may only refer to a specific device/slice with one drive letter at a time.
-Said another way, you cannot have multiple drive letters referring
-to a the same device/slice at the same time. Second, there must always
-be a drive assigned to A:. Any attempt to violate these rules will
-be blocked by the `ASSIGN` command.
+So, if you wanted to use drive letter L: to refer to the fourth slice of
+IDE0, you could use the command `ASSIGN L:=IDE0:3`. There are a couple 
+of rules to be aware of when assigning drive letters. First, you may 
+only refer to a specific device/slice with one drive letter at a time. 
+Said another way, you cannot have multiple drive letters referring to a 
+the same device/slice at the same time. Second, there must always be a 
+drive assigned to A:. Any attempt to violate these rules will be blocked
+by the `ASSIGN` command.
 
 In case this wasn't already clear, you **cannot** refer directly
 to slices using CP/M.  CP/M only understands drive letters, so
@@ -1252,6 +1268,11 @@ absolutely sure you know what media and slice are assigned to that
 drive letter before using `CLRDIR` because CLRDIR will wipe out any
 pre-existing contents of the slice.
 
+**WARNING**: The `CLRDIR` application does not appear to check for
+disk errors when it runs.  If you attempt to run `CLRDIR` on a drive
+that is mapped to a slice that does not actually fit on the physical
+disk, it may behave erratically.
+
 Here is an example of using `CLRDIR`.  In this example, the `ASSIGN`
 command is used to show the current drive letter assignments.  Then
 the `CLRDIR` command is used to initialize the directory of drive 'G'
@@ -1294,7 +1315,7 @@ is considered the "legacy" disk layout for RomWBW.
 
 RomWBW has subsequently been enhanced to support the concept of
 partitioning.  The partition mechanism is entirely compliant with Master
- Boot Record (MBR) Partition Tables introduced by IBM for the PC.  The
+Boot Record (MBR) Partition Tables introduced by IBM for the PC.  The
 Wikipedia article on the
 [Master Boot Record](https://en.wikipedia.org/wiki/Master_boot_record)
 is excellent if you are not familiar with them.  This is considered the
@@ -1397,6 +1418,40 @@ Directory Entries".  In this case, the value is 1024 which implies that
 this drive is located on a modern (hd1k) disk layout.  If the value
 was 512, it would indicate a legacy (hd512) disk layout.
 
+## Hard Disk Capacity
+
+Although RomWBW can support many CP/M filesystem slices on a single
+hard disk, you are still constrained by the physical capacity of the
+actual hard disk.  RomWBW does not prevent you from assigning slices
+to drive letters even if the location of the slice does not fit on the
+physical disk.  Any attempt to access a drive letter mapped to a slice
+that does not fit will result in an error such as "no disk" from the
+operating system.
+
+The exact number of CP/M filesystem slices that will fit on your 
+specific physical hard disk can be determined as follows:
+
+- For hd512 disk layouts, it is slices * 8,320KB.
+- For hd1k disk layouts, it is 1024KB + (slices * 8192KB).  Since
+  1024KB is exactly 1MB, it is equivalent to say 1MB + (slices * 8MB).
+
+**WARNING**: In this document KB means 1024 bytes and MB means 1048576 
+bytes (frequently expressed as KiB and MiB in modern terminology).
+In general, hard disk capacities use KB to mean 1000 bytes and MB
+to mean 1,000,000 bytes.
+
+As an example, hardware distributors frequently supply a "64MB"
+CF Card with a RomWBW system.  Such a hard disk probably has
+less than 62.5MB of actual space (using the RomWBW definition that
+1MB is 1048576 bytes).  Such a drive will not support 8 slices.  It
+will support 7 slices just fine because 7 * 8,320KB = 58.24MB (hd512)
+or 1024KB + (7 * 8192MB) = 57MB (hd1k).
+
+The cost of high capacity CF and SD Cards has become very reasonable.
+I highly recommend upgrading to 1GB or greater media.  This size will
+support all features of the RomWBW Combo Disk Image with 64 slices
+and a 384MB FAT filesystem (see [Combo Hard Disk Image]).
+
 # Disk Content Preparation
 
 With some understanding of how RomWBW presents disk space to the
@@ -1504,20 +1559,20 @@ command prompt.
 
 ### Hard Disk Images
 
-Keeping in mind that a RomWBW hard disk (including CF /SD Cards)
+Keeping in mind that a RomWBW hard disk (including CF/SD Cards)
 allows you to have multiple slices (CP/M filesystems), there are a
 couple ways to image hard disk media.  The easiest approach is to 
 use the "combo" disk image.  This image is already prepared
 with 6 slices containing 5 ready-to-run OSes and a slice with
-the WordStar application.  Alternatively, you can create your own
+the WordStar application files.  Alternatively, you can create your own
 hard disk image with the specific slice contents you choose.
 
 #### Combo Hard Disk Image
 
 The combo disk image is essentially just a single image that has several
-of the individual filesystem images already concatenated together. The 
-combo disk image contains the following 6 slices in the positions 
-indicated:
+ of the individual filesystem images (slices) already concatenated 
+together. The combo disk image contains the following 6 slices in the 
+positions indicated:
 
 | **Slice** | **Description**                                                  |
 |-----------|------------------------------------------------------------------|
@@ -1531,7 +1586,50 @@ indicated:
 You will notice that there are actually 2 combo disk images in the 
 distribution.  One for an hd512 disk layout (hd512_combo.img) and one 
 for an hd1k disk layout (hd1k_combo.img). Simply use the image file that
-corresponds to your desired hard disk layout.
+corresponds to your desired hard disk layout.  Review the information
+in [Hard Disk Layouts] if you need more information of the disk layout
+options.
+
+Although the combo disk images contain only 6 slices of content, they
+reserve space to store 64 CP/M filesystem slices as well as a
+single 384MB FAT filesystem.  Keep in mind that the slices beyond the
+first 6 are not yet initialized.  You will need to use the `CLRDIR`
+application to initialize them before their first use.  Likewise, the
+pre-allocated FAT partition must still be formatted using `FAT FORMAT`
+in order to actually use it (see [FAT Filesystem Preparation]).
+Alternatively, the FAT partition can be formatted on a modern computer.
+
+The combo disk image layout was designed to fit well on a 1GB hard disk.
+The 64 CP/M slices (approximately 512MB) and 384MB FAT filesystem all 
+fit well within a 1GB hard disk.  This size choice was a bit arbitrary, 
+but based on the idea that a 1GB CF or SD Card is easy and cheap to 
+acquire.  It is fine if your hard disk is smaller than 1GB.  It just 
+means that it will not be possible to use the pre-allocated FAT 
+filesystem partition and any CP/M filesystem slices that don't fit.  You
+will get "no disk" errors if you attempt to access a slice past the 
+end of the physical hard disk.
+
+**WARNING**:Your hard disk may be too small to contain the full 64
+CP/M filesystem slices.  The true number of CP/M filesystem slices that
+will fit on your specific physical hard disk can be calculated as
+described in [Hard Disk Capacity].
+
+For RomWBW systems with a single hard disk (typical), you will notice 
+that the OS will pre-allocate 8 drive letters to the hard disk.  If the 
+combo disk image is being used, only the first 6 drive letters 
+(typically C: - H:) will have any content because the combo disk image 
+only provides 6 slices. The subsequent drives (typically I: - J:) will 
+have no content and will not be pre-initialized.  If you want to use any
+slices beyond the first 6 on the hard disk, then you must initialize 
+them using `CLRDIR` first.
+
+A great way to maintain your own data on a hard disk is to put this
+data in slices beyond the first 6.  By doing so, you can always
+"reimage" your drive with the combo image without overlaying the data
+stored in the slices beyond the first 6.  Just be very careful to use
+the same combo image layout (hd512 or hd1k) as you used originally.
+Also remember to calculate the maximum number of slices your hard disk
+will support and do not exceed this number.
 
 #### Custom Hard Disk Image
 
@@ -2140,10 +2238,36 @@ regarding the RomWBW adaptation and customizations.
 
 #### Boot Disk
 
-There is no RomWBW-specific boot disk creation procedure.  QP/M
-comes with a QINSTALL which is used to install QPM over an existing
-CP/M 2 installation or to update an existing QPM disk.  `QINSTALL.COM`
-is included with the RomWBW distribution.
+
+To create or update a bootable QP/M Z-System disk, a special process
+is required.  QP/M is not provided in source format.  You are expected
+to install QP/M over an existing CP/M installation using the
+`QINSTALL.COM` application.
+
+To update an existing QP/M boot disk with the latest RomWBW CBIOS, you
+must use 2 steps: apply the generic CP/M system track, then reinstall
+the QP/M components.  To do this, you can perform the following steps:
+
+1. Boot to the existing QP/M disk.  At this point, drive A should be
+   the QP/M disk that you wish to update.  You may receive a warning
+   about CBIOS/HBIOS version mismatch.
+
+1. Use RomWBW `SYSCOPY` to place the stock RomWBW CP/M OS image
+   onto the system tracks of the QP/M boot disk:
+   
+   `SYSCOPY A:=x:CPM.SYS`
+   
+   where x is the drive letter of your ROM Disk.
+
+1. Run `QINSTALL` to overlay the QP/M OS components on your
+   QP/M boot disk.
+
+**WARNING**: `QINSTALL` has no mechanism for retaining previous
+non-default settings.  Any previous non-default settings you
+previously made with `QINSTALL` will need to be reapplied.  The
+pre-built RomWBW QP/M disk image includes a couple of specific
+non-default settings to optimize use with RomWBW.  Please review the
+notes in the ReadMe.txt file in Source/Images/d_qpm.
 
 #### Notes
 
@@ -2151,6 +2275,9 @@ is included with the RomWBW distribution.
   on the QPM binary distribution and has been minimally customized
   for RomWBW.
 
+- When booted, the QPM startup banner will indicate CP/M 2.2.  This
+  is because QPM uses the CP/M 2.2 CBIOS code.
+
 - QINSTALL is used to customize QPM.  It is included on the
   disk image.  You should review the notes in the ReadMe.txt
   file in Source/Images/d_qpm before making changes.
@@ -2236,6 +2363,53 @@ You can also contact Phillip for detailed information on the Z180
 implementation of FreeRTOS for RomWBW.
 [feilipu](https://github.com/feilipu)
 
+## Fuzix
+
+Fuzix is a Unix-ish operating system for small systems.  It is the work 
+of Alan Cox and is hosted on GitHub at
+<https://github.com/EtchedPixels/FUZIX>. Fuzix itself is a stand-alone 
+operating system, but it frequently utilizes RomWBW to boot and launch 
+on RomWBW-supported platforms.
+
+For those Fuzix platforms that leverage RomWBW for startup, you will
+program your ROM with the normal RomWBW ROM -- there
+is no Fuzix-specific ROM.  A Fuzix disk image for your system is then
+written to your disk media.  After booting your system via the normal
+RomWBW ROM, you start Fuzix simply by choosing the disk device
+containing the Fuzix image at the RomWBW Loader prompt.
+
+To create a Fuzix disk image:
+
+* Locate and download the Fuzix disk image for your system from
+  <https://www.fuzix.org/>.
+
+* Remove the 1KB header from the image file.  The Fuzix disk images
+  are built to run under an emulator that requires a 1KB prefix.  You
+  must remove this prefix before writing the image to your physical
+  disk media.  Unix dd is the easiest way to do this:
+  
+  `dd bs=1024 skip=1 if=sc126-0.3.ide of=sc126-0.3.trimmed`
+
+* Write the trimmed image to your disk media.  This can also be
+  done with dd or with Win32DiskImager under Windows.
+
+To boot into Fuzix:
+
+* Power-up or reset your system.  RomWBW should load normally
+  and bring you to the RomWBW Boot Loader prompt.
+
+* Change your baud rate to 38,400.  This can be done from the
+  RomWBW Boot Loader prompt with the following command:
+
+  `I 0 38400`
+
+  You will also need to change your terminal baud rate at this time.
+
+* At the `bootdev:` prompt, enter `hda1`.  Fuzix should load and
+  you will be prompted for a date/time.
+
+* At the `login:` prompt, enter `root`.  No password is required.
+
 # Custom Applications
 
 The operation of the RomWBW hosted operating systems is enhanced through
@@ -2305,26 +2479,35 @@ This application understands both FAT filesystems as well as CP/M filesystems.
 * Long filenames are not supported.  Files with long filenames will
   show up with their names truncated into the older 8.3 convention.
 * A FAT filesystem can be located on floppy or hard disk media.  For
-  hard disk media, the FAT filesystem must be located within a valid
-  FAT partition.
+  hard disk media, a valid FAT Filesystem partition must exist.
+* Note that CP/M (and compatible) OSes do not support all of the
+  filename characters that a modern computer does.  The following
+  characters are **not permitted** in a CP/M filename:
+
+  `< > . , ; : = ? * [ ] _ % | ( ) / \`
   
+  The FAT application does not auto-rename files when it encounters
+  invalid filenames.  It will just issue an error and quit.
+  Additionally, the error message is not very clear about the problem.
+
 ## FAT Filesystem Preparation
 
 In general, you can create media formatted with a FAT filesystem on
 your RomWBW computer or on your modern computer.  We will only be
 discussing the RomWBW-based approach here.
 
-In the case of a floppy disk, you can use the `FAT` application to
-format the floppy disk.  For example, if your floppy disk is on RomWBW
-disk unit 2, you could use `FAT FORMAT 2:`.  This will overwrite the
-floppy with a FAT filesystem and all previous contents will be lost.
-Once formatted this way, the floppy disk can be used in a floppy drive
-attached to a modern computer or it can be used on RomWBW using the
+In the case of a floppy disk, you can use the `FAT` application to 
+format the floppy disk.  The floppy disk must already be physically 
+formatted using RomWBW FDU or equivalent.  If your floppy disk is on 
+RomWBW disk unit 2, you could use `FAT FORMAT 2:`.  This will overwrite 
+the floppy with a FAT filesystem and all previous contents will be lost.
+Once formatted this way, the floppy disk can be used in a floppy drive 
+attached to a modern computer or it can be used on RomWBW using the 
 other `FAT` tool commands.
 
 In the case of hard disk media, it is necessary to have a FAT
 partition.  If you prepared your RomWBW hard disk media using the
-disk image process, then this partition will already be present and
+disk image process, then this partition will already be defined and
 you do not need to recreate it.  This default FAT partition is located
 at approximately 512MB from the start of your disk and it is 384MB in
 size.  So, your hard disk media must be 1GB or greater to use this
@@ -2372,8 +2555,13 @@ If your RomWBW system has multiple disk drives/slots, you can also just
 create a disk with your modern computer that is a dedicated FAT 
 filesystem disk.  You can use your modern computer to format the disk 
 (floppy, CF Card, SD Card, etc.), then insert the disk in your RomWBW 
-computer and access if using `FAT` based on its RomWBW unit number.
+computer and access it using `FAT` based on its RomWBW unit number.
 
+**WARNING**: Microsoft Windows will sometimes suggest reformatting
+partitions that it does not recognize.  If you are prompted to format
+a partition of your SD/CF Card when inserting the card into a Windows
+computer, you probably want to select Cancel.
+  
 ## FAT Application Usage
 
 Complete instructions for the `FAT` application are found in $doc_apps$.
@@ -3774,6 +3962,31 @@ the RomWBW HBIOS configuration.
 
 `\clearpage`{=latex}
 
+### Small Computer SC700 Z180 CPU Module
+
+|                   |                  |
+|-------------------|------------------|
+| ROM Image Files   | SCZ180_sc700.rom |
+| Console Baud Rate | 115200           |
+| Interrupts        | Mode 2           |
+
+ - CPU speed is detected at startup if DS1302 RTC is active
+   - Otherwise 18.432 MHz assumed
+ - System timer is generated by Z180 CPU
+ - Hardware auto-detected:
+   - DS1302 RTC
+   - Z180 ASCI Serial Ports
+   - SIO Serial Interface Module
+   - EP Dual UART Serial Interface Module
+   - WDC Floppy Disk Controller w/ 3.5" HD Drives
+   - IDE Hard Disk Interface Module
+   - PPIDE Hard Disk Interface Module
+   - Onboard SD Card Interface
+ - Use of Interrupt Mode 2 requires proper IEI/IEO configuration
+   for all peripherals generating interrupts
+
+`\clearpage`{=latex}
+
 ### Dyno Z180 SBC
 
 |                   |                |
@@ -3846,7 +4059,7 @@ the RomWBW HBIOS configuration.
 |-------------------|--------------------|
 | ROM Image Files   | RCZ80_zrc.rom      |
 | Console Baud Rate | 115200             |
-| Interrupts        | Mode 1        |
+| Interrupts        | Mode 1             |
 
  - CPU speed is detected at startup if DS1302 RTC is active
    - Otherwise 14.7456 MHz assumed
@@ -3927,6 +4140,64 @@ the RomWBW HBIOS configuration.
 
 `\clearpage`{=latex}
 
+### S100 Computers Z180
+
+|                   |               |
+|-------------------|---------------|
+| ROM Image File    | S100_std.rom  |
+| Console Baud Rate | 38400         |
+| Interrupts        | Mode 2        |
+
+ - CPU speed assumed to be 18.432 MHz
+ - System timer is generated by Z180 CPU
+ - Hardware auto-detected:
+   - Interrupt-driven RTC
+   - Z180 ASCI Serial Ports
+   - Onboard SD Card Interface
+
+`\clearpage`{=latex}
+
+### Duodyne Z80 System
+
+|                   |               |
+|-------------------|---------------|
+| ROM Image File    | DUO_std.rom   |
+| Console Baud Rate | 38400         |
+| Interrupts        | Mode 2        |
+
+ - CPU speed is detected at startup if DS1302 RTC is active
+   - Otherwise 8.000 MHz assumed
+ - System timer is generated by CTC if available
+ - Hardware auto-detected:
+   - DS1302 RTC
+   - Zilog DMA Module
+   - UART Serial Adapter
+
+`\clearpage`{=latex}
+
+### Heath H8 Z80 System
+
+|                   |               |
+|-------------------|---------------|
+| ROM Image File    | HEATH_std.rom |
+| Console Baud Rate | 115200        |
+| Interrupts        | Mode 1        |
+
+ - CPU speed is detected at startup if DS1302 RTC is active
+   - Otherwise 7.3728 MHz assumed
+ - Hardware auto-detected:
+   - DS1302 RTC
+   - ACIA Serial Interface Module
+   - SIO Serial Interface Module
+   - EP Dual UART Serial Interface Module
+   - WDC Floppy Disk Controller w/ 3.5" HD Drives
+   - IDE Hard Disk Interface Module
+   - PPIDE Hard Disk Interface Module
+ - Serial baud rate is usually determined by hardware for ACIA and
+   SIO interfaces
+
+`\clearpage`{=latex}
+
 ## Appendix B - Device Summary
 
 The table below briefly describes each of the possible devices that
@@ -3943,14 +4214,14 @@ may be discovered by RomWBW in your system.
 | DMA       | System   | Zilog DMA Controller                                   |
 | DS1307    | RTC      | Maxim DS1307 PCF I2C Real-Time Clock w/ NVRAM          |
 | DS1501RTC | RTC      | Maxim DS1501/DS1511 Watchdog Real-Time Clock           |
-| DSKY      | System   | Keypad & Display                                       |
 | DSRTC     | RTC      | Maxim DS1302 Real-Time Clock w/ NVRAM                  |
 | DUART     | Char     | SCC2681 or compatible Dual UART                        |
 | EMM       | Disk     | Disk drive on Parallel Port emm interface (Zip Drive)  |
 | FD        | Disk     | 8272 or compatible Floppy Disk Controller              |
 | GDC       | Video    | uPD7220 Video Display Controller                       |
 | HDSK      | Disk     | SIMH Simulator Hard Disk                               |
-| IDE       | Disk     | IDE/ATA Hard Disk Interface                            |
+| IDE       | Disk     | IDE/ATA/ATAPI Hard Disk Interface                      |
+| ICM       | DsKy     | ICM7218-based Display/Keypad on PPI                    |
 | IMM       | Disk     | IMM Zip Drive on PPI                                   |
 | INTRTC    | RTC      | Interrupt-based Real Time Clock                        |
 | KBD       | Kbd      | 8242 PS/2 Keyboard Controller                          |
@@ -3960,7 +4231,8 @@ may be discovered by RomWBW in your system.
 | MSXKYB    | Kbd      | MSX Compliant Matrix Keyboard                          |
 | I2C       | System   | I2C Interface                                          |
 | PIO       | Char     | Zilog Parallel Interface Controller                    |
-| PPIDE     | Disk     | 8255 IDE/ATA Hard Disk Interface                       |
+| PKD       | DsKy     | P8279-based Display/Keypad on PPI                      |
+| PPIDE     | Disk     | 8255 IDE/ATA/ATAPI Hard Disk Interface                 |
 | PPA       | Disk     | PPA Zip Drive on PPI                                   |
 | PPK       | Kbd      | Matrix Keyboard                                        |
 | PPPSD     | Disk     | ParPortProp SD Card Interface                          |

Source/HBIOS/API.txt

@@ -484,3 +484,93 @@ TERM_ATTACH: (C=VIDEO UNIT, DE=<VDA>_DISPATCH)
   - QUERY ATTACHED VDA FOR SCREEN SIZE (VIA <EMU>_VDADISP)
   - INITIALIZE ALL WORKING VARIABLES AND EMULATOR STATE
   - RETURN (A=STATUS)
+
+
+==============
+DSKY Functions
+==============
+
+RESET ($30):
+  B=Function				A=Result
+
+STAT ($31):
+  B=Function				A=Result / Bytes Pending
+
+  A=Number of characters waiting or error code if negative
+
+GETKEY ($32):
+  B=Function				A=Result
+					E=Key Code
+
+  A=DSKY key value or error code if negative
+
+SHOWHEX ($33):
+  B=Function				A=Result
+  DE:HL=Value (32-bit)
+
+  Display value of DE:HL in hex on display.  It is not
+  possible to show decimal points.
+
+SHOWSEG ($34):
+  B=Function				A=Result
+  HL=Buffer (raw segment encoded)
+  
+  Display raw segment values.  Each byte represents one
+  character.  Each segment of the character is represented
+  by a bit.  The buffer must be located in high memory.
+  The segments are encoded as shown below:
+  
+  +--01--+
+  20    02
+  +--40--+
+  10    04
+  +--08--+  80
+  
+KEYLEDS ($35):
+  B=Function				A=Result
+  HL=Buffer (LED bitmap)
+  
+  Light the LEDs for the keypad keys according to the
+  bitmap contained in the buffer pointed to by HL.  The buffer
+  must be located in high memory.
+  
+  At this time, the bitmap is specific to the DSKYNG hardware.
+  This function is ignored by the original DSKY.
+
+STATLED ($36):
+  B=Function				A=Result
+  D=LED Number
+  E=LED State (0/1)
+  
+  Set or clear the status LED specified in D.  The state of
+  the LED is contained in E.  If E=0, the LED will be turned
+  off.  If E=1, the LED will be turned on.
+
+BEEP ($37):
+  B=Function				A=Result
+
+  Beep the onboard speaker of the DSKY.  Only the DSKYNG hardware
+  has a speaker.  This function will be ignored by the original
+  DSKY.
+
+DEVICE ($38):
+  B=Function				A=Result
+					D=Device Type
+					E=Device Number
+					C=Device Attributes
+					H=Device Mode
+					L=Base I/O Adr
+
+  Returns device information for the DSKY unit. The Status (A) is a 
+  standard HBIOS result code. Device Attribute (C) values are not yet 
+  defined. Device Type (D) indicates the specific hardware driver that 
+  handles the specified character unit. Values are listed at the start
+  of this section. Device Number (E) indicates the physical device
+  number assigned per driver which is always 0 for DSKY.
+
+  Device Mode (H) is used to indicate the variant of the chip or circuit 
+  that is used by the specified unit. The Device I/O Base Address (L) 
+  indicates the starting port address of the hardware interface that is 
+  servicing the specified unit. Both of these values are considered 
+  driver specific. Refer to the associated hardware driver for the
+  values used.

Source/HBIOS/Bank Layout.txt

@@ -0,0 +1,85 @@
+ROM Bank Layout
+
+Bank ID		Module		Start	Size
+------		------		------	------
+0x00		hbios		0x0000	0x8000
+		<end>		0x8000
+
+0x01		loader		0x0000	0x1000
+		dbgmon		0x1000	0x2000
+		cpm22		0x2000	0x3000
+		zsys		0x5000	0x3000
+		<end>		0x8000
+
+0x02		forth		0x0000	0x1700
+		basic		0x1700	0x2000
+		tbasic		0x3700	0x0900
+		game		0x4000	0x0900
+		egg		0x4900	0x0200
+		netboot         0x4B00	0x1000
+		updater         0x5B00	0x0D00
+		usrrom		0x6800	0x1800
+		<end>		0x8000
+
+0x03		imgpad2		0x0000	0x8000
+		<end>		0x8000
+
+0x04 - N	ROM Disk Data
+
+
+Typical ROM Bank Layout
+
+Bank ID         Usage
+-------         ------
+0x00            Boot Bank (HBIOS image)
+0x01		ROM Loader, Monitor, ROM OSes
+0x02		ROM Applications
+0x03		Reserved
+0x04-0x0F	ROM Disk Banks
+
+
+Typical RAM Bank Layout
+
+Bank ID         Usage
+-------         ------
+0x80            RomWBW HBIOS
+0x81-0x8B       RAM Disk Data
+0x8C		CP/M 3 Buffers
+0x8D            CP/M 3 OS
+0x8E            User TPA
+0x8F            Common
+
+
+Typical ROMless Bank Layout
+
+Bank ID         Usage
+-------         ------
+0x80            RomWBW HBIOS
+0x81		Loader, DbgMon, CP/M 2.2, ZSDOS
+0x82		ROM Apps
+0x83		More ROM Apps
+0x84-0x8B       RAM Disk Data
+0x8C		CP/M 3 Buffers
+0x8D            CP/M 3 OS
+0x8E            User TPA
+0x8F            Common
+
+
+ROMless Tiny Bank Layout (128K)
+NOTE: no ROM Apps, no CP/M 3 support, no RAM disk
+
+Bank ID         Usage
+-------         ------
+0x80            RomWBW HBIOS
+0x81		Loader, DbgMon, CP/M 2.2, ZSDOS
+0x82            User TPA
+0x83            Common
+
+Disk Image Sizes
+
+Image Size	ROM System	ROMless System
+----------	----------	--------------
+1024K		896K		768K
+512		384K		256K
+256		128K		0K
+128 (tiny)	n/a		0K

Source/HBIOS/Build.cmd

@@ -93,7 +93,14 @@ call :asm imgpad2 || exit /b
 
 copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin + ..\cpm22\cpm_wbw.bin osimg.bin || exit /b
 copy /b ..\Forth\camel80.bin + nascom.bin + ..\tastybasic\src\tastybasic.bin + game.bin + eastaegg.bin + netboot.mod + updater.bin + usrrom.bin osimg1.bin || exit /b
-copy /b imgpad2.bin osimg2.bin || exit /b
+
+if %Platform%==S100 (
+    zxcc slr180 -s100mon/fh
+    zxcc mload25 -s100mon || exit /b
+    copy /b s100mon.com osimg2.bin || exit /b
+) else (
+    copy /b imgpad2.bin osimg2.bin || exit /b
+)
 
 copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin osimg_small.bin || exit /b
 
@@ -103,10 +110,8 @@ copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin osimg_small.bin || exit
 :: should yield a result of zero.
 ::
 
-if %ROMSize% gtr 0 (
-    for %%f in (hbios_rom.bin osimg.bin osimg1.bin osimg2.bin) do (
-      "%TOOLS%\srecord\srec_cat.exe" %%f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o %%f -Binary || exit /b
-    )
+for %%f in (hbios_rom.bin osimg.bin osimg1.bin osimg2.bin) do (
+  "%TOOLS%\srecord\srec_cat.exe" %%f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o %%f -Binary || exit /b
 )
 
 ::
@@ -130,8 +135,8 @@ if %ROMSize% gtr 0 (
     copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin %ROMName%.upd || exit /b
     copy /b hbios_app.bin + osimg_small.bin %ROMName%.com || exit /b
 ) else (
-    copy /b hbios_rom.bin + osimg_small.bin %ROMName%.rom || exit /b
-    copy /b hbios_rom.bin + osimg_small.bin %ROMName%.upd || exit /b
+    copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin  + ..\RomDsk\ram%ROMSize%_wbw.dat %ROMName%.rom || exit /b
+    copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin %ROMName%.upd || exit /b
     copy /b hbios_app.bin + osimg_small.bin %ROMName%.com || exit /b
 )
 
@@ -214,15 +219,20 @@ call Build RCZ180 nat || exit /b
 call Build RCZ280 ext || exit /b
 call Build RCZ280 nat || exit /b
 call Build RCZ280 zz80mb || exit /b
-call Build RCZ280 zzrc || exit /b
+call Build RCZ280 zzrcc || exit /b
+call Build RCZ280 zzrcc_ram || exit /b
 call Build SCZ180 sc126 || exit /b
 call Build SCZ180 sc130 || exit /b
 call Build SCZ180 sc131 || exit /b
 call Build SCZ180 sc140 || exit /b
 call Build SCZ180 sc503 || exit /b
+call Build SCZ180 sc700 || exit /b
 call Build DYNO std || exit /b
 call Build UNA std || exit /b
 call Build RPH std || exit /b
 call Build Z80RETRO std || exit /b
+call Build S100 std || exit /b
+call Build DUO std || exit /b
+call Build HEATH std || exit /b
 
 goto :eof

Source/HBIOS/Build.ps1

@@ -27,8 +27,8 @@ $ErrorAction = 'Stop'
 # UNA BIOS is simply imbedded, it is not built here.
 #
 
-$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "Z80RETRO", "UNA"
-$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH"
+$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "Z80RETRO", "DUO", "UNA", "HEATH"
+$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH", "S100"
 $PlatformListZ280 = "RCZ280"
 
 #

Source/HBIOS/Build.sh

@@ -18,7 +18,8 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	ROM_PLATFORM="RCZ280"; ROM_CONFIG="ext"; bash Build.sh
 	ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat"; bash Build.sh
 	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zz80mb"; bash Build.sh
-	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrc"; bash Build.sh
+	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrcc"; bash Build.sh
+	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrcc_ram"; bash Build.sh
 #	ROM_PLATFORM="RCZ80"; ROM_CONFIG="mt"; bash Build.sh
 #	ROM_PLATFORM="RCZ80"; ROM_CONFIG="duart"; bash Build.sh
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="std"; bash Build.sh
@@ -32,15 +33,19 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	ROM_PLATFORM="SBC"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="SBC"; ROM_CONFIG="simh"; bash Build.sh
 	ROM_PLATFORM="MBC"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="DUO"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc126"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc130"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc131"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc140"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc503"; bash Build.sh
+	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc700"; bash Build.sh
+	ROM_PLATFORM="S100"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="UNA"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="Z80RETRO"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="ZETA"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="ZETA2"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="HEATH"; ROM_CONFIG="std"; bash Build.sh
 	exit
 fi
 

Source/HBIOS/Clean.cmd

@@ -11,6 +11,7 @@ if exist *.exp del *.exp
 if exist *.tmp del *.tmp
 if exist *.mrk del *.mrk
 if exist *.sys del *.sys
+if exist *.hex del *.hex
 if exist build.inc del build.inc
 if exist font*.asm del font*.asm
 if exist build_env.cmd del build_env.cmd

Source/HBIOS/Config/DUO_std.asm

@@ -0,0 +1,47 @@
+;
+;==================================================================================================
+;   DUODYNE STANDARD CONFIGURATION
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_duo.asm"
+;
+CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+;
+;;;DMAENABLE	.SET	TRUE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+;
+BATCOND		.SET	TRUE		; ENABLE LOW BATTERY WARNING MESSAGE
+;
+ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+;
+PCFENABLE	.SET	TRUE		; ENABLE PCF8584 I2C CONTROLLER
+;
+MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+;
+ESPENABLE	.SET	TRUE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)

Source/HBIOS/Config/DYNO_std.asm

@@ -34,8 +34,6 @@ Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
 Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 ;
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
-;ASCI0CFG	.SET	SER_115200_8N1	; ASCI 0: SERIAL LINE CONFIG
-;ASCI1CFG	.SET	SER_115200_8N1	; ASCI 1: SERIAL LINE CONFIG
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
 ;

Source/HBIOS/Config/HEATH_std.asm

@@ -0,0 +1,69 @@
+;
+;==================================================================================================
+;   HEATH H8 Z80 STANDARD CONFIGURATION
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_rcz80.asm"
+;
+CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+DSKYENABLE	.SET	TRUE		; ENABLES DSKY FUNCTIONALITY
+H8PENABLE	.SET	TRUE		; ENABLES HEATH H8 FRONT PANEL
+;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+;
+LPTENABLE	.SET	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+;
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
+FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_PIO	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|USR]
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+IMMENABLE	.SET	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/MBC_std.asm

@@ -42,11 +42,13 @@ RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ;
 MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
-DSKYENABLE	.SET	FALSE		; ENABLES DSKY
-DSKYMODE	.SET	DSKYMODE_NG	; DSKY VERSION: DSKYMODE_[V1|NG]
+DSKYENABLE	.SET	TRUE		; ENABLES DSKY FUNCTIONALITY
+ICMENABLE	.SET	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+PKDENABLE	.SET	TRUE		; ENABLES DSKY NG PKD DRIVER (8259)
 ;
 UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
-;UARTCFG	.SET	UARTCFG | SER_RTS
+;
+ESPENABLE	.SET	TRUE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
 ;
 LPTENABLE	.SET	TRUE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;

Source/HBIOS/Config/MK4_std.asm

@@ -47,7 +47,7 @@ VGAENABLE	.SET	TRUE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_DIDE	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_DIDE	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/RCZ180_ext.asm

@@ -58,7 +58,7 @@ AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LI
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/RCZ180_nat.asm

@@ -57,7 +57,7 @@ AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LI
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/RCZ280_ext.asm

@@ -56,7 +56,7 @@ AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/RCZ280_nat.asm

@@ -56,7 +56,7 @@ AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/RCZ280_zz80mb.asm

@@ -28,7 +28,7 @@
 ;
 #include "cfg_rcz280.asm"
 ;
-CPUOSC		.SET	12000000	; CPU OSC FREQ IN MHZ
+CPUOSC		.SET	24000000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	3		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
@@ -37,8 +37,7 @@ FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 ;
 MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 ;
-RAMLOC		.SET	23		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.SET	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.SET	8192		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 ;
 Z280_MEMLOWAIT	.SET	0		; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
 Z280_MEMHIWAIT	.SET	0		; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)
@@ -62,7 +61,7 @@ AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/RCZ280_zzrcc.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   RCBUS Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZRC)
+;   RCBUS Z280 ZZRCC CONFIGURATION
 ;==================================================================================================
 ;
 ; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
@@ -22,7 +22,7 @@
 ; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
 ; DIRECTORIES ABOVE THIS ONE).
 ;
-#DEFINE PLATFORM_NAME "ZZRC", " [", CONFIG, "]"
+#DEFINE PLATFORM_NAME "ZZRCC", " [", CONFIG, "]"
 ;
 #DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
 ;
@@ -39,10 +39,7 @@ MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 ;
 RAMSIZE		.SET	256		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	256		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.SET	256		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
-;
-RAMLOC		.SET	18		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.SET	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.SET	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 ;
 Z280_MEMLOWAIT	.SET	0		; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
 Z280_MEMHIWAIT	.SET	0		; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)
@@ -50,7 +47,7 @@ Z280_IOWAIT	.SET	1		; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
 ;
 MDROM		.SET	TRUE		; MD: ENABLE ROM DISK
-MDRAM		.SET	FALSE		; MD: ENABLE RAM DISK
+MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
 ;
 Z2UENABLE	.SET	TRUE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 Z2UOSC		.SET	(CPUOSC / 8)	; Z2U: OSC FREQUENCY IN MHZ
@@ -70,7 +67,7 @@ AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/RCZ280_zzrcc_ram.asm

@@ -0,0 +1,77 @@
+;
+;==================================================================================================
+;   RCBUS Z280 ZZRCC CONFIGURATION (ROMLESS)
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE PLATFORM_NAME "ZZRCC", " [", CONFIG, "]"
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_rcz280.asm"
+;
+CPUOSC		.SET	14745600	; CPU OSC FREQ IN MHZ
+INTMODE		.SET	3		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
+MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
+;
+RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAMBIAS		.SET	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+;
+Z280_MEMLOWAIT	.SET	0		; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
+Z280_MEMHIWAIT	.SET	0		; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)
+Z280_IOWAIT	.SET	1		; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
+;
+MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
+MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
+;
+Z2UENABLE	.SET	TRUE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+Z2UOSC		.SET	(CPUOSC / 8)	; Z2U: OSC FREQUENCY IN MHZ
+Z2U0HFC		.SET	TRUE		; Z2U0: ENABLE HARDWARE FLOW CONTROL
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
+FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_easy.asm

@@ -41,6 +41,7 @@ WDOGIO		.SET	$6F		; WATCHDOG REGISTER ADR
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
 CTCENABLE	.SET	TRUE		; ENABLE ZILOG CTC SUPPORT
 CTCTIMER	.SET	TRUE		; ENABLE CTC PERIODIC TIMER
@@ -69,7 +70,7 @@ AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/RCZ80_jbl.asm

@@ -0,0 +1,79 @@
+;
+;==================================================================================================
+;   RCBUS Z80 COLECOVISION-COMPATIBLE CONFIGURATION FOR J.B. LANGSTON'S GAME BOARDS
+;==================================================================================================
+;
+; THIS CONFIGURATION ENABLES DRIVERS FOR THE TMS9918 AND SN76489 BOARDS BY J.B. LANGSTON
+; AND THE YM2149 BOARD BY ED BRINDLEY. THE TMS9918 IS CONFIGURED TO USE THE COLECOVISION
+; PORTS AND HAS INTERRUPTS DISABLED BECAUSE COLECOVISION USES NMI, WHICH WOULD BREAK CP/M
+; WHEN ENABLED. IT IS CONFIGURED FOR A 3.686MHZ CPU CLOCK IN ORDER TO BE COMPATIBLE WITH
+; COLECOVISION GAMES. THE FIRST SIO PORT IS CONFIGURED TO RUN AT 115200 BPS WITH THE CPU
+; RUNNING AT THIS SPEED. THE SECOND SIO PORT IS CONFIGURED TO RUN AT 115200 BPS WITH THE
+; SECOND CLOCK SET TO 7.373MHZ. LOWER BAUD RATES CAN BE ACHIEVED ON THE SECOND PORT BY
+; MOVING THE SECONDARY CLOCK DIVIDER JUMPER (E.G., 38400 @ 2.458MHZ). THE BAUD RATE DOES
+; NOT NEED TO BE CHANGED IN THIS CONFIGURATION FILE IN ORDER TO DO THIS, BUT THE DEVICE
+; LIST WILL INCORRECTLY SHOW THE PORT RUNNING AT 115200 REGARDLESS OF THE CLOCK DIVIDER.
+; UNCOMMENT THE LINE THAT SETS BOOTCON TO 1 TO BOOT ON THE SECOND SIO PORT BY DEFAULT.
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	BOOT_DEFAULT	"Z"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_rcz80.asm"
+;
+CPUOSC		.SET	3686400		; CPU OSC FREQ IN MHZ
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;BOOTCON         .SET    1               ; BOOT CONSOLE DEVICE
+;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+;
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
+SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
+SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIO0MODE	.SET	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.SET	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACFG	.SET	SER_115200_8N1	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACTCC	.SET	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.SET	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCFG	.SET	SER_115200_8N1	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCTCC	.SET	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+TMSMODE		.SET	TMSMODE_COLECO	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VDAEMU_SERKBD	.SET	1		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+AY38910ENABLE	.SET	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+SN76489ENABLE	.SET	TRUE		; SN: ENABLE SN76489 SOUND DRIVER
+;
+FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_kio.asm

@@ -66,7 +66,7 @@ AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/RCZ80_skz.asm

@@ -61,7 +61,7 @@ AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/RCZ80_std.asm

@@ -54,7 +54,7 @@ AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/RCZ80_tiny.asm

@@ -75,7 +75,7 @@ AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 IDE0BASE	.SET	$90		; IDE 0: IO BASE ADDRESS

Source/HBIOS/Config/RCZ80_zrc.asm

@@ -53,7 +53,7 @@ AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/RCZ80_zrc_ram.asm

@@ -34,7 +34,7 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 ;
-RAMSIZE		.SET	2048		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 MEMMGR		.SET	MM_ZRC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
 ;
@@ -57,7 +57,7 @@ AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LIN
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/S100_std.asm

@@ -0,0 +1,46 @@
+;
+;==================================================================================================
+;   S100 STANDARD CONFIGURATION
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_s100.asm"
+;
+CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
+CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
+Z180_MEMWAIT	.SET	1		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.SET	2		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+;
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+SCONENABLE	.SET	TRUE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
+;
+IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY

Source/HBIOS/Config/SBC_max.asm

@@ -39,6 +39,8 @@ FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 ;
 DSKYENABLE	.SET	TRUE		; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
+ICMENABLE	.SET	TRUE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+PKDENABLE	.SET	TRUE		; ENABLES DSKY NG PKD DRIVER (8259)
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 ;

Source/HBIOS/Config/SBC_std.asm

@@ -45,7 +45,7 @@ VGAENABLE	.SET	TRUE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_DIO3	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_DIO3	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/SCZ180_sc126.asm

@@ -59,7 +59,7 @@ AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LI
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/SCZ180_sc130.asm

@@ -60,7 +60,7 @@ AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LI
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/SCZ180_sc140.asm

@@ -54,7 +54,7 @@ AYMODE		.SET	AYMODE_LINC	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/SCZ180_sc503.asm

@@ -54,7 +54,7 @@ AYMODE		.SET	AYMODE_LINC	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC
 SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/SCZ180_sc700.asm

@@ -0,0 +1,71 @@
+;
+;==================================================================================================
+;   SC700 STANDARD CONFIGURATION
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE PLATFORM_NAME "Small Computer SC700", " [", CONFIG, "]"
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_scz180.asm"
+;
+CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
+Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+;
+LEDENABLE	.SET	TRUE		; ENABLE STATUS LED (SINGLE LED)
+LEDPORT		.SET	$0E		; STATUS LED PORT ADDRESS
+;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
+;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+AY38910ENABLE	.SET	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
+FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/ZETA2_std.asm

@@ -31,11 +31,10 @@ INTMODE		.SET	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
-;UARTCFG	.SET	UARTCFG | SER_RTS
 UARTSBC		.SET	TRUE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_ZETA2	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_ZETA2	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

Source/HBIOS/Config/ZETA_std.asm

@@ -31,11 +31,10 @@ INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
 UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
-;UARTCFG	.SET	UARTCFG | SER_RTS
 UARTSBC		.SET	TRUE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
 ;
 FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
-FDMODE		.SET	FDMODE_ZETA	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+FDMODE		.SET	FDMODE_ZETA	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
 ;
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
 SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)

Source/HBIOS/Makefile

@@ -6,7 +6,7 @@ MOREDIFF = game.bin hbios_rom.bin nascom.bin usrrom.bin \
 SUBDIRS =
 DEST = ../../Binary
 TOOLS =../../Tools
-OTHERS =  *.img *.rom *.com *.upd *.bin *.z80 cpm.sys zsys.sys Build.inc font*.asm *.dat hbios_env.sh
+OTHERS =  *.img *.rom *.com *.upd *.bin *.hex cpm.sys zsys.sys Build.inc font*.asm *.dat hbios_env.sh
 
 # DIFFMAKE = 1
 
@@ -43,6 +43,10 @@ else
 	BIOS=wbw
 endif
 
+ifeq ($(ROM_PLATFORM),S100)
+	ROMDEPS += s100mon.bin
+endif
+
 ROMNAME=${ROM_PLATFORM}_${ROM_CONFIG}
 
 # $(info DEPS=$(DEPS))
@@ -58,12 +62,14 @@ $(OBJECTS) : $(ROMDEPS)
 	cat romldr.bin dbgmon.bin ../ZSDOS/zsys_$(BIOS).bin >osimg_small.bin
 	if [ $(ROM_PLATFORM) != UNA ] ; then \
 		cat camel80.bin nascom.bin tastybasic.bin game.bin eastaegg.bin netboot.mod updater.bin usrrom.bin >osimg1.bin ; \
-		cat imgpad2.bin >osimg2.bin ; \
-		if [ $(ROMSIZE) -gt 0 ] ; then \
-			for f in hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ; do \
-				srec_cat $$f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $$f -Binary ; \
-			done \
-		fi \
+		if [ $(ROM_PLATFORM) = S100 ] ; then \
+			cat s100mon.bin >osimg2.bin ; \
+		else \
+			cat imgpad2.bin >osimg2.bin ; \
+		fi ; \
+		for f in hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ; do \
+			srec_cat $$f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $$f -Binary ; \
+		done \
 	fi
 	if [ $(ROM_PLATFORM) = UNA ] ; then \
 		cp osimg.bin $(DEST)/UNA_WBW_SYS.bin ; \
@@ -75,8 +81,8 @@ $(OBJECTS) : $(ROMDEPS)
 			cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).upd ; \
 			cat hbios_app.bin osimg_small.bin > $(ROMNAME).com ; \
 		else \
-			cat hbios_rom.bin osimg_small.bin > $(ROMNAME).rom ; \
-			cat hbios_rom.bin osimg_small.bin > $(ROMNAME).upd ; \
+			cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).rom ; \
+			cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).upd ; \
 			cat hbios_app.bin osimg_small.bin > $(ROMNAME).com ; \
 		fi \
 	fi
@@ -89,6 +95,10 @@ font%.asm:
 camel80.bin:
 	cp ../Forth/$@ .
 
+s100mon.bin:
+	$(ZXCC) $(CPM)/SLR180 -s100mon/FH
+	$(ZXCC) $(CPM)/MLOAD25 -s100mon.bin=s100mon
+
 tastybasic.bin:
 	cp ../TastyBasic/src/$@ .
 	

Source/HBIOS/ROM Layout.txt

@@ -1,27 +0,0 @@
-RomWBW ROM Layout Notes
-
-Bank		Module		Start	Size
-------		------		------	------		
-0		hbios		0x0000	0x8000
-		<end>		0x8000
-
-1		loader		0x0000	0x1000
-		dbgmon		0x1000	0x2000
-		cpm22		0x2000	0x3000
-		zsys		0x5000	0x3000
-		<end>		0x8000        
-
-2		forth		0x0000	0x1700
-		basic		0x1700	0x2000
-		tbasic		0x3700	0x0900
-		game		0x4000	0x0900
-		egg		0x4900	0x0200
-		netboot         0x4B00	0x1000
-		updater         0x5B00	0x0D00
-		usrrom		0x6800	0x1800
-		<end>		0x8000
-
-3		imgpad2		0x0000	0x8000
-		<end>		0x8000
-
-4-N		ROM Disk Data

Source/HBIOS/asci.asm

@@ -81,7 +81,7 @@ ASCI_RTS	.EQU	%00010000	; ~RTS BIT OF CNTLA REG
 ;
 #IF (ASCIINTS)
 ;
-  #IF (INTMODE == 2)
+  #IF (INTMODE > 0)
 ;
 ASCI0_IVT	.EQU	IVT(INT_SER0)
 ASCI1_IVT	.EQU	IVT(INT_SER1)
@@ -125,25 +125,19 @@ ASCI_PREINIT2:
 ;
 #IF (ASCIINTS)
 ;
-  #IF (INTMODE >= 1)
+; Z180 ASCI INTERRUPTS OPERATE LIKE IM2 EVEN WHEN IM1 IS ACTIVE.
+;
+  #IF (INTMODE > 0)
 	; SETUP INT VECTORS AS APPROPRIATE
 	LD	A,(ASCI_DEV)		; GET DEVICE COUNT
 	OR	A			; SET FLAGS
 	JR	Z,ASCI_PREINIT3		; IF ZERO, NO ASCI DEVICES, ABORT
 ;
-    #IF (INTMODE == 1)
-	; ADD IM1 INT CALL LIST ENTRY
-	LD	HL,ASCI_INT		; GET INT VECTOR
-	CALL	HB_ADDIM1		; ADD TO IM1 CALL LIST
-    #ENDIF
-;
-    #IF (INTMODE == 2)
 	; SETUP IM2 VECTORS
 	LD	HL,ASCI_INT0
 	LD	(ASCI0_IVT),HL		; IVT INDEX
 	LD	HL,ASCI_INT1
 	LD	(ASCI1_IVT),HL		; IVT INDEX
-    #ENDIF
 ;
   #ENDIF
 ;
@@ -204,24 +198,6 @@ ASCI_INIT1:
 ;
   #IF (INTMODE > 0)
 ;
-; IM1 ENTRY POINT
-;
-ASCI_INT:
-	; CHECK/HANDLE FIRST PORT
-	LD	A,(ASCI0_CFG + 1)	; GET ASCI TYPE FOR FIRST ASCI
-	OR	A			; SET FLAGS
-	CALL	NZ,ASCI_INT0		; CALL IF EXISTS
-	RET	NZ			; DONE IF INT HANDLED
-;
-	; CHECK/HANDLE SECOND PORT
-	LD	A,(ASCI1_CFG + 1)	; GET ASCI TYPE FOR SECOND ASCI
-	OR	A			; SET FLAGS
-	CALL	NZ,ASCI_INT1		; CALL IF EXISTS
-;
-	RET				; DONE
-;
-; IM2 ENTRY POINTS
-;
 ASCI_INT0:
 	; INTERRUPT HANDLER FOR FIRST ASCI (ASCI0)
 	LD	IY,ASCI0_CFG		; POINT TO ASCI0 CFG

Source/HBIOS/cfg_duo.asm

@@ -0,0 +1,316 @@
+;
+;==================================================================================================
+;   ROMWBW 3.X CONFIGURATION DEFAULTS FOR DUODYNE
+;==================================================================================================
+;
+; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.	INSTEAD, YOU SHOULD
+; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
+; UNDER THIS DIRECTORY.
+;
+; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
+; FOR THE PLATFORM.
+;
+#DEFINE PLATFORM_NAME "Duodyne", " [", CONFIG, "]"
+;
+#INCLUDE "hbios.inc"
+;
+PLATFORM	.EQU	PLT_DUO		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
+CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
+BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
+BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
+HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
+USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
+TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
+;
+BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
+;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_UNSUP	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+CPUOSC		.EQU	8000000		; CPU OSC FREQ IN MHZ
+INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+DEFSERCFG	.EQU	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+;
+RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
+MPGSEL_0	.EQU	$50		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_1	.EQU	$51		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_2	.EQU	$52		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_3	.EQU	$53		; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
+MPGENA		.EQU	$54		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
+;
+RTCIO		.EQU	$94		; RTC LATCH REGISTER ADR
+;
+KIOENABLE	.EQU	FALSE		; ENABLE ZILOG KIO SUPPORT
+KIOBASE		.EQU	$80		; KIO BASE I/O ADDRESS
+;
+CTCENABLE	.EQU	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
+CTCBASE		.EQU	$B0		; CTC BASE I/O ADDRESS
+CTCTIMER	.EQU	TRUE		; ENABLE CTC PERIODIC TIMER
+CTCMODE		.EQU	CTCMODE_CTR	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
+CTCPRE		.EQU	256		; PRESCALE CONSTANT (1-256)
+CTCPRECH	.EQU	2		; PRESCALE CHANNEL (0-3)
+CTCTIMCH	.EQU	3		; TIMER CHANNEL (0-3)
+CTCOSC		.EQU	(4915200/8)	; CTC CLOCK FREQUENCY
+;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$56		; PCF8584 BASE I/O ADDRESS
+;
+EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
+;
+SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
+;
+WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
+;
+FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	FALSE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
+;
+LEDENABLE	.EQU	TRUE		; ENABLES STATUS LED
+LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
+LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
+LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
+;
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+;
+BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
+CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU		.EQU	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
+VDAEMU_SERKBD	.EQU	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+ANSITRACE	.EQU	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKTRACE	.EQU	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+KBDTRACE	.EQU	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKKBLOUT	.EQU	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+MKYENABLE	.EQU	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+MKYKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+;
+DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
+DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
+;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
+BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
+BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
+;
+INTRTCENABLE	.EQU	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+RP5RTCENABLE	.EQU	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+HTIMENABLE	.EQU	FALSE		; ENABLE SIMH TIMER SUPPORT
+SIMRTCENABLE	.EQU	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
+;
+DS7RTCENABLE	.EQU	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
+DS7RTCMODE	.EQU	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
+;
+DUARTENABLE	.EQU	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+;
+UARTENABLE	.EQU	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
+UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+UARTCFG		.EQU	DEFSERCFG	; UART: LINE CONFIG FOR UART PORTS
+UARTCASSPD	.EQU	SER_300_8N1	; UART: ECB CASSETTE UART DEFAULT SPEED
+UARTSBC		.EQU	TRUE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
+UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
+UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
+UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
+UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
+UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
+UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+;
+ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+;
+Z2UENABLE	.EQU	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+;
+ACIAENABLE	.EQU	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+;
+SIOENABLE	.EQU	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
+SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
+SIOCNT		.EQU	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIO0MODE	.EQU	SIOMODE_ZP	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO0BASE	.EQU	$B0		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.EQU	(4915200/8)	; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACFG	.EQU	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.EQU	(4915200/8)	; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCFG	.EQU	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
+;
+VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
+VDUSIZ		.EQU	V80X25		; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
+CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
+CVDUMODE	.EQU	CVDUMODE_MBC	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
+CVDUMON		.EQU	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
+TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.EQU	TMSMODE_MBC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
+;
+MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
+MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+;
+FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.EQU	FDMODE_MBC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
+FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
+FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
+RFCNT		.EQU	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
+;
+IDEENABLE	.EQU	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDETRACE	.EQU	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IDECNT		.EQU	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
+IDE0MODE	.EQU	IDEMODE_DIO	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE0BASE	.EQU	$20		; IDE 0: IO BASE ADDRESS
+IDE0DATLO	.EQU	$20		; IDE 0: DATA LO PORT FOR 16-BIT I/O
+IDE0DATHI	.EQU	$28		; IDE 0: DATA HI PORT FOR 16-BIT I/O
+IDE0A8BIT	.EQU	FALSE		; IDE 0A (MASTER): 8 BIT XFER
+IDE0B8BIT	.EQU	FALSE		; IDE 0B (MASTER): 8 BIT XFER
+IDE1MODE	.EQU	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE1BASE	.EQU	$00		; IDE 1: IO BASE ADDRESS
+IDE1DATLO	.EQU	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
+IDE1DATHI	.EQU	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
+IDE1A8BIT	.EQU	TRUE		; IDE 1A (MASTER): 8 BIT XFER
+IDE1B8BIT	.EQU	TRUE		; IDE 1B (MASTER): 8 BIT XFER
+IDE2MODE	.EQU	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE2BASE	.EQU	$00		; IDE 2: IO BASE ADDRESS
+IDE2DATLO	.EQU	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
+IDE2DATHI	.EQU	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
+IDE2A8BIT	.EQU	TRUE		; IDE 2A (MASTER): 8 BIT XFER
+IDE2B8BIT	.EQU	TRUE		; IDE 2B (MASTER): 8 BIT XFER
+;
+PPIDEENABLE	.EQU	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPIDECNT	.EQU	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0BASE	.EQU	$60		; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
+PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1BASE	.EQU	$20		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE1A8BIT	.EQU	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
+PPIDE1B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2BASE	.EQU	$14		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
+PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+;
+SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
+SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
+SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
+;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+CHTRACE		.EQU	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHUSBTRACE	.EQU	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHSDTRACE	.EQU	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHCNT		.EQU	1		; CH: NUMBER OF BOARDS TO DETECT (1-2)
+CH0BASE		.EQU	$BE		; CH 0: BASE I/O ADDRESS
+CH0USBENABLE	.EQU	TRUE		; CH 0: ENABLE USB DISK
+CH0SDENABLE	.EQU	FALSE		; CH 0: ENABLE SD DISK
+CH1BASE		.EQU	$FF		; CH 1: BASE I/O ADDRESS
+CH1USBENABLE	.EQU	FALSE		; CH 1: ENABLE USB DISK
+CH1SDENABLE	.EQU	FALSE		; CH 1: ENABLE SD DISK
+;
+PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
+PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
+;
+PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
+;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+ESPCONENABLE	.EQU	TRUE		; ESP: ENABLE ESP32 CONSOLE IO DRIVER VIDEO/KBD SUPPORT
+;
+HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
+HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_SPP	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_SPP	; PPA: DRIVER MODE: PPAMODE_[NONE|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_SPP	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_SPP	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
+PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
+PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
+PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
+PIOZBASE	.EQU	$88		; PIO: PIO REGISTERS BASE ADR FOR ECB ZP BOARD
+PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
+PIOSBASE	.EQU	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
+;
+UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
+UFBASE		.EQU	$0C		; UF: REGISTERS BASE ADR
+;
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_NONE	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
+;
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
+AYMODE		.EQU	AYMODE_MBC	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
+;
+SPKENABLE	.EQU	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+;
+DMAENABLE	.EQU	TRUE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+DMABASE		.EQU	$40		; DMA: DMA BASE ADDRESS
+DMAMODE		.EQU	DMAMODE_DUO	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_dyno.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW 2.X CONFIGURATION DEFAULTS FOR DYNO
+;   ROMWBW 3.X CONFIGURATION DEFAULTS FOR DYNO
 ;==================================================================================================
 ;
 ; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -30,14 +30,12 @@ CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+DEFSERCFG	.EQU	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@@ -60,6 +58,9 @@ CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.EQU	$88		; CTC BASE I/O ADDRESS
 CTCTIMER	.EQU	FALSE		; ENABLE CTC PERIODIC TIMER
 ;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
+;
 EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
 SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
@@ -79,7 +80,14 @@ LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -126,7 +134,7 @@ UARTENABLE	.EQU	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 UARTCFG		.EQU	DEFSERCFG | SER_RTS	; UART: LINE CONFIG FOR UART PORTS
-UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
 UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
 UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
 UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
@@ -176,6 +184,7 @@ TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -236,6 +245,8 @@ SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.EQU	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
 PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -243,6 +254,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -277,7 +290,7 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
-YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
-VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_heath.asm

@@ -0,0 +1,321 @@
+;
+;==================================================================================================
+;   ROMWBW 3.X CONFIGURATION DEFAULTS FOR RCBUS Z80
+;==================================================================================================
+;
+; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.	INSTEAD, YOU SHOULD
+; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
+; UNDER THIS DIRECTORY.
+;
+; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
+; FOR THE PLATFORM.
+;
+#DEFINE PLATFORM_NAME "RCBus", " [", CONFIG, "]"
+;
+#INCLUDE "hbios.inc"
+;
+PLATFORM	.EQU	PLT_HEATH	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
+CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
+BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
+BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
+HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
+USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
+TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
+;
+BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
+;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+CPUOSC		.EQU	7372800		; CPU OSC FREQ IN MHZ
+INTMODE		.EQU	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+DEFSERCFG	.EQU	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+;
+RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
+MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_3	.EQU	$7B		; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
+MPGENA		.EQU	$7C		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
+;
+RTCIO		.EQU	$C0		; RTC LATCH REGISTER ADR
+;
+KIOENABLE	.EQU	FALSE		; ENABLE ZILOG KIO SUPPORT
+KIOBASE		.EQU	$80		; KIO BASE I/O ADDRESS
+;
+CTCENABLE	.EQU	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
+CTCBASE		.EQU	$88		; CTC BASE I/O ADDRESS
+CTCTIMER	.EQU	FALSE		; ENABLE CTC PERIODIC TIMER
+CTCMODE		.EQU	CTCMODE_TIM16	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
+CTCPRE		.EQU	256		; PRESCALE CONSTANT (1-256)
+CTCPRECH	.EQU	2		; PRESCALE CHANNEL (0-3)
+CTCTIMCH	.EQU	3		; TIMER CHANNEL (0-3)
+CTCOSC		.EQU	CPUOSC		; CTC CLOCK FREQUENCY
+;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
+;
+EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
+;
+SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
+SKZDIV		.EQU	DIV_1		; UART CLK (CLK2) DIVIDER FOR Z80-512K
+;
+WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
+WDOGIO		.EQU	$6E		; WATCHDOG REGISTER ADR
+;
+FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
+;
+LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
+LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
+LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
+LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
+;
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+;
+BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
+CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU		.EQU	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
+VDAEMU_SERKBD	.EQU	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+ANSITRACE	.EQU	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKTRACE	.EQU	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+KBDTRACE	.EQU	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+KBDKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+PPKKBLOUT	.EQU	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
+MKYENABLE	.EQU	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+MKYKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+;
+DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
+DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
+;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
+BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
+BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
+;
+INTRTCENABLE	.EQU	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+RP5RTCENABLE	.EQU	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+HTIMENABLE	.EQU	FALSE		; ENABLE SIMH TIMER SUPPORT
+SIMRTCENABLE	.EQU	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
+;
+DS7RTCENABLE	.EQU	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
+DS7RTCMODE	.EQU	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
+;
+DUARTENABLE	.EQU	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+DUARTCNT	.EQU	1		; DUART: NUMBER OF CHIPS TO DETECT (1-2)
+DUART0BASE	.EQU	$A0		; DUART 0: BASE ADDRESS OF CHIP
+DUART0ACFG	.EQU	DEFSERCFG	; DUART 0A: SERIAL LINE CONFIG
+DUART0BCFG	.EQU	DEFSERCFG	; DUART 0B: SERIAL LINE CONFIG
+DUART1BASE	.EQU	$40		; DUART 1: BASE ADDRESS OF CHIP
+DUART1ACFG	.EQU	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
+DUART1BCFG	.EQU	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
+;
+UARTENABLE	.EQU	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
+UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+UARTCFG		.EQU	DEFSERCFG | SER_RTS	; UART: LINE CONFIG FOR UART PORTS
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
+UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
+UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
+UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
+UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
+UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
+UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+;
+ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+;
+Z2UENABLE	.EQU	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+;
+ACIAENABLE	.EQU	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+ACIADEBUG	.EQU	FALSE		; ACIA: ENABLE DEBUG OUTPUT
+ACIACNT		.EQU	1		; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
+ACIA0BASE	.EQU	$80		; ACIA 0: REGISTERS BASE ADR
+ACIA0CLK	.EQU	CPUOSC		; ACIA 0: OSC FREQ IN HZ
+ACIA0DIV	.EQU	1		; ACIA 0: SERIAL CLOCK DIVIDER
+ACIA0CFG	.EQU	DEFSERCFG	; ACIA 0: SERIAL LINE CONFIG  (SEE STD.ASM)
+ACIA1BASE	.EQU	$40		; ACIA 1: REGISTERS BASE ADR
+ACIA1CLK	.EQU	CPUOSC		; ACIA 1: OSC FREQ IN HZ
+ACIA1DIV	.EQU	1		; ACIA 1: SERIAL CLOCK DIVIDER
+ACIA1CFG	.EQU	DEFSERCFG	; ACIA 1: SERIAL LINE CONFIG  (SEE STD.ASM)
+;
+SIOENABLE	.EQU	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
+SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
+SIOCNT		.EQU	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO0BASE	.EQU	$80		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.EQU	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACFG	.EQU	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.EQU	CPUOSC		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCFG	.EQU	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO1BASE	.EQU	$84		; SIO 1: REGISTERS BASE ADR
+SIO1ACLK	.EQU	CPUOSC		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1ACFG	.EQU	DEFSERCFG	; SIO 1A: SERIAL LINE CONFIG
+SIO1ACTCC	.EQU	-1		; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1BCLK	.EQU	CPUOSC		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1BCFG	.EQU	DEFSERCFG	; SIO 1B: SERIAL LINE CONFIG
+SIO1BCTCC	.EQU	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
+;
+VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
+CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
+TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
+;
+MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
+MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.EQU	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
+FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
+FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
+;
+IDEENABLE	.EQU	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDETRACE	.EQU	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IDECNT		.EQU	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
+IDE0MODE	.EQU	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE0BASE	.EQU	$10		; IDE 0: IO BASE ADDRESS
+IDE0DATLO	.EQU	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
+IDE0DATHI	.EQU	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
+IDE0A8BIT	.EQU	TRUE		; IDE 0A (MASTER): 8 BIT XFER
+IDE0B8BIT	.EQU	TRUE		; IDE 0B (MASTER): 8 BIT XFER
+IDE1MODE	.EQU	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE1BASE	.EQU	$00		; IDE 1: IO BASE ADDRESS
+IDE1DATLO	.EQU	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
+IDE1DATHI	.EQU	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
+IDE1A8BIT	.EQU	TRUE		; IDE 1A (MASTER): 8 BIT XFER
+IDE1B8BIT	.EQU	TRUE		; IDE 1B (MASTER): 8 BIT XFER
+IDE2MODE	.EQU	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE2BASE	.EQU	$00		; IDE 2: IO BASE ADDRESS
+IDE2DATLO	.EQU	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
+IDE2DATHI	.EQU	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
+IDE2A8BIT	.EQU	TRUE		; IDE 2A (MASTER): 8 BIT XFER
+IDE2B8BIT	.EQU	TRUE		; IDE 2B (MASTER): 8 BIT XFER
+;
+PPIDEENABLE	.EQU	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPIDECNT	.EQU	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0BASE	.EQU	$20		; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
+PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1BASE	.EQU	$00		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE1A8BIT	.EQU	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
+PPIDE1B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2BASE	.EQU	$00		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
+PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+;
+SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.EQU	SDMODE_MT	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
+SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
+SDCNT		.EQU	2		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
+SDMTSWAP	.EQU	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
+;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+;
+PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
+PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
+;
+PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
+;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
+HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
+;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.EQU	$0C		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$00		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
+PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
+PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
+PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
+;
+UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
+;
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
+;
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
+AYMODE		.EQU	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
+;
+SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+;
+DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
+DMAMODE		.EQU	DMAMODE_RC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_master.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW 2.X CONFIGURATION MASTER
+;   ROMWBW 3.X CONFIGURATION MASTER
 ;==================================================================================================
 ;
 ; THIS FILE IS *NOT* A REAL CONFIGURATION FILE.	 IT IS A MASTER TEMPLATE FILE
@@ -12,7 +12,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -27,14 +27,12 @@ CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+DEFSERCFG	.EQU	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_NONE		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
@@ -87,6 +85,9 @@ CTCPRECH	.EQU	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.EQU	3		; TIMER CHANNEL (0-3)
 CTCOSC		.EQU	614400		; CTC CLOCK FREQUENCY
 ;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
+;
 EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
 SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
@@ -108,10 +109,14 @@ LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -159,7 +164,7 @@ UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 UARTCFG		.EQU	DEFSERCFG	; UART: LINE CONFIG FOR UART PORTS
 UARTCASSPD	.EQU	SER_300_8N1	; UART: ECB CASSETTE UART DEFAULT SPEED
-UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
 UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
 UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
 UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
@@ -230,6 +235,7 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -291,6 +297,18 @@ SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.EQU	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+CHTRACE		.EQU	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHUSBTRACE	.EQU	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHSDTRACE	.EQU	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHCNT		.EQU	1		; CH: NUMBER OF BOARDS TO DETECT (1-2)
+CH0BASE		.EQU	$BE		; CH 0: BASE I/O ADDRESS
+CH0USBENABLE	.EQU	TRUE		; CH 0: ENABLE USB DISK
+CH0SDENABLE	.EQU	FALSE		; CH 0: ENABLE SD DISK
+CH1BASE		.EQU	$FF		; CH 1: BASE I/O ADDRESS
+CH1USBENABLE	.EQU	FALSE		; CH 1: ENABLE USB DISK
+CH1SDENABLE	.EQU	FALSE		; CH 1: ENABLE SD DISK
+;
 PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
 PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -302,6 +320,9 @@ PPPSDENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER SD CARD SUPPORT
 PPPSDTRACE	.EQU	1		; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+ESPCONENABLE	.EQU	TRUE		; ESP: ENABLE ESP32 CONSOLE IO DRIVER VIDEO/KBD SUPPORT
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
@@ -361,7 +382,7 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.EQU	DMAMODE_NONE	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+DMAMODE		.EQU	DMAMODE_NONE	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
-YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
-VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_mbc.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW 2.X CONFIGURATION DEFAULTS FOR MBC
+;   ROMWBW 3.X CONFIGURATION DEFAULTS FOR MBC
 ;==================================================================================================
 ;
 ; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_MBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_MBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -30,11 +30,10 @@ CPUSPDCAP	.EQU	SPD_HILO	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_LOW		; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+DEFSERCFG	.EQU	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_MBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -54,6 +53,9 @@ CTCPRECH	.EQU	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.EQU	3		; TIMER CHANNEL (0-3)
 CTCOSC		.EQU	(4915200/8)	; CTC CLOCK FREQUENCY
 ;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
+;
 EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
 SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
@@ -73,10 +75,14 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -117,7 +123,7 @@ UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 UARTCFG		.EQU	DEFSERCFG	; UART: LINE CONFIG FOR UART PORTS
 UARTCASSPD	.EQU	SER_300_8N1	; UART: ECB CASSETTE UART DEFAULT SPEED
-UARTSBC		.EQU	TRUE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBC		.EQU	TRUE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
 UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
 UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
 UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
@@ -158,6 +164,7 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -219,6 +226,8 @@ SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 ;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
 PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -226,6 +235,9 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+ESPCONENABLE	.EQU	TRUE		; ESP: ENABLE ESP32 CONSOLE IO DRIVER VIDEO/KBD SUPPORT
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
@@ -285,8 +297,7 @@ SPKENABLE	.EQU	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.EQU	DMAMODE_MBC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+DMAMODE		.EQU	DMAMODE_MBC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
-YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
-VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
-
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_mk4.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW 2.X CONFIGURATION FOR MARK IV
+;   ROMWBW 3.X CONFIGURATION FOR MARK IV
 ;==================================================================================================
 ;
 ; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -30,14 +30,12 @@ CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+DEFSERCFG	.EQU	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 ;
 Z180_BASE	.EQU	$40		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
 Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -60,6 +58,9 @@ CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.EQU	$B0		; CTC BASE I/O ADDRESS
 CTCTIMER	.EQU	FALSE		; ENABLE CTC PERIODIC TIMER
 ;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
+;
 EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
 SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
@@ -79,10 +80,14 @@ LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -123,7 +128,7 @@ UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 UARTCFG		.EQU	DEFSERCFG	; UART: LINE CONFIG FOR UART PORTS
 UARTCASSPD	.EQU	SER_300_8N1	; UART: ECB CASSETTE UART DEFAULT SPEED
-UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
 UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
 UARTCAS		.EQU	TRUE		; UART: AUTO-DETECT ECB CASSETTE UART
 UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
@@ -169,6 +174,7 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -229,6 +235,8 @@ SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	TRUE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 ;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
 PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -240,6 +248,8 @@ PPPSDENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER SD CARD SUPPORT
 PPPSDTRACE	.EQU	1		; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -283,7 +293,7 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.EQU	DMAMODE_ECB	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+DMAMODE		.EQU	DMAMODE_ECB	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
-YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
-VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER 
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_n8.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW 2.X CONFIGURATION FOR N8
+;   ROMWBW 3.X CONFIGURATION FOR N8
 ;==================================================================================================
 ;
 ; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -30,14 +30,12 @@ CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+DEFSERCFG	.EQU	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_N8		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
-RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 ;
 Z180_BASE	.EQU	$40		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
 Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -62,6 +60,9 @@ CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.EQU	$B0		; CTC BASE I/O ADDRESS
 CTCTIMER	.EQU	FALSE		; ENABLE CTC PERIODIC TIMER
 ;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
+;
 EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
 SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
@@ -81,10 +82,14 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	N8_PPI0		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	N8_PPI0		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	N8_PPI0		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -125,7 +130,7 @@ UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 UARTCFG		.EQU	DEFSERCFG	; UART: LINE CONFIG FOR UART PORTS
 UARTCASSPD	.EQU	SER_300_8N1	; UART: ECB CASSETTE UART DEFAULT SPEED
-UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
 UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
 UARTCAS		.EQU	TRUE		; UART: AUTO-DETECT ECB CASSETTE UART
 UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
@@ -171,6 +176,7 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -231,6 +237,8 @@ SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 ;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
 PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -238,6 +246,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -276,7 +286,7 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
-YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
-VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER 
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_rcz180.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW 2.X CONFIGURATION DEFAULTS FOR RCBUS Z180 CPU
+;   ROMWBW 3.X CONFIGURATION DEFAULTS FOR RCBUS Z180 CPU
 ;==================================================================================================
 ;
 ; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -30,14 +30,12 @@ CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+DEFSERCFG	.EQU	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@@ -60,6 +58,9 @@ CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.EQU	$88		; CTC BASE I/O ADDRESS
 CTCTIMER	.EQU	FALSE		; ENABLE CTC PERIODIC TIMER
 ;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
+;
 EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
 SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
@@ -85,7 +86,14 @@ LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -132,7 +140,7 @@ UARTENABLE	.EQU	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 UARTCFG		.EQU	DEFSERCFG | SER_RTS	; UART: LINE CONFIG FOR UART PORTS
-UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
 UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
 UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
 UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
@@ -182,6 +190,7 @@ TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -242,6 +251,18 @@ SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.EQU	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+CHTRACE		.EQU	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHUSBTRACE	.EQU	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHSDTRACE	.EQU	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHCNT		.EQU	1		; CH: NUMBER OF BOARDS TO DETECT (1-2)
+CH0BASE		.EQU	$BE		; CH 0: BASE I/O ADDRESS
+CH0USBENABLE	.EQU	TRUE		; CH 0: ENABLE USB DISK
+CH0SDENABLE	.EQU	FALSE		; CH 0: ENABLE SD DISK
+CH1BASE		.EQU	$FF		; CH 1: BASE I/O ADDRESS
+CH1USBENABLE	.EQU	FALSE		; CH 1: ENABLE USB DISK
+CH1SDENABLE	.EQU	FALSE		; CH 1: ENABLE SD DISK
+;
 PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
 PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -249,6 +270,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -303,7 +326,7 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
-YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
-VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_rcz280.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW 2.X CONFIGURATION DEFAULTS FOR RCBUS Z280 CPU
+;   ROMWBW 3.X CONFIGURATION DEFAULTS FOR RCBUS Z280 CPU
 ;==================================================================================================
 ;
 ; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RCZ280	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_RCZ280	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
 CPUFAM		.EQU	CPU_Z280	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -30,14 +30,12 @@ CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	12000000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+DEFSERCFG	.EQU	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@@ -60,6 +58,9 @@ CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.EQU	$88		; CTC BASE I/O ADDRESS
 CTCTIMER	.EQU	FALSE		; ENABLE CTC PERIODIC TIMER
 ;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
+;
 EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
 SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
@@ -79,7 +80,14 @@ LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -126,7 +134,7 @@ UARTENABLE	.EQU	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 UARTCFG		.EQU	DEFSERCFG | SER_RTS	; UART: LINE CONFIG FOR UART PORTS
-UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
 UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
 UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
 UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
@@ -186,6 +194,7 @@ TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -246,6 +255,18 @@ SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.EQU	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+CHTRACE		.EQU	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHUSBTRACE	.EQU	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHSDTRACE	.EQU	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHCNT		.EQU	1		; CH: NUMBER OF BOARDS TO DETECT (1-2)
+CH0BASE		.EQU	$BE		; CH 0: BASE I/O ADDRESS
+CH0USBENABLE	.EQU	TRUE		; CH 0: ENABLE USB DISK
+CH0SDENABLE	.EQU	FALSE		; CH 0: ENABLE SD DISK
+CH1BASE		.EQU	$FF		; CH 1: BASE I/O ADDRESS
+CH1USBENABLE	.EQU	FALSE		; CH 1: ENABLE USB DISK
+CH1SDENABLE	.EQU	FALSE		; CH 1: ENABLE SD DISK
+;
 PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
 PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -253,6 +274,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -307,7 +330,7 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.EQU	DMAMODE_Z280	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+DMAMODE		.EQU	DMAMODE_Z280	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
-YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
-VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_rcz80.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW 2.X CONFIGURATION DEFAULTS FOR RCBUS Z80
+;   ROMWBW 3.X CONFIGURATION DEFAULTS FOR RCBUS Z80
 ;==================================================================================================
 ;
 ; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RCZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_RCZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -30,11 +30,10 @@ CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	7372800		; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	1		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+DEFSERCFG	.EQU	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
@@ -47,7 +46,7 @@ RTCIO		.EQU	$C0		; RTC LATCH REGISTER ADR
 KIOENABLE	.EQU	FALSE		; ENABLE ZILOG KIO SUPPORT
 KIOBASE		.EQU	$80		; KIO BASE I/O ADDRESS
 ;
-CTCENABLE	.EQU	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCENABLE	.EQU	TRUE		; ENABLE ZILOG CTC SUPPORT
 CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.EQU	$88		; CTC BASE I/O ADDRESS
 CTCTIMER	.EQU	FALSE		; ENABLE CTC PERIODIC TIMER
@@ -57,6 +56,9 @@ CTCPRECH	.EQU	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.EQU	3		; TIMER CHANNEL (0-3)
 CTCOSC		.EQU	CPUOSC		; CTC CLOCK FREQUENCY
 ;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
+;
 EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
 SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
@@ -78,7 +80,14 @@ LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -125,7 +134,7 @@ UARTENABLE	.EQU	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 UARTCFG		.EQU	DEFSERCFG | SER_RTS	; UART: LINE CONFIG FOR UART PORTS
-UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
 UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
 UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
 UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
@@ -180,6 +189,7 @@ TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -240,6 +250,18 @@ SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.EQU	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+CHTRACE		.EQU	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHUSBTRACE	.EQU	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHSDTRACE	.EQU	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHCNT		.EQU	1		; CH: NUMBER OF BOARDS TO DETECT (1-2)
+CH0BASE		.EQU	$BE		; CH 0: BASE I/O ADDRESS
+CH0USBENABLE	.EQU	TRUE		; CH 0: ENABLE USB DISK
+CH0SDENABLE	.EQU	FALSE		; CH 0: ENABLE SD DISK
+CH1BASE		.EQU	$FF		; CH 1: BASE I/O ADDRESS
+CH1USBENABLE	.EQU	FALSE		; CH 1: ENABLE USB DISK
+CH1SDENABLE	.EQU	FALSE		; CH 1: ENABLE SD DISK
+;
 PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
 PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -247,6 +269,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -301,7 +325,7 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.EQU	DMAMODE_RC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+DMAMODE		.EQU	DMAMODE_RC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
-YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
-VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_rph.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW 2.X CONFIGURATION FOR RHYOPHYRE
+;   ROMWBW 3.X CONFIGURATION FOR RHYOPHYRE
 ;==================================================================================================
 ;
 ; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RPH		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_RPH		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	TRUE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -30,14 +30,12 @@ CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+DEFSERCFG	.EQU	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_RPH		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
-RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 ;
 Z180_BASE	.EQU	$40		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
 Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
@@ -60,6 +58,9 @@ CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.EQU	$B0		; CTC BASE I/O ADDRESS
 CTCTIMER	.EQU	FALSE		; ENABLE CTC PERIODIC TIMER
 ;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
+;
 EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
 SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
@@ -79,10 +80,14 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	RPH_PPI0		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	RPH_PPI0	; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	RPH_PPI0	; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -123,7 +128,7 @@ UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 UARTCFG		.EQU	DEFSERCFG	; UART: LINE CONFIG FOR UART PORTS
 UARTCASSPD	.EQU	SER_300_8N1	; UART: ECB CASSETTE UART DEFAULT SPEED
-UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
 UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
 UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
 UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
@@ -160,6 +165,7 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -220,6 +226,8 @@ SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 ;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 PRPSDENABLE	.EQU	FALSE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
 PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -227,6 +235,8 @@ PRPCONENABLE	.EQU	FALSE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -247,7 +257,7 @@ PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
 PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
 PIOZBASE	.EQU	$88		; PIO: PIO REGISTERS BASE ADR FOR ECB ZP BOARD
 PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
-PIOSBASE	.EQU	RPH_PPI0		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
+PIOSBASE	.EQU	RPH_PPI0	; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
 ;
 UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
 FIFO_BASE	.EQU	$0C		; UF: REGISTERS BASE ADR
@@ -265,7 +275,7 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
-YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
-VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_s100.asm

@@ -0,0 +1,316 @@
+;
+;==================================================================================================
+;   ROMWBW 3.X CONFIGURATION DEFAULTS FOR S100 Z180
+;==================================================================================================
+;
+; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.	INSTEAD, YOU SHOULD
+; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
+; UNDER THIS DIRECTORY.
+;
+; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
+; FOR THE PLATFORM.
+;
+#DEFINE PLATFORM_NAME "S100", " [", CONFIG, "]"
+;
+#INCLUDE "hbios.inc"
+;
+PLATFORM	.EQU	PLT_S100	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
+CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
+BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
+BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
+HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
+USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
+TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
+;
+BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
+;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
+INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+DEFSERCFG	.EQU	SER_57600_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+;
+RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_3	.EQU	$7B		; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
+MPGENA		.EQU	$7C		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
+;
+Z180_BASE	.EQU	$C0		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
+Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
+Z180_MEMWAIT	.EQU	1		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.EQU	2		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z180_TIMER	.EQU	TRUE		; Z180: ENABLE Z180 SYSTEM PERIODIC TIMER
+;
+RTCIO		.EQU	$0C		; RTC LATCH REGISTER ADR
+;
+KIOENABLE	.EQU	FALSE		; ENABLE ZILOG KIO SUPPORT
+KIOBASE		.EQU	$80		; KIO BASE I/O ADDRESS
+;
+CTCENABLE	.EQU	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
+CTCBASE		.EQU	$88		; CTC BASE I/O ADDRESS
+CTCTIMER	.EQU	FALSE		; ENABLE CTC PERIODIC TIMER
+;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
+;
+EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
+;
+SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
+;
+WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
+;
+FPLED_ENABLE	.EQU	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
+;
+LEDENABLE	.EQU	TRUE		; ENABLES STATUS LED (SINGLE LED)
+LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
+LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
+LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
+;
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
+;
+BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
+CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU		.EQU	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
+VDAEMU_SERKBD	.EQU	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+ANSITRACE	.EQU	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKTRACE	.EQU	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+KBDTRACE	.EQU	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKKBLOUT	.EQU	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+MKYENABLE	.EQU	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+MKYKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+;
+DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
+DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
+;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
+BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
+BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
+;
+INTRTCENABLE	.EQU	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+RP5RTCENABLE	.EQU	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+HTIMENABLE	.EQU	FALSE		; ENABLE SIMH TIMER SUPPORT
+SIMRTCENABLE	.EQU	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
+;
+DS7RTCENABLE	.EQU	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
+DS7RTCMODE	.EQU	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
+;
+DUARTENABLE	.EQU	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+DUARTCNT	.EQU	1		; DUART: NUMBER OF CHIPS TO DETECT (1-2)
+DUART0BASE	.EQU	$A0		; DUART 0: BASE ADDRESS OF CHIP
+DUART0ACFG	.EQU	DEFSERCFG	; DUART 0A: SERIAL LINE CONFIG
+DUART0BCFG	.EQU	DEFSERCFG	; DUART 0B: SERIAL LINE CONFIG
+DUART1BASE	.EQU	$40		; DUART 1: BASE ADDRESS OF CHIP
+DUART1ACFG	.EQU	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
+DUART1BCFG	.EQU	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
+;
+UARTENABLE	.EQU	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
+UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+UARTCFG		.EQU	DEFSERCFG | SER_RTS	; UART: LINE CONFIG FOR UART PORTS
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
+UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
+UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
+UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
+UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
+UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
+UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+;
+ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
+ASCIBOOT	.EQU	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
+ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
+ASCI1CFG	.EQU	DEFSERCFG	; ASCI 1: SERIAL LINE CONFIG
+;
+Z2UENABLE	.EQU	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+;
+ACIAENABLE	.EQU	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+;
+SIOENABLE	.EQU	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
+SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
+SIOCNT		.EQU	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO0BASE	.EQU	$80		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.EQU	7372800		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACFG	.EQU	SER_115200_8N1	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.EQU	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCFG	.EQU	SER_115200_8N1	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO1BASE	.EQU	$84		; SIO 1: REGISTERS BASE ADR
+SIO1ACLK	.EQU	7372800		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1ACFG	.EQU	SER_115200_8N1	; SIO 1A: SERIAL LINE CONFIG
+SIO1ACTCC	.EQU	-1		; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1BCLK	.EQU	7372800		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1BCFG	.EQU	SER_115200_8N1	; SIO 1B: SERIAL LINE CONFIG
+SIO1BCTCC	.EQU	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
+;
+VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
+CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
+TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
+;
+MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
+MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.EQU	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
+FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
+FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
+;
+IDEENABLE	.EQU	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDETRACE	.EQU	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IDECNT		.EQU	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
+IDE0MODE	.EQU	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE0BASE	.EQU	$10		; IDE 0: IO BASE ADDRESS
+IDE0DATLO	.EQU	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
+IDE0DATHI	.EQU	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
+IDE0A8BIT	.EQU	TRUE		; IDE 0A (MASTER): 8 BIT XFER
+IDE0B8BIT	.EQU	TRUE		; IDE 0B (MASTER): 8 BIT XFER
+IDE1MODE	.EQU	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE1BASE	.EQU	$00		; IDE 1: IO BASE ADDRESS
+IDE1DATLO	.EQU	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
+IDE1DATHI	.EQU	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
+IDE1A8BIT	.EQU	TRUE		; IDE 1A (MASTER): 8 BIT XFER
+IDE1B8BIT	.EQU	TRUE		; IDE 1B (MASTER): 8 BIT XFER
+IDE2MODE	.EQU	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE2BASE	.EQU	$00		; IDE 2: IO BASE ADDRESS
+IDE2DATLO	.EQU	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
+IDE2DATHI	.EQU	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
+IDE2A8BIT	.EQU	TRUE		; IDE 2A (MASTER): 8 BIT XFER
+IDE2B8BIT	.EQU	TRUE		; IDE 2B (MASTER): 8 BIT XFER
+;
+PPIDEENABLE	.EQU	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPIDECNT	.EQU	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0BASE	.EQU	$20		; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
+PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1BASE	.EQU	$00		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE1A8BIT	.EQU	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
+PPIDE1B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2BASE	.EQU	$00		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
+PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+;
+SDENABLE	.EQU	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.EQU	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
+SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
+SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
+SDMTSWAP	.EQU	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
+;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+;
+PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
+PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
+;
+PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
+;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
+HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
+;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.EQU	$18		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$00		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
+PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
+PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
+PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
+;
+UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
+;
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
+;
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
+AYMODE		.EQU	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
+;
+SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+;
+DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
+DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_sbc.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW 2.X CONFIGURATION DEFAULTS FOR SBC
+;   ROMWBW 3.X CONFIGURATION DEFAULTS FOR SBC
 ;==================================================================================================
 ;
 ; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -30,11 +30,10 @@ CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	8000000		; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+DEFSERCFG	.EQU	SER_38400_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
@@ -54,6 +53,9 @@ CTCPRECH	.EQU	2		; PRESCALE CHANNEL (0-3)
 CTCTIMCH	.EQU	3		; TIMER CHANNEL (0-3)
 CTCOSC		.EQU	614400		; CTC CLOCK FREQUENCY
 ;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
+;
 EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
 SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
@@ -73,10 +75,14 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -117,7 +123,7 @@ UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 UARTCFG		.EQU	DEFSERCFG	; UART: LINE CONFIG FOR UART PORTS
 UARTCASSPD	.EQU	SER_300_8N1	; UART: ECB CASSETTE UART DEFAULT SPEED
-UARTSBC		.EQU	TRUE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBC		.EQU	TRUE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
 UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
 UARTCAS		.EQU	TRUE		; UART: AUTO-DETECT ECB CASSETTE UART
 UARTMFP		.EQU	TRUE		; UART: AUTO-DETECT MF/PIC UART
@@ -158,6 +164,7 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -218,6 +225,8 @@ SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
 SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 ;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+;
 PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
 PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -225,6 +234,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
@@ -264,7 +275,7 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.EQU	DMAMODE_ECB	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+DMAMODE		.EQU	DMAMODE_ECB	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
-YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
-VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

Source/HBIOS/cfg_scz180.asm

@@ -1,6 +1,6 @@
 ;
 ;==================================================================================================
-;   ROMWBW 2.X CONFIGURATION DEFAULTS FOR SC Z180 VARIANTS (SC126, SC130, ETC.)
+;   ROMWBW 3.X CONFIGURATION DEFAULTS FOR SC Z180 VARIANTS (SC126, SC130, ETC.)
 ;==================================================================================================
 ;
 ; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_SCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_SCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -30,14 +30,12 @@ CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
 CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
 CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
 INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
-DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+DEFSERCFG	.EQU	SER_115200_8N1 | SER_RTS	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
@@ -60,6 +58,9 @@ CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
 CTCBASE		.EQU	$88		; CTC BASE I/O ADDRESS
 CTCTIMER	.EQU	FALSE		; ENABLE CTC PERIODIC TIMER
 ;
+PCFENABLE	.EQU	FALSE		; ENABLE PCF8584 I2C CONTROLLER
+PCFBASE		.EQU	$F0		; PCF8584 BASE I/O ADDRESS
+;
 EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
 ;
 SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
@@ -79,7 +80,14 @@ LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+H8PENABLE	.EQU	FALSE		; ENABLES HEATH H8 FRONT PANEL
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -126,7 +134,7 @@ UARTENABLE	.EQU	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 UARTCFG		.EQU	DEFSERCFG | SER_RTS	; UART: LINE CONFIG FOR UART PORTS
-UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
 UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
 UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
 UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
@@ -176,6 +184,7 @@ TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
@@ -236,6 +245,18 @@ SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
 SDMTSWAP	.EQU	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
 ;
+CHENABLE	.EQU	FALSE		; CH: ENABLE CH375/376 USB SUPPORT
+CHTRACE		.EQU	1		; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHUSBTRACE	.EQU	1		; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHSDTRACE	.EQU	1		; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+CHCNT		.EQU	1		; CH: NUMBER OF BOARDS TO DETECT (1-2)
+CH0BASE		.EQU	$BE		; CH 0: BASE I/O ADDRESS
+CH0USBENABLE	.EQU	TRUE		; CH 0: ENABLE USB DISK
+CH0SDENABLE	.EQU	FALSE		; CH 0: ENABLE SD DISK
+CH1BASE		.EQU	$FF		; CH 1: BASE I/O ADDRESS
+CH1USBENABLE	.EQU	FALSE		; CH 1: ENABLE USB DISK
+CH1SDENABLE	.EQU	FALSE		; CH 1: ENABLE SD DISK
+;
 PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
 PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
 PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
@@ -243,6 +264,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
@@ -297,7 +320,7 @@ SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
 ;
 DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
 DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
-DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
 ;
-YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
-VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)