Add Boot Loader Menu Entry for S100 Z180 Monitor Invocation

Initial Support for Duodyne
Update S100 Monitor to v0.34
2026-02-07 06:53:13 -06:00 · 2023-07-25 16:47:51 -07:00 · 2023-07-24 19:24:49 -07:00 · 2023-07-22 18:56:37 -07:00 · 2023-07-17 14:52:14 -07:00 · 2023-07-10 13:16:24 -07:00
70 changed files with 7134 additions and 1539 deletions
--- a/Doc/ChangeLog.txt
+++ b/Doc/ChangeLog.txt
@@ -12,6 +12,11 @@ Version 3.3
 - WBW: Support for SyQuest SparQ Drive on PPI interface (much inspiration from Alan Cox)
 - WBW: Support for ATAPI Disk Drives (not CD-ROMs) on IDE and PPIDE interfaces
 - R?P: Added new disk images: Aztec C, MS BASIC Compiler, MS Fortran, Games, HiTech-C, Turbo Pascal, SLR Z80ASM
+- JBL: Added RCZ80 configuration for ColecoVision
+- WBW: Support for Z180 running interrupt mode 1
+- WBW: Preliminary support for S100 Computers Z180
+- WBW: Preliminary support for Dan Werner's ESP32 MBC Module
+- WBW: Early support for Duodyne base system (CPU/UART/ROM/RAM/RTC/SPK)

 Version 3.2.1
 -------------
--- a/Applications.pdf
+++ b/Applications.pdf
--- a/Catalog.pdf
+++ b/Catalog.pdf
--- a/Errata.pdf
+++ b/Errata.pdf
--- a/Applications.pdf
+++ b/Applications.pdf
--- a/Doc/RomWBW
+++ b/Doc/RomWBW
--- a/Doc/RomWBW
+++ b/Doc/RomWBW
--- a/ReadMe.md
+++ b/ReadMe.md
@@ -3,7 +3,7 @@
 **RomWBW ReadMe** \
 Version 3.3 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-20 Jun 2023
+07 Jul 2023

 # Overview

--- a/ReadMe.txt
+++ b/ReadMe.txt
@@ -1,6 +1,6 @@
 RomWBW ReadMe
 Wayne Warthen (wwarthen@gmail.com)
-20 Jun 2023
+07 Jul 2023



--- a/Source/Apps/Tune/tune.asm
+++ b/Source/Apps/Tune/tune.asm
@@ -629,6 +629,9 @@ CFGTBL:	;	PLT	RSEL	RDAT	RIN	Z180	ACR
 ;
 	.DB	13,	$A0,	$A1,	$A0,	$FF,	$A2	; MBC
 	.DW	HWSTR_MBC
+;
+	.DB	17,	$A0,	$A1,	$A0,	$FF,	$A2	; DUODYNE
+	.DW	HWSTR_DUO
 ;
 	.DB	$FF					; END OF TABLE MARKER
 ;
@@ -682,6 +685,7 @@ HWSTR_RCEB6	.DB	"RCBus Sound Module (EBv6)",0
 HWSTR_RCMF	.DB	"RCBus Sound Module (MF)",0
 HWSTR_LINC	.DB	"Z50 LiNC Sound Module",0
 HWSTR_MBC	.DB	"NHYODYNE Sound Module",0
+HWSTR_DUO	.DB	"DUODYNE Sound Module",0

 MSGUNSUP	.db	"MYM files not supported with HBIOS yet!\r\n", 0

--- a/Source/Apps/rtc.asm
+++ b/Source/Apps/rtc.asm
@@ -31,6 +31,8 @@
 ;
 ;[2022/03/27] v1.8 Support RHYOPHYRE
 ;
+;[2023/07/07] v1.9 Support DUODYNE
+;
 ; Constants
 ;
 mask_data	.EQU	%10000000	; RTC data line
@@ -49,6 +51,7 @@ PORT_DYNO	.EQU	$0C		; RTC port for DYNO
 PORT_RCZ280	.EQU	$C0		; RTC port for RCZ280
 PORT_MBC	.EQU	$70		; RTC port for MBC
 PORT_RPH	.EQU	$84		; RTC port for RHYOPHYRE
+PORT_DUO	.EQU	$94		; RTC port for DUODYNE


 BDOS		.EQU	5		; BDOS invocation vector
@@ -1079,61 +1082,66 @@ HINIT:
 	LD	C,PORT_SBC
 	LD	DE,PLT_SBC
 	CP	$01		; SBC
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 	CP	$02		; ZETA
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 	CP	$03		; ZETA 2
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_N8
 	LD	DE,PLT_N8
 	CP	$04		; N8
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_MK4
 	LD	DE,PLT_MK4
 	CP	$05		; Mark IV
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_RCZ80
 	LD	DE,PLT_RCZ80
 	CP	$07		; RCBus w/ Z80
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_RCZ180
 	LD	DE,PLT_RCZ180
 	CP	$08		; RCBus w/ Z180
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_EZZ80
 	LD	DE,PLT_EZZ80
 	CP	$09		; Easy Z80
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_SCZ180
 	LD	DE,PLT_SCZ180
 	CP	$0A		; SCZ180
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_DYNO
 	LD	DE,PLT_DYNO
 	CP	11		; DYNO
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_RCZ280
 	LD	DE,PLT_RCZ280
 	CP	12		; RCZ280
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_MBC
 	LD	DE,PLT_MBC
 	CP	13		; MBC
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
 ;
 	LD	C,PORT_RPH
 	LD	DE,PLT_RPH
 	CP	14		; RHYOPHYRE
-	JR	Z,RTC_INIT2
+	JP	Z,RTC_INIT2
+;
+	LD	C,PORT_DUO
+	LD	DE,PLT_DUO
+	CP	17		; DUODYNE
+	JP	Z,RTC_INIT2
 ;
 	; Unknown platform
 	LD	DE,PLTERR	; BIOS error message
@@ -1630,7 +1638,7 @@ TESTING_BIT_DELAY_OVER:

 RTC_HELP_MSG:
 	.DB	0Ah, 0Dh		; line feed and carriage return
-	.TEXT	"RTC: Version 1.8"
+	.TEXT	"RTC: Version 1.9"
 	.DB	0Ah, 0Dh		; line feed and carriage return
 	.TEXT	"Commands: E)xit T)ime st(A)rt S)et R)aw L)oop C)harge N)ocharge D)elay I)nit G)et P)ut B)oot W)arm-start H)elp"
 	.DB	0Ah, 0Dh		; line feed and carriage return
@@ -1760,6 +1768,7 @@ PLT_DYNO	.TEXT	", DYNO RTC Module Latch Port 0x0C\r\n$"
 PLT_RCZ280	.TEXT	", RCBus Z280 RTC Module Latch Port 0xC0\r\n$"
 PLT_MBC		.TEXT	", MBC RTC Latch Port 0x70\r\n$"
 PLT_RPH		.TEXT	", RHYOPHYRE RTC Latch Port 0x84\r\n$"
+PLT_DUO		.TEXT	", DUODYNE RTC Latch Port 0x70\r\n$"

 ;
 ; Generic FOR-NEXT loop algorithm
--- a/Source/Doc/SystemGuide.md
+++ b/Source/Doc/SystemGuide.md
@@ -1009,6 +1009,198 @@ used.

 `\clearpage`{=latex}

+## Display Keypad (DSKY)
+
+The Display Keypad functions provide read/write access to a segment
+style display and associated hex keypad.
+
+HBIOS only supports a single DSKY device since there is no reason to have
+more than one at a time.  The DSKY unit is assigned a Device Type ID 
+which indicates the specific hardware device driver that handles the 
+unit.  The table below enumerates these values.
+
+| **Device Type** | **ID** | **Description**                          | **Driver** |
+|-----------------|-------:|------------------------------------------|------------|
+| DSKYDEV_ICM     | 0x00   | Original ICM7218 based DSKY              | icm.asm    |
+| DSKYDEV_PKD     | 0x10   | Next Gen Intel P8279 based DSKY          | pkd.asm    |
+
+When segment display function encodes the display data in a byte per
+character format.  Currently, all segment displays are exactly
+8 charadcters and this is assumed in API calls.  The encoding of each
+byte is as shown below:
+
+```
+  +---01---+
+  |        |
+  20      02
+  |        |
+  +---40---+
+  |        |
+  10      04
+  |        |
+  +---08---+  80
+```
+
+The keypad keys are identified by the following key ids.  Not all
+keypads will contain all keys.
+
+| **Key Id** | **Key Definition** | **Key Id** | **Key Definition** |
+|------------|--------------------|------------|--------------------|
+| $00        | Hex Numeric 0      | $10        | Forward            |
+| $01        | Hex Numeric 1      | $11        | Backward           |
+| $02        | Hex Numeric 2      | $12        | Clear              |
+| $03        | Hex Numeric 3      | $13        | Enter              |
+| $04        | Hex Numeric 4      | $14        | Deposit            |
+| $05        | Hex Numeric 5      | $15        | Examine            |
+| $06        | Hex Numeric 6      | $16        | Go                 |
+| $07        | Hex Numeric 7      | $17        | Boot               |
+| $08        | Hex Numeric 8      | $18        | F4                 |
+| $09        | Hex Numeric 9      | $19        | F3                 |
+| $0A        | Hex Numeric A      | $1A        | F2                 |
+| $0B        | Hex Numeric B      | $1B        | F1                 |
+| $0C        | Hex Numeric C      |            |                    |
+| $0D        | Hex Numeric D      |            |                    |
+| $0E        | Hex Numeric E      |            |                    |
+| $0F        | Hex Numeric F      |            |                    |
+
+### Function 0x30 -- DSKY Reset (DSKYRESET)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x30                                | A: Status                              |
+
+This function performs a device dependent reset operation on the DSKY.
+The display will be cleared, keyboard queue will be flushed, and
+chip will be reinitialized.  The returned Status (A) is a standard 
+HBIOS result code.
+
+### Function 0x31 -- DSKY (DSKYSTATUS)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x31                                | A: Status / Characters Pending         |
+
+Return the count of Characters Pending (A) in the input buffer of the 
+DSKY.  If the unit has no input buffer or the 
+buffer utilization is not available, the function may return simply 0 or
+1 where 0 means there is no character available and 1 means there is at
+least one character available.
+
+The value returned in register A is used as both a Status (A) code and 
+the return value. Negative values (bit 7 set) indicate a standard HBIOS 
+result (error) code.  Otherwise, the return value represents the number 
+of characters in the buffer.
+
+### Function 0x32 -- DSKY Get Key (DSKYGETKEY)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x32                                | A: Status                              |
+|                                        | E: Character Value                     |
+
+Read and return a Character (E) from the DSKY.
+If no character(s) are available in the unit's input buffer, this 
+function will wait indefinitely.  The returned Status (A) is a standard 
+HBIOS result code.
+
+The Character Value (E) returned is not ASCII.  It is a keypad key
+id.  The possible id values are listed at the start of this section.
+
+### Function 0x33 -- DSKY Show HEX (RTCSHOWHEX)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x33                                | A: Status                              |
+| DE:HL=Binary Value                     |                                        |
+
+Display the 32-bit binary value (DE:HL) in hex on the DSKY segment
+display.  All decimal points of the display will be off.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x34 -- DSKY Show Segments (DSKYSHOWSEG)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x34                                | A: Status                              |
+| HL: Buffer Address                     |                                        |
+
+Display the segment-encoded values on the segment display.  The encoding
+is defined at the start of this section.  The entire displa is updated
+and it is assumed that an 8 character buffer will be pointed to by HL.
+The buffer must reside in high memory.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x35 -- DSKY Keypad LEDs (DSKYKEYLEDS)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x35                                | A: Status                              |
+| HL: Buffer Address                     |                                        |
+
+Light the LEDs for the keypad keys according to the
+bitmap contained in the buffer pointed to by HL.  The buffer
+must be located in high memory and is assumed to be 8 bytes.
+
+At this time, the bitmap is specific to the PKD hardware.
+This function is ignored by the ICM hardware.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x36 -- DSKY Status LED (DSKYSTATLED)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x36                                | A: Status                              |
+| D: LED Number                          |                                        |
+| E: LED State                           |                                        |
+
+Set or clear the status LED specified in D.  The state of
+the LED is contained in E.  If E=0, the LED will be turned
+off.  If E=1, the LED will be turned on.
+
+This function is specific to the PKD hardware.  It will be ignored
+by the ICM hardware.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x37 -- DSKY Beep (DSKYBEEP)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x37                                | A: Status                              |
+
+Beep the onboard speaker of the DSKY.
+This function is specific to the PKD hardware.  It will be ignored
+by the ICM hardware.
+The Status (A) is a standard HBIOS result code.
+
+### Function 0x38 -- DSKY Device (DSKYDEVICE)
+
+| **Entry Parameters**                   | **Returned Values**                    |
+|----------------------------------------|----------------------------------------|
+| B: 0x38                                | A: Status                              |
+|                                        | C: Device Attributes                   |
+|                                        | D: Device Type                         |
+|                                        | E: Device Number                       |
+|                                        | H: Device Unit Mode                    |
+|                                        | L: Device I/O Base Address             |
+
+Returns device information for the DSKY unit.  The Status (A) is a 
+standard HBIOS result code.
+
+Device Attribute (C) values are not yet defined.  Device Type (D) 
+indicates the specific hardware driver that handles the specified 
+character unit.  Values are listed at the start of this section. Device 
+Number (E) indicates the physical device number assigned per driver 
+which is always 0 for DSKY.
+
+Device Mode (H) is used to indicate the variant of the chip or circuit 
+that is used by the specified unit.  The Device I/O Base Address (L) 
+indicates the starting port address of the hardware interface that is 
+servicing the specified unit.  Both of these values are considered 
+driver specific.  Refer to the associated hardware driver for the values
+used.
+
+`\clearpage`{=latex}
+
 ## Video Display Adapter (VDA)

 The VDA functions are provided as a common interface to Video Display
@@ -1760,6 +1952,9 @@ The hardware Platform (L) is identified as follows:
 | PLT_RCZ280    |12      | RCBUS W/ Z280                           |
 | PLT_MBC       |13      | NHYODYNE MULTI-BOARD COMPUTER           |
 | PLT_RPH       |14      | RHYOPHYRE GRAPHICS SBC                  |
+| PLT_Z80RETRO  |15      | Z80 RETRO COMPUTER                      |
+| PLT_S100      |16      | S100 COMPUTERS Z180                     |
+| PLT_DUO       |17      | DUODYNE Z80 SYSTEM                      |

 ### Function 0xF2 -- System Set Bank (SYSSETBNK)

--- a/Source/Doc/UserGuide.md
+++ b/Source/Doc/UserGuide.md
@@ -202,6 +202,8 @@ below, **carefully** pick the appropriate ROM image for your hardware.
 | [Z280 ZZRCC CPU Module]^7^                                     | RCBus   | RCZ280_zzrc.rom    | 115200        |
 | [Z280 ZZ80MB SBC]^7^                                           | RCBus   | RCZ280_zz80mb.rom  | 115200        |
 | [Z80-Retro SBC]^8^                                             | -       | Z80RETRO_std.rom   | 38400         |
+| [S100 Computers Z180]^9^                                       | S100    | S100_std.rom       | 38400         |
+| [Duodyne Z80 System]^1^                                        | Duo     | DUO_std.rom        | 38400         |

 | ^1^Designed by Andrew Lynch
 | ^2^Designed by Sergey Kiselev
@@ -211,6 +213,7 @@ below, **carefully** pick the appropriate ROM image for your hardware.
 | ^6^Designed by Steve Garcia
 | ^7^Designed by Bill Shen
 | ^8^Designed by Peter Wilson
+| ^9^Designed by John Monahan

 RCBus refers to Spencer Owen's RC2014 bus specification and derivatives
 including RC26, RC40, RC80, and BP80.
@@ -3927,6 +3930,52 @@ the RomWBW HBIOS configuration.

 `\clearpage`{=latex}

+### S100 Computers Z180
+
+|                   |               |
+|-------------------|---------------|
+| ROM Image File    | S100_std.rom  |
+| Console Baud Rate | 38400         |
+| Interrupts        | Mode 2        |
+
+ - CPU speed assumed to be 18.432 MHz
+ - System timer is generated by Z180 CPU
+ - Hardware auto-detected:
+   - Interrupt-driven RTC
+   - Z180 ASCI Serial Ports
+   - Onboard SD Card Interface
+
+`\clearpage`{=latex}
+
+### Duodyne Z80 System
+
+|                   |               |
+|-------------------|---------------|
+| ROM Image File    | DUO_std.rom   |
+| Console Baud Rate | 38400         |
+| Interrupts        | None          |
+
+ - CPU speed is detected at startup if DS1302 RTC is active
+   - Otherwise 8.000 MHz assumed
+ - System timer is generated by CTC if available
+ - Hardware auto-detected:
+   - DS1302 RTC
+   - Zilog CTC
+   - Zilog DMA Module
+   - UART Serial Adapter
+   - SIO Serial Interface
+   - LPT Printer Interface
+   - Zilog Parallel Interface
+   - CVDU Display Adapter
+   - TMS9938/58 Display Adapter
+   - PS/2 Keyboard Interface
+   - AY-3-8910/YM2149 Sound Module
+   - Floppy Disk Controller w/ 3.5" HD Drives
+   - PPIDE Hard Disk Interface
+ - Interrupts may be enabled in build options
+
+`\clearpage`{=latex}
+
 ## Appendix B - Device Summary

 The table below briefly describes each of the possible devices that
@@ -3943,7 +3992,6 @@ may be discovered by RomWBW in your system.
 | DMA       | System   | Zilog DMA Controller                                   |
 | DS1307    | RTC      | Maxim DS1307 PCF I2C Real-Time Clock w/ NVRAM          |
 | DS1501RTC | RTC      | Maxim DS1501/DS1511 Watchdog Real-Time Clock           |
-| DSKY      | System   | Keypad & Display                                       |
 | DSRTC     | RTC      | Maxim DS1302 Real-Time Clock w/ NVRAM                  |
 | DUART     | Char     | SCC2681 or compatible Dual UART                        |
 | EMM       | Disk     | Disk drive on Parallel Port emm interface (Zip Drive)  |
@@ -3951,6 +3999,7 @@ may be discovered by RomWBW in your system.
 | GDC       | Video    | uPD7220 Video Display Controller                       |
 | HDSK      | Disk     | SIMH Simulator Hard Disk                               |
 | IDE       | Disk     | IDE/ATA Hard Disk Interface                            |
+| ICM       | DsKy     | ICM7218-based Display/Keypad on PPI                    |
 | IMM       | Disk     | IMM Zip Drive on PPI                                   |
 | INTRTC    | RTC      | Interrupt-based Real Time Clock                        |
 | KBD       | Kbd      | 8242 PS/2 Keyboard Controller                          |
@@ -3960,6 +4009,7 @@ may be discovered by RomWBW in your system.
 | MSXKYB    | Kbd      | MSX Compliant Matrix Keyboard                          |
 | I2C       | System   | I2C Interface                                          |
 | PIO       | Char     | Zilog Parallel Interface Controller                    |
+| PKD       | DsKy     | P8279-based Display/Keypad on PPI                      |
 | PPIDE     | Disk     | 8255 IDE/ATA Hard Disk Interface                       |
 | PPA       | Disk     | PPA Zip Drive on PPI                                   |
 | PPK       | Kbd      | Matrix Keyboard                                        |
--- a/Source/HBIOS/API.txt
+++ b/Source/HBIOS/API.txt
@@ -484,3 +484,93 @@ TERM_ATTACH: (C=VIDEO UNIT, DE=<VDA>_DISPATCH)
  - QUERY ATTACHED VDA FOR SCREEN SIZE (VIA <EMU>_VDADISP)
  - INITIALIZE ALL WORKING VARIABLES AND EMULATOR STATE
  - RETURN (A=STATUS)
+
+
+==============
+DSKY Functions
+==============
+
+RESET ($30):
+  B=Function				A=Result
+
+STAT ($31):
+  B=Function				A=Result / Bytes Pending
+
+  A=Number of characters waiting or error code if negative
+
+GETKEY ($32):
+  B=Function				A=Result
+					E=Key Code
+
+  A=DSKY key value or error code if negative
+
+SHOWHEX ($33):
+  B=Function				A=Result
+  DE:HL=Value (32-bit)
+
+  Display value of DE:HL in hex on display.  It is not
+  possible to show decimal points.
+
+SHOWSEG ($34):
+  B=Function				A=Result
+  HL=Buffer (raw segment encoded)
+  
+  Display raw segment values.  Each byte represents one
+  character.  Each segment of the character is represented
+  by a bit.  The buffer must be located in high memory.
+  The segments are encoded as shown below:
+  
+  +--01--+
+  20    02
+  +--40--+
+  10    04
+  +--08--+  80
+  
+KEYLEDS ($35):
+  B=Function				A=Result
+  HL=Buffer (LED bitmap)
+  
+  Light the LEDs for the keypad keys according to the
+  bitmap contained in the buffer pointed to by HL.  The buffer
+  must be located in high memory.
+  
+  At this time, the bitmap is specific to the DSKYNG hardware.
+  This function is ignored by the original DSKY.
+
+STATLED ($36):
+  B=Function				A=Result
+  D=LED Number
+  E=LED State (0/1)
+  
+  Set or clear the status LED specified in D.  The state of
+  the LED is contained in E.  If E=0, the LED will be turned
+  off.  If E=1, the LED will be turned on.
+
+BEEP ($37):
+  B=Function				A=Result
+
+  Beep the onboard speaker of the DSKY.  Only the DSKYNG hardware
+  has a speaker.  This function will be ignored by the original
+  DSKY.
+
+DEVICE ($38):
+  B=Function				A=Result
+					D=Device Type
+					E=Device Number
+					C=Device Attributes
+					H=Device Mode
+					L=Base I/O Adr
+
+  Returns device information for the DSKY unit. The Status (A) is a 
+  standard HBIOS result code. Device Attribute (C) values are not yet 
+  defined. Device Type (D) indicates the specific hardware driver that 
+  handles the specified character unit. Values are listed at the start
+  of this section. Device Number (E) indicates the physical device
+  number assigned per driver which is always 0 for DSKY.
+
+  Device Mode (H) is used to indicate the variant of the chip or circuit 
+  that is used by the specified unit. The Device I/O Base Address (L) 
+  indicates the starting port address of the hardware interface that is 
+  servicing the specified unit. Both of these values are considered 
+  driver specific. Refer to the associated hardware driver for the
+  values used.
--- a/Source/HBIOS/Build.cmd
+++ b/Source/HBIOS/Build.cmd
@@ -93,7 +93,14 @@ call :asm imgpad2 || exit /b

 copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin + ..\cpm22\cpm_wbw.bin osimg.bin || exit /b
 copy /b ..\Forth\camel80.bin + nascom.bin + ..\tastybasic\src\tastybasic.bin + game.bin + eastaegg.bin + netboot.mod + updater.bin + usrrom.bin osimg1.bin || exit /b
-copy /b imgpad2.bin osimg2.bin || exit /b
+
+if %Platform%==S100 (
+    zxcc slr180 -s100mon/fh
+    zxcc mload25 -s100mon || exit /b
+    copy /b s100mon.com osimg2.bin || exit /b
+) else (
+    copy /b imgpad2.bin osimg2.bin || exit /b
+)

 copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin osimg_small.bin || exit /b

@@ -224,5 +231,7 @@ call Build DYNO std || exit /b
 call Build UNA std || exit /b
 call Build RPH std || exit /b
 call Build Z80RETRO std || exit /b
+call Build S100 std || exit /b
+call Build DUO std || exit /b

 goto :eof
--- a/Source/HBIOS/Build.ps1
+++ b/Source/HBIOS/Build.ps1
@@ -27,8 +27,8 @@ $ErrorAction = 'Stop'
 # UNA BIOS is simply imbedded, it is not built here.
 #

-$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "Z80RETRO", "UNA"
-$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH"
+$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "Z80RETRO", "DUO", "UNA"
+$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH", "S100"
 $PlatformListZ280 = "RCZ280"

 #
--- a/Source/HBIOS/Build.sh
+++ b/Source/HBIOS/Build.sh
@@ -32,11 +32,13 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	ROM_PLATFORM="SBC"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="SBC"; ROM_CONFIG="simh"; bash Build.sh
 	ROM_PLATFORM="MBC"; ROM_CONFIG="std"; bash Build.sh
+	ROM_PLATFORM="DUO"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc126"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc130"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc131"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc140"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc503"; bash Build.sh
+	ROM_PLATFORM="S100"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="UNA"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="Z80RETRO"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="ZETA"; ROM_CONFIG="std"; bash Build.sh
--- a/Source/HBIOS/Clean.cmd
+++ b/Source/HBIOS/Clean.cmd
@@ -11,6 +11,7 @@ if exist *.exp del *.exp
 if exist *.tmp del *.tmp
 if exist *.mrk del *.mrk
 if exist *.sys del *.sys
+if exist *.hex del *.hex
 if exist build.inc del build.inc
 if exist font*.asm del font*.asm
 if exist build_env.cmd del build_env.cmd
--- a/Source/HBIOS/Config/DUO_std.asm
+++ b/Source/HBIOS/Config/DUO_std.asm
@@ -0,0 +1,44 @@
+;
+;==================================================================================================
+;   DUODYNE STANDARD CONFIGURATION
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_duo.asm"
+;
+CPUOSC		.SET	8000000		; CPU OSC FREQ IN MHZ
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+INTMODE		.SET	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+;
+DMAENABLE	.SET	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+;
+BATCOND		.SET	TRUE		; ENABLE LOW BATTERY WARNING MESSAGE
+;
+ROMSIZE		.SET	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+;
+MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+;UARTCFG	.SET	UARTCFG | SER_RTS
--- a/Source/HBIOS/Config/MBC_std.asm
+++ b/Source/HBIOS/Config/MBC_std.asm
@@ -42,12 +42,15 @@ RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ;
 MDFFENABLE	.SET	FALSE		; MD: ENABLE FLASH FILE SYSTEM
 ;
-DSKYENABLE	.SET	FALSE		; ENABLES DSKY
-DSKYMODE	.SET	DSKYMODE_NG	; DSKY VERSION: DSKYMODE_[V1|NG]
+DSKYENABLE	.SET	TRUE		; ENABLES DSKY FUNCTIONALITY
+ICMENABLE	.SET	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+PKDENABLE	.SET	TRUE		; ENABLES DSKY NG PKD DRIVER (8259)
 ;
 UARTINTS	.SET	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 ;UARTCFG	.SET	UARTCFG | SER_RTS
 ;
+ESPENABLE	.SET	TRUE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 LPTENABLE	.SET	TRUE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
 ;
 CVDUMON		.SET	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
--- a/Source/HBIOS/Config/RCZ280_zz80mb.asm
+++ b/Source/HBIOS/Config/RCZ280_zz80mb.asm
@@ -28,7 +28,7 @@
 ;
 #include "cfg_rcz280.asm"
 ;
-CPUOSC		.SET	12000000	; CPU OSC FREQ IN MHZ
+CPUOSC		.SET	24000000	; CPU OSC FREQ IN MHZ
 INTMODE		.SET	3		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
 CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
--- a/Source/HBIOS/Config/RCZ80_jbl.asm
+++ b/Source/HBIOS/Config/RCZ80_jbl.asm
@@ -0,0 +1,79 @@
+;
+;==================================================================================================
+;   RCBUS Z80 COLECOVISION-COMPATIBLE CONFIGURATION FOR J.B. LANGSTON'S GAME BOARDS
+;==================================================================================================
+;
+; THIS CONFIGURATION ENABLES DRIVERS FOR THE TMS9918 AND SN76489 BOARDS BY J.B. LANGSTON
+; AND THE YM2149 BOARD BY ED BRINDLEY. THE TMS9918 IS CONFIGURED TO USE THE COLECOVISION
+; PORTS AND HAS INTERRUPTS DISABLED BECAUSE COLECOVISION USES NMI, WHICH WOULD BREAK CP/M
+; WHEN ENABLED. IT IS CONFIGURED FOR A 3.686MHZ CPU CLOCK IN ORDER TO BE COMPATIBLE WITH
+; COLECOVISION GAMES. THE FIRST SIO PORT IS CONFIGURED TO RUN AT 115200 BPS WITH THE CPU
+; RUNNING AT THIS SPEED. THE SECOND SIO PORT IS CONFIGURED TO RUN AT 115200 BPS WITH THE
+; SECOND CLOCK SET TO 7.373MHZ. LOWER BAUD RATES CAN BE ACHIEVED ON THE SECOND PORT BY
+; MOVING THE SECONDARY CLOCK DIVIDER JUMPER (E.G., 38400 @ 2.458MHZ). THE BAUD RATE DOES
+; NOT NEED TO BE CHANGED IN THIS CONFIGURATION FILE IN ORDER TO DO THIS, BUT THE DEVICE
+; LIST WILL INCORRECTLY SHOW THE PORT RUNNING AT 115200 REGARDLESS OF THE CLOCK DIVIDER.
+; UNCOMMENT THE LINE THAT SETS BOOTCON TO 1 TO BOOT ON THE SECOND SIO PORT BY DEFAULT.
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	BOOT_DEFAULT	"Z"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_rcz80.asm"
+;
+CPUOSC		.SET	3686400		; CPU OSC FREQ IN MHZ
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;BOOTCON         .SET    1               ; BOOT CONSOLE DEVICE
+;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+RP5RTCENABLE	.SET	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+DUARTENABLE	.SET	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+;
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIODEBUG	.SET	FALSE		; SIO: ENABLE DEBUG OUTPUT
+SIOBOOT		.SET	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
+SIOCNT		.SET	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIO0MODE	.SET	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP]
+SIO0BASE	.SET	$80		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.SET	CPUOSC		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACFG	.SET	SER_115200_8N1	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACTCC	.SET	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.SET	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCFG	.SET	SER_115200_8N1	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCTCC	.SET	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+TMSENABLE	.SET	TRUE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+TMSMODE		.SET	TMSMODE_COLECO	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VDAEMU_SERKBD	.SET	1		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+AY38910ENABLE	.SET	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+SN76489ENABLE	.SET	TRUE		; SN: ENABLE SN76489 SOUND DRIVER
+;
+FDENABLE	.SET	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
--- a/Source/HBIOS/Config/S100_std.asm
+++ b/Source/HBIOS/Config/S100_std.asm
@@ -0,0 +1,47 @@
+;
+;==================================================================================================
+;   S100 STANDARD CONFIGURATION
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_s100.asm"
+;
+CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
+;
+Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
+Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+;
+DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
--- a/Source/HBIOS/Config/SBC_max.asm
+++ b/Source/HBIOS/Config/SBC_max.asm
@@ -39,6 +39,8 @@ FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 ;
 DSKYENABLE	.SET	TRUE		; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
+ICMENABLE	.SET	TRUE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+PKDENABLE	.SET	TRUE		; ENABLES DSKY NG PKD DRIVER (8259)
 ;
 DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 ;
--- a/Source/HBIOS/Makefile
+++ b/Source/HBIOS/Makefile
@@ -6,7 +6,7 @@ MOREDIFF = game.bin hbios_rom.bin nascom.bin usrrom.bin \
 SUBDIRS =
 DEST = ../../Binary
 TOOLS =../../Tools
-OTHERS =  *.img *.rom *.com *.upd *.bin *.z80 cpm.sys zsys.sys Build.inc font*.asm *.dat hbios_env.sh
+OTHERS =  *.img *.rom *.com *.upd *.bin *.hex cpm.sys zsys.sys Build.inc font*.asm *.dat hbios_env.sh

 # DIFFMAKE = 1

@@ -43,6 +43,10 @@ else
 	BIOS=wbw
 endif

+ifeq ($(ROM_PLATFORM),S100)
+	ROMDEPS += s100mon.bin
+endif
+
 ROMNAME=${ROM_PLATFORM}_${ROM_CONFIG}

 # $(info DEPS=$(DEPS))
@@ -58,7 +62,11 @@ $(OBJECTS) : $(ROMDEPS)
 	cat romldr.bin dbgmon.bin ../ZSDOS/zsys_$(BIOS).bin >osimg_small.bin
 	if [ $(ROM_PLATFORM) != UNA ] ; then \
 		cat camel80.bin nascom.bin tastybasic.bin game.bin eastaegg.bin netboot.mod updater.bin usrrom.bin >osimg1.bin ; \
-		cat imgpad2.bin >osimg2.bin ; \
+		if [ $(ROM_PLATFORM) = S100 ] ; then \
+			cat s100mon.bin >osimg2.bin ; \
+		else \
+			cat imgpad2.bin >osimg2.bin ; \
+		fi ; \
 		if [ $(ROMSIZE) -gt 0 ] ; then \
 			for f in hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ; do \
 				srec_cat $$f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $$f -Binary ; \
@@ -89,6 +97,10 @@ font%.asm:
 camel80.bin:
 	cp ../Forth/$@ .

+s100mon.bin:
+	$(ZXCC) $(CPM)/SLR180 -s100mon/FH
+	$(ZXCC) $(CPM)/MLOAD25 -s100mon.bin=s100mon
+
 tastybasic.bin:
 	cp ../TastyBasic/src/$@ .
 	
--- a/Source/HBIOS/asci.asm
+++ b/Source/HBIOS/asci.asm
@@ -81,7 +81,7 @@ ASCI_RTS	.EQU	%00010000	; ~RTS BIT OF CNTLA REG
 ;
 #IF (ASCIINTS)
 ;
-  #IF (INTMODE == 2)
+  #IF (INTMODE > 0)
 ;
 ASCI0_IVT	.EQU	IVT(INT_SER0)
 ASCI1_IVT	.EQU	IVT(INT_SER1)
@@ -125,25 +125,19 @@ ASCI_PREINIT2:
 ;
 #IF (ASCIINTS)
 ;
-  #IF (INTMODE >= 1)
+; Z180 ASCI INTERRUPTS OPERATE LIKE IM2 EVEN WHEN IM1 IS ACTIVE.
+;
+  #IF (INTMODE > 0)
 	; SETUP INT VECTORS AS APPROPRIATE
 	LD	A,(ASCI_DEV)		; GET DEVICE COUNT
 	OR	A			; SET FLAGS
 	JR	Z,ASCI_PREINIT3		; IF ZERO, NO ASCI DEVICES, ABORT
 ;
-    #IF (INTMODE == 1)
-	; ADD IM1 INT CALL LIST ENTRY
-	LD	HL,ASCI_INT		; GET INT VECTOR
-	CALL	HB_ADDIM1		; ADD TO IM1 CALL LIST
-    #ENDIF
-;
-    #IF (INTMODE == 2)
 	; SETUP IM2 VECTORS
 	LD	HL,ASCI_INT0
 	LD	(ASCI0_IVT),HL		; IVT INDEX
 	LD	HL,ASCI_INT1
 	LD	(ASCI1_IVT),HL		; IVT INDEX
-    #ENDIF
 ;
  #ENDIF
 ;
@@ -204,24 +198,6 @@ ASCI_INIT1:
 ;
  #IF (INTMODE > 0)
 ;
-; IM1 ENTRY POINT
-;
-ASCI_INT:
-	; CHECK/HANDLE FIRST PORT
-	LD	A,(ASCI0_CFG + 1)	; GET ASCI TYPE FOR FIRST ASCI
-	OR	A			; SET FLAGS
-	CALL	NZ,ASCI_INT0		; CALL IF EXISTS
-	RET	NZ			; DONE IF INT HANDLED
-;
-	; CHECK/HANDLE SECOND PORT
-	LD	A,(ASCI1_CFG + 1)	; GET ASCI TYPE FOR SECOND ASCI
-	OR	A			; SET FLAGS
-	CALL	NZ,ASCI_INT1		; CALL IF EXISTS
-;
-	RET				; DONE
-;
-; IM2 ENTRY POINTS
-;
 ASCI_INT0:
 	; INTERRUPT HANDLER FOR FIRST ASCI (ASCI0)
 	LD	IY,ASCI0_CFG		; POINT TO ASCI0 CFG
--- a/Source/HBIOS/cfg_duo.asm
+++ b/Source/HBIOS/cfg_duo.asm
@@ -0,0 +1,301 @@
+;
+;==================================================================================================
+;   ROMWBW 2.X CONFIGURATION DEFAULTS FOR DUODYNE
+;==================================================================================================
+;
+; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.	INSTEAD, YOU SHOULD
+; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
+; UNDER THIS DIRECTORY.
+;
+; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
+; FOR THE PLATFORM.
+;
+#DEFINE PLATFORM_NAME "Duodyne", " [", CONFIG, "]"
+;
+#INCLUDE "hbios.inc"
+;
+PLATFORM	.EQU	PLT_DUO		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
+CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
+BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
+BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
+HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
+USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
+TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
+;
+BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
+;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_UNSUP	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+CPUOSC		.EQU	8000000		; CPU OSC FREQ IN MHZ
+INTMODE		.EQU	0		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+;
+RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
+MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
+MPGSEL_0	.EQU	$50		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_1	.EQU	$51		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_2	.EQU	$52		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_3	.EQU	$53		; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
+MPGENA		.EQU	$54		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
+;
+RTCIO		.EQU	$94		; RTC LATCH REGISTER ADR
+;
+KIOENABLE	.EQU	FALSE		; ENABLE ZILOG KIO SUPPORT
+KIOBASE		.EQU	$80		; KIO BASE I/O ADDRESS
+;
+CTCENABLE	.EQU	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
+CTCBASE		.EQU	$B0		; CTC BASE I/O ADDRESS
+CTCTIMER	.EQU	TRUE		; ENABLE CTC PERIODIC TIMER
+CTCMODE		.EQU	CTCMODE_CTR	; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
+CTCPRE		.EQU	256		; PRESCALE CONSTANT (1-256)
+CTCPRECH	.EQU	2		; PRESCALE CHANNEL (0-3)
+CTCTIMCH	.EQU	3		; TIMER CHANNEL (0-3)
+CTCOSC		.EQU	(4915200/8)	; CTC CLOCK FREQUENCY
+;
+EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
+;
+SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
+;
+WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
+;
+FPLED_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	FALSE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
+;
+LEDENABLE	.EQU	TRUE		; ENABLES STATUS LED
+LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
+LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
+LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
+;
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
+;
+BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
+CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU		.EQU	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
+VDAEMU_SERKBD	.EQU	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+ANSITRACE	.EQU	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKTRACE	.EQU	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+KBDTRACE	.EQU	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKKBLOUT	.EQU	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+MKYENABLE	.EQU	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+MKYKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+;
+DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
+DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
+;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
+BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
+BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
+;
+INTRTCENABLE	.EQU	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+RP5RTCENABLE	.EQU	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+HTIMENABLE	.EQU	FALSE		; ENABLE SIMH TIMER SUPPORT
+SIMRTCENABLE	.EQU	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
+;
+DS7RTCENABLE	.EQU	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
+DS7RTCMODE	.EQU	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
+;
+DUARTENABLE	.EQU	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+;
+UARTENABLE	.EQU	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
+UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+UARTCFG		.EQU	DEFSERCFG	; UART: LINE CONFIG FOR UART PORTS
+UARTCASSPD	.EQU	SER_300_8N1	; UART: ECB CASSETTE UART DEFAULT SPEED
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
+UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
+UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
+UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
+UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
+UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	TRUE		; UART: AUTO-DETECT DUODYNE UART
+;
+ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+;
+Z2UENABLE	.EQU	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+;
+ACIAENABLE	.EQU	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+;
+SIOENABLE	.EQU	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
+SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
+SIOCNT		.EQU	1		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIO0MODE	.EQU	SIOMODE_ZP	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO0BASE	.EQU	$B0		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.EQU	(4915200/8)	; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACFG	.EQU	DEFSERCFG	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.EQU	(4915200/8)	; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCFG	.EQU	DEFSERCFG	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
+;
+VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
+VDUSIZ		.EQU	V80X25		; VDU: DISPLAY FORMAT [V80X24|V80X25|V80X30]
+CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
+CVDUMODE	.EQU	CVDUMODE_MBC	; CVDU: CVDU MODE: CVDUMODE_[NONE|ECB|MBC]
+CVDUMON		.EQU	CVDUMON_CGA	; CVDU: CVDU MONITOR SETUP: CVDUMON_[NONE|CGA|EGA]
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
+TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.EQU	TMSMODE_MBC	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+;
+MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
+MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+;
+FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.EQU	FDMODE_MBC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
+FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
+FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
+RFCNT		.EQU	1		; RF: NUMBER OF RAM FLOPPY UNITS (1-4)
+;
+IDEENABLE	.EQU	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDETRACE	.EQU	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IDECNT		.EQU	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
+IDE0MODE	.EQU	IDEMODE_DIO	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE0BASE	.EQU	$20		; IDE 0: IO BASE ADDRESS
+IDE0DATLO	.EQU	$20		; IDE 0: DATA LO PORT FOR 16-BIT I/O
+IDE0DATHI	.EQU	$28		; IDE 0: DATA HI PORT FOR 16-BIT I/O
+IDE0A8BIT	.EQU	FALSE		; IDE 0A (MASTER): 8 BIT XFER
+IDE0B8BIT	.EQU	FALSE		; IDE 0B (MASTER): 8 BIT XFER
+IDE1MODE	.EQU	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE1BASE	.EQU	$00		; IDE 1: IO BASE ADDRESS
+IDE1DATLO	.EQU	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
+IDE1DATHI	.EQU	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
+IDE1A8BIT	.EQU	TRUE		; IDE 1A (MASTER): 8 BIT XFER
+IDE1B8BIT	.EQU	TRUE		; IDE 1B (MASTER): 8 BIT XFER
+IDE2MODE	.EQU	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE2BASE	.EQU	$00		; IDE 2: IO BASE ADDRESS
+IDE2DATLO	.EQU	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
+IDE2DATHI	.EQU	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
+IDE2A8BIT	.EQU	TRUE		; IDE 2A (MASTER): 8 BIT XFER
+IDE2B8BIT	.EQU	TRUE		; IDE 2B (MASTER): 8 BIT XFER
+;
+PPIDEENABLE	.EQU	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPIDECNT	.EQU	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0BASE	.EQU	$60		; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
+PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1BASE	.EQU	$20		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE1A8BIT	.EQU	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
+PPIDE1B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2BASE	.EQU	$14		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
+PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+;
+SDENABLE	.EQU	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.EQU	SDMODE_JUHA	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
+SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
+SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
+;
+PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
+PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
+;
+PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
+;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
+HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
+HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_SPP	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.EQU	$E8		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$EC		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_SPP	; PPA: DRIVER MODE: PPAMODE_[NONE|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_SPP	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_SPP	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
+PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
+PIO4BASE	.EQU	$90		; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
+PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
+PIOZBASE	.EQU	$88		; PIO: PIO REGISTERS BASE ADR FOR ECB ZP BOARD
+PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
+PIOSBASE	.EQU	$60		; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
+;
+UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
+UFBASE		.EQU	$0C		; UF: REGISTERS BASE ADR
+;
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_NONE	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
+;
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
+AYMODE		.EQU	AYMODE_MBC	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
+;
+SPKENABLE	.EQU	TRUE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+;
+DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
+DMAMODE		.EQU	DMAMODE_MBC	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
+
--- a/Source/HBIOS/cfg_dyno.asm
+++ b/Source/HBIOS/cfg_dyno.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -133,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -243,6 +244,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
--- a/Source/HBIOS/cfg_master.asm
+++ b/Source/HBIOS/cfg_master.asm
@@ -12,7 +12,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -108,10 +108,13 @@ LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -166,6 +169,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -302,6 +306,9 @@ PPPSDENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER SD CARD SUPPORT
 PPPSDTRACE	.EQU	1		; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+ESPCONENABLE	.EQU	TRUE		; ESP: ENABLE ESP32 CONSOLE IO DRIVER VIDEO/KBD SUPPORT
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
--- a/Source/HBIOS/cfg_mbc.asm
+++ b/Source/HBIOS/cfg_mbc.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_MBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_MBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -73,10 +73,13 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -124,6 +127,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	TRUE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
@@ -226,6 +230,9 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+ESPCONENABLE	.EQU	TRUE		; ESP: ENABLE ESP32 CONSOLE IO DRIVER VIDEO/KBD SUPPORT
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
--- a/Source/HBIOS/cfg_mk4.asm
+++ b/Source/HBIOS/cfg_mk4.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -79,10 +79,13 @@ LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -130,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	TRUE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -240,6 +244,8 @@ PPPSDENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER SD CARD SUPPORT
 PPPSDTRACE	.EQU	1		; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
--- a/Source/HBIOS/cfg_n8.asm
+++ b/Source/HBIOS/cfg_n8.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -81,10 +81,13 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	N8_PPI0		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	N8_PPI0		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	N8_PPI0		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -132,6 +135,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	TRUE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -238,6 +242,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
--- a/Source/HBIOS/cfg_rcz180.asm
+++ b/Source/HBIOS/cfg_rcz180.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -139,6 +139,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -249,6 +250,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
--- a/Source/HBIOS/cfg_rcz280.asm
+++ b/Source/HBIOS/cfg_rcz280.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RCZ280	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_RCZ280	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z280	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -133,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
@@ -253,6 +254,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
--- a/Source/HBIOS/cfg_rcz80.asm
+++ b/Source/HBIOS/cfg_rcz80.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RCZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_RCZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -132,6 +132,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
@@ -247,6 +248,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
--- a/Source/HBIOS/cfg_rph.asm
+++ b/Source/HBIOS/cfg_rph.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_RPH		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_RPH		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	TRUE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -79,10 +79,13 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	RPH_PPI0		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	RPH_PPI0	; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	RPH_PPI0		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -130,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -227,6 +231,8 @@ PRPCONENABLE	.EQU	FALSE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
--- a/Source/HBIOS/cfg_s100.asm
+++ b/Source/HBIOS/cfg_s100.asm
@@ -0,0 +1,306 @@
+;
+;==================================================================================================
+;   ROMWBW 2.X CONFIGURATION DEFAULTS FOR S100 Z180
+;==================================================================================================
+;
+; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
+; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED.	INSTEAD, YOU SHOULD
+; OVERRIDE ANY SETTINGS YOU WANT USING A CONFIGURATION FILE IN THE CONFIG DIRECTORY
+; UNDER THIS DIRECTORY.
+;
+; THIS FILE CAN BE CONSIDERED A REFERENCE THAT LISTS ALL POSSIBLE CONFIGURATION SETTINGS
+; FOR THE PLATFORM.
+;
+#DEFINE PLATFORM_NAME "S100", " [", CONFIG, "]"
+;
+#INCLUDE "hbios.inc"
+;
+PLATFORM	.EQU	PLT_S100	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
+CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
+BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
+BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
+HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
+USELZSA2	.EQU	TRUE		; ENABLE FONT COMPRESSION
+TICKFREQ	.EQU	50		; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
+;
+BOOT_TIMEOUT	.EQU	-1		; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
+BOOT_DELAY	.EQU	0		; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
+;
+CPUSPDCAP	.EQU	SPD_FIXED	; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
+CPUSPDDEF	.EQU	SPD_HIGH	; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
+CPUOSC		.EQU	18432000	; CPU OSC FREQ IN MHZ
+INTMODE		.EQU	2		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
+DEFSERCFG	.EQU	SER_57600_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
+;
+RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
+MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
+RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)
+MPGSEL_3	.EQU	$7B		; Z2 MEM MGR BANK 3 PAGE SELECT REG (WRITE ONLY)
+MPGENA		.EQU	$7C		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
+;
+Z180_BASE	.EQU	$C0		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
+Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
+Z180_MEMWAIT	.EQU	0		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.EQU	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z180_TIMER	.EQU	TRUE		; Z180: ENABLE Z180 SYSTEM PERIODIC TIMER
+;
+RTCIO		.EQU	$0C		; RTC LATCH REGISTER ADR
+;
+KIOENABLE	.EQU	FALSE		; ENABLE ZILOG KIO SUPPORT
+KIOBASE		.EQU	$80		; KIO BASE I/O ADDRESS
+;
+CTCENABLE	.EQU	FALSE		; ENABLE ZILOG CTC SUPPORT
+CTCDEBUG	.EQU	FALSE		; ENABLE CTC DRIVER DEBUG OUTPUT
+CTCBASE		.EQU	$88		; CTC BASE I/O ADDRESS
+CTCTIMER	.EQU	FALSE		; ENABLE CTC PERIODIC TIMER
+;
+EIPCENABLE	.EQU	FALSE		; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
+;
+SKZENABLE	.EQU	FALSE		; ENABLE SERGEY'S Z80-512K FEATURES
+;
+WDOGMODE	.EQU	WDOG_NONE	; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
+;
+FPLED_ENABLE	.EQU	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.EQU	$00		; FP: PORT ADDRESS FOR FP LEDS
+FPLED_DSKACT	.EQU	TRUE		; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
+FPSW_ENABLE	.EQU	FALSE		; FP: ENABLES FRONT PANEL SWITCHES
+FPSW_IO		.EQU	$00		; FP: PORT ADDRESS FOR FP SWITCHES
+;
+DIAGLVL		.EQU	DL_CRITICAL	; ERROR LEVEL REPORTING
+;
+LEDENABLE	.EQU	FALSE		; ENABLES STATUS LED (SINGLE LED)
+LEDMODE		.EQU	LEDMODE_STD	; LEDMODE_[STD|RTC]
+LEDPORT		.EQU	$0E		; STATUS LED PORT ADDRESS
+LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
+;
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY (DO NOT COMBINE WITH PPIDE)
+;
+BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
+CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+VDAEMU		.EQU	EMUTYP_ANSI	; VDA EMULATION: EMUTYP_[TTY|ANSI]
+VDAEMU_SERKBD	.EQU	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+ANSITRACE	.EQU	1		; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKTRACE	.EQU	1		; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+KBDTRACE	.EQU	1		; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPKKBLOUT	.EQU	KBD_US		; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
+KBDKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+MKYENABLE	.EQU	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+MKYKBLOUT	.EQU	KBD_US		; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
+;
+DSRTCENABLE	.EQU	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+DSRTCMODE	.EQU	DSRTCMODE_STD	; DSRTC: OPERATING MODE: DSRTC_[STD|MFPIC]
+DSRTCCHG	.EQU	FALSE		; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
+;
+DS1501RTCENABLE	.EQU	FALSE		; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
+DS1501RTC_BASE	.EQU	$50		; DS1501RTC: I/O BASE ADDRESS
+;
+BQRTCENABLE	.EQU	FALSE		; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
+BQRTC_BASE	.EQU	$50		; BQRTC: I/O BASE ADDRESS
+;
+INTRTCENABLE	.EQU	FALSE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+RP5RTCENABLE	.EQU	FALSE		; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
+;
+HTIMENABLE	.EQU	FALSE		; ENABLE SIMH TIMER SUPPORT
+SIMRTCENABLE	.EQU	FALSE		; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
+;
+DS7RTCENABLE	.EQU	FALSE		; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
+DS7RTCMODE	.EQU	DS7RTCMODE_PCF	; DS7RTC: OPERATING MODE: DS7RTC_[PCF]
+;
+DUARTENABLE	.EQU	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
+DUARTCNT	.EQU	1		; DUART: NUMBER OF CHIPS TO DETECT (1-2)
+DUART0BASE	.EQU	$A0		; DUART 0: BASE ADDRESS OF CHIP
+DUART0ACFG	.EQU	DEFSERCFG	; DUART 0A: SERIAL LINE CONFIG
+DUART0BCFG	.EQU	DEFSERCFG	; DUART 0B: SERIAL LINE CONFIG
+DUART1BASE	.EQU	$40		; DUART 1: BASE ADDRESS OF CHIP
+DUART1ACFG	.EQU	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
+DUART1BCFG	.EQU	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
+;
+UARTENABLE	.EQU	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
+UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+UARTCFG		.EQU	DEFSERCFG | SER_RTS	; UART: LINE CONFIG FOR UART PORTS
+UARTSBC		.EQU	FALSE		; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
+UARTSBCFORCE	.EQU	FALSE		; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
+UARTCAS		.EQU	FALSE		; UART: AUTO-DETECT ECB CASSETTE UART
+UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
+UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
+UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
+UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
+;
+ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
+ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
+ASCIBOOT	.EQU	0		; ASCI: REBOOT ON RCV CHAR (0=DISABLED)
+ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
+ASCI1CFG	.EQU	DEFSERCFG	; ASCI 1: SERIAL LINE CONFIG
+;
+Z2UENABLE	.EQU	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+;
+ACIAENABLE	.EQU	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+;
+SIOENABLE	.EQU	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
+SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
+SIOCNT		.EQU	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+SIO0MODE	.EQU	SIOMODE_RC	; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO0BASE	.EQU	$80		; SIO 0: REGISTERS BASE ADR
+SIO0ACLK	.EQU	7372800		; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0ACFG	.EQU	SER_115200_8N1	; SIO 0A: SERIAL LINE CONFIG
+SIO0ACTCC	.EQU	-1		; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO0BCLK	.EQU	7372800		; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO0BCFG	.EQU	SER_115200_8N1	; SIO 0B: SERIAL LINE CONFIG
+SIO0BCTCC	.EQU	-1		; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1MODE	.EQU	SIOMODE_RC	; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
+SIO1BASE	.EQU	$84		; SIO 1: REGISTERS BASE ADR
+SIO1ACLK	.EQU	7372800		; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1ACFG	.EQU	SER_115200_8N1	; SIO 1A: SERIAL LINE CONFIG
+SIO1ACTCC	.EQU	-1		; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+SIO1BCLK	.EQU	7372800		; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
+SIO1BCFG	.EQU	SER_115200_8N1	; SIO 1B: SERIAL LINE CONFIG
+SIO1BCTCC	.EQU	-1		; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
+;
+XIOCFG		.EQU	DEFSERCFG	; XIO: SERIAL LINE CONFIG
+;
+VDUENABLE	.EQU	FALSE		; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
+CVDUENABLE	.EQU	FALSE		; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
+GDCENABLE	.EQU	FALSE		; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
+TMSENABLE	.EQU	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
+VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+;
+MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
+MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK
+MDRAM		.EQU	TRUE		; MD: ENABLE RAM DISK
+MDTRACE		.EQU	1		; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+MDFFENABLE	.EQU	FALSE		; MD: ENABLE FLASH FILE SYSTEM
+;
+FDENABLE	.EQU	FALSE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.EQU	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
+FDCNT		.EQU	2		; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
+FDTRACE		.EQU	1		; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
+FDMAUTO		.EQU	TRUE		; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
+FD0TYPE		.EQU	FDT_3HD		; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+FD1TYPE		.EQU	FDT_3HD		; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
+;
+RFENABLE	.EQU	FALSE		; RF: ENABLE RAM FLOPPY DRIVER
+;
+IDEENABLE	.EQU	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+IDETRACE	.EQU	1		; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IDECNT		.EQU	1		; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
+IDE0MODE	.EQU	IDEMODE_RC	; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE0BASE	.EQU	$10		; IDE 0: IO BASE ADDRESS
+IDE0DATLO	.EQU	$00		; IDE 0: DATA LO PORT FOR 16-BIT I/O
+IDE0DATHI	.EQU	$00		; IDE 0: DATA HI PORT FOR 16-BIT I/O
+IDE0A8BIT	.EQU	TRUE		; IDE 0A (MASTER): 8 BIT XFER
+IDE0B8BIT	.EQU	TRUE		; IDE 0B (MASTER): 8 BIT XFER
+IDE1MODE	.EQU	IDEMODE_NONE	; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE1BASE	.EQU	$00		; IDE 1: IO BASE ADDRESS
+IDE1DATLO	.EQU	$00		; IDE 1: DATA LO PORT FOR 16-BIT I/O
+IDE1DATHI	.EQU	$00		; IDE 1: DATA HI PORT FOR 16-BIT I/O
+IDE1A8BIT	.EQU	TRUE		; IDE 1A (MASTER): 8 BIT XFER
+IDE1B8BIT	.EQU	TRUE		; IDE 1B (MASTER): 8 BIT XFER
+IDE2MODE	.EQU	IDEMODE_NONE	; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC]
+IDE2BASE	.EQU	$00		; IDE 2: IO BASE ADDRESS
+IDE2DATLO	.EQU	$00		; IDE 2: DATA LO PORT FOR 16-BIT I/O
+IDE2DATHI	.EQU	$00		; IDE 2: DATA HI PORT FOR 16-BIT I/O
+IDE2A8BIT	.EQU	TRUE		; IDE 2A (MASTER): 8 BIT XFER
+IDE2B8BIT	.EQU	TRUE		; IDE 2B (MASTER): 8 BIT XFER
+;
+PPIDEENABLE	.EQU	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+PPIDETRACE	.EQU	1		; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPIDECNT	.EQU	1		; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
+PPIDE0BASE	.EQU	$20		; PPIDE 0: PPI REGISTERS BASE ADR
+PPIDE0A8BIT	.EQU	FALSE		; PPIDE 0A (MASTER): 8 BIT XFER
+PPIDE0B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE1BASE	.EQU	$00		; PPIDE 1: PPI REGISTERS BASE ADR
+PPIDE1A8BIT	.EQU	FALSE		; PPIDE 1A (MASTER): 8 BIT XFER
+PPIDE1B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+PPIDE2BASE	.EQU	$00		; PPIDE 2: PPI REGISTERS BASE ADR
+PPIDE2A8BIT	.EQU	FALSE		; PPIDE 2A (MASTER): 8 BIT XFER
+PPIDE2B8BIT	.EQU	FALSE		; PPIDE 0B (SLAVE): 8 BIT XFER
+;
+SDENABLE	.EQU	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.EQU	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|PIO|Z80R|USR]
+SDPPIBASE	.EQU	$60		; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
+SDCNT		.EQU	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
+SDTRACE		.EQU	1		; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SDCSIOFAST	.EQU	FALSE		; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
+SDMTSWAP	.EQU	FALSE		; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
+;
+PRPENABLE	.EQU	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
+PRPSDENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER SD CARD SUPPORT
+PRPSDTRACE	.EQU	1		; PRP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
+;
+PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
+;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
+HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
+;
+PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
+PIOCNT		.EQU	2		; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
+PIO0BASE	.EQU	$B8		; PIO 0: REGISTERS BASE ADR
+PIO1BASE	.EQU	$BC		; PIO 1: REGISTERS BASE ADR
+;
+LPTENABLE	.EQU	FALSE		; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
+LPTMODE		.EQU	LPTMODE_MG014	; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
+LPTCNT		.EQU	1		; LPT: NUMBER OF CHIPS TO DETECT (1-2)
+LPTTRACE	.EQU	1		; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+LPT0BASE	.EQU	$18		; LPT 0: REGISTERS BASE ADR
+LPT1BASE	.EQU	$00		; LPT 1: REGISTERS BASE ADR
+;
+PPAENABLE	.EQU	FALSE		; PPA: ENABLE PPA DISK DRIVER (PPA.ASM)
+PPACNT		.EQU	1		; PPA: NUMBER OF PPA DEVICES (1-2)
+PPATRACE	.EQU	1		; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+PPAMODE		.EQU	PPAMODE_MG014	; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
+PPA0BASE	.EQU	LPT0BASE	; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
+PPA1BASE	.EQU	LPT1BASE	; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
+;
+IMMENABLE	.EQU	FALSE		; IMM: ENABLE IMM DISK DRIVER (IMM.ASM)
+IMMCNT		.EQU	1		; IMM: NUMBER OF IMM DEVICES (1-2)
+IMMTRACE	.EQU	1		; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+IMMMODE		.EQU	IMMMODE_MG014	; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
+IMM0BASE	.EQU	LPT0BASE	; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
+IMM1BASE	.EQU	LPT1BASE	; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
+;
+SYQENABLE	.EQU	FALSE		; SYQ: ENABLE IMM DISK DRIVER (SYQ.ASM)
+SYQCNT		.EQU	1		; SYQ: NUMBER OF SYQ DEVICES (1-2)
+SYQTRACE	.EQU	1		; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
+SYQMODE		.EQU	IMMMODE_MG014	; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
+SYQ0BASE	.EQU	LPT0BASE	; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
+SYQ1BASE	.EQU	LPT1BASE	; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
+;
+PIO_4P		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
+PIO_ZP		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
+PIO_SBC		.EQU	FALSE		; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
+;
+UFENABLE	.EQU	FALSE		; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
+;
+SN76489ENABLE	.EQU	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+AUDIOTRACE	.EQU	FALSE		; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
+SN7CLK		.EQU	3579545		; SN: PSG CLOCK FREQ, ASSUME MSX STD
+SNMODE		.EQU	SNMODE_RC	; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM]
+;
+AY38910ENABLE	.EQU	FALSE		; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
+AY_CLK		.EQU	1789772		; AY: PSG CLOCK FREQ, ASSUME MSX STD
+AYMODE		.EQU	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC]
+;
+SPKENABLE	.EQU	FALSE		; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
+;
+DMAENABLE	.EQU	FALSE		; DMA: ENABLE DMA DRIVER (DMA.ASM)
+DMABASE		.EQU	$E0		; DMA: DMA BASE ADDRESS
+DMAMODE		.EQU	DMAMODE_Z180	; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
+;
+YM2612ENABLE	.EQU	FALSE		; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
+VGMBASE		.EQU	$C0		; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
--- a/Source/HBIOS/cfg_sbc.asm
+++ b/Source/HBIOS/cfg_sbc.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -73,10 +73,13 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -124,6 +127,7 @@ UARTMFP		.EQU	TRUE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	TRUE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
@@ -225,6 +229,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 HDSKTRACE	.EQU	1		; HDSK: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 ;
--- a/Source/HBIOS/cfg_scz180.asm
+++ b/Source/HBIOS/cfg_scz180.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_SCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_SCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -133,6 +133,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ASCIINTS	.EQU	TRUE		; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -243,6 +244,8 @@ PRPCONENABLE	.EQU	TRUE		; PRP: ENABLE PROPIO DRIVER VIDEO/KBD SUPPORT
 ;
 PPPENABLE	.EQU	FALSE		; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
--- a/Source/HBIOS/cfg_una.asm
+++ b/Source/HBIOS/cfg_una.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "../UBIOS/ubios.inc"
 ;
-;PLATFORM	.EQU	PLT_UNA		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+;PLATFORM	.EQU	PLT_UNA		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_UNA	; HARDWARE BIOS: BIOS_[WBW|UNA]
 ;
--- a/Source/HBIOS/cfg_z80retro.asm
+++ b/Source/HBIOS/cfg_z80retro.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_Z80RETRO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_Z80RETRO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -76,10 +76,13 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	$00		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -122,6 +125,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
@@ -200,6 +204,8 @@ PPPSDENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER SD CARD SUPPORT
 PPPSDTRACE	.EQU	1		; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
--- a/Source/HBIOS/cfg_zeta.asm
+++ b/Source/HBIOS/cfg_zeta.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_ZETA	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_ZETA	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; BIOS_[WBW|UNA]: HARDWARE BIOS
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -65,10 +65,13 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -111,6 +114,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
@@ -171,6 +175,8 @@ PPPSDENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER SD CARD SUPPORT
 PPPSDTRACE	.EQU	1		; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
--- a/Source/HBIOS/cfg_zeta2.asm
+++ b/Source/HBIOS/cfg_zeta2.asm
@@ -15,7 +15,7 @@
 ;
 #INCLUDE "hbios.inc"
 ;
-PLATFORM	.EQU	PLT_ZETA2	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO]
+PLATFORM	.EQU	PLT_ZETA2	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO]
 CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
@@ -76,10 +76,13 @@ LEDMODE		.EQU	LEDMODE_RTC	; LEDMODE_[STD|RTC]
 LEDPORT		.EQU	RTCIO		; STATUS LED PORT ADDRESS
 LEDDISKIO	.EQU	TRUE		; ENABLES DISK I/O ACTIVITY ON STATUS LED
 ;
-DSKYENABLE	.EQU	FALSE		; ENABLES DSKY
-DSKYMODE	.EQU	DSKYMODE_V1	; DSKY VERSION: DSKYMODE_[V1|NG]
-DSKYPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF DSKY PPI
-DSKYOSC		.EQU	3000000		; OSCILLATOR FREQ FOR DSKYNG (IN HZ)
+DSKYENABLE	.EQU	FALSE		; ENABLES DSKY FUNCTIONALITY
+DSKYDSKACT	.EQU	TRUE		; ENABLES DISK ACTIVITY ON DSKY DISPLAY
+ICMENABLE	.EQU	FALSE		; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
+ICMPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF ICM PPI
+PKDENABLE	.EQU	FALSE		; ENABLES DSKY NG PKD DRIVER (8259)
+PKDPPIBASE	.EQU	$60		; BASE I/O ADDRESS OF PKD PPI
+PKDOSC		.EQU	3000000		; OSCILLATOR FREQ FOR PKD (IN HZ)
 ;
 BOOTCON		.EQU	0		; BOOT CONSOLE DEVICE
 CRTACT		.EQU	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
@@ -122,6 +125,7 @@ UARTMFP		.EQU	FALSE		; UART: AUTO-DETECT MF/PIC UART
 UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 UARTDUAL	.EQU	FALSE		; UART: AUTO-DETECT DUAL UART
+UARTDUO		.EQU	FALSE		; UART: AUTO-DETECT DUODYNE UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
 ;
@@ -182,6 +186,8 @@ PPPSDENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER SD CARD SUPPORT
 PPPSDTRACE	.EQU	1		; PPP: SD CARD TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
 PPPCONENABLE	.EQU	TRUE		; PPP: ENABLE PPP DRIVER VIDEO/KBD SUPPORT
 ;
+ESPENABLE	.EQU	FALSE		; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
+;
 HDSKENABLE	.EQU	FALSE		; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
 ;
 PIOENABLE	.EQU	FALSE		; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
--- a/Source/HBIOS/dbgmon.asm
+++ b/Source/HBIOS/dbgmon.asm
@@ -31,12 +31,7 @@ BUFLEN	.EQU	40			; INPUT LINE LENGTH
 	JP	DSKY_ENTRY
 	JP	UART_ENTRY
 ;
-#IF DSKYENABLE
-  #DEFINE USEDELAY
-ENA_XM	.EQU	FALSE			; NO ROOM FOR BOTH DSKY+XMODEM
-#ELSE
-ENA_XM	.EQU	TRUE			; INCLUDE XMODEM IF SPACE AVAILABLE
-#ENDIF
+ENA_XM		.EQU	TRUE		; INCLUDE XMODEM
 ;
 ENA_MBC6502	.EQU	FALSE		; ENABLE OR DISABLE MBC6502 OPTION
 ;
@@ -149,10 +144,7 @@ SERIALCMDLOOP:
 ;_____________________________________________________________________________
 ;
 INITIALIZE:
-	;LD	A,$C3		; JP OPCODE
-	;LD	(0),A		; STORE AT $0000
-	;LD	(1),HL		; STORE AT $0001
-
+;
 #IF (BIOS == BIOS_UNA)
 	; INSTALL UNA INVOCATION VECTOR FOR RST 08
 	LD	A,$C3		; JP INSTRUCTION
@@ -160,14 +152,6 @@ INITIALIZE:
 	LD	HL,($FFFE)	; UNA ENTRY VECTOR
 	LD	(9),HL		; STORE AT 0x0009
 #ENDIF
-
-#IF DSKYENABLE
-	LD	B,BF_SYSGET		; HBIOS FUNC=GET SYS INFO
-	LD	C,BF_SYSGET_CPUINFO	; HBIOS SUBFUNC=GET CPU INFO
-	CALL	$FFF0			; CALL HBIOS
-	LD	A,L			; PUT SPEED IN MHZ IN ACCUM
-	CALL	DELAY_INIT
-#ENDIF
 ;
 	RET
 ;
@@ -1278,14 +1262,6 @@ TXT_HELP	.TEXT	"\r\nMonitor Commands (all values in hex):"
 ;
 #IF DSKYENABLE
 ;
-#DEFINE	DSKY_KBD
-  #IF (DSKYMODE == DSKYMODE_V1)
-#INCLUDE "dsky.asm"
-  #ENDIF
-  #IF (DSKYMODE == DSKYMODE_NG)
-#INCLUDE "dskyng.asm"
-  #ENDIF
-;
 KY_PR	.EQU	KY_FW		; USE [FW] FOR [PR] (PORT READ)
 KY_PW	.EQU	KY_BK		; USE [BW] FOR [PW] (PORT WRITE)
 ;
@@ -1295,8 +1271,9 @@ KY_PW	.EQU	KY_BK		; USE [BW] FOR [PW] (PORT WRITE)
 ;_____________________________________________________________________________
 ;
 DSKY_ENTRY:
+	; SHOULD WE DO SOMETHING HERE TO CONFIRM THAT A DSKY
+	; IS ACTUALLY OPERATING???
 	LD	SP,MON_STACK		; SET THE STACK POINTER
-	;EI				; INTS OK NOW
 	LD	HL,DSKY_ENTRY		; RESTART ADDRESS
 	CALL	INITIALIZE
 ;
@@ -1305,12 +1282,7 @@ DSKY_ENTRY:
 ;	START UP THE SYSTEM WITH THE FRONT PANEL INTERFACE
 ;_____________________________________________________________________________
 ;
-	CALL	DSKY_PREINIT		; INITIALIZE DSKY
-
-  #IF (DSKYMODE == DSKYMODE_NG)
 	CALL 	DSKY_BEEP
-  #ENDIF
-
 ;
 ;__COMMAND_PARSE______________________________________________________________
 ;
@@ -1320,17 +1292,12 @@ DSKY_ENTRY:
 FRONTPANELLOOP:
 	LD	HL,CPUUP		; SET POINTER TO CPU UP MSG
 	CALL	DSKY_SHOW		; DISPLAY UNENCODED
-
-  #IF (DSKYMODE == DSKYMODE_NG)
 	CALL 	DSKY_HIGHLIGHTCMDKEYS
 	CALL 	DSKY_L1ON
-  #ENDIF
-
-	CALL	KB_GET			; GET KEY FROM KB
-
- #IF (DSKYMODE == DSKYMODE_NG)
+	CALL	KB_GET			; GET KEY FROM DSKY
+	PUSH	AF
 	CALL 	DSKY_L1OFF
-  #ENDIF
+	POP	AF

 FRONTPANELLOOP1:
 	CP	KY_PR			; IS PORT READ?
@@ -1366,11 +1333,7 @@ DOBOOT:
 ;_____________________________________________________________________________
 ;
 DOPORTREAD:
-
- #IF (DSKYMODE == DSKYMODE_NG)
 	CALL 	DSKY_HIGHLIGHTNUMKEYS
-  #ENDIF
-
 	CALL 	GETPORT			; GET PORT INTO A
 PORTREADLOOP:
 	LD	C,A			; STORE PORT IN "C"
@@ -1393,11 +1356,7 @@ PORTREADGETKEY:
 ;_____________________________________________________________________________
 ;
 DOPORTWRITE:
-
-  #IF (DSKYMODE == DSKYMODE_NG)
 	CALL 	DSKY_HIGHLIGHTNUMKEYS
-  #ENDIF
-
 	CALL 	GETPORT			; GET PORT INTO A
 PORTWRITELOOP:
 	LD	L,A			; SAVE PORT NUM
@@ -1419,18 +1378,10 @@ PORTWRITEGETKEY:
 ;_____________________________________________________________________________
 ;
 DOGO:
-
-#IF (DSKYMODE == DSKYMODE_NG)
 	CALL 	DSKY_HIGHLIGHTNUMKEYS
-  #ENDIF
-
 	CALL 	GETADDR			; GET ADDRESS INTO HL
-
-  #IF (DSKYMODE == DSKYMODE_NG)
+	PUSH	HL
 	CALL 	DSKY_HIGHLIGHTKEYSOFF
-  #ENDIF
-
-	PUSH	HL			; EXEC ADR TO TOS
 	LD	HL,GOTO			; POINT TO "GO" MSG
 	CALL	INITBUF
 	POP	HL
@@ -1450,11 +1401,7 @@ DOGO:
 ;_____________________________________________________________________________
 ;
 DOEXAMINE:
-
-  #IF (DSKYMODE == DSKYMODE_NG)
 	CALL 	DSKY_HIGHLIGHTNUMKEYS
-  #ENDIF
-
 	CALL 	GETADDR			; GET ADDRESS INTO HL
 EXAMINELOOP:
 	LD	DE,DISPLAYBUF+0
@@ -1470,11 +1417,7 @@ EXAMINELOOP:
 	LD	A,(HL)			; GET VALUE FROM ADDRESS IN HL
 	CALL	PUTVALUE
 	CALL	ENCDISPLAY		; DISPLAY BUFFER ON DISPLAYS
-
-  #IF (DSKYMODE == DSKYMODE_NG)
 	CALL 	DSKY_HIGHLIGHTFWDKEYS
-  #ENDIF
-
 EXAMINEGETKEY:
 	CALL	KB_GET			; GET KEY FROM KB
 	CP	KY_EN			; [EN] PRESSED, INC ADDRESS AND LOOP
@@ -1492,11 +1435,7 @@ EXAMINEFW:
 ;_____________________________________________________________________________
 ;
 DODEPOSIT:
-
-  #IF (DSKYMODE == DSKYMODE_NG)
 	CALL 	DSKY_HIGHLIGHTNUMKEYS
-  #ENDIF
-
 	CALL 	GETADDR			; GET ADDRESS INTO HL
 DEPOSITLOOP:
 	LD	DE,DISPLAYBUF+0
@@ -1513,11 +1452,7 @@ DEPOSITLOOP:
 	LD	DE,DISPLAYBUF+6		; DISPLAY WRITTEN MEM VALUE
 	CALL	PUTVALUE		; ... WITHOUT DP'S
 	CALL	ENCDISPLAY		; DISPLAY BUFFER CONTENTS
-
-  #IF (DSKYMODE == DSKYMODE_NG)
 	CALL 	DSKY_HIGHLIGHTFWDKEYS
-  #ENDIF
-
 DEPOSITGETKEY:
 	CALL	KB_GET			; GET KEY FROM KB
 	CP	KY_EN			; [EN] PRESSED, INC ADDRESS AND LOOP
@@ -1684,6 +1619,7 @@ KB_GET:
 	PUSH	DE
 	PUSH 	HL			; SAVE HL
 	CALL	DSKY_GETKEY		; GET A KEY
+	LD	A,E			; PUT KEY CODE IN A
 	CP	KY_EN			; ENTER?
 	JR	Z,KB_GET1		; IF YES, RET TO CALLER
 	CP	$10			; HEX DIGIT?
@@ -1710,7 +1646,7 @@ INITBUF:
 ;
 ;__ENCDISPLAY_________________________________________________________________
 ;
-;  DISPLAY CONTENTS OF DISPLAYBUF DECODED PER SEGDECODE TABLE
+;  DISPLAY CONTENTS OF DISPLAYBUF ENCODED PER SEGDECODE TABLE
 ;_____________________________________________________________________________
 ;
 ENCDISPLAY:
@@ -1720,7 +1656,7 @@ ENCDISPLAY:
 ;
 ;__ENCBUF_____________________________________________________________________
 ;
-;  DISPLAY CONTENTS OF BUFFER AT HL DECODED PER SEGDECODE TABLE
+;  DISPLAY CONTENTS OF BUFFER AT HL ENCODED PER SEGDECODE TABLE
 ;_____________________________________________________________________________
 ;
 ENCBUF:
@@ -1736,7 +1672,6 @@ ENCBUF1:
 	INC	HL			; BUMP TO NEXT BYTE FOR NEXT PASS
 	PUSH	AF			; SAVE IT
 	AND	$80			; ISOLATE HI BIT (DP)
-	;XOR	$80			; FLIP IT
 	LD	C,A			; SAVE IN C
 	POP	AF			; RECOVER ORIGINAL
 	AND	$7F			; REMOVE HI BIT (DP)
@@ -1757,36 +1692,62 @@ ENCBUF1:
 	POP	HL			; RESTORE HL
 	RET
 ;
-#IF (DSKYMODE == DSKYMODE_V1)
-;
-CPUUP	.DB 	$04,$4B,$6E,$3B,$00,$3B,$6E,$04	; "-CPU UP-" (RAW SEG)
-MSGBOOT	.DB	$7F,$1D,$1D,$0F,$A0,$00,$00,$00 ; "Boot!   " (RAW SEG)
-ADDR	.DB	$17,$18,$19,$10,$00,$00,$00,$00	; "Adr 0000" (ENCODED)
-PORT	.DB	$13,$14,$15,$16,$10,$10,$00,$00	; "Port  00" (ENCODED)
-GOTO	.DB	$1A,$14,$10,$10,$00,$00,$00,$00	; "Go  0000" (ENCODED)
-;
-;_HEX_7_SEG_DECODE_TABLE______________________________________________________
-;
-; SET BIT 7 TO DISPLAY W/ DECIMAL POINT
 ;_____________________________________________________________________________
 ;
-SEGDECODE:
+;  DSKY INTERFACE ROUTINES
+;_____________________________________________________________________________
 ;
-	; POS	$00  $01  $02  $03  $04  $05  $06  $07
-	; GLYPH '0'  '1'  '2'  '3'  '4'  '5'  '6'  '7'
-	.DB	$7B, $30, $6D, $75, $36, $57, $5F, $70
+DSKY_GETKEY:
+	LD	B,BF_DSKYGETKEY
+	RST	08
+	RET
 ;
-	; POS	$08  $09  $0A  $0B  $0C  $0D  $0E  $0F
-	; GLYPH	'8'  '9'  'A'  'B'  'C'  'D'  'E'  'F'
-	.DB	$7F, $77, $7E, $1F, $4B, $3D, $4F, $4E
+DSKY_SHOW:
+	LD	B,BF_DSKYSHOWSEG
+	RST	08
+	RET
 ;
-	; POS	$10  $11  $12  $13  $14  $15  $16  $17  $18  $19  $1A
-	; GLYPH	' '  '-'  '.'  'P'  'o'  'r'  't'  'A'  'd'  'r'  'G'
-	.DB	$00, $04, $00, $6E, $1D, $0C, $0F, $7E, $3D, $0C, $5B
+DSKY_BEEP:
+	LD	B,BF_DSKYBEEP
+	RST	08
+	RET
 ;
-#ENDIF
+DSKY_L1ON:
+	LD	E,1
+	JR	DSKY_STATLED
+DSKY_L1OFF:
+	LD	E,0
+DSKY_STATLED:
+	LD	B,BF_DSKYSTATLED
+	LD	D,0
+	RST	08
+	RET
 ;
-#IF (DSKYMODE == DSKYMODE_NG)
+DSKY_PUTLED:
+	LD	B,BF_DSKYKEYLEDS
+	RST	08
+	RET
+;
+DSKY_HIGHLIGHTFWDKEYS:
+	LD	HL,DSKY_HIGHLIGHTFWDKEYLEDS
+	JR 	DSKY_PUTLED
+;
+DSKY_HIGHLIGHTCMDKEYS:
+	LD	HL,DSKY_HIGHLIGHTCMDKEYLEDS
+	JR 	DSKY_PUTLED
+;
+DSKY_HIGHLIGHTNUMKEYS:
+	LD	HL,DSKY_HIGHLIGHTNUMKEYLEDS
+	JR 	DSKY_PUTLED
+;
+DSKY_HIGHLIGHTKEYSOFF:
+	LD	HL,DSKY_HIGHLIGHTKEYLEDSOFF
+	JR 	DSKY_PUTLED
+;
+DSKY_HIGHLIGHTFWDKEYLEDS	.DB 	$00,$00,$00,$30,$00,$00,$00,$00
+DSKY_HIGHLIGHTCMDKEYLEDS	.DB 	$20,$00,$20,$3F,$00,$00,$00,$00
+DSKY_HIGHLIGHTNUMKEYLEDS	.DB 	$1F,$3F,$1F,$30,$00,$00,$00,$00
+DSKY_HIGHLIGHTKEYLEDSOFF	.DB 	$00,$00,$00,$00,$00,$00,$00,$00
 ;
 CPUUP	.DB 	$40,$39,$73,$3E,$00,$3E,$73,$40	; "-CPU UP-" (RAW SEG)
 MSGBOOT	.DB	$7F,$5C,$5C,$78,$82,$00,$00,$00 ; "Boot!   " (RAW SEG)
@@ -1813,31 +1774,8 @@ SEGDECODE:
 	; GLYPH	' '  '-'  '.'  'P'  'o'  'r'  't'  'A'  'd'  'r'  'G'
 	.DB	$00, $40, $00, $73, $5C, $50, $78, $77, $5E, $50, $3D
 ;
-
-DSKY_HIGHLIGHTFWDKEYS:
-	CALL 	DSKY_PUTLED
-	.DB 	$00,$00,$00,$30,$00,$00,$00,$00
-	RET
-
-DSKY_HIGHLIGHTCMDKEYS:
-
-	CALL 	DSKY_PUTLED
-	.DB 	$20,$00,$20,$3F,$00,$00,$00,$00
-	RET
-
-DSKY_HIGHLIGHTNUMKEYS:
-	CALL 	DSKY_PUTLED
-	.DB 	$1F,$3F,$1F,$30,$00,$00,$00,$00
-	RET
-
-DSKY_HIGHLIGHTKEYSOFF:
-
-	CALL 	DSKY_PUTLED
-	.DB 	$00,$00,$00,$00,$00,$00,$00,$00
-	RET
-#ENDIF
-;
 DISPLAYBUF:	.FILL	8,0
+DSKY_BUF	.FILL	8,0
 ;
 #ELSE
 ;
@@ -1949,130 +1887,6 @@ ADDHLA:
 	INC	H
 	RET
 ;
-; DELAY 16US (CPU SPEED COMPENSATED) INCUDING CALL/RET INVOCATION
-; REGISTER A AND FLAGS DESTROYED
-; NO COMPENSATION FOR Z180 MEMORY WAIT STATES
-; THERE IS AN OVERHEAD OF 3TS PER INVOCATION
-;   IMPACT OF OVERHEAD DIMINISHES AS CPU SPEED INCREASES
-;
-; CPU SCALER (CPUSCL) = (CPUHMZ - 2) FOR 16US + 3TS DELAY
-;   NOTE: CPUSCL MUST BE >= 1!
-;
-; EXAMPLE: 8MHZ CPU (DELAY GOAL IS 16US)
-;   LOOP = ((6 * 16) - 5) = 91TS
-;   TOTAL COST = (91 + 40) = 131TS
-;   ACTUAL DELAY = (131 / 8) = 16.375US
-;
-	; --- TOTAL COST = (LOOP COST + 40) TS -----------------+
-DELAY:				; 17TS (FROM INVOKING CALL)	|
-	LD	A,(CPUSCL)	; 13TS				|
-;								|
-DELAY1:				;				|
-	; --- LOOP = ((CPUSCL * 16) - 5) TS ------------+	|
-	DEC	A		; 4TS			|	|
-  #IF (BIOS == BIOS_WBW)	;			|	|
-    #IF (CPUFAM == CPU_Z180)	;			|	|
-	OR	A		; +4TS FOR Z180		|	|
-    #ENDIF			;			|	|
-  #ENDIF			;			|	|
-	JR	NZ,DELAY1	; 12TS (NZ) / 7TS (Z)	|	|
-	; ----------------------------------------------+	|
-;								|
-	RET			; 10TS (RETURN)			|
-	;-------------------------------------------------------+
-;
-; DELAY 16US * DE (CPU SPEED COMPENSATED)
-; REGISTER DE, A, AND FLAGS DESTROYED
-; NO COMPENSATION FOR Z180 MEMORY WAIT STATES
-; THERE IS A 27TS OVERHEAD FOR CALL/RET PER INVOCATION
-;   IMPACT OF OVERHEAD DIMINISHES AS DE AND/OR CPU SPEED INCREASES
-;
-; CPU SCALER (CPUSCL) = (CPUHMZ - 2) FOR 16US OUTER LOOP COST
-;   NOTE: CPUSCL MUST BE > 0!
-;
-; EXAMPLE: 8MHZ CPU, DE=6250 (DELAY GOAL IS .1 SEC OR 100,000US)
-;   INNER LOOP = ((16 * 6) - 5) = 91TS
-;   OUTER LOOP = ((91 + 37) * 6250) = 800,000TS
-;   ACTUAL DELAY = ((800,000 + 27) / 8) = 100,003US
-;
-	; --- TOTAL COST = (OUTER LOOP + 27) TS ------------------------+
-VDELAY:				; 17TS (FROM INVOKING CALL)		|
-;									|
-	; --- OUTER LOOP = ((INNER LOOP + 37) * DE) TS ---------+	|
-	LD	A,(CPUSCL)	; 13TS				|	|
-;								|	|
-VDELAY1:			;				|	|
-	; --- INNER LOOP = ((CPUSCL * 16) - 5) TS ------+	|	|
-  #IF (BIOS == BIOS_WBW)	;			|	|	|
-    #IF (CPUFAM == CPU_Z180)	;			|	|	|
-	OR	A		; +4TS FOR Z180		|	|	|
-    #ENDIF			;			|	|	|
-  #ENDIF			;			|	|	|
-	DEC	A		; 4TS			|	|	|
-	JR	NZ,VDELAY1	; 12TS (NZ) / 7TS (Z)	|	|	|
-	; ----------------------------------------------+	|	|
-;								|	|
-	DEC	DE		; 6TS				|	|
-  #IF (BIOS == BIOS_WBW)	;			|	|	|
-    #IF (CPUFAM == CPU_Z180)	;				|	|
-	OR	A		; +4TS FOR Z180			|	|
-    #ENDIF			;				|	|
-  #ENDIF			;				|	|
-	LD	A,D		; 4TS				|	|
-	OR	E		; 4TS				|	|
-	JP	NZ,VDELAY	; 10TS				|	|
-	;-------------------------------------------------------+	|
-;									|
-	RET			; 10TS (FINAL RETURN)			|
-	;---------------------------------------------------------------+
-;
-; DELAY ABOUT 0.5 SECONDS
-; 500000US / 16US = 31250
-;
-LDELAY:
-	PUSH	AF
-	PUSH	DE
-	LD	DE,31250
-	CALL	VDELAY
-	POP	DE
-	POP	AF
-	RET
-;
-; INITIALIZE DELAY SCALER BASED ON OPERATING CPU SPEED
-; ENTER WITH A = CPU SPEED IN MHZ
-;
-DELAY_INIT:
-	CP	3			; TEST FOR <= 2 (SPECIAL HANDLING)
-	JR	C,DELAY_INIT1		; IF <= 2, SPECIAL PROCESSING
-	SUB	2			; ADJUST AS REQUIRED BY DELAY FUNCTIONS
-	JR	DELAY_INIT2		; AND CONTINUE
-DELAY_INIT1:
-	LD	A,1			; USE THE MIN VALUE OF 1
-DELAY_INIT2:
-	LD	(CPUSCL),A		; UPDATE CPU SCALER VALUE
-	RET
-
-  #IF (CPUMHZ < 3)
-CPUSCL	.DB	1			; CPU SCALER MUST BE > 0
-  #ELSE
-CPUSCL	.DB	CPUMHZ - 2		; OTHERWISE 2 LESS THAN PHI MHZ
-  #ENDIF
-;
-; SHORT DELAY FUNCTIONS.  NO CLOCK SPEED COMPENSATION, SO THEY
-; WILL RUN LONGER ON SLOWER SYSTEMS.  THE NUMBER INDICATES THE
-; NUMBER OF CALL/RET INVOCATIONS.  A SINGLE CALL/RET IS
-; 27 T-STATES ON A Z80, 25 T-STATES ON A Z180
-;
-;			; Z80	Z180
-;			; ----	----
-DLY64:	CALL	DLY32	; 1728	1600
-DLY32:	CALL	DLY16	; 864	800
-DLY16:	CALL	DLY8	; 432	400
-DLY8:	CALL	DLY4	; 216	200
-DLY4:	CALL	DLY2	; 108	100
-DLY2:	CALL	DLY1	; 54	50
-DLY1:	RET		; 27	25
-;
 ;
 ;
 		.FILL	16,0		; SET MINIMUM STACK DEPTH
--- a/Source/HBIOS/dsky.asm
+++ b/Source/HBIOS/dsky.asm
@@ -1,386 +0,0 @@
-;
-;==================================================================================================
-; DSKY (DISPLAY AND KEYBOARD) ROUTINES 
-;==================================================================================================
-;
-; THE DSKY MAY COINCIDE ON THE SAME PPI BUS AS A PPISD.  IT MAY NOT
-; SHARE A PPI BUS WITH A PPIDE.  SEE PPI_BUS.TXT FOR MORE INFORMATION.
-;
-; LED SEGMENTS (BIT VALUES)
-;
-;	+--40--+
-;	02    20
-;	+--04--+
-;	08    10
-;	+--01--+  80
-;
-; DSKY SCAN CODES ARE ONE BYTE: CCRRRRRR
-; BITS 7-6 IDENTFY THE COLUMN OF THE KEY PRESSED
-; BITS 5-0 ARE A BITMAP, WITH A BIT ON TO INDICATE ROW OF KEY PRESSED
-;
-;      ____PC0________PC1________PC2________PC3____
-; PB5 |	 $20 [D]    $60 [E]    $A0 [F]	  $E0 [BO]
-; PB4 |	 $10 [A]    $50 [B]    $90 [C]	  $D0 [GO]
-; PB3 |	 $08 [7]    $48 [8]    $88 [9]	  $C8 [EX]
-; PB2 |	 $04 [4]    $44 [5]    $84 [6]	  $C4 [DE]
-; PB1 |	 $02 [1]    $42 [2]    $82 [3]	  $C2 [EN]
-; PB0 |	 $01 [FW]   $41 [0]    $81 [BK]	  $C1 [CL]
-;
-;
-PPIA		.EQU 	DSKYPPIBASE + 0	; PORT A
-PPIB		.EQU 	DSKYPPIBASE + 1	; PORT B
-PPIC		.EQU 	DSKYPPIBASE + 2	; PORT C
-PPIX	 	.EQU 	DSKYPPIBASE + 3	; PPI CONTROL PORT
-;
-;__DSKY_INIT_________________________________________________________________________________________
-;
-;  CONFIGURE PARALLEL PORT AND CLEAR KEYPAD BUFFER
-;____________________________________________________________________________________________________
-;
-DSKY_PREINIT:
-	OR	$FF			; SIGNAL TO WAIT FOR KEY RELEASE
-	LD	(DSKY_KEYBUF),A		; SET IT
-;
-	; PPI PORT B IS NORMALLY SET TO INPUT, BUT HERE WE
-	; TEMPORARILY SET IT TO OUTPUT.  WHILE IN OUTPUT MODE, WE
-	; WRITE A VALUE OF $FF WHICH WILL BE PERSISTED BY THE PPI
-	; CHIP BUS HOLD CIRCUIT IF THERE IS NO DSKY PRESENT.  SO,
-	; WE CAN SUBSEQUENTLY TEST FOR PPIB=$FF TO SEE IF THERE IS
-	; NO DSKY AND PREVENT PROBLEMS WITH PHANTOM DSKY KEY PRESSES.
-	; IF A DSKY IS PRESENT, IT WILL SIMPLY OVERPOWER THE PPI
-	; BUS HOLD CIRCUIT.
-	LD	A,$80			; PA OUT, PB OUT, PC OUT
-	OUT	(PPIX),A
-	LD	A,$FF			; SET PPIB=$FF, BUS HOLD
-	OUT	(PPIB),A
-;
-	LD	A,$82			; PA OUT, PB IN, PC OUT
-	OUT 	(PPIX),A
-;
-	;IN	A,(PPIB)		; *DEBUG*
-	;CALL	PRTHEXBYTE		; *DEBUG*
-;
-	IN	A,(PPIB)		; READ PPIB
-	XOR	$FF			; INVERT RESULT
-	LD	(DSKY_PRESENT),A	; SAVE AS PRESENT FLAG
-;
-DSKY_RESET:
-	PUSH	AF
-;
-	LD	A,$70			; PPISD AND 7218 INACTIVE
-	OUT	(PPIC),A
-;
-	POP	AF
-	RET
-;
-#IFDEF HBIOS
-;
-DSKY_INIT:
-	CALL	NEWLINE			; FORMATTING
-	PRTS("DSKY:$")			; FORMATTING
-;
-	PRTS(" IO=0x$")			; FORMATTING
-	LD	A,DSKYPPIBASE		; GET BASE PORT
-	CALL	PRTHEXBYTE		; PRINT BASE PORT
-	PRTS(" MODE=$")			; FORMATTING
-	PRTS("V1$")			; PRINT DSKY TYPE
-;
-	LD	A,(DSKY_PRESENT)	; PRESENT?
-	OR	A			; SET FLAGS
-	RET	NZ			; YES, ALL DONE
-	PRTS(" NOT PRESENT$")		; NOT PRESENT
-;
-	RET
-;
-#ENDIF
-;
-#IFDEF DSKY_KBD
-;
-KY_0	.EQU	$00
-KY_1	.EQU	$01
-KY_2	.EQU	$02
-KY_3	.EQU	$03
-KY_4	.EQU	$04
-KY_5	.EQU	$05
-KY_6	.EQU	$06
-KY_7	.EQU	$07
-KY_8	.EQU	$08
-KY_9	.EQU	$09
-KY_A	.EQU	$0A
-KY_B	.EQU	$0B
-KY_C	.EQU	$0C
-KY_D	.EQU	$0D
-KY_E	.EQU	$0E
-KY_F	.EQU	$0F
-KY_FW	.EQU	$10	; FORWARD
-KY_BK	.EQU	$11	; BACKWARD
-KY_CL	.EQU	$12	; CLEAR
-KY_EN	.EQU	$13	; ENTER
-KY_DE	.EQU	$14	; DEPOSIT
-KY_EX	.EQU	$15	; EXAMINE
-KY_GO	.EQU	$16	; GO
-KY_BO	.EQU	$17	; BOOT
-;
-;__DSKY_GETKEY_____________________________________________________________________________________
-;
-;  WAIT FOR A DSKY KEYPRESS AND RETURN
-;____________________________________________________________________________________________________
-;
-DSKY_GETKEY:
-	LD	A,(DSKY_PRESENT)	; DOES IT EXIST?
-	OR	A			; SET FLAGS
-	JR	Z,DSKY_GETKEY1A		; ABORT IF NOT PRESENT
-;
-	CALL	DSKY_STAT		; CHECK STATUS
-	JR	Z,DSKY_GETKEY		; LOOP IF NOTHING READY
-	LD	A,(DSKY_KEYBUF)
-	LD	B,24			; SIZE OF DECODE TABLE
-	LD	C,0			; INDEX
-	LD	HL,DSKY_KEYMAP		; POINT TO BEGINNING OF TABLE
-DSKY_GETKEY1:
-	CP	(HL)			; MATCH?
-	JR	Z,DSKY_GETKEY2		; FOUND, DONE
-	INC	HL
-	INC	C			; BUMP INDEX
-	DJNZ	DSKY_GETKEY1		; LOOP UNTIL EOT
-DSKY_GETKEY1A:
-	LD	A,$FF			; NOT FOUND ERR, RETURN $FF
-	RET
-DSKY_GETKEY2:
-	LD	A,$FF			; SET KEY BUF TO $FF
-	LD	(DSKY_KEYBUF),A		; DO IT
-	; RETURN THE INDEX POSITION WHERE THE SCAN CODE WAS FOUND
-	LD	A,C			; RETURN INDEX VALUE
-	RET
-;
-;__DSKY_STAT_________________________________________________________________________________________
-;
-;  CHECK FOR KEY PRESS, SAVE RAW VALUE, RETURN STATUS
-;____________________________________________________________________________________________________
-;
-DSKY_STAT:
-	LD	A,(DSKY_PRESENT)	; DOES IT EXIST?
-	OR	A			; SET FLAGS
-	RET	Z			; ABORT WITH A=0 IF NOT THERE
-;
-	LD	A,(DSKY_KEYBUF)		; GET CURRENT BUF VAL
-	CP	$FF			; $FF MEANS WE ARE WAITING FOR PREV KEY TO BE RELEASED
-	JR	Z,DSKY_STAT1		; CHECK FOR PREV KEY RELEASE
-	OR	A			; DO WE HAVE A SCAN CODE BUFFERED ALREADY?
-	RET	NZ			; IF SO, WE ARE DONE
-	JR	DSKY_STAT2		; OTHERWISE, DO KEY CHECK
-	
-DSKY_STAT1:
-	; WAITING FOR PREVIOUS KEY RELEASE
-	CALL	DSKY_KEY		; SCAN
-	JR	Z,DSKY_STAT2		; IF ZERO, PREV KEY RELEASED, CONTINUE
-	XOR	A			; SIGNAL NO KEY PRESSED
-	RET				; AND DONE
-
-DSKY_STAT2:
-	CALL	DSKY_KEY		; SCAN
-	LD	(DSKY_KEYBUF),A		; SAVE RESULT
-	RET				; RETURN WITH ZF SET APPROPRIATELY
-;
-;__DSKY_KEY_______________________________________________________________________________________
-;
-;  CHECK FOR KEY PRESS W/ DEBOUNCE
-;____________________________________________________________________________________________________
-;
-DSKY_KEY:
-	; IF PPIB VALUE IS $FF, THERE IS NO DSKY, SEE DSKY_INIT
-	IN	A,(PPIB)
-	INC	A
-	RET	Z
-
-	CALL	DSKY_SCAN		; INITIAL KEY PRESS SCAN
-	LD	E,A			; SAVE INITIAL SCAN VALUE
-DSKY_KEY1:
-	; MAX BOUNCE TIME FOR OMRON B3F IS 3MS
-	PUSH	DE			; SAVE DE
-	LD	DE,300			; ~3MS DELAY
-	CALL	VDELAY			; DO IT
-	CALL	DSKY_SCAN		; REPEAT SCAN
-	POP	DE			; RESTORE DE
-	RET	Z			; IF NOTHING PRESSED, DONE
-	CP	E			; SAME?
-	JR	DSKY_KEY2		; YES, READY TO RETURN
-	LD	E,A			; OTHERWISE, SAVE NEW SCAN VAL
-	JR	DSKY_KEY1		; AND LOOP UNTIL STABLE VALUE
-DSKY_KEY2:
-	OR	A			; SET FLAGS BASED ON VALUE
-	RET				; AND DONE
-;
-;__DSKY_SCAN______________________________________________________________________________________
-;
-;  SCAN KEYPAD AND RETURN RAW SCAN CODE (RETURNS ZERO IF NO KEY PRESSED)
-;____________________________________________________________________________________________________
-;
-DSKY_SCAN:
-	LD	B,4			; 4 COLUMNS
-	LD	C,$01			; FIRST COLUMN
-	LD	E,0			; INITIAL COL ID
-DSKY_SCAN1:
-	LD	A,C			; COL TO A
-	OR	$70			; KEEP PPISD AND 7218 INACTIVE
-	OUT	(PPIC),A		; ACTIVATE COL
-	IN	A,(PPIB)		; READ ROW BITS
-	AND	$3F			; MASK, WE ONLY HAVE 6 ROWS, OTHERS UNDEFINED
-	JR	NZ,DSKY_SCAN2		; IF NOT ZERO, GOT SOMETHING
-	RLC	C			; NEXT COL
-	INC	E			; BUMP COL ID
-	DJNZ	DSKY_SCAN1		; LOOP THROUGH ALL COLS
-	XOR	A			; NOTHING FOUND, RETURN ZERO
-	JP	DSKY_RESET		; RETURN VIA RESET
-DSKY_SCAN2:
-	RRC	E			; MOVE COL ID
-	RRC	E			; ... TO HIGH BITS 6 & 7
-	OR	E			; COMBINE WITH ROW
-	JP	DSKY_RESET		; RETURN VIA RESET
-;
-;_KEYMAP_TABLE_____________________________________________________________________________________________________________
-;
-DSKY_KEYMAP:
-	; POS	$00  $01  $02  $03  $04  $05  $06  $07
-	; KEY   [0]  [1]  [2]  [3]  [4]  [5]  [6]  [7]
-	.DB	$41, $02, $42, $82, $04, $44, $84, $08
-;                                                  
-	; POS	$08  $09  $0A  $0B  $0C  $0D  $0E  $0F
-	; KEY   [8]  [9]  [A]  [B]  [C]  [D]  [E]  [F]
-	.DB	$48, $88, $10, $50, $90, $20, $60, $A0
-;                                                  
-	; POS	$10  $11  $12  $13  $14  $15  $16  $17
-	; KEY   [FW] [BK] [CL] [EN] [DE] [EX] [GO] [BO]
-	.DB	$01, $81, $C1, $C2, $C4, $C8, $D0, $E0
-;
-; KBD WORKING STORAGE
-;
-DSKY_KEYBUF	.DB	0
-;
-#ENDIF	; DSKY_KBD
-;
-;==================================================================================================
-; CONVERT 32 BIT BINARY TO 8 BYTE HEX SEGMENT DISPLAY
-;==================================================================================================
-;
-; HL: ADR OF 32 BIT BINARY
-; DE: ADR OF DEST LED SEGMENT DISPLAY BUFFER (8 BYTES)
-;
-DSKY_BIN2SEG:
-	PUSH	HL
-	PUSH	DE
-	LD	B,4			; 4 BYTES OF INPUT
-	EX	DE,HL
-DSKY_BIN2SEG1:
-	LD	A,(DE)			; FIRST NIBBLE
-	SRL	A
-	SRL	A
-	SRL	A
-	SRL	A
-	PUSH	HL
-	LD	HL,DSKY_HEXMAP
-	CALL	DSKY_ADDHLA
-	LD	A,(HL)
-	POP	HL
-	LD	(HL),A
-	INC	HL
-	LD	A,(DE)			; SECOND NIBBLE
-	AND	0FH
-	PUSH	HL
-	LD	HL,DSKY_HEXMAP
-	CALL	DSKY_ADDHLA
-	LD	A,(HL)
-	POP	HL
-	LD	(HL),A
-	INC	HL
-	INC	DE			; NEXT BYTE
-	DJNZ	DSKY_BIN2SEG1
-	POP	DE
-	POP	HL
-	RET
-;
-;==================================================================================================
-; DSKY SHOW BUFFER
-;   HL: ADDRESS OF BUFFER
-;==================================================================================================
-;
-DSKY_SHOW:
-	;;PUSH	AF			; SAVE 7218 CONTROL BITS
-	LD	A,82H			; SETUP PPI
-	OUT	(PPIX),A
-	CALL	DSKY_COFF
-	;;POP	AF
-	LD	A,$F0			; 7218 -> (DATA COMING, NO DECODE)
-	OUT	(PPIA),A
-	CALL	DSKY_STROBEC		; STROBE COMMAND
-	LD	B,DSKY_BUFLEN		; NUMBER OF DIGITS
-	LD	C,PPIA
-DSKY_HEXOUT2:
-	;OUTI
-	LD	A,(HL)
-	XOR	$80			; FIX DOT POLARITY
-	OUT	(C),A
-	INC	HL
-	DEC	B
-	JP	Z,DSKY_STROBE		; DO FINAL STROBE AND RETURN
-	CALL	DSKY_STROBE		; STROBE BYTE VALUE
-	JR	DSKY_HEXOUT2
-DSKY_STROBEC:	; COMMAND STROBE
-	LD	A,80H | 30H
-	JP	DSKY_STROBE0
-DSKY_STROBE:	; DATA STROBE
-	LD	A,00H | 30H		; SET WRITE STROBE
-DSKY_STROBE0:
-	OUT	(PPIC),A		; OUT TO PORTC
-	CALL	DLY2			; DELAY
-DSKY_COFF:
-	LD	A,40H | 30H		; QUIESCE
-	OUT	(PPIC),A		; OUT TO PORTC
-;	CALL	DSKY_DELAY		; WAIT
-	RET
-;
-;==================================================================================================
-; UTILTITY FUNCTIONS
-;==================================================================================================
-;
-DSKY_ADDHLA:
-	ADD	A,L
-	LD	L,A
-	RET	NC
-	INC	H
-	RET
-;
-;==================================================================================================
-; STORAGE
-;==================================================================================================
-;
-; CODES FOR NUMERICS
-; HIGH BIT ALWAYS CLEAR TO SUPPRESS DECIMAL POINT
-; SET HIGH BIT TO SHOW DECIMAL POINT
-;
-DSKY_HEXMAP:
-	.DB	$7B	; 0
-	.DB	$30	; 1
-	.DB	$6D	; 2
-	.DB	$75	; 3
-	.DB	$36	; 4
-	.DB	$57	; 5
-	.DB	$5F	; 6
-	.DB	$70	; 7
-	.DB	$7F	; 8
-	.DB	$77	; 9
-	.DB	$7E	; A
-	.DB	$1F	; B
-	.DB	$4B	; C
-	.DB	$3D	; D
-	.DB	$4F	; E
-	.DB	$4E	; F
-;
-; SEG DISPLAY WORKING STORAGE
-;
-DSKY_PRESENT	.DB	0
-;
-DSKY_BUF	.FILL	8,0
-DSKY_BUFLEN	.EQU	$ - DSKY_BUF
-DSKY_HEXBUF	.FILL	4,0
-DSKY_HEXBUFLEN	.EQU	$ - DSKY_HEXBUF
--- a/Source/HBIOS/esp.asm
+++ b/Source/HBIOS/esp.asm
@@ -0,0 +1,298 @@
+;
+;==================================================================================================
+; ESP32 DRIVER
+;
+; SUPPORTS DAN WERNER'S NHYODYNE (MBC) ESP32 MODULE
+; https://github.com/danwerner21/nhyodyne/tree/main/Z80ESP
+;==================================================================================================
+;
+; TODO:
+;
+ESP_IOBASE	.EQU	$9C
+ESP_0_IO	.EQU	ESP_IOBASE + 0
+ESP_1_IO	.EQU	ESP_IOBASE + 1
+ESP_STAT	.EQU	ESP_IOBASE + 2
+;
+; ESP  STATUS PORT
+; MSB XX S S S S S S
+;        | | | | | +- ESP0 READY OUTPUT
+;        | | | | +--- ESP0 BUSY
+;        | | | +----- ESP0 SPARE
+;        | | +------- ESP1 READY OUTPUT
+;        | +--------- ESP1 BUSY
+;        +----------- ESP1 SPARE
+;
+ESP_0_RDY	.EQU	%00000001
+ESP_0_BUSY	.EQU	%00000010
+ESP_0_SPARE	.EQU	%00000100
+ESP_1_RDY	.EQU	%00001000
+ESP_1_BUSY	.EQU	%00010000
+ESP_1_SPARE	.EQU	%00100000
+;
+; COMMAND OPCODES
+;
+ESP_CMD_NOP	.EQU	0		; NO OP
+ESP_CMD_COUT	.EQU	1		; CHAR OUT
+ESP_CMD_SOUT	.EQU	2		; STRING OUT
+ESP_CMD_KIN	.EQU	3		; KEY IN
+ESP_CMD_KST	.EQU	4		; KBD BUF STATUS
+ESP_CMD_DISC	.EQU	$FF		; DISCOVER
+;
+; GLOBAL ESP INITIALIZATION
+;
+ESP_INIT:
+;
+	CALL	NEWLINE			; FORMATTING
+	PRTS("ESP: IO=0x$")
+	LD	A,ESP_IOBASE
+	CALL	PRTHEXBYTE
+;
+	CALL	ESP_DETECT
+	LD	DE,ESP_STR_NOHW
+	JP	NZ,WRITESTR
+;
+	; PRINT FIRMWARE VERSION
+	PRTS(" F/W=$")
+	CALL	ESP_PRTVER
+;
+	CALL	ESPCON_INIT		; CONSOLE INITIALIZATION
+;
+	RET
+;
+;==================================================================================================
+; ESP32 INTERFACE FUNCTIONS
+;==================================================================================================
+;
+ESP_DETECT:
+	CALL	ESP_CLR			; CLEAR ANY PENDING DATA
+	RET	NZ			; IF FAILS, ASSUME NOT PRESENT
+	LD	A,ESP_CMD_DISC		; DISCOVER COMMAND
+	CALL	ESP_OUT			; SEND IT
+	LD	DE,10			; DELAY 160US
+	CALL	VDELAY			; ... TO ENSURE OUTPUT RDY SET
+	IN	A,(ESP_STAT)		; GET STATUS
+	AND	ESP_0_RDY		; ISOLATE OUTPUT READY BIT
+	XOR	ESP_0_RDY		; INVERT SO 0=FOUND
+	RET				; DONE
+;
+; CLEAR ESP INPUT QUEUE
+;
+ESP_CLR:
+	LD	B,0			; MAX CHARS TO READ
+ESP_CLR0:
+	CALL	ESP_WTNBSY		; WAIT TILL NOT BUSY
+	IN	A,(ESP_STAT)		; GET STATUS
+	AND	ESP_0_RDY		; IS THERE MORE DATA?
+	RET	Z			; IF NOT, DONE
+	IN	A,(ESP_0_IO)		; GET CHAR
+	DJNZ	ESP_CLR0		; LOOP TILL DONE
+	OR	$FF			; SIGNAL FAILURE
+	RET
+;
+; PRINT ESP VERSION STRING TO CONSOLE
+;
+ESP_PRTVER:
+	CALL	ESP_CLR			; CLEAR ANY PENDING DATA
+	LD	A,ESP_CMD_DISC		; DISCOVER COMMAND
+	CALL	ESP_OUT			; SEND IT
+	CALL	ESP_WTRDY		; WAIT FOR READY TO OUTPUT
+ESP_PRTVER1:
+	CALL	ESP_WTNBSY		; WAIT TILL NOT BUSY
+	IN	A,(ESP_STAT)		; GET STATUS
+	AND	ESP_0_RDY		; ISOLATE OUTPUT READY BIT
+	RET	Z			; DONE IF NOTHING READY
+	CALL	ESP_IN			; GET NEXT CHAR
+	CALL	COUT			; PRINT CHAR
+	JR	ESP_PRTVER1		; LOOP
+;
+; SEND BYTE TO ESP
+;
+ESP_OUT:
+	PUSH	AF			; SAVE VALUE
+	CALL	ESP_WTNBSY		; WAIT TILL NOT BUSY
+	POP	AF			; POP VALUE
+	OUT	(ESP_0_IO),A		; SEND CHARACTER
+	JR	ESP_WTBSY		; RETURN VIA WTBSY
+;
+; GET BYTE FROM ESP (BLOCKING)
+;
+ESP_INWAIT:
+	CALL	ESP_WTNBSY		; WAIT TILL NOT BUSY
+	CALL	ESP_WTRDY		; WAIT FOR READY TO OUTPUT
+	; FALL THRU (GET CHAR VIA ESP_IN)
+;
+; GET BYTE FROM ESP (NON BLOCKING)
+;
+ESP_IN:
+	CALL	ESP_WTNBSY		; WAIT TILL NOT BUSY
+ESP_IN1:	
+	IN	A,(ESP_0_IO)		; GET BYTE
+	PUSH	AF			; SAVE VALUE
+	CALL	ESP_WTBSY		; WAIT TILL BUSY
+	POP	AF			; RESTORE VALUE
+	RET				; AND RETURN
+;
+; WAIT FOR ESP TO BE NOT BUSY
+;
+ESP_WTNBSY:
+	LD	B,0			; MAX TRIES
+ESP_WTNBSY1:	
+	IN	A,(ESP_STAT)		; GET STATUS
+	AND	ESP_0_BUSY		; IS ESP BUSY?
+	RET	Z			; RETURN IF NOT BUSY
+	DJNZ	ESP_WTNBSY1		; ELSE LOOP
+	OR	$FF			; SIGNAL TIMEOUT
+	RET				; AND RETURN
+;
+; WAIT FOR ESP TO BE BUSY
+;
+ESP_WTBSY:
+	LD	B,20			; MAX TRIES
+ESP_WTBSY1:	
+	IN	A,(ESP_STAT)		; GET STATUS
+	AND	ESP_0_BUSY		; IS ESP BUSY?
+	XOR	ESP_0_BUSY		; INVERT
+	RET	Z			; RETURN IF BUSY
+	DJNZ	ESP_WTBSY1		; ELSE LOOP
+	OR	$FF			; SIGNAL TIMEOUT
+	RET				; AND RETURN
+;
+; WAIT FOR ESP TO BE READY TO OUTPUT
+;
+ESP_WTRDY:
+	LD	B,0			; MAX TRIES
+ESP_WTRDY1:
+	IN	A,(ESP_STAT)		; GET STATUS
+	AND	ESP_0_RDY		; IS ESP READY TO OUTPUT
+	XOR	ESP_0_RDY		; INVERT, 0=READY
+	RET	Z			; RETURN IF READY
+	DJNZ	ESP_WTRDY1		; ELSE LOOP
+	OR	$FF			; SIGNAL TIMEOUT
+	RET				; AND RETURN
+;
+;
+;
+ESP_STR_NOHW		.TEXT	" NOT PRESENT$"
+ESP_STR_UPGRADE		.TEXT	" !!!UPGRADE REQUIRED!!!$"
+;
+;==================================================================================================
+; ESP32 CONSOLE DRIVER
+;==================================================================================================
+;
+;
+ESPCON_ROWS	.EQU	25		; VGA DISPLAY ROWS
+ESPCON_COLS	.EQU	80		; VGA DISPLAY COLS
+;
+;
+;
+ESPCON_INIT:
+;
+	CALL	NEWLINE
+	PRTS("ESPCON:$")
+;
+	; DISPLAY CONSOLE DIMENSIONS
+	CALL	PC_SPACE
+	LD	A,ESPCON_COLS
+	CALL	PRTDECB
+	LD	A,'X'
+	CALL	COUT
+	LD	A,ESPCON_ROWS
+	CALL	PRTDECB
+	CALL	PRTSTRD
+	.TEXT	" TEXT (ANSI)$"
+;
+; ADD OURSELVES TO CIO DISPATCH TABLE
+;
+	LD	D,0			; PHYSICAL UNIT IS ZERO
+	LD	E,CIODEV_ESPCON		; DEVICE TYPE
+	LD	BC,ESPCON_FNTBL		; BC := FUNCTION TABLE ADDRESS
+	CALL	CIO_ADDENT		; ADD ENTRY, A := UNIT ASSIGNED
+	LD	(HCB + HCB_CRTDEV),A	; SET OURSELVES AS THE CRT DEVICE
+;
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+; DRIVER FUNCTION TABLE
+;
+ESPCON_FNTBL:
+	.DW	ESPCON_IN
+	.DW	ESPCON_OUT
+	.DW	ESPCON_IST
+	.DW	ESPCON_OST
+	.DW	ESPCON_INITDEV
+	.DW	ESPCON_QUERY
+	.DW	ESPCON_DEVICE
+#IF (($ - ESPCON_FNTBL) != (CIO_FNCNT * 2))
+	.ECHO	"*** INVALID ESPCON FUNCTION TABLE ***\n"
+#ENDIF
+;
+;
+;
+ESPCON_IN:
+	CALL	ESPCON_IST
+	JR	Z,ESPCON_IN
+	LD	A,ESP_CMD_KIN		; KBD INPUT
+	CALL	ESP_OUT			; SEND CMD OPCODE
+	CALL	ESP_INWAIT		; GET KEY
+	LD	E,A			; PUT IN E
+	XOR	A			; SIGNAL SUCCES
+	RET				; AND DONE
+;
+;
+;
+ESPCON_IST:
+	LD	A,ESP_CMD_KST		; KBD BUF STATUS
+	CALL	ESP_OUT			; SEND CMD OPCODE
+	CALL	ESP_INWAIT		; GET BUF SIZE
+	OR	A			; SET FLAGS
+	RET	Z			; AND DONE
+	OR	A
+	RET
+;
+;
+;
+ESPCON_OUT:
+	PUSH	DE
+	LD	A,ESP_CMD_COUT		; CHAR OUT OPCODE
+	CALL	ESP_OUT
+	POP	DE
+	LD	A,E
+	CALL	ESP_OUT			; SEND CHAR VALUE
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+;
+;
+ESPCON_OST:
+	OR	$FF			; SIGNAL OUTPUT QUEUE READY
+	RET				; RETURN
+;
+;
+;
+ESPCON_INITDEV:
+	SYSCHKERR(ERR_NOTIMPL)
+	RET
+;
+;
+;
+ESPCON_QUERY:
+	LD	DE,0
+	LD	HL,0
+	XOR	A
+	RET
+;
+;
+;
+ESPCON_DEVICE:
+	LD	D,CIODEV_ESPCON		; D := DEVICE TYPE
+	LD	E,0			; E := DEVICE NUM, ALWAYS 0
+	LD	C,$BF			; C := DEVICE TYPE, 0xBF IS PROP TERM
+	LD	H,0			; H := 0, DRIVER HAS NO MODES
+	LD	L,ESP_IOBASE		; L := BASE I/O ADDRESS
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+;=============================================================================
+; DATA STORAGE
+;=============================================================================
+;
--- a/Source/HBIOS/fd.asm
+++ b/Source/HBIOS/fd.asm
@@ -1130,9 +1130,11 @@ FD_RETRY1:
 FD_START:
 ;
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	LD	A,4
 	CALL	LDHLIYA
 	CALL	HB_DSKACTCHS		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 ;
 	LD	A,(FCD_FDCRDY)
@@ -1202,9 +1204,6 @@ FD_RUN1:
 	RET

 FD_RUNCHK:
-;;#IF (DSKYENABLE)
-;;	CALL	FD_DSKY
-;;#ENDIF

 FD_RUNEXIT:
 	LD	A,(FST_RC)
@@ -1221,23 +1220,6 @@ FD_RUNERR:

 	JP	FD_RETRC

-;;#IF (DSKYENABLE)
-;;FD_DSKY:
-;;	LD	HL,DSKY_HEXBUF
-;;	LD	A,(FCD_C)
-;;	LD	(HL),A
-;;	INC	HL
-;;	LD	A,(FCD_R)
-;;	LD	(HL),A
-;;	INC	HL
-;;	LD	A,(FRB_ST0)
-;;	LD	(HL),A
-;;	INC	HL
-;;	LD	A,(FRB_ST1)
-;;	LD	(HL),A
-;;	CALL	DSKY_HEXOUT
-;;	RET
-;;#ENDIF
 ;
 ;===============================================================================
 ; FLOPPY DISK CONTROL SERVICES (PHYSICAL DEVICE CONTROL FOR FDC HARDWARE)
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -63,7 +63,6 @@
 ;  - decode.asm
 ;  - encode.asm
 ;  - [xio|mio].asm
-;  - [dsky.asm|dskyng.asm]
 ;  - unlzsa2s.asm
 ;
 ; INCLUDE GENERIC STUFF
@@ -119,6 +118,7 @@ MODCNT	.SET	MODCNT + 1
 ; TinyZ80: LED Port=0x6E, bit 0, inverted, dedicated port
 ; Z80-512K: LED Port=0x6E, bit 0, inverted, dedicated port
 ; MBC: LED Port=0x70, bits 1-0, normal, shared w/ RTC port
+; DUO: LED Port=0x94, bits 1-0, normal, shared w/ RTC port
 ; 
 #IF (LEDENABLE)
  #IF (LEDMODE == LEDMODE_STD)
@@ -248,7 +248,8 @@ RTCDEF		.SET	RTCDEF | %00001000	; INITIAL SPEED LOW
 	RET
 	.FILL	(038H - $),0FFH		; RST 38 / IM1 INT
  #IF (INTMODE == 1)
-	JP	INT_IM1			; JP TO INTERRUPT HANDLER IN HI MEM
+	CALL	HBX_INT			; HANDLE IM1 INTERRUPTS
+	.DB	$10 << 2		; USE SPECIAL VECTOR #16
  #ELSE
 	RET				; RETURN W/ INTS DISABLED
  #ENDIF
@@ -465,7 +466,11 @@ HBX_ROM:
 	BIT	7,A			; BIT 7 SET REQUESTS RAM PAGE
 	JR	Z,HBX_ROM		; NOT SET, SELECT ROM PAGE
 	RES	7,A			; RAM PAGE REQUESTED: CLEAR ROM BIT
+  #IF (PLATFORM == PLT_DUO)
+	ADD	A,64			; ADD 64 x 32K - RAM STARTS FROM 2048K
+  #ELSE
 	ADD	A,16			; ADD 16 x 32K - RAM STARTS FROM 512K
+  #ENDIF
 ;
 HBX_ROM:
 	RLCA				; TIMES 2 - GET 16K PAGE INSTEAD OF 32K
@@ -813,8 +818,6 @@ HBX_INTSTK	.EQU	$
 	!!!	; FORCE AN ASSEMBLY ERROR
 #ENDIF
 ;
-#IF ((INTMODE == 2) | (INTMODE == 3))
-;
 ; HBIOS INTERRUPT SLOT ASSIGNMENTS
 ;
 ; #	Z80		Z180
@@ -873,19 +876,9 @@ HBX_IV0D:	CALL HBX_INT \ .DB $0D << 2
 HBX_IV0E:	CALL HBX_INT \ .DB $0E << 2
 HBX_IV0F:	CALL HBX_INT \ .DB $0F << 2
 ;
-#ENDIF
-;
-INT_IM1:
-#IF (INTMODE == 1)
-	CALL	HBX_INT
-	.DB	$00
-#ELSE
-	RETI				; UNEXPECTED INT, RET W/ INTS LEFT DISABLED
-#ENDIF
+HBX_INT:	; COMMON INTERRUPT ROUTING CODE
 ;
 #IF (INTMODE > 0)
-;
-HBX_INT:	; COMMON INTERRUPT ROUTING CODE
 ;
  #IF (MEMMGR == MM_Z280)
 ;
@@ -967,7 +960,11 @@ HBX_INT_SP	.EQU	$ - 2
 	RETI				; AND RETURN
 ;
  #ENDIF
-
+;
+#ELSE
+;
+	RET
+;
 #ENDIF
 ;
 ; SMALL TEMPORARY STACK FOR USE BY HBX_BNKCPY
@@ -1039,34 +1036,6 @@ HB_STACK	.EQU	$		; TOP OF HBIOS STACK
 ;   INTERRUPT VECTOR TABLE (MUST START AT PAGE BOUNDARY!!!)
 ;==================================================================================================
 ;
-; IM1 INTERRUPTS ARRIVE HERE AFTER BANK SWITCH TO HBIOS BANK
-; LIST OF IM1 INT CALLS IS BUILT DYNAMICALLY BELOW
-; SEE HB_ADDIM1 ROUTINE
-; EACH ENTRY WILL LOOK LIKE:
-;	CALL	XXXX			; CALL INT HANDLER
-;	RET	NZ			; RETURN IF HANDLED
-;
-; NOTE THAT THE LIST IS INITIALLY FILLED WITH CALLS TO HB_BADINT.
-; AS THE TABLE IS POPULATED, THE ADDRESS OF HB_BADINT IS OVERLAID
-; WITH THE ADDRESS OF A REAL INTERRUPT HANDLER.
-;
-; THERE IS ROOM FOR 8 ENTRIES PLUS A FINAL CALL TO HB_BADINT.
-;
-#IF (INTMODE < 2)
-;
-HB_IVT:
-	CALL HB_BADINT \ RET NZ
-	CALL HB_BADINT \ RET NZ
-	CALL HB_BADINT \ RET NZ
-	CALL HB_BADINT \ RET NZ
-	CALL HB_BADINT \ RET NZ
-	CALL HB_BADINT \ RET NZ
-	CALL HB_BADINT \ RET NZ
-	CALL HB_BADINT \ RET NZ
-	CALL HB_BADINT \ RET NZ
-;
-#ENDIF
-;
 ; IM2 INTERRUPTS ARRIVE HERE AFTER BANK SWITCH TO HBIOS BANK
 ; THE LIST OF JP TABLE ENTRIES MATCHES THE IM2 VECTORS ONE FOR
 ; ONE.  ANY CALL TO THE PRIMARY IVT (HBX_IVT) WILL BE MAPPED TO
@@ -1080,8 +1049,6 @@ HB_IVT:
 ; NOTE THAT EACH ENTRY HAS A FILLER BYTE OF VALUE ZERO.  THIS BYTE
 ; HAS NO FUNCTION.  IT IS JUST USED TO MAKE ENTRIES AN EVEN 4 BYTES.
 ;
-#IF ((INTMODE == 2) | (INTMODE == 3))
-;
 HB_IVT:
 HB_IVT00:	JP	HB_BADINT \ .DB 0
 HB_IVT01:	JP	HB_BADINT \ .DB 0
@@ -1099,8 +1066,31 @@ HB_IVT0C:	JP	HB_BADINT \ .DB 0
 HB_IVT0D:	JP	HB_BADINT \ .DB 0
 HB_IVT0E:	JP	HB_BADINT \ .DB 0
 HB_IVT0F:	JP	HB_BADINT \ .DB 0
+HB_IVT10:	JP	HB_IM1INT \ .DB 0
 ;
-#ENDIF
+; IM1 INTERRUPTS ARRIVE HERE AFTER BANK SWITCH TO HBIOS BANK
+; LIST OF IM1 INT CALLS IS BUILT DYNAMICALLY BELOW
+; SEE HB_ADDIM1 ROUTINE
+; EACH ENTRY WILL LOOK LIKE:
+;	CALL	XXXX			; CALL INT HANDLER
+;	RET	NZ			; RETURN IF HANDLED
+;
+; NOTE THAT THE LIST IS INITIALLY FILLED WITH CALLS TO HB_BADINT.
+; AS THE TABLE IS POPULATED, THE ADDRESS OF HB_BADINT IS OVERLAID
+; WITH THE ADDRESS OF A REAL INTERRUPT HANDLER.
+;
+; THERE IS ROOM FOR 8 ENTRIES PLUS A FINAL CALL TO HB_BADINT.
+;
+HB_IM1INT:
+	CALL HB_BADINT \ RET NZ
+	CALL HB_BADINT \ RET NZ
+	CALL HB_BADINT \ RET NZ
+	CALL HB_BADINT \ RET NZ
+	CALL HB_BADINT \ RET NZ
+	CALL HB_BADINT \ RET NZ
+	CALL HB_BADINT \ RET NZ
+	CALL HB_BADINT \ RET NZ
+	CALL HB_BADINT \ RET NZ
 ;
 ;==================================================================================================
 ;   SYSTEM INITIALIZATION
@@ -1325,7 +1315,13 @@ Z280_INITZ:
 	INC	A
 	OUT	(MPGSEL_1),A
  #ENDIF
-	LD	A,62
+;
+  #IF (PLATFORM == PLT_DUO)
+	LD	A,128 + (RAMSIZE / 16) - 2
+  #ELSE
+	LD	A,64 - 2
+  #ENDIF
+;
 	OUT	(MPGSEL_2),A
 	INC	A
 	OUT	(MPGSEL_3),A
@@ -1388,6 +1384,36 @@ Z280_INITZ:
 	LD	(HB_CURBNK),A		; RESTORE HB_CURBNK
 #ENDIF
 ;
+; S100 ROM CONTAINS A HARDWARE LEVEL MONITOR IN BANK ID 3 OF ROM.
+; IF PORT $75 BIT 1 IS SET (SET IS ZERO), THEN WE IMMEDIATELY
+; TRANSITION TO THIS MONITOR.  PRIOR TO THE TRANSITION, WE ALSO
+; CHECK THE VALUE IN THE Z180 RELOAD REGISTER LOW.  IF IT IS ASCII 'W',
+; THEN IT MEANS THE S100 MONITOR IS ATTEMPTING TO REBOOT INTO ROMWBW
+; HBIOS.
+;
+#IF ((PLATFORM == PLT_S100) & TRUE)
+	; CHECK S100 BOARD DIP SWITCH, BIT 1
+	IN	A,($75)			; READ SWITCHES
+	BIT	1,A			; CHECK BIT 1
+	JR	NZ,S100MON_SKIP		; IF NOT SET, CONT ROMWBW BOOT
+;
+	; CHECK RELOAD REGISTER LOW FOR SPECIAL VALUE
+	IN0	A,(Z180_RLDR1L)		; GET RELOAD REG 1 LOW
+	CP	'W'			; CHECK FOR SPECIAL VALUE
+	JR	Z,S100MON_SKIP		; IF SO, DO ROMWBW BOOT
+;
+	; LAUNCH S100 MONITOR FROM ROM BANK 3
+	LD	A,BID_IMG2		; S100 MONITOR BANK
+	LD	IX,0			; EXECUTION RESUMES HERE
+	CALL	HBX_BNKCALL		; CONTINUE IN RAM BANK, DO NOT RETURN
+	HALT				; WE SHOULD NOT COME BACK HERE!
+;
+S100MON_SKIP:
+	; RESTORE DEFAULT RELOAD REGISTER VALUE (PROBABLY NOT NEEDED)
+	XOR	A
+	OUT0	(Z180_RLDR1L),A
+#ENDIF
+;
 ; SAVE CURRENT BANKID
 ;
 ; THIS IS NOT GOING TO WORK IF THE APP BOOT IMAGE IS LOADED
@@ -1712,11 +1738,14 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 ;
 	; MAKE SURE IM1 INT VECTOR IS RIGHT
  #IF (INTMODE == 1)
-	; JP INT_IM1 IF INTERRUPT MODE ACTIVE
-	LD	A,$C3
+	; CALL	HBX_INT			; HANDLE IM1 INTERRUPTS
+	; .DB	$10 << 2		; USE SPECIAL VECTOR #16
+	LD	A,$CD			; CALL OPCODE
 	LD	($0038),A
-	LD	HL,INT_IM1
+	LD	HL,HBX_INT		; ADDRESS
 	LD	($0039),HL
+	LD	A,$10 << 2		; IM1 VECTOR
+	LD	($003B),A
  #ELSE
 	; RETI ($ED, $4D) IF NON-INTERRUPT MODE
 	LD	HL,$0038
@@ -1810,8 +1839,8 @@ SAVE_REC_M:
 ;
 ; TEST DEBUG ***************************************************************************************
 ;
-	PRTS("DEBUG-IVT$")
-	LD	DE,HB_IVT
+	PRTS("DEBUG-IM1INT$")
+	LD	DE,HB_IM1INT
 	CALL	DUMP_BUFFER
 	CALL	NEWLINE
 ;
@@ -1878,6 +1907,35 @@ HB_CPU1:
 	CALL	DSRTC_PREINIT
 #ENDIF
 ;
+#IF (DSKYENABLE)
+  #IF (ICMENABLE)
+	CALL	ICM_PREINIT
+  #ENDIF
+#ENDIF
+;
+#IF (DSKYENABLE)
+  #IF (PKDENABLE)
+	CALL	PKD_PREINIT
+  #ENDIF
+#ENDIF
+;
+#IF (DSKYENABLE)
+	LD	HL,MSG_HBVER +  5
+	LD	A,(DSKY_HEXMAP + RMJ)
+	OR	$80
+	LD	(HL),A
+	INC	HL
+	LD	A,(DSKY_HEXMAP + RMN)
+	OR	$80
+	LD	(HL),A
+	INC	HL
+	LD	A,(DSKY_HEXMAP + RUP)
+	LD	(HL),A
+	LD	HL,MSG_HBVER
+	LD	B,BF_DSKYSHOWSEG
+	CALL	DSKY_DISPATCH
+#ENDIF
+;
 #IF (SKZENABLE)
 ;
 	; SET THE SK Z80-512K UART CLK2 DIVIDER AS
@@ -2088,7 +2146,7 @@ HB_CPU3:
 ;
 #IF (CPUFAM == CPU_Z180)
 ;
-  #IF (INTMODE == 2)
+  #IF (INTMODE > 0)
 ;
 	; MASK ALL EXTERNAL INTERRUPTS FOR NOW
 	LD	A,$01			; INT0 ENABLED, INT1-2 DISABLED
@@ -2211,22 +2269,6 @@ NOT_REC_M0:
 #ENDIF
 	CALL	CALLLIST							; PROCESS THE PRE-INIT CALL TABLE
 ;
-#IF (DSKYENABLE)
-	LD	HL,MSG_HBVER +  5
-	LD	A,(DSKY_HEXMAP + RMJ)
-	OR	$80
-	LD	(HL),A
-	INC	HL
-	LD	A,(DSKY_HEXMAP + RMN)
-	OR	$80
-	LD	(HL),A
-	INC	HL
-	LD	A,(DSKY_HEXMAP + RUP)
-	LD	(HL),A
-	LD	HL,MSG_HBVER
-	CALL	DSKY_SHOW
-#ENDIF
-;
 #IF FALSE
 ;
 ; TEST DEBUG ***************************************************************************************
@@ -2315,8 +2357,8 @@ NXTMIO:	LD	A,(HL)
 ; TEST DEBUG ***************************************************************************************
 ;
 	CALL	NEWLINE2
-	PRTS("DEBUG+IVT$")
-	LD	DE,HB_IVT
+	PRTS("DEBUG+IM1INT$")
+	LD	DE,HB_IM1INT
 	CALL	DUMP_BUFFER
 ;
 ; TEST DEBUG ***************************************************************************************
@@ -2741,6 +2783,7 @@ HB_WDZ:
 ;
 	LD	A,(CB_CONDEV)		; GET CURRENT CONSOLE
 	LD	(HB_NEWCON),A		; AND INIT NEW CONSOLE VAR
+;
 #IF CRTACT
 ;
 ; BIOS IS CONFIGURED TO AUTO ACTIVATE CRT DEVICE.  FIRST,
@@ -2764,11 +2807,6 @@ HB_WDZ:
 ;
 #ENDIF
 ;
-; THIS IS A GOOD PLACE TO DETERMINE IF FRONT PANEL HARDWARE REALLY
-; EXISTS.
-;
-	CALL	FP_DETECT
-;
 #IF (FPSW_ENABLE)
 ;
 ; IF WE HAVE FRONT PANEL SWITCHES, THIS IS THE RIGHT PLACE TO HANDLE
@@ -2782,8 +2820,9 @@ HB_WDZ:
 	LD	A,FPSW_IO
 	CALL	PRTHEXBYTE
 ;
-	; THE EXISTENCE OF THE FP WAS TESTED EARLIER.  IF IT DOESN'T
-	; EXIST, BAIL OUT.
+	CALL	FP_DETECT
+;
+	; IF FP DOESN'T EXIST, BAIL OUT.
 	LD	A,(FPSW_ACTIVE)		; GET FP EXISTENCE FLAG
 	OR	A			; SET FLAGS
 	JR	NZ,HB_FP1		; IF WE HAVE ONE, CONTINUE
@@ -3078,9 +3117,6 @@ HB_INITRLEN	.EQU	(($ - HB_INIT_REC) / 2)
 ;==================================================================================================
 ;
 HB_PCINITTBL:
-#IF (DSKYENABLE)
-	.DW	DSKY_PREINIT
-#ENDIF
 #IF (ASCIENABLE)
 	.DW	ASCI_PREINIT
 #ENDIF
@@ -3128,7 +3164,14 @@ HB_INITTBL:
 	.DW	CTC_INIT
 #ENDIF
 #IF (DSKYENABLE)
-	.DW	DSKY_INIT
+  #IF (ICMENABLE)
+	.DW	ICM_INIT
+  #ENDIF
+#ENDIF
+#IF (DSKYENABLE)
+  #IF (PKDENABLE)
+	.DW	PKD_INIT
+  #ENDIF
 #ENDIF
 #IF (AY38910ENABLE)
 	.DW	AY38910_INIT		; AUDIBLE INDICATOR OF BOOT START
@@ -3212,9 +3255,6 @@ HB_INITTBL:
 #IF (VRCENABLE)
 	.DW	VRC_INIT
 #ENDIF
-;#IF (DSKYENABLE)
-;	.DW	DSKY_INIT
-;#ENDIF
 #IF (DMAENABLE)
 	.DW	DMA_INIT
 #ENDIF
@@ -3254,6 +3294,9 @@ HB_INITTBL:
 #IF (PPPENABLE)
 	.DW	PPP_INIT
 #ENDIF
+#IF (ESPENABLE)
+	.DW	ESP_INIT
+#ENDIF
 ;
 HB_INITTBLLEN	.EQU	(($ - HB_INITTBL) / 2)
 ;
@@ -3322,8 +3365,8 @@ HB_DISPATCH1:
 	JP	C,DIO_DISPATCH
 	CP	BF_RTC + $10		; $20-$2F: REAL TIME CLOCK (RTC)
 	JP	C,RTC_DISPATCH
-	CP	BF_EMU + $10		; $30-$3F: EMULATION
-	JR	C,HB_DISPERR
+	CP	BF_DSKY + $10		; $30-$3F: DSKY
+	JP	C,DSKY_DISPATCH
 	CP	BF_VDA + $10		; $40-$4F: VIDEO DISPLAY ADAPTER
 	JP	C,VDA_DISPATCH
 	CP	BF_SND + $08		; $50-$58: SOUND DRIVERS
@@ -3691,6 +3734,7 @@ HB_DSKUNIT	.DB	0		; CURRENT DISK UNIT
 HB_DSKFUNC	.DB	0		; CURRENT DISK FUNCTION
 ;
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 ;
 ;==================================================================================================
 ;   DSKY DISK ACTIVITY MONITOR
@@ -3711,41 +3755,51 @@ HB_DSKFUNC	.DB	0		; CURRENT DISK FUNCTION
 ;   ALL REGISTERS PERSERVED
 ;
 HB_DSKACT:
+	; SAVE EVERYTHING
 	PUSH	AF
 	PUSH	BC
 	PUSH	DE
 	PUSH	HL
-	LD	DE,DSKY_HEXBUF+3	; START AT END
-	LD	B,3			; 3 BYTES OF SECTOR ADDRESS
+;
+	; COPY VALUE TO LOCAL HEXBUF
+	CALL	LD32
+;
 HB_DSKACT1:
-	LD	A,(HL)			; GET FIRST BYTE
-	LD	(DE),A			; AND STORE IN BUF
-	INC	HL			; NEXT SRC BYTE
-	DEC	DE			; NEXT DEST BYTE
-	DJNZ	HB_DSKACT1		; LOOP
+	LD	BC,DSKY_HEXBUF
+	CALL	ST32
+;
+	; USE DISK UNIT NUMBER FOR MSB
 	LD	A,(HB_DSKUNIT)		; GET DISK UNIT NUM
-	LD	(DE),A			; PUT AT HEAD OF BUF
-HB_DSKACT2:
-	LD	HL,DSKY_HEXBUF		; BINARY BUF
-	LD	DE,DSKY_BUF		; DISPLAY BUF
-	CALL	DSKY_BIN2SEG		; CONVERT TO SEG DISPLAY BUF
-	LD	A,(DSKY_BUF+1)		; SECOND SEGMENT
-	OR	%10000000		; TURN ON DOT
-	LD	(DSKY_BUF+1),A		; SAVE IT
+	LD	(DSKY_HEXBUF+3),A	; REPLACE HIGH BYTE W/ DISK #
+;
+	; CONVERT TO SEGMENT DISPLAY
+	LD	HL,DSKY_HEXBUF		; INPUT POINTER
+	LD	DE,DSKY_BUF		; TEMP BUF FOR OUTPUT
+	CALL	DSKY_BIN2SEG		; CONVERT TO SEG DISPLAY
+;
+	; DECIMAL POINT FOR DISK UNIT SEPARATION
+	LD	HL,DSKY_BUF+1		; SECOND CHAR OF DISP
+	SET	7,(HL)			; TURN ON DECIMAL PT
+;
+	; DECIMAL POINT TO INDICATE WRITE ACTION
 	LD	A,(HB_DSKFUNC)		; GET CURRENT I/O FUNCTION
 	CP	BF_DIOWRITE		; IS IT A WRITE?
-	JR	NZ,HB_DSKACT3		; IF NOT, NO DOT, SKIP AHEAD
-	LD	A,(DSKY_BUF+7)		; LAST SEGMENT
-	OR	%10000000		; TURN ON DOT
-	LD	(DSKY_BUF+7),A		; SAVE IT
-HB_DSKACT3:
-	EX	DE,HL			; SEG DISPLAY BUF TO HL
-	CALL	DSKY_SHOW		; DISPLAY ON DSKY
+	JR	NZ,HB_DSKACT2		; IF NOT, SKIP
+	LD	HL,DSKY_BUF+7		; POINT TO CHAR 7
+	SET	7,(HL)			; SET WRITE DOT
+;
+HB_DSKACT2:
+	; UPDATE DISPLAY
+	LD	HL,DSKY_BUF		; SEG DISPLAY BUF TO HL
+	LD	B,BF_DSKYSHOWSEG	; SHOW SEG FUNCTION
+	CALL	DSKY_DISPATCH		; DO IT
+;
+	; CLEAN UP AND GO AWAY
 	POP	HL
 	POP	DE
 	POP	BC
 	POP	AF
-	RET
+	RET				; DONE
 ;
 ; THIS IS THE CHS VARIANT OF THE ABOVE.  THIS IS USED BY CHS ORIENTED
 ; DISK DRIVERS (BASICALLY JUST FLOPPY).
@@ -3762,24 +3816,12 @@ HB_DSKACTCHS:
 	PUSH	BC
 	PUSH	DE
 	PUSH	HL
-	LD	DE,DSKY_HEXBUF		; START OF HEX BUF
-	LD	A,(HB_DSKUNIT)		; GET DISK UNIT NUM
-	LD	(DE),A			; PUT AT HEAD OF BUF
-	INC	DE			; NEXT BYTE OF BUF
-	LD	A,(HL)			; LSB OF TRACK
-	LD	(DE),A			; ADD TO BUF
-	INC	DE			; NEXT BYTE OF BUF
-	INC	HL			; BUMP TO HEAD
-	INC	HL			; "
-	INC	HL			; "
-	LD	A,(HL)			; GET HEAD
-	LD	(DE),A			; ADD TO BUF
-	INC	DE			; NEXT BYTE OF BUF
-	DEC	HL			; BACK TO SECTOR
-	LD	A,(HL)			; GET SECTOR
-	LD	(DE),A			; ADD TO BUF
-	JR	HB_DSKACT2
+	CALL	LD32			; DE:HL = HSCC
+	; MAP HSCC -> CCHS
+	EX	DE,HL
+	JR	HB_DSKACT1
 ;
+  #ENDIF
 #ENDIF
 ;
 ;==================================================================================================
@@ -3815,6 +3857,38 @@ RTC_DISPADR	.DW	RTC_DISPERR	; RTC DISPATCH ADDRESS
 RTC_DISPACT	.DB	0		; SET WHEN DISPADR SET
 ;
 ;==================================================================================================
+;   DSKY DEVICE DISPATCHER
+;==================================================================================================
+;
+; ROUTE CALL TO DSKY DRIVER
+;   B: FUNCTION
+;
+DSKY_DISPATCH:
+	PUSH	HL			; SAVE INCOMING HL
+	LD	HL,(DSKY_DISPADR)	;
+	EX	(SP),HL
+	RET
+;
+DSKY_DISPERR:
+	SYSCHKERR(ERR_NOHW)
+	RET
+;
+; SET DSKY DISPATCH ADDRESS, USED BY DSKY DRIVERS DURING INIT
+; BC HAS ADDRESS OF DISPATCH ADDRESS
+; WILL ONLY SAVE THE FIRST ADDRESS SET
+;
+DSKY_SETDISP:
+	LD	(DSKY_DISPADR),BC	; SAVE THE ADDRESS
+	OR	$FF			; FLAG ACTIVE VALUE
+	LD	(DSKY_DISPACT),A	; SAVE IT
+	RET				; AND DONE
+;
+;
+;
+DSKY_DISPADR	.DW	DSKY_DISPERR	; DSKY DISPATCH ADDRESS
+DSKY_DISPACT	.DB	0		; SET WHEN DISPADR SET
+;
+;==================================================================================================
 ;   VIDEO DISPLAY ADAPTER DEVICE DISPATCHER
 ;==================================================================================================
 ;
@@ -4216,6 +4290,8 @@ SYS_GET:
 	JP	Z,SYS_GETDIOFN
 	CP	BF_SYSGET_RTCCNT
 	JP	Z,SYS_GETRTCCNT
+	CP	BF_SYSGET_DSKYCNT
+	JP	Z,SYS_GETDSKYCNT
 	CP	BF_SYSGET_VDACNT
 	JP	Z,SYS_GETVDACNT
 	CP	BF_SYSGET_VDAFN
@@ -4303,6 +4379,18 @@ SYS_GETRTCCNT1:
 	XOR	A			; SIGNALS SUCCESS
 	RET
 ;
+; GET DSKY UNIT COUNT
+;
+SYS_GETDSKYCNT:
+	LD	E,0			; ASSUME 0 RTC DEVICES
+	LD	A,(DSKY_DISPACT)	; IS DSKY ACTIVE?
+	OR	A			; SET FLAGS
+	JR	Z,SYS_GETDSKYCNT1	; IF NONE, DONE
+	INC	E			; SET ONE DEVICE
+SYS_GETDSKYCNT1:
+	XOR	A			; SIGNALS SUCCESS
+	RET
+;
 ; GET VIDEO UNIT COUNT
 ;
 SYS_GETVDACNT:
@@ -4983,7 +5071,12 @@ SYS_INTGET1:
 	INC	A			; BUMP TO ADR FIELD
 	LD	H,0
 	LD	L,A
+#IF (INTMODE == 1)
+	LD	DE,HB_IM1INT		; DE := START OF VECTOR TABLE
+#ENDIF
+#IF (INTMODE == 2)
 	LD	DE,HB_IVT		; DE := START OF VECTOR TABLE
+#ENDIF
 	ADD	HL,DE			; HL := ADR OF VECTOR
 	XOR	A			; INDICATE SUCCESS
 	RET
@@ -5029,6 +5122,99 @@ SYS_INTSET1:
 	RET				; DONE
 ;
 ;==================================================================================================
+;   Z280 INTERRUPT VECTOR TABLE
+;==================================================================================================
+;
+#IF (MEMMGR == MM_Z280)
+;
+	; THE Z280 IVT MUST BE ON A 4K BOUNDARY.  IT HAS BEEN LOCATED
+	; HERE IN AN EFFORT TO MINIMIZE WASTED SPACE.  THERE SHOULD BE
+	; A LITTLE LESS THAN 4K OF CODE ABOVE.
+;
+Z280_IVT_SLACK	.EQU	$1000 - ($ & $FFF)
+		.ECHO	"Z280 IVT SLACK occupies "
+		.ECHO	Z280_IVT_SLACK
+		.ECHO	" bytes.\n"
+		;.FILL	$1000 - ($ & $FFF)	; MUST BE 4K ALIGNED!
+		.FILL	Z280_IVT_SLACK		; MUST BE 4K ALIGNED!
+;
+Z280_IVT:
+	.DW	0, 0			; RESERVED
+	.DW	0			; NMI MSR
+	.DW	0			; NMI VECTOR
+	.DW	$0000			; INT A MSR
+	.DW	Z280_BADINT		; INT A VECTOR
+	.DW	$0000			; INT B MSR
+	.DW	Z280_BADINT		; INT B VECTOR
+	.DW	$0000			; INT C MSR
+	.DW	Z280_BADINT		; INT C VECTOR
+	.DW	$0000			; COUNTER/TIMER 0 MSR
+	.DW	Z280_BADINT		; COUNTER/TIMER 0 VECTOR
+	.DW	$0000			; COUNTER/TIMER 1 MSR
+	.DW	Z280_BADINT		; COUNTER/TIMER 1 VECTOR
+	.DW	0, 0			; RESERVED
+	.DW	$0000			; COUNTER/TIMER 2 MSR
+	.DW	Z280_BADINT		; COUNTER/TIMER 2 VECTOR
+	.DW	$0000			; DMA CHANNEL 0 MSR
+	.DW	Z280_BADINT		; DMA CHANNEL 0 VECTOR
+	.DW	$0000			; DMA CHANNEL 1 MSR
+	.DW	Z280_BADINT		; DMA CHANNEL 1 VECTOR
+	.DW	$0000			; DMA CHANNEL 2 MSR
+	.DW	Z280_BADINT		; DMA CHANNEL 2 VECTOR
+	.DW	$0000			; DMA CHANNEL 3 MSR
+	.DW	Z280_BADINT		; DMA CHANNEL 3 VECTOR
+	.DW	$0000			; UART RECEIVER MSR
+	.DW	Z280_BADINT		; UART RECEIVER VECTOR
+	.DW	$0000			; UART TRANSMITTER MSR
+	.DW	Z280_BADINT		; UART TRANSMITTER VECTOR
+	.DW	$0000			; SINGLE STEP TRAP MSR
+	.DW	Z280_SSTEP		; SINGLE STEP TRAP VECTOR
+	.DW	$0000			; BREAK ON HALT TRAP MSR
+	.DW	Z280_BRKHLT		; BREAK ON HALT TRAP VECTOR
+	.DW	$0000			; DIVISION EXCEPTION TRAP MSR
+	.DW	Z280_DIVEXC		; DIVISION EXCEPTION TRAP VECTOR
+	.DW	$0000			; STACK OVERFLOW WARNING TRAP MSR
+	.DW	Z280_STKOVR		; STACK OVERFLOW WARNING TRAP VECTOR
+	.DW	$0000			; ACCESS VIOLATION TRAP MSR
+	.DW	Z280_ACCVIO		; ACCESS VIOLATION TRAP VECTOR
+	.DW	$0000			; SYSTEM CALL TRAP MSR
+	.DW	Z280_SYSCALL		; SYSTEM CALL TRAP VECTOR
+	.DW	$0000			; PRIVILEGED INSTRUCTION TRAP MSR
+	.DW	Z280_PRIVINST		; PRIVILEGED INSTRUCTION TRAP VECTOR
+	.DW	$0000			; EPU <- MEMORY EXTENDED INSTRUCTION TRAP MSR
+	.DW	$0000			; EPU <- MEMORY EXTENDED INSTRUCTION TRAP VECTOR
+	.DW	$0000			; MEMORY <- EPU EXTENDED INSTRUCTION TRAP MSR
+	.DW	$0000			; MEMORY <- EPU EXTENDED INSTRUCTION TRAP VECTOR
+	.DW	$0000			; A <- EPU EXTENDED INSTRUCTION TRAP MSR
+	.DW	$0000			; A <- EPU EXTENDED INSTRUCTION TRAP VECTOR
+	.DW	$0000			; EPU INTERNAL OPERATION EXTENDED INSTRUCTION TRAP MSR
+	.DW	$0000			; EPU INTERNAL OPERATION EXTENDED INSTRUCTION TRAP VECTOR
+	.DW	0, 0			; RESERVED
+	.DW	0, 0			; RESERVED
+	; PROGRAM COUNTER VALUES FOR NMI/INTA (16)
+	.DW	HBX_IV00
+	.DW	HBX_IV01
+	.DW	HBX_IV02
+	.DW	HBX_IV03
+	.DW	HBX_IV04
+	.DW	HBX_IV05
+	.DW	HBX_IV06
+	.DW	HBX_IV07
+	.DW	HBX_IV08
+	.DW	HBX_IV09
+	.DW	HBX_IV0A
+	.DW	HBX_IV0B
+	.DW	HBX_IV0C
+	.DW	HBX_IV0D
+	.DW	HBX_IV0E
+	.DW	HBX_IV0F
+	; THE REMAINDER OF THE Z280 IVT IS TRUNCATED HERE BECAUSE IT
+	; TAKES A BUNCH OF SPACE AND IS NOT USED.  WE SUPPORT ONLY
+	; 16 VECTORED INTERRUPTS AND THEY MUST BE CONNECTED TO INTA.
+;
+#ENDIF
+;
+;==================================================================================================
 ;   GLOBAL HBIOS FUNCTIONS
 ;==================================================================================================
 ;
@@ -5065,7 +5251,43 @@ HB_ADDIM1:
 ;
 HB_IM1CNT	.DB	0		; NUMBER OF ENTRIES IN CALL LIST
 HB_IM1MAX	.DB	8		; MAX ENTRIES IN CALL LIST
-HB_IM1PTR	.DW	HB_IVT		; POINTER FOR NEXT IM1 ENTRY
+HB_IM1PTR	.DW	HB_IM1INT	; POINTER FOR NEXT IM1 ENTRY
+;
+#ENDIF
+;
+#IF (DSKYENABLE)
+;
+;==================================================================================================
+; CONVERT 32 BIT BINARY TO 8 BYTE HEX SEGMENT DISPLAY
+;==================================================================================================
+;
+; HL: ADR OF 32 BIT BINARY
+; DE: ADR OF DEST LED SEGMENT DISPLAY BUFFER (8 BYTES)
+;
+DSKY_BIN2SEG:
+	LD	B,4			; 4 BYTES OF INPUT
+	LD	A,B			; PUT IN ACCUM
+	CALL	ADDHLA			; PROCESS FROM END (LITTLE ENDIAN)
+DSKY_BIN2SEG1:
+	DEC	HL			; DEC PTR (LITTLE ENDIAN)
+	LD	A,(HL)			; HIGH NIBBLE
+	RRCA \ RRCA \ RRCA \ RRCA	; ROTATE BITS
+	CALL	DSKY_BIN2SEG_NIB	; CONVERT NIBBLE INTO OUTPUT BUF
+	LD	A,(HL)			; LOW NIBBLE
+	CALL	DSKY_BIN2SEG_NIB	; CONVERT NIBBLE INTO OUTPUT BUF
+	DJNZ	DSKY_BIN2SEG1		; LOOP FOR ALL INPUT BYTES
+	RET				; DONE
+;
+DSKY_BIN2SEG_NIB:
+	PUSH	HL			; SAVE HL
+	LD	HL,DSKY_HEXMAP		; POINT TO SEG MAP TABLE
+	AND	$0F			; ISOLATE LOW NIBBLE
+	CALL	ADDHLA			; OFFSET INTO TABLE
+	LD	A,(HL)			; LOAD VALUE FROM TABLE
+	POP	HL			; RESTORE HL
+	LD	(DE),A			; SAVE VALUE TO OUTPUT BUF
+	INC	DE			; BUMP TO NEXT OUTPUT BYTE
+	RET				; DONE
 ;
 #ENDIF
 ;
@@ -5552,94 +5774,6 @@ HB_ALLOC1:
 HB_TMPSZ	.DW	0
 HB_TMPREF	.DW	0
 ;
-;==================================================================================================
-;   Z280 INTERRUPT VECTOR TABLE
-;==================================================================================================
-;
-#IF (MEMMGR == MM_Z280)
-;
-	; THE Z280 IVT MUST BE ON A 4K BOUNDARY.  IT HAS BEEN LOCATED
-	; HERE IN AN EFFORT TO MINIMIZE WASTED SPACE.  THERE SHOULD BE
-	; A LITTLE LESS THAN 4K OF CODE ABOVE.
-;
-	.FILL	$1000 - ($ & $FFF)	; MUST BE 4K ALIGNED!
-;
-Z280_IVT:
-	.DW	0, 0			; RESERVED
-	.DW	0			; NMI MSR
-	.DW	0			; NMI VECTOR
-	.DW	$0000			; INT A MSR
-	.DW	Z280_BADINT		; INT A VECTOR
-	.DW	$0000			; INT B MSR
-	.DW	Z280_BADINT		; INT B VECTOR
-	.DW	$0000			; INT C MSR
-	.DW	Z280_BADINT		; INT C VECTOR
-	.DW	$0000			; COUNTER/TIMER 0 MSR
-	.DW	Z280_BADINT		; COUNTER/TIMER 0 VECTOR
-	.DW	$0000			; COUNTER/TIMER 1 MSR
-	.DW	Z280_BADINT		; COUNTER/TIMER 1 VECTOR
-	.DW	0, 0			; RESERVED
-	.DW	$0000			; COUNTER/TIMER 2 MSR
-	.DW	Z280_BADINT		; COUNTER/TIMER 2 VECTOR
-	.DW	$0000			; DMA CHANNEL 0 MSR
-	.DW	Z280_BADINT		; DMA CHANNEL 0 VECTOR
-	.DW	$0000			; DMA CHANNEL 1 MSR
-	.DW	Z280_BADINT		; DMA CHANNEL 1 VECTOR
-	.DW	$0000			; DMA CHANNEL 2 MSR
-	.DW	Z280_BADINT		; DMA CHANNEL 2 VECTOR
-	.DW	$0000			; DMA CHANNEL 3 MSR
-	.DW	Z280_BADINT		; DMA CHANNEL 3 VECTOR
-	.DW	$0000			; UART RECEIVER MSR
-	.DW	Z280_BADINT		; UART RECEIVER VECTOR
-	.DW	$0000			; UART TRANSMITTER MSR
-	.DW	Z280_BADINT		; UART TRANSMITTER VECTOR
-	.DW	$0000			; SINGLE STEP TRAP MSR
-	.DW	Z280_SSTEP		; SINGLE STEP TRAP VECTOR
-	.DW	$0000			; BREAK ON HALT TRAP MSR
-	.DW	Z280_BRKHLT		; BREAK ON HALT TRAP VECTOR
-	.DW	$0000			; DIVISION EXCEPTION TRAP MSR
-	.DW	Z280_DIVEXC		; DIVISION EXCEPTION TRAP VECTOR
-	.DW	$0000			; STACK OVERFLOW WARNING TRAP MSR
-	.DW	Z280_STKOVR		; STACK OVERFLOW WARNING TRAP VECTOR
-	.DW	$0000			; ACCESS VIOLATION TRAP MSR
-	.DW	Z280_ACCVIO		; ACCESS VIOLATION TRAP VECTOR
-	.DW	$0000			; SYSTEM CALL TRAP MSR
-	.DW	Z280_SYSCALL		; SYSTEM CALL TRAP VECTOR
-	.DW	$0000			; PRIVILEGED INSTRUCTION TRAP MSR
-	.DW	Z280_PRIVINST		; PRIVILEGED INSTRUCTION TRAP VECTOR
-	.DW	$0000			; EPU <- MEMORY EXTENDED INSTRUCTION TRAP MSR
-	.DW	$0000			; EPU <- MEMORY EXTENDED INSTRUCTION TRAP VECTOR
-	.DW	$0000			; MEMORY <- EPU EXTENDED INSTRUCTION TRAP MSR
-	.DW	$0000			; MEMORY <- EPU EXTENDED INSTRUCTION TRAP VECTOR
-	.DW	$0000			; A <- EPU EXTENDED INSTRUCTION TRAP MSR
-	.DW	$0000			; A <- EPU EXTENDED INSTRUCTION TRAP VECTOR
-	.DW	$0000			; EPU INTERNAL OPERATION EXTENDED INSTRUCTION TRAP MSR
-	.DW	$0000			; EPU INTERNAL OPERATION EXTENDED INSTRUCTION TRAP VECTOR
-	.DW	0, 0			; RESERVED
-	.DW	0, 0			; RESERVED
-	; PROGRAM COUNTER VALUES FOR NMI/INTA (16)
-	.DW	HBX_IV00
-	.DW	HBX_IV01
-	.DW	HBX_IV02
-	.DW	HBX_IV03
-	.DW	HBX_IV04
-	.DW	HBX_IV05
-	.DW	HBX_IV06
-	.DW	HBX_IV07
-	.DW	HBX_IV08
-	.DW	HBX_IV09
-	.DW	HBX_IV0A
-	.DW	HBX_IV0B
-	.DW	HBX_IV0C
-	.DW	HBX_IV0D
-	.DW	HBX_IV0E
-	.DW	HBX_IV0F
-	; THE REMAINDER OF THE Z280 IVT IS TRUNCATED HERE BECAUSE IT
-	; TAKES A BUNCH OF SPACE AND IS NOT USED.  WE SUPPORT ONLY
-	; 16 VECTORED INTERRUPTS AND THEY MUST BE CONNECTED TO INTA.
-;
-#ENDIF
-;
 ; Z280 BANK SELECTION (CALLED FROM PROXY)
 ;
 #IF (MEMMGR == MM_Z280)
@@ -5966,6 +6100,28 @@ Z280_SYSCALL_GO:
 ;   DEVICE DRIVERS
 ;==================================================================================================
 ;
+#IF (DSKYENABLE)
+  #IF (ICMENABLE)
+ORG_ICM	.EQU	$
+  #INCLUDE "icm.asm"
+SIZ_ICM	.EQU	$ - ORG_ICM
+		.ECHO	"ICM occupies "
+		.ECHO	SIZ_ICM
+		.ECHO	" bytes.\n"
+  #ENDIF
+#ENDIF
+;
+#IF (DSKYENABLE)
+  #IF (PKDENABLE)
+ORG_PKD	.EQU	$
+  #INCLUDE "pkd.asm"
+SIZ_PKD	.EQU	$ - ORG_PKD
+		.ECHO	"PKD occupies "
+		.ECHO	SIZ_PKD
+		.ECHO	" bytes.\n"
+  #ENDIF
+#ENDIF
+;
 #IF (DSRTCENABLE)
 ORG_DSRTC	.EQU	$
  #INCLUDE "dsrtc.asm"
@@ -6294,6 +6450,15 @@ SIZ_PPP		.EQU	$ - ORG_PPP
 		.ECHO	" bytes.\n"
 #ENDIF
 ;
+#IF (ESPENABLE)
+ORG_ESP		.EQU	$
+  #INCLUDE "esp.asm"
+SIZ_ESP		.EQU	$ - ORG_ESP
+		.ECHO	"ESP occupies "
+		.ECHO	SIZ_ESP
+		.ECHO	" bytes.\n"
+#ENDIF
+;
 #IF (MDENABLE)
 ORG_MD		.EQU	$
  #INCLUDE "md.asm"
@@ -6461,16 +6626,6 @@ SIZ_YM2612	.EQU	$ - ORG_YM2612
 #INCLUDE "mio.asm"
 #ENDIF
 ;
-#IF (DSKYENABLE)
-#DEFINE	DSKY_KBD
-  #IF (DSKYMODE == DSKYMODE_V1)
-#INCLUDE "dsky.asm"
-  #ENDIF
-  #IF (DSKYMODE == DSKYMODE_NG)
-#INCLUDE "dskyng.asm"
-  #ENDIF
-#ENDIF
-;
 ; INCLUDE LZSA2 decompression engine if required.
 ;
 #IF ((VGAENABLE | CVDUENABLE | TMSENABLE | GDCENABLE | VRCENABLE) & USELZSA2)
@@ -6974,7 +7129,7 @@ PS_PRTSC1:
 	RET
 ;
 PS_PRTSC2:
-	PRTS("PropTerm$")		; ASSUME PROPELLER
+	PRTS("Term Module$")
 	CALL	PC_COMMA
 	PRTS("ANSI$")
 	RET
@@ -7213,6 +7368,7 @@ PS_SDUF		.TEXT	"UF$"
 PS_SDDUART	.TEXT	"DUART$"
 PS_SDZ2U	.TEXT	"Z2U$"
 PS_SDLPT	.TEXT	"LPT$"
+PS_SDESPCON	.TEXT	"ESPCON$"
 ;
 ; CHARACTER SUB TYPE STRINGS
 ;
@@ -7560,12 +7716,7 @@ STR_CONTINUE	.TEXT	"\r\nContinue (Y/N)? $"
 STR_RESTART	.TEXT	"\r\n\r\n>>> Press hardware reset button to restart system\r\n\r\n$"
 ;
 #IF (DSKYENABLE)	;	'H','B','I','O',' ',' ',' ',' '
-  #IF (DSKYMODE == DSKYMODE_V1)
-MSG_HBVER		.DB	$3E,$7F,$0A,$7B,$00,$00,$00,$00	; "HBIO    "
-  #ENDIF
-  #IF (DSKYMODE == DSKYMODE_NG)
 MSG_HBVER		.DB	$76,$7F,$30,$3F,$00,$00,$00,$00	; "HBIO    "
-  #ENDIF
 #ENDIF
 ;
 HB_APPBNK	.DB	0		; START BANK WHEN RUN IN APP MODE
@@ -7628,6 +7779,41 @@ MG014_STATMAPHI:
 ;
 #ENDIF
 ;
+#IF (DSKYENABLE)
+;
+;==================================================================================================
+; STORAGE
+;==================================================================================================
+;
+; CODES FOR NUMERICS
+; HIGH BIT ALWAYS CLEAR TO SUPPRESS DECIMAL POINT
+; SET HIGH BIT TO SHOW DECIMAL POINT
+;
+DSKY_HEXMAP:
+	.DB	$3F	; 0
+	.DB	$06	; 1
+	.DB	$5B	; 2
+	.DB	$4F	; 3
+	.DB	$66	; 4
+	.DB	$6D	; 5
+	.DB	$7D	; 6
+	.DB	$07	; 7
+	.DB	$7F	; 8
+	.DB	$67	; 9
+	.DB	$77	; A
+	.DB	$7C	; B
+	.DB	$39	; C
+	.DB	$5E	; D
+	.DB	$79	; E
+	.DB	$71	; F
+;
+DSKY_BUF	.FILL	8,0
+DSKY_BUFLEN	.EQU	$ - DSKY_BUF
+DSKY_HEXBUF	.FILL	4,0
+DSKY_HEXBUFLEN	.EQU	$ - DSKY_HEXBUF
+;
+#ENDIF
+;
 HB_END		.EQU	$
 ;
 SLACK		.EQU	BNKTOP - $
--- a/Source/HBIOS/hbios.inc
+++ b/Source/HBIOS/hbios.inc
@@ -36,7 +36,16 @@ BF_RTCGETALM	.EQU	BF_RTC + 6	; GET ALARM
 BF_RTCSETALM	.EQU	BF_RTC + 7	; SET ALARM
 BF_RTCDEVICE	.EQU	BF_RTC + 8	; RTC DEVICE INFO REPORT
 ;
-BF_EMU		.EQU	$30		; DEPRECATED
+BF_DSKY		.EQU	$30
+BF_DSKYRESET	.EQU	BF_DSKY + 0	; RESET DSKY HARDWARE
+BF_DSKYSTAT	.EQU	BF_DSKY + 1	; GET KEYPAD STATUS
+BF_DSKYGETKEY	.EQU	BF_DSKY + 2	; GET KEY FROM KEYPAD
+BF_DSKYSHOWHEX	.EQU	BF_DSKY + 3	; DISPLAY BINARY VALUE IN HEX
+BF_DSKYSHOWSEG	.EQU	BF_DSKY + 4	; DISPLAY ENCODED SEGMENT STRING
+BF_DSKYKEYLEDS	.EQU	BF_DSKY + 5	; SET/CLEAR KEYPAD LEDS
+BF_DSKYSTATLED	.EQU	BF_DSKY + 6	; SET/CLEAR STATUS LEDS
+BF_DSKYBEEP	.EQU	BF_DSKY + 7	; BEEP ONBOARD DSKY SPEAKER
+BF_DSKYDEVICE	.EQU	BF_DSKY + 8	; DSKY DEVICE INFO REPORT
 ;
 BF_VDA		.EQU	$40
 BF_VDAINI	.EQU	BF_VDA + 0	; INITIALIZE VDU
@@ -98,6 +107,7 @@ BF_SYSGET_CIOFN		.EQU	$01	; GET CIO UNIT FN/DATA ADR
 BF_SYSGET_DIOCNT	.EQU	$10	; GET DISK UNIT COUNT
 BF_SYSGET_DIOFN		.EQU	$11	; GET DIO UNIT FN/DATA ADR
 BF_SYSGET_RTCCNT	.EQU	$20	; GET RTC UNIT COUNT
+BF_SYSGET_DSKYCNT	.EQU	$30	; GET DSKY UNIT COUNT
 BF_SYSGET_VDACNT	.EQU	$40	; GET VDA UNIT COUNT
 BF_SYSGET_VDAFN		.EQU	$41	; GET VDA UNIT FN/DATA ADR
 BF_SYSGET_SNDCNT	.EQU	$50	; GET VDA UNIT COUNT
@@ -140,6 +150,8 @@ PLT_RCZ280	.EQU	12		; RCBUS W/ Z280
 PLT_MBC		.EQU	13		; MULTI BOARD COMPUTER
 PLT_RPH		.EQU	14		; RHYOPHYRE GRAPHICS COMPUTER
 PLT_Z80RETRO	.EQU	15		; Z80 RETRO COMPUTER
+PLT_S100	.EQU	16		; S100 COMPUTERS Z180 SYSTEM
+PLT_DUO		.EQU	17		; DUODYNE Z80 SYSTEM
 ;
 ; HBIOS GLOBAL ERROR RETURN VALUES
 ;
@@ -301,6 +313,7 @@ CIODEV_UF	.EQU	$80
 CIODEV_DUART	.EQU	$90
 CIODEV_Z2U	.EQU	$A0
 CIODEV_LPT	.EQU	$B0
+CIODEV_ESPCON	.EQU	$C0
 ;
 ; SUB TYPES OF CHAR DEVICES
 ;
@@ -334,6 +347,11 @@ RTCDEV_INT	.EQU	$30		; PERIODIC INT TIMER
 RTCDEV_DS7	.EQU	$40		; DS1307 (I2C)
 RTCDEV_RP5	.EQU	$50		; RP5C01
 ;
+; DSKY DEVICE IDS
+;
+DSKYDEV_ICM	.EQU	$00		; Intersil ICM7218
+DSKYDEV_PKD	.EQU	$10		; Intel P8279
+;
 ; VIDEO DEVICE IDS
 ;
 VDADEV_VDU	.EQU	$00		; ECB VDU - MOTOROLA 6545
@@ -350,6 +368,37 @@ SNDDEV_AY38910	.EQU	$10
 SNDDEV_BITMODE	.EQU	$20
 SNDDEV_YM2612	.EQU	$30
 ;
+; DSKY KEYS
+;
+KY_0	.EQU	$00
+KY_1	.EQU	$01
+KY_2	.EQU	$02
+KY_3	.EQU	$03
+KY_4	.EQU	$04
+KY_5	.EQU	$05
+KY_6	.EQU	$06
+KY_7	.EQU	$07
+KY_8	.EQU	$08
+KY_9	.EQU	$09
+KY_A	.EQU	$0A
+KY_B	.EQU	$0B
+KY_C	.EQU	$0C
+KY_D	.EQU	$0D
+KY_E	.EQU	$0E
+KY_F	.EQU	$0F
+KY_FW	.EQU	$10	; FORWARD
+KY_BK	.EQU	$11	; BACKWARD
+KY_CL	.EQU	$12	; CLEAR
+KY_EN	.EQU	$13	; ENTER
+KY_DE	.EQU	$14	; DEPOSIT
+KY_EX	.EQU	$15	; EXAMINE
+KY_GO	.EQU	$16	; GO
+KY_BO	.EQU	$17	; BOOT
+KY_F4	.EQU	$18	; F4
+KY_F3	.EQU	$19	; F3
+KY_F2	.EQU	$1A	; F2
+KY_F1	.EQU	$1B	; F1
+;
 ; HBIOS CONTROL BLOCK OFFSETS
 ; WARNING: THESE OFFSETS WILL CHANGE SIGNIFICANTLY BETWEEN RELEASES
 ;          IT IS STRONGLY RECOMMENDED THAT YOU DO NOT USE THEM!
--- a/Source/HBIOS/hdsk.asm
+++ b/Source/HBIOS/hdsk.asm
@@ -234,9 +234,11 @@ HDSK_RW0:
 	LD	(HDSK_RC),A		; CLEAR RETURN CODE
 ;
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	LD	A,HDSK_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 ;
 	; CONVERT LBA HHHH:LLLL (4 BYTES)
--- a/Source/HBIOS/icm.asm
+++ b/Source/HBIOS/icm.asm
@@ -0,0 +1,359 @@
+;
+;==================================================================================================
+; DSKY V1 ICM7218 (DISPLAY AND KEYBOARD) ROUTINES 
+;==================================================================================================
+;
+; THE ICM MAY COINCIDE ON THE SAME PPI BUS AS A PPISD.  IT MAY NOT
+; SHARE A PPI BUS WITH A PPIDE.  SEE PPI_BUS.TXT FOR MORE INFORMATION.
+;
+; LED SEGMENTS (BIT VALUES)
+;
+;	+--40--+
+;	02    20
+;	+--04--+
+;	08    10
+;	+--01--+  80
+;
+; ICM SCAN CODES ARE ONE BYTE: CCRRRRRR
+; BITS 7-6 IDENTFY THE COLUMN OF THE KEY PRESSED
+; BITS 5-0 ARE A BITMAP, WITH A BIT ON TO INDICATE ROW OF KEY PRESSED
+;
+;      ____PC0________PC1________PC2________PC3____
+; PB5 |	 $20 [D]    $60 [E]    $A0 [F]	  $E0 [BO]
+; PB4 |	 $10 [A]    $50 [B]    $90 [C]	  $D0 [GO]
+; PB3 |	 $08 [7]    $48 [8]    $88 [9]	  $C8 [EX]
+; PB2 |	 $04 [4]    $44 [5]    $84 [6]	  $C4 [DE]
+; PB1 |	 $02 [1]    $42 [2]    $82 [3]	  $C2 [EN]
+; PB0 |	 $01 [FW]   $41 [0]    $81 [BK]	  $C1 [CL]
+;
+;
+ICM_PPIA		.EQU 	ICMPPIBASE + 0	; PORT A
+ICM_PPIB		.EQU 	ICMPPIBASE + 1	; PORT B
+ICM_PPIC		.EQU 	ICMPPIBASE + 2	; PORT C
+ICM_PPIX	 	.EQU 	ICMPPIBASE + 3	; PPI CONTROL PORT
+;
+;__ICM_INIT__________________________________________________________________________________________
+;
+;  CONFIGURE PARALLEL PORT AND CLEAR KEYPAD BUFFER
+;____________________________________________________________________________________________________
+;
+ICM_PREINIT:
+	LD	A,(DSKY_DISPACT)	; DSKY DISPATCHER ALREADY SET?
+	OR	A			; SET FLAGS
+	RET	NZ			; IF ALREADY ACTIVE, ABORT
+;
+	OR	$FF			; SIGNAL TO WAIT FOR KEY RELEASE
+	LD	(ICM_KEYBUF),A		; SET IT
+;
+	; PPI PORT B IS NORMALLY SET TO INPUT, BUT HERE WE
+	; TEMPORARILY SET IT TO OUTPUT.  WHILE IN OUTPUT MODE, WE
+	; WRITE A VALUE OF $FF WHICH WILL BE PERSISTED BY THE PPI
+	; CHIP BUS HOLD CIRCUIT IF THERE IS NO ICM PRESENT.  SO,
+	; WE CAN SUBSEQUENTLY TEST FOR PPIB=$FF TO SEE IF THERE IS
+	; NO ICM AND PREVENT PROBLEMS WITH PHANTOM ICM KEY PRESSES.
+	; IF A ICM IS PRESENT, IT WILL SIMPLY OVERPOWER THE PPI
+	; BUS HOLD CIRCUIT.
+	LD	A,$80			; PA OUT, PB OUT, PC OUT
+	OUT	(ICM_PPIX),A
+	LD	A,$FF			; SET PPIB=$FF, BUS HOLD
+	OUT	(ICM_PPIB),A
+;
+	LD	A,$82			; PA OUT, PB IN, PC OUT
+	OUT 	(ICM_PPIX),A
+;
+	;IN	A,(ICM_PPIB)		; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+;
+	IN	A,(ICM_PPIB)		; READ PPIB
+	XOR	$FF			; INVERT RESULT
+;
+	CALL	ICM_RESET
+;
+	RET	Z			; BAIL OUT NOW IF NOT PRESENT
+;
+	; RECORD HARDWARE PRESENT
+	LD	A,$FF
+	LD	(ICM_PRESENT),A
+;
+	; REGISTER DRIVER WITH HBIOS
+	LD	BC,ICM_DISPATCH
+	CALL	DSKY_SETDISP
+;
+	RET
+;
+ICM_INIT:
+	CALL	NEWLINE			; FORMATTING
+	PRTS("ICM:$")			; FORMATTING
+;
+	PRTS(" IO=0x$")			; FORMATTING
+	LD	A,ICMPPIBASE		; GET BASE PORT
+	CALL	PRTHEXBYTE		; PRINT BASE PORT
+;
+	LD	A,(ICM_PRESENT)		; PRESENT?
+	OR	A			; SET FLAGS
+	RET	NZ			; YES, ALL DONE
+	PRTS(" NOT PRESENT$")		; NOT PRESENT
+;
+	RET
+;
+; ICM DEVICE FUNCTION DISPATCH ENTRY
+;   A: RESULT (OUT), 0=OK, Z=OK, NZ=ERR
+;   B: FUNCTION (IN)
+;
+ICM_DISPATCH:
+	LD	A,B			; GET REQUESTED FUNCTION
+	AND	$0F			; ISOLATE SUB-FUNCTION
+	JP	Z,ICM_RESET		; RESET DSKY HARDWARE
+	DEC	A	
+	JP	Z,ICM_STAT		; GET KEYPAD STATUS
+	DEC	A	
+	JP	Z,ICM_GETKEY		; READ A KEY FROM THE KEYPAD
+	DEC	A	
+	JP	Z,ICM_SHOWHEX		; DISPLAY A 32-BIT BINARY VALUE IN HEX
+	DEC	A	
+	JP	Z,ICM_SHOWSEG		; DISPLAY SEGMENTS
+	DEC	A	
+	JP	Z,ICM_KEYLEDS		; SET KEYPAD LEDS
+	DEC	A	
+	JP	Z,ICM_STATLED		; SET STATUS LED
+	DEC	A	
+	JP	Z,ICM_BEEP		; BEEP DSKY SPEAKER
+	DEC	A
+	JP	Z,ICM_DEVICE		; DEVICE INFO
+	SYSCHKERR(ERR_NOFUNC)
+	RET
+;
+;
+;
+ICM_RESET:
+	PUSH	AF
+	LD	A,$70			; PPISD AND 7218 INACTIVE
+	OUT	(ICM_PPIC),A
+	POP	AF
+	RET
+;
+; CHECK FOR KEY PRESS, SAVE RAW VALUE, RETURN STATUS
+;
+ICM_STAT:
+	LD	A,(ICM_KEYBUF)		; GET CURRENT BUF VAL
+	CP	$FF			; $FF MEANS WE ARE WAITING FOR PREV KEY TO BE RELEASED
+	JR	Z,ICM_STAT1		; CHECK FOR PREV KEY RELEASE
+	OR	A			; DO WE HAVE A SCAN CODE BUFFERED ALREADY?
+	RET	NZ			; IF SO, WE ARE DONE
+	JR	ICM_STAT2		; OTHERWISE, DO KEY CHECK
+	
+ICM_STAT1:
+	; WAITING FOR PREVIOUS KEY RELEASE
+	CALL	ICM_KEY			; SCAN
+	JR	Z,ICM_STAT2		; IF ZERO, PREV KEY RELEASED, CONTINUE
+	XOR	A			; SIGNAL NO KEY PRESSED
+	RET				; AND DONE
+
+ICM_STAT2:
+	CALL	ICM_KEY			; SCAN
+	LD	(ICM_KEYBUF),A		; SAVE RESULT
+	RET				; RETURN WITH ZF SET APPROPRIATELY
+;
+; WAIT FOR A ICM KEYPRESS AND RETURN
+;
+ICM_GETKEY:
+	CALL	ICM_STAT		; CHECK STATUS
+	JR	Z,ICM_GETKEY		; LOOP IF NOTHING READY
+	LD	A,(ICM_KEYBUF)
+	LD	B,24			; SIZE OF DECODE TABLE
+	LD	C,0			; INDEX
+	LD	HL,ICM_KEYMAP		; POINT TO BEGINNING OF TABLE
+ICM_GETKEY1:
+	CP	(HL)			; MATCH?
+	JR	Z,ICM_GETKEY2		; FOUND, DONE
+	INC	HL
+	INC	C			; BUMP INDEX
+	DJNZ	ICM_GETKEY1		; LOOP UNTIL EOT
+ICM_GETKEY1A:
+	LD	A,$FF			; NOT FOUND ERR, RETURN $FF
+	RET
+ICM_GETKEY2:
+	LD	A,$FF			; SET KEY BUF TO $FF
+	LD	(ICM_KEYBUF),A		; DO IT
+	; RETURN THE INDEX POSITION WHERE THE SCAN CODE WAS FOUND
+	LD	E,C			; RETURN INDEX VALUE
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+; DISPLAY HEX VALUE FROM DE:HL
+;
+ICM_SHOWHEX:
+	LD	BC,DSKY_HEXBUF		; POINT TO HEX BUFFER
+	CALL	ST32			; STORE 32-BIT BINARY THERE
+	LD	HL,DSKY_HEXBUF		; FROM: BINARY VALUE (HL)
+	LD	DE,DSKY_BUF		; TO: SEGMENT BUFFER (DE)
+	CALL	DSKY_BIN2SEG		; CONVERT
+	LD	HL,DSKY_BUF		; POINT TO SEGMENT BUFFER
+	; AND FALL THRU TO DISPLAY IT
+;
+; ICM SHOW BUFFER
+;   HL: ADDRESS OF BUFFER
+;
+ICM_SHOWSEG:
+	LD	A,82H			; SETUP PPI
+	OUT	(ICM_PPIX),A
+	CALL	ICM_COFF
+	LD	A,$F0			; 7218 -> (DATA COMING, NO DECODE)
+	OUT	(ICM_PPIA),A
+	CALL	ICM_STROBEC		; STROBE COMMAND
+	LD	B,DSKY_BUFLEN		; NUMBER OF DIGITS
+	LD	C,ICM_PPIA
+ICM_HEXOUT2:
+	LD	A,(HL)
+	CALL	ICM_XLAT		; MAP SEGMENTS
+	XOR	$80			; FIX DOT POLARITY
+	OUT	(C),A
+	INC	HL
+	DEC	B
+	JP	Z,ICM_STROBE		; DO FINAL STROBE AND RETURN
+	CALL	ICM_STROBE		; STROBE BYTE VALUE
+	JR	ICM_HEXOUT2
+ICM_STROBEC:	; COMMAND STROBE
+	LD	A,80H | 30H
+	JP	ICM_STROBE0
+ICM_STROBE:	; DATA STROBE
+	LD	A,00H | 30H		; SET WRITE STROBE
+ICM_STROBE0:
+	OUT	(ICM_PPIC),A		; OUT TO PORTC
+	CALL	DLY2			; DELAY
+ICM_COFF:
+	LD	A,40H | 30H		; QUIESCE
+	OUT	(ICM_PPIC),A		; OUT TO PORTC
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+;
+;
+ICM_KEYLEDS:
+ICM_STATLED:
+ICM_BEEP:
+	XOR	A			; PRETEND SUCCESS
+	RET
+;
+; DEVICE INFORMATION
+;
+ICM_DEVICE:
+	LD	D,DSKYDEV_ICM		; D := DEVICE TYPE
+	LD	E,0			; E := PHYSICAL DEVICE NUMBER
+	LD	H,0			; H := MODE
+	LD	L,ICMPPIBASE		; L := BASE I/O ADDRESS
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+;__ICM_KEY___________________________________________________________________________________________
+;
+;  CHECK FOR KEY PRESS W/ DEBOUNCE
+;____________________________________________________________________________________________________
+;
+ICM_KEY:
+	CALL	ICM_SCAN		; INITIAL KEY PRESS SCAN
+	LD	E,A			; SAVE INITIAL SCAN VALUE
+ICM_KEY1:
+	; MAX BOUNCE TIME FOR OMRON B3F IS 3MS
+	PUSH	DE			; SAVE DE
+	LD	DE,300			; ~3MS DELAY
+	CALL	VDELAY			; DO IT
+	CALL	ICM_SCAN		; REPEAT SCAN
+	POP	DE			; RESTORE DE
+	RET	Z			; IF NOTHING PRESSED, DONE
+	CP	E			; SAME?
+	JR	ICM_KEY2		; YES, READY TO RETURN
+	LD	E,A			; OTHERWISE, SAVE NEW SCAN VAL
+	JR	ICM_KEY1		; AND LOOP UNTIL STABLE VALUE
+ICM_KEY2:
+	OR	A			; SET FLAGS BASED ON VALUE
+	RET				; AND DONE
+;
+;__ICM_SCAN__________________________________________________________________________________________
+;
+;  SCAN KEYPAD AND RETURN RAW SCAN CODE (RETURNS ZERO IF NO KEY PRESSED)
+;____________________________________________________________________________________________________
+;
+ICM_SCAN:
+	LD	B,4			; 4 COLUMNS
+	LD	C,$01			; FIRST COLUMN
+	LD	E,0			; INITIAL COL ID
+ICM_SCAN1:
+	LD	A,C			; COL TO A
+	OR	$70			; KEEP PPISD AND 7218 INACTIVE
+	OUT	(ICM_PPIC),A		; ACTIVATE COL
+	IN	A,(ICM_PPIB)		; READ ROW BITS
+	AND	$3F			; MASK, WE ONLY HAVE 6 ROWS, OTHERS UNDEFINED
+	JR	NZ,ICM_SCAN2		; IF NOT ZERO, GOT SOMETHING
+	RLC	C			; NEXT COL
+	INC	E			; BUMP COL ID
+	DJNZ	ICM_SCAN1		; LOOP THROUGH ALL COLS
+	XOR	A			; NOTHING FOUND, RETURN ZERO
+	JP	ICM_RESET		; RETURN VIA RESET
+ICM_SCAN2:
+	RRC	E			; MOVE COL ID
+	RRC	E			; ... TO HIGH BITS 6 & 7
+	OR	E			; COMBINE WITH ROW
+	JP	ICM_RESET		; RETURN VIA RESET
+;
+;
+; CONVERT FORM STANDARD SEGMENT ENCODING TO ICM ENCODING
+;
+;	From:		To:
+;	+--01--+	+--40--+
+;	20    02	02    20
+;	+--40--+	+--04--+
+;	10    04	08    10
+;	+--08--+  80	+--01--+  80
+;
+ICM_XLAT:
+	PUSH	BC
+	PUSH	HL
+	LD	C,A			; ORIG VALUE TO C
+	XOR	A			; INIT RESULT VALUE
+	LD	B,8
+	LD	HL,ICM_XTBL
+ICM_XLAT1:
+	RRC	C			; SHIFT NEXT BIT TO CF
+	JR	NC,ICM_XLAT2		; SKIP IF BIT NOT SET
+	OR	(HL)
+ICM_XLAT2:
+	INC	HL
+	DJNZ	ICM_XLAT1
+	POP	HL
+	POP	BC
+	RET
+;
+ICM_XTBL	.DB	$40, $20, $10, $01, $08, $02, $04, $80
+;
+;_ _TABLE_____________________________________________________________________________________________________________
+;
+ICM_KEYMAP:
+	; POS	$00  $01  $02  $03  $04  $05  $06  $07
+	; KEY   [0]  [1]  [2]  [3]  [4]  [5]  [6]  [7]
+	.DB	$41, $02, $42, $82, $04, $44, $84, $08
+;                                                  
+	; POS	$08  $09  $0A  $0B  $0C  $0D  $0E  $0F
+	; KEY   [8]  [9]  [A]  [B]  [C]  [D]  [E]  [F]
+	.DB	$48, $88, $10, $50, $90, $20, $60, $A0
+;                                                  
+	; POS	$10  $11  $12  $13  $14  $15  $16  $17
+	; KEY   [FW] [BK] [CL] [EN] [DE] [EX] [GO] [BO]
+	.DB	$01, $81, $C1, $C2, $C4, $C8, $D0, $E0
+;
+; KBD WORKING STORAGE
+;
+ICM_KEYBUF	.DB	0
+;
+;==================================================================================================
+; UTILTITY FUNCTIONS
+;==================================================================================================
+;
+;
+;==================================================================================================
+; STORAGE
+;==================================================================================================
+;
+; SEG DISPLAY WORKING STORAGE
+;
+ICM_PRESENT	.DB	0
--- a/Source/HBIOS/ide.asm
+++ b/Source/HBIOS/ide.asm
@@ -794,9 +794,11 @@ IDE_PKT_RDSEC:
 	; SETUP LBA
 ;
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	LD	A,IDE_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 ;
 	; 3 BYTES, LITTLE ENDIAN -> BIG ENDIAN
@@ -861,9 +863,11 @@ IDE_PKT_WRSEC:
 	; SETUP LBA
 ;
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	LD	A,IDE_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 ;
 	; 3 BYTES, LITTLE ENDIAN -> BIG ENDIAN
@@ -891,9 +895,11 @@ IDE_PKT_WRSEC:
 IDE_SETADDR:
 ;
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	LD	A,IDE_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 	; SEND 3 LOWEST BYTES OF LBA IN REVERSE ORDER
 	; IDE_REG_LBA3 HAS ALREADY BEEN SET
--- a/Source/HBIOS/imm.asm
+++ b/Source/HBIOS/imm.asm
@@ -344,9 +344,11 @@ IMM_IO:
 	LD	(IMM_DSKBUF),HL		; SAVE DISK BUFFER ADDRESS
 ;
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	LD	A,IMM_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 ;
 	; SETUP LBA
--- a/Source/HBIOS/md.asm
+++ b/Source/HBIOS/md.asm
@@ -303,9 +303,11 @@ MD_RW1:
 	PUSH	BC			; SAVE COUNTERS
 ;
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	LD	A,MD_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 ;
 	LD	HL,(MD_RWFNADR)		; GET PENDING IO FUNCTION ADDRESS
--- a/Source/HBIOS/dskyng.asm
+++ b/Source/HBIOS/dskyng.asm
--- a/Source/HBIOS/ppa.asm
+++ b/Source/HBIOS/ppa.asm
@@ -340,9 +340,11 @@ PPA_IO:
 	LD	(PPA_DSKBUF),HL		; SAVE DISK BUFFER ADDRESS
 ;
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	LD	A,PPA_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 ;
 	; SETUP LBA
--- a/Source/HBIOS/ppide.asm
+++ b/Source/HBIOS/ppide.asm
@@ -800,9 +800,11 @@ PPIDE_PKT_RDSEC:
 	; SETUP LBA
 ;
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	LD	A,PPIDE_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 ;
 	; 3 BYTES, LITTLE ENDIAN -> BIG ENDIAN
@@ -867,9 +869,11 @@ PPIDE_PKT_WRSEC:
 	; SETUP LBA
 ;
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	LD	A,PPIDE_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 ;
 	; 3 BYTES, LITTLE ENDIAN -> BIG ENDIAN
@@ -897,9 +901,11 @@ PPIDE_PKT_WRSEC:
 PPIDE_SETADDR:
 ;
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	LD	A,PPIDE_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 	; SEND 3 LOWEST BYTES OF LBA IN REVERSE ORDER
 	; IDE_REG_LBA3 HAS ALREADY BEEN SET
@@ -1286,19 +1292,22 @@ PPIDE_RESET:
 	LD	C,(IY+PPIDE_PPI)	; PPI CONTROL WORD
 	OUT	(C),A			; WRITE IT
 ;
-; IF A DSKYNG IS ACTIVE AND IS ON THE SAME PPI PORT AS THE PPISD BEING
+; IF A DSKYNG IS ACTIVE AND IS ON THE SAME PPI PORT AS THE PPIDE BEING
 ; RESET, THEN THE DSKYNG WILL ALSO BE RESET.  SO, THE RESET CODE IS
 ; BRACKETED WITH CODE TO SAVE AND RESTORE THE STATE OF THE DSKYNG.
 ; THERE IS NO CHECK FOR THE SPECIFIC PPI PORT SINCE IT DOES NO HARM
 ; IF THE DSKYNG IS SAVED AND RESTORED.
 ;
+; THIS DOES NOT TEST THAT A DSKYNG IS ACTUALLY PRESENT
+; AND OPERATING -- COULD CAUSE PROBLEMS
+;
 #IF (DSKYENABLE)
-  #IF (DSKYMODE == DSKYMODE_NG)
-	; SAVE CONTENTS OF DSKY DISPLAY ACROSS RESET
+  #IF (PKDENABLE)
+	; SAVE CONTENTS OF DSKYNG DISPLAY ACROSS RESET
 	LD	B,8
 	LD	C,0
 	LD	HL,DSKY_BUF
-	CALL	DSKY_GETSTR
+	CALL	PKD_GETSTR
  #ENDIF
 #ENDIF
 ;
@@ -1319,13 +1328,13 @@ PPIDE_RESET:
 	CALL	VDELAY
 ;
 #IF (DSKYENABLE)
-  #IF (DSKYMODE == DSKYMODE_NG)
-	; REININT DSKY AND RESTORE CONTENTS
-	CALL	DSKY_REINIT
+  #IF (PKDENABLE)
+	; REININT DSKYNG AND RESTORE CONTENTS
+	CALL	PKD_REINIT
 	LD	B,8
 	LD	C,0
 	LD	HL,DSKY_BUF
-	CALL	DSKY_PUTSTR
+	CALL	PKD_PUTSTR
  #ENDIF
 #ENDIF
 ;
--- a/Source/HBIOS/ppp.asm
+++ b/Source/HBIOS/ppp.asm
@@ -4,7 +4,6 @@
 ;==================================================================================================
 ;
 ; TODO:
-;   1) ADD SUPPORT FOR DSKY
 ;
 PPP_IO		.EQU	PPPBASE + 0	; PPP DATA I/O (PPI PORT A)
 PPP_CTL		.EQU	PPPBASE + 2	; PPP CTL LINES (PPI PORT C)
@@ -942,7 +941,9 @@ PPPSD_SENDBLK:
 	LD	A,PPPSD_LBA		; OFFSET OF LBA
 	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 	LD	B,4
 PPPSD_SENDBLK1:
--- a/Source/HBIOS/prp.asm
+++ b/Source/HBIOS/prp.asm
@@ -4,7 +4,6 @@
 ;==================================================================================================
 ;
 ; TODO:
-;   1) ADD SUPPORT FOR DSKY
 ;
 PRP_IOBASE	.EQU	$A8
 ;
@@ -876,7 +875,9 @@ PRPSD_SETBLK:
 	LD	A,PRPSD_LBA		; OFFSET OF LBA
 	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 	OTIR
 	RET
--- a/Source/HBIOS/rf.asm
+++ b/Source/HBIOS/rf.asm
@@ -314,9 +314,11 @@ RF_SETIO:
 RF_SETADR:
 ;
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	LD	A,RF_LBA
 	CALL	LDHLIYA
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 ;
 	LD	A,(RF_IO)		; OUTPUT THE LOGICAL BLOCK
--- a/Source/HBIOS/romldr.asm
+++ b/Source/HBIOS/romldr.asm
@@ -47,7 +47,8 @@ cmdbuf	.equ	$80	; cmd buf is in second half of page zero
 cmdmax	.equ	60	; max cmd len (arbitrary), must be < bufsiz
 bufsiz	.equ	$80	; size of cmd buf
 ;
-int_im1	.equ	$FF00	; IM1 vector target for RomWBW HBIOS proxy
+;;int_im1	.equ	$FF00	; IM1 vector target for RomWBW HBIOS proxy
+hbx_int		.equ	$FF60	; IM1 vector target for RomWBW HBIOS proxy
 ;
 bid_cur	.equ	-1	; used below to indicate current bank
 ;
@@ -77,7 +78,8 @@ bid_cur	.equ	-1	; used below to indicate current bank
 	.fill	($38 - $)
 #if (BIOS == BIOS_WBW)
  #if (INTMODE == 1)
-	jp	int_im1			; go to handler in hi mem
+	call	hbx_int			; handle im1 interrupts
+	.db	$10 << 2		; use special vector #16
  #else
 	ret				; return w/ ints left disabled
  #endif
@@ -170,6 +172,16 @@ start1:
 #if (INTMODE == 1)
 	ei
 #endif
+;
+#if (BIOS == BIOS_WBW)
+	; Check for DSKY and set flag
+	ld	b,BF_SYSGET		; HBIOS func: get
+	ld	c,BF_SYSGET_DSKYCNT	; get DSKY count
+	rst	08			; do it
+	ld	a,e			; put in A
+	ld	(dskyact),a		; save it
+#endif
+
 ;
 ;=======================================================================
 ; Loader prompt
@@ -231,18 +243,11 @@ prompt:
 	call	clrbuf			; zero fill the cmd buffer
 ;
 #if (DSKYENABLE)
-	call	DSKY_PREINIT		; *** TEMPORARY ***
-	call	DSKY_RESET		; clear DSKY
 	ld	hl,msg_sel		; boot select msg
-	call	DSKY_SHOW		; show on DSKY
-
- #if (DSKYMODE == DSKYMODE_NG)
-	call 	DSKY_PUTLED
-	.db 	$3f,$3f,$3f,$3f,$00,$00,$00,$00
-	call 	DSKY_BEEP
-	call 	DSKY_L2ON
- #endif
-
+	call	dsky_show		; show on DSKY
+	call	dsky_highlightallkeys
+	call 	dsky_beep
+	call 	dsky_l2on
 #endif
 ;
 wtkey:
@@ -251,8 +256,7 @@ wtkey:
 	jr	nz,concmd		; if pending, do console command
 ;
 #if (DSKYENABLE)
-	call	DSKY_STAT		; check DSKY for keypress
-	or	a			; set flags
+	call	dsky_stat		; check DSKY for keypress
 	jp	nz,dskycmd		; if pending, do DSKY command
 #endif
 ;
@@ -295,11 +299,8 @@ concmd:
 	call	clrled			; clear LEDs
 ;
 #if (DSKYENABLE)
-  #if (DSKYMODE == DSKYMODE_NG)
-	call 	DSKY_PUTLED
-	.db 	$00,$00,$00,$00,$00,$00,$00,$00
-	call 	DSKY_L2OFF
-  #endif
+	call	dsky_highlightkeysoff
+	call 	dsky_l2off
 #endif
 ;
 	; Get a command line from console and handle it
@@ -516,15 +517,15 @@ fp_flopboot2:
 dskycmd:
 	call	clrled			; clear LEDs
 ;
-	call	DSKY_GETKEY		; get DSKY key
+	call	dsky_getkey		; get DSKY key
+	ld	a,e			; put in A
 	cp	$FF			; check for error
 	ret	z			; abort if so
 ;
-  #if (DSKYMODE == DSKYMODE_NG)
-	call 	DSKY_PUTLED
-	.db 	$00,$00,$00,$00,$00,$00,$00,$00
-	call 	DSKY_L2OFF
-  #endif
+	push	af
+	call	dsky_highlightkeysoff
+	call 	dsky_l2off
+	pop	af
 ;
 	; Attempt built-in commands
 	cp	KY_BO			; reboot system
@@ -861,7 +862,7 @@ reboot:
 ;
 #if (DSKYENABLE)
 	ld	hl,msg_boot		; point to boot message
-	call	DSKY_SHOW		; display message
+	call	dsky_show		; display message
 #endif
 ;
 	; cold boot system
@@ -893,7 +894,7 @@ romload:
 ;
 #if (DSKYENABLE)
 	ld	hl,msg_load		; point to load message
-	call	DSKY_SHOW		; display message
+	call	dsky_show		; display message
 #endif
 ;
 #if (BIOS == BIOS_WBW)
@@ -977,7 +978,7 @@ romload1:
 ;
 #if (DSKYENABLE)
 	ld	hl,msg_go		; point to go message
-	call	DSKY_SHOW		; display message
+	call	dsky_show		; display message
 #endif
 ;
 	ld	l,(ix+ra_ent)		; HL := app entry address
@@ -1002,7 +1003,7 @@ diskboot:
 ;
 #if (DSKYENABLE)
 	ld	hl,msg_load		; point to load message
-	call	DSKY_SHOW		; display message
+	call	dsky_show		; display message
 #endif
 ;
 #if (BIOS == BIOS_WBW)
@@ -1286,7 +1287,7 @@ diskboot10:
 ;
 #if (DSKYENABLE)
 	ld	hl,msg_go		; point to go message
-	call	DSKY_SHOW		; display message
+	call	dsky_show		; display message
 #endif
 ;
 	; Jump to entry vector
@@ -2061,6 +2062,60 @@ devunk		.db	"UNK",0
 str_devlst	.db	"\r\n\r\nDisk Devices:",0
 ;
 #endif
+
+#if (DSKYENABLE)
+
+;
+;=======================================================================
+; DSKY interface routines
+;=======================================================================
+;
+dsky_stat:
+	ld	b,BF_DSKYSTAT
+	jr	dsky_hbcall
+;
+dsky_getkey:
+	ld	b,BF_DSKYGETKEY
+	jr	dsky_hbcall
+;
+dsky_show:
+	ld	b,BF_DSKYSHOWSEG
+	jr	dsky_hbcall
+;
+dsky_beep:
+	ld	b,BF_DSKYBEEP
+	jr	dsky_hbcall
+;
+dsky_l2on:
+	ld	e,1
+	jr	dsky_statled
+dsky_l2off:
+	ld	e,0
+dsky_statled:
+	ld	b,BF_DSKYSTATLED
+	ld	d,1
+	jr	dsky_hbcall
+;
+dsky_putled:
+	ld	b,BF_DSKYKEYLEDS
+	jr	dsky_hbcall
+;
+dsky_highlightallkeys:
+	ld	hl,dsky_highlightallkeyleds
+	jr 	dsky_putled
+;
+dsky_highlightkeysoff:
+	ld	hl,dsky_highlightkeyledsoff
+	jr 	dsky_putled
+;
+dsky_hbcall:
+	ld	a,(dskyact)
+	or	a
+	ret	z
+	rst	08
+	ret
+;
+#endif
 ;
 ;=======================================================================
 ; Error handlers
@@ -2116,22 +2171,6 @@ str_err_sig	.db	"No system image on disk",0
 str_err_api	.db	"Unexpected hardware BIOS API failure",0
 ;
 ;=======================================================================
-; Includes
-;=======================================================================
-;
-#if (DSKYENABLE)
-#define	DSKY_KBD
-  #if (DSKYMODE == DSKYMODE_V1)
-VDELAY	.equ	vdelay
-DLY2	.equ	dly2
-#include "dsky.asm"
-  #endif
-  #if (DSKYMODE == DSKYMODE_NG)
-#include "dskyng.asm"
-  #endif
-#endif
-;
-;=======================================================================
 ; Working data storage (initialized)
 ;=======================================================================
 ;
@@ -2179,21 +2218,20 @@ str_help	.db	"\r\n"
 		.db	0
 ;
 #if (DSKYENABLE)
-  #if (DSKYMODE == DSKYMODE_V1)
-msg_sel		.db	$7f,$1d,$1d,$0f,$6c,$00,$00,$00	; "boot?   "
-msg_boot	.db	$7f,$1d,$1d,$0f,$80,$80,$80,$00	; "boot... "
-msg_load	.db	$0b,$1d,$7d,$3d,$80,$80,$80,$00	; "load... "
-msg_go		.db	$5b,$1d,$80,$80,$80,$00,$00,$00	; "go...   "
-  #endif
-  #if (DSKYMODE == DSKYMODE_NG)
 msg_sel		.db	$7f,$5c,$5c,$78,$53,$00,$00,$00	; "boot?   "
 msg_boot	.db	$7f,$5c,$5c,$78,$80,$80,$80,$00	; "boot... "
 msg_load	.db	$38,$5c,$5f,$5e,$80,$80,$80,$00	; "load... "
 msg_go		.db	$3d,$5c,$80,$80,$80,$00,$00,$00	; "go...   "
-  #endif
 #endif
 ;
 ;=======================================================================
+; DSKY keypad led matrix masks
+;=======================================================================
+;
+dsky_highlightallkeyleds	.db 	$3f,$3f,$3f,$3f,$00,$00,$00,$00
+dsky_highlightkeyledsoff	.db 	$00,$00,$00,$00,$00,$00,$00,$00
+;
+;=======================================================================
 ; ROM Application Table
 ;=======================================================================
 ;
@@ -2273,6 +2311,11 @@ ra_tbl:
 ;      ---------  -------  -----  --------  -----        -------  -------  ----------
 ra_ent(str_mon,	  'M',	   KY_CL, BID_IMG0, MON_IMGLOC,  MON_LOC, MON_SIZ, MON_SERIAL)
 ra_entsiz	.equ	$ - ra_tbl
+#if (BIOS == BIOS_WBW)
+  #if (PLATFORM == PLT_S100)
+ra_ent(str_smon,  'S',	   $FF,	  BID_IMG2, $0000,       $0000,   $2100,   $0000)
+  #endif
+#endif
 ra_ent(str_zsys,  'Z',	   KY_FW, BID_IMG0, ZSYS_IMGLOC, CPM_LOC, CPM_SIZ, CPM_ENT)
 ra_ent(str_cpm22, 'C',	   KY_BK, BID_IMG0, CPM_IMGLOC,  CPM_LOC, CPM_SIZ, CPM_ENT)
 #if (BIOS == BIOS_WBW)
@@ -2311,6 +2354,7 @@ str_tbas	.db	"Tasty BASIC",0
 str_play	.db	"Play a Game",0
 str_upd		.db	"XModem Flash Updater",0
 str_user	.db	"User App",0
+str_smon	.db	"S100 Z180 Monitor",0
 str_egg		.db	"",0
 str_net		.db	"Network Boot",0
 str_switches	.db	"FP Switches = 0x",0
@@ -2342,6 +2386,7 @@ bootslice	.db	0		; boot disk slice
 loadcnt		.db	0		; num disk sectors to load
 switches	.db	0		; front panel switches
 diskcnt		.db	0		; disk unit count value
+dskyact		.db	0		; DSKY active if != 0
 ;
 ;=======================================================================
 ; Pad remainder of ROM Loader
--- a/Source/HBIOS/s100mon.z80
+++ b/Source/HBIOS/s100mon.z80
--- a/Source/HBIOS/sd.asm
+++ b/Source/HBIOS/sd.asm
@@ -9,14 +9,14 @@
 ;	- TEST XC CARD TYPE DETECTION
 ;	- TRY TO GET INIT TO FAIL, REMOVE DELAYS AT START OF GOIDLE?
 ;
-;----------------------------------------------------------------------------------------------
-; SD Signal	Active	JUHA	N8	CSIO	PPI	UART	DSD	MK4	SC	MT
-; ------------	------- ------- ------- ------- ------- ------- ------- -------	-------	-------
-; CS (DAT3)	LO ->	RTC:2	RTC:2	RTC:2	~PC:4	~MCR:3	OPR:2	SD:2	~RTC:2/3OPR:4/5
-; CLK		HI ->	RTC:1	RTC:1	CSIO	PC:1	~MCR:2	OPR:1	CSIO	CSIO	SPI
-; DI (CMD)	HI ->	RTC:0	RTC:0	CSIO	PC:0	~MCR:0	OPR:0	CSIO	CSIO	SPI
-; DO (DAT0)	HI ->	RTC:7	RTC:6	CSIO	PB:7	~MSR:5	OPR:0	CSIO	CSIO	SPI
-;----------------------------------------------------------------------------------------------
+;-----------------------------------------------------------------------------------------------------
+; SD Signal	Active	JUHA	N8	CSIO	PPI	UART	DSD	MK4	SC	MT     PIO
+; ------------	------- ------- ------- ------- ------- ------- ------- -------	-------	--------------
+; CS (DAT3)	LO ->	RTC:2	RTC:2	RTC:2	~PC:4	~MCR:3	OPR:2	SD:2	~RTC:2/3OPR:4/5~OPR:3
+; CLK		HI ->	RTC:1	RTC:1	CSIO	PC:1	~MCR:2	OPR:1	CSIO	CSIO	SPI    OPR:4
+; DI (CMD)	HI ->	RTC:0	RTC:0	CSIO	PC:0	~MCR:0	OPR:0	CSIO	CSIO	SPI    OPR:0
+; DO (DAT0)	HI ->	RTC:7	RTC:6	CSIO	PB:7	~MSR:5	OPR:0	CSIO	CSIO	SPI    OPR:7
+;-----------------------------------------------------------------------------------------------------
 ;
 ; CS = CHIP SELECT (AKA DAT3 FOR NON-SPI MODE)
 ; CLK = CLOCK
@@ -167,6 +167,7 @@ RTCDEF		.SET	RTCDEF | SD_OPRDEF	; SET DEFAULT IN HBIOS MAINLINE
 SD_DEVMAX	.EQU	1		; NUMBER OF PHYSICAL UNITS (SOCKETS)
 SD_PPIBASE	.EQU	SDPPIBASE	; BASE IO PORT FOR PPI
 SD_PPIB		.EQU	SDPPIBASE + 1	; PPI PORT B (INPUT: DOUT)
+SD_PPIB		.EQU	SDPPIBASE + 1	; PPI PORT B (INPUT: DOUT)
 SD_PPIC		.EQU	SDPPIBASE + 2	; PPI PORT C (OUTPUT: CS, CLK, DIN)
 SD_PPIX		.EQU	SDPPIBASE + 3	; PPI CONTROL PORT
 SD_OPRREG	.EQU	SD_PPIC		; PPI PORT C IS OPR REG
@@ -298,7 +299,10 @@ SD_INVCS	.EQU	FALSE		; INVERT CS
 SD_DEVMAX	.EQU	1		; NUMBER OF PHYSICAL UNITS (SOCKETS)
 SD_IOBASE	.EQU	$69		; IO BASE ADDRESS FOR SD INTERFACE
 SD_OPRREG	.EQU	SD_IOBASE	; OUTPUT PORT (OUTPUT: CS, CLK, DIN)
-SD_OPRDEF	.EQU	%11111111	; OUTPUT PORT DEFAULT STATE
+;--- WBW
+;SD_OPRDEF	.EQU	%11111111	; OUTPUT PORT DEFAULT STATE
+SD_OPRDEF	.EQU	%11101111	; OUTPUT PORT DEFAULT STATE
+;---
 SD_INPREG	.EQU	SD_IOBASE	; INPUT REGISTER
 SD_CS0		.EQU	%00001000	; SELECT
 SD_CLK		.EQU	%00010000	; CLOCK
@@ -1382,7 +1386,9 @@ SD_SETADDR:
 	LD	A,SD_LBA		; OFFSET OF LBA VALUE
 	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 	CALL	LD32			; LOAD IT TO DE:HL, AF IS TRASHED
 	POP	AF			; GET CARD TYPE BACK
@@ -1564,11 +1570,6 @@ SD_EXECCMD3:
 #IF (SDTRACE >= 3)
 	CALL	SD_PRTRC		; IF MAX TRACING, PRINT RC
 #ENDIF
-;;#IF (DSKYENABLE)
-;;	PUSH	AF
-;;	CALL	SD_DSKY			; IF USING DSKY, SHOW IT THERE
-;;	POP	AF
-;;#ENDIF
 	AND	~$01			; MASK OFF IDLE BIT AND SET FLAGS
 	RET	Z			; IF RC = 0, NO ERROR, RETURN
 	CALL	SD_DONE			; IF ERROR, COMPLETE TRANSACTION
@@ -1804,6 +1805,7 @@ SD_SETUP:
 ;
 #IF (SDMODE == SDMODE_PIO)
 	LD	A,SD_OPRDEF		; All output bits high
+	LD	(SD_OPRVAL),A		; WBW
 	OUT	(SD_OPRREG),A
 	LD	A,$CF			; Port B mode 3
 	OUT	(SD_DDR),A
@@ -2342,29 +2344,6 @@ SD_PRTPREFIX:
 	CALL	PC_COLON
 	POP	AF
 	RET
-;;;
-;;; DISPLAY COMMAND, LOW ORDER WORD OF PARMS, AND RC
-;;;
-;;#IF (DSKYENABLE)
-;;SD_DSKY:
-;;	PUSH	AF
-;;	PUSH	HL
-;;	LD	HL,DSKY_HEXBUF
-;;	LD	A,(SD_CMD)
-;;	LD	(HL),A
-;;	INC	HL
-;;	LD	A,(SD_CMDP2)
-;;	LD	(HL),A
-;;	INC	HL
-;;	LD	A,(SD_CMDP3)
-;;	LD	(HL),A
-;;	INC	HL
-;;	LD	A,(SD_RC)
-;;	CALL	DSKY_HEXOUT
-;;	POP	HL
-;;	POP	AF
-;;	RET
-;;#ENDIF
 ;
 ;=============================================================================
 ; STRING DATA
--- a/Source/HBIOS/std.asm
+++ b/Source/HBIOS/std.asm
@@ -17,6 +17,8 @@
 ; 13. MBC	Andrew Lynch's Multi Board Computer
 ; 14. RPH	Andrew Lynch's RHYOPHYRE Graphics Computer
 ; 15. Z80RETRO	Peter Wilson's Z80-Retro Computer
+; 16. S100	S100 Computers Z180-based System
+; 17. DUO	Andrew Lynch's Duodyne Computer

 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;
@@ -728,12 +730,13 @@ MON_SERIAL	.EQU	MON_LOC + (1 * 3)	; MONITOR ENTRY (SERIAL PORT)
 ;
 ; INTERRUPT MODE 2 SLOT ASSIGNMENTS
 ;
-#IF ((INTMODE == 2) | (INTMODE == 3))
+#IF (((CPUFAM == CPU_Z180) | (CPUFAM == CPU_Z280)) & (INTMODE > 0))

-  #IF ((CPUFAM == CPU_Z180) | (CPUFAM == CPU_Z280))
+; NOTE THAT Z180 PROCESSES ALL INTERNAL INTERRUPTS JUST LIKE
+; IM2 EVEN WHEN CHIP IS IN IM1 MODE.  SO WE INCLUDE THE IM2
+; INTERRUPT ASSIGNMENTS FOR IM1 BELOW.

 ; Z180-BASED SYSTEMS
-
 INT_INT1	.EQU	0	; Z180 INT 1
 INT_INT2	.EQU	1	; Z180 INT 2
 INT_TIM0	.EQU	2	; Z180 TIMER 0
@@ -750,19 +753,18 @@ INT_PIO1B	.EQU	12	; ZILOG PIO 1, CHANNEL B
 INT_SIO0	.EQU	13	; ZILOG SIO 0, CHANNEL A & B
 INT_SIO1	.EQU	14	; ZILOG SIO 1, CHANNEL A & B

-  #ELSE
+#ENDIF

-; Z80-BASED SYSTEMS
-
-
-    #IF (PLATFORM == PLT_MBC)
+#IF ((CPUFAM == CPU_Z80) & (INTMODE == 2))
+  #IF (PLATFORM == PLT_MBC)

+; MBC Z80
 ;INT_CTC0A	.EQU	0	; ZILOG CTC 0, CHANNEL A
 ;INT_CTC0B	.EQU	1	; ZILOG CTC 0, CHANNEL B
 ;INT_CTC0C	.EQU	2	; ZILOG CTC 0, CHANNEL C
 ;INT_CTC0D	.EQU	3	; ZILOG CTC 0, CHANNEL D
-INT_UART0	.EQU	4	; MBC UART 0
-INT_UART1	.EQU	5	; MBC UART 1
+INT_UART0	.EQU	4	; UART 0
+INT_UART1	.EQU	5	; UART 1
 INT_SIO0	.EQU	8	; ZILOG SIO 0, CHANNEL A & B
 INT_SIO1	.EQU	9	; ZILOG SIO 1, CHANNEL A & B
 INT_CTC0A	.EQU	12	; ZILOG CTC 0, CHANNEL A
@@ -774,14 +776,15 @@ INT_CTC0D	.EQU	15	; ZILOG CTC 0, CHANNEL D
 ;INT_PIO1A	.EQU	11	; ZILOG PIO 1, CHANNEL A
 ;INT_PIO1B	.EQU	12	; ZILOG PIO 1, CHANNEL B

-    #ELSE
+  #ELSE

+; GENERIC Z80
 INT_CTC0A	.EQU	0	; ZILOG CTC 0, CHANNEL A
 INT_CTC0B	.EQU	1	; ZILOG CTC 0, CHANNEL B
 INT_CTC0C	.EQU	2	; ZILOG CTC 0, CHANNEL C
 INT_CTC0D	.EQU	3	; ZILOG CTC 0, CHANNEL D
-INT_UART0	.EQU	4	; MBC UART 0
-INT_UART1	.EQU	5	; MBC UART 1
+INT_UART0	.EQU	4	; UART 0
+INT_UART1	.EQU	5	; UART 1
 INT_SIO0	.EQU	7	; ZILOG SIO 0, CHANNEL A & B
 INT_SIO1	.EQU	8	; ZILOG SIO 1, CHANNEL A & B
 INT_PIO0A	.EQU	9	; ZILOG PIO 0, CHANNEL A
@@ -790,13 +793,11 @@ INT_PIO1A	.EQU	11	; ZILOG PIO 1, CHANNEL A
 INT_PIO1B	.EQU	12	; ZILOG PIO 1, CHANNEL B

    #ENDIF
-
-  #ENDIF
+#ENDIF

 #DEFINE IVT(INTX) HB_IVT+(INTX * 4)+1
 #DEFINE VEC(INTX) INTX*2

-#ENDIF
 ;
 ; SET DEFAULT CSIO SPEED (INTERNAL CLOCK, SLOW AS POSSIBLE)
 ; DIV 1280, 14KHZ @ 18MHZ CLK
--- a/Source/HBIOS/syq.asm
+++ b/Source/HBIOS/syq.asm
@@ -418,7 +418,9 @@ SYQ_IO:
 	LD	A,SYQ_LBA		; LBA OFFSET IN CONFIG
 	CALL	LDHLIYA			; POINT TO LBA DWORD
 #IF (DSKYENABLE)
+  #IF (DSKYDSKACT)
 	CALL	HB_DSKACT		; SHOW ACTIVITY
+  #ENDIF
 #ENDIF
 	CALL	LD32			; SET DE:HL TO LBA
 ;
--- a/Source/HBIOS/uart.asm
+++ b/Source/HBIOS/uart.asm
@@ -59,6 +59,7 @@ UARTMBASE		.EQU	$18
 UART4BASE		.EQU	$C0
 UARTRBASE		.EQU	$A0
 UARTDBASE		.EQU	$80
+UARTYBASE		.EQU	$58
 ;
 #IF (UARTINTS)
 ;
@@ -1087,6 +1088,16 @@ UART_CFG_MFP:
 	.DW	UARTCFG				; LINE CONFIGURATION
 	.DW	0				; SHOULD NEVER NEED INT HANDLER
 #ENDIF
+#IF (UARTDUO)
+UART_CFG_DUO:
+	; DUODYNE ONBOARD SERIAL PORT
+	.DB	0				; DEVICE NUMBER (UPDATED DURING INIT)
+	.DB	0				; UART TYPE
+	.DB	UARTYBASE			; IO PORT BASE (RBR, THR)
+	.DB	UARTYBASE + UART_LSR		; LINE STATUS PORT (LSR)
+	.DW	UARTCFG				; LINE CONFIGURATION
+	.DW	0				; POINTER TO RCV BUFFER STRUCT
+#ENDIF
 ;
 UART_CNT	.EQU	($ - UART_CFG) / 8
 ;
--- a/Source/Images/fd_nzcom.txt
+++ b/Source/Images/fd_nzcom.txt
@@ -3,6 +3,12 @@
 #
 d_nzcom/ReadMe.txt 0:
 #
+# Include selected CP/M 2.2 files
+#
+d_cpm22/u0/STAT.COM 0:
+d_cpm22/u0/SUBMIT.COM 0:
+d_cpm22/u0/XSUB.COM 0:
+#
 # Add RomWBW utilities
 #
 #../../Binary/Apps/*.com 0:
--- a/Source/ReadMe.txt
+++ b/Source/ReadMe.txt
@@ -142,6 +142,9 @@ to determine the <plt> component of the configuration filename:
 	DYNO		Dyno Z180 Single Board Computer
 	MBC		Andrew Lynch's Nhyodyne Z80 MBC
 	RPH		Andrew Lynch's Rhyophyre Z180 SBC
+	Z80RETRO	Peter Wilson's Z80-Retro Computer
+	S100		S100 Computers Z180-based System
+	DUO		Andrew Lynch's Duodyne Computer
 	UNA		John Coffman's UNA System

 Configuration files are found in the Source\HBIOS\Config 
--- a/Source/ver.inc
+++ b/Source/ver.inc
@@ -2,7 +2,7 @@
 #DEFINE	RMN	3
 #DEFINE	RUP	0
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.3.0-dev.26"
+#DEFINE BIOSVER	"3.3.0-dev.38"
 #define rmj	RMJ
 #define rmn	RMN
 #define rup	RUP
--- a/Source/ver.lib
+++ b/Source/ver.lib
@@ -3,5 +3,5 @@ rmn	equ	3
 rup	equ	0
 rtp	equ	0
 biosver	macro
-	db	"3.3.0-dev.26"
+	db	"3.3.0-dev.38"
 	endm
Author	SHA1	Message	Date
Wayne Warthen	2bc5333f2b	Add Boot Loader Menu Entry for S100 Z180 Monitor Invocation	2023-07-25 16:47:51 -07:00
Wayne Warthen	a5575456e2	Initial Support for Duodyne	2023-07-24 19:24:49 -07:00
Wayne Warthen	bdb8dc020b	Update S100 Monitor to v0.34	2023-07-22 18:56:37 -07:00
Wayne Warthen	faaba69554	Improve sd.asm SD Card Compatibility - PIO mode of sd.asm driver modified to setup shadow register (Issue #352). - Relocated Z280 IVT to improve space utilization in HBIOS bank.	2023-07-17 14:52:14 -07:00
Wayne Warthen	0395bba4f5	Preliminary Support for ESP32 Nhyodyne Module - Initial console support for Dan Werner's ESP32 Module	2023-07-10 13:16:24 -07:00
Wayne Warthen	14ac7a917b	Upgrade s100mon to Latest - Incorporated latest S100 Board Monitor code from John Monahan	2023-07-09 12:38:48 -07:00
Wayne Warthen	7a209d4053	S100 Monitor Update The S100 Monitor will now allow launching RomWBW using the 'B' command.	2023-07-08 18:03:13 -07:00
Wayne Warthen	7e5b140c2f	Update Makefile	2023-07-07 17:19:39 -07:00
Wayne Warthen	1f1952fb19	Add S100 and DUO Platforms	2023-07-07 16:18:01 -07:00
Wayne Warthen	229bdaa308	Support Z180 IM1 Added proper support for interrupt mode 1 on Z180.	2023-07-01 15:33:18 -07:00
Wayne Warthen	5c0894b8c1	Merge pull request #351 from jblang/dev Add ColecoVision-compatible configuration	2023-07-01 11:56:15 -07:00
J.B. Langston	9cefcfb0bc	Add ColecoVision-compatible configuration	2023-07-01 10:16:49 -05:00
Wayne Warthen	5d34a5c5d5	Miscellaneous - Implement SHOWHEX functions in ICM and PKD drivers - Improve DSKY common routines in HBIOS - Include key CP/M 2.2 programs in NZCOM floppy image	2023-06-29 16:33:22 -07:00
Wayne Warthen	f8c800e527	Create DSKY Driver Framework Added a new driver category for DSKY (Display/Keypad) devices. Existing DSKY devices were converted into drivers ICM and PKD. These devices were previously DSKY and DSKYNG. This removes substantial code duplication and recovers significant space in romldr and dbgmon.	2023-06-28 15:06:53 -07:00