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https://github.com/wwarthen/RomWBW.git
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2 Commits
v3.3.0-dev
...
v3.3.0-dev
| Author | SHA1 | Date | |
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d1a5c66147 | ||
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b184ccfb78 |
@@ -29,9 +29,9 @@
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CPUOSC .SET 8000000 ; CPU OSC FREQ IN MHZ
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CRTACT .SET FALSE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
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;
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INTMODE .SET 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
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INTMODE .SET 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
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;
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DMAENABLE .SET FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
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;;;DMAENABLE .SET TRUE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
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;
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BATCOND .SET TRUE ; ENABLE LOW BATTERY WARNING MESSAGE
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;
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@@ -29,7 +29,7 @@ BOOT_DELAY .EQU 0 ; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
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CPUSPDCAP .EQU SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
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CPUSPDDEF .EQU SPD_UNSUP ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
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CPUOSC .EQU 8000000 ; CPU OSC FREQ IN MHZ
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INTMODE .EQU 0 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
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INTMODE .EQU 2 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
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DEFSERCFG .EQU SER_38400_8N1 ; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
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;
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RAMSIZE .EQU 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
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@@ -292,8 +292,8 @@ AYMODE .EQU AYMODE_MBC ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|
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;
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SPKENABLE .EQU TRUE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
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;
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DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
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DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
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DMAENABLE .EQU TRUE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
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DMABASE .EQU $40 ; DMA: DMA BASE ADDRESS
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DMAMODE .EQU DMAMODE_MBC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC)
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;
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YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
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@@ -103,9 +103,9 @@ DMA_FAIL_FLAG:
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;==================================================================================================
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;
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DMAProbe:
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ld a,DMA_RESET
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ld a,DMA_RESET ; $C3
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out (DMABASE),a
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ld a,%01111101 ; R0-Transfer mode, A -> B, start address follows
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ld a,%01111101 ; R0-Transfer mode, A -> B, start address follows $7D
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out (DMABASE),a
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ld a,$cc
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out (DMABASE),a
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@@ -115,14 +115,14 @@ DMAProbe:
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out (DMABASE),a
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ld a,$1a
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out (DMABASE),a
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ld a,DMA_LOAD
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ld a,DMA_LOAD ; $CF
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out (DMABASE),a
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;
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ld a,DMA_READ_MASK_FOLLOWS ; set up
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ld a,DMA_READ_MASK_FOLLOWS ; set up ; $BB
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out (DMABASE),a ; for
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ld a,%00011000 ; register
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ld a,%00011000 ; register $18
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out (DMABASE),a ; read
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ld a,DMA_START_READ_SEQUENCE
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ld a,DMA_START_READ_SEQUENCE ; $A7
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out (DMABASE),a
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;
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in a,(DMABASE) ; read in
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@@ -1110,7 +1110,23 @@ Z280_BOOTERR .TEXT "\r\n\r\n*** Application mode boot not supported under Z280 n
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;
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DI ; NO INTERRUPTS
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IM 1 ; INTERRUPT MODE 1
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;
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#IF ((PLATFORM == PLT_DUO) & FALSE)
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; WAIT A WHILE
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LD B,0
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DJNZ $
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#ENDIF
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;
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#IF ((PLATFORM == PLT_DUO) & TRUE)
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; WAIT A WHILE
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LD HL,0
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BOOTWAIT:
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DEC HL
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LD A,H
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OR L
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JR NZ,BOOTWAIT
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#ENDIF
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;
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;#IF ((PLATFORM == PLT_MBC) | (PLATFORM == PLT_SBC))
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; INITIALIZE RTC LATCH BYTE
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; FOR SOME PLATFORMS THIS CONTROLS HI/LO SPEED CIRCUIT
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@@ -1343,18 +1343,32 @@ diskread:
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;
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#endif
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;
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; Built-in mini-loader for S100 Monitor
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; Built-in mini-loader for S100 Monitor. The S100 platform build
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; imbeds the S100 Monitor in the ROM at the start of bank 3 (BID_IMG2).
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; This bit of code just launches the monitor directly from that bank.
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;
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#if (BIOS == BIOS_WBW)
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#if (PLATFORM == PLT_S100)
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;
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s100mon:
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; Warn user that console is being directed to the S100 bus
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; if the IOBYTE bit 0 is 0 (%xxxxxxx0).
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in a,($75) ; get IO byte
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and %00000001 ; isolate console bit
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jr nz,s100mon1 ; if 0, bypass msg
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ld hl,str_s100con ; console msg string
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call pstr ; display it
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;
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s100mon1:
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; Launch S100 Monitor from ROM Bank 3
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call ldelay ; wait for UART buf to empty
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di ; suspend interrupts
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ld a,BID_IMG2 ; S100 monitor bank
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ld ix,0 ; execution resumes here
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jp HB_BNKCALL ; do it
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;
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str_smon .db "S100 Z180 Monitor",0
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str_s100con .db "\r\n\r\nConsole on S100 Bus",0
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;
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#endif
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#endif
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@@ -2370,7 +2384,6 @@ str_tbas .db "Tasty BASIC",0
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str_play .db "Play a Game",0
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str_upd .db "XModem Flash Updater",0
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str_user .db "User App",0
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str_smon .db "S100 Z180 Monitor",0
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str_egg .db "",0
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str_net .db "Network Boot",0
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str_switches .db "FP Switches = 0x",0
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@@ -2,7 +2,7 @@
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#DEFINE RMN 3
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#DEFINE RUP 0
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#DEFINE RTP 0
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#DEFINE BIOSVER "3.3.0-dev.39"
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#DEFINE BIOSVER "3.3.0-dev.40"
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#define rmj RMJ
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#define rmn RMN
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#define rup RUP
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@@ -3,5 +3,5 @@ rmn equ 3
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rup equ 0
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rtp equ 0
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biosver macro
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db "3.3.0-dev.39"
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db "3.3.0-dev.40"
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endm
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