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14 Commits

Author SHA1 Message Date
Wayne Warthen
e782b78b16 Bump Version 2023-08-22 11:02:08 -07:00
Wayne Warthen
c0d3969244 Merge pull request #356 from b1ackmai1er/dev
Duo/MBC IM2 Hardware Timer support
2023-08-22 10:54:30 -07:00
b1ackmai1er
c62af3df33 MBC / DUO IM2 template
Template for setting up interrupts using the IM2 pin header on MBC and DUO platforms.
2023-08-22 13:16:42 +08:00
b1ackmai1er
6d736996fd Merge pull request #60 from wwarthen/dev
Support Serial Ports on ESP32 Board
2023-08-22 12:32:56 +08:00
Wayne Warthen
8bc801d0a4 Support Serial Ports on ESP32 Board 2023-08-21 17:40:34 -07:00
b1ackmai1er
2c6b7f7fb1 Update std.asm 2023-08-21 16:38:59 +08:00
b1ackmai1er
c3503f56d1 Update cfg_z80retro.asm 2023-08-21 16:29:27 +08:00
b1ackmai1er
d4c87996f0 Merge branch 'dev' of https://github.com/b1ackmai1er/RomWBW into dev 2023-08-21 16:25:29 +08:00
b1ackmai1er
9f5b3a8b1c Duo/MBC IM2 Hardware Timer support 2023-08-21 16:00:47 +08:00
Wayne Warthen
d06e1e2a5c Initial DUO Interrupt Handling 2023-08-20 15:03:34 -07:00
Wayne Warthen
22a0c52af3 Bump Version 2023-08-20 12:10:32 -07:00
Wayne Warthen
85aa7e89c2 Merge pull request #355 from b1ackmai1er/dev
Update DMAMON
2023-08-20 11:56:16 -07:00
b1ackmai1er
59d04f2446 Update std.asm 2023-08-20 18:18:55 +08:00
b1ackmai1er
9cc52e30d6 Update dmamon.asm 2023-08-20 18:16:19 +08:00
25 changed files with 573 additions and 193 deletions

View File

@@ -12,12 +12,26 @@ DMAMODE_Z180 .EQU 2 ; Z180 INTEGRATED DMA
DMAMODE_Z280 .EQU 3 ; Z280 INTEGRATED DMA
DMAMODE_RC .EQU 4 ; RCBUS Z80 DMA
DMAMODE_MBC .EQU 5 ; MBC
DMAMODE_VDG .EQU 6 ; VELESOFT DATAGEAR
DMAMODE_DUO .EQU 6 ; DUO
DMAMODE_VDG .EQU 7 ; VELESOFT DATAGEAR
;
DMAMODE .EQU DMAMODE_DUO ; SELECT DMA DEVICE FOR TESTING
;
;==================================================================================================
; SOME DEFAULT PLATFORM CONFIGURATIONS
;==================================================================================================
;
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_MBC ; SELECT DMA DEVICE FOR TESTING
DMALATCH .EQU DMABASE+1 ; DMA: DMA LATCH ADDRESS
DMAIOTST .EQU $68 ; AN OUTPUT PORT FOR TESTING - 16C450 SERIAL OUT
;
#IF (DMAMODE==DMAMODE_DUO)
DMABASE .SET $40 ; DMA: DMA0 BASE ADDRESS
;DMABASE .SET $41 ; DMA: DMA1 BASE ADDRESS
DMALATCH .SET $43 ; DMA: DMA LATCH ADDRESS
DMAIOTST .SET $58 ; AN OUTPUT PORT FOR TESTING - 16C450 SERIAL OUT
#ENDIF
;
;==================================================================================================
; HELPER MACROS AND EQUATES
;==================================================================================================
@@ -156,17 +170,17 @@ MENULP1:
CP 'N'
JP Z,DMATST_N ; MEMORY COPY ITER
CP '0'
JP Z,DMATST_01
JP Z,DMATST_0 ; PULSE DMA PORT
CP '1'
JP Z,DMATST_1 ; PULSE LATCH PORT
CP 'O'
JP Z,DMATST_O
#IF !(DMAMODE==DMAMODE_VDG)
CP '1'
JP Z,DMATST_01
CP 'R'
JP Z,DMATST_R ; TOGGLE RESET
CP 'Y'
JP Z,DMATST_Y ; TOGGLE READY
#ENDIF
JP Z,DMATST_Y
cp 'L'
jp z,DMACFG_L ; SET LATCH PORT
cp 'S'
jp z,DMACFG_S ; SET PORT
cp 'V'
@@ -197,12 +211,17 @@ DMABYE:
;
DMACFG_S:
call PRTSTRD
.db "\n\rSet port address\n\rPort:$"
.db "\n\rSet DMA port address\n\rPort:$"
call HEXIN
ld hl,dmaport
ld (hl),a
inc hl
inc a
jp MENULP
;
DMACFG_L:
call PRTSTRD
.db "\n\rSet Latch port address\n\rPort:$"
call HEXIN
ld hl,dmalach
ld (hl),a
jp MENULP
;
@@ -234,11 +253,17 @@ DMATST_N:
CALL DMAMemTestIter
JP MENULP
;
DMATST_01:
DMATST_0:
call PRTSTRD
.db "\n\rPerforming Port Selection Test\n\r$"
CALL DMA_Port01
JP MENULP
.db "\n\rPerforming DMA Port Selection Test\n\r$"
CALL DMA_Port0
ret
DMATST_1:
call PRTSTRD
.db "\n\rPerforming Latch Port Selection Test\n\r$"
CALL DMA_Port1
ret
;
DMATST_O:
call PRTSTRD
@@ -255,7 +280,7 @@ DMATST_D:
DMATST_Y:
call PRTSTRD
.db "\n\rPerforming Ready Bit Test\n\r$"
CALL DMA_ReadyT
CALL DMA_ReadyY
JP MENULP
;
DMATST_R:
@@ -289,6 +314,10 @@ DISPM: call PRTSTRD
.db ", Port=0x$"
LD A,(dmaport) ; DISPLAY
CALL PRTHEXBYTE ; DMA PORT
call PRTSTRD
.db ", Latch Port=0x$"
ld A,(dmalach)
CALL PRTHEXBYTE ; DMA PORT
;
#IF (INTENABLE)
;
@@ -351,7 +380,7 @@ DMA_INIT:
CALL PRTHEXBYTE
;
#IF !(DMAMODE==DMAMODE_VDG)
ld a,(dmautil)
ld a,(dmalach)
ld c,a
LD A,DMA_FORCE
out (c),a ; force ready off
@@ -417,6 +446,7 @@ DMA_DEV_STR:
.TEXT "Z280$"
.TEXT "RCBUS$"
.TEXT "MBC$"
.TEXT "DUODYNE$"
.TEXT "DATAGEAR$"
;
DMA_SPD_STR:
@@ -483,7 +513,7 @@ DMABUF .TEXT "0123456789abcdef"
DMA_ReadyO:
call PRTSTRD
.db "\r\nOutputing string to port 0x$"
ld a,DMAIOTST
ld a,(tstport)
call PRTHEXBYTE
call NEWLINE
;
@@ -491,7 +521,7 @@ DMA_ReadyO:
IOLoop: push bc
call NEWLINE
ld hl,DMABUF
ld a,DMAIOTST
ld a,(tstport)
ld bc,16
;
call DMAOTIR
@@ -502,16 +532,17 @@ IOLoop: push bc
ret
;
;==================================================================================================
; PULSE PORT (COMMON ROUTINE WHERE A CONTAINS THE ASCII PORT OFFSET)
; PULSE PORT
;==================================================================================================
;
DMA_Port01:
DMA_Port0:
ld a,(dmaport)
jr DMA_Port
DMA_Port1:
ld a,(dmalach)
DMA_Port:
call PRTSTRD
.db "\r\nPulsing port 0x$"
sub '0' ; Calculate
ld c,a
ld a,(dmaport) ; Port to
add a,c
call PRTHEXBYTE
call NEWLINE
ld c,a ; toggle
@@ -543,12 +574,9 @@ dlylp: dec bc
; TOGGLE READY BIT
;==================================================================================================
;
DMA_ReadyT:
DMA_ReadyY:
call NEWLINE
#IF !(DMAMODE==DMAMODE_VDG)
#ENDIF
ld a,(dmautil)
ld a,(dmalach)
ld c,a ; toggle
ld b,$20 ; loop counter
portlp2:push bc
@@ -558,14 +586,12 @@ portlp2:push bc
.db ": ON$"
call delay
ld a,$FF
; ld c,DMABASE+1
out (c),a
call PRTSTRD
.db " -> OFF$"
call delay
call PRTSTRD
.db "\r \r$"
; ld c,DMABASE+1
ld a,0
out (c),a
pop bc
@@ -1169,8 +1195,9 @@ CST:
USEINT .DB FALSE ; USE INTERRUPTS FLAG
counter .dw 0
dmaport .db DMABASE
dmautil .db DMABASE+1
dmalach .db DMALATCH
dmaxfer .db DMA_XMODE
tstport .db DMAIOTST
dmavbs .db 0
SAVSTK: .DW 2
.FILL 64

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR DUODYNE
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR DUODYNE
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -126,14 +126,13 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU TRUE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
@@ -299,5 +298,5 @@ DMAENABLE .EQU TRUE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $40 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_DUO ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR DYNO
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR DYNO
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -129,14 +129,13 @@ UARTENABLE .EQU FALSE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -285,5 +284,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION MASTER
; ROMWBW 3.X CONFIGURATION MASTER
;==================================================================================================
;
; THIS FILE IS *NOT* A REAL CONFIGURATION FILE. IT IS A MASTER TEMPLATE FILE
@@ -165,14 +165,13 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -373,5 +372,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR MBC
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR MBC
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -123,14 +123,13 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU TRUE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
@@ -297,6 +296,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_MBC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR MARK IV
; ROMWBW 3.X CONFIGURATION FOR MARK IV
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -129,14 +129,13 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -294,5 +293,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_ECB ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR N8
; ROMWBW 3.X CONFIGURATION FOR N8
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -131,14 +131,13 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -287,5 +286,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RCBUS Z180 CPU
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR RCBUS Z180 CPU
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -135,14 +135,13 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -311,5 +310,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RCBUS Z280 CPU
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR RCBUS Z280 CPU
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -129,14 +129,13 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
@@ -315,5 +314,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_Z280 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR RCBUS Z80
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR RCBUS Z80
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -128,14 +128,13 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
@@ -309,5 +308,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_RC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION FOR RHYOPHYRE
; ROMWBW 3.X CONFIGURATION FOR RHYOPHYRE
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -87,7 +87,7 @@ DSKYDSKACT .EQU TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .EQU FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .EQU RPH_PPI0 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .EQU FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .EQU RPH_PPI0 ; BASE I/O ADDRESS OF PKD PPI
PKDPPIBASE .EQU RPH_PPI0 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .EQU 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
;
BOOTCON .EQU 0 ; BOOT CONSOLE DEVICE
@@ -129,14 +129,13 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -256,7 +255,7 @@ PIO4BASE .EQU $90 ; PIO: PIO REGISTERS BASE ADR FOR ECB 4P BOARD
PIO_ZP .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIOZBASE .EQU $88 ; PIO: PIO REGISTERS BASE ADR FOR ECB ZP BOARD
PIO_SBC .EQU FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
PIOSBASE .EQU RPH_PPI0 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
PIOSBASE .EQU RPH_PPI0 ; PIO: PIO REGISTERS BASE ADR FOR SBC PPI
;
UFENABLE .EQU FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
FIFO_BASE .EQU $0C ; UF: REGISTERS BASE ADR
@@ -276,5 +275,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR S100 Z180
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR S100 Z180
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -129,14 +129,13 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -305,5 +304,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR SBC
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR SBC
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -123,14 +123,13 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU TRUE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU TRUE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU TRUE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
@@ -275,5 +274,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_ECB ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR SC Z180 VARIANTS (SC126, SC130, ETC.)
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR SC Z180 VARIANTS (SC126, SC130, ETC.)
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -129,14 +129,13 @@ UARTENABLE .EQU TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG | SER_RTS ; UART: LINE CONFIG FOR UART PORTS
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU FALSE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU TRUE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU TRUE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
ASCIINTS .EQU TRUE ; ASCI: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
@@ -305,5 +304,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_Z180 ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR UNA
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR UNA
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR SIMPLE Z80 RETRO
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR SIMPLE Z80 RETRO
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -121,14 +121,13 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
@@ -236,5 +235,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR ZETA V1
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR ZETA V1
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -117,7 +117,6 @@ UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
@@ -207,5 +206,5 @@ DMAENABLE .EQU FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -1,6 +1,6 @@
;
;==================================================================================================
; ROMWBW 2.X CONFIGURATION DEFAULTS FOR ZETA V2
; ROMWBW 3.X CONFIGURATION DEFAULTS FOR ZETA V2
;==================================================================================================
;
; THIS FILE CONTAINS THE FULL SET OF DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
@@ -121,14 +121,13 @@ UARTOSC .EQU 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .EQU FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UARTCFG .EQU DEFSERCFG ; UART: LINE CONFIG FOR UART PORTS
UARTCASSPD .EQU SER_300_8N1 ; UART: ECB CASSETTE UART DEFAULT SPEED
UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA ONBOARD UART
UARTSBC .EQU TRUE ; UART: AUTO-DETECT SBC/ZETA/DUO ONBOARD UART
UARTSBCFORCE .EQU FALSE ; UART: FORCE DETECTION OF SBC UART (FOR SIMH)
UARTCAS .EQU FALSE ; UART: AUTO-DETECT ECB CASSETTE UART
UARTMFP .EQU FALSE ; UART: AUTO-DETECT MF/PIC UART
UART4 .EQU FALSE ; UART: AUTO-DETECT 4UART UART
UARTRC .EQU FALSE ; UART: AUTO-DETECT RC UART
UARTDUAL .EQU FALSE ; UART: AUTO-DETECT DUAL UART
UARTDUO .EQU FALSE ; UART: AUTO-DETECT DUODYNE UART
;
ASCIENABLE .EQU FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
@@ -219,4 +218,4 @@ DMABASE .EQU $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .EQU DMAMODE_NONE ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .EQU FALSE ; YM2612: ENABLE YM2612 DRIVER (MUTE STUB)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76469s/CTC)
VGMBASE .EQU $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -7,20 +7,22 @@
;==================================================================================================
;
; TODO:
; - CLEAR CONSOLE SCREEN AT INITIALIZATION
; - INITIALIZE BAUD/MODE OF SERIAL INTERFACES AT INITIALIZATION
;
ESP_IOBASE .EQU $9C
ESP_0_IO .EQU ESP_IOBASE + 0
ESP_1_IO .EQU ESP_IOBASE + 1
ESP_STAT .EQU ESP_IOBASE + 2
;
; ESP STATUS PORT
; MSB XX S S S S S S
; | | | | | +- ESP0 READY OUTPUT
; | | | | +--- ESP0 BUSY
; | | | +----- ESP0 SPARE
; | | +------- ESP1 READY OUTPUT
; | +--------- ESP1 BUSY
; +----------- ESP1 SPARE
; ESP STATUS PORT
; MSB X X S S S S S S
; | | | | | +- ESP0 READY OUTPUT
; | | | | +--- ESP0 BUSY
; | | | +----- ESP0 SPARE
; | | +------- ESP1 READY OUTPUT
; | +--------- ESP1 BUSY
; +----------- ESP1 SPARE
;
ESP_0_RDY .EQU %00000001
ESP_0_BUSY .EQU %00000010
@@ -32,12 +34,25 @@ ESP_1_SPARE .EQU %00100000
; COMMAND OPCODES
;
ESP_CMD_NOP .EQU 0 ; NO OP
ESP_CMD_COUT .EQU 1 ; CHAR OUT
ESP_CMD_SOUT .EQU 2 ; STRING OUT
ESP_CMD_KIN .EQU 3 ; KEY IN
ESP_CMD_KST .EQU 4 ; KBD BUF STATUS
ESP_0_CMD_COUT .EQU 1 ; CHAR OUT
ESP_0_CMD_CSTR .EQU 2 ; STRING OUT
ESP_0_CMD_KIN .EQU 3 ; KEY IN
ESP_0_CMD_KST .EQU 4 ; KBD BUF STATUS
ESP_CMD_SBAUD .EQU 6 ; SET SERIAL BAUD RATE
ESP_CMD_SMODE .EQU 7 ; SET SERIAL LINE MODE
ESP_CMD_SOUT .EQU 8 ; SERIAL BYTE OUT
ESP_CMD_SIN .EQU 10 ; SERIAL BYTE IN
ESP_CMD_SST .EQU 11 ; SERIAL INPUT STATUS
ESP_CMD_DISC .EQU $FF ; DISCOVER
;
; ESP CONFIG TABLE ENTRY OFFSETS
;
ESP_CFG_DEV .EQU 0 ; DEVICE NUMBER
ESP_CFG_IO .EQU 1 ; ESP I/O PORT
ESP_CFG_ST .EQU 2 ; ESP STATUS PORT
ESP_CFG_RDYMSK .EQU 3 ; ESP READY MASK
ESP_CFG_BSYMSK .EQU 4 ; ESP BUSY MASK
;
; GLOBAL ESP INITIALIZATION
;
ESP_INIT:
@@ -47,16 +62,63 @@ ESP_INIT:
LD A,ESP_IOBASE
CALL PRTHEXBYTE
;
XOR A ; ZERO ACCUM
LD (ESP_PRES),A ; CLEAR MODULE PRESENCE BITS
;
; DETECT FIRST ESP32 MODULE
PRTS(" A=$")
LD IY,ESPSER0_CFG
CALL ESP_DETECT
JR Z,ESP_INIT1 ; FOUND
LD DE,ESP_STR_NOHW
JP NZ,WRITESTR
CALL WRITESTR
JR ESP_INIT2
;
; PRINT FIRMWARE VERSION
PRTS(" F/W=$")
ESP_INIT1:
CALL ESP_PRTVER
LD A,(ESP_PRES)
SET 0,A
LD (ESP_PRES),A
;
ESP_INIT2:
; DETECT SECOND ESP32 MODULE
PRTS(" B=$")
LD IY,ESPSER1_CFG
CALL ESP_DETECT
JR Z,ESP_INIT3 ; FOUND
LD DE,ESP_STR_NOHW
CALL WRITESTR
JR ESP_INIT4
;
ESP_INIT3:
CALL ESP_PRTVER
LD A,(ESP_PRES)
SET 1,A
LD (ESP_PRES),A
;
ESP_INIT4:
; INITIALIZE FIRST MODULE CHILD DRIVERS
LD A,(ESP_PRES)
BIT 0,A
JR Z,ESP_INIT5
LD IY,ESPSER0_CFG
CALL ESPSER_INIT ; SERIAL INITIALIZATION
LD IY,ESPCON0_CFG
CALL ESPCON_INIT ; CONSOLE INITIALIZATION
;
ESP_INIT5:
; INITIALIZE SECOND MODULE CHILD DRIVERS
LD A,(ESP_PRES)
BIT 1,A
JR Z,ESP_INIT6
LD IY,ESPSER1_CFG
CALL ESPSER_INIT ; SERIAL INITIALIZATION
;
ESP_INIT6:
RET
;
;==================================================================================================
@@ -71,24 +133,14 @@ ESP_DETECT:
;
; LOOK FOR SIGNATURE STARTING WITH "ESP"
CALL ESP_INWAIT ; ATTEMPT TO GET CHAR
;CALL PRTHEXBYTE
CP 'E'
RET NZ
CALL ESP_INWAIT ; ATTEMPT TO GET CHAR
;CALL PRTHEXBYTE
CP 'S'
RET NZ
CALL ESP_INWAIT ; ATTEMPT TO GET CHAR
;CALL PRTHEXBYTE
CP 'P'
RET
;LD DE,10 ; DELAY 160US
;CALL VDELAY ; ... TO ENSURE OUTPUT RDY SET
;IN A,(ESP_STAT) ; GET STATUS
;AND ESP_0_RDY ; ISOLATE OUTPUT READY BIT
;XOR ESP_0_RDY ; INVERT SO 0=FOUND
;RET ; DONE
;
; CLEAR ESP INPUT QUEUE
;
@@ -98,9 +150,10 @@ ESP_CLR0:
CALL ESP_WTNBSY ; WAIT TILL NOT BUSY
RET NZ ; BAIL OUT IF TIMEOUT
IN A,(ESP_STAT) ; GET STATUS
AND ESP_0_RDY ; IS THERE MORE DATA?
AND (IY+ESP_CFG_RDYMSK) ; IS THERE MORE DATA?
RET Z ; IF NOT, DONE
IN A,(ESP_0_IO) ; GET CHAR
LD C,(IY+ESP_CFG_IO) ; ESP I/O PORT
IN A,(C) ; GET BYTE
DJNZ ESP_CLR0 ; LOOP TILL DONE
OR $FF ; SIGNAL FAILURE
RET
@@ -115,7 +168,8 @@ ESP_PRTVER:
ESP_PRTVER1:
CALL ESP_WTNBSY ; WAIT TILL NOT BUSY
IN A,(ESP_STAT) ; GET STATUS
AND ESP_0_RDY ; ISOLATE OUTPUT READY BIT
;AND ESP_0_RDY ; ISOLATE OUTPUT READY BIT
AND (IY+ESP_CFG_RDYMSK) ; ISOLATE OUTPUT READY BIT
RET Z ; DONE IF NOTHING READY
CALL ESP_IN ; GET NEXT CHAR
CALL COUT ; PRINT CHAR
@@ -127,7 +181,8 @@ ESP_OUT:
PUSH AF ; SAVE VALUE
CALL ESP_WTNBSY ; WAIT TILL NOT BUSY
POP AF ; POP VALUE
OUT (ESP_0_IO),A ; SEND CHARACTER
LD C,(IY+ESP_CFG_IO) ; ESP I/O PORT
OUT (C),A ; SEND BYTE
JR ESP_WTBSY ; RETURN VIA WTBSY
;
; GET BYTE FROM ESP (BLOCKING)
@@ -142,7 +197,8 @@ ESP_INWAIT:
ESP_IN:
CALL ESP_WTNBSY ; WAIT TILL NOT BUSY
ESP_IN1:
IN A,(ESP_0_IO) ; GET BYTE
LD C,(IY+ESP_CFG_IO) ; ESP I/O PORT
IN A,(C) ; GET BYTE
PUSH AF ; SAVE VALUE
CALL ESP_WTBSY ; WAIT TILL BUSY
POP AF ; RESTORE VALUE
@@ -153,8 +209,9 @@ ESP_IN1:
ESP_WTNBSY:
LD B,0 ; MAX TRIES
ESP_WTNBSY1:
IN A,(ESP_STAT) ; GET STATUS
AND ESP_0_BUSY ; IS ESP BUSY?
LD C,(IY+ESP_CFG_ST) ; ESP STATUS PORT
IN A,(C) ; GET STATUS
AND (IY+ESP_CFG_BSYMSK) ; IS ESP BUSY?
RET Z ; RETURN IF NOT BUSY
DJNZ ESP_WTNBSY1 ; ELSE LOOP
OR $FF ; SIGNAL TIMEOUT
@@ -165,9 +222,10 @@ ESP_WTNBSY1:
ESP_WTBSY:
LD B,20 ; MAX TRIES
ESP_WTBSY1:
IN A,(ESP_STAT) ; GET STATUS
AND ESP_0_BUSY ; IS ESP BUSY?
XOR ESP_0_BUSY ; INVERT
LD C,(IY+ESP_CFG_ST) ; ESP STATUS PORT
IN A,(C) ; GET STATUS
XOR $FF ; INVERT SO 0=BUSY
AND (IY+ESP_CFG_BSYMSK) ; IS ESP BUSY?
RET Z ; RETURN IF BUSY
DJNZ ESP_WTBSY1 ; ELSE LOOP
OR $FF ; SIGNAL TIMEOUT
@@ -178,9 +236,10 @@ ESP_WTBSY1:
ESP_WTRDY:
LD B,0 ; MAX TRIES
ESP_WTRDY1:
IN A,(ESP_STAT) ; GET STATUS
AND ESP_0_RDY ; IS ESP READY TO OUTPUT
XOR ESP_0_RDY ; INVERT, 0=READY
LD C,(IY+ESP_CFG_ST) ; ESP STATUS PORT
IN A,(C) ; GET STATUS
XOR $FF ; INVERT SO 0=READY
AND (IY+ESP_CFG_RDYMSK) ; IS ESP READY TO OUTPUT
RET Z ; RETURN IF READY
DJNZ ESP_WTRDY1 ; ELSE LOOP
OR $FF ; SIGNAL TIMEOUT
@@ -188,8 +247,10 @@ ESP_WTRDY1:
;
;
;
ESP_STR_NOHW .TEXT " NOT PRESENT$"
ESP_STR_UPGRADE .TEXT " !!!UPGRADE REQUIRED!!!$"
ESP_PRES .DB 0 ; MODULE PRESENCE BITS
;
ESP_STR_NOHW .TEXT "NOT PRESENT$"
ESP_STR_UPGRADE .TEXT "!!!UPGRADE REQUIRED!!!$"
;
;==================================================================================================
; ESP32 CONSOLE DRIVER
@@ -202,9 +263,26 @@ ESPCON_COLS .EQU 80 ; VGA DISPLAY COLS
;
;
ESPCON_INIT:
LD A,(ESPCON_DEVCNT) ; GET ESPCON PHYSICAL DEVICE COUNT
LD (IY+ESP_CFG_DEV),A ; SAVE PHYSICAL UNIT NUMBER
INC A ; UPDATE COUNT
LD (ESPCON_DEVCNT),A ; SAVE COUNT
;
CALL NEWLINE
PRTS("ESPCON:$")
; ADD OURSELVES TO CIO DISPATCH TABLE
;
LD BC,ESPCON_FNTBL ; BC := FUNCTION TABLE ADDRESS
PUSH IY ; COPY CONFIG ENTRY PTR
POP DE ; ... TO DE
CALL CIO_ADDENT ; ADD ENTRY, A := UNIT ASSIGNED
LD (HCB + HCB_CRTDEV),A ; SET OURSELVES AS THE CRT DEVICE
;
; ANNOUNCE OURSLEVES
;
CALL NEWLINE ; FORMATTING
PRTS("ESPCON$") ; NAME
LD A,(IY+ESP_CFG_DEV) ; GET PHYSICAL UNIT NUMBER
CALL PRTDECB ; UNIT STILL IN A FROM ABOVE
CALL PC_COLON ; FORMATTING
;
; DISPLAY CONSOLE DIMENSIONS
CALL PC_SPACE
@@ -216,14 +294,6 @@ ESPCON_INIT:
CALL PRTDECB
CALL PRTSTRD
.TEXT " TEXT (ANSI)$"
;
; ADD OURSELVES TO CIO DISPATCH TABLE
;
LD D,0 ; PHYSICAL UNIT IS ZERO
LD E,CIODEV_ESPCON ; DEVICE TYPE
LD BC,ESPCON_FNTBL ; BC := FUNCTION TABLE ADDRESS
CALL CIO_ADDENT ; ADD ENTRY, A := UNIT ASSIGNED
LD (HCB + HCB_CRTDEV),A ; SET OURSELVES AS THE CRT DEVICE
;
XOR A ; SIGNAL SUCCESS
RET
@@ -247,7 +317,7 @@ ESPCON_FNTBL:
ESPCON_IN:
CALL ESPCON_IST
JR Z,ESPCON_IN
LD A,ESP_CMD_KIN ; KBD INPUT
LD A,ESP_0_CMD_KIN ; KBD INPUT
CALL ESP_OUT ; SEND CMD OPCODE
CALL ESP_INWAIT ; GET KEY
LD E,A ; PUT IN E
@@ -257,7 +327,7 @@ ESPCON_IN:
;
;
ESPCON_IST:
LD A,ESP_CMD_KST ; KBD BUF STATUS
LD A,ESP_0_CMD_KST ; KBD BUF STATUS
CALL ESP_OUT ; SEND CMD OPCODE
CALL ESP_INWAIT ; GET BUF SIZE
OR A ; SET FLAGS
@@ -269,7 +339,7 @@ ESPCON_IST:
;
ESPCON_OUT:
PUSH DE
LD A,ESP_CMD_COUT ; CHAR OUT OPCODE
LD A,ESP_0_CMD_COUT ; CHAR OUT OPCODE
CALL ESP_OUT
POP DE
LD A,E
@@ -280,7 +350,8 @@ ESPCON_OUT:
;
;
ESPCON_OST:
OR $FF ; SIGNAL OUTPUT QUEUE READY
XOR A ; ZERO ACCUM
INC A ; ACCUM := 1 TO SIGNAL 1 BUFFER POSITION
RET ; RETURN
;
;
@@ -301,14 +372,239 @@ ESPCON_QUERY:
;
ESPCON_DEVICE:
LD D,CIODEV_ESPCON ; D := DEVICE TYPE
LD E,0 ; E := DEVICE NUM, ALWAYS 0
LD E,(IY+ESP_CFG_DEV) ; E := DEVICE NUM
LD C,$BF ; C := DEVICE TYPE, 0xBF IS PROP TERM
LD H,0 ; H := 0, DRIVER HAS NO MODES
LD L,ESP_IOBASE ; L := BASE I/O ADDRESS
LD L,(IY+ESP_CFG_IO) ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS
RET
;
;=============================================================================
; DATA STORAGE
;=============================================================================
; ESPCON CONFIGURATION
;
ESPCON_CFG:
ESPCON0_CFG:
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
.DB ESP_0_IO ; ESP DATA PORT
.DB ESP_STAT ; ESP STATUS PORT
.DB ESP_0_RDY ; ESP READY BIT MASK
.DB ESP_0_BUSY ; ESP BUSY BIT MASK
;
;
;
ESPCON_DEVCNT .DB 0 ; ESPCON DEVICES COUNT
;
;==================================================================================================
; ESP32 SERIAL DRIVER
;==================================================================================================
;
ESPSER_LINECFG .EQU SER_115200_8N1
;
ESPSER_CFG_LINE .EQU 5
;
;
;
ESPSER_INIT:
LD A,(ESPSER_DEVCNT) ; GET ESPSER PHYSICAL DEVICE COUNT
LD (IY+ESP_CFG_DEV),A ; SAVE PHYSICAL UNIT NUMBER
INC A ; UPDATE COUNT
LD (ESPSER_DEVCNT),A ; SAVE COUNT
;
; ADD OURSELVES TO CIO DISPATCH TABLE
;
LD BC,ESPSER_FNTBL ; BC := FUNCTION TABLE ADDRESS
PUSH IY ; COPY CONFIG ENTRY PTR
POP DE ; ... TO DE
CALL CIO_ADDENT ; ADD ENTRY, A := UNIT ASSIGNED
;
; ANNOUNCE OURSLEVES
;
CALL NEWLINE ; FORMATTING
PRTS("ESPSER$") ; NAME
LD A,(IY+ESP_CFG_DEV) ; GET PHYSICAL UNIT NUMBER
CALL PRTDECB ; UNIT STILL IN A FROM ABOVE
CALL PC_COLON ; FORMATTING
;
PRTS(" MODE=$") ; FORMATTING
LD E,(IY+ESPSER_CFG_LINE+0) ; FIRST CONFIG BYTE TO E
LD D,(IY+ESPSER_CFG_LINE+1) ; SECOND CONFIG BYTE TO D
CALL PS_PRTSC0 ; PRINT CONFIG
;
; TODO: PRINT SERIAL CONFIG
;
XOR A ; SIGNAL SUCCESS
RET
;
; DRIVER FUNCTION TABLE
;
ESPSER_FNTBL:
.DW ESPSER_IN
.DW ESPSER_OUT
.DW ESPSER_IST
.DW ESPSER_OST
.DW ESPSER_INITDEV
.DW ESPSER_QUERY
.DW ESPSER_DEVICE
#IF (($ - ESPSER_FNTBL) != (CIO_FNCNT * 2))
.ECHO "*** INVALID ESPSER FUNCTION TABLE ***\n"
#ENDIF
;
;
;
ESPSER_IN:
CALL ESPSER_IST
JR Z,ESPSER_IN
LD A,ESP_CMD_SIN ; SERIAL INPUT
CALL ESP_OUT ; SEND CMD OPCODE
CALL ESP_INWAIT ; GET KEY
LD E,A ; PUT IN E
XOR A ; SIGNAL SUCCES
RET ; AND DONE
;
;
;
ESPSER_IST:
LD A,ESP_CMD_SST ; SERIAL STATUS
CALL ESP_OUT ; SEND CMD OPCODE
CALL ESP_INWAIT ; GET BUF SIZE
OR A ; SET FLAGS
RET Z ; AND DONE
OR A
RET
;
;
;
ESPSER_OUT:
PUSH DE
LD A,ESP_CMD_SOUT ; CHAR OUT OPCODE
CALL ESP_OUT
POP DE
LD A,E
CALL ESP_OUT ; SEND CHAR VALUE
XOR A ; SIGNAL SUCCESS
RET
;
;
;
ESPSER_OST:
XOR A ; ZERO ACCUM
INC A ; ACCUM := 1 TO SIGNAL 1 BUFFER POSITION
RET ; RETURN
;
;
;
ESPSER_INITDEV:
PUSH DE ; SAVE INCOMING CONFIG WORD
;
; XLATE NEW LINE MODE INTO C
LD A,E
AND %00111111 ; ISOLATE MODE BITS
LD C,0 ; 8N1 = 0
CP SER_DATA8 | SER_PARNONE | SER_STOP1
JR Z,ESPSER_INITDEV1 ; IF MATCH, DO IT
INC C ; 8E1 = 1
CP SER_DATA8 | SER_PAREVEN | SER_STOP1
JR Z,ESPSER_INITDEV1 ; IF MATCH, DO IT
INC C ; 8O1 = 2
CP SER_DATA8 | SER_PARODD | SER_STOP1
JR Z,ESPSER_INITDEV1 ; IF MATCH, DO IT
INC C ; 7N1 = 3
CP SER_DATA7 | SER_PARNONE | SER_STOP1
JR Z,ESPSER_INITDEV1 ; IF MATCH, DO IT
INC C ; 7E1 = 4
CP SER_DATA7 | SER_PAREVEN | SER_STOP1
JR Z,ESPSER_INITDEV1 ; IF MATCH, DO IT
INC C ; 7O1 = 5
CP SER_DATA7 | SER_PARODD | SER_STOP1
JR Z,ESPSER_INITDEV1 ; IF MATCH, DO IT
JR NZ,ESPSER_INITDEV_ERR ; ELSE FAIL
;
ESPSER_INITDEV1:
; DECODE NEW BAUD RATE INTO DE:HL
LD H,0
LD A,D
AND %00011111
LD L,A
LD DE,75
PUSH BC ; SAVE NEW LINE MODE
CALL DECODE ; DE:HL IS DECODED BAUD RATE
POP BC ; RESTORE NEW LINE MODE
JR NZ,ESPSER_INITDEV_ERR ; IF ERROR, FAIL
;
; PROGRAM NEW LINE MODE
PUSH BC
LD A,ESP_CMD_SMODE
CALL ESP_OUT
POP BC
LD A,C
;CALL PRTHEXBYTE
;CALL LDELAY
CALL ESP_OUT
;
; PROGRAM NEW BAUD RATE
LD A,ESP_CMD_SBAUD
CALL ESP_OUT
LD A,L
CALL ESP_OUT
LD A,H
CALL ESP_OUT
LD A,E
CALL ESP_OUT
LD A,D
CALL ESP_OUT
;
; SAVE NEW LINE CONFIG WORD
POP DE ; RESTORE CONFIG WORD
LD (IY+ESPSER_CFG_LINE+0),E ; FIRST CONFIG BYTE
LD (IY+ESPSER_CFG_LINE+1),D ; SECOND CONFIG BYTE
;
XOR A
RET
;
ESPSER_INITDEV_ERR:
POP DE ; THROW AWAY CONFIG WORD ON STACK
OR $FF
RET
;
;
;
ESPSER_QUERY:
LD E,(IY+ESPSER_CFG_LINE+0) ; FIRST CONFIG BYTE TO E
LD D,(IY+ESPSER_CFG_LINE+1) ; SECOND CONFIG BYTE TO D
LD HL,0
XOR A
RET
;
;
;
ESPSER_DEVICE:
LD D,CIODEV_ESPSER ; D := DEVICE TYPE
LD E,(IY+ESP_CFG_DEV) ; E := DEVICE NUM
LD C,$00 ; C := DEVICE TYPE, 0x00 IS RS-232
LD H,0 ; H := 0, DRIVER HAS NO MODES
LD L,(IY+ESP_CFG_IO) ; L := BASE I/O ADDRESS
XOR A ; SIGNAL SUCCESS
RET
;
; ESPSER CONFIGURATION
;
ESPSER_CFG:
ESPSER0_CFG:
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
.DB ESP_0_IO ; ESP DATA PORT
.DB ESP_STAT ; ESP STATUS PORT
.DB ESP_0_RDY ; ESP READY BIT MASK
.DB ESP_0_BUSY ; ESP BUSY BIT MASK
.DW ESPSER_LINECFG ; LINE CONFIGURATION
;
ESPSER1_CFG:
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
.DB ESP_1_IO ; ESP DATA PORT
.DB ESP_STAT ; ESP STATUS PORT
.DB ESP_1_RDY ; ESP READY BIT MASK
.DB ESP_1_BUSY ; ESP BUSY BIT MASK
.DW ESPSER_LINECFG ; LINE CONFIGURATION
;
;
;
ESPSER_DEVCNT .DB 0 ; ESPSER DEVICES COUNT

View File

@@ -2148,11 +2148,40 @@ HB_CPU3:
LD HL,HB_TIMINT
CALL HB_ADDIM1 ; ADD TO IM1 CALL LIST
#ENDIF
;
#ENDIF
;
#ENDIF
;
; TEMPLATE FOR SETTING UP INTERRUPTS USING THE MBC/DUODYNE IM2 INTERRUPT
; PIN HEADERS. UPDATE HB_DUMMYx TO POINT TO THE INTERRUPT ROUTINE.
; IN STD.ASM ALLOCATE THE EQUIVALENT INT_IM2PHx INTERRUPT TABLE ENTRY NUMBER.
;
;
; LD HL,HB_DUMMY0
; LD (IVT(INT_IM2PH0)),HL
;
; LD HL,HB_DUMMY1
; LD (IVT(INT_IM2PH1)),HL
;
; LD HL,HB_DUMMY2
; LD (IVT(INT_IM2PH2)),HL
;
; LD HL,HB_DUMMY3
; LD (IVT(INT_IM2PH3)),HL
;
; LD HL,HB_DUMMY4
; LD (IVT(INT_IM2PH4)),HL
;
; LD HL,HB_DUMMY5
; LD (IVT(INT_IM2PH5)),HL
;
; LD HL,HB_DUMMY6
; LD (IVT(INT_IM2PH6)),HL
;
; LD HL,HB_DUMMY7
; LD (IVT(INT_IM2PH7)),HL
;
#IF (KIOENABLE)
CALL KIO_PREINIT
#ENDIF
@@ -7390,6 +7419,7 @@ PS_SDDUART .TEXT "DUART$"
PS_SDZ2U .TEXT "Z2U$"
PS_SDLPT .TEXT "LPT$"
PS_SDESPCON .TEXT "ESPCON$"
PS_SDESPSER .TEXT "ESPSER$"
;
; CHARACTER SUB TYPE STRINGS
;

View File

@@ -314,6 +314,7 @@ CIODEV_DUART .EQU $90
CIODEV_Z2U .EQU $A0
CIODEV_LPT .EQU $B0
CIODEV_ESPCON .EQU $C0
CIODEV_ESPSER .EQU $D0
;
; SUB TYPES OF CHAR DEVICES
;

View File

@@ -283,6 +283,7 @@ DMAMODE_Z280 .EQU 3 ; Z280 INTEGRATED DMA
DMAMODE_RC .EQU 4 ; RCBUS Z80 DMA
DMAMODE_MBC .EQU 5 ; MBC
DMAMODE_DUO .EQU 6 ; DUO
DMAMODE_VDG .EQU 7 ; VELESOFT DATAGEAR
;
; KEYBOARD MODE SELECTIONS
;
@@ -757,15 +758,30 @@ INT_SIO1 .EQU 14 ; ZILOG SIO 1, CHANNEL A & B
#ENDIF
#IF ((CPUFAM == CPU_Z80) & (INTMODE == 2))
#IF (PLATFORM == PLT_MBC)
; MBC Z80
#IF (PLATFORM == PLT_MBC)
;
; MBC IM2 PINHEADER INTERRUPTS
;
;INT_IM2PH0 .EQU 0
;INT_IM2PH1 .EQU 1
;INT_IM2PH2 .EQU 2
;INT_IM2PH3 .EQU 3
;INT_IM2PH4 .EQU 4
;INT_IM2PH5 .EQU 5
;INT_IM2PH6 .EQU 6
;INT_IM2PH7 .EQU 7
;
; MBC Z80 INTERRUPTS
;
;INT_CTC0A .EQU 0 ; ZILOG CTC 0, CHANNEL A
;INT_CTC0B .EQU 1 ; ZILOG CTC 0, CHANNEL B
;INT_CTC0C .EQU 2 ; ZILOG CTC 0, CHANNEL C
;INT_CTC0D .EQU 3 ; ZILOG CTC 0, CHANNEL D
INT_UART0 .EQU 4 ; UART 0
INT_UART1 .EQU 5 ; UART 1
INT_INT6 .EQU 6 ;
INT_INT7 .EQU 7 ;
INT_SIO0 .EQU 8 ; ZILOG SIO 0, CHANNEL A & B
INT_SIO1 .EQU 9 ; ZILOG SIO 1, CHANNEL A & B
INT_CTC0A .EQU 12 ; ZILOG CTC 0, CHANNEL A
@@ -777,9 +793,42 @@ INT_CTC0D .EQU 15 ; ZILOG CTC 0, CHANNEL D
;INT_PIO1A .EQU 11 ; ZILOG PIO 1, CHANNEL A
;INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B
#ELSE
#ENDIF
#IF (PLATFORM == PLT_DUO)
; DUO IM2 PINHEADER INTERRUPTS
;INT_IM2PH0 .EQU 0
;INT_IM2PH1 .EQU 1
;INT_IM2PH2 .EQU 2
;INT_IM2PH3 .EQU 3
;INT_IM2PH4 .EQU 4
;INT_IM2PH5 .EQU 5
;INT_IM2PH6 .EQU 6
;INT_IM2PH7 .EQU 7
;
; DUO Z80 IM2 INTERRUPTS
;
INT_UART0 .EQU 7 ; UART 0
INT_UART1 .EQU 6 ; UART 1 ?????
INT_CTC0A .EQU 0 ; ZILOG CTC 0, CHANNEL A
INT_CTC0B .EQU 1 ; ZILOG CTC 0, CHANNEL B
INT_CTC0C .EQU 2 ; ZILOG CTC 0, CHANNEL C
INT_CTC0D .EQU 3 ; ZILOG CTC 0, CHANNEL D
;INT_SIO0 .EQU 7 ; ZILOG SIO 0, CHANNEL A & B
INT_SIO1 .EQU 8 ; ZILOG SIO 1, CHANNEL A & B
INT_PIO0A .EQU 9 ; ZILOG PIO 0, CHANNEL A
INT_PIO0B .EQU 10 ; ZILOG PIO 0, CHANNEL B
INT_PIO1A .EQU 11 ; ZILOG PIO 1, CHANNEL A
INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B
#ENDIF
#IF ((PLATFORM != PLT_MBC) & (PLATFORM != PLT_DUO))
; GENERIC Z80 M2 INTERRUPTS
; GENERIC Z80
INT_CTC0A .EQU 0 ; ZILOG CTC 0, CHANNEL A
INT_CTC0B .EQU 1 ; ZILOG CTC 0, CHANNEL B
INT_CTC0C .EQU 2 ; ZILOG CTC 0, CHANNEL C
@@ -793,7 +842,8 @@ INT_PIO0B .EQU 10 ; ZILOG PIO 0, CHANNEL B
INT_PIO1A .EQU 11 ; ZILOG PIO 1, CHANNEL A
INT_PIO1B .EQU 12 ; ZILOG PIO 1, CHANNEL B
#ENDIF
#ENDIF
#ENDIF
#DEFINE IVT(INTX) HB_IVT+(INTX * 4)+1

View File

@@ -53,13 +53,16 @@ UART_INTACT .EQU 7 ; INT RCV ACTIVE BIT
UART_FIFOACT .EQU 6 ; FIFO ACTIVE BIT
UART_AFCACT .EQU 5 ; AUTO FLOW CONTROL ACTIVE BIT
;
#IF (PLATFORM == PLT_DUO)
UARTSBASE .EQU $58
#ELSE
UARTSBASE .EQU $68
#ENDIF
UARTCBASE .EQU $80
UARTMBASE .EQU $18
UART4BASE .EQU $C0
UARTRBASE .EQU $A0
UARTDBASE .EQU $80
UARTYBASE .EQU $58
;
#IF (UARTINTS)
;
@@ -1088,16 +1091,6 @@ UART_CFG_MFP:
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; SHOULD NEVER NEED INT HANDLER
#ENDIF
#IF (UARTDUO)
UART_CFG_DUO:
; DUODYNE ONBOARD SERIAL PORT
.DB 0 ; DEVICE NUMBER (UPDATED DURING INIT)
.DB 0 ; UART TYPE
.DB UARTYBASE ; IO PORT BASE (RBR, THR)
.DB UARTYBASE + UART_LSR ; LINE STATUS PORT (LSR)
.DW UARTCFG ; LINE CONFIGURATION
.DW 0 ; POINTER TO RCV BUFFER STRUCT
#ENDIF
;
UART_CNT .EQU ($ - UART_CFG) / 8
;

View File

@@ -2,7 +2,7 @@
#DEFINE RMN 3
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "3.3.0-dev.42"
#DEFINE BIOSVER "3.3.0-dev.45"
#define rmj RMJ
#define rmn RMN
#define rup RUP

View File

@@ -3,5 +3,5 @@ rmn equ 3
rup equ 0
rtp equ 0
biosver macro
db "3.3.0-dev.42"
db "3.3.0-dev.45"
endm