Create SCZ180_sc700.asm

- Missed this file on last commit

Doc/ChangeLog.txt

@@ -19,6 +19,7 @@ Version 3.3
 - WBW: Early support for Duodyne base system (CPU/UART/ROM/RAM/RTC/SPK)
 - M?C: Fixed XM to allow specifying HBIOS port for send operations
 - WBW: Fix S100 Z180 LED operation (credit to Jay Cotton for finding this issue)
+- WBW: QPM system image is now combined with current CBIOS during build
 
 Version 3.2.1
 -------------

ReadMe.md

@@ -3,7 +3,7 @@
 **RomWBW ReadMe** \
 Version 3.3 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-08 Aug 2023
+13 Sep 2023
 
 # Overview
 

ReadMe.txt

@@ -1,6 +1,6 @@
 RomWBW ReadMe
 Wayne Warthen (wwarthen@gmail.com)
-08 Aug 2023
+13 Sep 2023
 
 
 

Source/Apps/Test/DMAmon/dmamon.asm

@@ -27,9 +27,9 @@ DMAIOTST	.EQU	$68		; AN OUTPUT PORT FOR TESTING - 16C450 SERIAL OUT
 ;
 #IF (DMAMODE==DMAMODE_DUO)
 DMABASE		.SET	$40		; DMA: DMA0 BASE ADDRESS
-;DMABASE 	.SET	$41		; DMA: DMA1 BASE ADDRESS
 DMALATCH	.SET	$43		; DMA: DMA LATCH ADDRESS
 DMAIOTST	.SET	$58		; AN OUTPUT PORT FOR TESTING - 16C450 SERIAL OUT
+;DMAIOTST	.SET	$94		; AN ALT OUTPUT PORT FOR TESTING - RTC/SPEAKER/LEDS PORT
 #ENDIF
 ;
 ;==================================================================================================
@@ -127,7 +127,7 @@ MAIN:
 	LD	SP,STACK		; STACK
 ;
 	call	PRTSTRD			; WELCOME
-	.db	"\n\rDMA Monitor V3\n\r$"
+	.db	"\n\rDMA Monitor V3.1\n\r$"
 ;
 #IF (INTENABLE)
 ;
@@ -136,6 +136,8 @@ MAIN:
 	ld	de,$A000
 	ld	bc,hsiz
 	ldir
+	ld	a,(dmaport)
+	ld	(int_dmaport),a
 ;
 	; Install interrupt vector (RomWBW specific!!!)
 	ld	hl,int		; pointer to my interrupt handler
@@ -215,6 +217,9 @@ DMACFG_S:
 	call	HEXIN
 	ld	hl,dmaport
 	ld	(hl),a
+#IF (INTENABLE)
+	ld	(int_dmaport),a
+#ENDIF
 	jp	MENULP
 ;
 DMACFG_L:
@@ -398,7 +403,8 @@ DMA_INIT:
 ;
 	ld	hl,DMACode		; program the
 	ld	b,DMACode_Len		; dma command
-	ld	c,DMABASE		; block
+	ld	a,(dmaport)
+	ld	c,a		; block
 ;
 	di
 	otir				; load dma
@@ -509,6 +515,7 @@ DMACFG_V:
 ;==================================================================================================
 ;
 DMABUF	.TEXT	"0123456789abcdef"
+;DMABUF	.DB	$04,$00,$04,$00,$04,$00,$04,$00,$04,$00,$04,$00,$04,$00,$04,$00,$00,$00,$00 ; SPEAKER
 ;
 DMA_ReadyO:
 	call	PRTSTRD
@@ -631,9 +638,9 @@ DMAMemMove1:
 ;
 DMAMemMove2:
 ;
-;	LD	HL,$8400	; PLANT
-;	LD	A,$00		; BAD
-;	LD	(HL),A		; SEED
+	;LD	HL,$8400	; PLANT
+	;LD	A,$00		; BAD
+	;LD	(HL),A		; SEED
 ;
 	LD	A,$AA		; CHECK COPY SUCCESSFULL
 	LD	HL,$8000
@@ -641,6 +648,14 @@ DMAMemMove2:
 NXTCMP:	CPI
 	JP	PO,CMPOK
 	JR	Z,NXTCMP
+
+	DEC	HL
+	CALL	PRTHEXWORDHL
+	LD	A,' '
+	CALL	COUT
+	LD	A,(HL)
+	CALL	PRTHEXBYTE
+	
 	RET			; RET W/ ZF CLEAR
 ;
 CMPOK:
@@ -1193,7 +1208,6 @@ CST:
 	RET
 ;
 USEINT	.DB	FALSE		; USE INTERRUPTS FLAG
-counter	.dw	0	
 dmaport	.db	DMABASE
 dmalach	.db	DMALATCH
 dmaxfer	.db	DMA_XMODE
@@ -1214,11 +1228,16 @@ reladr	.equ	$		; relocation start adr
 	.org	$A000		; code will run here
 ;
 int:
+	;LD	E,'.'			; OUTPUT CHAR TO E
+	;LD	C,CIO_CONSOLE		; CONSOLE UNIT TO C
+	;LD	B,BF_CIOOUT		; HBIOS FUNC: OUTPUT CHAR
+	;CALL	$FFF0			; HBIOS OUTPUTS CHARACTER
+
 	; According to the DMA doc, you must issue
 	; a DMA_DISABLE command prior to a
 	; DMA_REINIT_STATUS_BYTE command to avoid a
 	; potential race condition.
-	ld	a,(dmaport)
+	ld	a,(int_dmaport)
 	ld	c,a
 	ld	a,DMA_DISABLE
 	out	(c),a
@@ -1238,6 +1257,11 @@ int:
 	or	$ff		; signal int handled
 	ret
 ;
+; data referred to in handler must reside in high mem
+;
+int_dmaport	.db	0	; hi mem copy of dmaport
+counter		.dw	0	; interrupt counter
+;
 hsiz	.equ	$ - $A000	; size of handler to relocate
 ;
 	.org	reladr + hsiz

Source/Apps/Test/I2C/srom.asm

@@ -7,9 +7,7 @@
 ; PCF8584 controller.
 ;
 ; WBW 2023-09-05: Initial release
-;
-; TODO:
-;   - Fix page read loop end game
+; WBW 2023-09-07: Code clean up
 ;
 ;=======================================================================
 ;
@@ -732,11 +730,7 @@ rom_write:
 	ld	a,(romadr)		; load ROM I2C adress
 	rlca				; move to top 7 bits
 	res	0,a			; clear low bit for write
-	push	de
-	push	hl
 	call	pcf_start		; generate start
-	pop	hl
-	pop	de
 	jr	nz,rom_write_z		; if error, skip write
 ;
 	; Send ROM address
@@ -815,11 +809,7 @@ rom_read:
 	ld	a,(romadr)		; load ROM I2C adress
 	rlca				; move to top 7 bits
 	res	0,a			; clear low bit for write
-	push	de
-	push	hl
 	call	pcf_start		; generate start
-	pop	hl
-	pop	de
 	jr	nz,rom_read_z		; if error, skip write
 ;
 rom_read2:
@@ -837,11 +827,7 @@ rom_read2:
 	ld	a,(romadr)		; load ROM I2C address
 	rlca				; move to top 7 bits
 	set	0,a			; set low bit for read
-	push	de			; save buffer pointer
-	push	hl			; save buffer length
 	call	pcf_repstart		; generate repeat start
-	pop	hl			; restore buffer length
-	pop	de			; restore buffer pointer
 	jr	nz,rom_read_z		; if error, bail out
 ;
 	; Read data into buffer
@@ -934,7 +920,7 @@ pcf_start:
 	;pop	de
 ;
 	; Wait for I2C bus clear
-	ld	l,a			; save start byte to L
+	ld	b,a			; move start byte to B
 	call	pcf_waitbb		; wait while bus busy
 	cp	$FF			; timeout?
 	jp	z,err_timeout		; timeout error return
@@ -942,10 +928,10 @@ pcf_start:
 	; Set start byte w/ slave address in S0
 	ld	a,(pcf_dat)		; data port
 	ld	c,a			; ... into C
-	ld	a,l			; value to A
+	;ld	a,b
 	;call	prtsp
 	;call	prthex
-	out	(c),a			; send start byte
+	out	(c),b			; send start byte
 ;
 	; Initiate start operation
 	inc	c			; ctl port
@@ -966,7 +952,7 @@ pcf_repstart:
 	;pop	de
 ;
 	; Send repeat start command
-	ld	l,a			; save start byte to L
+	ld	b,a			; move start byte to B
 	ld	a,(pcf_ctl)		; control port
 	ld	c,a			; ... into C
 	ld	a,pcf_op_repstart	; command
@@ -975,10 +961,10 @@ pcf_repstart:
 	; Set start byte w/ slave address in S0
 	ld	a,(pcf_dat)		; data port
 	ld	c,a			; ... into C
-	ld	a,l			; value to A
+	;ld	a,b
 	;call	prtsp
 	;call	prthex
-	out	(c),a			; send start byte
+	out	(c),b			; send start byte
 ;
 	xor	a			; signal success
 	ret				; done
@@ -1101,9 +1087,6 @@ pcf_read2:
 	ld	c,a			; ... into C
 	ld	a,$40			; prep for neg ack
 	out	(c),a			; send it
-;
-	; FIX: Final data byte should not be read until AFTER
-	; stop condition!!!
 ;
 	; Get final data byte
 	ld	a,(pcf_dat)		; data port

Source/BuildShared.cmd

@@ -4,6 +4,7 @@ setlocal
 pushd HDIAG && call Build || exit /b & popd
 pushd CBIOS && call Build || exit /b & popd
 pushd CPM22 && call Build || exit /b & popd
+pushd QPM && call Build || exit /b & popd
 pushd ZCPR && call Build || exit /b & popd
 pushd ZCPR-DJ && call Build || exit /b & popd
 pushd ZSDOS && call Build || exit /b & popd

Source/Clean.cmd

@@ -4,6 +4,7 @@ setlocal
 pushd HDIAG && call Clean.cmd & popd
 pushd Apps && call Clean.cmd & popd
 pushd CPM22 && call Clean.cmd & popd
+pushd QPM && call Clean.cmd & popd
 pushd ZCPR && call Clean.cmd & popd
 pushd ZCPR-DJ && call Clean.cmd & popd
 pushd ZSDOS && call Clean.cmd & popd

Source/Doc/UserGuide.md

@@ -58,8 +58,9 @@ produced by these developer communities:
 
 General features include:
 
+* Z80 Family CPUs including Z80, Z180, and Z280
 * Banked memory services for several banking designs
-* Disk drivers for RAM, ROM, Floppy, IDE, CF, and SD
+* Disk drivers for RAM, ROM, Floppy, IDE ATA/ATAPI, CF, SD, Zip, Iomega
 * Serial drivers including UART (16550-like), ASCI, ACIA, SIO
 * Video drivers including TMS9918, SY6545, MOS8563, HD6445
 * Keyboard (PS/2) drivers via VT8242 or PPI interfaces
@@ -195,6 +196,7 @@ below, **carefully** pick the appropriate ROM image for your hardware.
 | [Small Computer SC131 Z180 Pocket Computer]^5^                 | -       | SCZ180_sc131.rom   | 115200        |
 | [Small Computer SC140 Z180 CPU Module]^5^                      | Z50     | SCZ180_sc140.rom   | 115200        |
 | [Small Computer SC503 Z180 CPU Module]^5^                      | Z50     | SCZ180_sc503.rom   | 115200        |
+| [Small Computer SC700 Z180 CPU Module]^5^                      | RCBus   | SCZ180_sc700.rom   | 115200        |
 | [Dyno Z180 SBC]^6^                                             | Dyno    | DYNO_std.rom       | 38400         |
 | [Nhyodyne Z80 MBC]^1^                                          | MBC     | MBC_std.rom        | 38400         |
 | [Rhyophyre Z180 SBC]^1^                                        | -       | RPH_std.rom        | 38400         |
@@ -2143,10 +2145,36 @@ regarding the RomWBW adaptation and customizations.
 
 #### Boot Disk
 
-There is no RomWBW-specific boot disk creation procedure.  QP/M
-comes with a QINSTALL which is used to install QPM over an existing
-CP/M 2 installation or to update an existing QPM disk.  `QINSTALL.COM`
-is included with the RomWBW distribution.
+
+To create or update a bootable QP/M Z-System disk, a special process
+is required.  QP/M is not provided in source format.  You are expected
+to install QP/M over an existing CP/M installation using the
+`QINSTALL.COM` application.
+
+To update an existing QP/M boot disk with the latest RomWBW CBIOS, you
+must use 2 steps: apply the generic CP/M system track, then reinstall
+the QP/M components.  To do this, you can perform the following steps:
+
+1. Boot to the existing QP/M disk.  At this point, drive A should be
+   the QP/M disk that you wish to update.  You may receive a warning
+   about CBIOS/HBIOS version mismatch.
+
+1. Use RomWBW `SYSCOPY` to place the stock RomWBW CP/M OS image
+   onto the system tracks of the QP/M boot disk:
+   
+   `SYSCOPY A:=x:CPM.SYS`
+   
+   where x is the drive letter of your ROM Disk.
+
+1. Run `QINSTALL` to overlay the QP/M OS components on your
+   QP/M boot disk.
+
+**WARNING**: `QINSTALL` has no mechanism for retaining previous
+non-default settings.  Any previous non-default settings you
+previously made with `QINSTALL` will need to be reapplied.  The
+pre-built RomWBW QP/M disk image includes a couple of specific
+non-default settings to optimize use with RomWBW.  Please review the
+notes in the ReadMe.txt file in Source/Images/d_qpm.
 
 #### Notes
 
@@ -2154,6 +2182,9 @@ is included with the RomWBW distribution.
   on the QPM binary distribution and has been minimally customized
   for RomWBW.
 
+- When booted, the QPM startup banner will indicate CP/M 2.2.  This
+  is because QPM uses the CP/M 2.2 CBIOS code.
+
 - QINSTALL is used to customize QPM.  It is included on the
   disk image.  You should review the notes in the ReadMe.txt
   file in Source/Images/d_qpm before making changes.
@@ -3791,6 +3822,31 @@ the RomWBW HBIOS configuration.
 
 `\clearpage`{=latex}
 
+### Small Computer SC700 Z180 CPU Module
+
+|                   |                  |
+|-------------------|------------------|
+| ROM Image Files   | SCZ180_sc700.rom |
+| Console Baud Rate | 115200           |
+| Interrupts        | Mode 2           |
+
+ - CPU speed is detected at startup if DS1302 RTC is active
+   - Otherwise 18.432 MHz assumed
+ - System timer is generated by Z180 CPU
+ - Hardware auto-detected:
+   - DS1302 RTC
+   - Z180 ASCI Serial Ports
+   - SIO Serial Interface Module
+   - EP Dual UART Serial Interface Module
+   - WDC Floppy Disk Controller w/ 3.5" HD Drives
+   - IDE Hard Disk Interface Module
+   - PPIDE Hard Disk Interface Module
+   - Onboard SD Card Interface
+ - Use of Interrupt Mode 2 requires proper IEI/IEO configuration
+   for all peripherals generating interrupts
+
+`\clearpage`{=latex}
+
 ### Dyno Z180 SBC
 
 |                   |                |
@@ -4001,7 +4057,7 @@ may be discovered by RomWBW in your system.
 | FD        | Disk     | 8272 or compatible Floppy Disk Controller              |
 | GDC       | Video    | uPD7220 Video Display Controller                       |
 | HDSK      | Disk     | SIMH Simulator Hard Disk                               |
-| IDE       | Disk     | IDE/ATA Hard Disk Interface                            |
+| IDE       | Disk     | IDE/ATA/ATAPI Hard Disk Interface                      |
 | ICM       | DsKy     | ICM7218-based Display/Keypad on PPI                    |
 | IMM       | Disk     | IMM Zip Drive on PPI                                   |
 | INTRTC    | RTC      | Interrupt-based Real Time Clock                        |
@@ -4013,7 +4069,7 @@ may be discovered by RomWBW in your system.
 | I2C       | System   | I2C Interface                                          |
 | PIO       | Char     | Zilog Parallel Interface Controller                    |
 | PKD       | DsKy     | P8279-based Display/Keypad on PPI                      |
-| PPIDE     | Disk     | 8255 IDE/ATA Hard Disk Interface                       |
+| PPIDE     | Disk     | 8255 IDE/ATA/ATAPI Hard Disk Interface                 |
 | PPA       | Disk     | PPA Zip Drive on PPI                                   |
 | PPK       | Kbd      | Matrix Keyboard                                        |
 | PPPSD     | Disk     | ParPortProp SD Card Interface                          |

Source/HBIOS/Build.cmd

@@ -227,6 +227,7 @@ call Build SCZ180 sc130 || exit /b
 call Build SCZ180 sc131 || exit /b
 call Build SCZ180 sc140 || exit /b
 call Build SCZ180 sc503 || exit /b
+call Build SCZ180 sc700 || exit /b
 call Build DYNO std || exit /b
 call Build UNA std || exit /b
 call Build RPH std || exit /b

Source/HBIOS/Build.sh

@@ -38,6 +38,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc131"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc140"; bash Build.sh
 	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc503"; bash Build.sh
+	ROM_PLATFORM="SCZ180"; ROM_CONFIG="sc700"; bash Build.sh
 	ROM_PLATFORM="S100"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="UNA"; ROM_CONFIG="std"; bash Build.sh
 	ROM_PLATFORM="Z80RETRO"; ROM_CONFIG="std"; bash Build.sh

Source/HBIOS/Config/S100_std.asm

@@ -27,18 +27,17 @@
 #include "cfg_s100.asm"
 ;
 CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
+CRTACT		.SET	TRUE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 ;
 Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
-Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
-Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z180_MEMWAIT	.SET	1		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.SET	2		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 ;
 DSRTCENABLE	.SET	FALSE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
 INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
 ;
-UARTENABLE	.SET	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
-ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
-SIOENABLE	.SET	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SCONENABLE	.SET	TRUE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 IDEENABLE	.SET	FALSE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
 PPIDEENABLE	.SET	FALSE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)

Source/HBIOS/Config/SCZ180_sc700.asm

@@ -0,0 +1,71 @@
+;
+;==================================================================================================
+;   SC700 STANDARD CONFIGURATION
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE PLATFORM_NAME "Small Computer SC700", " [", CONFIG, "]"
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_scz180.asm"
+;
+CPUOSC		.SET	18432000	; CPU OSC FREQ IN MHZ
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+Z180_CLKDIV	.SET	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
+Z180_MEMWAIT	.SET	0		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.SET	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+;
+LEDENABLE	.SET	TRUE		; ENABLE STATUS LED (SINGLE LED)
+LEDPORT		.SET	$0E		; STATUS LED PORT ADDRESS
+;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPLED_IO	.SET	$00		; FP: PORT ADDRESS FOR FP LEDS
+;
+DSRTCENABLE	.SET	TRUE		; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
+INTRTCENABLE	.SET	TRUE		; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
+;
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ASCIENABLE	.SET	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSTIMENABLE	.SET	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VDAEMU_SERKBD	.SET	0		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+AY38910ENABLE	.SET	TRUE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+AYMODE		.SET	AYMODE_RCZ180	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
+FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPWDC]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+SDENABLE	.SET	TRUE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDMODE		.SET	SDMODE_SC	; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR]
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD & SC ONLY
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/cfg_duo.asm

@@ -167,6 +167,7 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_dyno.asm

@@ -179,6 +179,7 @@ TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_master.asm

@@ -236,6 +236,7 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_mbc.asm

@@ -164,6 +164,7 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_mk4.asm

@@ -175,6 +175,7 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_n8.asm

@@ -177,6 +177,7 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_rcz180.asm

@@ -185,6 +185,7 @@ TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_rcz280.asm

@@ -189,6 +189,7 @@ TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_rcz80.asm

@@ -183,6 +183,7 @@ TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_rph.asm

@@ -166,6 +166,7 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_s100.asm

@@ -46,8 +46,8 @@ MPGENA		.EQU	$7C		; Z2 MEM MGR PAGING ENABLE REGISTER (BIT 0, WRITE ONLY)
 ;
 Z180_BASE	.EQU	$C0		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
 Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
-Z180_MEMWAIT	.EQU	0		; Z180: MEMORY WAIT STATES (0-3)
-Z180_IOWAIT	.EQU	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z180_MEMWAIT	.EQU	1		; Z180: MEMORY WAIT STATES (0-3)
+Z180_IOWAIT	.EQU	2		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 Z180_TIMER	.EQU	TRUE		; Z180: ENABLE Z180 SYSTEM PERIODIC TIMER
 ;
 RTCIO		.EQU	$0C		; RTC LATCH REGISTER ADR
@@ -125,7 +125,7 @@ DUART1BASE	.EQU	$40		; DUART 1: BASE ADDRESS OF CHIP
 DUART1ACFG	.EQU	DEFSERCFG	; DUART 1A: SERIAL LINE CONFIG
 DUART1BCFG	.EQU	DEFSERCFG	; DUART 1B: SERIAL LINE CONFIG
 ;
-UARTENABLE	.EQU	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+UARTENABLE	.EQU	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 UARTOSC		.EQU	1843200		; UART: OSC FREQUENCY IN MHZ
 UARTINTS	.EQU	FALSE		; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
 UARTCFG		.EQU	DEFSERCFG | SER_RTS	; UART: LINE CONFIG FOR UART PORTS
@@ -148,7 +148,7 @@ Z2UENABLE	.EQU	FALSE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
 ;
 ACIAENABLE	.EQU	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
 ;
-SIOENABLE	.EQU	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+SIOENABLE	.EQU	FALSE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
 SIODEBUG	.EQU	FALSE		; SIO: ENABLE DEBUG OUTPUT
 SIOBOOT		.EQU	0		; SIO: REBOOT ON RCV CHAR (0=DISABLED)
 SIOCNT		.EQU	2		; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
@@ -179,6 +179,7 @@ TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_sbc.asm

@@ -164,6 +164,7 @@ TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VGASIZ		.EQU	V80X25		; VGA: DISPLAY FORMAT [V80X25|V80X30|V80X43]
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_scz180.asm

@@ -179,6 +179,7 @@ TMSMODE		.EQU	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MS
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_z80retro.asm

@@ -166,6 +166,7 @@ TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|M
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_zeta.asm

@@ -136,6 +136,7 @@ TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|M
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/cfg_zeta2.asm

@@ -147,6 +147,7 @@ TMSMODE		.EQU	TMSMODE_NONE	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|M
 TMSTIMENABLE	.EQU	FALSE		; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
 VGAENABLE	.EQU	FALSE		; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
 VRCENABLE	.EQU	FALSE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+SCONENABLE	.EQU	FALSE		; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
 ;
 MDENABLE	.EQU	TRUE		; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
 MDROM		.EQU	TRUE		; MD: ENABLE ROM DISK

Source/HBIOS/hbios.asm

@@ -1112,13 +1112,7 @@ Z280_BOOTERR	.TEXT	"\r\n\r\n*** Application mode boot not supported under Z280 n
 	DI				; NO INTERRUPTS
 	IM	1			; INTERRUPT MODE 1
 ;
-#IF ((PLATFORM == PLT_DUO) & FALSE)
-	; WAIT A WHILE
-	LD	B,0
-	DJNZ	$
-#ENDIF
-;
-#IF ((PLATFORM == PLT_DUO) & FALSE)
+#IF ((PLATFORM == PLT_DUO) & TRUE)
 	; WAIT A WHILE
 	LD	HL,0
 BOOTWAIT:
@@ -2847,6 +2841,12 @@ HB_WDZ:
 	BIT	6,A			; BIT 6 HAS CONFIG JUMPER STATE
 	JR	Z,INITSYS3		; Z=SHORTED, BYPASS CONSOLE SWITCH
   #ENDIF
+;
+  #IF (PLATFORM == PLT_S100)
+	IN	A,($75)			; GET IO BYTE
+	AND	%00000001		; ISOLATE CONSOLE BIT
+	JR	NZ,INITSYS3		; NOT SET, BYPASS CONSOLE SWITCH
+  #ENDIF
 ;
 	LD	A,(CB_CRTDEV)		; GET CRT DISPLAY DEVICE
 	LD	(HB_NEWCON),A		; AND QUEUE TO SWITCH
@@ -3196,6 +3196,9 @@ HB_PCINITTBL:
 #IF (TMSENABLE)
 	.DW	TMS_PREINIT
 #ENDIF
+#IF (SCONENABLE)
+	.DW	SCON_PREINIT
+#ENDIF
 HB_PCINITTBLLEN	.EQU	(($ - HB_PCINITTBL) / 2)
 
 ;==================================================================================================
@@ -3300,6 +3303,9 @@ HB_INITTBL:
 #IF (TMSENABLE)
 	.DW	TMS_INIT
 #ENDIF
+#IF (SCONENABLE)
+	.DW	SCON_INIT
+#ENDIF
 #IF (VRCENABLE)
 	.DW	VRC_INIT
 #ENDIF
@@ -6361,12 +6367,21 @@ SIZ_VDU		.EQU	$ - ORG_VDU
 #IF (TMSENABLE)
 ORG_TMS		.EQU	$
   #INCLUDE "tms.asm"
-SIZ_TMS		.EQU	$ - ORG_TMS
+SIZ_TMS	.EQU	$ - ORG_TMS
 		.ECHO	"TMS occupies "
 		.ECHO	SIZ_TMS
 		.ECHO	" bytes.\n"
 #ENDIF
 ;
+#IF (SCONENABLE)
+ORG_SCON		.EQU	$
+  #INCLUDE "scon.asm"
+SIZ_SCON	.EQU	$ - ORG_SCON
+		.ECHO	"SCON occupies "
+		.ECHO	SIZ_SCON
+		.ECHO	" bytes.\n"
+#ENDIF
+;
 #IF (GDCENABLE)
 ORG_GDC	.EQU	$
   #INCLUDE "gdc.asm"
@@ -7420,6 +7435,7 @@ PS_SDZ2U	.TEXT	"Z2U$"
 PS_SDLPT	.TEXT	"LPT$"
 PS_SDESPCON	.TEXT	"ESPCON$"
 PS_SDESPSER	.TEXT	"ESPSER$"
+PS_SDSCON	.TEXT	"SCON$"
 ;
 ; CHARACTER SUB TYPE STRINGS
 ;

Source/HBIOS/hbios.inc

@@ -315,6 +315,7 @@ CIODEV_Z2U	.EQU	$A0
 CIODEV_LPT	.EQU	$B0
 CIODEV_ESPCON	.EQU	$C0
 CIODEV_ESPSER	.EQU	$D0
+CIODEV_SCON	.EQU	$E0
 ;
 ; SUB TYPES OF CHAR DEVICES
 ;

Source/HBIOS/scon.asm

@@ -0,0 +1,126 @@
+;
+;==================================================================================================
+; S100 PROPELLER CONSOLE DRIVER
+;==================================================================================================
+;
+; TODO:
+;
+SCON_IOBASE	.EQU	$00
+;
+SCON_STATUS	.EQU	SCON_IOBASE
+SCON_DATA	.EQU	SCON_IOBASE + 1
+;
+SCON_KBDRDY	.EQU	%00000010
+SCON_DSPRDY	.EQU	%00000100
+;
+SCON_COLS	.EQU	80
+SCON_ROWS	.EQU	40
+;
+;
+;
+SCON_PREINIT:
+	XOR	A
+	RET
+;
+;
+;
+SCON_INIT:
+	CALL	NEWLINE
+	PRTS("SCON:$")
+;
+	; DISPLAY CONSOLE DIMENSIONS
+	CALL	PC_SPACE
+	LD	A,SCON_COLS
+	CALL	PRTDECB
+	LD	A,'X'
+	CALL	COUT
+	LD	A,SCON_ROWS
+	CALL	PRTDECB
+	CALL	PRTSTRD
+	.TEXT	" TEXT (ANSI)$"
+;
+; ADD OURSELVES TO CIO DISPATCH TABLE
+;
+	LD	D,0			; PHYSICAL UNIT IS ZERO
+	LD	E,CIODEV_SCON		; DEVICE TYPE
+	LD	BC,SCON_FNTBL		; BC := FUNCTION TABLE ADDRESS
+	CALL	CIO_ADDENT		; ADD ENTRY, A := UNIT ASSIGNED
+	LD	(HCB + HCB_CRTDEV),A	; SET OURSELVES AS THE CRT DEVICE
+;
+	XOR	A			; SIGNAL SUCCESS
+	RET
+;
+; DRIVER FUNCTION TABLE
+;
+SCON_FNTBL:
+	.DW	SCON_IN
+	.DW	SCON_OUT
+	.DW	SCON_IST
+	.DW	SCON_OST
+	.DW	SCON_INITDEV
+	.DW	SCON_QUERY
+	.DW	SCON_DEVICE
+#IF (($ - SCON_FNTBL) != (CIO_FNCNT * 2))
+	.ECHO	"*** INVALID SCON FUNCTION TABLE ***\n"
+#ENDIF
+;
+;
+;
+SCON_IN:
+	CALL	SCON_IST		; CHECK FOR CHAR PENDING
+	JR	Z,SCON_IN		; WAIT FOR IT IF NECESSARY
+	IN0	A,(SCON_DATA)		; READ THE CHAR FROM PROPIO
+	LD	E,A
+	RET
+;
+;
+;
+SCON_IST:
+	IN0	A,(SCON_STATUS)		; READ LINE STATUS REGISTER
+	AND	SCON_KBDRDY		; ISOLATE KBDRDY
+	JP	Z,CIO_IDLE		; RETURN VIA IDLE PROCESSING
+	OR	$FF			; SET A=$FF TO SIGNAL READY
+	RET				; RETURN
+;
+;
+;
+SCON_OUT:
+	CALL	SCON_OST		; CHECK FOR OUTPUT READY
+	JR	Z,SCON_OUT		; WAIT IF NECESSARY
+	LD	A,E			; RECOVER THE CHAR TO WRITE
+	OUT0	(SCON_DATA),A		; WRITE THE CHAR TO PROPIO
+	RET
+;
+;
+;
+SCON_OST:
+	IN0	A,(SCON_STATUS)		; READ LINE STATUS REGISTER
+	AND	SCON_DSPRDY 		; ISOLATE DSPRDY
+	JP	Z,CIO_IDLE		; RETURN VIA IDLE PROCESSING
+	OR	$FF			; SET A=$FF TO SIGNAL READY
+	RET				; RETURN
+;
+;
+;
+SCON_INITDEV:
+	SYSCHKERR(ERR_NOTIMPL)
+	RET
+;
+;
+;
+SCON_QUERY:
+	LD	DE,0
+	LD	HL,0
+	XOR	A
+	RET
+;
+;
+;
+SCON_DEVICE:
+	LD	D,CIODEV_SCON		; D := DEVICE TYPE
+	LD	E,0			; E := DEVICE NUM, ALWAYS 0
+	LD	C,$BF			; C := DEVICE TYPE, 0xBF IS PROP TERM
+	LD	H,0			; H := 0, DRIVER HAS NO MODES
+	LD	L,SCON_IOBASE		; L := BASE I/O ADDRESS
+	XOR	A			; SIGNAL SUCCESS
+	RET

Source/Images/Build.cmd

@@ -13,7 +13,7 @@ call BuildDisk.cmd nzcom fd wbw_fd144 ..\zsdos\zsys_wbw.sys || exit /b
 call BuildDisk.cmd cpm3 fd wbw_fd144 ..\cpm3\cpmldr.sys || exit /b
 call BuildDisk.cmd zpm3 fd wbw_fd144 ..\zpm3\zpmldr.sys || exit /b
 call BuildDisk.cmd ws4 fd wbw_fd144 || exit /b
-call BuildDisk.cmd qpm fd wbw_fd144 d_qpm\u0\qpm.sys || exit /b
+call BuildDisk.cmd qpm fd wbw_fd144 ..\qpm\qpm_wbw.sys || exit /b
 call BuildDisk.cmd z80asm hd wbw_fd144 || exit /b
 call BuildDisk.cmd aztecc hd wbw_fd144 || exit /b
 call BuildDisk.cmd hitechc hd wbw_fd144 || exit /b
@@ -32,7 +32,7 @@ call BuildDisk.cmd cpm3 hd wbw_hd512 ..\cpm3\cpmldr.sys || exit /b
 call BuildDisk.cmd zpm3 hd wbw_hd512 ..\zpm3\zpmldr.sys || exit /b
 call BuildDisk.cmd ws4 hd wbw_hd512 || exit /b
 call BuildDisk.cmd dos65 hd wbw_hd512 ..\zsdos\zsys_wbw.sys || exit /b
-call BuildDisk.cmd qpm hd wbw_hd512 d_qpm\u0\qpm.sys || exit /b
+call BuildDisk.cmd qpm hd wbw_hd512 ..\qpm\qpm_wbw.sys || exit /b
 call BuildDisk.cmd z80asm hd wbw_hd512 || exit /b
 call BuildDisk.cmd aztecc hd wbw_hd512 || exit /b
 call BuildDisk.cmd hitechc hd wbw_hd512 || exit /b
@@ -56,7 +56,7 @@ call BuildDisk.cmd nzcom hd wbw_hd1k ..\zsdos\zsys_wbw.sys || exit /b
 call BuildDisk.cmd cpm3 hd wbw_hd1k ..\cpm3\cpmldr.sys || exit /b
 call BuildDisk.cmd zpm3 hd wbw_hd1k ..\zpm3\zpmldr.sys || exit /b
 call BuildDisk.cmd ws4 hd wbw_hd1k || exit /b
-call BuildDisk.cmd qpm hd wbw_hd1k d_qpm\u0\qpm.sys || exit /b
+call BuildDisk.cmd qpm hd wbw_hd1k ..\qpm\qpm_wbw.sys || exit /b
 call BuildDisk.cmd z80asm hd wbw_hd1k || exit /b
 call BuildDisk.cmd aztecc hd wbw_hd1k || exit /b
 call BuildDisk.cmd hitechc hd wbw_hd1k || exit /b

Source/Images/Makefile

@@ -1,7 +1,7 @@
 #
 # this makefile subsumes all the work done in Build.cmd, BuildDisk.cmd, BuildDisk.ps1
 #
-SYSTEMS = ../CPM22/cpm_wbw.sys ../ZSDOS/zsys_wbw.sys ../CPM3/cpmldr.sys ../ZPM3/zpmldr.sys
+SYSTEMS = ../CPM22/cpm_wbw.sys ../ZSDOS/zsys_wbw.sys ../QPM/qpm_wbw.sys ../CPM3/cpmldr.sys ../ZPM3/zpmldr.sys
 
 FDIMGS = fd144_cpm22.img fd144_zsdos.img fd144_nzcom.img \
 	fd144_cpm3.img fd144_zpm3.img fd144_ws4.img fd144_qpm.img \
@@ -80,7 +80,7 @@ blankhd1k:
 	@sys= ; \
 	case $@ in \
 		(*cpm22*) sys=../CPM22/cpm_wbw.sys;; \
-		(*qpm*) sys=d_qpm/u0/qpm.sys;; \
+		(*qpm*) sys=../QPM/qpm_wbw.sys;; \
 		(*zsdos* | *nzcom* | *dos65*) sys=../ZSDOS/zsys_wbw.sys;; \
 		(*cpm3*) sys=../CPM3/cpmldr.sys;; \
 		(*zpm3*) sys=../ZPM3/zpmldr.sys;; \

Source/Images/d_qpm/ReadMe.txt

@@ -36,11 +36,19 @@ code brakpoints.  This conflicts the use of that vector for any
 system that is using interrupt mode 1.  DEBUGZ can be configured
 (using DBGINST) to use a different vector.
 
-The QSTAMP program, which is used to initialize a disk for date/time
-stamping, misbehavews when run on the (new) RomWBW 1024 directory
-format disks.  It creates an invalid directory entry for the
-date/time stamp data file.  This is definitely a QP/M issue.  The
-directory entry can be manually corrected.
+The QSTAMP program, which is used to initialize a disk for date/time 
+stamping, misbehavews when run on the (new) RomWBW 1024 directory 
+format disks.  It creates an invalid directory entry for the date/time 
+stamp data file.  This is definitely a QP/M issue.  The directory entry 
+can be manually corrected.  Specifically the byte offset 15 should 
+contain the number of 128-byte records in the file.  Instead, it is set 
+to 0x01.  You can edit the entry, change it to 0x80 and everything
+starts working.
+
+There are two text files (QPMCMDS.TXT and QPMUTILS.TXT) included.  They
+came from the original QP/M 2.7 distribution.  These files have
+escape sequences imbedded in them which makes them look a little
+strange depending on the terminal emulation you are using.
 
 == QPM 2.7 Files ==
 
@@ -48,10 +56,9 @@ The following files came from the official QP/M distribution.  Actually,
 they came from 3 Microcode Consulting files (qpm27.zip, debugz.zip,
 and linkz.zip).  The original distribution files can be found on the
 Microcode Consulting website at https://www.microcodeconsulting.com/.
-Documentation (pdf) files are incuded in these original distribution
-.zip files.  These documentation files have not been included in the
-RomWBW distribution.  Please retrieve them yourself from the website
-if desired.
+Documentation (pdf) files are included in these original distribution
+.zip files.  These documentation files have been included in the
+RomWBW distribution in the Doc folder.
 
 D.COM - Directory lister
 DBGINST.COM - Configures DEBUGZ debugger

Source/Images/fd_qpm.txt

@@ -44,7 +44,7 @@ d_cpm22/u0/*.* 0:
 #
 # Add OS image
 #
-../CPM22/cpm_wbw.sys 0:cpm.sys
+../QPM/qpm_wbw.sys 0:qpm.sys
 #
 # Add Common Applications
 #

Source/Images/hd_qpm.txt

@@ -51,7 +51,7 @@ cpnet12/*.* 4:
 #
 # Add OS image
 #
-../CPM22/cpm_wbw.sys 0:cpm.sys
+../QPM/qpm_wbw.sys 0:qpm.sys
 #
 # Add Common Applications
 #

Source/Makefile

@@ -8,7 +8,7 @@ SUBDIRS += CBIOS
 SUBDIRS += Forth
 SUBDIRS += TastyBasic
 SUBDIRS += Fonts
-SUBDIRS += CPM22 ZCPR ZCPR-DJ ZSDOS CPM3 ZPM3
+SUBDIRS += CPM22 ZCPR ZCPR-DJ ZSDOS CPM3 ZPM3 QPM
 #SUBDIRS += BPBIOS
 SUBDIRS += pSys
 SUBDIRS += RomDsk

Source/QPM/Build.cmd

@@ -0,0 +1,20 @@
+@echo off
+setlocal
+
+set TOOLS=../../Tools
+
+set PATH=%TOOLS%\tasm32;%TOOLS%\zxcc;%PATH%
+
+set TASMTABS=%TOOLS%\tasm32
+
+set CPMDIR80=%TOOLS%/cpm/
+
+tasm -t80 -g3 -fFF loader.asm loader.bin loader.lst || exit /b
+
+copy /b qcp27.dat + qdos27.dat + ..\cbios\cbios_wbw.bin qpm_wbw.bin || exit /b
+copy /b qcp27.dat + qdos27.dat + ..\cbios\cbios_una.bin qpm_una.bin || exit /b
+
+copy /b loader.bin + qpm_wbw.bin qpm_wbw.sys || exit /b
+copy /b loader.bin + qpm_una.bin qpm_una.sys || exit /b
+
+goto :eof

Source/QPM/Clean.cmd

@@ -0,0 +1,8 @@
+@echo off
+setlocal
+
+if exist *.bin del *.bin
+if exist *.lst del *.lst
+if exist *.prn del *.prn
+if exist *.hex del *.hex
+if exist *.sys del *.sys

Source/QPM/Makefile

@@ -0,0 +1,15 @@
+SYSFILES = qpm_wbw.sys qpm_una.sys
+BINFILES = qpm_wbw.bin qpm_una.bin
+OBJECTS = loader.bin $(SYSFILES) $(BINFILES)
+OTHERS = *.hex
+TOOLS = ../../Tools
+include $(TOOLS)/Makefile.inc
+
+%.sys: %.bin loader.bin
+	cat loader.bin $*.bin > $@
+
+qpm_una.bin: qcp27.dat qdos27.dat ../CBIOS/cbios_una.bin
+	cat qcp27.dat qdos27.dat ../CBIOS/cbios_una.bin > $@
+
+qpm_wbw.bin: qcp27.dat qdos27.dat ../CBIOS/cbios_wbw.bin
+	cat qcp27.dat qdos27.dat ../CBIOS/cbios_wbw.bin > $@

Source/QPM/ReadMe.txt

@@ -0,0 +1,15 @@
+QPM27
+-----
+
+QPM is not available in source form.  In this folder, you will find
+qcp27.dat and qdos27.dat.  These are the CCP and BDOS components for
+QPM.  They were created by running QINSTALL on a normal RomWBW
+CP/M 2.2 system, then extracting the resultant CCP and BDOS binaries.
+
+When this folder goes through the build process, it just combines the
+QPM CCP and BDOS binaries with the RomWBW CBIOS to create an up-to-date
+QPM system image.
+
+QPM 2.7 is distributed at https://www.microcodeconsulting.com/.
+
+-- WBW 3:13 PM 9/9/2023

Source/QPM/loader.asm

@@ -0,0 +1,271 @@
+;===============================================================================
+; LOADER.ASM
+;
+; BOOTLOADER FOR ROMWBW DISK OPERATING SYSTEMS.
+;
+; CP/M DISK FORMATS ALLOW FOR RESERVED TRACKS THAT CONTAIN AN IMAGE OF THE
+; OPERATING SYSTEM TO BE LOADED WHEN THE DISK IS BOOTED.  THE OPERATING SYSTEM
+; IMAGE ITSELF IS NORMALLY PREFIXED BY A 1-N SECTORS CONTAINING OS BOOTSTRAP
+; CODE AND DISK METADATA.
+;
+; THE RETROBREW COMPUTING GROUP HAS BEEN USING A CONVENTION OF PREFIXING THE
+; OS IMAGE WITH 3 SECTORS (512 BYTES X 3 FOR A TOTAL OF 1536 BYTES):
+;
+;   SECTOR 1: IBM-PC STYLE BOOT BLOCK CONTAINING BOOTSTRAP, 
+;             PARTITION TABLE, AND BOOT SIGNATURE
+;   SECTOR 2: RESERVED
+;   SECTOR 3: METADATA
+;
+; THE HARDWARE BIOS IS EXPECTED TO READ AND LOAD THE FIRST TWO SECTORS FROM THE
+; DISK TO MEMORY ADDRESS $8000 AND JUMP TO THAT LOCATION TO BEGIN THE BOOT
+; PROCESS.  THE BIOS IS EXPECTED TO VERIFY THAT A STANDARD BOOT SIGNATURE
+; OF $55, $AA IS PRESENT AT OFFSET $1FE-$1FF.  IF THE SIGNATURE IS NOT FOUND,
+; THE BIOS SHOULD ASSUME THE DISK HAS NOT BEEN PROPERLY INITIALIZED AND SHOULD
+; NOT JUMP TO THE LOAD ADDRESS.
+;
+;===============================================================================
+;
+#INCLUDE "../ver.inc"
+;
+SYS_ENT		.EQU	$E600		; SYSTEM (OS) ENTRY POINT ADDRESS
+SYS_LOC		.EQU	$D000		; STARTING ADDRESS TO LOAD SYSTEM IMAGE
+SYS_END		.EQU	$FE00		; ENDING ADDRESS OF SYSTEM IMAGE
+;
+SEC_SIZE	.EQU	512		; DISK SECTOR SIZE
+BLK_SIZE	.EQU	128		; OS BLOCK/RECORD SIZE
+;
+PREFIX_SIZE	.EQU	(SEC_SIZE * 3)	; 3 SECTORS
+;
+META_SIZE	.EQU	32		; SEE BELOW
+META_LOC	.EQU	(PREFIX_SIZE - META_SIZE)
+;
+PT_LOC		.EQU	$1BE
+PT_SIZ		.EQU	$40
+;
+;-------------------------------------------------------------------------------
+; SECTOR 1
+;
+;   THIS SECTOR FOLLOWS THE CONVENTIONS OF AN IBM-PC MBR CONTAINING THE OS
+;   BOOTSTRAP CODE, PARTITION TABLE, AND BOOT SIGNATURE
+;
+;----------------------------------------------------------------------------
+;
+; THE FOLLOWING BOOTSTRAP CODE IS BUILT TO ASSUME IT WILL BE EXECUTED AT A STARTING
+; ADDRESS OF $8000.  THIS CODE IS *ONLY* FOR UNA.  THE ROMWBW ROM BOOTLOADER
+; USES THE METADATA TO LOAD THE OS DIRECTLY.
+;
+	.ORG	$8000
+	JR	BOOT
+;
+BOOT:
+	LD	DE,STR_LOAD	; LOADING STRING
+	CALL	PRTSTR		; PRINT
+	CALL	PRTDOT		; PROGRESS
+;
+	LD	BC,$00FC	; UNA FUNC: GET BOOTSTRAP HISTORY
+	CALL	$FFFD		; CALL UNA
+	JR	NZ,ERROR	; HANDLE ERROR
+	CALL	PRTDOT		; PROGRESS
+	LD	B,L		; MOVE BOOT UNIT ID TO B
+;
+	LD	C,$41		; UNA FUNC: SET LBA
+	LD	DE,0		; HI WORD ALWAYS ZERO
+	LD	HL,3		; IMAGE STARTS AT FOURTH SECTOR
+	CALL	$FFFD		; SET LBA
+	JR	NZ,ERROR	; HANDLE ERROR
+	CALL	PRTDOT		; PROGRESS
+;
+	LD	C,$42		; UNA FUNC: READ SECTORS
+	LD	DE,$D000	; STARTING ADDRESS FOR IMAGE
+	LD	L,22		; READ 22 SECTORS
+	CALL	$FFFD		; DO READ
+	JR	NZ,ERROR	; HANDLE ERROR
+	CALL	PRTDOT		; PROGRESS
+;
+	LD	DE,STR_DONE	; DONE MESSAGE
+	CALL	PRTSTR		; PRINT IT
+;
+	LD	D,B		; PASS BOOT UNIT TO OS
+	LD	E,0		; ASSUME LU IS ZERO
+	JP	SYS_ENT		; GO TO SYSTEM
+;
+PRTCHR:
+	PUSH	BC
+	PUSH	DE
+	LD	BC,$0012	; UNIT 0, WRITE CHAR
+	LD	E,A		; CHAR TO PRINT
+	CALL	$FFFD		; PRINT
+	POP	DE
+	POP	BC
+	RET
+;
+PRTSTR:
+	PUSH	BC
+	PUSH	HL
+	LD	BC,$0015	; UNIT 0, WRITE CHARS UNTIL TERMINATOR
+	LD	L,0		; TERMINATOR IS NULL
+	CALL	$FFFD		; PRINT
+	POP	HL
+	POP	BC
+	RET
+;
+PRTDOT:
+	LD	A,'.'		; DOT CHARACTER
+	JR	PRTCHR		; PRINT AND RETURN
+;
+; PRINT THE HEX BYTE VALUE IN A
+;
+PRTHEXBYTE:
+	PUSH	AF
+	PUSH	DE
+	CALL	HEXASCII
+	LD	A,D
+	CALL	PRTCHR
+	LD	A,E
+	CALL	PRTCHR
+	POP	DE
+	POP	AF
+	RET
+;
+; CONVERT BINARY VALUE IN A TO ASCII HEX CHARACTERS IN DE
+;
+HEXASCII:
+	LD	D,A
+	CALL	HEXCONV
+	LD	E,A
+	LD	A,D
+	RLCA
+	RLCA
+	RLCA
+	RLCA
+	CALL	HEXCONV
+	LD	D,A
+	RET
+;
+; CONVERT LOW NIBBLE OF A TO ASCII HEX
+;
+HEXCONV:
+	AND	$0F	     ;LOW NIBBLE ONLY
+	ADD	A,$90
+	DAA	
+	ADC	A,$40
+	DAA	
+	RET	
+;
+ERROR:
+	LD	DE,STR_ERR		; POINT TO ERROR STRING
+	CALL	PRTSTR			; PRINT IT
+	HALT				; HALT
+;
+; DATA
+;
+STR_LOAD	.DB	"\r\nLoading",0
+STR_DONE	.DB	"\r\n",0
+STR_ERR		.DB	" Read Error!",0
+;
+	.ORG	$ - $8000		; BACK TO ABSOLUTE ADDRESS
+;
+	.FILL	PT_LOC - $,0		; FILL TO START OF PARTITION TABLE
+;
+; STANDARD IBM-PC PARTITION TABLE.  ALTHOUGH A
+; PARTITION TABLE IS NOT RELEVANT FOR A FLOPPY DISK, IT DOES NO HARM.
+; THE CONTENTS OF THE PARTITION TABLE CAN BE MANAGED BY FDISK80.
+;
+; BELOW WE ALLOW FOR 32 SLICES OF ROMWBW CP/M FILESYSTEMS
+; FOLLOWED BY A FAT16 PARTITION.  THE SLICES FOLLOW THE ORIGINAL
+; HD512 ROMWBW FORMAT.  IF THE DISK IS USING HD1K, A SEPARATE
+; PARTITION TABLE WILL BE IN PLACE AND RENDER THIS PARTITION TABLE
+; IRRELEVANT.
+;
+; THE CYL/SEC FIELDS ENCODE CYLINDER AND SECTOR AS:
+;	CCCCCCCC:CCSSSSSS
+;	76543210:98543210
+;
+PART0:
+	.DB	0			; ACTIVE IF $80
+	.DB	0			; CHS START ADDRESS (HEAD)
+	.DW	0			; CHS START ADDRESS (CYL/SEC)
+	.DB	0			; PART TYPE ID
+	.DB	0			; CHS LAST ADDRESS (HEAD)
+	.DW	0			; CHS LAST ADDRESS (CYL/SEC)
+	.DW	0,0			; LBA FIRST (DWORD)
+	.DW	0,0			; LBA COUNT (DWORD)
+PART1:
+	.DB	0			; ACTIVE IF $80
+	.DB	0			; CHS START ADDRESS (HEAD)
+	.DW	%1111111111000001	; CHS START ADDRESS (CYL/SEC)
+	.DB	6			; PART TYPE ID
+	.DB	15			; CHS LAST ADDRESS (HEAD)
+	.DW	%1111111111010000	; CHS LAST ADDRESS (CYL/SEC)
+	.DW	$4000,$0010		; LBA FIRST (DWORD)
+	.DW	$0000,$000C		; LBA COUNT (DWORD)
+PART2:
+	.DB	0			; ACTIVE IF $80
+	.DB	0			; CHS START ADDRESS (HEAD)
+	.DW	0			; CHS START ADDRESS (CYL/SEC)
+	.DB	0			; PART TYPE ID
+	.DB	0			; CHS LAST ADDRESS (HEAD)
+	.DW	0			; CHS LAST ADDRESS (CYL/SEC)
+	.DW	0,0			; LBA FIRST (DWORD)
+	.DW	0,0			; LBA COUNT (DWORD)
+PART3:
+	.DB	0			; ACTIVE IF $80
+	.DB	0			; CHS START ADDRESS (HEAD)
+	.DW	0			; CHS START ADDRESS (CYL/SEC)
+	.DB	0			; PART TYPE ID
+	.DB	0			; CHS LAST ADDRESS (HEAD)
+	.DW	0			; CHS LAST ADDRESS (CYL/SEC)
+	.DW	0,0			; LBA FIRST (DWORD)
+	.DW	0,0			; LBA COUNT (DWORD)
+;
+; THE END OF THE FIRST SECTOR MUST CONTAIN THE TWO BYTE BOOT SIGNATURE.
+;
+BOOTSIG	.DB	$55,$AA			; STANDARD BOOT SIGNATURE
+;
+;-------------------------------------------------------------------------------
+; SECTOR 2
+;
+;   THIS SECTOR HAS NOT BEEN DEFINED AND IS RESERVED.
+;
+;----------------------------------------------------------------------------
+;
+	.FILL	SEC_SIZE,0			; JUST FILL SECTOR WITH ZEROES
+;
+;-------------------------------------------------------------------------------
+; SECTOR 3
+;
+;   OS AND DISK METADATA
+;
+;----------------------------------------------------------------------------
+;
+	.FILL	(BLK_SIZE * 3),0	; FIRST 384 BYTES ARE NOT YET DEFINED
+;
+; THE FOLLOWING TWO BYTES ARE AN ADDITIONAL SIGNATURE THAT IS VERIFIED BY
+; SOME HARDWARE BIOSES.
+;
+PR_SIG		.DB	$5A,$A5		; SIGNATURE GOES HERE
+;
+		.FILL	(META_LOC - $),0
+;
+; METADATA
+;
+PR_WP		.DB	0		; (1) WRITE PROTECT BOOLEAN
+PR_UPDSEQ	.DW	0		; (2) PREFIX UPDATE SEQUENCE NUMBER (DEPRECATED?)
+PR_VER		.DB	RMJ,RMN,RUP,RTP	; (4) OS BUILD VERSION
+PR_LABEL	.DB	"Unlabeled$$$$$$$","$"	; (17) DISK LABEL (EXACTLY 16 BYTES!!!)
+		.DW	0		; (2) DEPRECATED
+PR_LDLOC	.DW	SYS_LOC		; (2) ADDRESS TO START LOADING SYSTEM
+PR_LDEND	.DW	SYS_END		; (2) ADDRESS TO STOP LOADING SYSTEM
+PR_ENTRY	.DW	SYS_ENT		; (2) ADDRESS TO ENTER SYSTEM (OS)
+;
+#IF (META_SIZE != ($ - META_LOC))
+	.ECHO "META_SIZE VALUE IS WRONG!!!\r\n"
+	!!!
+#ENDIF
+;
+#IF ($ != PREFIX_SIZE)
+	.ECHO "LOADER PREFIX IS WRONG SIZE!!!\r\n"
+	!!!
+#ENDIF
+;
+	.END

Source/ver.inc

@@ -2,7 +2,7 @@
 #DEFINE	RMN	3
 #DEFINE	RUP	0
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.3.0-dev.49"
+#DEFINE BIOSVER	"3.3.0-dev.53"
 #define rmj	RMJ
 #define rmn	RMN
 #define rup	RUP

Source/ver.lib

@@ -3,5 +3,5 @@ rmn	equ	3
 rup	equ	0
 rtp	equ	0
 biosver	macro
-	db	"3.3.0-dev.49"
+	db	"3.3.0-dev.53"
 	endm