Issue #366

Based on input from Dean Jenkins:
- Updated User Guide to clarify some nuances related to use of Combo Disk Images
- Added "blank" slice images

ReadMe.md

@@ -3,7 +3,7 @@
 **RomWBW ReadMe** \
 Version 3.3 \
 Wayne Warthen  ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
-14 Sep 2023
+04 Oct 2023
 
 # Overview
 

ReadMe.txt

@@ -1,6 +1,6 @@
 RomWBW ReadMe
 Wayne Warthen (wwarthen@gmail.com)
-14 Sep 2023
+04 Oct 2023
 
 
 

Source/BPBIOS/diskdefs

@@ -310,6 +310,32 @@ diskdef wbw_rom1024
   os 2.2
 end
 
+# RomWBW 512KB RAM (256KB reserved, 256KB RAM Disk)
+
+diskdef wbw_ram512
+  seclen 512
+  tracks 8
+  sectrk 64
+  blocksize 2048
+  maxdir 256
+  skew 0
+  boottrk 0
+  os 2.2
+end
+
+# RomWBW 1024KB RAM (256KB reserved, 768KB RAM Disk)
+
+diskdef wbw_ram1024
+  seclen 512
+  tracks 24
+  sectrk 64
+  blocksize 2048
+  maxdir 256
+  skew 0
+  boottrk 0
+  os 2.2
+end
+
 # RomWBW 720K floppy media
 
 diskdef wbw_fd720

Source/CBIOS/cbios.asm

@@ -2529,24 +2529,21 @@ MD_INIT:
 ; UDPATE THE RAM/ROM DPB STRUCTURES BASED ON HARDWARE
 ;
 #IFDEF PLTWBW
-	; TODO: HANDLE DISABLED RAM/ROM DISK BETTER.
-	; IF RAM OR ROM DISK ARE DISABLED, BELOW WILL STILL
-	; TRY TO ADJUST THE DPB BASED ON RAM BANK CALCULATIONS.
-	; IT SHOULD NOT MATTER BECAUSE THE DPB SHOULD NEVER BE
-	; USED.  IT WOULD BE BETTER TO GET RAMD0/ROMD0 AND
-	; RAMDN/ROMDN FROM THE HCB AND USE THOSE TO CALC THE
-	; DPB ADJUSTMENT.  IF DN-D0=0, BYPASS ADJUSTMENT.
-	LD	A,(HCB + HCB_ROMBANKS)	; ROM BANK COUNT
-	SUB	4		; REDUCE BANK COUNT BY RESERVED PAGES
-	LD	IX,DPB_ROM	; ADDRESS OF DPB
-	CALL	MD_INIT1	; FIX IT UP
+	; NOTE: ROM AND/OR RAM DISK MAY NOT BE ACTIVE, BUT WE GO
+	; AHEAD AND UPDATE BOTH DPBS ANYWAY.  IT CAUSES NO HARM SINCE
+	; INACTIVE RAM/ROM DISK WILL NEVER BE ACCESSED.
 ;
-	LD	A,(HCB + HCB_RAMBANKS)	; RAM BANK COUNT
-	SUB	8		; REDUCE BANK COUNT BY RESERVED PAGES
-	LD	IX,DPB_RAM	; ADDRESS OF DPB
-	CALL	MD_INIT1	; FIX IT UP
+	; ROM DISK
+	LD	A,(HCB + HCB_ROMD_BNKS)	; ROM DISK SIZE IN BANKS
+	LD	IX,DPB_ROM		; ADDRESS OF DPB
+	CALL	MD_INIT1		; FIX IT UP
 ;
-	JR	MD_INIT4	; DONE
+	; RAM DISK
+	LD	A,(HCB + HCB_RAMD_BNKS)	; RAM DISK SIZE IN BANKS
+	LD	IX,DPB_RAM		; ADDRESS OF DPB
+	CALL	MD_INIT1		; FIX IT UP
+;	
+	JR	MD_INIT4		; DONE
 ;
 MD_INIT1:
 ;

Source/CPM3/diskio.z80

@@ -355,38 +355,30 @@ dpb$hdnew:	; 8MB Hard Disk Drive (new format)
 ;		called for first time initialization.
 
 dsk$init:
-	; TODO: Handle disabled RAM/ROM disk better.
-	; If RAM or ROM disk are disabled, below will still
-	; try to adjust the DPB based on RAM bank calculations.
-	; It should not matter because the DPB should never be
-	; used.  It would be better to get RAMD0/ROMD0 and
-	; RAMDN/ROMDN from the HCB and use those to calc the
-	; DPB adjustment.  If DN-D0=0, bypass adjustment.
-	ld	b,0FAh			; HBIOS Peek Function
-	ld	a,(@hbbio)		; HBIOS bank id
-	ld	d,a			; ... goes in D
-	ld	hl,10Ch			; Offset 10Ch is ROM bank cnt
-	rst	08			; Call HBIOS, value in E
-	ld	a,e			; move count to accum
-	sub	4			; reduce by # reserved banks
-	ld	ix,dpb$rom		; address of DPB
-	call	dsk$init1		; fix it up
-	
-	ld	b,0FAh			; HBIOS Peek Function
-	ld	a,(@hbbio)		; HBIOS bank id
-	ld	d,a			; ... goes in D
-	ld	hl,10Bh			; Offset 10Bh is RAM bank cnt
-	rst	08			; Call HBIOS, value in E
-	ld	a,e			; move count to accum
-	sub	8			; reduce by # reserved banks
-	ld	ix,dpb$ram		; address of DPB
-	call	dsk$init1		; fix it up
 
+	; NOTE: ROM and/or RAM disk may not be active, but we go
+	; ahead and update both DPBs anyway.  It causes no harm since
+	; inactive RAM/ROM disk will never be accessed.
+
+	ld	hl,1DFh			; ROM disk bank cnt in HCB
+	ld	ix,dpb$rom		; address of ROM Disk DPB
+	call	dsk$init1		; fix it up
+	ld	hl,1DDh			; RAM dsik bank cnt in HCB
+	ld	ix,dpb$ram		; address of RAM Disk DPB
+	call	dsk$init1		; fix it up
 	ret				; done
 
 dsk$init1:
+	; Get bank count of RAM/ROM disk
+	ld	b,0FAh			; HBIOS Peek Function
+	ld	a,(@hbbio)		; HBIOS bank id
+	ld	d,a			; ... goes in D
+	rst	08			; Call HBIOS, value in E
+	;ld	a,e			; move count to accum
+
 	; Setup HL with bank count
-	ld	l,a			; lsb
+	;ld	l,a			; lsb
+	ld	l,e			; lsb
 	ld	h,0			; msb is always zero
 
 	; Update EXM field

Source/CPM3/genbnk.dat

@@ -8,12 +8,12 @@ MEMTOP   = FD
 BNKSWT   = Y
 COMBAS   = 80
 LERROR   = Y
-NUMSEGS  = 04
+NUMSEGS  = 02
 MEMSEG00 = 01,17,00
 MEMSEG01 = 0E,72,02
 MEMSEG02 = 01,7F,03
-MEMSEG03 = 01,7F,04
-MEMSEG04 = 01,7F,05
+MEMSEG03 = 00,C0,04
+MEMSEG04 = 00,C0,05
 MEMSEG05 = 00,C0,06
 MEMSEG06 = 00,C0,07
 MEMSEG07 = 00,C0,08
@@ -25,38 +25,38 @@ MEMSEG0C = 00,C0,0D
 MEMSEG0D = 00,C0,0E
 MEMSEG0E = 00,C0,0F
 MEMSEG0F = 00,C0,10
-HASHDRVA = Y
-HASHDRVB = Y
-HASHDRVC = Y
-HASHDRVD = Y
-HASHDRVE = Y
-HASHDRVF = Y
-HASHDRVG = Y
-HASHDRVH = Y
-HASHDRVI = Y
-HASHDRVJ = Y
-HASHDRVK = Y
-HASHDRVL = Y
-HASHDRVM = Y
-HASHDRVN = Y
-HASHDRVO = Y
-HASHDRVP = Y
-ALTBNKSA = Y
-ALTBNKSB = Y
-ALTBNKSC = Y
-ALTBNKSD = Y
-ALTBNKSE = Y
-ALTBNKSF = Y
-ALTBNKSG = Y
-ALTBNKSH = Y
-ALTBNKSI = Y
-ALTBNKSJ = Y
-ALTBNKSK = Y
-ALTBNKSL = Y
-ALTBNKSM = Y
-ALTBNKSN = Y
-ALTBNKSO = Y
-ALTBNKSP = Y
+HASHDRVA = N
+HASHDRVB = N
+HASHDRVC = N
+HASHDRVD = N
+HASHDRVE = N
+HASHDRVF = N
+HASHDRVG = N
+HASHDRVH = N
+HASHDRVI = N
+HASHDRVJ = N
+HASHDRVK = N
+HASHDRVL = N
+HASHDRVM = N
+HASHDRVN = N
+HASHDRVO = N
+HASHDRVP = N
+ALTBNKSA = N
+ALTBNKSB = N
+ALTBNKSC = N
+ALTBNKSD = N
+ALTBNKSE = N
+ALTBNKSF = N
+ALTBNKSG = N
+ALTBNKSH = N
+ALTBNKSI = N
+ALTBNKSJ = N
+ALTBNKSK = N
+ALTBNKSL = N
+ALTBNKSM = N
+ALTBNKSN = N
+ALTBNKSO = N
+ALTBNKSP = N
 NDIRRECA = 08
 NDIRRECB = 00
 NDIRRECC = 00

Source/CPM3/genres.dat

@@ -8,7 +8,7 @@ MEMTOP   = FD
 BNKSWT   = N
 COMBAS   = 00
 LERROR   = Y
-NUMSEGS  = 03
+NUMSEGS  = 01
 MEMSEG00 = 00,80,00
 MEMSEG01 = 00,C0,02
 MEMSEG02 = 00,C0,03

Source/CPM3/move.z80

@@ -65,12 +65,11 @@ xbnkmov:
 ; ------------	--------------	-------
 ; COMMON	BID_COM		8Fh
 ; 0: OS/BUFS	BID_USR         8Eh
-;		BID_BIOS	8Dh	
-; 1: TPA	BID_AUX		8Ch
-; 2: BUFS	BID_AUX-1	8Bh
-; 3: BUFS	BID_AUX-2	8Ah
-; 4: BUFS	BID_AUX-3	89h
-; 5: BUFS	BID_AUX-4	88h
+; 1: TPA	BID_AUX		8Dh
+; 2: BUFS	BID_AUX-1	8Ch
+; 3: BUFS	BID_AUX-2	8Bh
+; 4: BUFS	BID_AUX-3	8Ah
+; 5: BUFS	BID_AUX-4	89h
 ;
 ; N.B., Below BID_AUX is considered RAM disk bank.  Need to
 ; make sure RAM disk is kept small enough to stay below
@@ -80,17 +79,13 @@ xbnkmov:
 ; to adjust for real size of RAM in system
 ;
 ?bnkxlt:
-	or	a
-	jr	z,bank0
-	neg			; 2 -> -2
-	add	a,8Dh		; 8Dh - 2 = 8Bh
-@hbbio	equ	$ - 1		; BID_BIOS
-	ret
-bank0:
-	ld	a,8Eh		; 0 -> 8Eh
+	neg			; ex: 2 -> -2
+	add	a,8Eh		; ex: 8Eh - 2 = 8Ch
 @hbusr	equ	$ - 1		; BID_USR
 	ret
-	
+
+@hbbio	db	0		; BID_BIOS
+
 movtyp	db	0		; non-zero for interbank move
 
 movbnks:

Source/Doc/UserGuide.md

@@ -1537,7 +1537,46 @@ indicated:
 You will notice that there are actually 2 combo disk images in the 
 distribution.  One for an hd512 disk layout (hd512_combo.img) and one 
 for an hd1k disk layout (hd1k_combo.img). Simply use the image file that
-corresponds to your desired hard disk layout.
+corresponds to your desired hard disk layout.  Review the information
+in [Hard Disk Layouts] if you need more information of the disk layout
+options.
+
+The partition table in the combo disk images includes an entry for a
+FAT filesystem starting at 512K with a size of 384K.  So when using
+the combo disk image, by default, your disk will have the first 512K
+dedicated to CP/M slices followed by 384K for a FAT filesystem.  Note
+that the pre-allocated FAT partition must still be formatted using
+`FDISK32` in order to actually use it
+(see [FAT Filesystem Preparation]).
+
+The combo disk image layout was designed to fit well on a 1GB hard
+disk.  The 512K of CP/M slices and 384K of FAT filesystem all fit inside
+a 1GB hard disk.  This size choice was a bit arbitrary, but based on the
+idea that a 1GB CF or SD Card is easy and cheap to acquire.  It is fine
+if your hard disk is smaller than 1GB.  It just means that it will not
+be possible to use the pre-allocated FAT filesystem partition (you will
+get I/O errors if you attempt to do so).
+
+The 512KB area of the combo disk image set aside for slices can contain
+approximately 64 slices (8MB per slice).  If your actual hard disk is
+less than 512KB, then this will correspondingly reduce the number of
+possible slices.  If your hard disk is smaller than 64MB, then you
+will find that some of the higher drive letters do not work because
+they exist "off the end" of the hard disk.
+
+For RomWBW systems with a single hard disk (typical), you will notice 
+that an OS will pre-allocate 8 drive letters to the hard disk.  If the 
+combo disk image is being used, only the first 6 drive letters (A: - H:)
+will have any content because the combo disk image only provides 6 
+slices. The subsequent drives (I: - J:) will have no content and will 
+not be pre-initialized.  If you want to use any slices beyond the first 
+6, you must initialize them using `CLRDIR` first.
+
+A great way to maintain your own data on a hard disk is to put this
+data in slices beyond the first 6.  By doing so, you can always
+"reimage" your drive with the combo image without overlaying the data
+stored in the slices beyond the first 6.  Just be very careful to use
+the same combo image (hd512 or hd1k) as you used originally.
 
 #### Custom Hard Disk Image
 

Source/HBIOS/Bank Layout.txt

@@ -0,0 +1,74 @@
+ROM Bank Layout
+
+Bank ID		Module		Start	Size
+------		------		------	------
+0x00		hbios		0x0000	0x8000
+		<end>		0x8000
+
+0x01		loader		0x0000	0x1000
+		dbgmon		0x1000	0x2000
+		cpm22		0x2000	0x3000
+		zsys		0x5000	0x3000
+		<end>		0x8000
+
+0x02		forth		0x0000	0x1700
+		basic		0x1700	0x2000
+		tbasic		0x3700	0x0900
+		game		0x4000	0x0900
+		egg		0x4900	0x0200
+		netboot         0x4B00	0x1000
+		updater         0x5B00	0x0D00
+		usrrom		0x6800	0x1800
+		<end>		0x8000
+
+0x03		imgpad2		0x0000	0x8000
+		<end>		0x8000
+
+0x04 - N	ROM Disk Data
+
+
+RAM Bank Layout
+
+Bank ID         Usage
+-------         ------
+0x80            RomWBW HBIOS
+0x81-0x8B       RAM Disk Data
+0x8C		CP/M 3 Buffers
+0x8D            CP/M 3 OS
+0x8E            User TPA
+0x8F            Common
+
+
+ROMless Bank Layout
+
+Bank ID         Usage
+-------         ------
+0x80            RomWBW HBIOS
+0x81		Loader, DbgMon, CP/M 2.2, ZSDOS
+0x82		ROM Apps
+0x83		More ROM Apps
+0x84-0x8B       RAM Disk Data
+0x8C		CP/M 3 Buffers
+0x8D            CP/M 3 OS
+0x8E            User TPA
+0x8F            Common
+
+
+ROMless Tiny Bank Layout (128K)
+NOTE: no ROM Apps, no CP/M 3 support, no RAM disk
+
+Bank ID         Usage
+-------         ------
+0x80            RomWBW HBIOS
+0x81		Loader, DbgMon, CP/M 2.2, ZSDOS
+0x82            User TPA
+0x83            Common
+
+Disk Image Sizes
+
+Image Size	ROM System	ROMless System
+----------	----------	--------------
+1024K		896K		768K
+512		384K		256K
+256		128K		0K
+128 (tiny)	n/a		0K

Source/HBIOS/Build.cmd

@@ -110,10 +110,8 @@ copy /b romldr.bin + dbgmon.bin + ..\zsdos\zsys_wbw.bin osimg_small.bin || exit
 :: should yield a result of zero.
 ::
 
-if %ROMSize% gtr 0 (
-    for %%f in (hbios_rom.bin osimg.bin osimg1.bin osimg2.bin) do (
-      "%TOOLS%\srecord\srec_cat.exe" %%f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o %%f -Binary || exit /b
-    )
+for %%f in (hbios_rom.bin osimg.bin osimg1.bin osimg2.bin) do (
+  "%TOOLS%\srecord\srec_cat.exe" %%f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o %%f -Binary || exit /b
 )
 
 ::
@@ -137,8 +135,8 @@ if %ROMSize% gtr 0 (
     copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin %ROMName%.upd || exit /b
     copy /b hbios_app.bin + osimg_small.bin %ROMName%.com || exit /b
 ) else (
-    copy /b hbios_rom.bin + osimg_small.bin %ROMName%.rom || exit /b
-    copy /b hbios_rom.bin + osimg_small.bin %ROMName%.upd || exit /b
+    copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin  + ..\RomDsk\ram%ROMSize%_wbw.dat %ROMName%.rom || exit /b
+    copy /b hbios_rom.bin + osimg.bin + osimg1.bin + osimg2.bin %ROMName%.upd || exit /b
     copy /b hbios_app.bin + osimg_small.bin %ROMName%.com || exit /b
 )
 
@@ -222,6 +220,7 @@ call Build RCZ280 ext || exit /b
 call Build RCZ280 nat || exit /b
 call Build RCZ280 zz80mb || exit /b
 call Build RCZ280 zzrc || exit /b
+call Build RCZ280 zzrc_ram || exit /b
 call Build SCZ180 sc126 || exit /b
 call Build SCZ180 sc130 || exit /b
 call Build SCZ180 sc131 || exit /b

Source/HBIOS/Build.sh

@@ -19,6 +19,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
 	ROM_PLATFORM="RCZ280"; ROM_CONFIG="nat"; bash Build.sh
 	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zz80mb"; bash Build.sh
 	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrc"; bash Build.sh
+	ROM_PLATFORM="RCZ280"; ROM_CONFIG="zzrc_ram"; bash Build.sh
 #	ROM_PLATFORM="RCZ80"; ROM_CONFIG="mt"; bash Build.sh
 #	ROM_PLATFORM="RCZ80"; ROM_CONFIG="duart"; bash Build.sh
 	ROM_PLATFORM="RCZ80"; ROM_CONFIG="std"; bash Build.sh

Source/HBIOS/Config/RCZ280_zz80mb.asm

@@ -37,8 +37,7 @@ FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 ;
 MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 ;
-RAMLOC		.SET	23		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.SET	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.SET	8192		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 ;
 Z280_MEMLOWAIT	.SET	0		; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
 Z280_MEMHIWAIT	.SET	0		; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)

Source/HBIOS/Config/RCZ280_zzrc.asm

@@ -39,10 +39,7 @@ MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
 ;
 RAMSIZE		.SET	256		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	256		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.SET	256		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
-;
-RAMLOC		.SET	18		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.SET	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.SET	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 ;
 Z280_MEMLOWAIT	.SET	0		; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
 Z280_MEMHIWAIT	.SET	0		; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)

Source/HBIOS/Config/RCZ280_zzrc_ram.asm

@@ -0,0 +1,77 @@
+;
+;==================================================================================================
+;   RCBUS Z280 STANDARD CONFIGURATION (NATIVE Z280 MMU W/ LINEAR MEMORY ON ZZRC)
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#DEFINE PLATFORM_NAME "ZZRC", " [", CONFIG, "]"
+;
+#DEFINE	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_rcz280.asm"
+;
+CPUOSC		.SET	14745600	; CPU OSC FREQ IN MHZ
+INTMODE		.SET	3		; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2
+CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
+;
+FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
+FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
+;
+MEMMGR		.SET	MM_Z280		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280]
+;
+RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAMBIAS		.SET	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+;
+Z280_MEMLOWAIT	.SET	0		; Z280: LOW 8MB MEMORY WAIT STATES (0-3)
+Z280_MEMHIWAIT	.SET	0		; Z280: HIGH 8MB MEMORY WAIT STATES (0-3)
+Z280_IOWAIT	.SET	1		; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+Z280_INTWAIT	.SET	0		; Z280: INT ACK WAIT STATUS (0-3)
+;
+MDROM		.SET	FALSE		; MD: ENABLE ROM DISK
+MDRAM		.SET	TRUE		; MD: ENABLE RAM DISK
+;
+Z2UENABLE	.SET	TRUE		; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
+Z2UOSC		.SET	(CPUOSC / 8)	; Z2U: OSC FREQUENCY IN MHZ
+Z2U0HFC		.SET	TRUE		; Z2U0: ENABLE HARDWARE FLOW CONTROL
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ACIAENABLE	.SET	FALSE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+TMSENABLE	.SET	FALSE		; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
+TMSMODE		.SET	TMSMODE_MSX	; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MBC|MSX|MSX9958|MSXKBD|COLECO]
+MKYENABLE	.SET	FALSE		; MSX 5255 PPI KEYBOARD COMPATIBLE DRIVER (REQUIRES TMS VDA DRIVER)
+VRCENABLE	.SET	TRUE		; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
+VDAEMU_SERKBD	.SET	$FF		; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
+;
+AY38910ENABLE	.SET	FALSE		; AY: AY-3-8910 / YM2149 SOUND DRIVER
+AYMODE		.SET	AYMODE_RCZ80	; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC]
+SN76489ENABLE	.SET	FALSE		; SN: ENABLE SN76489 SOUND DRIVER
+;
+FDENABLE	.SET	TRUE		; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
+FDMODE		.SET	FDMODE_RCWDC	; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC]
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
+SDENABLE	.SET	FALSE		; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
+SDCNT		.SET	1		; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT SC ONLY
+;
+PRPENABLE	.SET	FALSE		; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)

Source/HBIOS/Config/RCZ80_zrc_ram.asm

@@ -34,7 +34,7 @@ CRTACT		.SET	FALSE		; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
 FPLED_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL LEDS
 FPSW_ENABLE	.SET	TRUE		; FP: ENABLES FRONT PANEL SWITCHES
 ;
-RAMSIZE		.SET	2048		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
+RAMSIZE		.SET	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.SET	0		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
 MEMMGR		.SET	MM_ZRC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180]
 ;

Source/HBIOS/Makefile

@@ -67,11 +67,9 @@ $(OBJECTS) : $(ROMDEPS)
 		else \
 			cat imgpad2.bin >osimg2.bin ; \
 		fi ; \
-		if [ $(ROMSIZE) -gt 0 ] ; then \
-			for f in hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ; do \
-				srec_cat $$f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $$f -Binary ; \
-			done \
-		fi \
+		for f in hbios_rom.bin osimg.bin osimg1.bin osimg2.bin ; do \
+			srec_cat $$f -Binary -Crop 0 0x7FFF -Checksum_Negative_Big_Endian 0x7FFF 1 1 -o $$f -Binary ; \
+		done \
 	fi
 	if [ $(ROM_PLATFORM) = UNA ] ; then \
 		cp osimg.bin $(DEST)/UNA_WBW_SYS.bin ; \
@@ -83,8 +81,8 @@ $(OBJECTS) : $(ROMDEPS)
 			cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).upd ; \
 			cat hbios_app.bin osimg_small.bin > $(ROMNAME).com ; \
 		else \
-			cat hbios_rom.bin osimg_small.bin > $(ROMNAME).rom ; \
-			cat hbios_rom.bin osimg_small.bin > $(ROMNAME).upd ; \
+			cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).rom ; \
+			cat hbios_rom.bin osimg.bin osimg1.bin osimg2.bin >$(ROMNAME).upd ; \
 			cat hbios_app.bin osimg_small.bin > $(ROMNAME).com ; \
 		fi \
 	fi

Source/HBIOS/ROM Layout.txt

@@ -1,39 +0,0 @@
-RomWBW ROM Layout
-
-Bank		Module		Start	Size
-------		------		------	------		
-0		hbios		0x0000	0x8000
-		<end>		0x8000
-
-1		loader		0x0000	0x1000
-		dbgmon		0x1000	0x2000
-		cpm22		0x2000	0x3000
-		zsys		0x5000	0x3000
-		<end>		0x8000        
-
-2		forth		0x0000	0x1700
-		basic		0x1700	0x2000
-		tbasic		0x3700	0x0900
-		game		0x4000	0x0900
-		egg		0x4900	0x0200
-		netboot         0x4B00	0x1000
-		updater         0x5B00	0x0D00
-		usrrom		0x6800	0x1800
-		<end>		0x8000
-
-3		imgpad2		0x0000	0x8000
-		<end>		0x8000
-
-4 - N		ROM Disk Data
-
-
-RomWBW RAM Layout
-
-Bank ID         Usage                   Physical Address
--------         ------                  ----------------
-0x80-0x87       RAM Disk Data           0x80000-0xBFFFF
-0x88-0x8B       CP/M 3 Buffers          0xC0000-0xDFFFF
-0x8C            CP/M 3 OS               0xE0000-0xE7FFF
-0x8D            RomWBW HBIOS            0xE8000-0xEFFFF
-0x8E            User TPA                0xF0000-0xF7FFF
-0x8F            Common                  0xF8000-0xFFFFF

Source/HBIOS/cfg_duo.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$50		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$51		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_dyno.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_heath.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_master.asm

@@ -31,10 +31,8 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_NONE		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_mbc.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_MBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_mk4.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 ;
 Z180_BASE	.EQU	$40		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
 Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2

Source/HBIOS/cfg_n8.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_N8		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
-RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 ;
 Z180_BASE	.EQU	$40		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
 Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2

Source/HBIOS/cfg_rcz180.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_rcz280.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_rcz80.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_rph.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_RPH		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 RAMBIAS		.EQU	0		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
-RAMLOC		.EQU	0		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
 ;
 Z180_BASE	.EQU	$40		; Z180: I/O BASE ADDRESS FOR INTERNAL REGISTERS
 Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2

Source/HBIOS/cfg_s100.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_57600_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_sbc.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_scz180.asm

@@ -34,10 +34,8 @@ DEFSERCFG	.EQU	SER_115200_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z180		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
-RAMLOC		.EQU	19		; START OF RAM AS POWER OF 2 (2^N) IN PHYSICAL ADDRESS SPACE
-RAMBIAS		.EQU	(1 << (RAMLOC - 10))	; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
+RAMBIAS		.EQU	ROMSIZE		; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_2	.EQU	$7A		; Z2 MEM MGR BANK 2 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_z80retro.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$60		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$61		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_zeta.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_SBC		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPCL_RAM	.EQU	$78		; SBC MEM MGR RAM PAGE SELECT REG (WRITE ONLY)
 MPCL_ROM	.EQU	$7C		; SBC MEM MGR ROM PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/cfg_zeta2.asm

@@ -34,7 +34,6 @@ DEFSERCFG	.EQU	SER_38400_8N1	; DEFAULT SERIAL LINE CONFIG (SEE STD.ASM)
 ;
 RAMSIZE		.EQU	512		; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
 ROMSIZE		.EQU	512		; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
-ROMSIZE_CHK	.EQU	0		; ROMSIZE VALUE VERIFICATION (0=DISABLED)
 MEMMGR		.EQU	MM_Z2		; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH]
 MPGSEL_0	.EQU	$78		; Z2 MEM MGR BANK 0 PAGE SELECT REG (WRITE ONLY)
 MPGSEL_1	.EQU	$79		; Z2 MEM MGR BANK 1 PAGE SELECT REG (WRITE ONLY)

Source/HBIOS/ch.asm

@@ -9,7 +9,7 @@
 ; his code in FUZIX (https://github.com/EtchedPixels/FUZIX).
 ;
 ; NOTES:
-;  - There seem to compatibility issues with older USB thumb drives.
+;  - There seem to be compatibility issues with older USB thumb drives.
 ;    Such drives will complete DISK_INIT successfully, but then return
 ;    an error attempting to do any I/O.  The error is $17 indicating
 ;    the CH37x encountered an overflow during communication with the
@@ -17,17 +17,10 @@
 ;    on CH376) resolved the issue for some devices, so that has been
 ;    added to the RESET routine when using CH376.
 ;
-;  - The CH37x can get in an inconsistent state.  The RESET_ALL command
-;    will clear this, but the RESET_ALL command is very problematic on
-;    the CH376.  On the CH376, the hardware reset takes a very long
-;    time (much longer than the documentation suggests).  It seems to
-;    work find on the CH375, but since you don't know what chip you
-;    are dealing with at that point, I have given up on using it.
-;
 ; TODO:
 ;  - Implement auto-recovery on error status.
 ;
-CHUSB_FASTIO	.EQU	FALSE		; USE INIR/OTIR?
+CHUSB_FASTIO	.EQU	TRUE		; USE INIR/OTIR?
 ;
 ; PORT OFFSETS FROM BASE PORT
 ;
@@ -45,8 +38,12 @@ CHTYP_376	.EQU	2		; CH376
 CH_CMD_VER	.EQU	$01		; GET IC VER
 CH_CMD_RESET	.EQU	$05		; FULL CH37X RESET
 CH_CMD_EXIST	.EQU	$06		; CHECK EXISTS
+CH_CMD_MAXLUN	.EQU	$0A		; GET MAX LUN NUMBER
 CH_CMD_PKTSEC	.EQU	$0B		; SET PACKETS PER SECTOR
+CH_CMD_SETRETRY	.EQU	$0B		; SET RETRIES
 CH_CMD_MODE	.EQU	$15		; SET USB MODE
+CH_CMD_TSTCON	.EQU	$16		; TEST CONNECT
+CH_CMD_ABRTNAK	.EQU	$17		; ABORT DEVICE NAK RETRIES
 CH_CMD_STAT	.EQU	$22		; GET STATUS
 CH_CMD_RD6	.EQU	$27		; READ USB DATA (375 & 376)
 CH_CMD_RD5	.EQU	$28		; READ USB DATA (375)
@@ -56,6 +53,7 @@ CH_CMD_DSKMNT	.EQU	$31		; DISK MOUNT
 CH_CMD_DSKCAP	.EQU	$3E		; DISK CAPACITY
 CH_CMD_AUTOSET	.EQU	$4D		; USB AUTO SETUP
 CH_CMD_DSKINIT	.EQU	$51		; DISK INIT
+CH_CMD_DSKRES	.EQU	$52		; DISK RESET
 CH_CMD_DSKSIZ	.EQU	$53		; DISK SIZE
 CH_CMD_DSKRD	.EQU	$54		; DISK READ
 CH_CMD_DSKRDGO	.EQU	$55		; CONTINUE DISK READ
@@ -132,7 +130,7 @@ CH_INIT2:
 	CALL	PRTHEXBYTE		; DISPLAY IT
 ;
 	;CALL	CH_FLUSH		; FLUSH DEVICE OUTPUT QUEUE
-	;CALL	CH_RESET		; FULL CH37X RESET
+	CALL	CH_RESET		; FULL CH37X RESET
 	CALL	CH_DETECT		; DETECT CHIP PRESENCE
 	JR	Z,CH_INIT3		; GO AHEAD IF CHIP FOUND
 	LD	DE,CH_STR_NOHW		; NOT PRESENT
@@ -226,18 +224,18 @@ CH_WR:
 ; SMALL DELAY REQUIRED AT STRATEGIC LOCATIONS
 ;
 CH_NAP:
-	;CALL	DELAY			; *DEBUG*
-	;CALL	DELAY			; *DEBUG*
-	;CALL	DELAY			; *DEBUG*
 	JP	DELAY
 ;
 ; POLL WAITING FOR INTERRUPT
 ;
 CH_POLL:
+	PUSH	BC			; SAVE BC
 	PUSH	HL			; SAVE HL
 	CALL	CH_NAP			; SMALL DELAY
-	LD	HL,$8000		; POLL LOOP COUNTER
-	LD	HL,0			; *DEBUG*
+	LD	A,(CB_CPUMHZ)		; USE CPU SPEED AS CPU
+	LD	B,A			; ... SPEED COMP COUNTER
+CH_POLL0:
+	LD	HL,$8000		; PRIMARY LOOP COUNTER
 CH_POLL1:
 	CALL	CH_STAT			; GET INT STATUS
 	BIT	7,A			; CHECK BIT
@@ -245,9 +243,10 @@ CH_POLL1:
 	DEC	HL			; DECREMENT COUNTER
 	LD	A,H			; CHECK
 	OR	L			; ... LOOP COUNTER
-	JR	NZ,CH_POLL1		; LOOP AS NEEDED
-	;CALL	PC_ASTERISK		; *DEBUG*
+	JR	NZ,CH_POLL1		; INNER LOOP AS NEEDED
+	DJNZ	CH_POLL0		; OUTER LOOP AS NEEDED
 	POP	HL			; RESTORE HL
+	POP	BC			; RESTORE BC
 	OR	$FF			; FLAG TIMEOUT
 	RET				; AND RETURN
 CH_POLL2:
@@ -255,7 +254,15 @@ CH_POLL2:
 	CALL	CH_CMD			; SEND IT
 	CALL	CH_NAP			; SMALL DELAY
 	CALL	CH_RD			; GET RESULT
+	;PUSH	AF			; *DEBUG*
+	;LD	A,B			; *DEBUG*
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PC_LBKT			; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+	;CALL	PC_RBKT			; *DEBUG*
+	;POP	AF			; *DEBUG*
 	POP	HL			; RESTORE HL
+	POP	BC			; RESTORE BC
 	RET				; AND RETURN
 ;
 ; SEND READ USB DATA COMMAND
@@ -294,17 +301,12 @@ CH_CMD_WR1:
 ;
 ; PERFORM A FULL HARDWARE RESET ON CH37X
 ;
-; WARNING: CH376 CAN TAKE A VERY LONG TIME TO PROCESS THIS
-; COMMAND.  PROBABLY DON'T WANT TO USE THIS.
-;
 CH_RESET:
 	;PRTS("\r\nHW RESET:$")		; *DEBUG*
 	PUSH	DE
 	LD	A,CH_CMD_RESET
 	CALL	CH_CMD
-	; DOC SAYS 40MS, BUT I FOUND THAT TO BE INSUFFICIENT
-	;LD	DE,2500			; 16US * 2500 = 40MS
-	LD	DE,10000		; 16US * 10000 = 160MS
+	LD	DE,2500			; 16US * 2500 = 40MS
 	CALL	VDELAY
 	;CALL	CH_RD			; *DEBUG*
 	;CALL	PC_SPACE		; *DEBUG*
@@ -324,7 +326,7 @@ CH_FLUSH1:
 ;
 ;
 CH_DETECT:
-	PRTS("\r\nDETECT:$")		; *DEBUG*
+	;PRTS("\r\nDETECT:$")		; *DEBUG*
 CH_DETECT1:
 	LD	A,CH_CMD_EXIST		; LOAD COMMAND
 	CALL	CH_CMD			; SEND COMMAND
@@ -658,20 +660,33 @@ CHUSB_RESET:
 	; INITIALIZE DISK
 	LD	B,24			; TRY A FEW TIMES
 CHUSB_RESET1:
+	;PRTS("\n\rDSKINIT:$")		; *DEBUG*
 	LD	A,CH_CMD_DSKINIT	; DISK INIT COMMAND
 	CALL	CH_CMD			; SEND IT
-	LD	DE,10000		; 10000 * 16 = 160MS ???
+	LD	DE,10000		; 10000 * 16 = 160US ???
+	LD	DE,20000		; 10000 * 16 = 160US ???
+	LD	DE,12500		; 1250 * 16 = 200US ???
 	CALL	VDELAY			; DELAY
 	CALL	CH_POLL			; WAIT FOR RESULT
 	;CALL	PC_SPACE		; *DEBUG*
 	;CALL	PRTHEXBYTE		; *DEBUG*
 	CP	$14			; SUCCESS?
-	JR	Z,CHUSB_RESET2		; IF SO, MOVE ON
+	JR	Z,CHUSB_RESET2		; IF SO, CONTINUE
+	;JR	Z,CHUSB_RESET1A		; IF SO, CHECK READY
 	CP	$16			; NO MEDIA
 	JP	Z,CHUSB_NOMEDIA		; HANDLE IT
 	CALL	CH_NAP			; SMALL DELAY
 	DJNZ	CHUSB_RESET1		; LOOP AS NEEDED
 	JP	CHUSB_TO		; HANDLE TIMEOUT
+;;;;
+;;;CHUSB_RESET1A:
+;;;	CALL	CHUSB_DSKRES		; DISK RESET
+;;;	CP	$14			; GOOD?
+;;;	JR	Z,CHUSB_RESET2
+;;;	CALL	CHUSB_DSKRDY		; CHECK IF DISK READY
+;;;	CP	$14			; GOOD?
+;;;	JR	Z,CHUSB_RESET2		; IF SO, MOVE ON
+;;;	DJNZ	CHUSB_RESET1		; KEEP TRYING
 ;
 CHUSB_RESET2:
 	; USE OF CH376 DISK_MOUNT COMMAND SEEMS TO IMPROVE
@@ -680,95 +695,13 @@ CHUSB_RESET2:
 	CP	CHTYP_376		; IS CH376?
 	CALL	Z,CHUSB_DSKMNT		; IF SO, ISSUE MOUNT
 	;CALL	CHUSB_AUTOSET		; *DEBUG*
-;
-	; GET AND STORE DISK CAPACITY
-	;JP	CHUSB_RESET2D		; *DEBUG*
-	;LD	A,(IY+CH_TYPE)		; GET DEVICE TYPE
-	;CP	CHTYP_375
-	;JR	CHUSB_RESET2A
-	;CP	CHTYP_376
-	;JR	CHUSB_RESET2B
-	;JP	CHUSB_CMDERR
-;
-CHUSB_RESET2A:
-	; CH375 DISK SIZE
-	LD	A,CH_CMD_DSKSIZ		; DISK SIZE COMMAND
-	CALL	CH_CMD			; SEND IT
-	CALL	CH_POLL			; WAIT FOR RESULT
-	;CALL	PC_SPACE		; *DEBUG*
-	;CALL	PRTHEXBYTE		; *DEBUG*
-	CP	$14			; SUCCESS?
-	;JP	NZ,CHUSB_CMDERR		; HANDLE CMD ERROR
-	JR	NZ,CHUSB_RESET2D	; FAKE THE CAPACITY
-	CALL	CH_CMD_RD		; SEND READ USB DATA CMD
-	CALL	CH_RD			; GET RD DATA LEN
-	;CALL	PC_SPACE		; *DEBUG*
-	;CALL	PRTHEXBYTE		; *DEBUG*
-	CP	$08			; MAKE SURE IT IS 8
-	JP	NZ,CHUSB_CMDERR		; HANDLE CMD ERROR
-	LD	A,CHUSB_MEDCAP		; MEDIA CAPACITY OFFSET
-	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
-	PUSH	HL			; SAVE ADDRESS
-	CALL	CH_RD
-	LD	D,A
-	CALL	CH_RD
-	LD	E,A
-	CALL	CH_RD
-	LD	H,A
-	CALL	CH_RD
-	LD	L,A
-	CALL	CH_RD
-	CALL	CH_RD
-	CALL	CH_RD
-	CALL	CH_RD
-	POP	BC			; RECOVER ADDRESS TO BC
-	CALL	ST32			; STORE IT
-	CALL	CH_FLUSH		; DISCARD REMAINING CHARS
-	JR	CHUSB_RESET3		; CONTINUE
-;
-CHUSB_RESET2B:
-	; CH376 DISK CAPACITY
-	LD	A,CH_CMD_DSKCAP		; DISK CAPACITY COMMAND
-	CALL	CH_CMD			; SEND IT
-	CALL	CH_POLL			; WAIT FOR RESULT
-	;CALL	PC_SPACE		; *DEBUG*
-	;CALL	PRTHEXBYTE		; *DEBUG*
-	CP	$14			; SUCCESS?
-	;JP	NZ,CHUSB_CMDERR		; HANDLE CMD ERROR
-	JR	NZ,CHUSB_RESET2D	; FAKE THE CAPACITY
-	CALL	CH_CMD_RD		; SEND USB READ DATA
-	CALL	CH_RD			; GET RD DATA LEN
-	;CALL	PC_SPACE		; *DEBUG*
-	;CALL	PRTHEXBYTE		; *DEBUG*
-	CP	$04			; MAKE SURE IT IS 8
-	JP	NZ,CHUSB_CMDERR		; HANDLE CMD ERROR
-	LD	A,CHUSB_MEDCAP		; MEDIA CAPACITY OFFSET
-	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
-	CALL	CH_RD
-	LD	B,4			; 4 BYTES
-CHUSB_RESET2C:
-	LD	(HL),A
-	INC	HL
-	CALL	CH_RD
-	DJNZ	CHUSB_RESET2C
-	JR	CHUSB_RESET3		; CONTINUE
-;
-CHUSB_RESET2D:
-	; OLDER USB STICKS SEEM TO FAIL (PRIMARILY ON CH375).
-	; FAILURE TO GET A DISK CAPACITY SHOULD NOT PREVENT THE
-	; USE OF THE DISK.  SO, WE PUNT, AND JUST PLUG IN 1GB.
-	LD	A,CHUSB_MEDCAP		; MEDIA CAPACITY OFFSET
-	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
-	PUSH	HL			; SAVE POINTER
-	LD	DE,$0020		; 1GB IS $20000 SECTORS
-	LD	HL,$0000
-	POP	BC			; RECOVER POINTER
-	CALL	ST32			; SAVE FAKE CAPACITY
-	; FALL THRU
-;
-CHUSB_RESET3:
+	;CALL	CHUSB_TSTCON		; *DEBUG*
+	;CALL	CHUSB_MAXLUN		; *DEBUG*
 	;CALL	CHUSB_DSKRDY		; *DEBUG*
 	;CALL	CHUSB_DSKINQ		; *DEBUG*
+;;
+	CALL	CHUSB_DSKSIZ		; GET AND RECORD DISK SIZE
+	RET	NZ			; ABORT ON ERROR
 ;
 	; SET STATUS AND RETURN
 	XOR	A			; CLEAR STATUS
@@ -847,6 +780,80 @@ CHUSB_GEOM:
 ; CH37X HELPER ROUTINES
 ;
 ;
+; PERFORM DISK MOUNT
+;
+CHUSB_DSKMNT:
+	;PRTS("\n\rMOUNT:$")		; *DEBUG*
+	LD	A,CH_CMD_DSKMNT		; DISK QUERY
+	CALL	CH_CMD			; DO IT
+	CALL	CH_POLL			; WAIT FOR RESPONSE
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+	CP	$14			; SUCCESS?
+	RET	NZ			; ABORT IF NOT
+	CALL	CH_CMD_RD		; SEND READ COMMAND
+	CALL	CH_RD			; GET LENGTH
+	LD	B,A			; LOOP COUNTER
+	LD	HL,HB_WRKBUF		; USE WORK BUFFER FOR DATA
+DSKMNT1:
+	CALL	CH_RD			; GET A BYTE
+	LD	(HL),A			; SAVE IT
+	INC	HL			; BUMP BUF PTR
+	DJNZ	DSKMNT1			; LOOP FOR ALL DATA
+;
+	;LD	DE,HB_WRKBUF		; *DEBUG*
+	;CALL	DUMP_BUFFER		; *DEBUG*
+;
+	;CALL	CHUSB_PRTPREFIX		; PRINT DEVICE PREFIX
+	;LD	HL,HB_WRKBUF + 8
+	;LD	B,28
+DSKMNT2:
+	;LD	A,(HL)
+	;INC	HL
+	;CALL	COUT
+	;DJNZ	DSKMNT2
+;
+	RET
+;
+; PERFORM DISK SIZE
+;
+CHUSB_DSKSIZ:
+	;PRTS("\n\rDSKSIZ:$")		; *DEBUG*
+	LD	A,CH_CMD_DSKSIZ		; DISK SIZE COMMAND
+	CALL	CH_CMD			; SEND IT
+	CALL	CH_POLL			; WAIT FOR RESULT
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+	CP	$14			; SUCCESS?
+	JP	NZ,CHUSB_CMDERR		; HANDLE CMD ERROR
+	CALL	CH_CMD_RD		; SEND READ USB DATA CMD
+	CALL	CH_RD			; GET RD DATA LEN
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+	CP	$08			; MAKE SURE IT IS 8
+	JP	NZ,CHUSB_CMDERR		; HANDLE CMD ERROR
+	LD	A,CHUSB_MEDCAP		; MEDIA CAPACITY OFFSET
+	CALL	LDHLIYA			; HL := IY + A, REG A TRASHED
+	PUSH	HL			; SAVE ADDRESS
+	CALL	CH_RD
+	LD	D,A
+	CALL	CH_RD
+	LD	E,A
+	CALL	CH_RD
+	LD	H,A
+	CALL	CH_RD
+	LD	L,A
+	CALL	CH_RD
+	CALL	CH_RD
+	CALL	CH_RD
+	CALL	CH_RD
+	POP	BC			; RECOVER ADDRESS TO BC
+	CALL	ST32			; STORE IT
+	XOR	A			; SIGNAL SUCCESS
+	RET				; AND DONE
+;
+#IF FALSE
+;
 ; PERFORM DISK INQUIRY
 ; BASICALLY THE SCSI INQUIRY COMMAND
 ;
@@ -883,50 +890,48 @@ DSKINQ2:
 ;
 	RET
 ;
-; PERFORM DISK MOUNT
+; PERFORM SET RETRIES
 ;
-CHUSB_DSKMNT:
-	;PRTS("\n\rMOUNT:$")		; *DEBUG*
-	LD	A,CH_CMD_DSKMNT		; DISK QUERY
+CHUSB_SETRETRY:
+	;PRTS("\n\rSETRETRY:$")		; *DEBUG*
+	LD	A,CH_CMD_SETRETRY	; DISK READY
+	CALL	CH_CMD			; DO IT
+	CALL	CH_NAP
+	LD	A,$25			; CONSTANT
+	CALL	CH_WR			; SEND IT
+	CALL	CH_NAP
+	LD	A,$BF			; MAX
+	CALL	CH_WR
+	CALL	CH_NAP
+	CALL	CH_RD			; GET RESULT
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+;
+	RET
+;
+; PERFORM DISK RESET
+;
+CHUSB_DSKRES:
+	;PRTS("\n\rDSKRES:$")		; *DEBUG*
+	LD	A,CH_CMD_DSKRES		; DISK READY
 	CALL	CH_CMD			; DO IT
 	CALL	CH_POLL			; WAIT FOR RESPONSE
 	;CALL	PC_SPACE		; *DEBUG*
 	;CALL	PRTHEXBYTE		; *DEBUG*
-	CP	$14			; SUCCESS?
-	RET	NZ			; ABORT IF NOT
-	CALL	CH_CMD_RD		; SEND READ COMMAND
-	CALL	CH_RD			; GET LENGTH
-	LD	B,A			; LOOP COUNTER
-	LD	HL,HB_WRKBUF		; USE WORK BUFFER FOR DATA
-DSKMNT1:
-	CALL	CH_RD			; GET A BYTE
-	LD	(HL),A			; SAVE IT
-	INC	HL			; BUMP BUF PTR
-	DJNZ	DSKMNT1			; LOOP FOR ALL DATA
-;
-	;LD	DE,HB_WRKBUF		; *DEBUG*
-	;CALL	DUMP_BUFFER		; *DEBUG*
-;
-	;CALL	CHUSB_PRTPREFIX		; PRINT DEVICE PREFIX
-	;LD	HL,HB_WRKBUF + 8
-	;LD	B,28
-DSKMNT2:
-	;LD	A,(HL)
-	;INC	HL
-	;CALL	COUT
-	;DJNZ	DSKMNT2
 ;
 	RET
 ;
 ; PERFORM DISK READY
 ;
 CHUSB_DSKRDY:
-	;PRTS("\n\rREADY:$")		; *DEBUG*
+	;PRTS("\n\rDSKRDY:$")		; *DEBUG*
 	LD	A,CH_CMD_DSKRDY		; DISK READY
 	CALL	CH_CMD			; DO IT
 	CALL	CH_POLL			; WAIT FOR RESPONSE
 	;CALL	PC_SPACE		; *DEBUG*
 	;CALL	PRTHEXBYTE		; *DEBUG*
+	CP	$14			; *DEBUG*
+	JR	NZ,CHUSB_DSKRDY		; *DEBUG*
 ;
 	RET
 ;
@@ -936,12 +941,44 @@ CHUSB_AUTOSET:
 	;PRTS("\n\rAUTOSET:$")		; *DEBUG*
 	LD	A,CH_CMD_AUTOSET	; AUTOMATIC SETUP FOR USB
 	CALL	CH_CMD			; DO IT
+	CALL	LDELAY			; *DEBUG*
 	CALL	CH_POLL			; WAIT FOR RESPONSE
 	;CALL	PC_SPACE		; *DEBUG*
 	;CALL	PRTHEXBYTE		; *DEBUG*
 ;
 	RET
 ;
+; PERFORM TEST CONNECT
+;
+CHUSB_TSTCON:
+	;PRTS("\n\rTSTCON:$")		; *DEBUG*
+	LD	A,CH_CMD_TSTCON		; TEST USB DEVICE CONNECT
+	CALL	CH_CMD			; DO IT
+	CALL	CH_NAP			; WAIT A BIT
+	CALL	CH_RD			; GET RESPONSE
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+;
+	RET
+;
+; PERFORM GET MAX LUN
+;
+CHUSB_MAXLUN:
+	;PRTS("\n\rMAXLUN:$")		; *DEBUG*
+	LD	A,CH_CMD_MAXLUN		; TEST USB DEVICE CONNECT
+	CALL	CH_CMD			; DO IT
+	CALL	CH_NAP			; WAIT A BIT
+	LD	A,$38			; CONSTANT
+	CALL	CH_WR			; SEND IT
+	CALL	CH_NAP
+	CALL	CH_RD			; GET RESPONSE
+	;CALL	PC_SPACE		; *DEBUG*
+	;CALL	PRTHEXBYTE		; *DEBUG*
+;
+	RET
+;
+#ENDIF
+;
 ; ERROR HANDLERS
 ;
 ;

Source/HBIOS/dsrtc.asm

@@ -145,6 +145,8 @@ DSRTC_PREINIT:
 	;OR	DSRTC_IDLE		; SET OUR IDLE BITS
 	;LD	(DSRTC_OPRVAL),A	; SAVE IT
 ;
+	XOR	A			; ZERO
+	LD	(DSRTC_STAT),A		; CLEAR STATUS
 	CALL	DSRTC_DETECT		; HARDWARE DETECTION
 	LD	(DSRTC_STAT),A		; SAVE RESULT
 	RET	NZ			; ABORT IF ERROR

Source/HBIOS/hbios.asm

@@ -88,20 +88,6 @@ MODCNT	.SET	MODCNT + 1
 	!!!	; FORCE AN ASSEMBLY ERROR
 #ENDIF
 ;
-; SOME HARDWARE REQUIRES A SPECIFIC ROMSIZE (NOTABLY ZZRCC) OR THE
-; RESULTING BUILD IMAGES WILL BE CORRUPT.  ROMSIZE_CHK IS SPECIFIED
-; IN THE CONFIG FILE AND IS VERIFIED AGAINST THE ROMSIZE BEING USED
-; BY THE BUILD.  A ROMSIZE_CHK VALUE OF 0 INDICATES THE VERIFICATION
-; IS DISABLED (WHICH IT USUALLY IS).
-;
-#IF (ROMSIZE_CHK != 0) & (ROMSIZE != ROMSIZE_CHK)
-	.ECHO	"*** ERROR: ROMSIZE VALUE VERIFICATION FAILURE.\n"
-	.ECHO	"THIS CONFIGURATION REQUIRES A ROMSIZE OF " \ .ECHO ROMSIZE_CHK \ .ECHO ".\n"
-	.ECHO	"BUILD IS USING A ROMSIZE OF " \ .ECHO ROMSIZE \ .ECHO ".\n"
-	.ECHO	"SEE COMMENTS IN HBIOS.ASM.\n"
-	!!!	; FORCE AN ASSEMBLY ERROR
-#ENDIF
-;
 ;
 ;
 #IF (FPLED_ENABLE)
@@ -196,7 +182,13 @@ MODCNT	.SET	MODCNT + 1
   #ENDIF
 #ENDIF
 ;
+; CONVERT ROMWBW LOGICAL BANK ID TO PHYSICAL 32K BANK OFFSET
 ;
+#DEFINE PBANK(X) (((X >> 7) * (RAMBIAS / 32)) + (X & $7F))
+;
+; CONVERT ROMWBW LOGICAL BANK ID TO Z280 PHYSICAL BANK (4K) OFFSET
+;
+#DEFINE Z2_BANK(X) (PBANK(X) << 3)
 ;
 ; THE RTCDEF EQUATE IS INITIALIZED HERE AND UPDATED BY DRIVER INCLUDES
 ; THAT SHARE THE RTC LATCH.  AS EACH DRIVER FILE IS INCLUDED, IT CAN
@@ -318,9 +310,9 @@ CB_BIDUSR	.DB	BID_USR
 CB_BIDBIOS	.DB	BID_BIOS
 CB_BIDAUX	.DB	BID_AUX
 CB_BIDRAMD0	.DB	BID_RAMD0
-CB_BIDRAMDN	.DB	BID_RAMDN
+CB_RAMD_BNKS	.DB	RAMD_BNKS
 CB_BIDROMD0	.DB	BID_ROMD0
-CB_BIDROMDN	.DB	BID_ROMDN
+CB_ROMD_BNKS	.DB	ROMD_BNKS
 ;
 	.FILL	(HCB + HCB_SIZ - $),0	; PAD REMAINDER OF HCB
 ;
@@ -1222,14 +1214,14 @@ Z280_BOOTPDRTBL:
 	.DW	($006 << 4) | $A
 	.DW	($007 << 4) | $A
 	; UPPER 32 K (COMMON)
-	.DW	(((((BID_COM & $7F) * 8) + 0) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 1) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 2) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 3) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 4) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 5) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 6) + (1 << (RAMLOC - 12))) << 4) | $A
-	.DW	(((((BID_COM & $7F) * 8) + 7) + (1 << (RAMLOC - 12))) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 0) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 1) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 2) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 3) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 4) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 5) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 6) << 4) | $A
+	.DW	((Z2_BANK(BID_COM) + 7) << 4) | $A
 ;
 Z280_INITZ:
 ;
@@ -1435,7 +1427,7 @@ S100MON_SKIP:
 ;
 ; THIS VALUE IS TEMPORARILY STORED AT HBX_LOC - 2
 ; BECAUSE WE ARE CURRENTLY RUNNING IN ROM.  AFTER WE TRANSITION HBIOS
-; TO RAM, THE VALUE IS MOVED TO IT'S REAL LCOATION AT HB_APPBNK.
+; TO RAM, THE VALUE IS MOVED TO IT'S REAL LOCATION AT HB_APPBNK.
 ;
 	LD	A,(HB_CURBNK)		; GET HB_CURBNK
 	LD	(HBX_LOC - 2),A		; ... AND SAVE TEMP FOR APPBNK
@@ -1607,67 +1599,18 @@ MBC_SINGLE:
 ;
 #ENDIF
 ;
-; IF THIS IS A ROM-LESS SYSTEM, THEN WE NEED TO COPY THE PAYLOAD
-; (LOADER, MONITOR, ZSDOS) THAT HAS BEEN LOADED TO PHYSICAL RAM
-; BANKS 0 AND 1 TO THE USER TPA BANK TO RUN AFTER BOOT.
-; IT IS DONE PRIOR TO COPYING HBIOS TO IT'S FINAL BANK BECAUSE
-; THE PAYLOAD MAY EXTEND INTO THE HBIOS OPERATING BANK.  THIS
-; HAPPENS PRIMARILY IN THE CASE WHERE THE
-; SYSTEM HAS THE MINIMUM 128KB OF RAM.
-;
-#IFDEF ROMBOOT
-  #IF (ROMSIZE == 0)
- ; 
-	; THE PAYLOAD IS LIKELY TO CROSS OVER THE RAM BANK 0/1
-	; BOUNDARY.  BNKCPY DOES NOT HANDLE THIS BECAUSE IT ASSUMES
-	; THE COMMON BANK IS USED AFTER PASSING OVER THE BANK
-	; BOUNDARY.  WE WORK AROUND THAT HERE BY DOING TWO COPIES.
-	; THE FIRST ONE HANDLES THE PORTION OF THE PAYLOAD FROM THE
-	; END OF HBIOS TO THE BANK BOUNDARY ($8000).  THE SECOND
-	; ONE HANDLES THE PORTION THAT EXTENDS INTO THE SECOND
-	; PHYSICAL RAM BANK.
-;
-	; COPY PORTION OF PAYLOAD FOLLOWING HBIOS TO THE BANK
-	; BOUNDARY AT $8000 INTO START OF TPA.
-	LD	A,BID_RAM0
-	LD	(HB_SRCBNK),A
-	LD	A,BID_USR
-	LD	(HB_DSTBNK),A
-	LD	HL,HB_END
-	LD	DE,0
-	LD	BC,$8000-HB_END
-;
-    #IF (MEMMGR == MM_Z280)
-	CALL	Z280_BNKCPY
-    #ELSE
-	CALL	HBX_BNKCPY
-    #ENDIF
-;
-	; COPY REMAINDER OF PAYLOAD EXTENDING INTO THE SECOND PHYSICAL
-	; RAM BANK.  NOTE THAT THE DESTINATION ADDRESS (DE) IS
-	; ALREADY CORRECT FROM THE PRIOR COPY.
-	LD	A,BID_RAM0+1
-	LD	(HB_SRCBNK),A
-	LD	HL,$0000
-	; DE IS ALREADY CORRECT
-	LD	BC,$8000-($8000-HB_END)
-;
-    #IF (MEMMGR == MM_Z280)
-	CALL	Z280_BNKCPY
-    #ELSE
-	CALL	HBX_BNKCPY
-    #ENDIF
-;
-  #ENDIF
-;
-#ENDIF
-;
 ; IF ALREADY EXECUTING IN RAM, BYPASS RAM BANK INSTALLATION
 ;
 	LD	A,(HB_RAMFLAG)
 	OR	A
 	JR	NZ,HB_START1
 ;
+; IF BID_BOOT AND BID_BIOS ARE THE SAME, THEN IT IS NEVER APPROPRIATE
+; TO COPY THE HBIOS IMAGE FROM BID_BOOT TO BID_BIOS.  THIS IS TYPICALLY
+; THE CASE FOR A ROMLESS SYSTEM.
+;
+#IF (BID_BOOT != BID_BIOS)
+;
 ; INSTALL HBIOS IN RAM BANK
 ;
 	LD	A,(HB_CURBNK)
@@ -1677,24 +1620,26 @@ MBC_SINGLE:
 	LD	HL,0
 	LD	DE,0
 	LD	BC,$8000
-#IF (MEMMGR == MM_Z280)
+  #IF (MEMMGR == MM_Z280)
 	CALL	Z280_BNKCPY
-#ELSE
+  #ELSE
 	CALL	HBX_BNKCPY
-#ENDIF
+  #ENDIF
 ;
 ; TRANSITION TO HBIOS IN RAM BANK
 ;
-#IF (MEMMGR == MM_Z280)
+  #IF (MEMMGR == MM_Z280)
 	LD	A,BID_BIOS
 	LD	B,$10			; FIRST SYSTEM PDR
 	CALL	Z280_BNKSEL
 	JR	HB_START1
-#ELSE
+  #ELSE
 	LD	A,BID_BIOS		; BIOS BANK ID
 	LD	IX,HB_START1		; EXECUTION RESUMES HERE
 	CALL	HBX_BNKCALL		; CONTINUE IN RAM BANK, DO NOT RETURN
 	HALT				; WE SHOULD NOT COME BACK HERE!
+  #ENDIF
+;
 #ENDIF
 ;
 HB_RAMFLAG	.DB	FALSE		; INITIALLY FALSE, SET TO TRUE BELOW AFTER RAM TRANSITION
@@ -1712,10 +1657,6 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 	; NOTIFY THAT WE MADE THE TRANSITION!
 	DIAG(DIAG_03)
 	LED(%00000010)
-;
-	; SET THE IN-RAM FLAG
-	LD	A,TRUE			; ACCUM := TRUE
-	LD	(HB_RAMFLAG),A		; SET RAMFLAG
 ;
 	; RECOVER DATA PASSED PRIOR TO RAM TRANSITION
 	; (HBX_LOC - 1) = BATCOND, (HBX_LOC - 2) = APPBNK
@@ -1733,7 +1674,7 @@ HB_START1:				; BNKCALL ARRIVES HERE, BUT NOW RUNNING IN RAM BANK
 	; HL IS TOP 16 BITS OF PHYSICAL ADDRESS OF IVT
 	; IVT *MUST* BE ON A 4K BOUNDARY
 	LD	C,Z280_VPR
-	LD	HL,0 + ((((BID_BIOS & $7F) * 8) + (1 << (RAMLOC - 12))) << 4) + (Z280_IVT >> 8)
+	LD	HL,0 + (((PBANK(BID_BIOS) << 15) + Z280_IVT) >> 8)
 	LDCTL	(C),HL
 #ENDIF
 ;
@@ -1914,6 +1855,14 @@ HB_CPU1:
 	LD	A,L
 	LD	(HB_CPUTYPE),A
 ;
+; CLEAR DISPATCH TABLE ENTRIES
+;
+	XOR	A		; ZERO
+	LD	(CIO_CNT),A	; CIO DEVICES
+	LD	(DIO_CNT),A	; DIO DEVICES
+	LD	(VDA_CNT),A	; VDA DEVICES
+	LD	(SND_CNT),A	; SND DEVICES
+;
 #IF (DSRTCENABLE)
 	CALL	DSRTC_PREINIT
 #ENDIF
@@ -2721,13 +2670,13 @@ HB_CKBNK:
 	LD	BC,1			; DECREMENT VALUE
 	XOR	A			; ZERO ACCUM
 HB_CKBNK1:
-#IF (MEMMGR == MM_Z280)
+    #IF (MEMMGR == MM_Z280)
 	LD	D,A			; WORKING VALUE TO D
 	LDUD	A,(HL)			; GRAB NEXT BYTE FROM USER SPACE
 	ADD	A,D			; ADD NEXT BYTE
-#ELSE
+    #ELSE
 	ADD	A,(HL)			; ADD NEXT BYTE
-#ENDIF
+    #ENDIF
 	OR	A			; CLEAR CARRY
 	SBC	HL,BC			; DECREMENT
 	JR	NC,HB_CKBNK1		; LOOP TILL DONE
@@ -3104,11 +3053,7 @@ INITSYS4:
 ; CHAIN TO LOADER
 ;
 #IFDEF ROMBOOT
-  #IF (ROMSIZE > 0)
 	LD	A,BID_IMG0		; CHAIN TO OS IMAGES BANK
-  #ELSE
-	LD	A,BID_USR		; CHAIN TO USER BANK
-  #ENDIF
 #ELSE
 	LD	A,BID_USR		; CHAIN TO USER BANK
 #ENDIF
@@ -4149,10 +4094,6 @@ SYS_RESINT:
 ; GO BACK TO ROM BOOT LOADER
 ;
 SYS_RESWARM:
-;
-#IF (ROMSIZE == 0)
-	JR	SYS_RESCOLD
-#ENDIF
 ;
 	CALL	SYS_RESINT
 ;
@@ -4171,13 +4112,6 @@ SYS_RESWARM:
 ;
 SYS_RESCOLD:
 ;
-#IF (ROMSIZE == 0)
-	LD	DE,STR_RESTART
-	CALL	Z,WRITESTR
-	DI
-	HALT
-#ENDIF
-;
 #IF (MEMMGR == MM_Z280)
 	JP	Z280_RESTART
 #ELSE
@@ -5855,7 +5789,7 @@ Z280_BNKSEL:
 	LDCTL	HL,(C)			; GET CURRENT I/O PAGE
 	PUSH	HL			; SAVE IT
 	LD	L,$FF			; NEW I/O PAGE
-	LDCTL	(C),HL
+	LDCTL	(C),HL			; IMPLEMENT
 ;
 	; CONVERT BANK ID TO TOP 12 BITS OF PHYSICAL ADDRESS
 	; WITH $0A IN THE LOW ORDER NIBBLE:
@@ -5866,8 +5800,10 @@ Z280_BNKSEL:
 	MULTU	A,$80			; HL=0R00 0BBB B000 0000
 	BIT	6,H			; RAM BIT SET?
 	JR	Z,Z280_BNKSEL2		; IF NOT, ALL DONE
-	RES	6,H			; OTHERWISE, MOVE RAM BIT
-	SET	RAMLOC-16,H		; HL=0000 RBBB B000 0000
+	RES	6,H			; OTHERWISE, REMOVE RAM BIT
+	LD	A,RAMBIAS >> 6		; RAM OFFSET (TOP 8 BITS)
+	OR	H			; RECOMBINE
+	LD	H,A			; AND PUT BACK IN H
 ;
 Z280_BNKSEL2:
 ;
@@ -6115,10 +6051,12 @@ Z2DMAADR1:
 	; MOVE THE RAM/ROM BIT.
 	; RCBUS DMA HI=0000 RBBB BAAA 1111 LO=1111 AAAA AAAA AAAA
 	; ZZ80MB DMA HI=R000 0BBB BAAA 1111 LO=1111 AAAA AAAA AAAA
-	BIT	6,H
-	JR	Z,Z2DMAADR2
-	RES	6,H
-	SET	RAMLOC-16,H
+	BIT	6,H			; RAM BIT SET?
+	JR	Z,Z2DMAADR2		; IF NOT, ALL DONE
+	RES	6,H			; OTHERWISE, REMOVE RAM BIT
+	LD	A,RAMBIAS >> 6		; RAM OFFSET (TOP 8 BITS)
+	OR	H			; RECOMBINE
+	LD	H,A			; AND PUT BACK IN H
 ;
 Z2DMAADR2:
 	PUSH	HL			; SAVE IT FOR NOW
@@ -7804,7 +7742,6 @@ STR_LOWBAT	.DB	"\r\n\r\n+++ LOW BATTERY +++$"
 STR_PANIC	.TEXT	"\r\n>>> PANIC: $"
 STR_SYSCHK	.TEXT	"\r\n>>> SYSCHK: $"
 STR_CONTINUE	.TEXT	"\r\nContinue (Y/N)? $"
-STR_RESTART	.TEXT	"\r\n\r\n>>> Press hardware reset button to restart system\r\n\r\n$"
 ;
 #IF (DSKYENABLE)	;	'H','B','I','O',' ',' ',' ',' '
 MSG_HBVER		.DB	$76,$7F,$30,$3F,$00,$00,$00,$00	; "HBIO    "

Source/HBIOS/hbios.inc

@@ -435,9 +435,9 @@ HCB_BIDUSR	.EQU	$D9		; USER BANK (TPA)
 HCB_BIDBIOS	.EQU	$DA		; BIOS BANK (HBIOS, UBIOS)
 HCB_BIDAUX	.EQU	$DB		; AUX BANK (BPBIOS)
 HCB_BIDRAMD0	.EQU	$DC		; FIRST BANK OF RAM DRIVE
-HCB_BIDRAMDN	.EQU	$DD		; LAST BANK OF RAM DRIVE
+HCB_RAMD_BNKS	.EQU	$DD		; RAM DRIVE BANK COUNT
 HCB_BIDROMD0	.EQU	$DE		; FIRST BANK OF ROM DRIVE
-HCB_BIDROMDN	.EQU	$DF		; LAST BANK OF ROM DRIVE
+HCB_ROMD_BNKS	.EQU	$DF		; ROM DRIVE BANK COUNT
 ;
 ; HBIOS PROXY COMMON DATA BLOCK
 ; EXACTLY 32 BYTES AT $FFE0-$FFFF

Source/HBIOS/hbios_env.asm

@@ -24,7 +24,11 @@
 ;
 ; Print all desired config values...
 ;
+#if (ROMSIZE > 0)
 	prtval("ROMSIZE$", ROMSIZE)
+#else
+	prtval("ROMSIZE$", RAMSIZE)
+#endif
 	prtval("CPUFAM$", CPUFAM)
 ;
 	ret

Source/HBIOS/md.asm

@@ -72,32 +72,30 @@ MD_INIT:
 ;
 #IF (MDROM)
 	PRTS(" ROMDISK=$")
-;	LD	HL,ROMSIZE - 128
-	LD	A,(HCB + HCB_ROMBANKS)	; GET NUMBER OF BANKS
-	SUB	(TOT_ROM_RB)
-	LD	L,A
-	LD	H,0			; CALCULATE RAM SIZE
+	LD	A,(CB_ROMD_BNKS)	; ROM DISK SIZE IN BANKS
+	LD	L,A			; PUT IN L
+	LD	H,0			; CALCULATE ROM DISK SIZE
 	ADD	HL,HL			; X2
 	ADD	HL,HL			; X4
 	ADD	HL,HL			; X8
 	ADD	HL,HL			; X16
 	ADD	HL,HL			; X32
+	LD	(MD_ROMDSIZE),HL	; SAVE ROM DISK SIZE
 	CALL	PRTDEC
 	PRTS("KB$")
 #ENDIF
 ;
 #IF (MDRAM)
 	PRTS(" RAMDISK=$")
-;	LD	HL,RAMSIZE - 256
-	LD	A,(HCB + HCB_RAMBANKS)	; GET NUMBER OF BANKS
-	SUB	(TOT_RAM_RB)		; LESS RESERVED BANKS
-	LD	L,A
-	LD	H,0			; CALCULATE RAM SIZE
+	LD	A,(CB_RAMD_BNKS)	; RAM DISK SIZE IN BANKS
+	LD	L,A			; PUT IN L
+	LD	H,0			; CALCULATE RAM DISK SIZE
 	ADD	HL,HL			; X2
 	ADD	HL,HL			; X4
 	ADD	HL,HL			; X8
 	ADD	HL,HL			; X16
 	ADD	HL,HL			; X32
+	LD	(MD_RAMDSIZE),HL	; SAVE RAM DISK SIZE
 	CALL	PRTDEC
 	PRTS("KB$")
 #ENDIF
@@ -183,21 +181,18 @@ MD_CAP:					; ASSUMES THAT UNIT 0 IS RAM, UNIT 1 IS ROM
 	SYSCHKERR(ERR_NOUNIT)		; INVALID UNIT
 	RET
 MD_CAP0:
-	LD	A,(HCB + HCB_RAMBANKS)	; POINT TO RAM BANK COUNT
-	LD	B,TOT_RAM_RB		; SET # RESERVED RAM BANKS
-	JR	MD_CAP2
+	; RAM DISK SIZE
+	LD	HL,(MD_RAMDSIZE)	; SIZE IN KB
+	JR	MD_CAP2			; CONTINUE
 MD_CAP1:
-	LD	A,(HCB + HCB_ROMBANKS)	; POINT TO ROM BANK COUNT
-	LD	B,TOT_ROM_RB		; SET # RESERVED ROM BANKS
+	; ROM DISK SIZE
+	LD	HL,(MD_ROMDSIZE)	; SIZE IN KB
 MD_CAP2:
-	SUB	B			; SUBTRACT OUT RESERVED BANKS
-	LD	H,A			; H := # BANKS
-	LD	E,64			; # 512 BYTE BLOCKS / BANK
-	CALL	MULT8			; HL := TOTAL # 512 BYTE BLOCKS
-	LD	DE,0			; NEVER EXCEEDS 64K, ZERO HIGH WORD
+	ADD	HL,HL			; CONVERT TO BLOCK COUNT
+	LD	DE,0			; FILL IN HIGH WORD
 	LD	BC,512			; 512 BYTE SECTOR
-	XOR	A
-	RET
+	XOR	A			; SIGNAL SUCCESS
+	RET				; DONE
 ;
 ;
 ;
@@ -1032,6 +1027,8 @@ MD_FFSEN	.DB	00h		; FLASH FILES SYSTEM ENABLE
 ;
 #ENDIF
 ;
+MD_ROMDSIZE	.DW	0
+MD_RAMDSIZE	.DW	0
 MD_RWFNADR	.DW	0
 MD_DSKBUF	.DW	0
 MD_SRCBNK	.DB	0

Source/HBIOS/romldr.asm

@@ -140,7 +140,8 @@ start:
 	rst	08			; do it
 	ld	a,c			; previous bank to A
 	ld	(bid_ldr),a		; save previous bank for later
-	bit	7,a			; starting from ROM?
+	;;;bit	7,a			; starting from ROM?
+	cp	BID_IMG0		; ROM startup?
 #endif
 ;
 #if (BIOS == BIOS_UNA)
@@ -2189,7 +2190,9 @@ err:
 	ld	hl,str_err_prefix
 	call	pstr
 	pop	hl
-	jp	pstr
+	call	pstr
+	or	$ff			; signal error
+	ret				; done
 ;
 str_err_prefix	.db	bel,"\r\n\r\n*** ",0
 str_err_invcmd	.db	"Invalid command",0

Source/HBIOS/std.asm

@@ -566,10 +566,8 @@ SYSTIM	.SET	TM_Z280
 ;
 ; MEMORY BANK CONFIGURATION
 ;
-WBW_ROM_R	.EQU	128	; 128K			; RESERVED ROM REQUIRED FOR ROMWBW
-WBW_RAM_R	.EQU	256	; 256K			; RESERVED RAM REQUIRED FOR ROMWBW
-TOT_ROM_RB	.EQU	(WBW_ROM_R / 32)		; TOTAL ROM BANKS RESERVED
-TOT_RAM_RB	.EQU	(WBW_RAM_R / 32)		; TOTAL RAM BANKS RESERVED
+ROMBANKS	.EQU	(ROMSIZE / 32)			; TOTAL ROM BANKS
+RAMBANKS	.EQU	(RAMSIZE / 32)			; TOTAL RAM BANKS
 ;
 #IF (BIOS == BIOS_UNA)
 BID_ROM0	.EQU	$0000
@@ -580,26 +578,45 @@ BID_RAM0	.EQU	$8000
 BID_ROM0	.EQU	$00
 BID_RAM0	.EQU	$80
 #ENDIF
-
-BID_ROMN	.EQU	(BID_ROM0 + ((ROMSIZE / 32) - 1))
-BID_RAMN	.EQU	(BID_RAM0 + ((RAMSIZE / 32) - 1))
 ;
-BID_RAMD0	.EQU	BID_RAM0	; FIRST RAM DRIVE BANK			 ^  RAM
-BID_RAMDN	.EQU	BID_RAMN - TOT_RAM_RB	; LAST RAM DRIVE BANK		 |  DRIVE
-;					; OS BUFFERS CP/M3?			-+ THESE	CPM3 BNK 5 (BUF)
-;					; OS BUFFERS CP/M3?			 | MAKE		CPM3 BNK 4 (BUF)
-;					; OS BUFFERS CP/M3?			 | UP		CPM3 BNK 3 (BUF)
-;					; OS BUFFERS CP/M3?			 | THE		CPM3 BNK 2 (BUF)
-BID_AUX		.EQU	BID_RAMN - 3	; AUX BANK (BPBIOS, ETC.)		 | 256KB	CPM3 BNK 1 (TPA)
-BID_BIOS	.EQU	BID_RAMN - 2	; BIOS BANK				 | RESERVED
-BID_USR		.EQU	BID_RAMN - 1	; USER BANK (CP/M TPA, ETC.)		 | RAM		CPM3 BNK 0 (OS)
-BID_COM		.EQU	BID_RAMN - 0	; COMMON BANK, UPPER 32K		-+ BANKS
-BID_BOOT	.EQU	BID_ROM0 + 0	; BOOT BANK				-+ THESE MAKE
-BID_IMG0	.EQU	BID_ROM0 + 1	; ROM LOADER AND FIRST IMAGES BANK	 | UP THE 128KB
-BID_IMG1	.EQU	BID_ROM0 + 2	; SECOND IMAGES BANK		 	 | RESERVED
-BID_IMG2	.EQU	BID_ROM0 + 3	; NETWORK BOOT				-+ ROM BANKS
-BID_ROMD0	.EQU	BID_ROM0 + 4	; FIRST ROM DRIVE BANK			 |  ROM
-BID_ROMDN	.EQU	BID_ROMN	; LAST ROM DRIVE BANK			 V  DRIVE
+BID_ROMN	.EQU	(BID_ROM0 + ROMBANKS - 1)
+BID_RAMN	.EQU	(BID_RAM0 + RAMBANKS - 1)
+;
+#IF (ROMSIZE > 0)
+;										-- TYPICAL --
+BID_BOOT	.EQU	BID_ROM0 + 0	; BOOT BANK				0x00
+BID_IMG0	.EQU	BID_ROM0 + 1	; ROM LOADER AND FIRST IMAGES BANK	0x01
+BID_IMG1	.EQU	BID_ROM0 + 2	; SECOND IMAGES BANK		 	0x02
+BID_IMG2	.EQU	BID_ROM0 + 3	; RESERVED				0x03
+BID_ROMD0	.EQU	BID_ROM0 + 4	; FIRST ROM DRIVE BANK			0x04
+BID_ROMDN	.EQU	BID_ROMN	; LAST ROM DRIVE BANK			0x0F
+;
+BID_BIOS	.EQU	BID_RAM0	; HBIOS BANK				0x80
+BID_RAMD0	.EQU	BID_RAM0 + 1	; FIRST RAM DRIVE BANK			0x81
+BID_RAMDN	.EQU	BID_RAMN - 4	; LAST RAM DRIVE BANK			0x8B
+BID_BUF		.EQU	BID_RAMN - 3	; OS BUFFERS (CP/M3)			0x8C
+BID_AUX		.EQU	BID_RAMN - 2	; AUX BANK (CP/M 3, BPBIOS, ETC.)	0x8D
+BID_USR		.EQU	BID_RAMN - 1	; USER BANK (CP/M TPA, ETC.)		0x8E
+BID_COM		.EQU	BID_RAMN - 0	; COMMON BANK, UPPER 32K		0x8F
+;
+#ELSE
+;										-- TYPICAL --
+BID_BOOT	.EQU	BID_RAM0 + 0	; BOOT BANK				0x80
+BID_IMG0	.EQU	BID_RAM0 + 1	; ROM LOADER AND FIRST IMAGES BANK	0x81
+BID_IMG1	.EQU	BID_RAM0 + 2	; SECOND IMAGES BANK		 	0x82
+BID_IMG2	.EQU	BID_RAM0 + 3	; RESERVED				0x83
+BID_RAMD0	.EQU	BID_RAM0 + 4	; FIRST RAM DRIVE BANK			0x84
+BID_RAMDN	.EQU	BID_RAMN - 4	; LAST RAM DRIVE BANK			0x8B
+BID_BUF		.EQU	BID_RAMN - 3	; OS BUFFERS (CP/M3)			0x8C
+BID_AUX		.EQU	BID_RAMN - 2	; AUX BANK (CP/M 3, BPBIOS, ETC.)	0x8D
+BID_USR		.EQU	BID_RAMN - 1	; USER BANK (CP/M TPA, ETC.)		0x8E
+BID_COM		.EQU	BID_RAMN - 0	; COMMON BANK, UPPER 32K		0x8F
+;
+BID_BIOS	.EQU	BID_BOOT	; HBIOS BANK				0x80
+BID_ROMD0	.EQU	0		; NO ROM DRIVE
+BID_ROMDN	.EQU	$FF		; NO ROM DRIVE
+;
+#ENDIF
 ;
 #IF (ROMSIZE == 0)
 BID_BOOT	.SET	BID_RAM0	; SPECIAL CASE ROM-LESS SYSTEM
@@ -609,17 +626,21 @@ BID_BOOT	.SET	BID_RAM0	; SPECIAL CASE ROM-LESS SYSTEM
 ;
   #IF (!MDRAM)
 BID_RAMD0	.SET	$FF		; RAM DRIVE DISABLED
-BID_RAMDN	.SET	$FF		; RAM DRIVE DISABLED
+BID_RAMDN	.SET	0		; RAM DRIVE DISABLED
   #ENDIF
 ;
   #IF (!MDROM)
 BID_ROMD0	.SET	$FF		; ROM DRIVE DISABLED
-BID_ROMDN	.SET	$FF		; ROM DRIVE DISABLED
+BID_ROMDN	.SET	0		; ROM DRIVE DISABLED
   #ENDIF
 ;
+ROMD_BNKS	.EQU	(BID_ROMDN - BID_ROMD0 + 1)
+RAMD_BNKS	.EQU	(BID_RAMDN - BID_RAMD0 + 1)
+;
 #ENDIF
 ;
-#IF FALSE
+#IF TRUE
+	.ECHO "BID_BUF: " \ .ECHO BID_BUF \ .ECHO "\n"
 	.ECHO "BID_AUX: " \ .ECHO BID_AUX \ .ECHO "\n"
 	.ECHO "BID_BIOS: " \ .ECHO BID_BIOS \ .ECHO "\n"
 	.ECHO "BID_USR: " \ .ECHO BID_USR \ .ECHO "\n"

Source/Images/Build.cmd

@@ -25,6 +25,7 @@ call BuildDisk.cmd games hd wbw_fd144 || exit /b
 echo.
 echo Building Hard Disk Images (512 directory entry format)...
 echo.
+call BuildDisk.cmd blank hd wbw_hd512 || exit /b
 call BuildDisk.cmd cpm22 hd wbw_hd512 ..\cpm22\cpm_wbw.sys || exit /b
 call BuildDisk.cmd zsdos hd wbw_hd512 ..\zsdos\zsys_wbw.sys || exit /b
 call BuildDisk.cmd nzcom hd wbw_hd512 ..\zsdos\zsys_wbw.sys || exit /b
@@ -50,6 +51,7 @@ copy /b ..\..\Binary\hd512_cpm22.img + ..\..\Binary\hd512_zsdos.img + ..\..\Bina
 echo.
 echo Building Hard Disk Images (1024 directory entry format)...
 echo.
+call BuildDisk.cmd blank hd wbw_hd1k || exit /b
 call BuildDisk.cmd cpm22 hd wbw_hd1k ..\cpm22\cpm_wbw.sys || exit /b
 call BuildDisk.cmd zsdos hd wbw_hd1k ..\zsdos\zsys_wbw.sys || exit /b
 call BuildDisk.cmd nzcom hd wbw_hd1k ..\zsdos\zsys_wbw.sys || exit /b

Source/Images/Makefile

@@ -12,13 +12,13 @@ HD512IMGS = hd512_cpm22.img hd512_zsdos.img hd512_nzcom.img \
 	hd512_cpm3.img hd512_zpm3.img hd512_ws4.img
 HD512XIMGS = hd512_z80asm.img hd512_aztecc.img hd512_hitechc.img \
 	hd512_bascomp.img hd512_fortran.img hd512_games.img \
-	hd512_tpascal.img hd512_dos65.img hd512_qpm.img
+	hd512_tpascal.img hd512_dos65.img hd512_qpm.img hd512_blank.img
 # HDIMGS += hd512_bp.img
 HD1KIMGS = hd1k_cpm22.img hd1k_zsdos.img hd1k_nzcom.img \
 	hd1k_cpm3.img hd1k_zpm3.img hd1k_ws4.img
 HD1KXIMGS = hd1k_z80asm.img hd1k_aztecc.img hd1k_hitechc.img \
 	hd1k_bascomp.img hd1k_fortran.img hd1k_games.img \
-	hd1k_tpascal.img hd1k_qpm.img
+	hd1k_tpascal.img hd1k_qpm.img hd1k_blank.img
 # HD1KIMGS += hd1k_bp.img
 
 HD512PREFIX =

Source/Images/d_blank/ReadMe.txt

@@ -0,0 +1,6 @@
+===== Blank Disk for RomWBW =====
+
+This disk is intentionally empty and just provides an empty slice
+that can be used in the concatenation of slices as desired
+
+-- WBW 3:59 PM 10/4/2023

Source/Images/diskdefs

@@ -310,6 +310,32 @@ diskdef wbw_rom1024
   os 2.2
 end
 
+# RomWBW 512KB RAM (256KB reserved, 256KB RAM Disk)
+
+diskdef wbw_ram512
+  seclen 512
+  tracks 8
+  sectrk 64
+  blocksize 2048
+  maxdir 256
+  skew 0
+  boottrk 0
+  os 2.2
+end
+
+# RomWBW 1024KB RAM (256KB reserved, 768KB RAM Disk)
+
+diskdef wbw_ram1024
+  seclen 512
+  tracks 24
+  sectrk 64
+  blocksize 2048
+  maxdir 256
+  skew 0
+  boottrk 0
+  os 2.2
+end
+
 # RomWBW 720K floppy media
 
 diskdef wbw_fd720

Source/Images/hd_blank.txt

@@ -0,0 +1,3 @@
+#
+# Blank disk template
+#

Source/RomDsk/Build.cmd

@@ -31,24 +31,29 @@ copy NUL rom128_una.dat
 
 set RomApps=%RomApps1%
 
-call :MakeDisk rom256_wbw 256 0x20000 wbw
-call :MakeDisk rom256_una 256 0x20000 una
+call :MakeDisk rom256_wbw wbw_rom256 ROM_256KB 0x20000 wbw
+call :MakeDisk rom256_una wbw_rom256 ROM_256KB 0x20000 una
 
 set RomApps=%RomApps1% %RomApps2%
 
-call :MakeDisk rom512_wbw 512 0x60000 wbw
-call :MakeDisk rom512_una 512 0x60000 una
+call :MakeDisk rom512_wbw wbw_rom512 ROM_512KB 0x60000 wbw
+call :MakeDisk rom512_una wbw_rom512 ROM_512KB 0x60000 una
 
-call :MakeDisk rom1024_wbw 1024 0xE0000 wbw
-call :MakeDisk rom1024_una 1024 0xE0000 una
+call :MakeDisk rom1024_wbw wbw_rom1024 ROM_1024KB 0xE0000 wbw
+call :MakeDisk rom1024_una wbw_rom1024 ROM_1024KB 0xE0000 una
+
+call :MakeDisk ram512_wbw wbw_ram512 RAM_512KB 0x40000 wbw
+
+call :MakeDisk ram1024_wbw wbw_ram1024 RAM_1024KB 0xC0000 wbw
 
 goto :eof
 
 :MakeDisk
 set Output=%1
-set RomSize=%2
-set ImgSize=%3
-set Bios=%4
+set DiskDef=%2
+set Dir=%3
+set ImgSize=%4
+set Bios=%5
 
 echo Making ROM Disk %Output%
 
@@ -56,12 +61,12 @@ echo Making ROM Disk %Output%
 srec_cat -Generate 0 %ImgSize% --Constant 0xE5 -Output %Output%.dat -Binary || exit /b
 
 :: Populate the disk image via cpmtools
-cpmcp -f wbw_rom%RomSize% %Output%.dat ROM_%RomSize%KB/*.* 0: || exit /b
-for %%f in (%RomApps%) do cpmcp -f wbw_rom%RomSize% %Output%.dat ../../Binary/Apps/%%f.com 0: || exit /b
-cpmcp -f wbw_rom%RomSize% %Output%.dat ..\cpm22\cpm_%Bios%.sys 0:cpm.sys || exit /b
-cpmcp -f wbw_rom%RomSize% %Output%.dat ..\zsdos\zsys_%Bios%.sys 0:zsys.sys || exit /b
+cpmcp -f %DiskDef% %Output%.dat %Dir%/*.* 0: || exit /b
+for %%f in (%RomApps%) do cpmcp -f %DiskDef% %Output%.dat ../../Binary/Apps/%%f.com 0: || exit /b
+cpmcp -f %DiskDef% %Output%.dat ..\cpm22\cpm_%Bios%.sys 0:cpm.sys || exit /b
+cpmcp -f %DiskDef% %Output%.dat ..\zsdos\zsys_%Bios%.sys 0:zsys.sys || exit /b
 
 :: Mark all disk files R/O for safety
-cpmchattr -f wbw_rom%RomSize% %Output%.dat r 0:*.* || exit /b
+cpmchattr -f %DiskDef% %Output%.dat r 0:*.* || exit /b
 
 goto :eof

Source/RomDsk/Makefile

@@ -1,4 +1,4 @@
-OBJECTS = rom128_wbw.dat rom128_una.dat rom256_wbw.dat rom256_una.dat rom512_wbw.dat rom512_una.dat rom1024_wbw.dat rom1024_una.dat
+OBJECTS = rom128_wbw.dat rom128_una.dat rom256_wbw.dat rom256_una.dat rom512_wbw.dat rom512_una.dat rom1024_wbw.dat rom1024_una.dat ram512_wbw.dat ram1024_wbw.dat
 OTHERS=*.dat
 
 TOOLS = ../../Tools
@@ -9,19 +9,34 @@ include $(TOOLS)/Makefile.inc
 ROMAPPS1 := assign mode rtc syscopy xm
 ROMAPPS2 := fdu format survey sysgen talk timer cpuspd
 
-rom256_%.dat: ROMSIZ=256
-rom512_%.dat: ROMSIZ=512
-rom1024_%.dat: ROMSIZ=1024
+# rom256_%.dat: ROMSIZ=256
+# rom512_%.dat: ROMSIZ=512
+# rom1024_%.dat: ROMSIZ=1024
+
+rom256_%.dat: DISKDEF=wbw_rom256
+rom512_%.dat: DISKDEF=wbw_rom512
+rom1024_%.dat: DISKDEF=wbw_rom1024
+ram512_%.dat: DISKDEF=wbw_ram512
+ram1024_%.dat: DISKDEF=wbw_ram1024
+
+rom256_%.dat: DIR=ROM_256KB
+rom512_%.dat: DIR=ROM_512KB
+rom1024_%.dat: DIR=ROM_1024KB
+ram512_%.dat: DIR=RAM_512KB
+ram1024_%.dat: DIR=RAM_1024KB
 
 rom256_%.dat: IMGSIZ=0x20000
 rom512_%.dat: IMGSIZ=0x60000
 rom1024_%.dat: IMGSIZ=0xE0000
+ram512_%.dat: IMGSIZ=0x40000
+ram1024_%.dat: IMGSIZ=0xC0000
 
 rom256_%.dat: ROMAPPS=$(ROMAPPS1)
 rom512_%.dat rom1024_%.dat: ROMAPPS=$(ROMAPPS1) $(ROMAPPS2)
+ram512_%.dat ram1024_%.dat: ROMAPPS=$(ROMAPPS1) $(ROMAPPS2)
 
-rom%_wbw.dat: BIOS=wbw
-rom%_una.dat: BIOS=una
+%_wbw.dat: BIOS=wbw
+%_una.dat: BIOS=una
 
 rom128_%.dat:
 	touch $@
@@ -29,8 +44,8 @@ rom128_%.dat:
 %.dat:
 	### Making ROM Disk $@
 	srec_cat -Generate 0 $(IMGSIZ) --Constant 0xE5 -Output $@ -Binary
-	$(CPMCP) -f wbw_rom$(ROMSIZ) $@ ROM_$(ROMSIZ)KB/*.* 0:
-	for i in $(ROMAPPS) ; do $(CPMCP) -f wbw_rom$(ROMSIZ) $@ ../../Binary/Apps/$$i.com 0: ; done
-	$(CPMCP) -f wbw_rom$(ROMSIZ) $@ ../CPM22/cpm_$(BIOS).sys 0:cpm.sys
-	$(CPMCP) -f wbw_rom$(ROMSIZ) $@ ../ZSDOS/zsys_$(BIOS).sys 0:zsys.sys
-	$(CPMCHATTR) -f wbw_rom$(ROMSIZ) $@ r 0:*.*
+	$(CPMCP) -f $(DISKDEF) $@ $(DIR)/*.* 0:
+	for i in $(ROMAPPS) ; do $(CPMCP) -f $(DISKDEF) $@ ../../Binary/Apps/$$i.com 0: ; done
+	$(CPMCP) -f $(DISKDEF) $@ ../CPM22/cpm_$(BIOS).sys 0:cpm.sys
+	$(CPMCP) -f $(DISKDEF) $@ ../ZSDOS/zsys_$(BIOS).sys 0:zsys.sys
+	$(CPMCHATTR) -f $(DISKDEF) $@ r 0:*.*

Source/RomDsk/RAM_1024KB/COPY.UPD

@@ -0,0 +1,43 @@
+                                                        11 Dec 88
+
+Some changes have been made to COPY since the manual was written.  
+Comparison of dates with Existence testing ON has been changed to 
+use the Creation date when no Modified date exists, and print 
+"Undated" when neither exists, yet both source and destination 
+disks support file date stamping.  Additionally, the /X option 
+has been re-defined, and a new /R option has been added to 
+Version 1.4.  Please replace Paragraph 4.1.2.9 on page 55 of your 
+ZSDOS manual with the following two paragraphs describing the new 
+options.
+
+
+4.1.2.9.1  ERASE SOURCE FILE AFTER COPY.
+
+When you want to "move" a file from one area to another, the "X" 
+option may be used.  This option causes a file or group of files 
+to be copied in the manner described by the default or specified 
+options, but after the copy and optional verify, the source file 
+or files are erased.  You will be notified that the file has been 
+erased by the status "(X)" being printed on your console.  To 
+minimize the possibility of deleting a good file when errors 
+exist in the copy, the Verify option should always be active, 
+either by default, or specified.  When Verify is active, any 
+errors detected will disable the "X" option for that file so that 
+a good source file will not be deleted.  The "X" option has no 
+configurable value, and is always assumed to be "Off" requiring 
+the option in the command line list to be effective.
+
+
+4.1.2.9.2  COPY ONLY FILES WHICH EXIST (REPLACE).
+
+Occasionally, you may wish to update selected files to a destina- 
+tion in a simpler manner than naming each file, or using the 
+Inspect option.  The "R" (Replace) option, when active, tells 
+COPY to transfer only files which exist on the destination direc- 
+tory.  If the Archive option (A) is added in conjunction with the 
+Replace option, only files which have not been archived, AND 
+already exist on the destination will be archived.  It should be 
+noted that the No Replacement (N) option is incompatible with 
+both the Replace and Archive options, and is disabled when either 
+"R" or "A" are active.
+

Source/RomDsk/RAM_1024KB/DDTZ.DOC

@@ -0,0 +1,564 @@
+
+                           DDTZ v2.7
+                       by C.B. Falconer
+                  edited by George A. Havach
+
+Introduction:
+============
+DDTZ v2.7 is a complete replacement for DDT,  Digital  Research's 
+famous Dynamic Debugging Tool,  with improved functionality,  bug 
+extermination,  and full Z80 support.  In general,  DDTZ is fully 
+compatible  with  the  original utility,  but it  has  extra  and 
+extended  commands  and  many  fewer  quirks.   All  Z80-specific 
+instructions can be (dis)assembled,  though in Intel rather  then 
+Zilog format. Furthermore, DDTZ will correctly trace ('T' and 'U' 
+commands) both 8080 and Z80 instructions,  depending on which CPU 
+is operating.  On startup,  the program announces which CPU it is 
+running on.
+
+DDTZ v2.7 now handles the 64180 added opcodes.  It does NOT  test 
+for  a  64180 CPU,  since this cannot be done  without  executing 
+illegal   Z80  instructions,   which  in  turn  will  crash  some 
+simulators.  However v2.7 does not execute any 64180 instructions 
+internally, only in the subject program.
+
+This  issue supplies the "M" version assembled,  to avoid  errors 
+when switching between MSDOS and CPM systems.   The command table 
+is updated accordingly.  Most CPM users are also MSDOS users, but 
+not vice-versa.
+
+The program is invoked by typing
+
+      ddtz<ret>
+or
+      ddtz [d:]filespec<ret>
+
+In  the  second  form,  DDTZ will load the  specified  file  into  
+memory starting at 0100H,  unless it's a .HEX file that sets  its 
+own  load  address.  Besides reporting the NEXT free address  and  
+the PC (program counter) after a successful load, DDTZ also shows 
+the number of memory pages needed for a SAVE.  Instead of  having 
+to write all this down,  just use the 'X' command at any time  to 
+redisplay these three values for the current application.
+
+NOTE:  loading  more  code above the NEXT pointer  revises  these 
+       values.
+
+As  in DDT,  when a program is loaded above the area holding  the 
+'A'  and  'U'  (and now 'W') command  code,  these  commands  are 
+disabled,  and the extra memory  is released to the user.   Thus,  
+DDTZ can occupy  as little as 3K total memory space.  Unlike DDT,  
+however,  DDTZ will not overwrite itself or the system on program 
+loads (except .HEX files).
+
+At initialization,  the stack pointer (SP) points to a return  to 
+DDTZ,  just like for the CCP. Thus, programs that normally return 
+to   the  CCP  will  be  returned  to  DDTZ.    The  'B'  command  
+reinitializes this condition.
+
+
+The intercept vector copies  the BDOS version number,   etc.,  so 
+an  object program  does not know that  DDTZ is running   (except 
+for BIOS-BDOS vector size). Thus, programs that check the version 
+number should execute correctly under DDTZ.
+
+All input parameters can now be entered in any of three formats:
+
+       (1) hexadecimal (as in DDT),
+       (2) decimal, by adding a leading '#' character,
+       (3) ASCII, by enclosing between either single or double
+           quotes; either one or two characters are allowed.
+
+Leading  blanks  in  command lines and parameters  are  absorbed. 
+Either  a  comma  or a (single) space   is   a  valid  delimiter.   
+Either uppercase or lowercase input is accepted.
+
+The  default command  (for anything  not otherwise  recognizable)  
+is 'H'.  This allows convenient calculation, along with the other 
+features described below.   So,  to convert a number,  just enter 
+it!
+
+As  in  DDT,   the prompt character is '-',  and the  only  error 
+message  is  the query ('?'),  which generally kicks you back  to 
+command mode. 
+
+New Commands (Over DDT):
+=======================
+
+NOTE: letters in parenthesis,  e.g.  "(U)",  show the  equivalent 
+      command for DDTZM version (compatible with MSDOS debug).
+
+   @  Sets  or  shows (with no parameter)  the internally  stored 
+      "base" value.   Also used with the 'S' and 'D' commands  as 
+      an optional parameter  (though without the '@')  to display 
+      memory  from an arbitrary base marker (offset). When set to 
+      zero (the default), it does not affect any screen displays.
+
+   B  B)egin: resets the USER stack pointer to its initial value, 
+      such  that any program that exits by an RET will return  to 
+      DDTZ.   DDTZ   provides    a  default   stack   space    of 
+      approximately 24 bytes for user programs.
+
+   C  C)ompare first_address,last_address,against_address:  shows 
+      all  the byte differences between two memory areas,  in the 
+      format
+
+       XXXX aa YYYY bb
+
+      where  XXXX and YYYY  are the comparative memory addresses, 
+      and aa  and  bb  are the corresponding byte values.  Can be 
+      used  to  verify   the identity  of  two  files   by  first 
+      loading  them   into  different memory areas with  the  'R' 
+      command (see below).
+
+
+   W  Write:   stores the modified memory area to disk under  the 
+  (K) filename  specified  by the 'I'  command,  overwriting  the 
+      original file from which it was loaded (the user is queried 
+      before  doing  so).  By default,  the image of memory  from 
+      0100H through the "NEXT" value -1 is saved.  "K first_addr, 
+      last_address"  overrides this and allows writing ANY memory 
+      area to a file. Almost a necessity for CPM 3.0 (no SAVE!).
+      K)eep on DDTZ
+
+   X  eXamine:  redisplays the "NEXT PC SAVE" report at any time.
+  (Q) Q)uery size on DDTZ.
+
+   S  S)earch  first_address,   last_addr,  value:  searches  the 
+  (W) specified memory area for the value (a 16-bit word,  not  a 
+      byte) and shows the locations of all such.  Very useful for 
+      finding  CALL's  or JMP's to a particular address, etc.
+      W)here on DDTZ
+
+   Y  Y)our_option  parm1,parm2,address:  executes  an  arbitrary 
+      routine  at  the  specified address,   with the BC  and  DE 
+      registers  set to parm1 and parm2, respectively.
+
+   Z  Displays (but does not alter) the Z80's alternate  register 
+      set,  including the index registers (disabled if running on 
+      an  8080).  On Z80's,   automatically included  as the last 
+      part of the display by the 'X' command.
+
+
+Based (Offset) Displays:
+=======================
+ 
+The  'D' and 'E' commands  can use a stored base value  (offset),  
+as  set  by   the  '@' command.   The current  @  value   may  be 
+overridden for a single execution of these commands by adding the 
+base as an extra parameter  in the command line.   The effect  is  
+to  add  this  value   to  the  first/last  address  and  display 
+accordingly.  The address listing on the left becomes  XXXX:YYYY,  
+where  XXXX  is the offset address and YYYY is the actual  memory 
+address being displayed.   For example,  if you have a data  area  
+located at  42B7H  and wish to  preserve easy access,  just enter 
+"@42b7".  Now, "d0,3f" will dump memory starting at 4237H.
+
+
+Further Changes from DDT:
+========================
+
+   A  A)ssemble  now  accepts   the  full Z80  as  well  as  8080 
+      instruction  set,  although it expects them in Intel rather 
+      than  Zilog  format  (see  notes  below   under   the   'L' 
+      command).    When in doubt, see the mnemnonic list below.
+
+   D  D)isplay or D)ump  will accept  an optional third parameter  
+      to  set the base value for a single execution only.  Format 
+      has been cleaned up.
+
+   H  H)ex_arithmetic    on   two  values   also   shows    their 
+      difference  in decimal.  With only one value,  converts  to 
+      hexadecimal, decimal, and ASCII (low-order byte only).
+
+
+   N  N)ame  now allows drive specification  (d:...)  and sets up 
+  (I) the  complete  command  line,   including  both  FCB's  (at 
+      addresses 005CH and 006CH).   The tail (stored at 0081H up) 
+      is NOT upshifted.
+      I)nput on DDTZ
+
+   U  U)nassemble now displays the raw hexcode,  especially handy 
+  (L) when examining non-code areas. Intel (8080 style) mnemonics 
+      are  used,  so  some  disassembled  instructions  may  look 
+      strange.  E.g., the Z80's 'IN B,(C)' and 'OUT (C),B' become  
+      'INP B' and 'OUTP B', respectively;  'LD (nnnn),BC' becomes 
+      'SBCD nnnn',  'ADD IX,  BC' becomes 'DADX B', and 'JP (IX)' 
+      becomes 'PCIX'. 
+      L)ist on DDTZ
+
+   L  L)oad   now  permits  loading a file into memory   with  an 
+  (R) offset,  which  is  added to the default  load  address  of 
+      0100H.   When reading in  a .HEX file  with  a preset bias,  
+      the   'R'  command will not transfer control to an  invalid 
+      execution point.  Another execution of the 'R' command will 
+      reread the input file, e.g.:
+
+         n blah<ret>
+         l<ret>
+         ...modify the code and generally mess about...
+         l<ret>
+
+      The original file  is reloaded,  and the modifications  are 
+      removed.
+      R)ead on DDTZ
+
+   E  E)nter,  like  D)isplay,  now  accepts an  optional  second 
+  (S) parameter  to  set the base value for  a  single  execution 
+      only.
+      S)ubstitute or S)et on DDTZ
+
+   T  T)rap/trace   on  termination  now shows  the complete  CPU 
+      state. Traps and traces no longer lock up  when  a user RST 
+      7 instruction is executed.   Tracing of BDOS/BIOS calls  is 
+      heavily trun cated,  avoiding clutter and preventing system 
+      crashes.
+
+NOTE: Most of the UNDOCUMENTED Z80 op-codes are handled.  Others
+      can crash the system.
+
+   R  R)egisters  also shows what two-byte values the HL  and  SP 
+  (X) registers are actually pointing to.  On Z80's, displays the 
+      alternate register set.
+      eX)amine on DDTZ
+
+NOTE: Any  use  of the 'W' or 'L' command  resets the system  DMA 
+      transfer address to the standard default value of 0080H.
+
+
+; This is the output of DDTZ when disassembling OPTYPE.TRY
+NOP                     LDA     06A4            MOV     M,H
+LXI     B,06A4          DCX     SP              MOV     M,L
+STAX    B               INR     A               HLT        
+INX     B               DCR     A               MOV     M,A
+INR     B               MVI     A,20            MOV     A,B
+DCR     B               CMC                     MOV     A,C
+MVI     B,20            MOV     B,B             MOV     A,D
+RLC                     MOV     B,C             MOV     A,E
+EXAF                    MOV     B,D             MOV     A,H
+DAD     B               MOV     B,E             MOV     A,L
+LDAX    B               MOV     B,H             MOV     A,M
+DCX     B               MOV     B,L             MOV     A,A
+INR     C               MOV     B,M             ADD     B  
+DCR     C               MOV     B,A             ADD     C  
+MVI     C,20            MOV     C,B             ADD     D  
+RRC                     MOV     C,C             ADD     E  
+DJNZ    0134            MOV     C,D             ADD     H  
+LXI     D,06A4          MOV     C,E             ADD     L  
+STAX    D               MOV     C,H             ADD     M  
+INX     D               MOV     C,L             ADD     A  
+INR     D               MOV     C,M             ADC     B  
+DCR     D               MOV     C,A             ADC     C  
+MVI     D,20            MOV     D,B             ADC     D  
+RAL                     MOV     D,C             ADC     E  
+JR      0134            MOV     D,D             ADC     H  
+DAD     D               MOV     D,E             ADC     L  
+LDAX    D               MOV     D,H             ADC     M  
+DCX     D               MOV     D,L             ADC     A  
+INR     E               MOV     D,M             SUB     B  
+DCR     E               MOV     D,A             SUB     C  
+MVI     E,20            MOV     E,B             SUB     D  
+RAR                     MOV     E,C             SUB     E  
+JRNZ    0134            MOV     E,D             SUB     H  
+LXI     H,06A4          MOV     E,E             SUB     L  
+SHLD    06A4            MOV     E,H             SUB     M  
+INX     H               MOV     E,L             SUB     A  
+INR     H               MOV     E,M             SBB     B  
+DCR     H               MOV     E,A             SBB     C  
+MVI     H,20            MOV     H,B             SBB     D  
+DAA                     MOV     H,C             SBB     E  
+JRZ     0134            MOV     H,D             SBB     H  
+DAD     H               MOV     H,E             SBB     L  
+LHLD    06A4            MOV     H,H             SBB     M  
+DCX     H               MOV     H,L             SBB     A  
+INR     L               MOV     H,M             ANA     B  
+DCR     L               MOV     H,A             ANA     C  
+MVI     L,20            MOV     L,B             ANA     D  
+CMA                     MOV     L,C             ANA     E  
+JRNC    0134            MOV     L,D             ANA     H  
+LXI     SP,06A4         MOV     L,E             ANA     L  
+STA     06A4            MOV     L,H             ANA     M  
+INX     SP              MOV     L,L             ANA     A  
+INR     M               MOV     L,M             XRA     B  
+DCR     M               MOV     L,A             XRA     C  
+MVI     M,20            MOV     M,B             XRA     D  
+STC                     MOV     M,C             XRA     E  
+JRC     0134            MOV     M,D             XRA     H  
+DAD     SP              MOV     M,E             XRA     L  
+
+
+XRA     M               JPE     06A4            SLAR     M  
+XRA     A               XCHG                    SLAR     A  
+ORA     B               CPE     06A4            SRAR     B  
+ORA     C               XRI     20              SRAR     C  
+ORA     D               RST     5               SRAR     D  
+ORA     E               RP                      SRAR     E  
+ORA     H               POP     PSW             SRAR     H  
+ORA     L               JP      06A4            SRAR     L  
+ORA     M               DI                      SRAR     M  
+ORA     A               CP      06A4            SRAR     A  
+CMP     B               PUSH    PSW             SLLR     B  
+CMP     C               ORI     20              SLLR     C  
+CMP     D               RST     6               SLLR     D  
+CMP     E               RM                      SLLR     E  
+CMP     H               SPHL                    SLLR     H  
+CMP     L               JM      06A4            SLLR     L  
+CMP     M               EI                      SLLR     M  
+CMP     A               CM      06A4            SLLR     A  
+RNZ                     CPI     20              SRLR     B  
+POP     B               RST     7               SRLR     C  
+JNZ     06A4            RLCR    B               SRLR     D  
+JMP     06A4            RLCR    C               SRLR     E  
+CNZ     06A4            RLCR    D               SRLR     H  
+PUSH    B               RLCR    E               SRLR     L  
+ADI     20              RLCR    H               SRLR     M  
+RST     0               RLCR    L               SRLR     A  
+RZ                      RLCR    M               BIT     0,B
+RET                     RLCR    A               BIT     0,C
+JZ      06A4            RRCR    B               BIT     0,D
+CZ      06A4            RRCR    C               BIT     0,E
+CALL    06A4            RRCR    D               BIT     0,H
+ACI     20              RRCR    E               BIT     0,L
+RST     1               RRCR    H               BIT     0,M
+RNC                     RRCR    L               BIT     0,A
+POP     D               RRCR    M               BIT     1,B
+JNC     06A4            RRCR    A               BIT     1,C
+OUT     20              RALR    B               BIT     1,D
+CNC     06A4            RALR    C               BIT     1,E
+PUSH    D               RALR    D               BIT     1,H
+SUI     20              RALR    E               BIT     1,L
+RST     2               RALR    H               BIT     1,M
+RC                      RALR    L               BIT     1,A
+EXX                     RALR    M               BIT     2,B
+JC      06A4            RALR    A               BIT     2,C
+IN      20              RARR    B               BIT     2,D
+CC      06A4            RARR    C               BIT     2,E
+SBI     20              RARR    D               BIT     2,H
+RST     3               RARR    E               BIT     2,L
+RPO                     RARR    H               BIT     2,M
+POP     H               RARR    L               BIT     2,A
+JPO     06A4            RARR    M               BIT     3,B
+XTHL                    RARR    A               BIT     3,C
+CPO     06A4            SLAR    B               BIT     3,D
+PUSH    H               SLAR    C               BIT     3,E
+ANI     20              SLAR    D               BIT     3,H
+RST     4               SLAR    E               BIT     3,L
+RPE                     SLAR    H               BIT     3,M
+PCHL                    SLAR    L               BIT     3,A
+
+
+BIT     4,B             RES     3,D             SET     2,H      
+BIT     4,C             RES     3,E             SET     2,L      
+BIT     4,D             RES     3,H             SET     2,M      
+BIT     4,E             RES     3,L             SET     2,A      
+BIT     4,H             RES     3,M             SET     3,B      
+BIT     4,L             RES     3,A             SET     3,C      
+BIT     4,M             RES     4,B             SET     3,D      
+BIT     4,A             RES     4,C             SET     3,E      
+BIT     5,B             RES     4,D             SET     3,H      
+BIT     5,C             RES     4,E             SET     3,L      
+BIT     5,D             RES     4,H             SET     3,M      
+BIT     5,E             RES     4,L             SET     3,A      
+BIT     5,H             RES     4,M             SET     4,B      
+BIT     5,L             RES     4,A             SET     4,C      
+BIT     5,M             RES     5,B             SET     4,D      
+BIT     5,A             RES     5,C             SET     4,E      
+BIT     6,B             RES     5,D             SET     4,H      
+BIT     6,C             RES     5,E             SET     4,L      
+BIT     6,D             RES     5,H             SET     4,M      
+BIT     6,E             RES     5,L             SET     4,A      
+BIT     6,H             RES     5,M             SET     5,B      
+BIT     6,L             RES     5,A             SET     5,C      
+BIT     6,M             RES     6,B             SET     5,D      
+BIT     6,A             RES     6,C             SET     5,E      
+BIT     7,B             RES     6,D             SET     5,H      
+BIT     7,C             RES     6,E             SET     5,L      
+BIT     7,D             RES     6,H             SET     5,M      
+BIT     7,E             RES     6,L             SET     5,A      
+BIT     7,H             RES     6,M             SET     6,B      
+BIT     7,L             RES     6,A             SET     6,C      
+BIT     7,M             RES     7,B             SET     6,D      
+BIT     7,A             RES     7,C             SET     6,E      
+RES     0,B             RES     7,D             SET     6,H      
+RES     0,C             RES     7,E             SET     6,L      
+RES     0,D             RES     7,H             SET     6,M      
+RES     0,E             RES     7,L             SET     6,A      
+RES     0,H             RES     7,M             SET     7,B      
+RES     0,L             RES     7,A             SET     7,C      
+RES     0,M             SET     0,B             SET     7,D      
+RES     0,A             SET     0,C             SET     7,E      
+RES     1,B             SET     0,D             SET     7,H      
+RES     1,C             SET     0,E             SET     7,L      
+RES     1,D             SET     0,H             SET     7,M      
+RES     1,E             SET     0,L             SET     7,A      
+RES     1,H             SET     0,M             DADX    B        
+RES     1,L             SET     0,A             DADX    D        
+RES     1,M             SET     1,B             LXI     X,06A4   
+RES     1,A             SET     1,C             SIXD    06A4     
+RES     2,B             SET     1,D             INX     X        
+RES     2,C             SET     1,E             DADX    X        
+RES     2,D             SET     1,H             LIXD    06A4     
+RES     2,E             SET     1,L             DCX     X        
+RES     2,H             SET     1,M             INR     [X+05]   
+RES     2,L             SET     1,A             DCR     [X+05]   
+RES     2,M             SET     2,B             MVI     [X+05],20
+RES     2,A             SET     2,C             DADX    SP       
+RES     3,B             SET     2,D             MOV     B,[X+05] 
+RES     3,C             SET     2,E             MOV     C,[X+05] 
+
+
+MOV     D,[X+05]        DSBC    B               DADY    B       
+MOV     E,[X+05]        SBCD    06A4            DADY    D       
+MOV     H,[X+05]        NEG                     LXI     Y,06A4  
+MOV     L,[X+05]        RETN                    SIYD    06A4    
+MOV     [X+05],B        IM0                     INX     Y       
+MOV     [X+05],C        LDIA                    DADY    Y       
+MOV     [X+05],D        INP     C               LIYD    06A4    
+MOV     [X+05],E        OUTP    C               DCX     Y       
+MOV     [X+05],H        DADC    B               INR     [Y+05]  
+MOV     [X+05],L        LBCD    06A4            DCR     [Y+05]  
+MOV     [X+05],A        RETI                    MVI     [Y+05],2
+MOV     A,[X+05]        LDRA                    DADY    SP      
+ADD     [X+05]          INP     D               MOV     B,[Y+05]
+ADC     [X+05]          OUTP    D               MOV     C,[Y+05]
+SUB     [X+05]          DSBC    D               MOV     D,[Y+05]
+SBB     [X+05]          SDED    06A4            MOV     E,[Y+05]
+ANA     [X+05]          IM1                     MOV     H,[Y+05]
+XRA     [X+05]          LDAI                    MOV     L,[Y+05]
+ORA     [X+05]          INP     E               MOV     [Y+05],B
+CMP     [X+05]          OUTP    E               MOV     [Y+05],C
+POP     X               DADC    D               MOV     [Y+05],D
+XTIX                    LDED    06A4            MOV     [Y+05],E
+PUSH    X               IM2                     MOV     [Y+05],H
+PCIX                    LDAR                    MOV     [Y+05],L
+SPIX                    INP     H               MOV     [Y+05],A
+RLCR    [X+05]          OUTP    H               MOV     A,[Y+05]
+RRCR    [X+05]          DSBC    H               ADD     [Y+05]  
+RALR    [X+05]          shld    06A4            ADC     [Y+05]  
+RARR    [X+05]          RRD                     SUB     [Y+05]  
+SLAR    [X+05]          INP     L               SBB     [Y+05]  
+SRAR    [X+05]          OUTP    L               ANA     [Y+05]  
+SRLR    [X+05]          DADC    H               XRA     [Y+05]  
+BIT     0,[X+05]        lhld    06A4            ORA     [Y+05]  
+BIT     1,[X+05]        RLD                     CMP     [Y+05]  
+BIT     2,[X+05]        INP     M               POP     Y       
+BIT     3,[X+05]        OUTP    M               XTIY            
+BIT     4,[X+05]        DSBC    SP              PUSH    Y       
+BIT     5,[X+05]        SSPD    06A4            PCIY            
+BIT     6,[X+05]        INP     A               SPIY            
+BIT     7,[X+05]        OUTP    A               RLCR    [Y+05]  
+RES     0,[X+05]        DADC    SP              RRCR    [Y+05]  
+RES     1,[X+05]        LSPD    06A4            RALR    [Y+05]  
+RES     2,[X+05]        LDI                     RARR    [Y+05]  
+RES     3,[X+05]        CCI                     SLAR    [Y+05]  
+RES     4,[X+05]        INI                     SRAR    [Y+05]  
+RES     5,[X+05]        OTI                     SRLR    [Y+05]  
+RES     6,[X+05]        LDD                     BIT     0,[Y+05]
+RES     7,[X+05]        CCD                     BIT     1,[Y+05]
+SET     0,[X+05]        IND                     BIT     2,[Y+05]
+SET     1,[X+05]        OTD                     BIT     3,[Y+05]
+SET     2,[X+05]        LDIR                    BIT     4,[Y+05]
+SET     3,[X+05]        CCIR                    BIT     5,[Y+05]
+SET     4,[X+05]        INIR                    BIT     6,[Y+05]
+SET     5,[X+05]        OTIR                    BIT     7,[Y+05]
+SET     6,[X+05]        LDDR                    RES     0,[Y+05]
+SET     7,[X+05]        CCDR                    RES     1,[Y+05]
+INP     B               INDR                    RES     2,[Y+05]
+OUTP    B               OTDR                    RES     3,[Y+05]
+
+
+RES     4,[Y+05]        SET     0,[Y+05]        SET     4,[Y+05]
+RES     5,[Y+05]        SET     1,[Y+05]        SET     5,[Y+05]
+RES     6,[Y+05]        SET     2,[Y+05]        SET     6,[Y+05]
+RES     7,[Y+05]        SET     3,[Y+05]        SET     7,[Y+05]
+
+; These are the result of disassembling 64180OPS.TRY
+; These opcodes are available ONLY on the 64180 CPU
+; DDTZ will both assemble and disassemble these.
+IN0     B,20            TST     E               MLT     B 
+OUT0    20,B            IN0     H,20            MLT     D 
+TST     B               OUT0    20,H            TSTI    20
+IN0     C,20            TST     H               MLT     H 
+OUT0    20,C            IN0     L,20            TSIO    20
+TST     C               OUT0    20,L            SLP       
+IN0     D,20            TST     L               MLT     SP
+OUT0    20,D            TST     M               OTIM      
+TST     D               IN0     A,20            OTDM      
+IN0     E,20            OUT0    20,A            OIMR      
+OUT0    20,E            TST     A               ODMR      
+
+; The following are UNDOCUMENTED z80 opcodes from XTDOPS.TRY.
+; DDTZ will disassemble these, but will not assemble them.
+; They use xh/xl (or yh/yl) as separate byte registers.
+; Use these at your own risk.
+INRX    H               ACXR    H               MOVY    H,B  
+DCRX    H               ACXR    L               MOVY    H,C  
+MVIX    H,20            SUXR    H               MOVY    H,D  
+INRX    L               SUXR    L               MOVY    H,E  
+DCRX    L               SBXR    H               MOVY    H,A  
+MVIX    L,20            SBXR    L               MOVY    L,B  
+MOVX    B,H             NDXR    H               MOVY    L,C  
+MOVX    B,L             NDXR    L               MOVY    L,D  
+MOVX    C,H             XRXR    H               MOVY    L,E  
+MOVX    C,L             XRXR    L               MOVY    L,A  
+MOVX    D,H             ORXR    H               MOVY    A,H  
+MOVX    D,L             ORXR    L               MOVY    A,L  
+MOVX    E,H             CPXR    H               ADYR    H    
+MOVX    E,L             CPXR    L               ADYR    L    
+MOVX    H,B             INRY    H               ACYR    H    
+MOVX    H,C             DCRY    H               ACYR    L    
+MOVX    H,D             MVIY    H,20            SUYR    H    
+MOVX    H,E             INRY    L               SUYR    L    
+MOVX    H,A             DCRY    L               SBYR    H    
+MOVX    L,B             MVIY    L,20            SBYR    L    
+MOVX    L,C             MOVY    B,H             NDYR    H    
+MOVX    L,D             MOVY    B,L             NDYR    L    
+MOVX    L,E             MOVY    C,H             XRYR    H    
+MOVX    L,A             MOVY    C,L             XRYR    L    
+MOVX    A,H             MOVY    D,H             ORYR    H    
+MOVX    A,L             MOVY    D,L             ORYR    L    
+ADXR    H               MOVY    E,H             CPYR    H    
+ADXR    L               MOVY    E,L             CPYR    L    
+
+
+Command Summary:
+===============
+
+DDTZM command                                         DDTZ command
+=============                                         ============
+@ (base)
+A)ssemble first_address                                  A
+B)egin {i.e., initialize stack and return}               B
+C)ompare first_address,last_address,against_address      C
+D)ump first_address[,last_address[,base]]                D
+E)nter_in_memory first_address[,base]                    S)ubstitute
+F)ill first_address,last_address,value                   F
+G)o_to [address][,trap1[,trap2]]                         G
+H)ex_arithmetic value1(,value2)                          H
+L)oad_file (offset)                                      R)ead
+M)ove first_address,last_address,destination             M
+N)nput FCBs_command_line                                 I)nput
+Q)uit                                                    (not avail)
+R)egister examine/change [register|flag]                 X)amine
+S)earch first_address,last_address,word                  W)hereis
+T)race_execution [count]                                 T
+        Untrace_execution [count] (i.e. do count instr)  U)ntrace
+U)nassemble_code first_address[,last_address]            L)ist code
+W)rite [first_address,last_address]                      K)eep
+X)amine {i.e. display memory parameters for application} Q)uery
+Y)our_option BC:=parm1,DE:=parm2,call_address            Y
+Z)80_register_display                                    Z
+
+
+If you find this program useful, contributions will be gratefully
+accepted and will encourage further development and release of
+useful CPM programs.  My practice is to include source.
+
+C.B. Falconer
+680 Hartford Turnpike,
+Hamden, Conn. 06517           (203) 281-1438
+
+DDTZ and its associated documentation and other files are
+copyright (c) 1980-1988 by C.B. Falconer.  They may be freely
+copied and used for non-commercial purposes ONLY.
+

Source/RomDsk/RAM_1024KB/FA16.DOC

@@ -0,0 +1,264 @@
+
+                            FILEATTR
+                           Version 1.6
+
+                          Gene Pizzetta
+                        January 18, 1992
+      A ZSDOS utility, copyright (c) 1988 by Carson Wilson.
+
+
+FILEATTR (FA) is a utility that allows rapid settin, resetting, 
+or displaying of file attributes under ZSDOS, ZRDOS, and CP/M 
+2.2.  Several additional features are available under ZCPR3, 
+including error flag setting, error handler invocation, an 
+enhanced display, and better error detection.
+
+FA will not run under CP/M 3.0 or Z3PLUS.
+
+USAGE:
+
+     FILEATTR {dir:}{afn} {{/}options}
+
+If a DIR or DU specification is not given, the current directory 
+is assumed (under vanilla CP/M only the drive is significant).  
+If no ambiguous or unambiguous filename is given, all files 
+("*.*") are matched.
+
+If no attribute options are given, FILEATTR merely displays the 
+current state of each file's attributes.  Files are displayed in 
+the order that they appear in the directory.
+
+Once operation begins, FA cannot be aborted by the user.  If a ^C 
+is entered at the keyboard, all screen output stops, but file 
+attribute operations continue to completion.  If that was not the 
+case, attributes might be set on some entries for a file and not 
+on others.  Nevertheless, suppressing screen output speeds things 
+up a bit.
+
+OPTIONS:  A leading slash is required unless the option list is 
+the second parameter on the command line.  Options may be 
+separated by spaces, commas, or nothing at all.
+
+ATTRIBUTE OPTIONS:  These options set (turn on) corresponding 
+attributes on files matching the file specification.  Attributes 
+not specified by an attribute option remain unchanged.
+
+If the option is preceded by a minus ("-") or by an "N", the 
+corresponding attribute is reset (turned off).
+
+     1    F1.  This is a user attribute which has no predefined 
+          meaning.
+
+     P    Public (f2).  Under ZSDOS, when this attribute is set, 
+          a file is available from any user area of the disk on 
+          which it resides.  A file cannot be made public if 
+          another file with the same name exists in any other 
+          user area on that drive.  In that case FA will issue an 
+          error message and leave the attribute off.
+
+     D    Inhibit access datestamp (f3).  Under ZSDOS, when this 
+          attribute is set, the file's access datestamp will not 
+          be updated, which may speed file access slightly.  If 
+          the attribute is turned off, normal access datestamping 
+          resumes.
+
+     4    F4.  This is a user attribute which has no predefined 
+          meaning.
+
+     W    Wheel protect (f8).  Under ZSDOS, when this attribute 
+          is set, the file becomes read-only when the wheel byte 
+          is off and cannot be erased.  If the wheel byte is on, 
+          the file can be erased normally.
+
+     R    Read only (t1).  When this attribute is set, the file 
+          cannot be erased or modified by most programs.
+
+     S    System (t2).  When this attribute is set, the file 
+          becomes a "hidden" file that will not be found by most 
+          directory programs or by most well-behaved utilities 
+          that accept ambiguous filenames.  (FA must find system 
+          files, of course.)
+
+     A    Archive (t3).  When this attribute is set, it signals 
+          some archival programs that the file has not been 
+          modified since it was last backed up.  If a file is 
+          modified, ZSDOS and ZRDOS turn this attribute off.  
+          CP/M does not fully support this attribute, however.
+
+OTHER OPTIONS:  These options affect only the screen display.
+
+     Q    Quiet mode.  Console output is suppressed unless there 
+          is an error.  All other operations are performed 
+          normally.
+
+     X    Screen paging off.  With this option, screen paging is 
+          turned off.  The screen can still be paused by pressing 
+          any key except ^C.
+
+ERRORS:  Under ZCPR3, errors will cause FA to set the program 
+error flag and to invoke the error handler.  The error flag will 
+be set to the following values:
+      2   invalid directory specification
+      4   miscellaneous (conflicting file, no files on disk)
+     10   no matching files found (no error handler)
+     18   Disk read-only
+     19   Invalid option
+
+For error code 10 (no matching files found), the error flag is 
+set, but the error handler is not called.
+
+In addition, under ZCPR 3.3 and above, an invalid directory 
+specification will abort FA to the error handler, but no message 
+is printed.
+
+The following error messages may be seen:
+
+Conflicting entry, can't set public attribute
+     If there are files with the same name in other user areas of 
+     the disk, the public attribute cannot be set.
+
+No files on disk
+     The disk directory is empty.
+
+Bad Option: /o
+     The command line option shown is unknown to FILEATTR.
+
+Drive R/O
+     The drive is set to read-only by the operating system and 
+     attributes cannot be changed.
+
+CP/M version 2.x required
+     FILEATTR will not run on this system.
+
+BIOS write error near directory sector n
+     An error occurred at or near the given directory sector, 
+     which is expressed as a decimal offset from the beginning of 
+     the directory.
+
+BIOS set track detected - FA aborting
+     A background program is attempting to modify the current 
+     track setting.  The background program must be removeed 
+     before running FA again.
+     
+Not Wheel
+     Under ZCPR3 the wheel byte must be set before FILEATTR can 
+     be run.
+
+CONFIGURATION:  While no installation is necessary, all options 
+can be set as defaults, if you prefer, using ZCNFG.  The 
+configuration options are fully explained on the ZCNFG help 
+screens.
+
+It is best not to change the name of the configuration file.  Its 
+special name assures that ZCNFG will always find the correct CFG 
+file, even if the name of FA has been changed or if more than one 
+version of FA is online.
+
+HISTORY:
+
+Version 1.6 -- April 14, 1991 -- Gene Pizzetta
+     Now displays target DU and directory name in summary.  Fixed 
+     bug that caused "GO" to be displayed as program name, if it 
+     was re-invoked with the GO command.
+
+Version 1.5 -- March 27, 1991 -- Gene Pizzetta
+     Now calls CP/M version checking routine (it was there, but 
+     it wasn't called).  Changed error codes:  10, no matching 
+     files found.  "No files on disk" error now gets 
+     miscellaneous error code (4).  Error 10 does not invoke 
+     error handler.  Not released.
+
+Version 1.4 -- March 20, 1991 -- Gene Pizzetta, Howard Goldstein
+     Code to check module data byte (S2) was replaced by Howard 
+     Goldstein's elegant solution which uses a "true" extent 
+     number:  ((data_mod * 32) + extent).  Entering a ^C no 
+     longer really aborts FILEATTR; instead FA immediately prints 
+     "Wait..." on the screen, turns off paging, turns on quiet 
+     mode, sets the results flag, and finishes what it was doing. 
+     All this is to prevent unexpected results when only some of 
+     a file's directory entries are changed.  All errors 
+     including a conflicting file found during a PUBLIC request, 
+     now set the program error flag and invoke the error handler 
+     so an active SUBMIT or ZEX script can be aborted.  The error 
+     flag will have the following values:  2, invalid directory; 
+     10, no files on disk; 18, disk is read-only; 19, invalid 
+     option; 4, all other errors.  If no matching files are 
+     found, the program error flag will be set to FFh, but the 
+     error handler will not be invoked.  A few other code changes 
+     were made, including a check for CP/M-Plus, under which 
+     FILEATTR will not work.  Not released.
+
+Version 1.3 -- February 22, 1991 -- Gene Pizzetta
+     Corrected bug that caused faulty operation on large files:  
+     The module data byte (S2) byte was not being checked, so 
+     such files appeared 2 or more times in the directory display 
+     and the public routine was often not finding conflicting 
+     files.  Added configuration byte and command line option (X) 
+     for screen paging (paging is suppressed in quiet mode).  
+     Made quiet mode responsive to ZCPR quiet flag and changed Q 
+     command line option to toggle.  Usage screen reflects 
+     current effect of X and Q toggles.  Attribute configuration 
+     area changed to be compatible with ZCNFG TOGL3 routine.  
+     Actions of D and ND options reversed so they work the same 
+     as the others.  Added configuration byte for printing 
+     summary line even in quiet mode, as suggested by Howard 
+     Goldstein.  Removed blank lines from screen display, 
+     allowing three more filenames to be shown.  Removed tabs 
+     from usage screen so PRINT and PSTR are not needed.  
+     Eliminated leading zero from user number display.  Now 
+     prints "file" instead of "files" in summary when only 1 
+     matching file is found.  Ditto for attribute(s) altered.
+
+Version 1.2 -- November 30, 1988 -- Carson Wilson
+     Fixed bug of no program name display when FILEATTR's name 
+     was 8 characters long.
+
+Version 1.1 -- October 30, 1988 -- Carson Wilson
+     Now wildcards the command forms "FA d: /options" and "FA d: 
+     options."
+
+Version 1.0 -- September 26, 1988 -- Carson Wilson
+     If a filespec is given, no leading slash is required before 
+     the options.  Link with version 4 libraries.  Removed /X 
+     option--ZSDOS 10T always closes the first extent when a file 
+     is written to.  Changed summary to read "files matched".
+
+Version 0.9 -- July 7, 1988 -- Carson Wilson
+     Increased length of search FCB (AMBFIL) by one byte.  Set up 
+     AMBFIL as '?' + 35 binary 0's.  ZRDOS and CP/M zero the 
+     drive byte (FCB+0) during search next calls, so reinitialize 
+     it to '?' before rescanning the directory.  PROGID now 
+     prints stored name on GO/JUMP.
+
+Version 0.8 -- June 26, 1988 -- Carson Wilson
+     Use SYSLIB PRINT for help display.  VPRINT does not expand 
+     tabs.  Now traps disk track changes at the BIOS level.  
+     Allows '-' as well as 'N' for "negate option." Auto- 
+     wildcards FCB1 for attribute set as well as display.
+
+Version 0.7 -- May 24, 1988 -- Carson Wilson
+     Cosmetic changes to help, display.  Made public routines 
+     faster by 1/2 directory scan average.  Consolidated file 
+     attribute setting/resetting routines for efficiency and 
+     clarity.
+
+Version 0.6 -- May 14, 1988 -- Carson Wilson
+     Changed "Publ" to "Publc" and "Priv" to "Privt".  Added Q 
+     and X options, made options installable.  Added test for bad 
+     ZCPR directory & chain to error handler.
+
+Version 0.5 -- May 4, 1988 -- Carson Wilson
+     Fixed bug at CHKRO inherited from MAKE.ASM.  Uses Bridger 
+     Mitchell's FRESET to reset disks.  Uses ZCPR invocation name 
+     in signon, help, etc.  Added F4 attribute.  Now includes all 
+     valid ZSDOS attributes.  Help now fully "smart" under ZCPR.  
+     Reworked VID3.Z80 and VID4.Z80 from VLIB11 and moved them 
+     into FA.Z80 (see end of file).  Put STNDOUT mode ON by 
+     default at beginning of each attribute display sequence for 
+     faster ZCPR displays.
+
+Version 0.4 -- April 27, 1988 -- Carson Wilson
+     Tests for matching files at other user areas before setting 
+     the public attribit.
+
+Version 0.3 -- April 26, 1988 -- Carson Wilson

Source/RomDsk/RAM_1024KB/FA16A.FOR

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+An update and bug-fix of FILEATTR (FA), a ZSDOS utility that 
+allows rapid setting, resetting, or displaying of file attributes 
+under ZSDOS, ZRDOS, and CP/M 2.2.  Several additional features 
+are available under ZCPR3, including error flag setting, error 
+handler invocation, and an enhanced display.  Version 1.6A adds 
+documentation; otherwise, same as 1.6.

Source/RomDsk/RAM_1024KB/FA16CFG.TXT

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+
+Option Q -- If the ZCPR quiet flag is set, FILEATTR will always default to 
+quiet mode.  To make quiet mode the default at all times, even when running 
+under CP/M, set this configuration option to "Yes".  Whatever is selected 
+here can be toggled with the command line "Q" option.
+
+Option X -- A "Yes" will cause FILEATTR to page screen output by default.  
+A "No" will default to continuous scrolling.  The chosen default can be 
+toggled with the command line "X" option.  Screen paging is always turned 
+off in quiet mode.
+
+Option R -- As distributed, FILEATTR prints nothing to the screen when it 
+is operating in quiet mode.  If this configuration option is "Yes", the 
+results summary line that gives the number of matching files found and the 
+number of attributes changed will be printed even in quiet mode.
+
+Option S -- Enter the number of lines on your video display screen.  Under 
+ZCPR 3.3 and higher, the number of screen lines for paging is obtained from 
+the environment descriptor.  This configuration parameter is used only if 
+running under CP/M.
+
+
+                      Attribute Configuration Options
+
+As distributed, FILEATTR will not change any file attribute unless 
+explicitly commanded to do so by a command line option.  To configure 
+FILEATTR to turn a file attribute ON or OFF by default, toggle the 
+appropriate configuration selection.
+
+For example, to make FILEATTR set all matching files to Public by default, 
+change the "Public attribute" setting to "Turn On".  Then FILEATTR will set 
+the specified files to Public unless the /NP command line option is given 
+(which would cause the files to be set to Private).  Since there is no 
+command which tells FILEATTR not to change an attribute, however, the 
+program will now insist on turning the Public attribute either on (default) 
+or off (through the /NP option).
+
+Most users will have neither need nor desire to change the configuration 
+default as distributed which will "Leave As-Is" all matching files.