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15 Commits

Author SHA1 Message Date
Wayne Warthen
6202bd244c Bump Version 2025-10-03 08:53:31 -07:00
Wayne Warthen
9ba4a7fecd Merge pull request #618 from b3rendsh/master
Added loader for MSX
2025-10-03 08:05:46 -07:00
H.J.Berends
130c0590fa Added loader for MSX 2025-10-03 10:19:50 +02:00
Wayne Warthen
a11b42f734 Bump Version 2025-09-29 10:49:29 -07:00
Wayne Warthen
33f69d0497 Merge pull request #616 from b3rendsh/master
Update PPIDE, added MSX BEER
2025-09-29 10:18:07 -07:00
Wayne Warthen
648c464518 Fix Format of TIMER Entry in Applications Doc
Thanks and credit to MartinR for pointing this out.
2025-09-29 09:58:26 -07:00
H.J.Berends
a4b8d14e3d Update PPIDE, added MSX BEER
Update PPIDE driver, added support for MSX BEER IDE interface
2025-09-29 12:53:29 +02:00
Wayne Warthen
08f2eb215a Update FAT Utility
Update FAT utility to look for IDENT pointer in the new location.  See Discussion #613
2025-09-27 14:20:48 -07:00
Wayne Warthen
cf528ef1c1 Add Zero Option to TIMER Application
@MartinR-UK enhanced TIMER to allow zeroing the seconds counter.

Co-Authored-By: MartinR <174514335+MartinR-UK@users.noreply.github.com>
2025-09-26 11:29:33 -07:00
Wayne Warthen
16449bb817 Fix Image Bank Id's for ROMless Systems
See Discussion #613
2025-09-24 14:03:13 -07:00
Wayne Warthen
e6b3945e42 MSX Follow-up
- Include in Linux/MacOS build
- Add entry in Hardware Guide
- Add credit in Introduction
2025-09-24 13:07:10 -07:00
Wayne Warthen
c11ec9f097 Merge pull request #614 from b3rendsh/master
Add MSX platform
2025-09-24 10:55:05 -07:00
H.J.Berends
8983b3642d added MSX platform 2025-09-24 12:19:21 +02:00
Wayne Warthen
fa4f0c996a Switch IDENT from $FFFE to $FFFC
Accommodates upcoming MSX platform port.  See [Discussion #613](https://github.com/wwarthen/RomWBW/discussions/613).
2025-09-23 13:36:32 -07:00
Wayne Warthen
74cfca470d SZ80 Tweaks
Support full 1MB of RAM on S100 Z80 CPU.
2025-09-23 11:59:47 -07:00
63 changed files with 12059 additions and 10928 deletions

View File

@@ -27,6 +27,10 @@ Version 3.6
- R?M: Randy Merkel provided ZSDOS Programmer's Manual as translated by Wayne Hortensius
- WBW: Updated Cowgol disk image with latest COWFIX.COM from Ladislau Szilagyi
- WBW: Preliminary support for S100 Computers Z80 CPU
- HJB: Added MSX platform
- M?R: Update Timer app with "zero" option
- HJB: Update PPIDE driver, add support for MSX BEER IDE interface
- HJB: Added loader for MSX
Version 3.5.1
-------------

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@@ -8,10 +8,27 @@ release of RomWBW.
- **Please** review the "Upgrading" Section of the RomWBW User Guide.
- The RomWBW ROM and the RomWBW disk images are intended to be a
matched set. After upgrading your ROM, it is important to update
the OS boot tracks of your disks as well as the RomWBW-specific
applications. This is discussed in the "Upgrading" section of the
RomWBW User Guide.
matched set. After upgrading your ROM, you need to update your
boot disk media by doing one of the following:
- Write a new disk image (typically hd1k_combo.img) onto your
disk media (will overwrite existing data/files).
- Update the boot tracks of the bootable OS images as described in
the RomWBW User Guid.
## Version 3.6
### Upgrade Notes
- The FZ80 (S100 FPGA Z80) platform has been renamed to SZ80 (S100 Z80)
and has two configurations. SZ80_std is for the generic S100
Z80 CPU. SZ80_fpga is for the FPGA Z80 SBC.
### New Features
### New Hardware Support
- Support for MSX systems.
## Version 3.5.1
@@ -94,7 +111,6 @@ This is a patch release of v3.5.
- Enhancements to ASSIGN command to automatically assign drives
(Mark Pruden).
### New Hardware Support
- NABU w/ RomWBW Option Board.

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@@ -7,7 +7,7 @@
**RomWBW Introduction** \
Version 3.6 \
Wayne Warthen ([wwarthen@gmail.com](mailto:wwarthen@gmail.com)) \
22 Sep 2025
29 Sep 2025
# Overview
@@ -361,6 +361,8 @@ let me know if I missed you!
- Randy Merkel provided the ZSDOS Programmers Manual as translated by
Wayne Hortensius.
- Henk Berends added support for the MSX platform.
## Related Projects
Outside of the hardware platforms adapted to RomWBW, there are a variety

View File

@@ -1,6 +1,6 @@
RomWBW Introduction
Wayne Warthen (wwarthen@gmail.com)
22 Sep 2025
29 Sep 2025
@@ -368,6 +368,8 @@ let me know if I missed you!
- Randy Merkel provided the ZSDOS Programmers Manual as translated by
Wayne Hortensius.
- Henk Berends added support for the MSX platform.
Related Projects

View File

@@ -1,7 +1,7 @@
# RomWBW HBIOS CP/M FAT Utility ("FAT.COM")
Author: Wayne Warthen \
Updated: 6-May-2024
Updated: 27-Aug-2025
This application allows copying files between CP/M filesystems and FAT
filesystems (DOS, Windows, Mac, Linux, etc.). The application runs on
@@ -142,10 +142,10 @@ creation.
| Date | Version | Notes |
|------------:|-------- |-------------------------------------------------------------|
| 2-May-2019 | v0.9 | (beta) initial release |
| 7-May-2019 | v0.9.1 | (beta) added REN and DEL |
| 8-May-2019 | v0.9.2 | (beta) handle file collisions w/ user prompt |
| 8-Oct-2019 | v0.9.3 | (beta) fixed incorrect filename buffer size (MAX_FN) |
| 2-May-2019 | v0.9 | (beta) initial release |
| 7-May-2019 | v0.9.1 | (beta) added REN and DEL |
| 8-May-2019 | v0.9.2 | (beta) handle file collisions w/ user prompt |
| 8-Oct-2019 | v0.9.3 | (beta) fixed incorrect filename buffer size (MAX_FN) |
| 10-Oct-2019 | v0.9.4 | (beta) upgraded to FatFs R0.13c |
| 10-Oct-2019 | v0.9.5 | (beta) added MD (make directory) |
| 10-Oct-2019 | v0.9.6 | (beta) added FORMAT |
@@ -153,6 +153,7 @@ creation.
| | | add attributes to directory listing |
| 12-Apr-2021 | v0.9.8 | (beta) support CP/NET drives |
| 12-Oct-2023 | v0.9.9 | (beta) handle updated HBIOS Disk Device call |
| 6-Jan-2024 | v1.0.0 | updated to latest FsFat (v0.15) |
| 6-Jan-2024 | v1.0.0 | updated to latest FsFat (v0.15) |
| | | updated to latest SDCC (v4.3) |
| 6-May-2024 | v1.1.0 | improve floppy format boot record |
| 6-May-2024 | v1.1.0 | improve floppy format boot record |
| 27-Aug-2025 | v1.2.0 | update location of RomWBW IDENT pointer |

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@@ -31,7 +31,7 @@ STKSIZ .EQU $FF
;
; HBIOS SYSTEM CALLS AND ID STRING ADDRESS
;
ROMWBW_ID .EQU $FFFE ; ROMWBW ID STRING ADDRESS
ROMWBW_ID .EQU $FFFC ; ROMWBW ID STRING ADDRESS
HBIOS_SYS .EQU $FFF0 ; HBIOS SYSCALL ADDRESS
H_SYSGET .EQU $F8 ; GET SYSTEM INFO

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@@ -1,4 +1,4 @@
IDENT .EQU $FFFE ; loc of RomWBW HBIOS ident ptr
IDENT .EQU $FFFC ; loc of RomWBW HBIOS ident ptr
;
BF_SYSVER .EQU $F1 ; BIOS: VER function
BF_SYSGET .EQU $F8 ; HBIOS: SYSGET function

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@@ -446,7 +446,7 @@ IDBIO:
;
IDBIO1:
; Check for RomWBW (HBIOS)
LD HL,($FFFE) ; HL := HBIOS ident location
LD HL,($FFFC) ; HL := HBIOS ident location
LD A,'W' ; First byte of ident
CP (HL) ; Compare
JR NZ,IDBIO2 ; Not HBIOS

View File

@@ -239,7 +239,7 @@ IDBIO:
;
IDBIO1:
; Check for RomWBW (HBIOS)
LD HL,(0FFFEH) ; HL := HBIOS ident location
LD HL,(0FFFCH) ; HL := HBIOS ident location
LD A,'W' ; First byte of ident
CP (HL) ; Compare
JR NZ,IDBIO2 ; Not HBIOS

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@@ -180,7 +180,7 @@ IDBIO:
;
IDBIO1:
; Check for RomWBW (HBIOS)
LD HL,(0FFFEH) ; HL := HBIOS ident location
LD HL,(0FFFCH) ; HL := HBIOS ident location
LD A,'W' ; First byte of ident
CP (HL) ; Compare
JR NZ,IDBIO2 ; Not HBIOS

View File

@@ -175,7 +175,7 @@ IDBIO:
;
IDBIO1:
; Check for RomWBW (HBIOS)
LD HL,(0FFFEH) ; HL := HBIOS ident location
LD HL,(0FFFCH) ; HL := HBIOS ident location
LD A,'W' ; First byte of ident
CP (HL) ; Compare
JR NZ,IDBIO2 ; Not HBIOS

View File

@@ -273,7 +273,7 @@ IDBIO:
;
IDBIO1:
; Check for RomWBW (HBIOS)
LD HL,(0FFFEH) ; HL := HBIOS ident location
LD HL,(0FFFCH) ; HL := HBIOS ident location
LD A,'W' ; First byte of ident
CP (HL) ; Compare
JR NZ,IDBIO2 ; Not HBIOS

View File

@@ -190,7 +190,7 @@ init:
ldir ; do the copy
;
; determine end of CBIOS (assume HBIOS for now)
ld hl,($FFFE) ; get proxy start address
ld hl,($FFFC) ; get proxy start address
ld (bioend),hl ; save as CBIOS end address
;
; check for UNA (UBIOS)

View File

@@ -29,7 +29,7 @@ bf_sysres_int .equ $00 ; reset hbios internal
bf_sysres_warm .equ $01 ; warm start (restart boot loader)
bf_sysres_cold .equ $02 ; cold start
;
ident .equ $FFFE ; loc of RomWBW HBIOS ident ptr
ident .equ $FFFC ; loc of RomWBW HBIOS ident ptr
;
;=======================================================================
;

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@@ -1,299 +1,299 @@
;==============================================================================
; REBOOT - Allows the user to Cold or Warm Boot the RomWBW System
; Version 1.0 12-October-2024
;==============================================================================
;
; Author: MartinR (October 2024)
; Based **very heavily** on code by Wayne Warthen (wwarthen@gmail.com)
;______________________________________________________________________________
;
; Usage:
; REBOOT [/C] [/W] [/?]
; ex: REBOOT Display version and usage
; REBOOT /? Display version and usage
; REBOOT /C Cold boot RomWBW system
; REBOOT /W Warm boot RomWBW system
;
; Operation:
; Cold or warm boots a RomWBW system depending on the user option selected.
;
; This code will only execute on a Z80 CPU (or derivitive)
;
; This source code assembles with TASM V3.2 under Windows-11 using the
; following command line:
; tasm -80 -g3 -l REBOOT.ASM REBOOT.COM
; ie: Z80 CPU; output format 'binary' named .COM (rather than .OBJ)
; and includes a symbol table as part of the listing file.
;______________________________________________________________________________
;
; Change Log:
; 2024-09-11 [WBW] Release of RomWBW CPU Speed Selector v1.0 used as the basis
; 2024-10-12 [MR ] Initial release of version 1.0
;______________________________________________________________________________
;
; Include Files
;
#include "../../ver.inc" ; Used for building RomWBW
#include "../../HBIOS/hbios.inc"
;#include "ver.inc" ; Used for testing purposes....
;#include "hbios.inc" ; ....during code development
;
;===============================================================================
;
; General operational equates (should not requre adjustment)
;
stksiz .equ $40 ; Working stack size
;
restart .equ $0000 ; CP/M restart vector
bdos .equ $0005 ; BDOS invocation vector
;
bf_sysreset .equ $F0 ; restart system
bf_sysres_int .equ $00 ; reset hbios internal
bf_sysres_warm .equ $01 ; warm start (restart boot loader)
bf_sysres_cold .equ $02 ; cold start
;
ident .equ $FFFE ; loc of RomWBW HBIOS ident ptr
;
;===============================================================================
;
.org $0100 ; standard CP/M TPA executable
;
; setup stack (save old value)
ld (stksav),sp ; save stack
ld sp,stack ; set new stack
;
call crlf
ld de,str_banner ; banner
call prtstr
;
; initialization
call init ; initialize
jr nz,exit ; abort if init fails
;
call main ; do the real work
;
exit:
; clean up and return to command processor
call crlf ; formatting
ld sp,(stksav) ; restore stack
jp restart ; return to CP/M via restart
;
;
;===============================================================================
; Main Program
;===============================================================================
;
; Initialization
;
init:
; check for UNA (UBIOS)
ld a,($FFFD) ; fixed location of UNA API vector
cp $C3 ; jp instruction?
jr nz,initwbw ; if not, not UNA
ld hl,($FFFE) ; get jp address
ld a,(hl) ; get byte at target address
cp $FD ; first byte of UNA push ix instruction
jr nz,initwbw ; if not, not UNA
inc hl ; point to next byte
ld a,(hl) ; get next byte
cp $E5 ; second byte of UNA push ix instruction
jr nz,initwbw ; if not, not UNA
jp err_una ; UNA not supported
;
initwbw:
; get location of config data and verify integrity
ld hl,(ident) ; HL := adr or RomWBW HBIOS ident
ld a,(hl) ; get first byte of RomWBW marker
cp 'W' ; match?
jp nz,err_inv ; abort with invalid config block
inc hl ; next byte (marker byte 2)
ld a,(hl) ; load it
cp ~'W' ; match?
jp nz,err_inv ; abort with invalid config block
inc hl ; next byte (major/minor version)
ld a,(hl) ; load it
cp rmj << 4 | rmn ; match?
jp nz,err_ver ; abort with invalid os version
;
initz:
; initialization complete
xor a ; signal success
ret ; return
;
;
;
main:
; skip to start of first command line parameter
ld ix,$0081 ; point to start of parm area (past length byte)
call nonblank ; skip to next non-blank char
cp '/' ; option prefix?
jr nz,usage ; display help info & exit if nothing to do
;
; process any options
inc ix ; fetch next character and process
ld a,(ix)
call upcase ; ensure it's an upper case character
cp 'C' ; if it's a 'C' then
jr z,cboot ; do a cold boot.
cp 'W' ; if it's a 'W' then
jr z,wboot ; do a warm boot.
cp '?' ; if it's a '?' then
jr z,usage ; display usage info and exit.
jr err_parm ; or not a recognised option, so report and exit.
;
; Handle Usage Information
;
usage:
call crlf2 ; display the options for this utility
ld de,str_usage
call prtstr
or $FF
ret ; exit back out to CP/M CCP
;
; Handle Warm Boot
;
wboot:
ld de,str_warmboot ; message
call prtstr ; display it
ld b,bf_sysreset ; system restart
ld c,bf_sysres_warm ; warm start
call $fff0 ; call hbios
;
; Handle Cold Boot
;
cboot:
ld de,str_coldboot ; message
call prtstr ; display it
ld b,bf_sysreset ; system restart
ld c,bf_sysres_cold ; cold start
call $fff0 ; call hbios
;
;===============================================================================
; Error Handlers
;===============================================================================
;
err_una:
ld de,str_err_una
jr err_ret
err_inv:
ld de,str_err_inv
jr err_ret
err_ver:
ld de,str_err_ver
jr err_ret
err_parm:
ld de,str_err_parm
jr err_ret
;
err_ret:
call crlf2
call prtstr
or $FF ; signal error
ret
;
;===============================================================================
; Utility Routines
;===============================================================================
;
; Print character in A without destroying any registers
;
prtchr:
push af
push bc ; save registers
push de
push hl
ld e,a ; character to print in E
ld c,$02 ; BDOS function to output a character
call bdos ; do it
pop hl ; restore registers
pop de
pop bc
pop af
ret
;
; Start a new line
;
crlf2:
call crlf ; two of them
crlf:
push af ; preserve AF
ld a,13 ; <CR>
call prtchr ; print it
ld a,10 ; <LF>
call prtchr ; print it
pop af ; restore AF
ret
;
; Print a zero terminated string at (de) without destroying any registers
;
prtstr:
push af
push de
;
prtstr1:
ld a,(de) ; get next char
or a
jr z,prtstr2
call prtchr
inc de
jr prtstr1
;
prtstr2:
pop de ; restore registers
pop af
ret
;
; Get the next non-blank character from (ix)
;
nonblank:
ld a,(ix) ; load next character
or a ; string ends with a null
ret z ; if null, return pointing to null
cp ' ' ; check for blank
ret nz ; return if not blank
inc ix ; if blank, increment character pointer
jr nonblank ; and loop
;
; Convert character in A to uppercase
;
upcase:
cp 'a' ; if below 'a'
ret c ; ... do nothing and return
cp 'z' + 1 ; if above 'z'
ret nc ; ... do nothing and return
res 5,a ; clear bit 5 to make lower case -> upper case
ret ; and return
;
;===============================================================================
; Constants
;===============================================================================
;
str_banner .db "RomWBW Reboot Utility, Version 1.0, 12-Oct-2024\r\n"
.db " Wayne Warthen (wwarthen@gmail.com) & MartinR",0
;
str_warmboot .db "\r\n\r\nWarm booting...\r\n",0
str_coldboot .db "\r\n\r\nCold booting...\r\n",0
;
str_err_una .db " ERROR: UNA not supported by application",0
str_err_inv .db " ERROR: Invalid BIOS (signature missing)",0
str_err_ver .db " ERROR: Unexpected HBIOS version",0
str_err_parm .db " ERROR: Parameter error (REBOOT /? for usage)",0
;
str_usage .db " Usage: REBOOT /? - Display this help info.\r\n"
.db " REBOOT /W - Warm boot system\r\n"
.db " REBOOT /C - Cold boot system\r\n"
.db " Options are case insensitive.\r\n",0
;
;===============================================================================
; Working data
;===============================================================================
;
stksav .dw 0 ; stack pointer saved at start
.fill stksiz,0 ; stack
stack .equ $ ; stack top
;
;===============================================================================
;
;==============================================================================
; REBOOT - Allows the user to Cold or Warm Boot the RomWBW System
; Version 1.0 12-October-2024
;==============================================================================
;
; Author: MartinR (October 2024)
; Based **very heavily** on code by Wayne Warthen (wwarthen@gmail.com)
;______________________________________________________________________________
;
; Usage:
; REBOOT [/C] [/W] [/?]
; ex: REBOOT Display version and usage
; REBOOT /? Display version and usage
; REBOOT /C Cold boot RomWBW system
; REBOOT /W Warm boot RomWBW system
;
; Operation:
; Cold or warm boots a RomWBW system depending on the user option selected.
;
; This code will only execute on a Z80 CPU (or derivitive)
;
; This source code assembles with TASM V3.2 under Windows-11 using the
; following command line:
; tasm -80 -g3 -l REBOOT.ASM REBOOT.COM
; ie: Z80 CPU; output format 'binary' named .COM (rather than .OBJ)
; and includes a symbol table as part of the listing file.
;______________________________________________________________________________
;
; Change Log:
; 2024-09-11 [WBW] Release of RomWBW CPU Speed Selector v1.0 used as the basis
; 2024-10-12 [MR ] Initial release of version 1.0
;______________________________________________________________________________
;
; Include Files
;
#include "../../ver.inc" ; Used for building RomWBW
#include "../../HBIOS/hbios.inc"
;#include "ver.inc" ; Used for testing purposes....
;#include "hbios.inc" ; ....during code development
;
;===============================================================================
;
; General operational equates (should not requre adjustment)
;
stksiz .equ $40 ; Working stack size
;
restart .equ $0000 ; CP/M restart vector
bdos .equ $0005 ; BDOS invocation vector
;
bf_sysreset .equ $F0 ; restart system
bf_sysres_int .equ $00 ; reset hbios internal
bf_sysres_warm .equ $01 ; warm start (restart boot loader)
bf_sysres_cold .equ $02 ; cold start
;
ident .equ $FFFC ; loc of RomWBW HBIOS ident ptr
;
;===============================================================================
;
.org $0100 ; standard CP/M TPA executable
;
; setup stack (save old value)
ld (stksav),sp ; save stack
ld sp,stack ; set new stack
;
call crlf
ld de,str_banner ; banner
call prtstr
;
; initialization
call init ; initialize
jr nz,exit ; abort if init fails
;
call main ; do the real work
;
exit:
; clean up and return to command processor
call crlf ; formatting
ld sp,(stksav) ; restore stack
jp restart ; return to CP/M via restart
;
;
;===============================================================================
; Main Program
;===============================================================================
;
; Initialization
;
init:
; check for UNA (UBIOS)
ld a,($FFFD) ; fixed location of UNA API vector
cp $C3 ; jp instruction?
jr nz,initwbw ; if not, not UNA
ld hl,($FFFE) ; get jp address
ld a,(hl) ; get byte at target address
cp $FD ; first byte of UNA push ix instruction
jr nz,initwbw ; if not, not UNA
inc hl ; point to next byte
ld a,(hl) ; get next byte
cp $E5 ; second byte of UNA push ix instruction
jr nz,initwbw ; if not, not UNA
jp err_una ; UNA not supported
;
initwbw:
; get location of config data and verify integrity
ld hl,(ident) ; HL := adr or RomWBW HBIOS ident
ld a,(hl) ; get first byte of RomWBW marker
cp 'W' ; match?
jp nz,err_inv ; abort with invalid config block
inc hl ; next byte (marker byte 2)
ld a,(hl) ; load it
cp ~'W' ; match?
jp nz,err_inv ; abort with invalid config block
inc hl ; next byte (major/minor version)
ld a,(hl) ; load it
cp rmj << 4 | rmn ; match?
jp nz,err_ver ; abort with invalid os version
;
initz:
; initialization complete
xor a ; signal success
ret ; return
;
;
;
main:
; skip to start of first command line parameter
ld ix,$0081 ; point to start of parm area (past length byte)
call nonblank ; skip to next non-blank char
cp '/' ; option prefix?
jr nz,usage ; display help info & exit if nothing to do
;
; process any options
inc ix ; fetch next character and process
ld a,(ix)
call upcase ; ensure it's an upper case character
cp 'C' ; if it's a 'C' then
jr z,cboot ; do a cold boot.
cp 'W' ; if it's a 'W' then
jr z,wboot ; do a warm boot.
cp '?' ; if it's a '?' then
jr z,usage ; display usage info and exit.
jr err_parm ; or not a recognised option, so report and exit.
;
; Handle Usage Information
;
usage:
call crlf2 ; display the options for this utility
ld de,str_usage
call prtstr
or $FF
ret ; exit back out to CP/M CCP
;
; Handle Warm Boot
;
wboot:
ld de,str_warmboot ; message
call prtstr ; display it
ld b,bf_sysreset ; system restart
ld c,bf_sysres_warm ; warm start
call $fff0 ; call hbios
;
; Handle Cold Boot
;
cboot:
ld de,str_coldboot ; message
call prtstr ; display it
ld b,bf_sysreset ; system restart
ld c,bf_sysres_cold ; cold start
call $fff0 ; call hbios
;
;===============================================================================
; Error Handlers
;===============================================================================
;
err_una:
ld de,str_err_una
jr err_ret
err_inv:
ld de,str_err_inv
jr err_ret
err_ver:
ld de,str_err_ver
jr err_ret
err_parm:
ld de,str_err_parm
jr err_ret
;
err_ret:
call crlf2
call prtstr
or $FF ; signal error
ret
;
;===============================================================================
; Utility Routines
;===============================================================================
;
; Print character in A without destroying any registers
;
prtchr:
push af
push bc ; save registers
push de
push hl
ld e,a ; character to print in E
ld c,$02 ; BDOS function to output a character
call bdos ; do it
pop hl ; restore registers
pop de
pop bc
pop af
ret
;
; Start a new line
;
crlf2:
call crlf ; two of them
crlf:
push af ; preserve AF
ld a,13 ; <CR>
call prtchr ; print it
ld a,10 ; <LF>
call prtchr ; print it
pop af ; restore AF
ret
;
; Print a zero terminated string at (de) without destroying any registers
;
prtstr:
push af
push de
;
prtstr1:
ld a,(de) ; get next char
or a
jr z,prtstr2
call prtchr
inc de
jr prtstr1
;
prtstr2:
pop de ; restore registers
pop af
ret
;
; Get the next non-blank character from (ix)
;
nonblank:
ld a,(ix) ; load next character
or a ; string ends with a null
ret z ; if null, return pointing to null
cp ' ' ; check for blank
ret nz ; return if not blank
inc ix ; if blank, increment character pointer
jr nonblank ; and loop
;
; Convert character in A to uppercase
;
upcase:
cp 'a' ; if below 'a'
ret c ; ... do nothing and return
cp 'z' + 1 ; if above 'z'
ret nc ; ... do nothing and return
res 5,a ; clear bit 5 to make lower case -> upper case
ret ; and return
;
;===============================================================================
; Constants
;===============================================================================
;
str_banner .db "RomWBW Reboot Utility, Version 1.0, 12-Oct-2024\r\n"
.db " Wayne Warthen (wwarthen@gmail.com) & MartinR",0
;
str_warmboot .db "\r\n\r\nWarm booting...\r\n",0
str_coldboot .db "\r\n\r\nCold booting...\r\n",0
;
str_err_una .db " ERROR: UNA not supported by application",0
str_err_inv .db " ERROR: Invalid BIOS (signature missing)",0
str_err_ver .db " ERROR: Unexpected HBIOS version",0
str_err_parm .db " ERROR: Parameter error (REBOOT /? for usage)",0
;
str_usage .db " Usage: REBOOT /? - Display this help info.\r\n"
.db " REBOOT /W - Warm boot system\r\n"
.db " REBOOT /C - Cold boot system\r\n"
.db " Options are case insensitive.\r\n",0
;
;===============================================================================
; Working data
;===============================================================================
;
stksav .dw 0 ; stack pointer saved at start
.fill stksiz,0 ; stack
stack .equ $ ; stack top
;
;===============================================================================
;
.end

File diff suppressed because it is too large Load Diff

View File

@@ -68,7 +68,7 @@ bf_sysreset .equ $F0 ; restart system
bf_sysres_int .equ $00 ; reset hbios internal
bf_sysres_warm .equ $01 ; warm start (restart boot loader)
;
ident .equ $FFFE ; loc of RomWBW HBIOS ident ptr
ident .equ $FFFC ; loc of RomWBW HBIOS ident ptr
;
sigbyte1 .equ $A5 ; 1st sig byte boot info sector (bb_sig)
sigbyte2 .equ $5A ; 2nd sig byte boot info sector (bb_sig)

View File

@@ -1,399 +1,399 @@
;===============================================================================
; STARTUP - Application run automatically at OS startup
;
;===============================================================================
;
; Author: Wayne Warthen (wwarthen@gmail.com)
;_______________________________________________________________________________
;
; Usage:
; MODE [/?]
;
; Operation:
; Determines if STARTUP.CMD exists on startup drive, user 0. If it is
; found, it is run via SUBMIT.
;_______________________________________________________________________________
;
; Change Log:
; 2017-12-01 [WBW] Initial release
;_______________________________________________________________________________
;
; ToDo:
; 1) Detect OS type (CP/M or ZSYS) and run different batch files as a result.
;_______________________________________________________________________________
;
;===============================================================================
; Definitions
;===============================================================================
;
stksiz .equ $40 ; Working stack size
;
restart .equ $0000 ; CP/M restart vector
bdos .equ $0005 ; BDOS invocation vector
;
ident .equ $FFFE ; loc of RomWBW HBIOS ident ptr
;
rmj .equ 2 ; intended CBIOS version - major
rmn .equ 9 ; intended CBIOS version - minor
;
bf_cioinit .equ $04 ; HBIOS: CIOINIT function
bf_cioquery .equ $05 ; HBIOS: CIOQUERY function
bf_ciodevice .equ $06 ; HBIOS: CIODEVICE function
bf_sysget .equ $F8 ; HBIOS: SYSGET function
;
;===============================================================================
; Code Section
;===============================================================================
;
.org $100
;
; setup stack (save old value)
ld (stksav),sp ; save stack
ld sp,stack ; set new stack
;
; initialization
call init ; initialize
jr nz,exit ; abort if init fails
;
; process
call process ; do main processing
jr nz,exit ; abort on error
;
exit: ; clean up and return to command processor
call crlf ; formatting
ld sp,(stksav) ; restore stack
;jp restart ; return to CP/M via restart
ret ; return to CP/M w/o restart
;
; Initialization
;
init:
;
initx
; initialization complete
xor a ; signal success
ret ; return
;
; Process
;
process:
; skip to start of first parm
ld ix,$81 ; point to start of parm area (past len byte)
call nonblank ; skip to next non-blank char
jp z,runcmd ; no parms, do command processing
;
process1:
; process options (if any)
cp '/' ; option prefix?
jp nz,erruse ; invalid option introducer
call option ; process option
ret nz ; some options mean we are done (e.g., "/?")
inc ix ; skip option character
call nonblank ; skip whitespace
jr nz,process1 ; continue option checking
jp runcmd ; end of parms, do cmd processing
;
;
;
runcmd:
call ldfil ; load executable
ret nz ; abort on error
;
xor a
ret
;
; Load file for execution
;
ldfil:
ld c,15 ; BDOS function: Open File
ld de,fcb ; pointer to FCB
call bdos ; do it
inc a ; check for err, 0xFF --> 0x00
jp z,errfil ; handle file not found err
;
ld c,16 ; BDOS function: Close File
ld de,fcb ; pointer to FCB
call bdos ; do it
inc a ; check for err, 0xFF --> 0x00
jp z,errfil ; handle file close err
;
xor a ; signal success
ret ; done
;
; Handle options
;
option:
;
inc ix ; next char
ld a,(ix) ; get it
cp '?' ; is it a '?' as expected?
jp z,usage ; yes, display usage
jp errprm ; anything else is an error
;
; Display usage
;
usage:
;
call crlf ; formatting
ld de,msgban ; point to version message part 1
call prtstr ; print it
call crlf2 ; blank line
ld de,msguse ; point to usage message
call prtstr ; print it
or $FF ; signal no action performed
ret ; and return
;
; Print character in A without destroying any registers
;
prtchr:
push bc ; save registers
push de
push hl
ld e,a ; character to print in E
ld c,$02 ; BDOS function to output a character
call bdos ; do it
pop hl ; restore registers
pop de
pop bc
ret
;
prtdot:
;
; shortcut to print a dot preserving all regs
push af ; save af
ld a,'.' ; load dot char
call prtchr ; print it
pop af ; restore af
ret ; done
;
; Print a zero terminated string at (DE) without destroying any registers
;
prtstr:
push de
;
prtstr1:
ld a,(de) ; get next char
or a
jr z,prtstr2
call prtchr
inc de
jr prtstr1
;
prtstr2:
pop de ; restore registers
ret
;
; Print the value in A in hex without destroying any registers
;
prthex:
push af ; save AF
push de ; save DE
call hexascii ; convert value in A to hex chars in DE
ld a,d ; get the high order hex char
call prtchr ; print it
ld a,e ; get the low order hex char
call prtchr ; print it
pop de ; restore DE
pop af ; restore AF
ret ; done
;
; print the hex word value in bc
;
prthexword:
push af
ld a,b
call prthex
ld a,c
call prthex
pop af
ret
;
; print the hex dword value in de:hl
;
prthex32:
push bc
push de
pop bc
call prthexword
push hl
pop bc
call prthexword
pop bc
ret
;
; Convert binary value in A to ascii hex characters in DE
;
hexascii:
ld d,a ; save A in D
call hexconv ; convert low nibble of A to hex
ld e,a ; save it in E
ld a,d ; get original value back
rlca ; rotate high order nibble to low bits
rlca
rlca
rlca
call hexconv ; convert nibble
ld d,a ; save it in D
ret ; done
;
; Convert low nibble of A to ascii hex
;
hexconv:
and $0F ; low nibble only
add a,$90
daa
adc a,$40
daa
ret
;
; Print value of A or HL in decimal with leading zero suppression
; Use prtdecb for A or prtdecw for HL
;
prtdecb:
push hl
ld h,0
ld l,a
call prtdecw ; print it
pop hl
ret
;
prtdecw:
push af
push bc
push de
push hl
call prtdec0
pop hl
pop de
pop bc
pop af
ret
;
prtdec0:
ld e,'0'
ld bc,-10000
call prtdec1
ld bc,-1000
call prtdec1
ld bc,-100
call prtdec1
ld c,-10
call prtdec1
ld e,0
ld c,-1
prtdec1:
ld a,'0' - 1
prtdec2:
inc a
add hl,bc
jr c,prtdec2
sbc hl,bc
cp e
ret z
ld e,0
call prtchr
ret
;
; Start a new line
;
crlf2:
call crlf ; two of them
crlf:
push af ; preserve AF
ld a,13 ; <CR>
call prtchr ; print it
ld a,10 ; <LF>
call prtchr ; print it
pop af ; restore AF
ret
;
; Get the next non-blank character from (HL).
;
nonblank:
ld a,(ix) ; load next character
or a ; string ends with a null
ret z ; if null, return pointing to null
cp ' ' ; check for blank
ret nz ; return if not blank
inc ix ; if blank, increment character pointer
jr nonblank ; and loop
;
; Convert character in A to uppercase
;
ucase:
cp 'a' ; if below 'a'
ret c ; ... do nothing and return
cp 'z' + 1 ; if above 'z'
ret nc ; ... do nothing and return
res 5,a ; clear bit 5 to make lower case -> upper case
ret ; and return
;
; Add the value in A to HL (HL := HL + A)
;
addhl:
add a,l ; A := A + L
ld l,a ; Put result back in L
ret nc ; if no carry, we are done
inc h ; if carry, increment H
ret ; and return
;
; Jump indirect to address in HL
;
jphl:
jp (hl)
;
; Errors
;
erruse: ; command usage error (syntax)
ld de,msguse
jr err
;
errprm: ; command parameter error (syntax)
ld de,msgprm
jr err
;
errfil: ; STARTUP.CMD file not present
ld de,msgfil
jr err
;
err: ; print error string and return error signal
call crlf ; print newline
;
err1: ; without the leading crlf
call prtstr ; print error string
;
err2: ; without the string
; call crlf ; print newline
or $FF ; signal error
ret ; done
;
;===============================================================================
; Storage Section
;===============================================================================
;
fcb .db 0 ; Drive code, 0 = current drive
.db "START " ; File name, 8 chars
.db "COM" ; File type, 3 chars
.fill 36-($-fcb),0 ; zero fill remainder of fcb
;
cmdblk .db cmdlen ; length
cmdtxt .db " B:SUBMIT START"
.db 0 ; null terminator
cmdlen .equ $ - cmdtxt
cmdend .equ $
;
stksav .dw 0 ; stack pointer saved at start
.fill stksiz,0 ; stack
stack .equ $ ; stack top
;
; Messages
;
msgban .db "STARTUP v1.0, 01-Dec-2017",13,10
.db "Copyright (C) 2017, Wayne Warthen, GNU GPL v3",0
msguse .db "Usage: STARTUP [/?]",0
msgprm .db "Parameter error (STARTUP /? for usage)",0
msgfil .db "STARTUP.CMD file missing",0
;
.end
;===============================================================================
; STARTUP - Application run automatically at OS startup
;
;===============================================================================
;
; Author: Wayne Warthen (wwarthen@gmail.com)
;_______________________________________________________________________________
;
; Usage:
; MODE [/?]
;
; Operation:
; Determines if STARTUP.CMD exists on startup drive, user 0. If it is
; found, it is run via SUBMIT.
;_______________________________________________________________________________
;
; Change Log:
; 2017-12-01 [WBW] Initial release
;_______________________________________________________________________________
;
; ToDo:
; 1) Detect OS type (CP/M or ZSYS) and run different batch files as a result.
;_______________________________________________________________________________
;
;===============================================================================
; Definitions
;===============================================================================
;
stksiz .equ $40 ; Working stack size
;
restart .equ $0000 ; CP/M restart vector
bdos .equ $0005 ; BDOS invocation vector
;
ident .equ $FFFC ; loc of RomWBW HBIOS ident ptr
;
rmj .equ 2 ; intended CBIOS version - major
rmn .equ 9 ; intended CBIOS version - minor
;
bf_cioinit .equ $04 ; HBIOS: CIOINIT function
bf_cioquery .equ $05 ; HBIOS: CIOQUERY function
bf_ciodevice .equ $06 ; HBIOS: CIODEVICE function
bf_sysget .equ $F8 ; HBIOS: SYSGET function
;
;===============================================================================
; Code Section
;===============================================================================
;
.org $100
;
; setup stack (save old value)
ld (stksav),sp ; save stack
ld sp,stack ; set new stack
;
; initialization
call init ; initialize
jr nz,exit ; abort if init fails
;
; process
call process ; do main processing
jr nz,exit ; abort on error
;
exit: ; clean up and return to command processor
call crlf ; formatting
ld sp,(stksav) ; restore stack
;jp restart ; return to CP/M via restart
ret ; return to CP/M w/o restart
;
; Initialization
;
init:
;
initx
; initialization complete
xor a ; signal success
ret ; return
;
; Process
;
process:
; skip to start of first parm
ld ix,$81 ; point to start of parm area (past len byte)
call nonblank ; skip to next non-blank char
jp z,runcmd ; no parms, do command processing
;
process1:
; process options (if any)
cp '/' ; option prefix?
jp nz,erruse ; invalid option introducer
call option ; process option
ret nz ; some options mean we are done (e.g., "/?")
inc ix ; skip option character
call nonblank ; skip whitespace
jr nz,process1 ; continue option checking
jp runcmd ; end of parms, do cmd processing
;
;
;
runcmd:
call ldfil ; load executable
ret nz ; abort on error
;
xor a
ret
;
; Load file for execution
;
ldfil:
ld c,15 ; BDOS function: Open File
ld de,fcb ; pointer to FCB
call bdos ; do it
inc a ; check for err, 0xFF --> 0x00
jp z,errfil ; handle file not found err
;
ld c,16 ; BDOS function: Close File
ld de,fcb ; pointer to FCB
call bdos ; do it
inc a ; check for err, 0xFF --> 0x00
jp z,errfil ; handle file close err
;
xor a ; signal success
ret ; done
;
; Handle options
;
option:
;
inc ix ; next char
ld a,(ix) ; get it
cp '?' ; is it a '?' as expected?
jp z,usage ; yes, display usage
jp errprm ; anything else is an error
;
; Display usage
;
usage:
;
call crlf ; formatting
ld de,msgban ; point to version message part 1
call prtstr ; print it
call crlf2 ; blank line
ld de,msguse ; point to usage message
call prtstr ; print it
or $FF ; signal no action performed
ret ; and return
;
; Print character in A without destroying any registers
;
prtchr:
push bc ; save registers
push de
push hl
ld e,a ; character to print in E
ld c,$02 ; BDOS function to output a character
call bdos ; do it
pop hl ; restore registers
pop de
pop bc
ret
;
prtdot:
;
; shortcut to print a dot preserving all regs
push af ; save af
ld a,'.' ; load dot char
call prtchr ; print it
pop af ; restore af
ret ; done
;
; Print a zero terminated string at (DE) without destroying any registers
;
prtstr:
push de
;
prtstr1:
ld a,(de) ; get next char
or a
jr z,prtstr2
call prtchr
inc de
jr prtstr1
;
prtstr2:
pop de ; restore registers
ret
;
; Print the value in A in hex without destroying any registers
;
prthex:
push af ; save AF
push de ; save DE
call hexascii ; convert value in A to hex chars in DE
ld a,d ; get the high order hex char
call prtchr ; print it
ld a,e ; get the low order hex char
call prtchr ; print it
pop de ; restore DE
pop af ; restore AF
ret ; done
;
; print the hex word value in bc
;
prthexword:
push af
ld a,b
call prthex
ld a,c
call prthex
pop af
ret
;
; print the hex dword value in de:hl
;
prthex32:
push bc
push de
pop bc
call prthexword
push hl
pop bc
call prthexword
pop bc
ret
;
; Convert binary value in A to ascii hex characters in DE
;
hexascii:
ld d,a ; save A in D
call hexconv ; convert low nibble of A to hex
ld e,a ; save it in E
ld a,d ; get original value back
rlca ; rotate high order nibble to low bits
rlca
rlca
rlca
call hexconv ; convert nibble
ld d,a ; save it in D
ret ; done
;
; Convert low nibble of A to ascii hex
;
hexconv:
and $0F ; low nibble only
add a,$90
daa
adc a,$40
daa
ret
;
; Print value of A or HL in decimal with leading zero suppression
; Use prtdecb for A or prtdecw for HL
;
prtdecb:
push hl
ld h,0
ld l,a
call prtdecw ; print it
pop hl
ret
;
prtdecw:
push af
push bc
push de
push hl
call prtdec0
pop hl
pop de
pop bc
pop af
ret
;
prtdec0:
ld e,'0'
ld bc,-10000
call prtdec1
ld bc,-1000
call prtdec1
ld bc,-100
call prtdec1
ld c,-10
call prtdec1
ld e,0
ld c,-1
prtdec1:
ld a,'0' - 1
prtdec2:
inc a
add hl,bc
jr c,prtdec2
sbc hl,bc
cp e
ret z
ld e,0
call prtchr
ret
;
; Start a new line
;
crlf2:
call crlf ; two of them
crlf:
push af ; preserve AF
ld a,13 ; <CR>
call prtchr ; print it
ld a,10 ; <LF>
call prtchr ; print it
pop af ; restore AF
ret
;
; Get the next non-blank character from (HL).
;
nonblank:
ld a,(ix) ; load next character
or a ; string ends with a null
ret z ; if null, return pointing to null
cp ' ' ; check for blank
ret nz ; return if not blank
inc ix ; if blank, increment character pointer
jr nonblank ; and loop
;
; Convert character in A to uppercase
;
ucase:
cp 'a' ; if below 'a'
ret c ; ... do nothing and return
cp 'z' + 1 ; if above 'z'
ret nc ; ... do nothing and return
res 5,a ; clear bit 5 to make lower case -> upper case
ret ; and return
;
; Add the value in A to HL (HL := HL + A)
;
addhl:
add a,l ; A := A + L
ld l,a ; Put result back in L
ret nc ; if no carry, we are done
inc h ; if carry, increment H
ret ; and return
;
; Jump indirect to address in HL
;
jphl:
jp (hl)
;
; Errors
;
erruse: ; command usage error (syntax)
ld de,msguse
jr err
;
errprm: ; command parameter error (syntax)
ld de,msgprm
jr err
;
errfil: ; STARTUP.CMD file not present
ld de,msgfil
jr err
;
err: ; print error string and return error signal
call crlf ; print newline
;
err1: ; without the leading crlf
call prtstr ; print error string
;
err2: ; without the string
; call crlf ; print newline
or $FF ; signal error
ret ; done
;
;===============================================================================
; Storage Section
;===============================================================================
;
fcb .db 0 ; Drive code, 0 = current drive
.db "START " ; File name, 8 chars
.db "COM" ; File type, 3 chars
.fill 36-($-fcb),0 ; zero fill remainder of fcb
;
cmdblk .db cmdlen ; length
cmdtxt .db " B:SUBMIT START"
.db 0 ; null terminator
cmdlen .equ $ - cmdtxt
cmdend .equ $
;
stksav .dw 0 ; stack pointer saved at start
.fill stksiz,0 ; stack
stack .equ $ ; stack top
;
; Messages
;
msgban .db "STARTUP v1.0, 01-Dec-2017",13,10
.db "Copyright (C) 2017, Wayne Warthen, GNU GPL v3",0
msguse .db "Usage: STARTUP [/?]",0
msgprm .db "Parameter error (STARTUP /? for usage)",0
msgfil .db "STARTUP.CMD file missing",0
;
.end

File diff suppressed because it is too large Load Diff

View File

@@ -12,6 +12,7 @@ call BuildZZRCC || exit /b
call BuildZRC512 || exit /b
call BuildSZ80 || exit /b
call BuildEZ512 || exit /b
call BuildMSX || exit /b
if "%1" == "dist" (
call Clean || exit /b

4
Source/BuildMSX.cmd Normal file
View File

@@ -0,0 +1,4 @@
@echo off
setlocal
pushd MSX && call Build || exit /b & popd

View File

@@ -26,3 +26,4 @@ pushd Doc && call Clean & popd
pushd ZRC && call Clean & popd
pushd Z1RCC && call Clean & popd
pushd ZZRCC && call Clean & popd
pushd MSX && call Clean & popd

View File

@@ -1729,7 +1729,7 @@ to format and test floppy disk media.
#### Syntax
`FDU`
| `FDU`
#### Usage
@@ -1850,7 +1850,7 @@ make it simpler to format media including floppy disks.
#### Syntax
`FORMAT`
| `FORMAT`
#### Notes
@@ -1877,16 +1877,16 @@ against HBIOS Character Units.
#### Syntax
`HTALK COMn:`
| `HTALK `*<unit>*
#### Usage
`HTALK` operates at the HBIOS level.
The parameter to `TALK` refers to a HBIOS character unit. Upon
execution all characters typed at the console will be sent to the
device specified and all characters received by the specified device
will be echoed on the console.
The *<unit>* parameter to `TALK` is a single number referring to an HBIOS
character unit. Upon execution all characters typed at the console will
be sent to the device specified and all characters received by the
specified device will be echoed on the console.
Press Control+Z on the console to terminate the application.
@@ -1913,8 +1913,8 @@ ports dynamically.
#### Syntax
`MODE /?`
`MODE COM`*`<n>`*`: [`*`<baud>`*`[,`*`<parity>`*`[,`*`<databits>`*`[,`*`<stopbits>`*`]]]] [/P]`
| `MODE /?`
| `MODE COM`*`<n>`*`: [`*`<baud>`*`[,`*`<parity>`*`[,`*`<databits>`*`[,`*`<stopbits>`*`]]]] [/P]`
`/?` displays command usage and version information
@@ -2029,7 +2029,7 @@ and set the time and registers of the RTC.
#### Syntax
`RTC`
| `RTC`
#### Usage
@@ -2088,7 +2088,7 @@ the `SET` command
#### Syntax
`SLABEL [unit.slice=label] [/?]`
| `SLABEL [unit.slice=label] [/?]`
`unit.slice` the disk unit and slice number to apply the new label to. This
is in the same format as when booting the system to a disk
@@ -2416,7 +2416,7 @@ shown on your console. The `TALK` application does this.
#### Syntax
`TALK [TTY:|CRT:|BAT:UC1:]`
| `TALK [TTY:|CRT:|BAT:|UC1:]`
#### Usage
@@ -2453,7 +2453,7 @@ Z80 port of Palo Alto Tiny Basic.
#### Syntax
`TBASIC` [*\<filename\>*]
| `TBASIC` [*\<filename\>*]
#### Usage
@@ -2484,9 +2484,10 @@ displays the value of the counter.
#### Syntax
`TIMER`
`TIMER /?`
`TIMER /C`
| `TIMER`
| `TIMER /?`
| `TIMER /C`
| `TIMER /Z`
#### Usage
@@ -2494,9 +2495,11 @@ Use `TIMER` to display the current value of the counter.
Use `TIMER /C` to display the value of the counter continuously.
Use `TIMER /Z` to zero the seconds counter.
The display of the counter will be something like this:
`13426 Ticks 268.52 Seconds`
`2859 Ticks 24.18 Seconds 0:00:24.18 HH:MM:SS`
The first number is the total number of ticks since system startup, where
there are 50 ticks per second. The second number is the total number of
@@ -2504,15 +2507,18 @@ seconds since system startup. Numbers are displayed in decimal format.
#### Notes
The seconds value is displayed with a fractional value which is not a
an actual fraction, but rather the number of ticks past the seconds
rollover. All values are in hex.
Not all systems will have a system timer. In this case, the
`TIMER` command will output 0 for both ticks and seconds and never
increment.
The resolution of the timer is determined by the system timer
frequency which is typically 50Hz. This means that the seconds
fraction will increment 0.02 seconds with each timer tick.
The primary use of the `TIMER` application is to test the system
timer functionality of your system.
In theory, you could capture the value before and after some process
you want to time.
timer functionality of your system. However, it can be used to
capture the value before and after some process you want to measure
elapsed runtime.
#### Etymology
@@ -2537,7 +2543,7 @@ whether support for it is included in the RomWBW HBIOS configuration
#### Syntax
`TUNE `*`<filename>`* `*`<options>`*`
| `TUNE `*`<filename>`* `*`<options>`*`
*`<filename>`* is the name of a sound file ending in .PT2, .PT3, or
.MYM
@@ -2672,7 +2678,7 @@ chips.
#### Syntax
`VGMPLAY `*`<filename>`*
| `VGMPLAY `*`<filename>`*
*`<filename>`* is the name of a sound file ending in .VGM
@@ -2915,7 +2921,7 @@ to Z-System compatibility.
#### Syntax
`ZMD` *\<mode\>\<protocol\>\<unit\>* [*\<filename\>*]
| `ZMD` *\<mode\>\<protocol\>\<unit\>* [*\<filename\>*]
where *\<mode\>* can be:\
**` S -`** Send file from BBS \
@@ -2995,7 +3001,7 @@ that is independent of the console running `ZMP`.
#### Syntax
`ZMD` *[\<unit\>]*
| `ZMD` *[\<unit\>]*
*\<unit\>* can specify a single digit (0-9) indicating
the RomWBW Character Unit to use for the modem port.

View File

@@ -116,6 +116,7 @@ Others
| [eZ80 for RCBus Module]^8^, 512K RAM/ROM | RCBus | RCEZ80_std.rom | 115200 |
| [Genesis Z180 System]^7^ | STD | GMZ180_std.rom | 115200 |
| [Heath H8 Z80 System]^5^ | H8 | HEATH_std.rom | 115200 |
| [MSX]^9^ | MSX | MSX_std.rom | 115200 |
| [NABU w/ RomWBW Option Board]^5^ | NABU | NABU_std.rom | 115200 |
| [S100 Computers Z180 SBC]^4^ | S100 | S100_std.rom | 57600 |
| [S100 Computers Z80 CPU]^4^ | S100 | SZ80_std.rom | 9600 |
@@ -132,6 +133,7 @@ Others
| ^6^Designed by Alan Cox
| ^7^Designed by Doug Jackson
| ^8^Designed by Dean Netherton
| ^9^MSX Port by Henk Berends
`\clearpage`{=latex}
@@ -625,6 +627,47 @@ It also has an interface to the RetroBrew bus (ECB) for access to additional per
`\clearpage`{=latex}
## MSX
Support for standard MSX hardware by Henk Berends
The default configuration is for a European MSX 2 (PAL) with international keyboard and 512KB RAM Mapper extension.
#### ROM Image File: MSX_std.rom
| | |
|-------------------|---------------|
| Bus | MSX |
| Default CPU Speed | 3.579 MHz |
| Interrupts | Mode 1 |
| System Timer | TMS |
| Serial Default | 115200 Baud |
| Memory Manager | MSX |
| ROM Size | 0 KB |
| RAM Size | 448 KB |
#### Supported Hardware
- RP5C01: IO=180
- UART: IO=128
- UART: IO=136
- TMS: MODE=MSXMKY, IO=152, SCREEN=80X24, KEYBOARD=MKY, INTERRUPTS ENABLED
- MKY: IO=168
- MD: TYPE=RAM
- IDE: MODE=RC, IO=16, MASTER
- IDE: MODE=RC, IO=16, SLAVE
- PPIDE: MODE=MSX_BEER, IO=48, MASTER
- PPIDE: MODE=MSX_BEER, NO SLAVE
- AY38910: MODE=MSX, IO=160, CLOCK=1789772 HZ
#### Notes:
- MSX 1 can be used with the TMS VDP set to 40 columns mode.
- Storage options are the BEER IDE and SODA IDE interfaces.
- Serial option is a 16550 UART interface.
`\clearpage`{=latex}
## NABU w/ RomWBW Option Board
No modifications to the NABU motherboard needed. Leave the standard NABU ROM in its socket

View File

@@ -345,6 +345,8 @@ please let me know if I missed you!
* Randy Merkel provided the ZSDOS Programmer's Manual as translated
by Wayne Hortensius.
* Henk Berends added support for the MSX platform.
`\clearpage`{=latex}
## Related Projects

View File

@@ -272,5 +272,6 @@ call Build NABU std || exit /b
call Build SZ80 std || exit /b
call Build SZ80 fpga || exit /b
call Build UNA std || exit /b
call Build MSX std || exit /b
goto :eof

View File

@@ -27,7 +27,7 @@ $ErrorAction = 'Stop'
# UNA BIOS is simply imbedded, it is not built here.
#
$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "EZZ80", "Z80RETRO", "DUO", "UNA", "HEATH", "MON", "NABU", "SZ80", "RCEZ80"
$PlatformListZ80 = "SBC", "MBC", "ZETA", "ZETA2", "RCZ80", "EZZ80", "Z80RETRO", "DUO", "UNA", "HEATH", "MON", "NABU", "SZ80", "RCEZ80", "MSX"
$PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO", "RPH", "S100", "EPITX", "GMZ180"
$PlatformListZ280 = "RCZ280"

View File

@@ -55,6 +55,7 @@ if [ "${ROM_PLATFORM}" == "dist" ] ; then
ROM_PLATFORM="NABU"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="SZ80"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="SZ80"; ROM_CONFIG="fpga"; bash Build.sh
ROM_PLATFORM="MSX"; ROM_CONFIG="std"; bash Build.sh
ROM_PLATFORM="UNA"; ROM_CONFIG="std"; bash Build.sh
exit
fi

View File

@@ -0,0 +1,94 @@
;
;==================================================================================================
; ROMWBW DEFAULT BUILD SETTINGS FOR MSX
;==================================================================================================
;
; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
; INDICATED ABOVE. THESE SETTINGS DEFINE THE OFFICIAL BUILD FOR THIS
; PLATFORM AS DISTRIBUTED IN ROMWBW RELEASES.
;
; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW:
;
; cfg_MASTER.asm - MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS
; |
; +-> cfg_<platform>.asm - PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM
; |
; +-> Config/<plt>_std.asm - BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD
; |
; +-> Config/<plt>_<cust>.asm - USER: CUSTOM USER BUILD SETTINGS
;
; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW
; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE
; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY
; OVERRIDE THESE SETTINGS AS DESIRED.
;
; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT
; FILE (SEE #INCLUDE STATEMENT BELOW). THE TOP TWO FILES SHOULD NOT BE
; MODIFIED.
;
; TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THIS FILE, THE
; DEFAULT BUILD SETTINGS (Config/<platform>_std.asm) OR PREFERABLY
; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT
; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm).
;
; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE
; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST
; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES.
;
; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE
; SOURCE DIRECTORY (TWO DIRECTORIES ABOVE THIS ONE).
;
; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE
; ".SET" TO OVERRIDE SETTINGS. THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
;
#DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION
;
#INCLUDE "cfg_MSX.asm"
;
BOOT_TIMEOUT .SET -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
BOOT_PRETTY .SET FALSE ; BOOT WITH PRETTY PLATFORM NAME
AUTOCON .SET FALSE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
;
CPUOSC .SET 3579545 ; CPU OSC FREQ IN MHZ
;
RAMSIZE .SET 512-64 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!) (MSX_NOTE: SUBSTRACT 64K FROM RAM MAPPER SIZE)
;
KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT
CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT
FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS
FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES
LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY
;
CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
MKYKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
;
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
RP5RTCENABLE .SET TRUE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM) (MSX_NOTE: MSX 1 MAY NOT HAVE A RTC, MSX 2 ALWAYS HAS ONE)
INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
;
TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSXMKY ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU|MSXUKY]
TMS80COLS .SET TRUE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9938/V9958
;
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM) (MSX_NOTE: REQUIRES SODA IDE CART)
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM) (MSX_NOTE: SOME MSX MACHINES DON'T HAVE A LPT PORT)
PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER (MSX_NOTE: THERE ARE CARTS WITH THIS PSG LIKE THE MMM)
AY38910ENABLE .SET TRUE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER

View File

@@ -48,7 +48,7 @@
#INCLUDE "cfg_SZ80.asm"
;
CPUOSC .SET 8000000 ; CPU OSC FREQ IN MHZ
RAMSIZE .SET 512 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
RAMSIZE .SET 1024 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
MEMMGR .SET MM_SZ80 ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512|SZ80]
@@ -60,5 +60,3 @@ PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
ESPSDENABLE .SET TRUE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
ESPSDCNT .SET 1 ; ESPSD: NUMBER OF BOARDS TO DETECT (1-2), 1-2 DEVICES PER BOARD
ESPSD0DUAL .SET TRUE ; ESPSD 0: DUAL INTERFACE BOARD (DUAL SD)
#DEFINE SIZERAM

View File

@@ -38,7 +38,8 @@ ROM2 [32K] -> rom2.bin
netboot [4.00K]
updater.bin [3.25K]
sysconf.bin [2.00K]
usrrom.bin [3.75K]
usrrom.bin [0.50K]
slack [3.25K]
ROM3 [32K] -> rom3.bin
hwmon [ 8.00K]

407
Source/HBIOS/cfg_MSX.asm Normal file
View File

@@ -0,0 +1,407 @@
;
;==================================================================================================
; ROMWBW PLATFORM CONFIGURATION DEFAULTS FOR PLATFORM: MSX
;==================================================================================================
;
; THIS FILE DEFINES THE DEFAULT CONFIGURATION SETTINGS FOR THE PLATFORM
; INDICATED ABOVE. THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. INSTEAD,
; YOU SHOULD OVERRIDE SETTINGS YOU WANT USING A CONFIGURATION FILE IN
; THE CONFIG DIRECTORY UNDER THIS DIRECTORY.
;
; THIS FILE SHOULD *NOT* NORMALLY BE CHANGED. IT IS MAINTAINED BY THE
; AUTHORS OF ROMWBW. TO OVERRIDE SETTINGS YOU SHOULD USE A
; CONFIGURATION FILE IN THE CONFIG DIRECTORY UNDER THIS DIRECTORY.
;
; ROMWBW USES CASCADING CONFIGURATION FILES AS INDICATED BELOW:
;
; cfg_MASTER.asm - MASTER: CONFIGURATION FILE DEFINES ALL POSSIBLE ROMWBW SETTINGS
; |
; +-> cfg_<platform>.asm - PLATFORM: DEFAULT SETTINGS FOR SPECIFIC PLATFORM
; |
; +-> Config/<plt>_std.asm - BUILD: SETTINGS FOR EACH OFFICIAL DIST BUILD
; |
; +-> Config/<plt>_<cust>.asm - USER: CUSTOM USER BUILD SETTINGS
;
; THE TOP (MASTER CONFIGURATION) FILE DEFINES ALL POSSIBLE ROMWBW
; CONFIGURATION SETTINGS. EACH FILE BELOW THE MASTER CONFIGURATION FILE
; INHERITS THE CUMULATIVE SETTINGS OF THE FILES ABOVE IT AND MAY
; OVERRIDE THESE SETTINGS AS DESIRED.
;
; OTHER THAN THE TOP MASTER FILE, EACH FILE MUST "#INCLUDE" ITS PARENT
; FILE (SEE #INCLUDE STATEMENT BELOW). THE TOP TWO FILES SHOULD NOT BE
; MODIFIED. TO CUSTOMIZE YOUR BUILD SETTINGS YOU SHOULD MODIFY THE
; DEFAULT BUILD SETTINGS (Config/<platform>_std.asm) OR PREFERABLY
; CREATE AN OPTIONAL CUSTOM USER SETTINGS FILE THAT INCLUDES THE DEFAULT
; BUILD SETTINGS FILE (SEE EXAMPLE Config/SBC_user.asm).
;
; BY CREATING A CUSTOM USER SETTINGS FILE, YOU ARE LESS LIKELY TO BE
; IMPACTED BY FUTURE CHANGES BECAUSE YOU WILL BE INHERITING MOST
; OF YOUR SETTINGS WHICH WILL BE UPDATED BY AUTHORS AS ROMWBW EVOLVES.
;
; *** WARNING: ASIDE FROM THE MASTER CONFIGURATION FILE, YOU MUST USE
; ".SET" TO OVERRIDE SETTINGS. THE ASSEMBLER WILL ERROR IF YOU ATTEMPT
; TO USE ".EQU" BECAUSE IT WON'T LET YOU REDEFINE A SETTING WITH ".EQU".
;
#DEFINE PLATFORM_NAME "MSX Computer", " [", CONFIG, "]" ; TEXT LABEL OF THIS CONFIG IN STARTUP MESSAGES
#DEFINE BOOT_DEFAULT "H" ; DEFAULT BOOT LOADER CMD FOR EMPTY CMD LINE
#DEFINE AUTO_CMD "" ; AUTO CMD WHEN BOOT_TIMEOUT IS ENABLED
#DEFINE DEFSERCFG SER_115200_8N1 | SER_RTS ; DEFAULT SERIAL CONFIGURATION
;
#INCLUDE "cfg_MASTER.asm"
;
PLATFORM .SET PLT_MSX ; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCEZ80|RCZ180|EZZ80|SCZ180|GMZ180|DYNO|RCZ280|MBC|RPH|Z80RETRO|S100|DUO|HEATH|EPITX|MON|STDZ180|NABU|FZ80|MSX]
CPUFAM .SET CPU_Z80 ; CPU FAMILY: CPU_[Z80|Z180|Z280|EZ80]
BIOS .SET BIOS_WBW ; HARDWARE BIOS: BIOS_[WBW|UNA]
BATCOND .SET FALSE ; ENABLE LOW BATTERY WARNING MESSAGE
HBIOS_MUTEX .SET FALSE ; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
USELZSA2 .SET FALSE ; ENABLE FONT COMPRESSION
TICKFREQ .SET 50 ; DESIRED PERIODIC TIMER INTERRUPT FREQUENCY (HZ)
;
BOOT_TIMEOUT .SET -1 ; AUTO BOOT TIMEOUT IN SECONDS, -1 TO DISABLE, 0 FOR IMMEDIATE
BOOT_DELAY .SET 0 ; FIXED BOOT DELAY IN SECONDS PRIOR TO CONSOLE OUTPUT
BOOT_PRETTY .SET FALSE ; BOOT WITH PRETTY PLATFORM NAME
BT_REC_TYPE .SET BT_REC_NONE ; BOOT RECOVERY METHOD TO USE: BT_REC_[NONE|FORCE|SBCB0|SBC1B|SBCRI|DUORI]
AUTOCON .SET FALSE ; ENABLE CONSOLE TAKEOVER AT LOADER PROMPT
STRICTPART .SET TRUE ; ENFORCE STRICT PARTITION TABLE VALIDATION
;
CPUSPDCAP .SET SPD_FIXED ; CPU SPEED CHANGE CAPABILITY SPD_FIXED|SPD_HILO
CPUSPDDEF .SET SPD_HIGH ; CPU SPEED DEFAULT SPD_UNSUP|SPD_HIGH|SPD_LOW
CPUOSC .SET 3579545 ; CPU OSC FREQ IN MHZ
INTMODE .SET 1 ; INTERRUPTS: 0=NONE, 1=MODE 1, 2=MODE 2, 3=MODE 3 (Z280)
;
RAMSIZE .SET 512-64 ; SIZE OF RAM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMSIZE .SET 0 ; SIZE OF ROM IN KB (MUST MATCH YOUR HARDWARE!!!)
ROMFONTS .SET FALSE ; LOAD FONTS FROM ROM
APP_BNKS .SET $FF ; BANKS TO RESERVE FOR APP USE ($FF FOR AUTO SIZING)
MEMMGR .SET MM_MSX ; MEMORY MANAGER: MM_[SBC|Z2|N8|Z180|Z280|MBC|RPH|MON|EZ512|MSX]
RAMBIAS .SET 2 ; OFFSET OF START OF RAM IN PHYSICAL ADDRESS SPACE
MPGSEL_0 .SET $FC ; MEM MGR BANK 0 PAGE SELECT REG (MSX_NOTE: SOME RAM MAPPERS SUPPORT READ)
MPGSEL_1 .SET $FD ; MEM MGR BANK 1 PAGE SELECT REG (MSX_NOTE: SOME RAM MAPPERS SUPPORT READ)
MPGSEL_2 .SET $FE ; MEM MGR BANK 2 PAGE SELECT REG (MSX_NOTE: SOME RAM MAPPERS SUPPORT READ)
MPGSEL_3 .SET $FF ; MEM MGR BANK 3 PAGE SELECT REG (MSX_NOTE: SOME RAM MAPPERS SUPPORT READ)
;
RTCIO .SET $C0 ; RTC LATCH REGISTER ADR
;
KIOENABLE .SET FALSE ; ENABLE ZILOG KIO SUPPORT
KIOBASE .SET $80 ; KIO BASE I/O ADDRESS
;
CTCENABLE .SET FALSE ; ENABLE ZILOG CTC SUPPORT
CTCDEBUG .SET FALSE ; ENABLE CTC DRIVER DEBUG OUTPUT
CTCBASE .SET $88 ; CTC BASE I/O ADDRESS
CTCTIMER .SET FALSE ; ENABLE CTC PERIODIC TIMER
CTCMODE .SET CTCMODE_TIM16 ; CTC MODE: CTCMODE_[NONE|CTR|TIM16|TIM256]
CTCPRE .SET 256 ; PRESCALE CONSTANT (1-256)
CTCPRECH .SET 2 ; PRESCALE CHANNEL (0-3)
CTCTIMCH .SET 3 ; TIMER CHANNEL (0-3)
CTCOSC .SET CPUOSC ; CTC CLOCK FREQUENCY
;
PCFENABLE .SET FALSE ; ENABLE PCF8584 I2C CONTROLLER
PCFBASE .SET $F0 ; PCF8584 BASE I/O ADDRESS
PCFCLK .SET PCFCLK_8 ; PCF CLOCK BASE: PCFCLK_[3|443|6|8|12]
PCFTRNS .SET PCFTRNS_90 ; PCF TRANSFER SPEED: PCFTRNS_[90|45|11|15]
;
EIPCENABLE .SET FALSE ; EIPC: ENABLE Z80 EIPC (Z84C15) INITIALIZATION
;
SKZENABLE .SET FALSE ; ENABLE SERGEY'S Z80-512K FEATURES
SKZDIV .SET DIV_1 ; UART CLK (CLK2) DIVIDER FOR Z80-512K
;
WDOGMODE .SET WDOG_NONE ; WATCHDOG MODE: WDOG_[NONE|EZZ80|SKZ]
WDOGIO .SET $6F ; WATCHDOG REGISTER ADR
;
FPLED_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL LEDS
FPLED_IO .SET $00 ; FP: PORT ADDRESS FOR FP LEDS
FPLED_INV .SET FALSE ; FP: LED BITS ARE INVERTED
FPLED_DSKACT .SET TRUE ; FP: ENABLES DISK I/O ACTIVITY ON FP LEDS
FPSW_ENABLE .SET FALSE ; FP: ENABLES FRONT PANEL SWITCHES
FPSW_IO .SET $00 ; FP: PORT ADDRESS FOR FP SWITCHES
FPSW_INV .SET FALSE ; FP: SWITCH BITS ARE INVERTED
;
DIAGLVL .SET DL_CRITICAL ; ERROR LEVEL REPORTING
;
LEDENABLE .SET FALSE ; ENABLES STATUS LED (SINGLE LED)
LEDMODE .SET LEDMODE_STD ; LEDMODE_[STD|SC|RTC|NABU]
LEDPORT .SET $0E ; STATUS LED PORT ADDRESS
LEDDISKIO .SET TRUE ; ENABLES DISK I/O ACTIVITY ON STATUS LED
;
DSKYENABLE .SET FALSE ; ENABLES DSKY FUNCTIONALITY
DSKYDSKACT .SET TRUE ; ENABLES DISK ACTIVITY ON DSKY DISPLAY
ICMENABLE .SET FALSE ; ENABLES ORIGINAL DSKY ICM DRIVER (7218)
ICMPPIBASE .SET $60 ; BASE I/O ADDRESS OF ICM PPI
PKDENABLE .SET FALSE ; ENABLES DSKY NG PKD DRIVER (8259)
PKDPPIBASE .SET $60 ; BASE I/O ADDRESS OF PKD PPI
PKDOSC .SET 3000000 ; OSCILLATOR FREQ FOR PKD (IN HZ)
H8PENABLE .SET FALSE ; ENABLES HEATH H8 FRONT PANEL
LCDENABLE .SET FALSE ; ENABLE LCD DISPLAY
LCDBASE .SET $DA ; BASE I/O ADDRESS OF LCD CONTROLLER
GM7303ENABLE .SET FALSE ; ENABLES THE GM7303 BOARD WITH 16X2 LCD
;
BOOTCON .SET 0 ; BOOT CONSOLE DEVICE
SECCON .SET $FF ; SECONDARY CONSOLE DEVICE
CRTACT .SET TRUE ; ACTIVATE CRT (VDU,CVDU,PROPIO,ETC) AT STARTUP
VDAEMU .SET EMUTYP_ANSI ; VDA EMULATION: EMUTYP_[TTY|ANSI]
VDAEMU_SERKBD .SET $FF ; VDA EMULATION: SERIAL KBD UNIT #, OR $FF FOR HW KBD
ANSITRACE .SET 1 ; ANSI DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKTRACE .SET 1 ; PPK DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
KBDTRACE .SET 1 ; KBD DRIVER TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPKKBLOUT .SET KBD_US ; PPK KEYBOARD LANGUAGE: KBD_[US|DE]
KBDKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
MKYKBLOUT .SET KBD_US ; KBD KEYBOARD LANGUAGE: KBD_[US|DE]
KBDINTS .SET FALSE ; ENABLE KBD (PS2) KEYBOARD INTERRUPTS
;
DSRTCENABLE .SET FALSE ; DSRTC: ENABLE DS-1302 CLOCK DRIVER (DSRTC.ASM)
DSRTCMODE .SET DSRTCMODE_STD ; DSRTC: OPERATING MODE: DSRTCMODE_[STD|MFPIC|K80W]
DSRTCCHG .SET FALSE ; DSRTC: FORCE BATTERY CHARGE ON (USE WITH CAUTION!!!)
;
DS1501RTCENABLE .SET FALSE ; DS1501RTC: ENABLE DS-1501 CLOCK DRIVER (DS1501RTC.ASM)
DS1501RTC_BASE .SET $50 ; DS1501RTC: I/O BASE ADDRESS
;
BQRTCENABLE .SET FALSE ; BQRTC: ENABLE BQ4845 CLOCK DRIVER (BQRTC.ASM)
BQRTC_BASE .SET $50 ; BQRTC: I/O BASE ADDRESS
;
INTRTCENABLE .SET FALSE ; ENABLE PERIODIC INTERRUPT CLOCK DRIVER (INTRTC.ASM)
;
RP5RTCENABLE .SET TRUE ; RP5C01 RTC BASED CLOCK (RP5RTC.ASM)
;
HTIMENABLE .SET FALSE ; ENABLE SIMH TIMER SUPPORT
SIMRTCENABLE .SET FALSE ; ENABLE SIMH CLOCK DRIVER (SIMRTC.ASM)
;
DS7RTCENABLE .SET FALSE ; DS7RTC: ENABLE DS-1307 I2C CLOCK DRIVER (DS7RTC.ASM)
DS7RTCMODE .SET DS7RTCMODE_PCF ; DS7RTC: OPERATING MODE: DS7RTCMODE_[PCF]
;
DS5RTCENABLE .SET FALSE ; DS5RTC: ENABLE DS-1305 SPI CLOCK DRIVER (DS5RTC.ASM)
;
SSERENABLE .SET FALSE ; SSER: ENABLE SIMPLE SERIAL DRIVER (SSER.ASM)
SSERCFG .SET SER_9600_8N1 ; SSER: SERIAL LINE CONFIG
SSERSTATUS .SET $FF ; SSER: STATUS PORT
SSERDATA .SET $FF ; SSER: DATA PORT
SSERIRDY .SET %00000001 ; SSER: INPUT READY BIT MASK
SSERIINV .SET FALSE ; SSER: INPUT READY BIT INVERTED
SSERORDY .SET %00000010 ; SSER: OUTPUT READY BIT MASK
SSEROINV .SET FALSE ; SSER: OUTPUT READY BIT INVERTED
;
DUARTENABLE .SET FALSE ; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
DUARTCNT .SET 1 ; DUART: NUMBER OF CHIPS TO DETECT (1-2)
DUART0BASE .SET $A0 ; DUART 0: BASE ADDRESS OF CHIP
DUART0ACFG .SET DEFSERCFG ; DUART 0A: SERIAL LINE CONFIG
DUART0BCFG .SET DEFSERCFG ; DUART 0B: SERIAL LINE CONFIG
DUART1BASE .SET $40 ; DUART 1: BASE ADDRESS OF CHIP
DUART1ACFG .SET DEFSERCFG ; DUART 1A: SERIAL LINE CONFIG
DUART1BCFG .SET DEFSERCFG ; DUART 1B: SERIAL LINE CONFIG
;
UARTENABLE .SET TRUE ; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
UARTCNT .SET 2 ; UART: NUMBER OF CHIPS TO DETECT (1-8)
UARTOSC .SET 1843200 ; UART: OSC FREQUENCY IN MHZ
UARTINTS .SET FALSE ; UART: INCLUDE INTERRUPT SUPPORT UNDER IM1/2/3
UART4UART .SET FALSE ; UART: SUPPORT 4UART ECB BOARD
UART4UARTBASE .SET $C0 ; UART: BASE IO ADDRESS OF 4UART ECB BOARD
UART0BASE .SET $80 ; UART 0: REGISTERS BASE ADR
UART0CFG .SET DEFSERCFG ; UART 0: SERIAL LINE CONFIG
UART1BASE .SET $88 ; UART 1: REGISTERS BASE ADR
UART1CFG .SET DEFSERCFG ; UART 1: SERIAL LINE CONFIG
UART2BASE .SET $FF ; UART 2: REGISTERS BASE ADR
UART2CFG .SET DEFSERCFG ; UART 2: SERIAL LINE CONFIG
UART3BASE .SET $FF ; UART 3: REGISTERS BASE ADR
UART3CFG .SET DEFSERCFG ; UART 3: SERIAL LINE CONFIG
UART4BASE .SET $FF ; UART 4: REGISTERS BASE ADR
UART4CFG .SET DEFSERCFG ; UART 4: SERIAL LINE CONFIG
UART5BASE .SET $FF ; UART 5: REGISTERS BASE ADR
UART5CFG .SET DEFSERCFG ; UART 5: SERIAL LINE CONFIG
UART6BASE .SET $FF ; UART 6: REGISTERS BASE ADR
UART6CFG .SET DEFSERCFG ; UART 6: SERIAL LINE CONFIG
UART7BASE .SET $FF ; UART 7: REGISTERS BASE ADR
UART7CFG .SET DEFSERCFG ; UART 7: SERIAL LINE CONFIG
;
ASCIENABLE .SET FALSE ; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
;
Z2UENABLE .SET FALSE ; Z2U: ENABLE Z280 UART SERIAL DRIVER (Z2U.ASM)
;
ACIAENABLE .SET FALSE ; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
ACIADEBUG .SET FALSE ; ACIA: ENABLE DEBUG OUTPUT
ACIACNT .SET 1 ; ACIA: NUMBER OF CHIPS TO DETECT (1-2)
ACIA0BASE .SET $80 ; ACIA 0: REGISTERS BASE ADR
ACIA0CLK .SET CPUOSC ; ACIA 0: OSC FREQ IN HZ
ACIA0DIV .SET 1 ; ACIA 0: SERIAL CLOCK DIVIDER
ACIA0CFG .SET DEFSERCFG ; ACIA 0: SERIAL LINE CONFIG (SEE STD.ASM)
ACIA1BASE .SET $40 ; ACIA 1: REGISTERS BASE ADR
ACIA1CLK .SET CPUOSC ; ACIA 1: OSC FREQ IN HZ
ACIA1DIV .SET 1 ; ACIA 1: SERIAL CLOCK DIVIDER
ACIA1CFG .SET DEFSERCFG ; ACIA 1: SERIAL LINE CONFIG (SEE STD.ASM)
;
SIOENABLE .SET FALSE ; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
SIODEBUG .SET FALSE ; SIO: ENABLE DEBUG OUTPUT
SIOBOOT .SET 0 ; SIO: REBOOT ON RCV CHAR (0=DISABLED)
SIOCNT .SET 2 ; SIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
SIOINTS .SET TRUE ; SIO: INCLUDE SIO INTERRUPT SUPPORT UNDER IM1/2/3
SIO0MODE .SET SIOMODE_RC ; SIO 0: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO0BASE .SET $80 ; SIO 0: REGISTERS BASE ADR
SIO0ACLK .SET CPUOSC ; SIO 0A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0ACFG .SET DEFSERCFG ; SIO 0A: SERIAL LINE CONFIG
SIO0ACTCC .SET -1 ; SIO 0A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO0BCLK .SET CPUOSC ; SIO 0B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO0BCFG .SET DEFSERCFG ; SIO 0B: SERIAL LINE CONFIG
SIO0BCTCC .SET -1 ; SIO 0B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1MODE .SET SIOMODE_RC ; SIO 1: CHIP TYPE: SIOMODE_[STD|RC|SMB|ZP|Z80R]
SIO1BASE .SET $84 ; SIO 1: REGISTERS BASE ADR
SIO1ACLK .SET CPUOSC ; SIO 1A: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1ACFG .SET DEFSERCFG ; SIO 1A: SERIAL LINE CONFIG
SIO1ACTCC .SET -1 ; SIO 1A: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
SIO1BCLK .SET CPUOSC ; SIO 1B: OSC FREQ IN HZ, ZP=2457600/4915200, RC/SMB=7372800
SIO1BCFG .SET DEFSERCFG ; SIO 1B: SERIAL LINE CONFIG
SIO1BCTCC .SET -1 ; SIO 1B: CTC CHANNEL 0=A, 1=B, 2=C, 3=D, -1 FOR NONE
;
XIOCFG .SET DEFSERCFG ; XIO: SERIAL LINE CONFIG
;
VDUENABLE .SET FALSE ; VDU: ENABLE VDU VIDEO/KBD DRIVER (VDU.ASM)
CVDUENABLE .SET FALSE ; CVDU: ENABLE CVDU VIDEO/KBD DRIVER (CVDU.ASM)
GDCENABLE .SET FALSE ; GDC: ENABLE 7220 GDC VIDEO/KBD DRIVER (GDC.ASM)
TMSENABLE .SET TRUE ; TMS: ENABLE TMS9918 VIDEO/KBD DRIVER (TMS.ASM)
TMSMODE .SET TMSMODE_MSXMKY ; TMS: DRIVER MODE: TMSMODE_[SCG|N8|MSX|MSXKBD|MSXMKY|MBC|COLECO|DUO|NABU]
TMS80COLS .SET TRUE ; TMS: ENABLE 80 COLUMN SCREEN, REQUIRES V9938/V9958
TMSTIMENABLE .SET TRUE ; TMS: ENABLE TIMER INTERRUPTS (REQUIRES IM1)
VGAENABLE .SET FALSE ; VGA: ENABLE VGA VIDEO/KBD DRIVER (VGA.ASM)
VRCENABLE .SET FALSE ; VRC: ENABLE VGARC VIDEO/KBD DRIVER (VRC.ASM)
SCONENABLE .SET FALSE ; SCON: ENABLE S100 CONSOLE DRIVER (SCON.ASM)
EFENABLE .SET FALSE ; EF: ENABLE EF9345 VIDEO DRIVER (EF.ASM)
FVENABLE .SET FALSE ; FV: ENABLE FPGA VGA VIDEO DRIVER (FV.ASM)
;
MDENABLE .SET TRUE ; MD: ENABLE MEMORY (ROM/RAM) DISK DRIVER (MD.ASM)
MDROM .SET FALSE ; MD: ENABLE ROM DISK
MDRAM .SET TRUE ; MD: ENABLE RAM DISK
MDTRACE .SET 1 ; MD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
MDFFENABLE .SET FALSE ; MD: ENABLE FLASH FILE SYSTEM
;
FDENABLE .SET FALSE ; FD: ENABLE FLOPPY DISK DRIVER (FD.ASM)
FDMODE .SET FDMODE_RCWDC ; FD: DRIVER MODE: FDMODE_[DIO|ZETA|ZETA2|DIDE|N8|DIO3|RCSMC|RCWDC|DYNO|EPFDC|MBC]
FDCNT .SET 2 ; FD: NUMBER OF FLOPPY DRIVES ON THE INTERFACE (1-2)
FDTRACE .SET 1 ; FD: TRACE LEVEL (0=NO,1=FATAL,2=ERRORS,3=ALL)
FDMAUTO .SET TRUE ; FD: AUTO SELECT DEFAULT/ALTERNATE MEDIA FORMATS
FD0TYPE .SET FDT_3HD ; FD 0: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
FD1TYPE .SET FDT_3HD ; FD 1: DRIVE TYPE: FDT_[3DD|3HD|5DD|5HD|8]
;
RFENABLE .SET FALSE ; RF: ENABLE RAM FLOPPY DRIVER
;
IDEENABLE .SET TRUE ; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
IDETRACE .SET 1 ; IDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IDECNT .SET 1 ; IDE: NUMBER OF IDE INTERFACES TO DETECT (1-3), 2 DRIVES EACH
IDE0MODE .SET IDEMODE_RC ; IDE 0: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
IDE0BASE .SET $10 ; IDE 0: IO BASE ADDRESS
IDE0DATLO .SET $00 ; IDE 0: DATA LO PORT FOR 16-BIT I/O
IDE0DATHI .SET $00 ; IDE 0: DATA HI PORT FOR 16-BIT I/O
IDE0A8BIT .SET TRUE ; IDE 0A (MASTER): 8 BIT XFER
IDE0B8BIT .SET TRUE ; IDE 0B (MASTER): 8 BIT XFER
IDE1MODE .SET IDEMODE_RC ; IDE 1: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
IDE1BASE .SET $18 ; IDE 1: IO BASE ADDRESS
IDE1DATLO .SET $00 ; IDE 1: DATA LO PORT FOR 16-BIT I/O
IDE1DATHI .SET $00 ; IDE 1: DATA HI PORT FOR 16-BIT I/O
IDE1A8BIT .SET TRUE ; IDE 1A (MASTER): 8 BIT XFER
IDE1B8BIT .SET TRUE ; IDE 1B (MASTER): 8 BIT XFER
IDE2MODE .SET IDEMODE_RC ; IDE 2: DRIVER MODE: IDEMODE_[DIO|DIDE|MK4|RC|GIDE]
IDE2BASE .SET $20 ; IDE 2: IO BASE ADDRESS
IDE2DATLO .SET $00 ; IDE 2: DATA LO PORT FOR 16-BIT I/O
IDE2DATHI .SET $00 ; IDE 2: DATA HI PORT FOR 16-BIT I/O
IDE2A8BIT .SET TRUE ; IDE 2A (MASTER): 8 BIT XFER
IDE2B8BIT .SET TRUE ; IDE 2B (MASTER): 8 BIT XFER
;
PPIDEENABLE .SET TRUE ; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
PPIDETRACE .SET 1 ; PPIDE: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPIDECNT .SET 1 ; PPIDE: NUMBER OF PPI CHIPS TO DETECT (1-3), 2 DRIVES PER CHIP
PPIDE0MODE .SET PPIDEMODE_MSX ; PPIDE 0: DRIVER MODE: IDEMODE_[STD|S100A|S100B|MSX]
PPIDE0BASE .SET $30 ; PPIDE 0: PPI REGISTERS BASE ADR
PPIDE0A8BIT .SET FALSE ; PPIDE 0A (MASTER): 8 BIT XFER
PPIDE0B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
PPIDE1MODE .SET PPIDEMODE_MSX ; PPIDE 1: DRIVER MODE: IDEMODE_[STD|S100A|S100B|MSX]
PPIDE1BASE .SET $00 ; PPIDE 1: PPI REGISTERS BASE ADR
PPIDE1A8BIT .SET FALSE ; PPIDE 1A (MASTER): 8 BIT XFER
PPIDE1B8BIT .SET FALSE ; PPIDE 0B (SLAVE): 8 BIT XFER
PPIDE2MODE .SET PPIDEMODE_MSX ; PPIDE 2: DRIVER MODE: IDEMODE_[STD|S100A|S100B|MSX]
PPIDE2BASE .SET $00 ; PPIDE 2: PPI REGISTERS BASE ADR
PPIDE2A8BIT .SET FALSE ; PPIDE 2A (MASTER): 8 BIT XFER
PPIDE2B8BIT .SET FALSE ; PPIDE 2B (SLAVE): 8 BIT XFER
;
SDENABLE .SET FALSE ; SD: ENABLE SD CARD DISK DRIVER (SD.ASM)
SDMODE .SET SDMODE_PIO ; SD: DRIVER MODE: SDMODE_[JUHA|N8|CSIO|PPI|UART|DSD|MK4|SC|MT|USR|PIO|Z80R|EPITX|FZ80|GM|EZ512|K80W]
SDPPIBASE .SET $60 ; SD: BASE I/O ADDRESS OF PPI FOR PPI MODDE
SDCNT .SET 2 ; SD: NUMBER OF SD CARD DEVICES (1-2), FOR DSD/SC/MT ONLY
SDTRACE .SET 1 ; SD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SDCSIOFAST .SET FALSE ; SD: ENABLE TABLE-DRIVEN BIT INVERTER IN CSIO MODE
SDMTSWAP .SET FALSE ; SD: SWAP THE LOGICAL ORDER OF THE SPI PORTS OF THE MT011
;
CHENABLE .SET FALSE ; CH: ENABLE CH375/376 USB SUPPORT
CHTRACE .SET 1 ; CH: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHUSBTRACE .SET 1 ; CHUSB: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHSDTRACE .SET 1 ; CHSD: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
CHCNT .SET 2 ; CH: NUMBER OF BOARDS TO DETECT (1-2)
CH0BASE .SET $3E ; CH 0: BASE I/O ADDRESS
CH0USBENABLE .SET TRUE ; CH 0: ENABLE USB DISK
CH0SDENABLE .SET FALSE ; CH 0: ENABLE SD DISK
CH1BASE .SET $3C ; CH 1: BASE I/O ADDRESS
CH1USBENABLE .SET TRUE ; CH 1: ENABLE USB DISK
CH1SDENABLE .SET FALSE ; CH 1: ENABLE SD DISK
;
PRPENABLE .SET FALSE ; PRP: ENABLE ECB PROPELLER IO BOARD DRIVER (PRP.ASM)
;
PPPENABLE .SET FALSE ; PPP: ENABLE ZETA PARALLEL PORT PROPELLER BOARD DRIVER (PPP.ASM)
;
ESPENABLE .SET FALSE ; ESP: ENABLE ESP32 IO BOARD DRIVER (ESP.ASM)
;
HDSKENABLE .SET FALSE ; HDSK: ENABLE SIMH HDSK DISK DRIVER (HDSK.ASM)
;
PIOENABLE .SET FALSE ; PIO: ENABLE ZILOG PIO DRIVER (PIO.ASM)
PIOCNT .SET 2 ; PIO: NUMBER OF CHIPS TO DETECT (1-2), 2 CHANNELS PER CHIP
PIO0BASE .SET $B8 ; PIO 0: REGISTERS BASE ADR
PIO1BASE .SET $BC ; PIO 1: REGISTERS BASE ADR
;
LPTENABLE .SET FALSE ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTMODE .SET LPTMODE_MG014 ; LPT: DRIVER MODE: LPTMODE_[NONE|SPP|MG014]
LPTCNT .SET 1 ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPTTRACE .SET 1 ; LPT: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
LPT0BASE .SET $90 ; LPT 0: REGISTERS BASE ADR
LPT1BASE .SET $00 ; LPT 1: REGISTERS BASE ADR
;
PPAENABLE .SET FALSE ; PPA: ENABLE IOMEGA ZIP DRIVE (PPA) DISK DRIVER (PPA.ASM)
PPACNT .SET 1 ; PPA: NUMBER OF PPA DEVICES (1-2)
PPATRACE .SET 1 ; PPA: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
PPAMODE .SET PPAMODE_MG014 ; PPA: DRIVER MODE: PPAMODE_[NONE|SPP|MG014]
PPA0BASE .SET LPT0BASE ; PPA 0: BASE I/O ADDRESS OF PPI FOR PPA
PPA1BASE .SET LPT1BASE ; PPA 1: BASE I/O ADDRESS OF PPI FOR PPA
;
IMMENABLE .SET FALSE ; IMM: ENABLE IOMEGA ZIP PLUS DRIVE (IMM) DISK DRIVER (IMM.ASM)
IMMCNT .SET 1 ; IMM: NUMBER OF IMM DEVICES (1-2)
IMMTRACE .SET 1 ; IMM: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
IMMMODE .SET IMMMODE_MG014 ; IMM: DRIVER MODE: IMMMODE_[NONE|SPP|MG014]
IMM0BASE .SET LPT0BASE ; IMM 0: BASE I/O ADDRESS OF PPI FOR IMM
IMM1BASE .SET LPT1BASE ; IMM 1: BASE I/O ADDRESS OF PPI FOR IMM
;
SYQENABLE .SET FALSE ; SYQ: ENABLE SYQUEST SPARQ DISK DRIVER (SYQ.ASM)
SYQCNT .SET 1 ; SYQ: NUMBER OF SYQ DEVICES (1-2)
SYQTRACE .SET 1 ; SYQ: TRACE LEVEL (0=NO,1=ERRORS,2=ALL)
SYQMODE .SET IMMMODE_MG014 ; SYQ: DRIVER MODE: SYQMODE_[NONE|SPP|MG014]
SYQ0BASE .SET LPT0BASE ; SYQ 0: BASE I/O ADDRESS OF PPI FOR SYQ
SYQ1BASE .SET LPT1BASE ; SYQ 1: BASE I/O ADDRESS OF PPI FOR SYQ
;
ESPSDENABLE .SET FALSE ; ESPSD: ENABLE S100 ESP32 SD DISK DRIVER (ESPSD.ASM)
;
PIO_4P .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB 4P BOARD
PIO_ZP .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR ECB ZILOG PERIPHERALS BOARD (PIO.ASM)
PIO_SBC .SET FALSE ; PIO: ENABLE PARALLEL PORT DRIVER FOR 8255 CHIP
;
UFENABLE .SET FALSE ; UF: ENABLE ECB USB FIFO DRIVER (UF.ASM)
;
SN76489ENABLE .SET FALSE ; SN: ENABLE SN76489 SOUND DRIVER
AUDIOTRACE .SET FALSE ; ENABLE TRACING TO CONSOLE OF SOUND DRIVER
SN7CLK .SET 3579545 ; SN: PSG CLOCK FREQ, ASSUME MSX STD
SNMODE .SET SNMODE_RC ; SN: DRIVER MODE: SNMODE_[NONE|RC|VGM|DUO]
;
AY38910ENABLE .SET TRUE ; AY: ENABLE AY-3-8910 / YM2149 SOUND DRIVER
AY_CLK .SET 1789772 ; AY: PSG CLOCK FREQ, ASSUME MSX STD
AYMODE .SET AYMODE_MSX ; AY: DRIVER MODE: AYMODE_[SCG|N8|RCZ80|RCZ180|MSX|LINC|MBC|DUO|NABU]
AY_FORCE .SET FALSE ; AY: BYPASS AUTO-DETECT, FORCED PRESENT
;
SPKENABLE .SET FALSE ; SPK: ENABLE RTC LATCH IOBIT SOUND DRIVER (SPK.ASM)
;
DMAENABLE .SET FALSE ; DMA: ENABLE DMA DRIVER (DMA.ASM)
DMABASE .SET $E0 ; DMA: DMA BASE ADDRESS
DMAMODE .SET DMAMODE_RC ; DMA: DMA MODE (NONE|ECB|Z180|Z280|RC|MBC|DUO)
;
YM2612ENABLE .SET FALSE ; YM2612: ENABLE YM2612 DRIVER
VGMBASE .SET $C0 ; YM2612: BASE ADDRESS FOR VGM BOARD (YM2612/SN76489s/CTC)

View File

@@ -49,13 +49,14 @@
; - std.asm
; - ../ver.inc
; - build.inc
; - Config/<plt>_std.asm
; - Config/<plt>_<cfg>.asm
; - cfg_<plt>.asm
; - cfg_MASTER.asm
; - hbios.inc
; - [z180.inc]
; - [z280.inc]
; - [eipc.inc]
; - layout.inc
; - util.asm
; - time.asm
; - bcd.asm
@@ -941,8 +942,23 @@ Z280_SYSCALL_GO:
;
#IF (MEMMGR == MM_SZ80)
;
; 1MB OF RAM IN 16K PAGES. STARTS AT 4TH 16K PAGE AND WRAPS AROUND
; BECAUSE PAGE 2 & 3 ARE FIXED TO HIGH 32K OF CPU ADDRESS SPACE.
; The S100 Z80 CPU implements a custom memory manager that allows mapping the 2
; lowest 16K portions of CPU address space ($0000-$3FFFF, and $4000-$7FFF).
; Each of these banks can be mapped to any physical 16K bank.
; The physical 16K banks are 16K aligned. The memory manager
; can address a maximum of 1MB of physical memory. Which is
; 64 x 16K banks (bank numbers $00-$3F)
;
; The top 32K of CPU address space ($8000-$FFFF) is statically mapped
; to physical banks $02 & $03. RomWBW is designed to have the top
; 32K of CPU address space assigned to the last two banks of
; RAM. So the RomWBW memory manager for this board (MM_SZ80)
; rotates the requested bank numbers by 4. With wrapping, this
; causes a RomWBW request for the top two banks to be mapped to
; physical banks $02 & $03.
;
; Z80 CPU Physical: $00 $01 $02 $03 ... $38 $39 $3A $3B $3C $3D $3E $3F
; RomWBW Logical: $04 $05 $06 $07 ... $3C $3D $3E $3F $00 $01 $02 $03
;
BIT 7,A ; BIT 7 SET REQUESTS RAM PAGE
JR Z,HBX_ROM ; NOT SET, SELECT ROM PAGE
@@ -960,6 +976,17 @@ HBX_ROM:
RET ; DONE
#ENDIF
;
#IF (MEMMGR == MM_MSX)
; MSX_NOTE: THE MSX PLATFORM PRELOADS THE ROM IMAGE IN RAM AND THE BANK ID ROM/RAM FLAG IS IGNORED
RES 7,A ; CLEAR RAM BIT
ADD A,RAMBIAS ; ADD 2 x 32K - RAM STARTS FROM 16K SEGMENT 4
RLCA ; TIMES 2 - GET 16K PAGE INSTEAD OF 32K
OUT (MPGSEL_0),A ; BANK_0: 0K - 16K
INC A ;
OUT (MPGSEL_1),A ; BANK_1: 16K - 32K
RET ; DONE
#ENDIF
;
;::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
; Copy Data - Possibly between banks. This resembles CP/M 3, but
; usage of the HL and DE registers is reversed.
@@ -1376,8 +1403,8 @@ HBX_BUF_END .EQU $
JP HBX_BNKSEL ; (+19) HB_BNKSEL: FIXED ADR ENTRY FOR HBX_BNKSEL
JP HBX_BNKCPY ; (+22) HB_BNKCPY: FIXED ADR ENTRY FOR HBX_BNKCPY
JP HBX_BNKCALL ; (+25) HB_BNKCALL: FIXED ADR ENTRY FOR HBX_BNKCALL
.DW HBX_IDENT ; (+28) ADDRESS OF HBIOS PROXY START (DEPRECATED)
.DW HBX_IDENT ; (+30) HB_IDENT: ADDRESS OF HBIOS IDENT INFO DATA BLOCK
.DW HBX_IDENT ; (+28) HB_IDENT: ADDRESS OF HBIOS IDENT INFO DATA BLOCK
.DW HBX_IDENT ; (+30) RESERVED (USED BY MSX PLATFORM), SET TO HBX_IDENT FOR BACKWARD COMPATIBILITY
;
.FILL MEMTOP - $ ; FILL TO END OF MEMORY (AS NEEDED)
.ORG HBX_IMG + HBX_SIZ ; RESTORE ORG
@@ -1891,7 +1918,13 @@ ROMRESUME:
#ENDIF
;
#ENDIF
;
#IF (MEMMGR == MM_MSX)
LD A,((ROMSIZE + RAMSIZE) / 16) - 2 + RAMBIAS * 2
OUT (MPGSEL_2),A
INC A
OUT (MPGSEL_3),A
#ENDIF
;
;--------------------------------------------------------------------------------------------------
; PROXY INSTALLATION
@@ -1930,7 +1963,12 @@ ROMRESUME:
;
LD DE,HBX_LOC ; RUNNING LOCATION OF PROXY
LD HL,HBX_IMG ; LOCATION OF PROXY IMAGE
#IF (PLATFORM == PLT_MSX)
; MSX_NOTE: AVOID WRITING TO SECONDARY SLOT REGISTER AT ADDRESS $FFFF
LD BC,HBX_SIZ-2 ; SIZE OF PROXY
#ELSE
LD BC,HBX_SIZ ; SIZE OF PROXY
#ENDIF
LDIR ; COPY IT
;
; NOTIFICATION THAT WE HAVE COMPLETED HARDWARE INIT.
@@ -3296,6 +3334,9 @@ HB_Z280BUS1:
#ENDIF
#IF (MEMMGR == MM_SZ80)
.TEXT "SZ80$"
#ENDIF
#IF (MEMMGR == MM_MSX)
.TEXT "MSX$"
#ENDIF
CALL PRTSTRD
.TEXT " MMU$"

View File

@@ -209,6 +209,7 @@ PLT_GMZ180 .EQU 21 ; GENESIS Z180 SYSTEM
PLT_NABU .EQU 22 ; NABU PC W/ ROMWBW OPTION BOARD
PLT_SZ80 .EQU 23 ; S100 Z80
PLT_RCEZ80 .EQU 24 ; RCBUS W/ eZ80
PLT_MSX .EQU 25 ; MSX COMPUTER
;
; HBIOS GLOBAL ERROR RETURN VALUES
;
@@ -554,5 +555,4 @@ HB_INVOKE .EQU HBX_XFCFNS + (0 * 3) ; INVOKE HBIOS FUNCTION
HB_BNKSEL .EQU HBX_XFCFNS + (1 * 3) ; SELECT LOW MEMORY BANK ID
HB_BNKCPY .EQU HBX_XFCFNS + (2 * 3) ; INTERBANK MEMORY COPY
HB_BNKCALL .EQU HBX_XFCFNS + (3 * 3) ; INTERBANK FUNCTION CALL
;HB_LOC .EQU HBX_XFCFNS + 12 ; ADDRESS OF HBIOS PROXY START (DEPRECATED)
HB_IDENT .EQU HBX_XFCFNS + 14 ; POINTER TO HBIOS IDENT DATA BLOCK
HB_IDENT .EQU HBX_XFCFNS + 12 ; POINTER TO HBIOS IDENT DATA BLOCK

View File

@@ -60,7 +60,7 @@ CPM_IMGSIZ .EQU $3000 ; CPM IMAGE SIZE ON ROM
;--------------------------------------------------------------------------------------------------
;
BNK_NXTLOC .EQU $0000 ; RESET TO START OF BANK
BNK_CUR .EQU 1 ; THIS IS ROM BANK 1 (BID_IMG0)
BNK_CUR .EQU 0 ; BANK OFFSET FROM BID_IMG0
;
LDR_BNK .EQU BNK_CUR
LDR_LOC .EQU $0000 ; RUNNING LOCATION OF BOOT LOADER
@@ -103,7 +103,7 @@ BNK1_SLACK .EQU BNKTOP - BNK_NXTLOC ; REMAINING BANK SPACE
;--------------------------------------------------------------------------------------------------
;
BNK_NXTLOC .SET $0000 ; RESET TO START OF BANK
BNK_CUR .SET 2 ; THIS IS ROM BANK 2 (BID_IMG1)
BNK_CUR .SET 1 ; BANK OFFSET FROM BID_IMG0
;
; NOTE FOLLOWING ARE COPY/PASTED INTO camel80.azm !!!!!!!!
FTH_BNK .EQU BNK_CUR
@@ -178,7 +178,7 @@ BNK2_SLACK .EQU BNKTOP - BNK_NXTLOC ; REMAINING BANK SPACE
;--------------------------------------------------------------------------------------------------
;
BNK_NXTLOC .SET $0000 ; RESET TO START OF BANK
BNK_CUR .SET 3 ; THIS IS ROM BANK 3 (BID_IMG2)
BNK_CUR .SET 2 ; BANK OFFSET FROM BID_IMG0
;
HWMON_BNK .EQU BNK_CUR
HWMON_LOC .EQU $E000

View File

@@ -205,6 +205,9 @@ MKY_INIT:
#ENDIF
#ENDIF
; MSX_NOTE: THE MSX BIOS SETS THE PPI CONFIGURATION AT BOOT AND IT SHOULD NOT BE CHANGED
; THE 8255 CONFIGURATION BELOW IS NOT COMPATIBLE WITH THE MSX STANDARD
#IF (PLATFORM != PLT_MSX)
; CONFIGURE 8255 PPI PORTS
; A - INPUT (NOT USED)
; B - INPUT (COLUMN LINES)
@@ -216,6 +219,7 @@ MKY_INIT:
LD A, 64 ; CAPS OFF
EZ80_IO
OUT (MKY_REGC), A
#ENDIF
; INSTALL INTERRUPT HANDLER
LD HL, (VEC_TICK+1)

View File

@@ -30,11 +30,32 @@ PPIDE_DIR_WRITE .EQU %10000000 ; IDE BUS DATA OUTPUT MODE
PPIDE_CTL_DA0 .EQU %00000001 ; DRIVE ADDRESS BUS - BIT 0 (DA0)
PPIDE_CTL_DA1 .EQU %00000010 ; DRIVE ADDRESS BUS - BIT 1 (DA1)
PPIDE_CTL_DA2 .EQU %00000100 ; DRIVE ADDRESS BUS - BIT 2 (DA2)
;
; MSX_NOTE:
; CONTROL SIGNALS ARE NOT INVERTED, CS3 and DRIVE RESET SIGNALS NOT IMPLEMENTED
; SETTING THE DIRECTION OF THE PORTS WILL RESET THE OUTPUT PORTS I.E. CONTROL SIGNALS
; PPI IDE CONTROL BIT:
; 0 IDE REGISTER BIT 0
; 1 IDE REGISTER BIT 1
; 2 IDE REGISTER BIT 2
; 3 NOT USED
; 4 NOT USED
; 5 /CS SELECT
; 6 /WR WRITE DATA
; 7 /RD READ DATA
;
#IF (PPIDE0MODE == PPIDEMODE_MSX)
PPIDE_CTL_CS1 .EQU %11000000 ; DRIVE CHIP SELECT 0 (ACTIVE LOW)
PPIDE_CTL_DIOW .EQU %01000000 ; DRIVE I/O WRITE (ACTIVE LOW)
PPIDE_CTL_DIOR .EQU %10000000 ; DRIVE I/O READ (ACTIVE LOW)
PPIDE_IDLE .EQU %11100111 ; SET DRIVE IN IDLE STATE
#ELSE
PPIDE_CTL_CS1 .EQU %00001000 ; DRIVE CHIP SELECT 0 (ACTIVE LOW, INVERTED)
PPIDE_CTL_CS3 .EQU %00010000 ; DRIVE CHIP SELECT 1 (ACTIVE LOW, INVERTED)
PPIDE_CTL_DIOW .EQU %00100000 ; DRIVE I/O WRITE (ACTIVE LOW, INVERTED)
PPIDE_CTL_DIOR .EQU %01000000 ; DRIVE I/O READ (ACTIVE LOW, INVERTED)
PPIDE_CTL_RESET .EQU %10000000 ; DRIVE RESET (ACTIVE LOW, INVERTED)
#ENDIF
;
; +-----------------------------------------------------------------------+
; | CONTROL BLOCK REGISTERS (CS3FX) |
@@ -140,9 +161,11 @@ PPIDE_REG_BCL .EQU PPIDE_CTL_CS1 | $04 ; PKT BYTE COUNT LOW (BITS 0-7) (R/W)
PPIDE_REG_BCH .EQU PPIDE_CTL_CS1 | $05 ; PKT BYTE COUNT HIGH (BITS 8-15) (R/W)
PPIDE_REG_STAT .EQU PPIDE_CTL_CS1 | $07 ; STATUS REGISTER (R)
PPIDE_REG_CMD .EQU PPIDE_CTL_CS1 | $07 ; COMMAND REGISTER (EXECUTE) (W)
#IF (PPIDE0MODE != PPIDEMODE_MSX)
PPIDE_REG_ALTSTAT .EQU PPIDE_CTL_CS3 | $06 ; ALTERNATE STATUS REGISTER (R)
PPIDE_REG_CTRL .EQU PPIDE_CTL_CS3 | $06 ; DEVICE CONTROL REGISTER (W)
PPIDE_REG_DRVADR .EQU PPIDE_CTL_CS3 | $07 ; DRIVE ADDRESS REGISTER (R)
#ENDIF
;
; COMMAND BYTES
;
@@ -244,6 +267,9 @@ PPIDE_DEV0M: ; DEVICE 0, MASTER
#ENDIF
#IF (PPIDE0MODE == PPIDEMODE_S100B)
DEVECHO "S100B"
#ENDIF
#IF (PPIDE0MODE == PPIDEMODE_MSX)
DEVECHO "MSX_BEER"
#ENDIF
DEVECHO ", IO="
DEVECHO PPIDE0BASE
@@ -253,7 +279,11 @@ PPIDE_DEV0M: ; DEVICE 0, MASTER
PPIDE_DEV0S: ; DEVICE 0, SLAVE
.DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY)
.DB PPIDE0MODE ; DRIVER DEVICE MODE
#IF (PPIDE0MODE == PPIDEMODE_MSX)
.DB PPIDE_STNOMEDIA ; SLAVE UNIT NOT SUPPORTED
#ELSE
.DB 0 ; DEVICE STATUS
#ENDIF
.DB 0 ; DEVICE TYPE
.DB (PPIDE0B8BIT & PPIDE_ACC_8BIT) ; UNIT ACCESS FLAGS
.DB 0 ; MEDIA FLAGS
@@ -277,14 +307,18 @@ PPIDE_DEV0S: ; DEVICE 0, SLAVE
#IF (PPIDE0MODE == PPIDEMODE_S100B)
DEVECHO "S100B"
#ENDIF
#IF (PPIDE0MODE == PPIDEMODE_MSX)
DEVECHO "MSX_BEER, NO SLAVE\n"
#ELSE
DEVECHO ", IO="
DEVECHO PPIDE0BASE
DEVECHO ", SLAVE"
DEVECHO "\n"
#ENDIF
;
#ENDIF
;
#IF (PPIDECNT >= 2)
#IF (PPIDECNT >= 2) & (PPIDE1MODE != PPIDEMODE_MSX)
;
PPIDE_DEV1M: ; DEVICE 1, MASTER
.DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY)
@@ -352,7 +386,7 @@ PPIDE_DEV1S: ; DEVICE 1, SLAVE
;
#ENDIF
;
#IF (PPIDECNT >= 3)
#IF (PPIDECNT >= 3) & (PPIDE2MODE != PPIDEMODE_MSX)
;
PPIDE_DEV2M: ; DEVICE 2, MASTER
.DB $FE ; DRIVER DEVICE NUMBER (FILLED DYNAMICALLY)
@@ -500,10 +534,13 @@ PPIDE_INIT2B:
PPIDE_INIT3:
CALL PPIDE_RESET ; RESET THE BUS
CALL PPIDE_INIT5 ; DETECT/INIT MASTER
; MSX_NOTE: SLAVE UNIT NOT SUPPORTED
#IF (PPIDE0MODE != PPIDEMODE_MSX)
PUSH IY ; SAVE CFG PTR
CALL PPIDE_GOPARTNER ; SWITCH IY TO PARTNER CFG
CALL PPIDE_INIT5 ; DETECT/INIT SLAVE
POP IY ; RESTORE CFG PTR
#ENDIF
;
PPIDE_INIT4:
LD DE,PPIDE_CFGSIZ ; SIZE OF CFG TABLE ENTRY
@@ -584,6 +621,13 @@ PPIDE_DETECT:
; WE ARE IN WRITE MODE, AN IDE CONTROLLER WILL NOT BE ABLE TO
; INTERFERE WITH THE VALUE BEING READ.
;
#IF (PPIDE0MODE == PPIDEMODE_MSX)
; SETTING THE DIRECTION WILL RESET THE CONTROL SIGNALS
LD A,$A5
CALL PPIDE_OUT ; USE THE CORRECT SIGNAL SEQUENCE
.DB PPIDE_REG_DATA
LD C,(IY+PPIDE_DATALO) ; PPI PORT A, DATALO
#ELSE
LD A,PPIDE_DIR_WRITE ; SET DATA BUS DIRECTION TO WRITE
LD C,(IY+PPIDE_PPI) ; PPI CONTROL WORD
EZ80_IO
@@ -593,6 +637,7 @@ PPIDE_DETECT:
LD A,$A5 ; TEST VALUE
EZ80_IO
OUT (C),A ; PUSH VALUE TO PORT
#ENDIF
EZ80_IO
IN A,(C) ; GET PORT VALUE
#IF (PPIDETRACE >= 3)
@@ -1221,6 +1266,15 @@ PPIDE_GET:
PRTS(" GET$")
#ENDIF
;
#IF (PPIDE0MODE == PPIDEMODE_MSX)
; FIRST SETUP THE PPI TO READ THEN WAIT FOR BUFFER
;
; SETUP PPI TO READ
LD A,PPIDE_DIR_READ ; SET DATA BUS DIRECTION TO READ
LD C,(IY+PPIDE_PPI) ; PPI CONTROL WORD
EZ80_IO
OUT (C),A ; WRITE IT
;
; WAIT FOR BUFFER
PUSH BC
PUSH HL
@@ -1228,13 +1282,22 @@ PPIDE_GET:
POP HL
POP BC
RET NZ ; BAIL OUT IF TIMEOUT
;
#ELSE
; WAIT FOR BUFFER
PUSH BC
PUSH HL
CALL PPIDE_WAITDRQ ; WAIT FOR BUFFER READY
POP HL
POP BC
RET NZ ; BAIL OUT IF TIMEOUT
;
; SETUP PPI TO READ
LD A,PPIDE_DIR_READ ; SET DATA BUS DIRECTION TO READ
;OUT (PPIDE_REG_PPI),A ; DO IT
LD C,(IY+PPIDE_PPI) ; PPI CONTROL WORD
EZ80_IO
OUT (C),A ; WRITE IT
#ENDIF
;
; SELECT READ/WRITE IDE REGISTER
LD A,PPIDE_REG_DATA ; DATA REGISTER
@@ -1319,6 +1382,25 @@ PPIDE_PUT:
PRTS(" PUT$")
#ENDIF
;
#IF (PPIDE0MODE == PPIDEMODE_MSX)
; SETTING THE DIRECTION WILL RESET THE CONTROL SIGNALS
; THE WORKAROUND FOR WRITE IS TO USE A SMALL DELAY INSTEAD OF WAITING FOR BUFFER READY
;
; SETUP PPI TO WRITE
LD A,PPIDE_DIR_WRITE ; SET DATA BUS DIRECTION TO WRITE
LD C,(IY+PPIDE_PPI) ; PPI CONTROL WORD
EZ80_IO
OUT (C),A ; WRITE IT
;
; SMALL DELAY FOR BUFFER READY
PUSH BC
LD B,$30
WR_WAIT:
EX (SP),HL
EX (SP),HL
DJNZ WR_WAIT
POP BC
#ELSE
; WAIT FOR BUFFER
PUSH BC
PUSH HL
@@ -1326,13 +1408,14 @@ PPIDE_PUT:
POP HL
POP BC
RET NZ ; BAIL OUT IF TIMEOUT
;
;
; SETUP PPI TO WRITE
LD A,PPIDE_DIR_WRITE ; SET DATA BUS DIRECTION TO WRITE
;OUT (PPIDE_REG_PPI),A ; DO IT
LD C,(IY+PPIDE_PPI) ; PPI CONTROL WORD
EZ80_IO
OUT (C),A ; WRITE IT
#ENDIF
;
; SELECT READ/WRITE IDE REGISTER
LD A,PPIDE_REG_DATA ; DATA REGISTER
@@ -1341,7 +1424,7 @@ PPIDE_PUT:
EZ80_IO
OUT (C),A ; DO IT
LD E,A ; E := WRITE UNASSERTED
XOR PPIDE_CTL_DIOW ; SWAP THE READ LINE BIT
XOR PPIDE_CTL_DIOW ; SWAP THE WRITE LINE BIT
LD D,A ; D := WRITE ASSERTED
;
; LOOP SETUP
@@ -1448,6 +1531,12 @@ PPIDE_RESET:
LD C,(IY+PPIDE_PPI) ; PPI CONTROL WORD
EZ80_IO
OUT (C),A ; WRITE IT
#IF (PPIDE0MODE == PPIDEMODE_MSX)
; SET DRIVE TO IDLE
LD A,PPIDE_IDLE
DEC C
OUT (C),A
#ENDIF
;
; IF A DSKYNG IS ACTIVE AND IS ON THE SAME PPI PORT AS THE PPIDE BEING
; RESET, THEN THE DSKYNG WILL ALSO BE RESET. SO, THE RESET CODE IS
@@ -1473,6 +1562,9 @@ PPIDE_RESET_PKD1:
#IF (PPIDETRACE >= 3)
PRTS(" HARD$")
#ENDIF
;
; MSX_NOTE: RESET SIGNAL NOT IMPLEMENTED, /RESET OF PPI 8255 IS CONNECTED TO Z80 BUS /RESET
#IF (PPIDE0MODE != PPIDEMODE_MSX)
LD A,PPIDE_CTL_RESET
;OUT (PPIDE_REG_CTL),A
LD C,(IY+PPIDE_CTL) ; SET IDE ADDRESS
@@ -1543,6 +1635,8 @@ PPIDE_RESET3:
LD DE,20 ; DELAY 320US (SPEC IS >= 25US)
CALL VDELAY
;
#ENDIF ; PPIDEMODE_MSX
;
PPIDE_RESET5:
LD HL,PPIDE_TONORM ; NORMAL TIMEOUT NOW
LD (PPIDE_TIMEOUT),HL ; AND RESTORE IT
@@ -1555,8 +1649,11 @@ PPIDE_RESET5:
BIT 0,(IY+PPIDE_ACC) ; MASTER?
CALL Z,PPIDE_GOPARTNER ; IF NOT, SWITCH TO MASTER
CALL PPIDE_INITUNIT ; INIT CURRENT UNIT
; MSX_NOTE: SLAVE UNIT NOT SUPPORTED
#IF (PPIDE0MODE != PPIDEMODE_MSX)
CALL PPIDE_GOPARTNER ; POINT TO SLAVE
CALL PPIDE_INITUNIT ; INIT PARTNER UNIT
#ENDIF
POP IY ; RECOVER ORIG CFG PTR
;
XOR A ; SIGNAL SUCCESS
@@ -2053,7 +2150,11 @@ PPIDE_IN:
DEC C ; SET IDE ADDRESS ; 4TS
EZ80_IO
OUT (C),B ; SET ADDRESS LINES ; 12TS
#IF (PPIDE0MODE == PPIDEMODE_MSX)
RES 7,B ; CLEAR /READ BIT (READ ON)
#ELSE
SET 6,B ; TURN ON READ BIT ; 8TS
#ENDIF
EZ80_IO
OUT (C),B ; ASSERT READ LINE ; 12TS
;
@@ -2065,7 +2166,11 @@ PPIDE_IN:
INC C ; 4TS
INC C ; 4TS
;
#IF (PPIDE0MODE == PPIDEMODE_MSX)
LD B,PPIDE_IDLE ; SET DRIVE TO IDLE (READ OFF)
#ELSE
RES 6,B ; CLEAR READ BIT ; 8TS
#ENDIF
EZ80_IO
OUT (C),B ; DEASSERT READ LINE ; 12TS
POP BC ; RECOVER INCOMING BC ; 10TS
@@ -2093,10 +2198,24 @@ PPIDE_OUT:
DEC C ; SET IDE ADDRESS
EZ80_IO
OUT (C),B ; SET ADDRESS LINES
;
#IF (PPIDE0MODE == PPIDEMODE_MSX)
; FIRST SEND DATA VALUE THEN ASSERT WRITE LINE
DEC C
DEC C
EZ80_IO
OUT (C),A ; SEND DATA VALUE TO DEVICE
INC C
INC C
RES 6,B ; CLEAR /WRITE BIT (WRITE ON)
EZ80_IO
OUT (C),B
LD B,PPIDE_IDLE ; SET DRIVE TO IDLE (WRITE OFF)
#ELSE
SET 5,B ; TURN ON WRITE BIT
EZ80_IO
OUT (C),B ; ASSERT WRITE LINE
;
;
DEC C
DEC C
;OUT (PPIDE_REG_DATALO),A ; SEND DATA VALUE TO DEVICE
@@ -2104,8 +2223,9 @@ PPIDE_OUT:
OUT (C),A ; SEND DATA VALUE TO DEVICE
INC C
INC C
;
;
RES 5,B ; CLEAR WRITE BIT
#ENDIF
EZ80_IO
OUT (C),B ; DEASSERT WRITE LINE
POP BC ; RECOVER INCOMING BC

View File

@@ -1144,7 +1144,10 @@ romcopy:
cp bid_cur ; special value?
jr nz,romcopy1 ; if not, continue
ld a,(bid_ldr) ; else substitute
jr romcopy2 ; and continue
romcopy1:
add a,BID_IMG0 ; add to start of image banks
romcopy2:
push af ; save source bank
;
ld e,a ; source bank to E
@@ -2695,8 +2698,11 @@ ra_ent .equ 12
; *_SIZ *_END and any code generated which does not include LAYOUT.INC is
; synced.
;
; Note: The loadable ROM images are placed in ROM banks BID_IMG0 and
; BID_IMG1. However, RomWBW supports a mechanism to load a complete
; Note: The loadable ROM images are placed in ROM banks starting with
; BID_IMG0. The bank numbers below are an offset from BID_IMG0 because
; the actual bank id of BID_IMG0 varies per system.
;
; RomWBW supports a mechanism to load a complete
; new system dynamically as a runnable application (see appboot
; in hbios.asm). In this case, the contents of BID_IMG0 will
; be pre-loaded into the currently executing ram bank thereby allowing
@@ -2705,48 +2711,48 @@ ra_ent .equ 12
; normally found in BID_IMG0. This special value will cause
; the associated image to be loaded from the currently executing bank
; which will be correct regardless of the load mode. Images in other
; banks (BID_IMG1) will always be loaded directly from ROM.
; image banks (BID_IMG1).
;
ra_tbl:
;
; Name Key Dsky Bank Src Dest Size Entry
; --------- ------- ----- -------- ----- ------- ------- ----------
ra_ent(str_mon, 'M', KY_CL, MON_BNK, MON_IMGLOC, MON_LOC, MON_SIZ, MON_SERIAL)
; Name Key Dsky Bank Src Dest Size Entry
; --------- ------ ----- -------- ----- ------- ------- ----------
ra_ent(str_mon, 'M', KY_CL, MON_BNK, MON_IMGLOC, MON_LOC, MON_SIZ, MON_SERIAL)
ra_entsiz .equ $ - ra_tbl
#if (BIOS == BIOS_WBW)
#if (PLATFORM == PLT_S100)
ra_ent(str_smon, 'O', $FF, bid_cur, $8000, $8000, $0001, s100mon)
ra_ent(str_smon, 'O', $FF, bid_cur, $8000, $8000, $0001, s100mon)
#endif
#endif
ra_ent(str_cpm22, 'C', KY_BK, CPM22_BNK, CPM22_IMGLOC, CPM_LOC, CPM_SIZ, CPM_ENT)
ra_ent(str_zsys, 'Z', KY_FW, ZSYS_BNK, ZSYS_IMGLOC, CPM_LOC, CPM_SIZ, CPM_ENT)
ra_ent(str_cpm22, 'C', KY_BK, CPM22_BNK, CPM22_IMGLOC, CPM_LOC, CPM_SIZ, CPM_ENT)
ra_ent(str_zsys, 'Z', KY_FW, ZSYS_BNK, ZSYS_IMGLOC, CPM_LOC, CPM_SIZ, CPM_ENT)
#if (BIOS == BIOS_WBW)
ra_ent(str_bas, 'B', KY_DE, BAS_BNK, BAS_IMGLOC, BAS_LOC, BAS_SIZ, BAS_LOC)
ra_ent(str_tbas, 'T', KY_EN, TBC_BNK, TBC_IMGLOC, TBC_LOC, TBC_SIZ, TBC_LOC)
ra_ent(str_fth, 'F', KY_EX, FTH_BNK, FTH_IMGLOC, FTH_LOC, FTH_SIZ, FTH_LOC)
ra_ent(str_play, 'P', $FF, GAM_BNK, GAM_IMGLOC, GAM_LOC, GAM_SIZ, GAM_LOC)
ra_ent(str_net, 'N'+$80, $FF, NET_BNK, NET_IMGLOC, NET_LOC, NET_SIZ, NET_LOC)
ra_ent(str_upd, 'X', $FF, UPD_BNK, UPD_IMGLOC, UPD_LOC, UPD_SIZ, UPD_LOC)
ra_ent(str_blnk, 'W'+$80, $FF, NVR_BNK, NVR_IMGLOC, NVR_LOC, NVR_SIZ, NVR_LOC)
ra_ent(str_blnk, 'D'+$80, $FF, DEV_BNK, DEV_IMGLOC, DEV_LOC, DEV_SIZ, DEV_LOC)
ra_ent(str_blnk, 'S'+$80, $FF, SLC_BNK, SLC_IMGLOC, SLC_LOC, SLC_SIZ, SLC_LOC)
ra_ent(str_user, 'U', $FF, USR_BNK, USR_IMGLOC, USR_LOC, USR_SIZ, USR_LOC)
ra_ent(str_bas, 'B', KY_DE, BAS_BNK, BAS_IMGLOC, BAS_LOC, BAS_SIZ, BAS_LOC)
ra_ent(str_tbas, 'T', KY_EN, TBC_BNK, TBC_IMGLOC, TBC_LOC, TBC_SIZ, TBC_LOC)
ra_ent(str_fth, 'F', KY_EX, FTH_BNK, FTH_IMGLOC, FTH_LOC, FTH_SIZ, FTH_LOC)
ra_ent(str_play, 'P', $FF, GAM_BNK, GAM_IMGLOC, GAM_LOC, GAM_SIZ, GAM_LOC)
ra_ent(str_net, 'N'+$80, $FF, NET_BNK, NET_IMGLOC, NET_LOC, NET_SIZ, NET_LOC)
ra_ent(str_upd, 'X', $FF, UPD_BNK, UPD_IMGLOC, UPD_LOC, UPD_SIZ, UPD_LOC)
ra_ent(str_blnk, 'W'+$80, $FF, NVR_BNK, NVR_IMGLOC, NVR_LOC, NVR_SIZ, NVR_LOC)
ra_ent(str_blnk, 'D'+$80, $FF, DEV_BNK, DEV_IMGLOC, DEV_LOC, DEV_SIZ, DEV_LOC)
ra_ent(str_blnk, 'S'+$80, $FF, SLC_BNK, SLC_IMGLOC, SLC_LOC, SLC_SIZ, SLC_LOC)
ra_ent(str_user, 'U', $FF, USR_BNK, USR_IMGLOC, USR_LOC, USR_SIZ, USR_LOC)
#endif
#if (DSKYENABLE)
ra_ent(str_dsky, 'Y'+$80, KY_GO, MON_BNK, MON_IMGLOC, MON_LOC, MON_SIZ, MON_DSKY)
ra_ent(str_dsky, 'Y'+$80, KY_GO, MON_BNK, MON_IMGLOC, MON_LOC, MON_SIZ, MON_DSKY)
#endif
ra_ent(str_blnk, 'E'+$80, $FF, EGG_BNK, EGG_IMGLOC, EGG_LOC, EGG_SIZ, EGG_LOC)
ra_ent(str_blnk, 'E'+$80, $FF, EGG_BNK, EGG_IMGLOC, EGG_LOC, EGG_SIZ, EGG_LOC)
;
.dw 0 ; table terminator
;
ra_tbl_app:
;
; Name Key Dsky Bank Src Dest Size Entry
; --------- ------- ----- -------- ----- ------- ------- ----------
ra_ent(str_mon, 'M', KY_CL, bid_cur, MON_IMGLOC, MON_LOC, MON_SIZ, MON_SERIAL)
ra_ent(str_zsys, 'Z', KY_FW, bid_cur, ZSYS_IMGLOC, CPM_LOC, CPM_SIZ, CPM_ENT)
; Name Key Dsky Bank Src Dest Size Entry
; --------- ------ ----- -------- ----- ------- ------- ----------
ra_ent(str_mon, 'M', KY_CL, bid_cur, MON_IMGLOC, MON_LOC, MON_SIZ, MON_SERIAL)
ra_ent(str_zsys, 'Z', KY_FW, bid_cur, ZSYS_IMGLOC, CPM_LOC, CPM_SIZ, CPM_ENT)
#if (DSKYENABLE)
ra_ent(str_dsky, 'Y'+$80, KY_GO, bid_cur, MON_IMGLOC, MON_LOC, MON_SIZ, MON_DSKY)
ra_ent(str_dsky, 'Y'+$80, KY_GO, bid_cur, MON_IMGLOC, MON_LOC, MON_SIZ, MON_DSKY)
#endif
;
.dw 0 ; table terminator

View File

@@ -26,6 +26,7 @@
; 22. NABU NABU w/ Les Bird's RomWBW Option Board
; 23. SZ80 S100 Computers Z80
; 24. RCEZ80 RCBus eZ80
; 25. MSX MSX Computers
;
;
; INCLUDE BUILD VERSION
@@ -99,6 +100,7 @@ MM_RPH .EQU 8 ; Z180 WITH RPH EXTENSIONS
MM_MON .EQU 9 ; MONSPUTER MMU (DEPRECATED)
MM_EZ512 .EQU 10 ; EZ512 BANK SWITCHING
MM_SZ80 .EQU 11 ; S100 Z80 CPU ONBAORD MEMORY MANAGER
MM_MSX .EQU 12 ; MSX RAM MAPPER MEMORY MANAGER
;
; BOOT STYLE
;
@@ -225,6 +227,7 @@ PPIDEMODE_NONE .EQU 0
PPIDEMODE_STD .EQU 1 ; STANDARD
PPIDEMODE_S100A .EQU 2 ; S100 PRIMARY INTERFACE
PPIDEMODE_S100B .EQU 3 ; S100 SECONDARY INTERFACE
PPIDEMODE_MSX .EQU 4 ; MSX BEER IDE INTERFACE
;
; SD MODE SELECTIONS
;

View File

@@ -51,7 +51,7 @@ cmdmax .EQU $20 ; Max cmd input length
stksiz .EQU $40 ; Working stack size
restart .EQU $0000 ; CP/M restart vector
bdos .EQU $0005 ; BDOS invocation vector
ident .EQU $FFFE ; loc of RomWBW HBIOS ident ptr
ident .EQU $FFFC ; loc of RomWBW HBIOS ident ptr
;
ETX .EQU 3 ; CTRL-C
BEL .EQU 7 ; ASCII bell

View File

@@ -209,11 +209,15 @@ USBKYBENABLE .SET TRUE ; INCLUDE USB KEYBOARD SUPPORT
#DEFINE TMS_IODELAY EX (SP),HL \ EX (SP),HL ; 38 W/S
;#DEFINE TMS_IODELAY NOP \ NOP \ NOP \ NOP \ NOP ; 20 W/S ### JLC Mod for Clock/2 (9 MHz) ###
#ELSE
; BELOW WAS TUNED FOR Z80 AT 8MHZ
#IF (TMS80COLS)
#DEFINE TMS_IODELAY NOP \ NOP \ NOP \ NOP \ NOP \ NOP \ NOP ; V9958 NEEDS AT WORST CASE, APPROX 4us (28T) DELAY BETWEEN I/O (WHEN IN TEXT MODE)
#IF (PLATFORM == PLT_MSX)
#DEFINE TMS_IODELAY EX (SP),HL \ EX (SP),HL
#ELSE
#DEFINE TMS_IODELAY NOP \ NOP ; 8 W/S
; BELOW WAS TUNED FOR Z80 AT 8MHZ
#IF (TMS80COLS)
#DEFINE TMS_IODELAY NOP \ NOP \ NOP \ NOP \ NOP \ NOP \ NOP ; V9958 NEEDS AT WORST CASE, APPROX 4us (28T) DELAY BETWEEN I/O (WHEN IN TEXT MODE)
#ELSE
#DEFINE TMS_IODELAY NOP \ NOP ; 8 W/S
#ENDIF
#ENDIF
#ENDIF
;

18
Source/MSX/Build.cmd Normal file
View File

@@ -0,0 +1,18 @@
@echo off
setlocal
::
:: Build MSX loader
::
set TOOLS=../../Tools
set PATH=%TOOLS%\tasm32;%TOOLS%\zxcc;%PATH%
set TASMTABS=%TOOLS%\tasm32
set CPMDIR80=%TOOLS%/cpm/
tasm -t80 -g3 msx-ldr.asm msx-ldr.com msx-ldr.lst || exit /b
if exist msx-ldr.com copy msx-ldr.com ..\..\Binary\ || exit /b

10
Source/MSX/Clean.cmd Normal file
View File

@@ -0,0 +1,10 @@
@echo off
setlocal
if exist *.bin del *.bin
if exist *.lst del *.lst
if exist *.prn del *.prn
if exist *.hex del *.hex
if exist *.rel del *.rel
if exist *.sym del *.sym
if exist *.com del *.com

8
Source/MSX/Makefile Normal file
View File

@@ -0,0 +1,8 @@
OBJECTS = msx-ldr.com
DEST = ../../Binary
TOOLS = ../../Tools
include $(TOOLS)/Makefile.inc
msx-ldr.com: msx-ldr.asm
$(TASM) $< $@ msx-ldr.lst
cp msx-ldr.com $(DEST)/msx-ldr.com

254
Source/MSX/msx-ldr.asm Normal file
View File

@@ -0,0 +1,254 @@
; ------------------------------------------------------------------------------
; msx-ldr.asm
; MSX RomWBW loader, requires 512KB or more RAM mapper
; ------------------------------------------------------------------------------
; The loader assumes following entry conditions:
; + RAM mapper slot is selected on all 4 pages
; + Segments 0 to 3 are in use for the DOS TPA
; + The last 2 segments may be in use for MSX-DOS 2 code + data
ROMWBW_SEG .equ 4 ; RomWBW boot segment
CHGCPU .equ $0180 ; changes CPU mode
P2_SEG .equ $f2c9 ; current segment page 2 (MSX-DOS 2)
CSRSW .equ $fca9 ; cursor on/off flag
H_TIMI .equ $fd9f ; timer interrupt hook (vdp vsync)
; ------------------------------------------------------------------------------
.ORG $100
; copy loader to page 3 and run it there
ld hl,LSTART
ld de,$c000
ld bc,LSIZE
ldir
jp $c000
LSTART:
; ------------------------------------------------------------------------------
.ORG $c000
; open ROM image file (fcb)
ld de,romfile
ld c,$0f ; FOPEN
call 5
or a ; error opening file?
jp nz,error_open ; nz=yes
; get filesize, determine number of ram segments to load
ld a,(romfile+$12) ; rom image size / 64k bytes
rlca ; number of banks
rlca ; number of segments
ld (nsegs),a
; determine ram mapper size
call MapperSize
or a
jp z,error_noram
; mapper segments > nsegs + 5?
ld a,(nsegs)
add a,5
sub b
jp nc,error_ramsize
ld de,t_message
ld c,$09 ; STROUT
call 5
; init fcb file read: set recordsize and disk transfer address
ld hl,$0400 ; use 1K blocks
ld (romfile+$0e),hl
ld de,$8000
ld c,$1a ; SETDTA
call 5
; cursor off
xor a
ld (CSRSW),a
; preload RomWBW rom into RAM Mapper segments
ld a,(nsegs)
ld b,a ; number of segment to load
ld a,4 ; starting segment
load_bank: push af
push bc
ld e,$0d ; set cursor to beginning of line
ld c,$02 ; CONOUT
call 5
pop bc ; reload segment number
push bc
ld a,b
call dspNumA
pop bc
pop af ; reload segment number
out ($fe),a ; select ram segment in page 2
ld (P2_SEG),a ; update system variable segment 2 (MSX-DOS 2)
inc a
; read rom bank data from file
push af
push bc
ld hl,16 ; read 16K data
ld de,romfile
ld c,$27 ; RDBLK
call 5
or a ; error reading file?
jp nz,error_read ; nz=yes
pop bc
pop af
; next rom bank
djnz load_bank
; it's not necessary to close the file
; call H.TIMI 256 times to motor off floppy drives
di
xor a
mtcount: call H_TIMI ; H.TIMI handler saves register AF
dec a
jr nz,mtcount
; set CPU to Z80 mode
ld a,(CHGCPU)
cp $c3
ld a,$80 ; set Z80 mode + switch Turbo LED indicator
call z,CHGCPU
; select RomWBW bootloader bank and start RomWBW
ld a,ROMWBW_SEG
out ($fc),a
inc a
out ($fd),a
jp $0
; ---------------------------------------------------------------------------
; dspNumA - routine to display a value in A in ascii characters
; ---------------------------------------------------------------------------
dspNumA: ld l,a
ld h,0
;ld bc,-100
;call num1
ld bc,-10
call num1
ld bc,-01
num1: ld a,'0'-1
num2: inc a
add hl,bc
jr c,num2
sbc hl,bc
push hl
ld e,a
ld c,$02 ; CONOUT
call 5
pop hl
ret
; ---------------------------------------------------------------------------
; Determine if a RAM mapper is available and what size it is
; Output: a = number of RAM mapper segments
; ---------------------------------------------------------------------------
MapperSize: ld hl,$8000
; pass 1: test write/read segment 0
ld a,1
out ($fe),a ; set page 2 to segment 1
ld b,(hl) ; save byte 1
ld (hl),$aa ; write test value AA in segment 1
xor a
out ($fe),a ; set page 2 to segment 0
ld c,(hl) ; save byte 0
ld (hl),$55 ; write test value 55 in segment 0
inc a
out ($fe),a ; set page 2 to segment 1
ld e,(hl) ; read test byte 1 in E
xor a
out ($fe),a ; set page 2 to segment 0
ld (hl),c ; restore byte 0
inc a
out ($fe),a ; set page 2 to segment 1
ld (hl),b ; restore byte 1
ld a,e ; AA=mapper 55=no mapper
cp $aa ; is mapper?
ld b,$00 ; set RAM segments to 0
jr nz,_restore2 ; nz=no mapper
; pass 2: write test byte to all segments
_testpass2: ld a,b
out ($fe),a
ld a,(hl)
push af ; save byte on stack
inc sp ; "
ld (hl),$aa
inc b
jr nz,_testpass2
; pass 3: determine number of valid ram segments
_testpass3: ld a,b
out ($fe),a
ld a,(hl)
cp $aa ; valid ram segment?
jr nz,_restore ; nz=no
ld a,$55
ld (hl),a
cp (hl) ; 2nd test ok?
jr nz,_restore ; nz=no
inc b
jr nz,_testpass3
dec b ; maximum segment number is 255
; restore data saved on stack for each segment
_restore: ld c,$00
_restore1: ld a,c
dec a
out ($fe),a
dec sp ; load byte on stack
pop af ; "
ld (hl),a
dec c
jr nz,_restore1
; restore/set ram segment 1 in page 2
_restore2: ld a,$01
out ($fe),a
ld a,b
ret
; ---------------------------------------------------------
; Handle errors reading rom file
; ---------------------------------------------------------
error_open: ld de,t_open
jr error_end
error_read: pop bc
pop af
ld de,t_read
jr error_end
error_noram: ld de,t_noram
jr error_end
error_ramsize: ld de,t_ramsize
error_end: ld c,$09 ; STROUT
call 5
jp 0 ; end program
t_message: .db "Loading RomWBW for MSX...",13,10,"$"
t_open: .db "Error opening msx-std.rom file$"
t_noram: .db "Error: no RAM mapper memory detected$"
t_ramsize: .db "Error: not enough RAM mapper memory$"
t_read: .db $0a,"Error reading msx-std.rom file$"
nsegs: .db 0 ; number of segments
romfile: .db 0,"MSX-STD ","ROM" ; fcb file
.fill 25,0 ; fcb variables
; ------------------------------------------------------------------------------
LSIZE .EQU $-$c000
.END

10
Source/MSX/readme.md Normal file
View File

@@ -0,0 +1,10 @@
# RomWBW loader for MSX
The loader can be started from the MSX-DOS 1, MSX-DOS 2 or Nextor command prompt.
It will check the RAM mapper requirements based on the size of the rom image file.
The "MSX_std.rom" image must be copied to "MSX-STD.ROM" on the MSX disk media together with "MSX-LDR.COM".

View File

@@ -2,12 +2,12 @@
# order is actually important, because of build dependencies
#
.PHONY: doc prop shared bp images rom zrc z1rcc zzrcc zrc512 sz80 ez512
.PHONY: doc prop shared bp images rom zrc z1rcc zzrcc zrc512 sz80 ez512 msx
.ONESHELL:
.SHELLFLAGS = -ce
all: prop shared bp images rom zrc z1rcc zzrcc zrc512 sz80 ez512
all: prop shared bp images rom zrc z1rcc zzrcc zrc512 sz80 ez512 msx
doc:
$(MAKE) --directory Doc $(ACTION)
@@ -59,6 +59,10 @@ sz80:
ez512:
$(MAKE) --directory EZ512 $(ACTION)
msx:
$(MAKE) --directory MSX $(ACTION)
clean: ACTION=clean
clean: all

View File

@@ -1,9 +1,17 @@
S100 Z80 has no real ROM. It has 1024K RAM.
S100 Z80 CPU
============
S100 Z80 has only a small monitor ROM at the to of CPU address space
which is not utilized by RomWBW. RomWBW treats the system as a
ROMless system. RAM is provided by a separate board. RomWBW assumes
the RAM board has >= 1024K which is the maximum RAM supported by the
Z80 CPU memory manager.
The ROMless startup mode treats the entire 1024KB as RAM. 128KB of RAM
must be preloaded by the Monitor CF Loader. There will be no ROM
disk available under RomWBW. There will be a RAM Disk and it's initial
contents will be seeded by the image loaded by the CF Loader.
disk available under RomWBW.
The RomWBW 32K bank layout is as follows:
Bank Contents Description
-------- -------- -----------
@@ -11,19 +19,50 @@ Bank Contents Description
0x1 IMG0 ROM Loader, Monitor, ROM OSes
0x2 IMG1 ROM Applications
0x3 IMG2 Reserved
0x4-0x1B RAMD RAM Disk Banks
0x4-0xF RAMD RAM Disk Banks
0x10-1B APP Application Banks
0x1C BUF OS Buffers (CP/M3)
0x1D AUX Aux Bank (CP/M 3, BPBIOS, etc.)
0x1E USR User Bank (CP/M TPA, etc.)
0x1F COM Common Bank, Upper 32KB
Memory Manager
--------------
FPGA Z80 has no real ROM. It has a single 512K RAM chip.
The Z80 CPU implements a custom memory manager that allows mapping the 2
lowest 16K portions of CPU address space ($0000-$3FFFF, and $4000-$7FFF).
Each of these banks can be mapped to any physical 16K bank.
The physical 16K banks are 16K aligned. The memory manager
can address a maximum of 1MB of physical memory. Which is
64 x 16K banks (bank numbers $00-$3F)
The top 32K of CPU address space ($8000-$FFFF) is statically mapped
to physical banks $02 & $03. RomWBW is designed to have the top
32K of CPU address space assigned to the last two banks of
RAM. So the RomWBW memory manager for this board (MM_SZ80)
rotates the requested bank numbers by 4. With wrapping, this
causes a RomWBW request for the top two banks to be mapped to
physical banks $02 & $03.
Z80 CPU Physical: 00 01 02 03 ... 38 39 3A 3B 3C 3D 3E 3F
RomWBW Logical: 04 05 06 07 ... 3C 3D 3E 3F 00 01 02 03
As a result, the Z80 CPU Monitor loads RomWBW starting at
physical bank 04.
S100 FPGA Z80 SBC
=================
FPGA Z80 has no real ROM. It has a single onboard 512K RAM chip.
RomWBW assumes the use of the T35 FPGA with associated firmware.
The ROMless startup mode treats the entire 512KB as RAM. 384KB of RAM
must be preloaded by the FPGA Monitor CF Loader. There will be no ROM
disk available under RomWBW. There will be a RAM Disk and it's initial
contents will be seeded by the image loaded by the CF Loader.
disk available under RomWBW.
The RomWBW 32K bank layout is as follows:
Bank Contents Description
-------- -------- -----------
@@ -36,3 +75,8 @@ Bank Contents Description
0xD AUX Aux Bank (CP/M 3, BPBIOS, etc.)
0xE USR User Bank (CP/M TPA, etc.)
0xF COM Common Bank, Upper 32KB
Memory Manager
--------------
The T35 FPGA Z80 implements the Zeta 2 (Z2) memory manager.

View File

@@ -16,7 +16,7 @@ echo.
srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1B8 0x200 sz80_ptbl.bin -binary -offset 0x1B8 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x80000 0xE0000 ..\..\Binary\%1.rom -binary -offset 0x80000 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x80000 0xA0000 ..\..\Binary\%1.upd -binary -offset 0x80000 -o temp.dat -binary
move temp.dat ..\..\Binary\%1_hd1k_prefix.dat
copy /b ..\..\Binary\%1_hd1k_prefix.dat + ..\..\Binary\hd1k_cpm22.img + ..\..\Binary\hd1k_zsdos.img + ..\..\Binary\hd1k_nzcom.img + ..\..\Binary\hd1k_cpm3.img + ..\..\Binary\hd1k_zpm3.img + ..\..\Binary\hd1k_ws4.img ..\..\Binary\%1_hd1k_combo.img || exit /b

View File

@@ -3,8 +3,8 @@ DEST=../../Binary
HD1KIMGS = $(DEST)/hd1k_cpm22.img $(DEST)/hd1k_zsdos.img $(DEST)/hd1k_nzcom.img \
$(DEST)/hd1k_cpm3.img $(DEST)/hd1k_zpm3.img $(DEST)/hd1k_ws4.img
ROMS := $(wildcard $(DEST)/SZ80_*.rom)
ROMS := $(patsubst $(DEST)/%.rom,%,$(ROMS))
ROMS := $(wildcard $(DEST)/SZ80_*.upd)
ROMS := $(patsubst $(DEST)/%.upd,%,$(ROMS))
OBJECTS := $(patsubst %,%_hd1k_prefix.dat,$(ROMS))
OBJECTS += $(patsubst %,%_hd1k_combo.img,$(ROMS))
@@ -15,10 +15,10 @@ include $(TOOLS)/Makefile.inc
DIFFPATH = $(DIFFTO)/Binary
%_hd1k_prefix.dat: $(DEST)/%.rom
%_hd1k_prefix.dat: $(DEST)/%.upd
srec_cat -generate 0x0 0x100000 --constant 0x00 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x1B8 0x200 sz80_ptbl.bin -binary -offset 0x1B8 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x80000 0xE0000 $< -binary -offset 0x80000 -o temp.dat -binary
srec_cat temp.dat -binary -exclude 0x80000 0xA0000 $< -binary -offset 0x80000 -o temp.dat -binary
mv temp.dat $@
%_hd1k_combo.img: %_hd1k_prefix.dat $(HD1KIMGS)

View File

@@ -1,4 +1,4 @@
FZ80 Disk Prefix Layout
SZ80 Disk Prefix Layout
=======================
---- Bytes ---- --- Sectors ---
@@ -13,7 +13,7 @@ Start Length Start Length Description
Notes
-----
- Z80 Monitor reads 384KB (RomWBW) from sectors 1024-1791 of CF into first 384KB of physical RAM
- Z80 Monitor maps first 32KB of physical RAM to first 32KB of CPU RAM and starts execution at 0x0000
- Z80 Monitor reads 128KB (RomWBW) from sectors 1024-1279 of CF into first 128KB of RAM
- Z80 Monitor maps first 16KB of physical RAM to first 32KB of CPU RAM and starts execution at 0x0000
-- WBW 3:18 PM 6/30/2024
-- WBW 10:07 AM 9/23/2025

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@@ -2,7 +2,7 @@
#DEFINE RMN 6
#DEFINE RUP 0
#DEFINE RTP 0
#DEFINE BIOSVER "3.6.0-dev.26"
#DEFINE BIOSVER "3.6.0-dev.30"
#define rmj RMJ
#define rmn RMN
#define rup RUP

View File

@@ -3,5 +3,5 @@ rmn equ 6
rup equ 0
rtp equ 0
biosver macro
db "3.6.0-dev.26"
db "3.6.0-dev.30"
endm